Method for manufacturing a semiconductor device and substrate

Abstract

To form a nitride semiconductor layer with high quality onto a GaN substrate.SOLUTION: A GaN substrate 10 comprises: an N polarity surface 10b; and a Ga polarity surface 10a opposite thereto. There is formed, on the N polarity surface 10b side, an amorphous layer 60 containing amorphous AlxGa1-xN(0<x≤1). There is formed a nitride semiconductor layer 20 on the Ga polarity surface 10a of the GaN substrate 10 with the N polarity surface 10b side of which the amorphous layer 60 is formed. For example, the nitride semiconductor layer 20 is caused to grow by using a MOCVD device 200 that heats the GaN substrate 10 from the amorphous layer 60 side. At the time, the amorphous layer 60 suppresses, on the N polarity surface 10b side of the GaN substrate 10, N desorption and associated melting due to Ga droplet generation. This suppresses deterioration of uniformity of temperature distribution in a growth surface of the nitride semiconductor layer 20 on the Ga polarity surface 10a side, and also suppresses associated deterioration of quality of the nitride semiconductor layer 20.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] This invention relates to a method for manufacturing a semiconductor device and a substrate. [Background technology]

[0002] A technique is known in which a highly heat-resistant protective layer made of amorphous or polycrystalline AlN (aluminum nitride) or the like is provided on the group III polar side of a substrate made of a group III nitride semiconductor such as GaN (gallium nitride), and a semiconductor layer such as GaN is epitaxially grown on the N (nitrogen) polar side (Patent Document 1).

[0003] Furthermore, a technique is known in which a layer made of polycrystalline or amorphous group III nitride semiconductor with a different coefficient of thermal expansion from the substrate is formed on the back side of a substrate such as a sapphire substrate, and a layer made of single crystal group III nitride semiconductor with a different coefficient of thermal expansion from the substrate is formed on the front side (Patent Document 2). [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2021-63007 [Patent Document 2] International Publication No. 2017 / 216997 Brochure [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] In the manufacturing of semiconductor devices using nitride semiconductors, a nitride semiconductor layer, such as GaN, is grown on a predetermined substrate. For example, a method is known in which a nitride semiconductor layer, such as GaN, is grown on the Ga (gallium) polar side of a GaN substrate. In this method, by using a GaN substrate with relatively few dislocations, it is expected that the number of dislocations introduced into the nitride semiconductor layer grown on the Ga polar side will be suppressed, thereby obtaining a high-quality nitride semiconductor layer.

[0006] However, in the growth of the nitride semiconductor layer, melting may occur on the N-polarity surface side of the GaN substrate, which is opposite to the Ga-polarity surface side where the nitride semiconductor layer grows, due to conditions such as the atmosphere and temperature during growth on the GaN substrate, and the arrangement of the GaN substrate during growth. Melting of the GaN substrate may deteriorate the uniformity of the temperature distribution within the growth surface of the nitride semiconductor layer and may reduce the quality of the crystal structure, composition, etc. of the grown nitride semiconductor layer.

[0007] On one aspect, the present invention aims to form a high-quality nitride semiconductor layer on a GaN substrate.

Means for Solving the Problem

[0008] [[ID=io]] In one aspect, an amorphous layer containing Al x Ga 1-x N (0 < x ≦ 1) is formed on the N-polarity surface side of a GaN substrate having an N-polarity surface and a Ga-polarity surface opposite to the N-polarity surface, and a nitride semiconductor layer is formed on the Ga-polarity surface side of the GaN substrate on which the amorphous layer is formed on the N-polarity surface side. A method for manufacturing a semiconductor device is provided.

Effect of the Invention

[0009] On one aspect, it becomes possible to form a high-quality nitride semiconductor layer on a GaN substrate.

Brief Description of the Drawings

[0010] [Figure 1] It is a diagram for explaining an example of a nitride semiconductor layer grown on a substrate. [Figure 2] It is a diagram for explaining an example of a semiconductor device. [Figure 3] It is a diagram for explaining an example of a growth process of a nitride semiconductor layer on a GaN substrate. [Figure 4] It is a diagram for explaining an example of a substrate according to the first embodiment. [Figure 5] It is a diagram for explaining an example of a growth process of a nitride semiconductor layer on a substrate according to the first embodiment. [Figure 6] This is a diagram (part 1) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 7] This is a diagram (part 2) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 8] This figure illustrates an example configuration of a semiconductor device equipped with a HEMT according to the third embodiment. [Figure 9] This figure illustrates an example configuration of a semiconductor device equipped with a diode according to the third embodiment. [Modes for carrying out the invention]

[0011] Semiconductor devices using nitride semiconductors are being developed as high-voltage and high-power devices by utilizing characteristics such as high saturation electron velocity and wide bandgap. Numerous reports have been published on field-effect transistors (FETs), such as high-electron-mobility transistors (HEMTs), which are semiconductor devices using nitride semiconductors. One type of HEMT is known that uses AlGaN (aluminum gallium nitride) as the barrier layer and GaN as the channel layer. In such HEMTs, two-dimensional electron gas (2DEG) is generated in GaN due to the spontaneous polarization of AlGaN and piezoelectric polarization generated in AlGaN due to strain caused by the lattice constant difference with GaN, thereby realizing a high-power device.

[0012] Nitride semiconductor layers such as GaN and AlGaN are formed, for example, by epitaxial growth (hereinafter also simply referred to as "growth") using the metal organic chemical vapor deposition (MOCVD) method on a predetermined substrate. For example, it has been proposed that by using a GaN substrate as a substrate for growing a nitride semiconductor layer such as GaN or AlGaN, the nitride semiconductor layer grown thereon can be made of high quality and the semiconductor device can be made of high performance.

[0013] Here, FIG. 1 is a diagram for explaining an example of a nitride semiconductor layer grown on a substrate. FIG. 1(A) schematically shows a cross-sectional view of a main part of a first example of a substrate and a nitride semiconductor layer grown thereon. FIG. 1(B) schematically shows a cross-sectional view of a main part of a second example of a substrate and a nitride semiconductor layer grown thereon.

[0014] As the substrate for growing a nitride semiconductor layer such as GaN, a substrate made of a different material from the nitride semiconductor layer to be grown, such as a SiC (silicon carbide) substrate, a Si (silicon) substrate, or a sapphire substrate, can be used. For example, as shown in FIG. 1(A), a SiC substrate 10A is used as the substrate, and a GaN layer 20a is grown as a nitride semiconductor layer on one surface 10Aa side thereof using the MOCVD method. In this case, a relatively large lattice mismatch is likely to occur between the SiC substrate 10A and the GaN layer 20a grown thereon, that is, at the hetero-junction interface. Therefore, dislocations 110a caused by the lattice mismatch with the SiC substrate 10A are likely to be formed in the grown GaN layer 20a.

[0015] As an example, in the GaN layer 20a grown on the SiC substrate 10A, relatively many dislocations 110a such as about 1×10 8 per cm 2 occur. In the GaN layer 20a on the SiC substrate 10A, it is calculated that about 10,000 dislocations 110a are formed in a region having a planar size of 100 μm × 100 μm.

[0016] In contrast, as shown in Figure 1(B), for example, a technique is known in which a GaN layer 20a is grown on a substrate of the same material, i.e., a GaN substrate 10. In recent years, it has become possible to prepare GaN substrates 10 with a sufficiently low density of dislocations 110. The GaN substrate 10 has an N polarity surface 10b ((000-1) surface) and a Ga polarity surface 10a ((0001) surface) on the opposite side. For example, the GaN layer 20a is grown on the Ga polarity surface 10a side of a GaN substrate 10 prepared with a low density of dislocations 110, using the MOCVD method. The GaN layer 20a is grown in lattice matching with the Ga polarity surface 10a of the GaN substrate 10, which is a substrate of the same material. Therefore, the occurrence of lattice defects in the GaN layer 20a is suppressed, and a GaN layer 20a with a good crystal structure is grown. At this time, dislocations 110b reflecting the dislocations 110 of the GaN substrate 10 are formed in the grown GaN layer 20a. On the Ga polar surface 10a of the GaN substrate 10, where the density of dislocations 110 is low, a GaN layer 20a with a low density of dislocations 110b is grown.

[0017] As an example, the density of dislocations 110b in a GaN layer 20a grown on the Ga polar surface 10a of a GaN substrate 10 is 1 × 10⁻⁶ 5 pieces / cm 2 The number of dislocations 110b formed in the GaN layer 20a on the GaN substrate 10 is calculated to be at a level of about 10 dislocations per 100 μm × 100 μm area. This is an extremely low level compared to the density of dislocations 110a formed in the GaN layer 20a on the SiC substrate 10A.

[0018] Thus, by using a GaN substrate as the substrate for growing a nitride semiconductor layer, it becomes possible to grow a high-quality nitride semiconductor layer with a low dislocation density, lattice matching with the GaN substrate, and a good crystal structure.

[0019] A nitride semiconductor layer grown on a predetermined substrate is used to manufacture semiconductor devices such as HEMTs. Figure 2 illustrates examples of semiconductor devices. Figure 2(A) schematically shows a cross-sectional view of the main part of the first example of a semiconductor device using a nitride semiconductor layer grown on a substrate. Figure 2(B) schematically shows a cross-sectional view of the main part of the second example of a semiconductor device using a nitride semiconductor layer grown on a substrate.

[0020] The semiconductor device 100A shown in Figure 2(A) and the semiconductor device 100 shown in Figure 2(B) are examples of HEMTs using a nitride semiconductor layer 20. The semiconductor device 100A has a configuration in which a nitride semiconductor layer 20 is provided on the surface 10Aa of a SiC substrate 10A. The semiconductor device 100 has a configuration in which a nitride semiconductor layer 20 is provided on the Ga polar surface 10a of a GaN substrate 10. A gate electrode 30, a source electrode 40, and a drain electrode 50 are provided on the nitride semiconductor layer 20 of each of the semiconductor devices 100A and 100.

[0021] In semiconductor device 100A and semiconductor device 100, the nitride semiconductor layer 20 has a structure in which a channel layer 21, a spacer layer 22, and a barrier layer 23 are stacked in order. The channel layer 21, spacer layer 22, and barrier layer 23 of the nitride semiconductor layer 20 are grown sequentially on a SiC substrate 10A in semiconductor device 100A and on a GaN substrate 10 in semiconductor device 100, respectively, using the MOCVD method. A predetermined nitride semiconductor is used for the channel layer 21, spacer layer 22, and barrier layer 23. For example, GaN is used for the channel layer 21. For example, AlN is used for the spacer layer 22. For example, InAlGaN (indium aluminum gallium nitride), AlGaN, AlN, etc., are used for the barrier layer 23. Nitride semiconductors with a larger band gap than the nitride semiconductor used for the channel layer 21 are used for the barrier layer 23 and spacer layer 22. Due to the spontaneous polarization of the barrier layer 23 and spacer layer 22, and the piezoelectric polarization generated in the barrier layer 23 and spacer layer 22 due to the strain caused by the difference in lattice constants with the channel layer 21, 2DEG101 is generated in the channel layer 21.

[0022] In semiconductor device 100A and semiconductor device 100, the gate electrode 30, source electrode 40, and drain electrode 50 are each made of a predetermined metal. For example, the gate electrode 30 may be made of Ni (nickel), Au (gold), etc. The source electrode 40 and drain electrode 50 may be made of Ta (tantalum), Al (aluminum), etc. For example, the gate electrode 30 is provided on the nitride semiconductor layer 20 to function as a Schottky electrode. The source electrode 40 and drain electrode 50 are provided on the nitride semiconductor layer 20 to function as ohmic electrodes.

[0023] During operation of semiconductor device 100A and semiconductor device 100, a predetermined voltage is applied between the source electrode 40 and the drain electrode 50, respectively, and a predetermined voltage is also applied to the gate electrode 30. The electric field effect caused by the voltage applied to the gate electrode 30 controls the amount of charge passing through the channel layer 21 directly beneath the gate electrode 30 between the source electrode 40 and the drain electrode 50, thereby controlling the output of semiconductor device 100A and semiconductor device 100.

[0024] In the semiconductor device 100A shown in Figure 2(A), a nitride semiconductor layer 20 is grown on the surface 10Aa of the SiC substrate 10A. When the nitride semiconductor layer 20 is grown on a SiC substrate 10A, which is a different material, the same thing happens as described for Figure 1(A). That is, the channel layer 21 of the nitride semiconductor layer 20 has a relatively high dislocation density due to lattice mismatch with the SiC substrate 10A on which it is grown. In the semiconductor device 100A, the relatively high dislocation density of the channel layer 21 makes electron scattering due to dislocations within the channel layer 21 more likely, and the electron mobility (schematically shown by the thick arrow AR0 in Figure 2(A)) may be relatively low.

[0025] In contrast, in the semiconductor device 100 shown in Figure 2(B), a nitride semiconductor layer 20 is grown on the Ga polar surface 10a of the GaN substrate 10. When the nitride semiconductor layer 20 is grown on the GaN substrate 10, which is made of the same material, the same thing happens as described above for Figure 1(B). That is, the GaN substrate 10 has a relatively low dislocation density. The channel layer 21 of the nitride semiconductor layer 20 grown on the GaN substrate 10 is lattice-matched to the GaN substrate 10. Dislocations reflecting the dislocations of the GaN substrate 10 are formed in the grown channel layer 21. On the GaN substrate 10 with a low dislocation density, the channel layer 21 is grown with a low dislocation density. In the semiconductor device 100, the low dislocation density of the channel layer 21 suppresses electron scattering due to dislocations within the channel layer 21, and the electron mobility (schematically shown by the thick arrow AR1 in Figure 2(B)) becomes relatively high.

[0026] As described above, by using the GaN substrate 10 as the substrate for growing the nitride semiconductor layer 20, it becomes possible to grow a high-quality nitride semiconductor layer 20. Furthermore, by using the high-quality nitride semiconductor layer 20 grown in this way, it becomes possible to realize a high-performance semiconductor device 100.

[0027] However, when a GaN substrate 10 is used as the substrate for growing the nitride semiconductor layer 20, a phenomenon may occur during the growth process of the nitride semiconductor layer 20 that could lead to a degradation in the quality of the nitride semiconductor layer 20. This point will be explained with reference to Figure 3 below.

[0028] Figure 3 illustrates an example of a nitride semiconductor layer growth process on a GaN substrate. Figure 3(A) schematically shows a cross-sectional view of a key part of an example of a GaN substrate placement process. Figure 3(B) schematically shows a cross-sectional view of a key part of an example of a nitride semiconductor layer growth process. Figure 3(C) schematically shows a plan view of a key part of an example of a GaN substrate after the nitride semiconductor layer growth process.

[0029] For growing the nitride semiconductor layer 20 on the GaN substrate 10, for example, an MOCVD apparatus 200 as shown in Figures 3(A) and 3(B) is used. The MOCVD apparatus 200 comprises a chamber 210, a susceptor 220, and a heater 230. The susceptor 220 has a recess 221 on which the GaN substrate 10 is placed. The susceptor 220 may have a function to hold the GaN substrate 10 placed in the recess 221. The heater 230 is provided on the side of the susceptor 220 opposite to the side of the recess 221 on which the GaN substrate 10 is placed. The heater 230 functions as a heat source for heating the susceptor 220 and the GaN substrate 10 placed thereon. The susceptor 220 and the heater 230 are placed in a chamber 210 into which the raw material gas and carrier gas for the nitride semiconductor layer 20 can be introduced.

[0030] In growing the nitride semiconductor layer 20 onto the GaN substrate 10, first, as shown in Figure 3(A), the GaN substrate 10 is placed in the recess 221 of the susceptor 220 of the MOCVD apparatus 200. The GaN substrate 10 is positioned so that its N polarity surface 10b faces the bottom 221a of the recess 221 of the susceptor 220 and faces the heater 230 via the susceptor 220. Thus, the Ga polarity surface 10a of the GaN substrate 10 faces the side opposite to the bottom 221a of the recess 221 of the susceptor 220 and the side of the heater 230.

[0031] After the GaN substrate 10 is placed on the susceptor 220, the GaN substrate 10 is heated using the heater 230 (indicated by the thick arrow AR2 in Figure 3(B)), as shown in Figure 3(B). During this process, the susceptor 220 is heated by the heater 230, and the GaN substrate 10 is heated by the heated susceptor 220. The GaN substrate 10 is heated mainly from the N polarity side 10b.

[0032] As shown in Figure 3(B), a raw material gas and a carrier gas for the nitride semiconductor layer 20 are introduced into the chamber 210, which houses the GaN substrate 10 heated by the heater 230. The raw material gas for the nitride semiconductor layer 20 includes NH3 (ammonia) as the N source and Group III element raw materials. As Group III element raw materials, trimethylgallium (TMGa) is used as the Ga source. Trimethylaluminum (TMAl) is used as the Al source. Trimethylindium (TMIn) is used as the In (indium) source. In addition, at least one of H2 (hydrogen) and N2 (nitrogen), preferably H2 or a gas containing H2, is used as the carrier gas.

[0033] Depending on the type of nitride semiconductor being grown in the nitride semiconductor layer 20 (for example, the channel layer 21, spacer layer 22, and barrier layer 23), the supply and cessation (switching) of each of the group III element raw materials, TMGa, TMAl, and TMIn, and the flow rate during supply (mixing ratio with other raw materials) are appropriately set. The pressure inside the chamber 210 during growth is set in the range of approximately 1 kPa to 100 kPa. The temperature of the growth surface of the nitride semiconductor layer 20 on the GaN substrate 10 is set in the range of approximately 600°C to 1500°C, preferably in the range of 950°C or higher.

[0034] A nitride semiconductor layer 20 is grown on the Ga polar surface 10a of the GaN substrate 10 by the growth process shown in Figures 3(A) and 3(B). In the above growth process of the nitride semiconductor layer 20, the GaN substrate 10 is heated from the N polarity side 10b by the heater 230 (and the susceptor 220 heated by it) of the MOCVD apparatus 200. The Ga polarity side 10a of the GaN substrate 10, which is heated from the N polarity side 10b, is raised to the growth temperature of the nitride semiconductor layer 20, and the nitride semiconductor layer 20 is grown on the Ga polarity side 10a. At this time, the N polarity side 10b of the GaN substrate 10, which is heated by the heater 230, becomes hotter than the Ga polarity side 10a where the nitride semiconductor layer 20 is grown.

[0035] Furthermore, in the above growth process of the nitride semiconductor layer 20, the chamber 210 of the MOCVD apparatus 200 may become a hydrogen-containing atmosphere containing hydrogen components such as H2 used as a carrier gas, NH3 as an N source, and H (hydrogen) produced by the decomposition of Group III element raw materials. It can also be said that the growth of the nitride semiconductor layer 20 using the MOCVD method can be carried out in a hydrogen-containing atmosphere containing at least hydrogen and NH3. The GaN substrate 10 has the property that N, one of the constituent elements of GaN, is easily desorbed in a high-temperature hydrogen-containing atmosphere.

[0036] Therefore, in the GaN substrate 10, nitrogen is more easily desorbed on the N polar surface 10b side, which is heated by the heater 230 and becomes hotter than the Ga polar surface 10a side where the nitride semiconductor layer 20 is grown. When nitrogen is desorbed on the N polar surface 10b side of the GaN substrate 10, droplets of Ga, another constituent element of GaN, are generated, and a phenomenon occurs in which the N polar surface 10b side of the GaN substrate 10 melts. For example, as shown in Figure 3(C), a melted portion 11 is formed on the N polar surface 10b side of the GaN substrate 10. Note that the shape and size of the melted portion 11 are not limited to those shown in Figure 3(C).

[0037] When the nitride semiconductor layer 20 is grown, the N polarity side 10b of the GaN substrate 10 melts, forming a molten portion 11. This creates a difference in thermal conductivity between the liquid molten portion 11 and the unmelted solid portion 12. As a result, the temperature distribution within the GaN substrate 10, which is heated from the N polarity side 10b by the heater 230, becomes disturbed, potentially worsening the uniformity of the temperature distribution within the growth plane on the Ga polarity side 10a where the nitride semiconductor layer 20 is grown. Consequently, within the nitride semiconductor layer 20 grown on the Ga polarity side 10a of the GaN substrate 10, areas grown at different growth temperatures may occur, potentially resulting in areas with differences in quality, such as crystal structure and composition.

[0038] If such variations in quality occur within the nitride semiconductor layer 20, it may lead to a decrease in the performance and quality of semiconductor devices 100 manufactured using the nitride semiconductor layer 20. For example, among multiple semiconductor devices 100 manufactured from a single nitride semiconductor layer 20 (wafer state), there may be variations in performance and quality, potentially resulting in some failing to meet specifications. This can lead to a decrease in the yield of semiconductor devices 100.

[0039] Furthermore, the location of the molten portion 11 formed on the GaN substrate 10 may change with each growth operation using the MOCVD apparatus 200. As a result, the location of areas with varying quality within the nitride semiconductor layer 20 may also change. Consequently, it may become impossible to grow a high-quality nitride semiconductor layer 20 with good reproducibility, and even more so, to manufacture high-performance and high-quality semiconductor devices 100, etc., using the nitride semiconductor layer 20 with good reproducibility and yield.

[0040] It is known that when growing a nitride semiconductor layer 20, the concentration of impurities such as C (carbon) tends to increase if the growth temperature is below a certain temperature. To suppress the increase in the concentration of impurities such as C, it is preferable to set the growth temperature of the nitride semiconductor layer 20 to a relatively high temperature, for example, to set the temperature of the growth surface to a high temperature of 950°C or higher. However, in order to raise the growth temperature of the nitride semiconductor layer 20 to a high temperature, it is necessary to raise the Ga polar surface 10a side of the GaN substrate 10 on which the nitride semiconductor layer 20 is grown to a high temperature. In order to raise the Ga polar surface 10a side of the GaN substrate 10 to a high temperature, it is necessary to raise the N polar surface 10b side, which is heated by the heater 230, to an even higher temperature. Consequently, N desorption on the N polar surface 10b side of the GaN substrate 10 and melting due to the generation of Ga droplets caused by this become even more likely to occur.

[0041] The higher the growth temperature of the nitride semiconductor layer 20, the more likely it is that the uniformity of the temperature distribution within the growth plane on the Ga polar surface 10a side of the GaN substrate 10 will deteriorate, and the quality of the nitride semiconductor layer 20 will decrease as a result. The decrease in the quality of the nitride semiconductor layer 20 makes it more likely that the quality reproducibility of the nitride semiconductor layer 20 will decrease, and the reproducibility and yield of semiconductor devices 100 etc. manufactured using the nitride semiconductor layer 20 will decrease.

[0042] In view of the above points, a configuration as shown below as an embodiment is adopted to form a high-quality nitride semiconductor layer 20 on the GaN substrate 10. [First Embodiment] Figure 4 illustrates an example of a substrate according to the first embodiment. Figure 4(A) schematically shows a cross-sectional view of the main part of an example of a GaN substrate. Figure 4(B) schematically shows a cross-sectional view of the main part of an example of a substrate including a GaN substrate and an amorphous layer provided thereon.

[0043] As shown in Figure 4(A), the GaN substrate 10 has an N polarity surface 10b ((000-1) surface) and a Ga polarity surface 10a ((0001) surface) opposite to the N polarity surface 10b. For example, a GaN freestanding substrate is used for the GaN substrate 10. The N polarity surface 10b of the GaN substrate 10 is the surface that is heated during the growth of the nitride semiconductor layer 20 using the MOCVD method described later. The Ga polarity surface 10a of the GaN substrate 10 is the surface on which the nitride semiconductor layer 20 is grown during the growth of the nitride semiconductor layer 20 using the MOCVD method described later. The substrate 1 shown in Figure 4(B) has a configuration in which an amorphous layer 60 is provided on the N polarity surface 10b side of such a GaN substrate 10.

[0044] The amorphous layer 60 is an amorphous layer that does not have crystalline properties. Amorphous AlN or amorphous AlGaN is used for the amorphous layer 60. That is, the amorphous layer 60 is made of AlN with the general formula Al x Ga 1-xAn amorphous nitride semiconductor represented by N(0 < x ≤ 1) is used. The amorphous layer 60 is formed, for example, on the N-polarity surface 10b side of the GaN substrate 10 using the MOCVD method. In addition to the MOCVD method, the sputtering method or the atomic layer deposition (ALD) method can also be used to form the amorphous layer 60.

[0045] When the N-polarity surface 10b side of the GaN substrate 10 is heated and the nitride semiconductor layer 20 is grown on the Ga-polarity surface 10a side, the amorphous layer 60 covers the heated N-polarity surface 10b side and protects the N-polarity surface 10b side. By using the substrate 1 provided with the amorphous layer 60 on the N-polarity surface 10b side of the GaN substrate 10 as shown in Fig. 4(B), a high-quality nitride semiconductor layer 20 can be grown on the Ga-polarity surface 10a side.

[0046] Here, the growth of the nitride semiconductor layer 20 using the substrate 1 will be described. Fig. 5 is a diagram for explaining an example of the growth process of the nitride semiconductor layer on the substrate according to the first embodiment. Fig. 5(A) schematically shows a cross-sectional view of the main part of an example of the substrate arrangement process. Fig. 5(B) schematically shows a cross-sectional view of the main part of an example of the nitride semiconductor layer growth process. Fig. 5(C) schematically shows a plan view of the main part of an example of the substrate after the nitride semiconductor layer growth process.

[0047] For the growth of the nitride semiconductor layer 20 on the substrate 1, for example, an MOCVD apparatus 200 including a chamber 210, a susceptor 220, and a heater 230 as shown in Fig. 5(A) and Fig. 5(B) is used. The susceptor 22 has a recess 221 in which the substrate 1 is placed. The susceptor 220 may have a function of holding the substrate 1 placed in the recess 221. The heater 230 is provided on the side of the susceptor 220 opposite to the side where the recess 221 in which the substrate 1 is placed is located. The heater 230 functions as a heat source for heating the susceptor 220 and the substrate 1 placed thereon. The susceptor 220 and the heater 230 are arranged in the chamber 210 into which the source gas and the carrier gas of the nitride semiconductor layer 20 can be introduced.

[0048] In growing the nitride semiconductor layer 20 onto the substrate 1, first, as shown in Figure 5(A), the substrate 1 is placed in the recess 221 of the susceptor 220 of the MOCVD apparatus 200. The substrate 1 is positioned such that the amorphous layer 60 provided on the N polarity surface 10b side of the GaN substrate 10 faces the bottom 221a of the recess 221 of the susceptor 220, and faces the heater 230 via the susceptor 220. Thus, the Ga polarity surface 10a of the GaN substrate 10 faces away from the bottom 221a of the recess 221 of the susceptor 220 and the side of the heater 230.

[0049] After the substrate 1 is placed on the susceptor 220, the substrate 1 is heated using the heater 230 (indicated by the thick arrow AR3 in Figure 5(B)), as shown in Figure 5(B). During this process, the susceptor 220 is heated by the heater 230, and the substrate 1 is heated by the heated susceptor 220. The substrate 1 is heated primarily from the side of the amorphous layer 60 provided on the N polarity surface 10b of the GaN substrate 10.

[0050] As shown in Figure 5(B), a raw material gas and a carrier gas for the nitride semiconductor layer 20 are introduced into the chamber 210, which houses the substrate 1 heated by the heater 230. The raw material gas for the nitride semiconductor layer 20 includes NH3 as the N source and at least one of the group III element raw materials TMGa, TMAl, and TMIn. At least one of H2 and N2, preferably H2 or a gas containing H2, is used as the carrier gas. Depending on the type of nitride semiconductor layer 20 to be grown, the supply and cessation (switching) of each of the group III element raw materials TMGa, TMAl, and TMIn, and the flow rate during supply (mixing ratio with other raw materials) are appropriately set. The pressure inside the chamber 210 during growth is set in the range of about 1 kPa to about 100 kPa. The temperature of the growth surface of the nitride semiconductor layer 20 on the GaN substrate 10 is set in the range of about 600°C to about 1500°C, preferably in the range of 950°C or higher.

[0051] As shown in Figures 5(A) and 5(B), a nitride semiconductor layer 20 is grown and formed on the Ga polar surface 10a of the GaN substrate 10 of the substrate 1 through the growth process. In the above growth process of the nitride semiconductor layer 20, the substrate 1 is heated from the amorphous layer 60 side by the heater 230 (and the susceptor 220 heated by it) of the MOCVD apparatus 200. The Ga polar surface 10a side of the GaN substrate 10, which is heated from the amorphous layer 60 side of the substrate 1, is raised to the growth temperature of the nitride semiconductor layer 20, and the nitride semiconductor layer 20 is grown on the Ga polar surface 10a side. At this time, the amorphous layer 60 side heated by the heater 230 becomes hotter than the Ga polar surface 10a side of the GaN substrate 10 where the nitride semiconductor layer 20 is grown. Furthermore, in the above growth process of the nitride semiconductor layer 20, the chamber 210 of the MOCVD apparatus 200 may become a hydrogen-containing atmosphere containing hydrogen components such as H2 used as a carrier gas, NH3 from the N source, and H generated by the decomposition of Group III element raw materials. It can also be said that the growth of the nitride semiconductor layer 20 using the MOCVD method can be carried out in a hydrogen-containing atmosphere containing at least hydrogen and NH3.

[0052] Amorphous AlN or amorphous AlGaN is used for the amorphous layer 60 of the substrate 1. The amorphous layer 60 using such materials is relatively stable even in a hydrogen-containing atmosphere where the growth temperature of the nitride semiconductor layer 20 grown on the Ga polar surface 10a side of the GaN substrate 10 is relatively high. For example, even in a hydrogen-containing atmosphere where the temperature of the growth surface of the nitride semiconductor layer 20 grown on the Ga polar surface 10a side is high, such as 950°C or higher, which suppresses the incorporation of impurities such as C into the nitride semiconductor layer 20, it remains relatively stable. Therefore, when the nitride semiconductor layer 20 is grown, even if the GaN substrate 10 is exposed to a high-temperature hydrogen-containing atmosphere such as 950°C or higher, the relatively stable amorphous layer 60 covers it, suppressing N desorption on its N polar surface 10b side and the resulting melting due to the generation of Ga droplets. As shown in Figure 5(C), in a GaN substrate 10 in which the N polarity surface 10b side is covered with an amorphous layer 60 and a nitride semiconductor layer 20 is grown on the Ga polarity surface 10a side, no melting is observed on the N polarity surface 10b side or the amorphous layer 60.

[0053] By suppressing the melting of the GaN substrate 10 when heated from the amorphous layer 60 and the N polar surface 10b side, the formation of areas with different thermal conductivity within the GaN substrate 10 due to the formation of molten and non-molten areas is suppressed, and the disturbance of the temperature distribution within the GaN substrate 10 is suppressed. As a result, the deterioration of the uniformity of the temperature distribution within the growth plane on the Ga polar surface 10a side where the nitride semiconductor layer 20 is grown is suppressed. Therefore, the deterioration of the quality of the nitride semiconductor layer 20, such as its crystal structure and composition, caused by the deterioration of the uniformity of the temperature distribution within the growth plane is suppressed.

[0054] Furthermore, amorphous AlN or amorphous AlGaN used in the amorphous layer 60 has a relatively small difference in thermal expansion coefficient compared to GaN. Therefore, even when the GaN substrate 10 is heated and cooled during the growth process of the nitride semiconductor layer 20, warping of the GaN substrate 10 due to the difference in thermal expansion coefficient with the amorphous layer 60 is suppressed. As a result, the generation of internal stress in the GaN substrate 10 and the nitride semiconductor layer 20 grown thereon is suppressed, and the generation of cracks in the GaN substrate 10 and the nitride semiconductor layer 20 thereon due to internal stress is suppressed. Moreover, even when a pattern is formed on the nitride semiconductor layer 20 after growth using photolithography technology, pattern formation defects due to focus misalignment caused by warping of the GaN substrate 10 and the nitride semiconductor layer 20 thereon are suppressed.

[0055] By using the substrate 1 described above, that is, a substrate 1 in which an amorphous layer 60 is provided on the N polarity surface 10b side of the GaN substrate 10, it becomes possible to form a high-quality nitride semiconductor layer 20 on the Ga polarity surface 10a side of the GaN substrate 10.

[0056] [Second Embodiment] Here, as a second embodiment, an example of a semiconductor device manufacturing method, including the formation of a substrate 1 and a nitride semiconductor layer 20 using the same, and the formation of a HEMT using the nitride semiconductor layer 20, will be described with reference to Figures 6 and 7.

[0057] Figures 6 and 7 illustrate an example of a semiconductor device manufacturing method according to the second embodiment. Figure 6(A) schematically shows a cross-sectional view of the main part of an example of an amorphous layer formation process. Figure 6(B) schematically shows a cross-sectional view of the main part of an example of a nitride semiconductor layer growth process. Figure 6(C) schematically shows a cross-sectional view of the main part of an example of a substrate after the nitride semiconductor layer growth process. Figure 7(A) schematically shows a cross-sectional view of the main part of an example of an electrode formation process. Figure 7(B) schematically shows a cross-sectional view of the main part of an example of a substrate polishing process. Figure 7(C) schematically shows a cross-sectional view of the main part of an example of a piece formation process.

[0058] First, as shown in Figure 6(A), an amorphous layer 60 is formed on the GaN substrate 10. Figure 6(A) shows, as an example, the formation of the amorphous layer 60 using the MOCVD method. The GaN substrate 10 has an N polarity surface 10b ((000-1) surface) and a Ga polarity surface 10a ((0001) surface) opposite to the N polarity surface 10b. For example, a GaN freestanding substrate is used for the GaN substrate 10.

[0059] In the formation of the amorphous layer 60 using the MOCVD method, the GaN substrate 10 is placed on the susceptor 220 of the MOCVD apparatus 200. During the formation of the amorphous layer 60, the GaN substrate 10 is positioned so that its Ga polar surface 10a faces the bottom 221a of the recess 221 of the susceptor 220 and faces the heater 230 via the susceptor 220. Therefore, the N polar surface 10b of the GaN substrate 10 faces the side opposite to the bottom 221a of the recess 221 of the susceptor 220 and the side of the heater 230.

[0060] After the GaN substrate 10 is placed on the susceptor 220, the GaN substrate 10 is heated using the heater 230 (shown by the thick arrow AR4 in Figure 6(A)). During this process, the susceptor 220 is heated by the heater 230, and the GaN substrate 10 is heated by the heated susceptor 220. When forming the amorphous layer 60, the GaN substrate 10 is heated mainly from the Ga polar surface 10a side.

[0061] An amorphous layer 60 is formed on the N polar surface 10b side of the GaN substrate 10, which is heated from the Ga polar surface 10a side using a heater 230. Amorphous AlN or amorphous AlGaN is formed as the amorphous layer 60. When forming the amorphous layer 60, as shown in Figure 6(A), a raw material gas and a carrier gas for the amorphous layer 60 are introduced into the chamber 210, which houses the GaN substrate 10 heated by the heater 230. The raw material gas for the amorphous layer 60 includes NH3, which is the N source, and a group III element raw material. When forming amorphous AlN as the amorphous layer 60, TMAl is used as the group III element raw material. When forming amorphous AlGaN as the amorphous layer 60, TMAl and TMGa are used as group III element raw materials. H2 or N2 is used as the carrier gas.

[0062] The pressure inside the chamber 210 is set to a range of approximately 1 kPa to 100 kPa. The temperature of the amorphous layer 60 formation surface of the GaN substrate 10 is set to a range such that the AlN or AlGaN nitride semiconductor used in the amorphous layer 60 is formed without crystallization. For example, if the AlN or AlGaN used in the amorphous layer 60 is formed under conditions where the amorphous layer 60 formation surface of the GaN substrate 10 exceeds 500°C, it is more likely to crystallize. If the AlN or AlGaN crystallizes and forms on the N polarity surface 10b of the GaN substrate 10, the GaN substrate 10 is more likely to warp. Warping of the GaN substrate 10 can lead to crack formation in the GaN substrate 10 and the nitride semiconductor layer 20 grown thereon, as well as defects in the pattern formed on the nitride semiconductor layer 20 after growth. Therefore, it is preferable to set the temperature of the amorphous layer 60 formation surface of the GaN substrate 10 to a range of 500°C or less.

[0063] The thickness of the amorphous layer 60 is set to, for example, about 200 nm. However, the thickness of the amorphous layer 60 can be set to various thicknesses as long as it is possible to suppress the melting of the GaN substrate 10 during the growth of the nitride semiconductor layer 20, which will be described later. Note that if the amorphous layer 60 is too thin, it may not be possible to suppress the melting of the GaN substrate 10 during the growth of the nitride semiconductor layer 20. Also note that if the amorphous layer 60 is too thick, it may be difficult to sufficiently transfer heat from the heater 230 to the GaN substrate 10 through the amorphous layer 60 during the growth of the nitride semiconductor layer 20.

[0064] As shown in Figure 6(A), an amorphous layer 60 is formed on the N polarity side 10b of the GaN substrate 10 through a process. This results in the formation of a substrate 1 with an amorphous layer 60 on the N polarity side 10b of the GaN substrate 10.

[0065] In this example, the amorphous layer 60 is formed using the MOCVD method. However, the amorphous layer 60 can also be formed using the sputtering method or the ALD method. For example, the sputtering method can be used to form amorphous AlN or amorphous AlGaN as the amorphous layer 60. For example, the ALD method can be used to form amorphous AlN or amorphous AlGaN as the amorphous layer 60.

[0066] After the formation of the amorphous layer 60, a nitride semiconductor layer 20 is grown and formed on the GaN substrate 10, as shown in Figure 6(B). The nitride semiconductor layer 20 is grown using the MOCVD method. In the growth of the nitride semiconductor layer 20 using the MOCVD method, a substrate 1, on which an amorphous layer 60 is provided on a GaN substrate 10, is placed on a susceptor 220 of the MOCVD apparatus 200. The substrate 1 is positioned so that its amorphous layer 60 faces the bottom 221a of the recess 221 of the susceptor 220 and faces the heater 230 via the susceptor 220. Thus, the Ga polar surface 10a of the GaN substrate 10 faces away from the bottom 221a of the recess 221 of the susceptor 220 and the side of the heater 230.

[0067] After the substrate 1 is placed on the susceptor 220, the substrate 1 is heated using the heater 230 (shown by the thick arrow AR5 in Figure 6(B)). During this process, the susceptor 220 is heated by the heater 230, and the substrate 1 is heated by the heated susceptor 220. The substrate 1 is heated primarily from the side of the amorphous layer 60 provided on the N polarity surface 10b of the GaN substrate 10.

[0068] As shown in Figure 6(B), a raw material gas and a carrier gas for the nitride semiconductor layer 20 are introduced into the chamber 210, which houses the substrate 1 heated by the heater 230. The raw material gas for the nitride semiconductor layer 20 includes NH3 as the N source and at least one of the group III element raw materials TMGa, TMAl, and TMIn. At least one of H2 and N2, preferably H2 or a gas containing H2, is used as the carrier gas. Depending on the type of nitride semiconductor layer 20 to be grown, the supply and cessation (switching) of each of the group III element raw materials TMGa, TMAl, and TMIn, and the flow rate during supply (mixing ratio with other raw materials) are appropriately set. The pressure inside the chamber 210 during growth is set in the range of about 1 kPa to about 100 kPa. The temperature of the growth surface of the nitride semiconductor layer 20 on the GaN substrate 10 is set in the range of about 600°C to about 1500°C, preferably in the range of 950°C or higher.

[0069] In this example, a channel layer 21, a spacer layer 22, and a barrier layer 23 are grown as a nitride semiconductor layer 20 to realize a HEMT. The channel layer 21, spacer layer 22, and barrier layer 23 are grown sequentially on the Ga polar surface 10a of the GaN substrate 10 using the MOCVD method. Specifically, the channel layer 21 is grown on the Ga polar surface 10a side of the GaN substrate 10. The spacer layer 22 is grown on the side of the channel layer 21 opposite to the GaN substrate 10 side. The barrier layer 23 is grown on the side of the spacer layer 22 opposite to the channel layer 21 and the GaN substrate 10 side.

[0070] A predetermined nitride semiconductor is used for the channel layer 21, spacer layer 22, and barrier layer 23. For example, GaN is used for the channel layer 21. For example, AlN is used for the spacer layer 22. For example, InAlGaN, AlGaN, AlN, etc., are used for the barrier layer 23. Nitride semiconductors with a larger band gap than the nitride semiconductor used for the channel layer 21 are used for the barrier layer 23 and spacer layer 22. Due to the spontaneous polarization of the barrier layer 23 and spacer layer 22, and the piezoelectric polarization generated in the barrier layer 23 and spacer layer 22 due to the strain caused by the difference in lattice constants with the channel layer 21, 2DEG101 is generated in the channel layer 21.

[0071] Furthermore, among the nitride semiconductor layers 20, the channel layer 21 is also called the "first nitride semiconductor layer," and the spacer layer 22 or barrier layer 23, or both, which have a different band gap from the channel layer 21, are also called the "second nitride semiconductor layer."

[0072] As shown in Figure 6(B), a nitride semiconductor layer 20, including a channel layer 21, a spacer layer 22, and a barrier layer 23, is grown on the Ga polar surface 10a of the GaN substrate 1 of the substrate 1.

[0073] In the above growth process of the nitride semiconductor layer 20, the substrate 1 is heated from the amorphous layer 60 side by the heater 230 (and the susceptor 220 heated by it) of the MOCVD apparatus 200. The Ga polar surface 10a side of the GaN substrate 10, which is heated from the amorphous layer 60 side of the substrate 1, is raised to the growth temperature of each layer of the nitride semiconductor layer 20: the channel layer 21, the spacer layer 22, and the barrier layer 23, and these layers are grown on the Ga polar surface 10a side. At this time, the amorphous layer 60 side of the substrate 1, which is heated by the heater 230, becomes hotter than the Ga polar surface 10a side of the GaN substrate 10 where the nitride semiconductor layer 20 is grown. Furthermore, in the above growth process of the nitride semiconductor layer 20, the chamber 210 of the MOCVD apparatus 200 may become a hydrogen-containing atmosphere containing hydrogen components such as H2 used as a carrier gas, NH3 from the N source, and H generated by the decomposition of Group III element raw materials. It can also be said that the growth of the nitride semiconductor layer 20 using the MOCVD method can be carried out in a hydrogen-containing atmosphere containing at least hydrogen and NH3.

[0074] In substrate 1, an amorphous layer 60 made of amorphous AlN or amorphous AlGaN, which is relatively stable even in a hydrogen-containing atmosphere where the growth temperature of the nitride semiconductor layer 20 is relatively high, is provided on the N polarity surface 10b side of the GaN substrate 10. The GaN substrate 10 is heated from the side of the amorphous layer 60 provided on the N polarity surface 10b side, and the channel layer 21, spacer layer 22, and barrier layer 23 of the nitride semiconductor layer 20 are grown sequentially on the Ga polarity surface 10a side. Therefore, even when the GaN substrate 10 is exposed to a hydrogen-containing atmosphere at a high temperature of 950°C or higher, which suppresses the incorporation of impurities such as C, melting due to N desorption on the N polarity surface 10b side and the resulting generation of Ga droplets is suppressed because it is covered with a relatively stable amorphous layer 60. Thus, the formation of molten and non-molten areas within the GaN substrate 10 is suppressed, and the disturbance of the temperature distribution within the GaN substrate 10 is suppressed. This suppresses the deterioration of the uniformity of the temperature distribution within the growth plane on the Ga polar surface 10a side when each layer of the nitride semiconductor layer 20, the channel layer 21, the spacer layer 22, and the barrier layer 23, is grown sequentially, and the resulting deterioration of the quality of the nitride semiconductor layer 20, such as its crystal structure and composition.

[0075] Furthermore, the amorphous layer 60, which uses amorphous AlN or amorphous AlGaN, has a relatively small difference in thermal expansion coefficient with the GaN substrate 10. Therefore, even when the GaN substrate 10 is heated and cooled during the growth process of the nitride semiconductor layer 20, warping of the GaN substrate 10 is suppressed. As a result, the generation of internal stress in the GaN substrate 10 and the nitride semiconductor layer 20 grown thereon is suppressed, and the generation of cracks caused by internal stress is suppressed.

[0076] The substrate 1 on which the nitride semiconductor layer 20 has been grown is removed from the MOCVD apparatus 200. Through the growth process shown in Figure 6(B), a substrate 1a is formed as shown in Figure 6(C), that is, a substrate 1a in which an amorphous layer 60 is provided on the N polarity surface 10b side of the GaN substrate 10 and a nitride semiconductor layer 20 is provided on the Ga polarity surface 10a side.

[0077] After the substrate 1a is formed, an inter-element isolation region (not shown) is formed on the substrate 1a. Then, as shown in Figure 7(A), the gate electrode 30, source electrode 40, and drain electrode 50 are formed on the substrate 1a. For example, on the substrate 1a, a laminate of metals for the source electrode 40 and drain electrode 50, such as Ta and Al, is formed using photolithography, vapor deposition, and lift-off techniques. Then, ohmic contacts of the metals are established by heat treatment. This forms the source electrode 40 and drain electrode 50 which function as ohmic electrodes. Furthermore, on the substrate 1a, a laminate of metals for the gate electrode 30, such as Ni and Au, is formed using photolithography, vapor deposition, and lift-off techniques. This forms the gate electrode 30 which functions as a Schottky electrode. In this way, the electrodes of the gate electrode 30, source electrode 40, and drain electrode 50 that are connected to the nitride semiconductor layer 20 of the substrate 1a are formed.

[0078] Furthermore, if ohmic contacts are established by the formation of metals for the source electrode 40 and the drain electrode 50, the heat treatment after the formation of these metals can be omitted. Alternatively, heat treatment can be performed after the formation of the metal for the gate electrode 30.

[0079] In substrate 1a, the amorphous layer 60, which uses amorphous AlN or amorphous AlGaN, has a relatively small difference in thermal expansion coefficient from the GaN substrate 10. Therefore, even when the GaN substrate 10 is heated or cooled, warping of the GaN substrate 10 is suppressed. Consequently, when forming the gate electrode 30, source electrode 40, and drain electrode 50 on substrate 1a as shown in Figure 7(A), even when using photolithography to form the pattern, pattern formation defects due to focus misalignment are suppressed. As a result, the gate electrode 30, source electrode 40, and drain electrode 50 are formed accurately in a predetermined area on substrate 1a.

[0080] Furthermore, the source electrode 40 and the drain electrode 50 may be formed in recesses provided in the substrate 1a. The source electrode 40 and the drain electrode 50 may be formed on a contact layer (regrowth layer) of n-type GaN or the like formed in the recesses provided in the substrate 1a. In addition, a passivation film of SiN (silicon nitride) or the like may be formed on the substrate 1a before the formation of the gate electrode 30. In this case, an opening leading to the substrate 1a is formed in the passivation film, and the gate electrode 30 is formed at the position of that opening. Furthermore, the gate electrode 30, the source electrode 40, and the drain electrode 50 may each have a comb-like shape with multiple fingers. In addition, after the formation of the gate electrode 30, the source electrode 40, and the drain electrode 50, wiring connected to them, an interlayer insulating film covering them, etc., may be formed.

[0081] After the gate electrode 30, source electrode 40, and drain electrode 50 are formed on the substrate 1a, as shown in Figure 7(B), the amorphous layer 60 and a portion of the N polar surface 10b side of the GaN substrate 10 on which it is provided are removed. For example, the substrate 1a on which the gate electrode 30, source electrode 40, and drain electrode 50 are formed is polished (also called "backgrinding") from the amorphous layer 60 side, and a portion of the amorphous layer 60 and the GaN substrate 10 is removed. This thins the substrate 1a. On the GaN substrate 10 of the substrate 1a, a backgrinded surface 10c is formed on the side opposite to the Ga polar surface 10a.

[0082] After backgrinding of the substrate 1a, dicing is performed at predetermined locations on the substrate 1a, as shown in Figure 7(C). This separates the substrate 1a, on which the gate electrode 30, source electrode 40, drain electrode 50, etc., are formed, yielding individual semiconductor devices 100a.

[0083] A semiconductor device 100a equipped with a HEMT is manufactured by the process shown in Figures 6(A) to 6(C) and Figures 7(A) to 7(C). Furthermore, in the manufacturing of the semiconductor device 100a, the gate electrode 30, source electrode 40, and drain electrode 50 can be formed after backgrinding the substrate 1a (Figure 7(B)). Also, after backgrinding the substrate 1a (Figure 7(B)), another layer having conductivity or thermal conductivity, such as a metal layer, semiconductor layer, or diamond layer, can be formed on the surface 10c of the GaN substrate 10 that was exposed as a result. Alternatively, after forming the gate electrode 30, source electrode 40, and drain electrode 50 (Figure 7(A)), the substrate 1a can be diced into individual pieces (Figure 7(C)) without backgrinding (Figure 7(B)). In this case, the semiconductor device 100a will have the amorphous layer 60 provided on the GaN substrate 10 remaining. In addition to semiconductor devices 100a that have been diced into individual pieces (Figure 7(C)), a substrate 1a that has had a gate electrode 30, a source electrode 40, and a drain electrode 50 formed (Figure 7(A)), before being diced into individual pieces, may also be referred to as a "semiconductor device."

[0084] As described above, by using a substrate 1 in which an amorphous layer 60 is provided on the N polarity surface 10b side of the GaN substrate 10, a high-quality nitride semiconductor layer 20 including a channel layer 21, a spacer layer 22, and a barrier layer 23 is grown and formed on the Ga polarity surface 10a side of the GaN substrate 10. Furthermore, a substrate 1a in which such a high-quality nitride semiconductor layer 20 is formed on the GaN substrate 10 provided with the amorphous layer 60 is realized. Moreover, a high-performance and high-quality semiconductor device 100a, etc., using the nitride semiconductor layer 20 can be realized using a substrate 1a in which such a high-quality nitride semiconductor layer 20 is formed.

[0085] [Third Embodiment] In the second embodiment described above, the manufacturing of a semiconductor device 100a equipped with a HEMT having a Schottky gate structure was used as an example of a metal-semiconductor junction FET (MET). By using a substrate 1 in which an amorphous layer 60 is provided on the N polarity surface 10b side of the GaN substrate 10 as described above, various types of semiconductor devices can be manufactured. For example, various nitride semiconductor layers and electrodes for realizing a HEMT can be formed on the substrate 1 equipped with the amorphous layer 60 to obtain various semiconductor devices equipped with a HEMT. Alternatively, various nitride semiconductor layers and electrodes for realizing a diode can be formed on the substrate 1 equipped with the amorphous layer 60 to obtain various semiconductor devices equipped with a diode. Here, as a third embodiment, some configuration examples of various semiconductor devices that can be obtained using the substrate 1 equipped with the amorphous layer 60 will be described with reference to Figures 8 and 9.

[0086] Figure 8 illustrates an example configuration of a semiconductor device equipped with a HEMT according to the third embodiment. Figure 8(A) schematically shows a cross-sectional view of the main part of the first example of a semiconductor device equipped with a HEMT. Figure 8(B) schematically shows a cross-sectional view of the main part of the second example of a semiconductor device equipped with a HEMT.

[0087] Figure 8(A) shows a semiconductor device 100b equipped with a HEMT having an MIS (Metal Insulator Semiconductor) type gate structure. Similar to the semiconductor device 100, the semiconductor device 100b includes a GaN substrate 10 and a nitride semiconductor layer 20 grown on its Ga polar surface 10a. A channel layer 21, a spacer layer 22, and a barrier layer 23 are grown sequentially on the Ga polar surface 10a of the GaN substrate 10 as the nitride semiconductor layer 20. Electrodes, a gate electrode 30, a source electrode 40, and a drain electrode 50, are provided on the nitride semiconductor layer 20, connected to the nitride semiconductor layer 20. In the semiconductor device 100b, the gate electrode 30 is provided on the nitride semiconductor layer 20 via a gate insulating film 70 made of an oxide film, a nitride film, an oxynitride film, etc. The source electrode 40 and the drain electrode 50 are provided on the nitride semiconductor layer 20 to function as ohmic electrodes. Following the example of the second embodiment described above, a semiconductor device 100b equipped with a HEMT can also be obtained by using a substrate 1 in which an amorphous layer 60 is provided on the N polar surface 10b side of the GaN substrate 10, as shown in Figure 8(A).

[0088] The semiconductor device 100c shown in Figure 8(B) differs from the semiconductor device 100b in that a gate electrode 30 is provided on a nitride semiconductor layer 20 via a cap layer 71 made of nitride semiconductor. The cap layer 71 is not limited to being directly beneath the gate electrode 30, but may also be provided so as to cover the barrier layer 23 between the source electrode 40 and the drain electrode 50. For example, a nitride semiconductor such as doped (p-type or n-type) or undoped GaN can be used for the cap layer 71. The cap layer 71 may also have a function to modulate the concentration of 2DEG101 in the channel layer 21 directly beneath the gate electrode 30. Following the example of the second embodiment described above, a semiconductor device 100c equipped with a HEMT as shown in Figure 8(B) can also be obtained by using a substrate 1 on which an amorphous layer 60 is provided on the N polarity surface 10b side of a GaN substrate 10.

[0089] Figure 9 is a diagram illustrating an example configuration of a semiconductor device equipped with a diode according to the third embodiment. Figure 9(A) schematically shows a cross-sectional view of the main part of the first example of a semiconductor device equipped with a diode. Figure 9(B) schematically shows a cross-sectional view of the main part of the second example of a semiconductor device equipped with a diode.

[0090] The semiconductor device 100d shown in Figure 9(A) is an example of a Schottky barrier diode (SBD). The semiconductor device 100d includes a GaN substrate 10 and a nitride semiconductor layer 20 grown on its Ga polar surface 10a. A channel layer 21, a spacer layer 22, and a barrier layer 23 are grown sequentially on the Ga polar surface 10a of the GaN substrate 10 as the nitride semiconductor layer 20. A cathode electrode 80 and an anode electrode 81 are formed on the nitride semiconductor layer 20, connected to the nitride semiconductor layer 20. The cathode electrode 80 is provided on the nitride semiconductor layer 20 to function as an ohmic electrode. The anode electrode 81 is provided on the nitride semiconductor layer 20 to function as a Schottky electrode. Following the example of the second embodiment described above, a semiconductor device 100d equipped with an SBD as shown in Figure 9(A) can also be obtained using a substrate 1 in which an amorphous layer 60 is provided on the N polar surface 10b side of the GaN substrate 10.

[0091] The semiconductor device 100e shown in Figure 9(B) is an example of a pn junction diode. The semiconductor device 100e includes a GaN substrate 10 and a nitride semiconductor layer 20b grown on its Ga polar surface 10a. The nitride semiconductor layer 20b includes a first layer 24 and a second layer 25, each made of nitride semiconductors with different conductivity types. For example, an n-type nitride semiconductor is used for the first layer 24 and a p-type nitride semiconductor is used for the second layer 25. The first layer 24 and the second layer 25 may each be a single-layer structure of one type of nitride semiconductor, or a stacked structure of one or more types of nitride semiconductors. The first layer 24 and the second layer 25 are grown sequentially as nitride semiconductor layers 20b on the Ga polar surface 10a of the GaN substrate 10. That is, the first layer 24 is grown on the Ga polar surface 10a side of the GaN substrate 10. The second layer 25 is grown on the side of the first layer 24 that is opposite to the GaN substrate 10 side.

[0092] A portion of the second layer 25 is removed. Electrodes are provided on the portion of the first layer 24 that is exposed when the second layer 25 is removed, and on the portion of the second layer 25 that remains on the first layer 24. For example, if the first layer 24 is an n-type nitride semiconductor and the second layer 25 is a p-type nitride semiconductor, a cathode electrode 80 is provided on the first layer 24 and an anode electrode 81 is provided on the second layer 25. For example, on the nitride semiconductor layer 20b including the first layer 24 and the second layer 25, electrodes such as the cathode electrode 80 and anode electrode 81, which are connected to the nitride semiconductor layer 20b, are formed. Following the example of the second embodiment described above, a semiconductor device 100e equipped with a pn junction diode as shown in Figure 9(B) can also be obtained using a substrate 1 in which an amorphous layer 60 is provided on the N polarity surface 10b side of the GaN substrate 10.

[0093] Furthermore, among the nitride semiconductor layers 20b, the first layer 24 is also called the "first nitride semiconductor layer," and the second layer 25, which has a different conductivity type from the first layer 24, is also called the "second nitride semiconductor layer." A substrate 1 having an amorphous layer 60 on the N polarity surface 10b side of the GaN substrate 10 can be used in the manufacture of various semiconductor devices, not limited to the semiconductor devices 100a, 100b, 100c, 100d, and 100e described above.

[0094] In the above description, an example was shown in which the amorphous layer 60 was formed on the N-polarity surface 10b side of the GaN substrate 10, and the nitride semiconductor layer 20 and the like were formed on the Ga-polarity surface 10a side. In addition, according to the above example, it is also possible to form the amorphous layer 60 on the Ga-polarity surface 10a side of the GaN substrate 10, and form the nitride semiconductor layer 20 and the like on the N-polarity surface 10b side.

[0095] Regarding the embodiments described above, the following additional remarks are further disclosed. (Supplementary Note 1) A step of forming an amorphous Al x Ga 1-x GaN containing N (0 < x ≤ 1) on the N-polarity surface side of the GaN substrate having an N-polarity surface and a Ga-polarity surface opposite to the N-polarity surface; A step of forming a nitride semiconductor layer on the Ga-polarity surface side of the GaN substrate on which the amorphous layer is formed on the N-polarity surface side; A method for manufacturing a semiconductor device, including:

[0096] (Supplementary Note 2) The method for manufacturing a semiconductor device according to Supplementary Note 1, wherein the step of forming the nitride semiconductor layer includes a step of forming the nitride semiconductor layer on the Ga-polarity surface side by using metalorganic chemical vapor deposition.

[0097] (Supplementary Note 3) The method for manufacturing a semiconductor device according to Supplementary Note 2, wherein the step of forming the nitride semiconductor layer includes a step of raising the temperature of the Ga-polarity surface side of the GaN substrate to 950 °C or higher in an atmosphere containing at least hydrogen and ammonia.

[0098] (Supplementary Note 4) The method for manufacturing a semiconductor device according to Supplementary Note 1, wherein the step of forming the nitride semiconductor layer includes: A step of disposing the GaN substrate in a metalorganic chemical vapor deposition apparatus such that the amorphous layer formed on the N-polarity surface side faces the heat source side of the metalorganic chemical vapor deposition apparatus; A step of forming the nitride semiconductor layer on the Ga-polarity surface side of the GaN substrate heated from the amorphous layer side by the heat source; Including:

[0099] (Note 5) The method for manufacturing a semiconductor device according to Note 1, wherein the step of forming the amorphous layer includes forming the amorphous layer on the N polarity side of the GaN substrate using one of the following methods: metal-organic chemical vapor deposition, sputtering, and atomic layer deposition.

[0100] (Note 6) The process of forming the nitride semiconductor layer is as follows: The process of forming a first nitride semiconductor layer on the Ga polar surface side of the GaN substrate, A step of forming a second nitride semiconductor layer having a different band gap from the first nitride semiconductor layer on the side of the first nitride semiconductor layer opposite to the GaN substrate side, A method for manufacturing a semiconductor device as described in Appendix 1, including the method described in Appendix 1.

[0101] (Note 7) The process of forming the nitride semiconductor layer is as follows: The process of forming a first nitride semiconductor layer on the Ga polar surface side of the GaN substrate, A step of forming a second nitride semiconductor layer having a different conductivity type from the first nitride semiconductor layer on the side of the first nitride semiconductor layer opposite to the GaN substrate side, A method for manufacturing a semiconductor device as described in Appendix 1, including the method described in Appendix 1.

[0102] (Note 8) The method for manufacturing a semiconductor device according to Note 1, further comprising the step of forming an electrode connected to the nitride semiconductor layer after the step of forming the nitride semiconductor layer. (Note 9) The method for manufacturing a semiconductor device according to Note 8, wherein the step of forming the electrodes includes the step of forming a gate electrode, a source electrode, and a drain electrode.

[0103] (Note 10) The method for manufacturing a semiconductor device according to Note 8, wherein the step of forming the electrodes includes the step of forming a cathode electrode and an anode electrode. (Note 11) The method for manufacturing a semiconductor device according to Note 1, further comprising the step of polishing the GaN substrate having the amorphous layer formed on the N polarity side from the amorphous layer side after the step of forming the nitride semiconductor layer, to remove the amorphous layer and a part of the GaN substrate.

[0104] (Appendix 12) A GaN substrate having an N-polarity surface and a Ga-polarity surface opposite to the N-polarity surface, an amorphous Al x Ga 1-x N (0 < x ≦ 1)-containing amorphous layer provided on the N-polarity surface side of the GaN substrate, a nitride semiconductor layer provided on the Ga-polarity surface side of the GaN substrate, a substrate including

[0105] (Appendix 13) The nitride semiconductor layer a first nitride semiconductor layer provided on the Ga-polarity surface side of the GaN substrate, a second nitride semiconductor layer provided on the surface side of the first nitride semiconductor layer opposite to the GaN substrate side and having a different bandgap from the first nitride semiconductor layer, the substrate according to Appendix 12 including

[0106] (Appendix 14) The nitride semiconductor layer a first nitride semiconductor layer provided on the Ga-polarity surface side of the GaN substrate, a second nitride semiconductor layer provided on the surface side of the first nitride semiconductor layer opposite to the GaN substrate side and having a different conductivity type from the first nitride semiconductor layer, the substrate according to Appendix 12 including

[0107] (Appendix 15) The substrate according to Appendix 12 further including an electrode connected to the nitride semiconductor layer.

Explanation of Reference Signs

[0108] Reference numeral 1, 1a represents a substrate Reference numeral 10 represents a GaN substrate Reference numeral 10a represents a Ga-polarity surface Reference numeral 10b represents an N-polarity surface Reference numerals 10c, 10Aa represent a surface Reference numeral 10A represents a SiC substrate Reference numeral 11 represents a melting part Reference numeral 12 represents a non-melting part Reference numerals 20, 20b represent a nitride semiconductor layer 20a GaN layer 21 channel layers 22 Spacer layer 23 Barrier layer 24 1st layer 25 2nd layer 30 Postal Codes 40 Source electrodes 50 Drain electrode 60 Amorphous layer 70 Gate Insulator 71 Cap layer 80 Cathode electrodes 81 Anode electrode 100, 100a, 100b, 100c, 100d, 100e, 100A Semiconductor devices 101 2DEG 110, 110a, 110b transpositions 200 MOCVD equipment 210 Chamber 220 Susceptor 221 Recess 221a bottom 230 Heater

Claims

1. A GaN substrate having an N polarity surface and a Ga polarity surface opposite to the N polarity surface, wherein amorphous Al is present on the N polarity surface side. ｘ Ga １－ｘ A step of forming an amorphous layer containing N (0 < x ≤ 1), A step of forming a nitride semiconductor layer on the Ga polar surface side of the GaN substrate on which the amorphous layer is formed on the N polar surface side, A method for manufacturing a semiconductor device, including the method described above.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the nitride semiconductor layer includes a step of forming the nitride semiconductor layer on the Ga polar surface side using a metal-organic chemical vapor deposition method.

3. The method for manufacturing a semiconductor device according to claim 2, wherein the step of forming the nitride semiconductor layer includes raising the temperature of the Ga polar surface side of the GaN substrate to 950°C or higher in an atmosphere containing at least hydrogen and ammonia.

4. The step of forming the nitride semiconductor layer is: The process of placing the GaN substrate in a metal-organic chemical vapor deposition apparatus such that the amorphous layer formed on the N polarity side faces the heat source side of the metal-organic chemical vapor deposition apparatus, A step of forming the nitride semiconductor layer on the Ga polar surface side of the GaN substrate, which is heated from the amorphous layer side by the heat source, A method for manufacturing a semiconductor device according to claim 1, including the method described in claim 1.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the amorphous layer includes forming the amorphous layer on the N polarity side of the GaN substrate using one of the following methods: metal-organic chemical vapor deposition, sputtering, and atomic layer deposition.

6. The step of forming the nitride semiconductor layer is: The process of forming a first nitride semiconductor layer on the Ga polar surface side of the GaN substrate, A step of forming a second nitride semiconductor layer having a different band gap from the first nitride semiconductor layer on the side of the first nitride semiconductor layer opposite to the GaN substrate side, A method for manufacturing a semiconductor device according to claim 1, including the method described in claim 1.

7. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of forming an electrode connected to the nitride semiconductor layer after the step of forming the nitride semiconductor layer.

8. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of, after the step of forming the nitride semiconductor layer, polishing the GaN substrate on which the amorphous layer is formed on the N polarity side from the amorphous layer side to remove the amorphous layer and a part of the GaN substrate.

9. A GaN substrate having an N polarity surface and a Ga polarity surface opposite to the N polarity surface, Amorphous Al is provided on the N polarity side of the GaN substrate. ｘ Ga １－ｘ An amorphous layer containing N (0 < x ≤ 1), A nitride semiconductor layer provided on the Ga polar surface side of the GaN substrate, A substrate, including a circuit board.

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