Multilayer ceramic electronic component, and method for manufacturing a multilayer ceramic electronic component.

Abstract

To provide a multilayer ceramic electronic component and a manufacturing method of the same, capable of achieving both good moisture resistance and good reliability.SOLUTION: A multilayer ceramic electronic component includes: a plurality of internal electrode layers 12 which are stacked to face each other; a plurality of dielectric layers 11 each of which is provided through each of the plurality of internal electrode layers 12 and has a perovskite structure that includes an A site and a B site and is expressed by a general formula of ABO3; and a pair of cover layers 13 which are respectively provided on an upper end and a lower end in a stacking direction of the plurality of internal electrode layers 12 in a capacity region 14 in which the plurality of internal electrode layers 12 face each other, and have as the main component the same element as that of the plurality of dielectric layers 11. The capacity region 14 has a first region 30 positioned at a center in the stacking direction and a pair of second regions 40 positioned outside the first region 30. An A / B ratio in the first region 30 is larger than that in the second region 40, and an A / B ratio in the cover layers 13 is larger than that in the first section 30.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing a multilayer ceramic electronic component.

Background Art

[0002] In a high-frequency communication system represented by a mobile phone, multilayer ceramic electronic components such as multilayer ceramic capacitors are used to remove noise.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] A multilayer ceramic electronic component includes a capacitance region having a capacitance, and a pair of cover layers that sandwich the capacitance region from above and below in the stacking direction. Since the amount of diffusion of the metal component from the internal electrode layer is small, the cover layer has a higher densification temperature than the capacitance region and may not be sufficiently densified compared to the capacitance region, resulting in a problem with moisture resistance. To promote the densification of the cover layer, a method of adding silicon or manganese to the cover layer (Patent Documents 1 and 2) can be mentioned. However, silicon or manganese may diffuse into the capacitance region, causing a decrease in dielectric constant and abnormal grain growth, which may reduce reliability. Therefore, it is preferable to make the cover layer and the capacitance region have a composition close to each other without adding an additive to the cover layer as much as possible.

[0005] Another method involves lowering the densification temperature of the cover layer by increasing the molar ratio of A-site elements to B-site elements (A / B ratio) in the cover layer compared to the volume region. However, in this case, the difference in A / B ratio can cause A-site elements to diffuse more easily from the cover layer to the volume region, potentially leading to abnormal grain growth in the volume region and reducing reliability.

[0006] This invention has been made in view of the above problems, and aims to provide a multilayer ceramic electronic component and a method for manufacturing the same that can achieve both good moisture resistance and good reliability. [Means for solving the problem]

[0007] The multilayer ceramic electronic component according to the present invention comprises a plurality of internal electrode layers stacked facing each other, a perovskite structure represented by the general formula ABO3 having A sites and B sites, a plurality of dielectric layers provided via the plurality of internal electrode layers, and a pair of cover layers provided above and below the stacking direction of the plurality of internal electrode layers in a capacitance region which is a region where the plurality of internal electrode layers face each other, and which are mainly composed of the same elements as the plurality of dielectric layers, wherein the capacitance region has a first region located in the center in the stacking direction and a pair of second regions located outside the first region, the A / B ratio in the first region is greater than the A / B ratio in the second region, and the A / B ratio in the cover layers is greater than the A / B ratio in the first region.

[0008] In the above-described multilayer ceramic electronic component, the A / B ratio in the first region may be 0.98 or less.

[0009] In the above-described multilayer ceramic electronic component, the A / B ratio in the first region may be 0.97 or greater.

[0010] In the above-described multilayer ceramic electronic component, the A / B ratio of the pair of cover layers may be 1.005 or more and 1.010 or less.

[0011] In the above-described multilayer ceramic electronic component, the A / B ratio in the pair of second regions may be 0.96 or less.

[0012] In the above-described multilayer ceramic electronic component, the A / B ratio in the pair of second regions may be 0.95 or greater.

[0013] In the above-described multilayer ceramic electronic component, the thickness of each of the pair of second regions in the direction in which the plurality of internal electrode layers face each other may be 5 μm or less.

[0014] In the above-described multilayer ceramic electronic component, the plurality of dielectric layers and the pair of cover layers may have barium titanate as the main component.

[0015] A method for manufacturing a multilayer ceramic electronic component according to the present invention includes the steps of: preparing a plurality of first ceramic green sheets containing a ceramic having a perovskite structure represented by the general formula ABO3 having A sites and B sites; preparing a plurality of second ceramic green sheets containing the ceramic and having a smaller A / B ratio than the plurality of first ceramic green sheets; preparing a pair of third ceramic green sheets containing the ceramic and having a larger A / B ratio than the plurality of first ceramic green sheets; forming an internal electrode pattern on the plurality of first ceramic green sheets; laminating the plurality of first ceramic green sheets on which the internal electrode pattern is formed; laminating the plurality of second ceramic green sheets onto the laminated plurality of first ceramic green sheets; laminating the pair of third ceramic green sheets onto the laminated plurality of second ceramic green sheets to obtain a laminate; and firing the laminate.

[0016] The above-described method for manufacturing multilayer ceramic electronic components may include the step of forming an internal electrode pattern on the plurality of second ceramic green sheets. [Effects of the Invention]

[0017] According to the present invention, it is possible to provide a multilayer ceramic electronic component and a method for manufacturing the same that can achieve both good moisture resistance and good reliability.

Brief Description of the Drawings

[0018] [Figure 1] It is a partial cross-sectional perspective view of a multilayer ceramic capacitor. [Figure 2] It is a cross-sectional view taken along line A-A of FIG. 1. [Figure 3] It is a cross-sectional view taken along line B-B of FIG. 1. [Figure 4] It is a diagram for explaining each part of the capacitance region. [[ID=十九]] [Figure 5] It is a diagram illustrating the flow of a method for manufacturing a multilayer ceramic capacitor. [Figure 6] (a) is a diagram illustrating an internal electrode forming step, and (b) is a diagram illustrating a crimping step. [Figure 7] (a) and (b) are diagrams illustrating a side margin forming step.

Mode for Carrying Out the Invention

[0019] Hereinafter, embodiments will be described with reference to the drawings.

[0020] (Embodiment) FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1; FIG. 3 is a cross-sectional view taken along line B-B of FIG. 1. As illustrated in FIGS. 1 to 3, the multilayer ceramic capacitor 100 includes a body 10 having a substantially rectangular parallelepiped shape, and external electrodes 20a and 20b provided on two opposing end faces of the body 10. Of the four surfaces of the body 10 other than the two end faces, the two surfaces other than the upper and lower surfaces in the stacking direction are referred to as side surfaces; the external electrodes 20a and 20b extend to the upper surface, lower surface, and two side surfaces of the body 10 in the stacking direction. However, the external electrodes 20a and 20b are spaced apart from each other.

[0021] In Figures 1 to 3, the X-axis direction is the length direction of the base body 10, the direction in which the two end faces of the base body 10 face each other, and the direction in which the external electrodes 20a and 20b face each other. The Y-axis direction is the width direction of the internal electrode layer, the direction in which the two sides of the base body 10 face each other. The Z-axis direction is the stacking direction, the direction in which the top and bottom surfaces of the base body 10 face each other. The X-axis direction, the Y-axis direction, and the Z-axis direction are mutually orthogonal.

[0022] The base body 10 has a structure in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 are alternately stacked. The edges of each internal electrode layer 12 are alternately exposed to the end face of the base body 10 where the external electrode 20a is provided and the end face where the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately conductive to the external electrode 20a and the external electrode 20b. Consequently, the multilayer ceramic capacitor 100 has a structure in which multiple dielectric layers 11 are stacked via internal electrode layers 12. Furthermore, in the laminate of dielectric layers 11 and internal electrode layers 12, the outermost layer in the stacking direction is an internal electrode layer 12, and the top and bottom surfaces of the laminate are covered by a cover layer 13. The cover layer 13 is mainly composed of ceramic material. Note that the configuration is not limited to Figures 1 to 3, as long as the internal electrode layers 12 are exposed to two different surfaces and conductive to different external electrodes.

[0023] The dimensions of the multilayer ceramic capacitor 100 are, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but are not limited to these dimensions.

[0024] The internal electrode layer 12 mainly consists of base metals such as nickel (Ni), copper (Cu), and tin (Sn). Precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these, may also be used as the internal electrode layer 12. The thickness of the internal electrode layer 12 is, for example, 0.1 μm to 3 μm, 0.1 μm to 1 μm, or 0.1 μm to 0.5 μm.

[0025] The dielectric layer 11 is a dielectric composition, mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO3. Note that this perovskite structure is an ABO3 structure that deviates from the stoichiometric composition. 3-α This includes the following. In this embodiment, barium titanate (BaTiO3) is used as the ceramic material. For example, the dielectric layer 11 contains 90 at% or more barium titanate. The thickness of the dielectric layer 11 is, for example, 0.2 μm to 10 μm, 0.2 μm to 5 μm, or 0.2 μm to 2 μm.

[0026] The dielectric layer 11 may contain additives. Examples of additives to the dielectric layer 11 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0027] The cover layer 13 is a dielectric composition, mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO3. Note that this perovskite structure is an ABO3 structure that deviates from the stoichiometric composition. 3-αThis includes the following. In this embodiment, barium titanate (BaTiO3) is used as the ceramic material. For example, the cover layer 13 contains 90 at% or more barium titanate. The thickness of the cover layer 13 is, for example, 5 μm to 15 μm, 20 μm to 60 μm, or 80 μm to 100 μm.

[0028] The cover layer 13 may contain additives. Examples of additives to the cover layer 13 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0029] As illustrated in Figure 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region in the multilayer ceramic capacitor 100 where capacitance is generated. Therefore, this region where capacitance is generated is referred to as the capacitance region 14. In other words, the capacitance region 14 is the region where adjacent internal electrode layers 12 connected to different external electrodes face each other.

[0030] The region where internal electrode layers 12 connected to external electrode 20a face each other without being connected to an internal electrode layer 12 connected to external electrode 20b is called the end margin 15. Similarly, the region where internal electrode layers 12 connected to external electrode 20b face each other without being connected to an internal electrode layer 12 connected to external electrode 20a is also called the end margin 15. In other words, the end margin 15 is the region where internal electrode layers 12 connected to the same external electrode face each other without being connected to an internal electrode layer 12 connected to a different external electrode. The end margin 15 is a region where no capacitance is generated.

[0031] As illustrated in Figure 3, in the base body 10, the side margin 16 is a region provided to cover the two side edges (the edges in the Y-axis direction) of the dielectric layer 11 and the internal electrode layer 12. The side margin 16 is also a region that does not generate capacitance.

[0032] Here, we will describe the various parts within the capacitance region 14 in Figure 2. As illustrated in Figure 4, the central part in the Z-axis direction of the capacitance region 14 is referred to as the first region 30. In the capacitance region 14, a pair of parts located outside the first region 30 in the Z-axis direction are referred to as the second region 40. The first region 30 and the second region 40 each contain at least one dielectric layer 11, and may contain multiple dielectric layers 11.

[0033] In this embodiment, the A / B ratio in the barium titanate having a perovskite structure represented by the general formula ABO3, i.e., the molar ratio of barium to 100 mol of titanium (Ba / Ti ratio), is greater in the cover layer 13 than in the first region 30, and smaller in the second region than in the first region 30. With this configuration, the Ba / Ti ratio in the cover layer 13 is larger, which lowers the densification temperature of the cover layer 13. As a result, the pore ratio of the cover layer 13 decreases, improving its moisture resistance. Next, since the Ba / Ti ratio is smaller in the second region 40 than in the first region 30, the barium in the cover layer 13 mainly diffuses into the second region, and the diffusion of barium from the cover layer 13 to the first region 30 is suppressed. As a result, abnormal grain growth in the first region 30 is suppressed, the lifespan of the multilayer ceramic capacitor 100 is extended, and its reliability is improved. From the above, it can be seen that this embodiment achieves both good moisture resistance and good reliability.

[0034] Furthermore, if the Ba / Ti ratio in the first region 30 is near the stoichiometry level, even a slight inclusion of zirconium can cause the A / B ratio to fluctuate by 1 / 1000 units, potentially significantly affecting the reliability of the multilayer ceramic capacitor 100. Therefore, it is preferable to make the Ba / Ti ratio in the first region 30 smaller than the stoichiometry level. For example, the Ba / Ti ratio in the first region 30 is preferably 0.980 or less, more preferably 0.970 or less, and even more preferably 0.965 or less.

[0035] On the other hand, if the Ba / Ti ratio in the first region 30 is too small, the densification temperature of the first region 30 will rise, and there is a risk that the first region 30 will not be sufficiently densified. Therefore, it is preferable to set a lower limit on the Ba / Ti ratio in the first region 30. For example, the Ba / Ti ratio in the first region 30 is preferably 0.970 or higher, more preferably 0.973 or higher, and even more preferably 0.975 or higher.

[0036] If the Ba / Ti ratio in the cover layer 13 is too high, the densification temperature of the cover layer 13 will rise, and there is a risk that the cover layer 13 will not be sufficiently densified. Therefore, it is preferable to set an upper limit on the Ba / Ti ratio in the cover layer 13. For example, the Ba / Ti ratio in the cover layer 13 is preferably 1.010 or less, preferably 1.008 or less, and preferably 1.006 or less.

[0037] On the other hand, if the Ba / Ti ratio in the cover layer 13 is too low, abnormal grain growth may occur in the cover layer 13. Therefore, it is preferable to set a lower limit on the Ba / Ti ratio in the cover layer 13. For example, the Ba / Ti ratio in the cover layer 13 is preferably 1.005 or higher, more preferably 1.005 or higher, and even more preferably 1.0055 or higher.

[0038] If the Ba / Ti ratio in the second region 40 is too high, the diffusion of barium from the cover layer 13 to the first region 30 may not be sufficiently suppressed. Therefore, it is preferable to set an upper limit on the Ba / Ti ratio in the second region 40. For example, the Ba / Ti ratio in the second region 40 is preferably 0.960 or less, more preferably 0.955 or less, and even more preferably 0.950 or less.

[0039] On the other hand, if the Ba / Ti ratio in the second region 40 is too low, the densification temperature will rise, and there is a risk that the joint of the cover layer 13 may not be sufficiently densified. Therefore, it is preferable to set a lower limit on the Ba / Ti ratio in the second region 40. For example, the Ba / Ti ratio in the second region 40 is preferably 0.950 or higher, more preferably 0.960 or higher, and even more preferably 0.970 or higher.

[0040] If the pore ratio in the cover layer 13 is high, moisture can easily penetrate, which may reduce the moisture resistance of the multilayer ceramic capacitor 100. Therefore, it is preferable to set an upper limit on the pore ratio in the cover layer 13. For example, in a cross-section along the stacking direction, the area ratio of pores is preferably 10% or less, more preferably 5% or less, and even more preferably 3% or less. The pore ratio of the cover layer 13 can be reduced by lowering the densification temperature of the cover layer 13 to promote densification.

[0041] The dielectric layer 11 in the first region 30 may contain at least one of zirconium and hafnium at the B site in the perovskite structure. For example, zirconium and hafnium may be substituted and dissolved in the B site of barium titanate. The inclusion of at least one of zirconium and hafnium in the dielectric layer 11 suppresses the diffusion of barium from the cover layer 13 to the dielectric layer 11.

[0042] The thickness in the Z-axis direction of each second region 40 is, for example, 1 μm to 5 μm, 3 μm to 9 μm, or 6 μm to 15 μm. The number of dielectric layers 11 stacked in each second region 40 is 0.01 to 0.05 times, 0.03 to 0.06 times, or 0.06 to 0.10 times the number of dielectric layers 11 stacked in the first region 30. Alternatively, the second region 40 may refer only to the outermost dielectric layer 11 of the capacitance region 14.

[0043] In the example above, we focused on the Ba / Ti ratio as an example of the A / B ratio. However, if other elements are present in at least one of the A and B sites, the A / B ratio refers to the molar ratio of the total elements in the A site to the total elements in the B site.

[0044] Next, the manufacturing method of the multilayer ceramic capacitor 100 will be described. Figure 5 is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor 100.

[0045] (Process for producing raw material powder) First, a dielectric material is prepared for forming the dielectric layer 11. The A-site and B-site elements contained in the dielectric layer 11 are usually present in the form of a sintered body of ABO3 particles. For example, barium titanate is a tetragonal compound having a perovskite structure and exhibits a high dielectric constant. This barium titanate can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been conventionally known for synthesizing the main component ceramic of the dielectric layer 11, such as the solid-phase method, the sol-gel method, and the hydrothermal method. In this embodiment, any of these can be employed.

[0046] A predetermined additive compound is added to the obtained ceramic powder according to the purpose. Examples of additive compounds include oxides of zirconium, hafnium, magnesium, manganese, molybdenum, vanadium, chromium, rare earth elements (yttrium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, and ytterbium), or oxides containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon, or glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0047] For example, a ceramic material can be prepared by wet-mixing a ceramic raw material powder with a compound containing an additive, followed by drying and pulverization. The ceramic material obtained in this manner may be further processed to adjust the particle size by pulverization, or by combining this with classification. Through these steps, a dielectric material can be obtained. Zirconia beads can be used during pulverization. Using zirconia beads allows for the addition of a small amount of zirconium to the dielectric material.

[0048] (Coating process) Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained raw material powder and wet-mixed. Using the resulting slurry, a ceramic green sheet 52 is coated onto a substrate 51, as exemplified in Figure 6(a), by methods such as the die coater method or the doctor blade method, and then dried. The substrate 51 is, for example, a polyethylene terephthalate (PET) film. A diagram illustrating the coating process has been omitted.

[0049] (Internal electrode formation process) Next, as illustrated in Figure 6(a), an internal electrode pattern 53 is deposited on the ceramic green sheet 52. In Figure 6(a), as an example, four layers of the internal electrode pattern 53 are deposited on the ceramic green sheet 52 at predetermined intervals. The ceramic green sheet 52 on which the internal electrode pattern 53 is deposited is used as the stacking unit. A metal paste of the main component metal of the internal electrode layer 12 is used for the internal electrode pattern 53. Ceramic particles are added to the metal paste as a co-material. The main component of the ceramic particles is not particularly limited, but it is preferable that it be the same as the main component ceramic of the dielectric layer 11. For example, barium titanate with an average particle diameter of 50 nm or less may be uniformly dispersed.

[0050] (Crimping process) Next, the ceramic green sheet 52 is peeled off the substrate 51 and the laminate units are stacked as illustrated in Figure 6(b). Then, a predetermined number of cover sheets 54 (for example, 2 to 10 layers) are stacked on the top and bottom of the laminate obtained by stacking the laminate units and heat-pressed, and then cut to a predetermined chip size (for example, 1.0 mm × 0.5 mm). The cover sheets 54 are also coated with a slurry containing the raw material powder obtained in the raw material powder production process and then dried. In the example in Figure 6(b), the cutting is done along the dotted line. Figure 7(a) is a cross-sectional view of the laminate in the YZ plane after cutting.

[0051] As illustrated in Figure 7(a), the ceramic green sheet 52 includes two types: a first ceramic green sheet 52a and a second ceramic green sheet 52b. In the laminate of ceramic green sheets 52, the first ceramic green sheet 52a is located in the center in the lamination direction, and the second ceramic green sheet 52b is located further out in the lamination direction than the first ceramic green sheet 52a. Furthermore, the A / B ratio of the first ceramic green sheet 52a is greater than that of the second ceramic green sheet 52b, and the A / B ratio of the cover sheet 54 (third ceramic green sheet) is also greater than that of the first ceramic green sheet 52a.

[0052] (Side margin formation process) Next, as illustrated in Figure 7(b), a side margin sheet 56 is attached to the Y-axis end of the laminate. The side margin sheet 56 is also coated with a slurry containing the raw material powder obtained in the raw material powder production process and then dried.

[0053] (Firing process) The ceramic laminate thus obtained is subjected to binder removal treatment in an N2 atmosphere, and then a metal paste that will serve as the base layer for the external electrodes 20a and 20b is applied by the dip method, and the oxygen partial pressure is 10 -12 MPa~10 -9 The product is fired in a reducing atmosphere at MPa and 1160°C to 1280°C for 5 minutes to 10 hours.

[0054] (Re-oxidation process) In order to return oxygen to the partially reduced main phase, barium titanate, of the dielectric layer 11 fired in a reducing atmosphere, heat treatment may be performed at approximately 1000°C in a mixed gas of N2 and water vapor, or at 500°C to 700°C in air, without oxidizing the internal electrode layer 12. This process is called the re-oxidation process.

[0055] (Plating process) Subsequently, a metal coating of copper, nickel, tin, etc. is applied to the underlayer of the external electrodes 20a and 20b by plating. Through these steps, the multilayer ceramic capacitor 100 is completed.

[0056] According to the manufacturing method of this embodiment, the A / B ratio is greater in the cover layer 13 than in the first region 30, and smaller in the second region than in the first region 30. This makes it possible to achieve both good moisture resistance and good reliability.

[0057] Furthermore, if the Ba / Ti ratio in the first ceramic green sheet 52a is near stoichiometry, even a slight inclusion of zirconium can cause the A / B ratio to fluctuate by 1 / 1000 units, potentially significantly affecting the reliability of the multilayer ceramic capacitor 100. Therefore, it is preferable to make the Ba / Ti ratio in the first ceramic green sheet 52a smaller than stoichiometry. For example, the Ba / Ti ratio in the first ceramic green sheet 52a is preferably 0.980 or less, more preferably 0.970 or less, and even more preferably 0.965 or less.

[0058] On the other hand, if the Ba / Ti ratio in the first ceramic green sheet 52a is too low, the densification temperature of the first ceramic green sheet 52a will rise, and there is a risk that the first region 30 will not be sufficiently densified. Therefore, it is preferable to set a lower limit on the Ba / Ti ratio in the first ceramic green sheet 52a. For example, the Ba / Ti ratio in the first ceramic green sheet 52a is preferably 0.970 or higher, more preferably 0.973 or higher, and even more preferably 0.975 or higher.

[0059] If the Ba / Ti ratio in the cover sheet 54 is too high, the densification temperature of the cover sheet 54 may become too high, potentially preventing sufficient densification of the cover layer 13. Therefore, it is preferable to set an upper limit on the Ba / Ti ratio in the cover sheet 54. For example, the Ba / Ti ratio in the cover sheet 54 is preferably 1.010 or less, preferably 1.008 or less, and preferably 1.006 or less.

[0060] On the other hand, if the Ba / Ti ratio in the cover sheet 54 is too low, abnormal grain growth may occur in the cover layer 13. Therefore, it is preferable to set a lower limit on the Ba / Ti ratio in the cover sheet 54. For example, the Ba / Ti ratio in the cover sheet 54 is preferably 1.005 or higher, more preferably 1.005 or higher, and even more preferably 1.0055 or higher.

[0061] If the Ba / Ti ratio in the second ceramic green sheet 52b is too high, there is a risk that the diffusion of barium from the cover layer 13 to the first region 30 may not be sufficiently suppressed. Therefore, it is preferable to set an upper limit on the Ba / Ti ratio in the second ceramic green sheet 52b. For example, the Ba / Ti ratio in the second ceramic green sheet 52b is preferably 0.960 or less, more preferably 0.955 or less, and even more preferably 0.950 or less.

[0062] On the other hand, if the Ba / Ti ratio in the second ceramic green sheet 52b is too low, the densification temperature will rise, and there is a risk that the joint of the cover layer 13 may not be sufficiently densified. Therefore, it is preferable to set a lower limit on the Ba / Ti ratio in the second ceramic green sheet 52b. For example, the Ba / Ti ratio in the second ceramic green sheet 52b is preferably 0.950 or higher, more preferably 0.960 or higher, and even more preferably 0.970 or higher.

[0063] In the above embodiments, multilayer ceramic capacitors were described as examples of multilayer ceramic electronic components, but the invention is not limited to them. For example, other multilayer ceramic electronic components such as varistors and thermistors may be used. [Examples]

[0064] Below, a multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were investigated.

[0065] (Examples 1, 2 and Comparative Examples 1-4) Barium titanate powder was wet-mixed with a binder, an organic solvent, and a plasticizer. Using the resulting slurry, a ceramic green sheet was coated onto a substrate and dried. An internal electrode pattern was then formed on top of the sheet to create a laminated unit. Cover sheets were laminated to the top and bottom of the laminated body obtained by stacking the laminated units and heat-pressed, and then cut to a predetermined chip size. Next, side margin sheets, mainly composed of barium titanate ceramic, were sequentially attached to the Y-axis ends of the laminated body. The resulting ceramic laminate was then debindered and fired in a reducing atmosphere. Regarding the Ba / Ti ratio, in the ceramic green sheet laminate, the Ba / Ti ratio in the 5 μm regions at the top and bottom ends in the stacking direction was smaller than that in the central region in the stacking direction. Furthermore, the Ba / Ti ratio in the cover sheet was larger than that in the central region.

[0066] (Ba / Ti ratio) The Ba / Ti ratio of each part of the multilayer ceramic capacitors of Examples 1 and 2 and Comparative Examples 1 to 4 was investigated. Specifically, the multilayer ceramic capacitors were polished using a polishing machine to expose the cross-section, and measurements were performed on the polished cross-section using LA-ICP-MS (laser ablation inductively coupled plasma mass spectrometry). The results are shown in Table 1. In the capacitance region, the 5 μm regions at the top and bottom ends in the stacking direction were defined as the second region, and the region sandwiched between the second regions was defined as the first region. The boundary between the first and second regions may be the midpoint of the concentration gradient of the Ba / Ti ratio. [Table 1]

[0067] In Example 1, the Ba / Ti ratio in the cover layer was 1.010, the Ba / Ti ratio in the second region was 0.960, and the Ba / Ti ratio in the first region was 0.980. In Example 2, the Ba / Ti ratio in the cover layer was 1.006, the Ba / Ti ratio in the second region was 0.960, and the Ba / Ti ratio in the first region was 0.980. In Comparative Example 1, the Ba / Ti ratio in the cover layer was 0.980, the Ba / Ti ratio in the second region was 0.980, and the Ba / Ti ratio in the first region was 0.980. In Comparative Example 2, the Ba / Ti ratio in the cover layer was 0.940, the Ba / Ti ratio in the second region was 0.960, and the Ba / Ti ratio in the first region was 0.980. In Comparative Example 3, the Ba / Ti ratio in the cover layer was 1.003, the Ba / Ti ratio in the second region was 0.997, and the Ba / Ti ratio in the first region was 0.960. In Comparative Example 4, the Ba / Ti ratio in the cover layer was 1.001, the Ba / Ti ratio in the second region was 0.990, and the Ba / Ti ratio in the first region was 0.980.

[0068] (Moisture resistance) For the multilayer ceramic capacitors of Examples 1 and 2 and Comparative Examples 1 to 4, the multilayer ceramic capacitors were polished using a polishing machine to expose the cross-section, and the exposed cross-section was observed with an SEM (scanning electron microscope). The pore ratio of the cover layer was calculated as follows: pore cross-sectional area = (cross-sectional area of ​​the pore) / (cross-sectional area of ​​the cover layer).

[0069] In Example 1, the pore ratio of the cover layer was 5%. In Example 2, the pore ratio of the cover layer was 3%. In Comparative Example 1, the pore ratio of the cover layer was 20%. In Comparative Example 2, the pore ratio of the cover layer was 25%. In Comparative Example 3, the pore ratio of the cover layer was 2%. In Comparative Example 4, the pore ratio of the cover layer was 1%.

[0070] Since humidity resistance decreases as the pore ratio increases, a pore ratio exceeding 10% was judged as poor humidity resistance ("×"), while a pore ratio of less than 10% was judged as good humidity resistance ("〇"). Examples 1 and 2 and Comparative Examples 3 and 4 were judged as having good humidity resistance ("〇"). Comparative Examples 1 and 2 were judged as having poor humidity resistance ("×").

[0071] (lifespan) The accelerated lifespan was measured for the multilayer ceramic capacitors of Examples 1 and 2 and Comparative Examples 1 to 4. Specifically, tests were conducted at 170°C and 125V until all 20 samples failed, and the average lifespan was defined as the lifespan value. In Example 1, the lifespan value was 4500 min. In Example 2, the lifespan value was 4900 min. In Comparative Example 1, the lifespan value was 4800 min. In Comparative Example 2, the lifespan value was 4200 min. In Comparative Example 3, the lifespan value was 200 min. In Comparative Example 4, the lifespan value was 500 min.

[0072] If the lifespan value was 3000 min or more, the lifespan characteristics were judged as good ("○"). If the lifespan value was less than 3000 min, the lifespan characteristics were judged as poor ("×"). Examples 1 and 2 and Comparative Examples 1 and 2 were judged as having good lifespan characteristics ("○"). Comparative Examples 3 and 4 were judged as having poor lifespan characteristics ("×").

[0073] (Overall assessment) If both moisture resistance and lifespan characteristics were judged as good ("○"), the overall judgment was determined to be good ("○"). If either moisture resistance or lifespan characteristics were judged as poor ("×"), the overall judgment was determined to be poor ("×").

[0074] In both Examples 1 and 2, the overall evaluation was judged as good ("○"). This is thought to be because the Ba / Ti ratio was Cover layer > First region > Second region, resulting in good density in the cover layer and suppression of abnormal grain growth in the First region.

[0075] In all of Comparative Examples 1 to 4, the overall judgment was "Poor" (×). In Comparative Examples 1 and 2, the Ba / Ti ratio was such that the cover layer ≤ second region ≤ first region, resulting in a small Ba / Ti ratio in the cover layer and preventing the densification temperature of the cover layer from becoming low enough. In Comparative Examples 3 and 4, the Ba / Ti ratio was such that the cover layer ≥ second region ≥ first region, resulting in the Ba / Ti ratio in the second region not becoming sufficiently small, causing Ba to diffuse into the first region and resulting in abnormal grain growth.

[0076] Although embodiments of the present invention have been described in detail above, the present invention is not limited to these specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims. [Explanation of Symbols]

[0077] 10 Base Body 11 Dielectric layer 12 Internal electrode layer 13. Cover layer 14 capacity area 15 End margin 16 Side margins 20a,20b external electrode 100 Multilayer Ceramic Capacitors

Claims

1. Multiple internal electrode layers stacked facing each other, General ABO with Site A and Site B ３ It has a perovskite structure represented by, and a plurality of dielectric layers provided via the plurality of internal electrode layers, The capacitive region, in which the plurality of internal electrode layers are located, is provided above and below the stacking direction of the plurality of internal electrode layers, and comprises a pair of cover layers whose main component is the same element as the plurality of dielectric layers, The capacity region comprises a first region located in the center of the stacking direction and a pair of second regions located outside the first region. A multilayer ceramic electronic component in which the A / B ratio in the first region is greater than the A / B ratio in the second region, and the A / B ratio in the cover layer is greater than the A / B ratio in the first region.

2. The multilayer ceramic electronic component according to claim 1, wherein the A / B ratio in the first region is 0.98 or less.

3. The multilayer ceramic electronic component according to claim 2, wherein the A / B ratio in the first region is 0.97 or greater.

4. The multilayer ceramic electronic component according to any one of claims 1 to 3, wherein the A / B ratio of the pair of cover layers is 1.005 or more and 1.010 or less.

5. The multilayer ceramic electronic component according to any one of claims 1 to 4, wherein the A / B ratio in the pair of second regions is 0.96 or less.

6. The multilayer ceramic electronic component according to claim 5, wherein the A / B ratio in the pair of second regions is 0.95 or greater.

7. The multilayer ceramic electronic component according to any one of claims 1 to 6, wherein the thickness of each of the pair of second regions in the direction in which the plurality of internal electrode layers face each other is 5 μm or less.

8. The multilayer ceramic electronic component according to any one of claims 1 to 7, wherein the plurality of dielectric layers and the pair of cover layers are mainly composed of barium titanate.

9. The multilayer ceramic electronic component according to any one of claims 1 to 8, wherein the A / B ratio in the first region is smaller than that of stoichiometry.

10. General ABO with Site A and Site B ３ A step of preparing a plurality of first ceramic green sheets, including a ceramic having a perovskite structure represented by, A step of preparing a plurality of second ceramic green sheets containing the aforementioned ceramic and having an A / B ratio smaller than the plurality of first ceramic green sheets, A step of preparing a pair of third ceramic green sheets containing the aforementioned ceramic and having a larger A / B ratio than the plurality of first ceramic green sheets, The process of forming an internal electrode pattern on the plurality of first ceramic green sheets, A step of stacking the plurality of first ceramic green sheets on which the internal electrode pattern is formed, A step of laminating the plurality of second ceramic green sheets onto the plurality of first ceramic green sheets that have been laminated together, A step of obtaining a laminate by laminating the pair of third ceramic green sheets onto the plurality of laminated second ceramic green sheets, A method for manufacturing a multilayer ceramic electronic component, comprising the step of firing the aforementioned laminate.

11. A method for manufacturing a multilayer ceramic electronic component according to claim 10, comprising the step of forming an internal electrode pattern on a plurality of second ceramic green sheets.

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