Ceramic electronic components and methods for manufacturing the same
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- TAIYO YUDEN KK
- Filing Date
- 2022-03-17
- Publication Date
- 2026-08-05
Smart Images
Figure 0007900934000003 
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Abstract
Description
[Technical Field]
[0001] The present invention relates to ceramic electronic components and methods for manufacturing the same. [Background technology]
[0002] In addition to the increasing functionality and performance of mobile devices such as cell phones and other electronic devices, the demand for miniaturization and increased capacity of ceramic electronic components, such as multilayer ceramic capacitors, which are one of the components of these devices, continues to grow as batteries become larger. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2014-082435 [Patent Document 2] Japanese Patent Publication No. 2013-229555 [Patent Document 3] Japanese Patent Publication No. 2018-195799 [Patent Document 4] Japanese Patent Publication No. 2014-093516 [Patent Document 5] Japanese Patent Publication No. 2014-170911 [Patent Document 6] Japanese Patent Publication No. 2013-055314 [Patent Document 7] Japanese Patent Publication No. 2002-343669 [Overview of the project] [Problems that the invention aims to solve]
[0004] To increase the capacitance of ceramic electronic components, measures such as studying material compositions to increase the dielectric constant of the dielectric material used and thinning the dielectric layer have been implemented. Increasing the number of layers by thinning the internal electrode layer is also an effective method. However, thinning the internal electrode layer may lead to over-sintering of the internal electrode layer and a decrease in continuity due to the difference in densification temperature ranges between the dielectric layer and the internal electrode layer during the firing process. In this case, the bonding between the internal electrode layer and the external electrode may deteriorate, and the desired characteristics may not be obtained.
[0005] The present invention has been made in view of the above problems, and aims to provide a ceramic electronic component and a method for manufacturing the same that can improve the bonding between the internal electrode layer and the external electrode. [Means for solving the problem]
[0006] The ceramic electronic component according to the present invention comprises a laminated chip having a substantially rectangular parallelepiped shape, in which a plurality of dielectric layers mainly composed of ceramic and a plurality of internal electrode layers mainly composed of Ni are alternately laminated, and the plurality of internal electrode layers are alternately exposed on two opposing end faces of the substantially rectangular parallelepiped shape, and an external electrode mainly composed of Ni provided on the two end faces, wherein the plurality of internal electrode layers contain additive metal elements other than Ni and a common material, and the concentration of the additive metal elements is higher in the internal electrode layers than in the external electrode.
[0007] In the above-mentioned ceramic electronic component, the added metal element may be one or more selected from Au, Sn, Cr, Fe, Y, In, As, Co, Cu, Ir, Mg, Os, Pd, Pt, Re, Rh, Ru, Se, Te, Zn, and Ge.
[0008] In the above-described ceramic electronic component, the concentration of the added metal element in the plurality of internal electrode layers may be 0.01 at% or more and 5.0 at% or less relative to Ni.
[0009] In the above ceramic electronic component, the ratio of the concentration of the added metal element in the external electrode to which the internal electrode layer is connected to the concentration of the added metal element in the internal electrode layer may be 0.1 or more and 0.5 or less.
[0010] In the above ceramic electronic component, for the plurality of internal electrode layers, taking the respective diameters of the co-materials on the horizontal axis and the volume distribution (%) such that the total volume of the respective co-materials becomes 100% on the vertical axis, the slope m when linearly approximating by connecting the 20% value and the 80% value of the obtained graph may be 3.8 or more and 5.0 or less.
[0011] In the above ceramic electronic component, in the end margin region where the internal electrode layers exposed on the same end face of the laminated chip face each other without passing through the internal electrode layers exposed on different end faces, the concentration of the added metal element may be higher in the internal electrode layer than in the external electrode.
[0012] In the above ceramic electronic component, the thickness of the dielectric layer may be 0.8 μm or less.
[0013] In the above ceramic electronic component, the thickness of the internal electrode layer may be 0.8 μm or less.
[0014] In the above ceramic electronic component, the external electrode may contain the added metal element.
[0015] In the above ceramic electronic component, the external electrode may contain a co-material.
[0016] The present invention relates to a method for manufacturing a ceramic electronic component, characterized by alternately stacking a dielectric green sheet containing ceramic powder and an internal electrode pattern containing a common material and added metal elements with Ni as the main component metal to form a substantially rectangular parallelepiped-shaped ceramic laminate, alternately exposing the stacked internal electrode pattern on two opposing end faces of the ceramic laminate, placing a metal paste with Ni as the main component metal on the two end faces, and firing the ceramic laminate such that the concentration of the metal elements is higher in the internal electrode layer obtained from the internal electrode pattern than in the external electrode obtained from the metal paste. [Effects of the Invention]
[0017] According to the present invention, it is possible to provide a ceramic electronic component that can maintain bonding between an internal electrode layer and an external electrode, and a method for manufacturing the same. [Brief explanation of the drawing]
[0018] [Figure 1] This is a partial cross-sectional perspective view of a multilayer ceramic capacitor. [Figure 2] This is a cross-sectional view along line AA in Figure 1. [Figure 3] This is a cross-sectional view along line BB in Figure 1. [Figure 4] This diagram shows the continuity rate of the internal electrode layer. [Figure 5] This diagram illustrates the volume distribution of the same material. [Figure 6] This diagram illustrates a flow chart of the manufacturing process for multilayer ceramic capacitors. [Figure 7] (a) and (b) are diagrams illustrating the lamination process. [Figure 8] (a) is a traced SEM image of the cross-section in the stacking direction of Example 1, and (b) is a traced SEM image of the cross-section in the stacking direction of the comparative example. [Figure 9] This graph shows the results for Example 1 and the Comparative Example, calculated from the diameter and volume distribution of the same material. [Modes for carrying out the invention]
[0019] The embodiments will be described below with reference to the drawings.
[0020] Figure 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. Figure 2 is a cross-sectional view taken along line AA in Figure 1. Figure 3 is a cross-sectional view taken along line BB in Figure 1. As illustrated in Figures 1 to 3, the multilayer ceramic capacitor 100 comprises a multilayer chip 10 having a substantially rectangular parallelepiped shape and external electrodes 20a and 20b provided on two opposing end faces of either of the multilayer chips 10. Of the four faces of the multilayer chip 10 other than the two end faces, the two faces other than the top and bottom faces in the stacking direction are referred to as side faces. The external electrodes 20a and 20b extend to the top, bottom, and two side faces of the multilayer chip 10 in the stacking direction. However, the external electrodes 20a and 20b are spaced apart from each other.
[0021] The multilayer chip 10 has a structure in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 mainly composed of metal are alternately stacked. In other words, the multilayer chip 10 comprises a plurality of internal electrode layers 12 facing each other and dielectric layers 11 sandwiched between each of the plurality of internal electrode layers 12. The edges of each internal electrode layer 12 are alternately exposed at the end face of the multilayer chip 10 where the external electrode 20a is provided and at the end face where the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately conductive to the external electrode 20a and the external electrode 20b. Consequently, the multilayer ceramic capacitor 100 has a structure in which a plurality of dielectric layers 11 are stacked via internal electrode layers 12. Furthermore, in the laminate of dielectric layers 11 and internal electrode layers 12, the outermost layer in the stacking direction is an internal electrode layer 12, and the top and bottom surfaces of the laminate are covered by a cover layer 13. The cover layer 13 is mainly composed of ceramic material. For example, the cover layer 13 may have the same or different composition as the dielectric layer 11.
[0022] The size of the multilayer ceramic capacitor 100 is, for example, a length of 0.25 mm, a width of 0.125 mm, and a height of 0.125 mm, or a length of 0.4 mm, a width of 0.2 mm, and a height of 0.2 mm, or a length of 0.6 mm, a width of 0.3 mm, and a height of 0.3 mm, or a length of 0.6 mm, a width of 0.3 mm, and a height of 0.110 mm, or a length of 1.0 mm, a width of 0.5 mm, and a height of 0.5 mm, or a length of 1.0 mm, a width of 0.5 mm, and a height of 0.1 mm, or a length of 3.2 mm, a width of 1.6 mm, and a height of 1.6 mm, or a length of 4.5 mm, a width of 3.2 mm, and a height of 2.5 mm, but is not limited to these sizes.
[0023] The dielectric layer 11 mainly consists of, for example, a ceramic material having a perovskite structure represented by the general formula ABO3. Note that the perovskite structure contains ABO 3-α deviating from the stoichiometric composition. For example, as the ceramic material, BaTiO3 (barium titanate), CaZrO3 (calcium zirconate), CaTiO3 (calcium titanate), SrTiO3 (strontium titanate), MgTiO3 (magnesium titanate), Ba forming a perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1), etc., can be selected and used from at least one of them. Ba 1-x-y Ca x Sr y Ti 1-z Zr z O3 is barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconium titanate, calcium zirconium titanate, and barium calcium zirconium titanate, etc.
[0024] The dielectric layer 11 may contain additives. Examples of additives to the dielectric layer 11 include oxides of molybdenum (Mo), niobium (Nb), tantalum (Ta), tungsten (W), magnesium (Mg), manganese (Mn), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holomium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glass containing Co, Ni, Li, B, Na, K, or Si.
[0025] The internal electrode layer 12 is mainly composed of Ni. In addition to Ni, the internal electrode layer 12 contains additive metal elements in a molar ratio smaller than that of the main component. The additive metal elements are not particularly limited as long as they are not Ni, but may be one or more selected from, for example, gold (Au), tin (Sn), Cr, iron (Fe), yttrium (Y), indium (In), arsenic (As), Co, copper (Cu), iridium (Ir), Mg, osmium (Os), palladium (Pd), platinum (Pt), rhenium (Re), rhodium (Rh), ruthenium (Ru), selenium (Se), tellurium (Te), zinc (Zn), and germanium (Ge). If there are two or more additive metal elements, the total molar ratio is smaller than the molar ratio of Ni. The internal electrode layer 12 also contains a co-material of ceramic particles. The co-material is not particularly limited, but it can be the same as the main component ceramic of the dielectric layer 11. For example, as the co-material, BaTiO3 (barium titanate), CaZrO3 (calcium zirconate), CaTiO3 (calcium titanate), SrTiO3 (strontium titanate), MgTiO3 (magnesium titanate), and Ba forming the perovskite structure can be used. 1-x-y Ca x Sr y Ti 1-z Zr zAt least one of the following can be selected and used: O3 (0≦x≦1, 0≦y≦1, 0≦z≦1), etc. 1-x-y Ca x Sr y Ti 1-z Zr z For O3, barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, and barium calcium zirconate titanate can be used.
[0026] The external electrodes 20a and 20b are mainly composed of Ni. In addition to the main component Ni, the external electrodes 20a and 20b may also contain the same additive metal elements as the internal electrode layer 12, but in a smaller molar ratio than the main component. Furthermore, the external electrodes 20a and 20b may also contain ceramic particles as a co-material. In addition, one or more plating layers may be formed on the surface of the external electrodes 20a and 20b opposite to the laminated chip 10.
[0027] As illustrated in Figure 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region in the multilayer ceramic capacitor 100 where capacitance is generated. Therefore, this region where capacitance is generated is referred to as the capacitance region 14. In other words, the capacitance region 14 is the region where adjacent internal electrode layers 12 connected to different external electrodes face each other.
[0028] The region where internal electrode layers 12 connected to external electrode 20a face each other without being connected to an internal electrode layer 12 connected to external electrode 20b is called the end margin 15. Similarly, the region where internal electrode layers 12 connected to external electrode 20b face each other without being connected to an internal electrode layer 12 connected to external electrode 20a is also called the end margin 15. In other words, the end margin 15 is the region where internal electrode layers 12 connected to the same external electrode face each other without being connected to an internal electrode layer 12 connected to a different external electrode. The end margin 15 is a region where no capacitance is generated.
[0029] As illustrated in Figure 3, in the stacked chip 10, the region extending from the two sides of the stacked chip 10 to the internal electrode layer 12 is called the side margin 16. That is, the side margin 16 is a region provided to cover the ends of the multiple internal electrode layers 12 stacked in the stacked structure that extend to the two sides. The side margin 16 is also a region that does not generate electrical capacitance.
[0030] The thickness of each internal electrode layer 12 is, for example, 0.2 μm to 0.8 μm, 0.3 μm to 0.8 μm, 0.6 μm to 0.8 μm, 0.8 μm to 1.5 μm, or 1.5 μm to 4.0 μm. The thickness of each internal electrode layer 12 can be measured by, for example, mechanically polishing the cross-section of the multilayer ceramic capacitor 100 as shown in Figure 2, and then taking an image with a microscope such as a scanning transmission electron microscope to determine the average thickness at 10 points.
[0031] The thickness of each dielectric layer 11 is, for example, 0.2 μm or more and 0.4 μm or less, or 0.4 μm or more and 0.5 μm or less, or 0.4 μm or more and 1.0 μm or less, or 1.0 μm or more and 10 μm or less. The thickness of each dielectric layer 11 can be measured by, for example, exposing the cross-section of the multilayer ceramic capacitor shown in Figure 2 by mechanical polishing, and then determining the average value of the thickness at 10 points from images taken with a microscope such as a scanning transmission electron microscope.
[0032] To achieve miniaturization and increased capacitance of the multilayer ceramic capacitor 100, it is conceivable to increase the capacitance per unit volume by thinning the dielectric layer 11 and the internal electrode layer 12. However, since the sintering temperature of the dielectric layer 11 is higher than that of the internal electrode layer 12, thinning the internal electrode layer 12 may reduce the continuity of the internal electrode layer 12 when firing in the temperature range where the dielectric layer 11 becomes dense. In particular, the continuity of the internal electrode layer 12 may decrease near the external electrodes 20a and 20b. For example, the continuity of the internal electrode layer 12 may decrease at the end margin 15. If the continuity of the internal electrode layer 12 decreases, the bonding between the internal electrode layer 12 and the external electrodes 20a and 20b will decrease, resulting in poor conductivity and potentially preventing the acquisition of desired characteristics.
[0033] Figure 4 shows the continuity of the internal electrode layer 12. As illustrated in Figure 4, in an observation area of length L0 in a certain internal electrode layer 12, the lengths L1, L2, ..., Ln of the metal portion can be measured and summed up, and the proportion of the metal portion, ΣLn / L0, can be defined as the continuity of that layer.
[0034] The multilayer ceramic capacitor 100 according to this embodiment has a configuration that improves the bonding between the internal electrode layer 12 and the external electrodes 20a and 20b.
[0035] First, the inclusion of a common material in the internal electrode layer 12 delays the sintering of the internal electrode layer 12. Furthermore, by including different types of additive metal elements in addition to the main component Ni in the internal electrode layer 12, the amount of common material remaining in the internal electrode layer 12 can be increased. This is thought to be because the additive metal elements segregate around the common material particles. Using a fine and highly dispersed common material allows for a particularly large amount of common material remaining in the internal electrode layer 12. Since the common material added for the purpose of delaying sintering does not diffuse into the dielectric layer 11 during the sintering process but remains largely in the internal electrode layer 12, a sufficient sintering delay effect is obtained, improving the continuity of the internal electrode layer 12. Moreover, in the multilayer ceramic capacitor 100 according to this embodiment, the concentration of the additive metal elements is higher in the internal electrode layer 12 than in the external electrodes 20a and 20b. This configuration allows the additive metal elements to diffuse from the internal electrode layer 12 towards the external electrodes 20a and 20b, creating a flow of the additive metal elements, thus improving the bonding between the internal electrode layer 12 and the external electrodes 20a and 20b. As a result, capacity degradation due to connection problems can be suppressed, and the desired capacity and characteristics can be achieved.
[0036] Since it is preferable that there is a difference in the concentration of the added metal element near the external electrode, it is preferable that in each end margin 15, the concentration of the added metal element is higher in the internal electrode layer 12 connected to the external electrode than in the external electrode.
[0037] When Au, Sn, Cr, Fe, Y, In, As, Co, Cu, Ir, Mg, Os, Pd, Pt, Re, Rh, Ru, Se, Te, Zn, and Ge are used as additive metal elements, these additive metal elements tend to segregate around the co-material particles, allowing for a larger amount of co-material remaining in the internal electrode layer 12.
[0038] If the amount of added metal element in the internal electrode layer 12 is small, there is a risk that a sufficient amount of the common material cannot be left in the internal electrode layer 12. Therefore, it is preferable to set a lower limit on the concentration of the added metal element in the internal electrode layer 12. For example, in the internal electrode layer 12, the concentration of the added metal element is preferably 0.01 at% or more, more preferably 0.1 at% or more, and even more preferably 1.0 at% or more, relative to Ni. Note that the concentration of the added metal element is the atomic ratio of the added metal element when Ni is assumed to be 100 at%.
[0039] On the other hand, if the amount of added metal elements in the internal electrode layer 12 is large, the added metal elements may diffuse into the dielectric layer 11, degrading the additive design of the dielectric layer 11 and potentially causing the capacitance and characteristic values to deviate from the design values. Therefore, it is preferable to set an upper limit on the concentration of added metal elements in the internal electrode layer 12. For example, in the internal electrode layer 12, the concentration of added metal elements is preferably 5.0 at% or less, more preferably 3.0 at% or less, and even more preferably 1.5 at% or less, relative to Ni.
[0040] From the viewpoint of setting upper and lower limits on the concentration of added metal elements in the internal electrode layer 12, it is preferable to set upper and lower limits on the ratio of the concentration of added metal elements in the external electrode to which the internal electrode layer is connected to the concentration of added metal elements in the internal electrode layer 12 to the concentration of added metal elements in the internal electrode layer 12. For example, the ratio is preferably 0.3 or more and 0.5 or less, more preferably 0.2 or more and 0.4 or less, and even more preferably 0.1 or more and 0.2 or less.
[0041] If the amount of co-material remaining in the internal electrode layer 12 is small, there is a risk that the sintering delay effect cannot be sufficiently obtained. Therefore, it is preferable to set a lower limit on the amount of co-material in the internal electrode layer 12. For example, in the internal electrode layer 12, the amount of co-material is preferably 5.0 wt% or more, more preferably 10 wt% or more, and even more preferably 15 wt% or more. Note that the amount of co-material added is the weight ratio of the added co-material when Ni is assumed to be 100 wt%.
[0042] On the other hand, if a large amount of co-material remains in the internal electrode layer 12, the continuity of the internal electrode layer 12 may decrease, and the electrical properties may deteriorate due to diffusion into the dielectric layer 11 during the sintering process. Therefore, it is preferable to set an upper limit on the amount of co-material in the internal electrode layer 12. For example, in the internal electrode layer 12, the amount of co-material is preferably 20 wt% or less, more preferably 15 wt% or less, and even more preferably 10 wt% or less.
[0043] Furthermore, the volume distribution of the co-material can also be used as an indicator of the amount of co-material remaining in the internal electrode layer 12. For example, as illustrated in Figure 5, the volume distribution is calculated such that the sum of the diameters of the multiple co-materials dispersed and remaining in the internal electrode layer 12 and the volume of each co-material calculated from each diameter equals 100%. The horizontal axis represents the diameter of each co-material. The vertical axis represents the volume distribution (%). In this distribution graph, the smaller the slope m of the straight line obtained by linear approximation, the more co-materials with larger diameters remain. For example, the slope m is preferably 3.8 or more and 5.0 or less, more preferably 3.9 or more and 4.9 or less, and even more preferably 4.5 or more and 4.8 or less. The diameter of each co-material can be obtained, for example, by measuring the maximum length of each particle in an SEM (scanning electron microscope) image of the central cross-section. The volume of the cube can be calculated as the volume of the particle in question, assuming that the measured diameter is one side of the cube. For linear approximation, a straight line can be obtained by using the 20th and 80th percentile values of the volume distribution and connecting the two data points.
[0044] Next, the manufacturing method of the multilayer ceramic capacitor 100 will be described. Figure 6 is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor 100.
[0045] (Process for producing raw material powder) First, a dielectric material is prepared to form the dielectric layer 11. The A-site and B-site elements contained in the dielectric layer 11 are usually present in the form of a sintered body of ABO3 particles. For example, BaTiO3 is a tetragonal compound having a perovskite structure and exhibits a high dielectric constant. This BaTiO3 can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been conventionally known for synthesizing the main component ceramic of the dielectric layer 11, such as the solid-phase method, the sol-gel method, and the hydrothermal method. In this embodiment, any of these can be employed.
[0046] A predetermined additive compound is added to the obtained ceramic powder according to the purpose. Examples of additive compounds include oxides of molybdenum (Mo), niobium (Nb), tantalum (Ta), tungsten (W), magnesium (Mg), manganese (Mn), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holomium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glass containing Co, Ni, Li, B, Na, K, or Si. Of these, SiO2 mainly functions as a sintering aid.
[0047] For example, a ceramic material is prepared by wet-mixing a ceramic raw material powder with a compound containing an additive, followed by drying and pulverization. For example, the average particle size of the ceramic raw material powder is preferably 50 to 200 nm from the viewpoint of thinning the dielectric layer. For example, the ceramic material obtained as described above may be adjusted in particle size by pulverization as needed, or by combining this with a classification process. A dielectric material is obtained through the above steps.
[0048] (Lamination process) Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained dielectric material and wet-mixed. Using the resulting slurry, a dielectric green sheet 52 with a thickness of, for example, 0.8 μm or less is coated onto the substrate 51 by, for example, a die coater or doctor blade method and dried. The substrate 51 is, for example, a PET (polyethylene terephthalate) film.
[0049] Next, as illustrated in Figure 7(a), an internal electrode pattern 53 is deposited on the dielectric green sheet 52. In Figure 7(a), as an example, four layers of the internal electrode pattern 53 are deposited on the dielectric green sheet 52 at predetermined intervals. The dielectric green sheet 52 on which the internal electrode pattern 53 is deposited is used as the stacking unit. The internal electrode pattern 53 is a paste material containing Ni powder, which is the main component metal, co-material powder, and powder of added metal elements.
[0050] Next, while peeling the dielectric green sheet 52 from the substrate 51, a predetermined number of stacking units (for example, 100 to 500 layers) are stacked, as illustrated in Figure 7(b).
[0051] Next, a predetermined number of cover sheets 54 (e.g., 2 to 10 layers) are stacked on the top and bottom of the laminate obtained by stacking the stacking units and heat-pressed, and then cut to a predetermined chip size (e.g., 1.0 mm × 0.5 mm). In the example in Figure 7(b), the cut is made along the dotted line. The cover sheet 54 may have the same composition as the dielectric green sheet 52, or it may have different additive compounds. Metal paste, which will serve as the external electrode, is applied to each end face of the obtained ceramic laminate by a dipping method or the like and dried. The metal paste contains Ni powder, which is the main component metal, and may also contain powder of the same material or powder of added metal elements. When adding metal elements to the metal paste, the concentration of the added metal element relative to Ni is made smaller than the concentration of the added metal element in the internal electrode pattern (concentration relative to Ni).
[0052] (Firing process) Next, the resulting ceramic laminate is subjected to a binder removal treatment in an N2 atmosphere at 250-500°C, followed by an oxygen partial pressure of 10 -5 ~10 -8 The ceramic capacitor 100 is fired at 1100-1300°C for 10 minutes to 2 hours in a reducing atmosphere of ATM. In this way, the ceramic capacitor 100 is obtained. Note that if the heating rate is increased during the firing process, the metal material will sinter before the co-material is ejected from the metal material, so the co-material is more likely to remain in the internal electrode layer 12. Therefore, the average heating rate from room temperature to the maximum temperature during the firing process is preferably 30°C / min or more, and more preferably 45°C / min or more. Note that if the average heating rate is too high, organic components remaining in the ceramic laminate (those that could not be completely removed by the debinding treatment alone) may not be sufficiently discharged, and problems such as cracks occurring during the firing process may occur. Therefore, the average heating rate is preferably 80°C / min or less, and more preferably 65°C / min or less.
[0053] (Re-oxidation process) Subsequently, a re-oxidation treatment may be performed in an N2 gas atmosphere at 600°C to 1000°C.
[0054] (Plating process) Subsequently, metal coatings such as Cu, Ni, and Sn may be applied to the surfaces of the external electrodes 20a and 20b by plating.
[0055] According to the manufacturing method of this embodiment, the inclusion of a common material in the internal electrode pattern 53 delays the sintering of the metal components contained in the internal electrode pattern 53. Furthermore, by including additive metal elements in addition to the main component Ni in the internal electrode pattern 53, the amount of common material remaining in the internal electrode layer 12 after firing can be increased. Since the common material added for the purpose of delaying sintering does not diffuse into the dielectric layer 11 during the sintering process and remains largely in the internal electrode layer 12, a sufficient sintering delay effect is obtained, and the continuity of the internal electrode layer 12 is improved. In addition, since the concentration of additive metal elements relative to Ni is higher in the internal electrode pattern 53 than in the metal paste used for forming the external electrodes, the additive metal elements diffuse from the internal electrode layer 12 toward the external electrodes 20a and 20b, creating a flow of additive metal elements, which improves the bonding between the internal electrode layer 12 and the external electrodes 20a and 20b. As a result, capacitance reduction due to poor connections can be suppressed, and the desired capacitance and characteristics can be achieved.
[0056] In the embodiments described above, multilayer ceramic capacitors were explained as an example of ceramic electronic components, but the invention is not limited to them. For example, other electronic components such as varistors and thermistors may be used. [Examples]
[0057] Below, a multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were investigated.
[0058] (Example 1) A dielectric green sheet containing barium titanate as a dielectric material was coated, and an internal electrode pattern containing Ni powder, a co-material, and added metal elements was printed to obtain a laminated unit. 200 layers of laminated units were stacked, compressed, and cut. The binder was removed, and a metal paste for the external electrode containing Ni powder and a co-material was applied to two end faces, and the units were fired in a reducing atmosphere. BaTiO3 was used as the co-material for the internal electrode pattern and the metal paste. Au was used as the added metal element for the internal electrode pattern. The amount of Au added to the internal electrode pattern was 1.0 at%, assuming Ni was 100 at%.
[0059] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) / (concentration of added metal elements in the internal electrode layer) at the end margin was 0.52. The end margin is the portion of end margin 15 exemplified in Figure 2. The added metal elements were detected by EDS (energy dispersive X-ray spectroscopy), and the ratio used was (amount of added metal elements detected in the external electrode) / (amount of added metal elements detected in the internal electrode layer). In this case, the EDS analysis was a point analysis, and the detected amount is the amount detected at a predetermined irradiation point. The slope m of the graph calculated from the diameter and volume distribution of the common material was 4.64.
[0060] (Example 2) In Example 2, Sn was used as the added metal element. The amount of Sn added to the internal electrode pattern was 1.0 at%, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0061] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.28. The slope m of the graph calculated from the diameter and volume distribution of the materials was 3.90.
[0062] (Example 3) In Example 3, Cr was used as the added metal element. The amount of Cr added to the internal electrode pattern was 1.0 at%, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0063] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.51. The slope m of the graph calculated from the diameter and volume distribution of the materials was 4.56.
[0064] (Example 4) In Example 4, Fe was used as the added metal element. The amount of Fe added to the internal electrode pattern was 1.0 at%, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0065] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.43. The slope m of the graph calculated from the diameter and volume distribution of the materials was 3.80.
[0066] (Example 5) In Example 5, Y was used as the added metal element. The amount of Y added to the internal electrode pattern was 1.0 at%, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0067] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.44. The slope m of the graph calculated from the diameter and volume distribution of the materials was 3.95.
[0068] (Example 6) In Example 6, In was used as the added metal element. The amount of In added to the internal electrode pattern was 1.0 at%, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0069] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.43. The slope m of the graph calculated from the diameter and volume distribution of the materials was 3.85.
[0070] (Example 7) In Example 7, Au and Sn were used as the added metal elements. The amounts of Au and Sn added to the internal electrode pattern were 0.5 at% and 1.0 at%, respectively, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0071] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.53. The slope m of the graph calculated from the diameter and volume distribution of the materials was 4.77.
[0072] (Example 8) In Example 8, Au and Cr were used as the added metal elements. The amounts of Au and Cr added to the internal electrode pattern were 0.5 at% and 1.0 at%, respectively, assuming Ni was 100 at%. Other conditions were the same as in Example 1.
[0073] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) to (concentration of added metal elements in the internal electrode layer) at the end margin was 0.52. The slope m of the graph calculated from the diameter and volume distribution of the materials was 4.66.
[0074] (Example 9) In Example 9, Au, Sn, and Cr were used as the added metal elements. The amounts of Au, Sn, and Cr added to the internal electrode pattern were 0.5 at%, 0.5 at%, and 1.0 at%, respectively, assuming Ni was 100 at%, respectively. Other conditions were the same as in Example 1.
[0075] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. After firing, the ratio of (concentration of added metal elements in the external electrode before plating layer formation) / (concentration of added metal elements in the internal electrode layer) at the end margin was 0.54. The slope m of the graph calculated from the diameter and volume distribution of the materials was 4.79.
[0076] (Comparative example) In the comparative example, no additional metal elements were added to the internal electrode pattern. Other conditions were the same as in Example 1.
[0077] The thickness of the dielectric layer after firing was 0.6 μm, and the thickness of the internal electrode layer was 0.7 μm. The slope m of the graph calculated from the diameter and volume distribution of the materials was 6.39.
[0078] Figure 8(a) is a traced SEM image of the cross-section in the stacking direction of Example 1. Figure 8(b) is a traced SEM image of the cross-section in the stacking direction of the comparative example. Compared with Figure 8(b), it can be seen that in Figure 8(a), a large amount of the common material 17 remains in the internal electrode layer 12.
[0079] Figure 9 shows graphs calculated from the diameter and volume distribution of the common material in the internal electrolytic competition for Example 1 and the Comparative Example. As shown in Figure 9, the slope m is smaller in Example 1 compared to the Comparative Example. Therefore, it can be seen that more common material remains in Example 1 compared to the Comparative Example. This is thought to be because additional metal elements were added to the internal electrode pattern. Note that 500 common materials were counted in the Comparative Example and 500 common materials were counted in Example 1.
[0080] (Percentage of consecutive wins) The continuity of the internal electrode layer was measured for Examples 1-9 and the Comparative Example. The continuity was determined by embedding the fired multilayer ceramic capacitors in resin and polishing them to the center to expose the cross-section. The cross-section was observed using a scanning electron microscope (SEM), and approximately 10 images were taken. The continuity was then measured from these images. Examples 1-9 showed higher continuity compared to the Comparative Example. This is thought to be because a large amount of the same material remained in the internal electrode layer, sufficiently delaying its shrinkage.
[0081] (zygosity) The bonding performance between the internal electrode layer and the external electrode was investigated for Examples 1-9 and the Comparative Example. The connection state between the internal electrode layer and the external electrode was confirmed from the polished cross-sectional image compared to a multilayer ceramic capacitor made of pure Ni without added additives. For example, in the case of a 200-layer multilayer ceramic capacitor, if an improvement of 15% or more in the bonding state was confirmed compared to a multilayer ceramic capacitor made of pure Ni, the bonding performance was judged as very good ("◎"), if an improvement of 10% or more in the bonding state was confirmed, the bonding performance was judged as good ("〇"), and if the improvement was less than 10% and about the same as pure Ni, the bonding performance was judged as poor ("-"). In the Comparative Example, the bonding performance was judged as poor. This is thought to be because no additive metal elements were added. The bonding state expressed here refers to the state in which the internal electrode and the external electrode are connected in the polished cross-sectional image. In contrast, in Examples 1-9, the bonding performance was judged as very good or good. This is thought to be because the concentration of the additive metal element in the internal electrode layer was higher than the concentration of the additive metal element in the external electrode, causing the additive metal element to diffuse.
[0082] (capacity) Capacitance was measured for each of Examples 1-9 and the Comparative Example. Capacitance was measured using an LCR meter under conditions of 0.5V and 1kHz, and the average value of 100 samples was calculated. Compared to a multilayer ceramic capacitor made of pure Ni without added elements, an improvement of 10% or more in the average capacitance was judged as "very good" (◎), an improvement of 5% or more but less than 10% was judged as "good" (〇), and an improvement of less than 5% was judged as "poor" (-). The Comparative Example was judged to have poor capacitance. In contrast, Examples 1-9 were judged to have very good or good capacitance. This is thought to be because the continuity of the internal electrode layer was higher and the bonding between the internal electrode layer and the external electrode was better than in the Comparative Example.
[0083] (Reliability) The reliability of each of Examples 1-9 and the Comparative Example was investigated. Reliability was determined by performing a HALT test at 6V-125℃. The HALT lifetime was calculated as the average value of 100 samples. Compared to a multilayer ceramic capacitor made of pure Ni without added elements, if the average lifetime was more than twice as good, the reliability was judged as "very good" (◎), if the average lifetime was 1.5 times or more, the reliability was judged as "good" (〇), and if it was the same or less than 1.5 times, the reliability was judged as "poor" (-). The Comparative Example was judged to have poor reliability. In contrast, Examples 1-9 were judged to have very good or good reliability. This is thought to be because the bonding between the internal electrode layer and the external electrode was better than in the Comparative Example. [Table 1] [Table 2]
[0084] Although embodiments of the present invention have been described in detail above, the present invention is not limited to these specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims. [Explanation of Symbols]
[0085] 10 stacked chips 11 Dielectric layer 12 Internal electrode layer 13. Cover layer 14 Capacity area 15 End margin 16 Side margins 17 Common materials 20a,20b external electrode 51 Base material 52 Dielectric Green Sheet 53 Internal electrode pattern 100 Multilayer Ceramic Capacitors
Claims
1. A laminated chip having a substantially rectangular parallelepiped shape, wherein multiple dielectric layers mainly composed of ceramic and multiple internal electrode layers mainly composed of Ni are alternately stacked, and the multiple internal electrode layers are alternately exposed on two opposing end faces of the substantially rectangular parallelepiped shape, The two end faces are provided with an external electrode whose main component is Ni, The aforementioned plurality of internal electrode layers include additive metal elements other than Ni, and co-materials. The external electrode contains the added metal element, The concentration of the added metal element is higher in the internal electrode layer than in the external electrode. The ceramic electronic component is characterized in that the added metal element is one or more selected from Cr, Y, Co, Cu, Mg, and Pd.
2. A laminated chip having a substantially rectangular parallelepiped shape, wherein a plurality of dielectric layers mainly composed of ceramic and a plurality of internal electrode layers mainly composed of Ni are alternately laminated, and the plurality of internal electrode layers are alternately exposed on two opposing end faces of the substantially rectangular parallelepiped shape, The two end faces are provided with an external electrode whose main component is Ni, The aforementioned plurality of internal electrode layers include additive metal elements other than Ni, and co-materials. The external electrode contains the added metal element, The concentration of the added metal element is higher in the internal electrode layer than in the external electrode. A ceramic electronic component characterized in that the ratio of the concentration of the added metal element in the external electrode to which the internal electrode layer is connected to the internal electrode layer is 0.28 or more and 0.54 or less, to the concentration of the added metal element in the internal electrode layer.
3. The ceramic electronic component according to claim 2, characterized in that the added metal element is one or more selected from Au, Sn, Cr, Fe, Y, In, As, Co, Cu, Ir, Mg, Os, Pd, Pt, Re, Rh, Ru, Se, Te, Zn, and Ge.
4. The ceramic electronic component according to any one of claims 1 to 3, characterized in that the concentration of the added metal element in the plurality of internal electrode layers is 0.01 at% or more and 5.0 at% or less relative to Ni.
5. The ceramic electronic component according to any one of claims 1, 3, or 4, characterized in that the ratio of the concentration of the added metal element in the external electrode to which the internal electrode layer is connected to the internal electrode layer is 0.1 or more and 0.5 or less.
6. The ceramic electronic component according to any one of claims 1 to 5, characterized in that, for the plurality of internal electrode layers, the horizontal axis is plotted on the diameter of each of the common materials, and the vertical axis is plotted on the volume distribution (%) such that the sum of the volumes of each of the common materials is 100%, and when the resulting graph is approximated by a straight line connecting the 20th and 80th percentile values, the slope m is 3.8 or more and 5.0 or less.
7. The ceramic electronic component according to any one of claims 1 to 6, characterized in that, within the end margin region where internal electrode layers exposed on the same end face of the laminated chip face each other without intervening internal electrode layers exposed on different end faces, the concentration of the added metal element is higher in the internal electrode layer than in the external electrode.
8. The ceramic electronic component according to any one of claims 1 to 7, characterized in that the thickness of the dielectric layer is 0.8 μm or less.
9. The ceramic electronic component according to any one of claims 1 to 8, characterized in that the thickness of the internal electrode layer is 0.8 μm or less.
10. The ceramic electronic component according to any one of claims 1 to 9, characterized in that the external electrode includes the same material.
11. A dielectric green sheet containing ceramic powder and an internal electrode pattern containing Ni as the main component metal, along with co-materials and added metal elements are alternately stacked to form a roughly rectangular parallelepiped ceramic laminate, and the stacked internal electrode patterns are alternately exposed on two opposing end faces of the ceramic laminate. A metal paste containing Ni as the main component metal and the aforementioned additive metal elements is placed on the two end faces. The ceramic laminate is fired such that the concentration of the added metal element is higher in the internal electrode layer obtained from the internal electrode pattern than in the external electrode obtained from the metal paste. A method for manufacturing ceramic electronic components, characterized in that the added metal element is one or more selected from Cr, Y, Co, Cu, Mg, and Pd.
12. A dielectric green sheet containing ceramic powder and an internal electrode pattern containing Ni as the main component metal, along with co-materials and added metal elements are alternately stacked to form a substantially rectangular parallelepiped ceramic laminate, and the stacked internal electrode patterns are alternately exposed on two opposing end faces of the ceramic laminate. A metal paste containing Ni as the main component metal and the aforementioned additive metal elements is placed on the two end faces. The ceramic laminate is fired such that the concentration of the added metal element is higher in the internal electrode layer obtained from the internal electrode pattern than in the external electrode obtained from the metal paste. A method for manufacturing a ceramic electronic component, characterized in that the ratio of the concentration of the added metal element in the external electrode to which the internal electrode layer is connected to the internal electrode layer is 0.28 or more and 0.54 or less, to the concentration of the added metal element in the internal electrode layer.