On-demand packetization for inter-chip interfaces
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- XILINX INC
- Filing Date
- 2022-05-26
- Publication Date
- 2026-08-05
Smart Images
Figure 0007901154000001 
Figure 0007901154000002 
Figure 0007901154000003
Abstract
Description
Technical Field
[0001] Examples of the present disclosure generally relate to on-demand packetization for transferring data across a chip-to-chip interface where the data words to be transferred exceed the number of wires in the interface.
Background Art
[0002] As computer systems become more densely integrated, chip-to-chip (C2C) interfaces are becoming more widely used. One such computing system is an anchor chip (e.g., a processor, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or a system on a chip (SOC) that communicates with one or more chiplets (e.g., high-speed I / O or high bandwidth memory (HBM)) using a C2C interface. To achieve a chiplet-based architecture, the C2C interface must be clearly defined. The C2C interface is constrained by the area of the beachfront (e.g., the side of the anchor chip) that limits the number of signals and wires that can pass through the interface. Thus, the required bandwidth is achieved by operating the interface at a high data rate.
[0003] However, the data protocol used by the application circuit configuration running on the chip may have a different word size than the data word (DW) supported by the C2C interface. If the data protocol has a larger word size than the DW used by the C2C interface, the chip cannot perform a one-to-one mapping between the protocol word and the DW. Instead, a single protocol word may be subdivided and transmitted over the C2C interface as multiple DWs. However, the protocol word may only be slightly larger than the DW, which means that a significant portion of the C2C bandwidth is wasted. Another approach is to limit the functionality of the bus interface so that less data must be transmitted over the C2C, but reducing functionality may not be an option. [Overview of the project] [Means for solving the problem]
[0004] One embodiment describes an integrated circuit including an application circuit configuration, a chip-to-chip (C2C) interface, and a protocol layer connected between the application circuit configuration and the C2C interface. The protocol layer is configured to packetize the protocol words transmitted over the C2C interface by receiving a plurality of protocol words from the application circuit configuration, wherein each of the plurality of protocol words exceeds the size of a data word (DW) supported by the C2C interface; mapping the plurality of protocol words to separate DWs, wherein each of the sub-parts is less than or equal to the size of the DW; and generating at least one DW that includes the remaining parts of the plurality of protocol words not included in the sub-parts.
[0005] Another embodiment described herein is a system comprising a first integrated circuit connected to a second integrated circuit via a chip-to-chip (C2C) interface, the first integrated circuit comprising a protocol layer connected between an application circuit configuration and the C2C interface. The protocol layer is configured to packetize by receiving a plurality of protocol words transmitted over the C2C interface from the application circuit configuration, wherein each of the plurality of protocol words exceeds the size of a data word (DW) supported by the C2C interface; mapping sub-parts of the plurality of protocol words to separate DWs, wherein each sub-part is less than or equal to the size of the DW; and generating at least one DW containing the remaining parts of the plurality of protocol words not included in the sub-parts.
[0006] Another embodiment described herein is a method in the protocol layer of an integrated circuit that includes receiving a plurality of protocol words transmitted over a C2C interface, wherein each of the plurality of protocol words exceeds the size of a data word (DW) supported by the C2C interface; and packetizing the plurality of protocol words by mapping sub-parts of the plurality of protocol words to separate DWs, wherein each sub-part is less than or equal to the size of the DW; and generating at least one DW that includes the remaining parts of the plurality of protocol words not included in the sub-parts.
[0007] To ensure a detailed understanding of the above features, a more specific explanation, concisely summarized above, can be provided by referring to exemplary implementations, some of which are illustrated in the attached drawings. However, it should be noted that the attached drawings illustrate only typical exemplary implementations and should therefore not be considered limiting in scope. [Brief explanation of the drawing]
[0008] [Figure 1] This is a block diagram of a communication system having a packetizer for on-demand packetization for an inter-chip interface, according to one embodiment. [Figure 2] This is a flowchart for performing on-demand packetization according to one embodiment. [Figure 3] This example illustrates the packetization of data transmitted via a C2C interface. [Figure 4] This is a flowchart for encoding control signals to avoid packetization, according to one embodiment. [Figure 5] This example illustrates control signals that can be encoded and control signals that cannot be encoded. [Figure 6] This is a flowchart for decoding a control signal and performing reverse packetization on a data word received via a C2C interface, according to one embodiment. [Modes for carrying out the invention]
[0009] Various features are described below with reference to the drawings. Note that the drawings may or may not be drawn to scale, and elements of similar structure or function are represented by the same reference numerals throughout the drawings. Note that the drawings are intended solely to facilitate the description of the features. They are not intended as an exhaustive description of the features or as a limitation on the scope of the claims. In addition, illustrated examples do not necessarily have all the embodiments or advantages shown. Embodiments or advantages described in relation to a particular embodiment are not necessarily limited to that embodiment and may be implemented in any other embodiment even if not illustrated or explicitly described in that way.
[0010] Embodiments of this specification describe on-demand packetization in which data that is too large to be directly converted to a DW for a C2C interface is instead packetized. For example, due to limited wires, C2C may be able to support only 288 bits of DW, but a protocol (e.g., a data streaming protocol) may generate a word that is 300 bits. The protocol word may be mapped to two DWs when transmitted over the C2C interface, meaning that 576 bits of the C2C interface are used to transmit only 300 bits, resulting in the utilization of 52% of the C2C interface's bandwidth. Alternatively, the protocol layer may perform packetization in which multiple protocol words are packetized and transmitted as a transfer when it identifies a protocol word that is larger than the DW of the C2C interface. In one embodiment, the protocol layer removes some or all of the control data or signals (e.g., strobe signals, redundant bits, error correction bits, flags, etc.) within the protocol word so that the protocol word no longer exceeds the size of the DW. These shortened protocol words can then be mapped to DWs and transmitted over the C2C as separate packets. Next, the protocol layer can collect the portion of control data removed from the protocol word and transmit this data as a separate packet over the C2C interface. This may introduce some latency (because the receiving chip must wait for the control bits to be received before it can reconstruct the protocol word), but it reduces the amount of bandwidth wasted on the C2C interface.
[0011] In another embodiment, instead of packetizing a large protocol word, the protocol layer may encode the control data to reduce the size of the protocol word so that the protocol word is less than or equal to the size of the data writing (DW). For example, the control data may have a sequence of consecutive ones or zeros. Instead of storing each one or zero, the protocol layer only needs to encode the protocol word to indicate where the sequence begins or ends. However, if the protocol layer cannot encode the protocol word so that it is smaller than the DW, packetization may be used.
[0012] Figure 1 is a block diagram of a communication system 100 having a packetizer 125 for on-demand packetization for a C2C interface 140, according to one embodiment. As shown, the system 100 includes integrated circuits (ICs or chips) 105A and 105B. The communication system 100 can be an anchor chiplet system, or any other system in which two ICs communicate directly using a C2C interface. IC 105 can be an ASIC, FPGA, SoC, CPU, memory, etc. One IC 105 may be a primary IC and the other a secondary IC, or IC 105 may be a peer. In one embodiment, IC 105 may be arranged side by side on the same substrate, or may be arranged in a stacked configuration.
[0013] In this example, each IC 105 includes similar components, namely, an application circuit configuration 110, a protocol layer 120, a link layer 130, and a physical (PHY) layer 135. The application circuit configuration 110 represents any circuit configuration that performs user functions. The circuit configuration 110 may include non-programmable (enhanced) circuit configurations such as a processor core, a data processing engine, or a graphics processing unit. Alternatively, the circuit configuration 110 may include programmable circuit configurations such as a configurable logic block (CLB) or other types of programmable logic that can be customized on the fly by the user. In either case, the application circuit configuration 110 generates data that is transferred to other ICs 105 using the C2C interface 140.
[0014] The application circuit configuration 110 transmits data to other hardware elements within the IC 105 (e.g., the protocol layer 120) using a specific protocol. This protocol is often different from the protocol used to transmit data over the C2C interface 140. When the protocol layer 120 transmits data received from the application circuit configuration 110 over the C2C interface 140, it performs a conversion to map protocol words 115, which are compatible with the protocol used by the application circuit configuration 110, to DW 150, which are compatible with the C2C interface 140. The embodiments described herein are not limited to any particular type of protocol and can be applied to any IC whose internal circuit configuration uses a communication protocol different from or incompatible with the C2C interface 140. For example, the application circuit configuration 110 may use data protocols such as AXI (Advanced eXtensible Interface), AXI Streaming, AMBA-CXS (Advanced Microcontroller Bus Architecture), or PCIe (Peripheral Component Interconnect Express).
[0015] The protocol layer 120 includes a packetizer 125 for converting protocol words 115 to DW150 and DW150 to protocol words 115. As will be discussed in more detail below, generally, the packetizer 125 (e.g., a circuit configuration within the protocol layer 120) removes some or all of the control data of the protocol word 115, so that the resulting shortened protocol word 115 can be mapped one-to-one to the DW150. The removed control data can then be transmitted in a separate packet (e.g., another DW150). The packetizer 125 in the receiving IC 105 can then reconstruct the protocol word 115 from the packet (e.g., DW150) and transmit the protocol word 115 to the application circuit configuration. In this way, the bandwidth of the C2C interface 140 may be used more efficiently for mapping one protocol word 115 to two or more DW150s.
[0016] IC105 also includes link layer 130 and PHY layer 135 for communication along the C2C interface 140. As described above, the C2C interface 140 may have limited area to form wire connections between IC105s. As a result, the size (e.g., number of bits) in DW150 may be smaller than the size of the protocol word 115. However, packetization may be performed to reduce the size of the protocol word 115 in an efficient manner to maximize the bandwidth of the C2C interface.
[0017] Figure 2 is a flowchart of method 200 for on-demand packetization according to one embodiment. In block 205, a packetizer in the protocol layer determines whether the protocol word received from the application circuit configuration exceeds the size of the data write (DW) used to transmit data over the C2C interface. In this embodiment, the protocol word may or may not be larger than the DW. For example, some protocol words may have more data or more control bits than other protocol words. In another example, the application circuit configuration may use two different protocols to transmit data to the protocol layer, with one protocol (e.g., a streaming protocol) having protocol words that exceed the size of the DW, while the other protocol (e.g., a memory-mapped protocol) does not.
[0018] If the protocol word does not exceed the size of the data writing (DW), in block 210, the packetizer performs a one-to-one mapping of the protocol word to the DW. That is, every bit in the protocol word can be mapped to the corresponding bit in the DW. As a result, the protocol word can be transmitted over a single DW via the C2C interface.
[0019] However, if the protocol word exceeds the size of the DW, in block 215, the packetizer packets multiple protocol words. That is, the packetizer shortens the protocol word by removing all or part of the control data / bits within the word so that the shortened protocol word can be mapped to the corresponding DW and transmitted over the C2C interface.
[0020] This packetization can be represented in two blocks. In block 220, the packetizer maps the data portion of the protocol word to separate DW packets. For example, the packetizer can remove all of the control bits from the protocol word so that the protocol word contains only data bits (e.g., user or application data) and is below DW. As a result, these protocol words can be mapped one-to-one with DW.
[0021] In another example, the packetizer removes only some of the control bits (e.g., strobe signals) so that the protocol word contains not only data bits or user data but also the remaining portion of the control bits, while leaving other types of control bits (e.g., error redundancy bits). Again, this assumes that removing some of the control bits sufficiently shrinks the protocol word so that it is below DW. Whether all of the control data / bits are removed or only some of the control data / bits are removed, the shortened protocol word is then mapped to DW and can be transmitted as each packet.
[0022] In block 225, the packetizer generates a DW packet that contains the control data removed from each of the multiple protocol words in block 220. That is, the packetizer can collect the control data / bits removed from all of the protocol words in block 220 and then transmit this control data via the C2C interface in its own packet (e.g., DW). Blocks 220 and 225 are illustrated in Figure 3.
[0023] Figure 3 illustrates the packetization of data transmitted via a C2C interface according to an embodiment. In this example, a transmitter (e.g., one of the IC105s in FIG. 1) desires to transmit eight protocol words 115 to a receiver (e.g., another one of the IC105s in FIG. 1). Each of the protocol words 115 includes control data and user data. Assume that the total size of each protocol word 115 (control data + user data) exceeds the size of a DW supported by the C2C interface.
[0024] To reduce the size of the protocol word 115 so that the protocol word 115 can be mapped to a DW, the packetizer removes the control data from each of the protocol words 115. As shown in the lower left of FIG. 3, the packetizer transmits the user data (e.g., the data portion) of the protocol word 115 as separate DWs (i.e., DW150B to DW150I). The packetizer also collects the control data removed from the protocol word 115 and transmits it as a separate packet (i.e., DW150A). In this way, the eight protocol words 115 are packetized and transmitted as nine DWs 150A to DW150I on the C2C interface.
[0025] Although FIG. 3 illustrates removing all the control data as described above, the packetizer may only remove some of the control data to sufficiently reduce the size of the protocol word 115 to perform a one-to-one mapping with a DW. Further, the number of protocol words 115 packetized as a group (whose control data is collected) can be a user-set attribute. Although FIG. 3 illustrates packetizing eight protocol words 115, in other embodiments, four or sixteen protocol words 115 can be collected and packetized. For example, the packetizer can receive four protocol words, remove all or some of the control data from those words, and transmit five (or six) DWs on the C2C interface (one of those five DWs (or two of those six DWs) includes control data).
[0026] The right side of Figure 3 illustrates a receiver that receives nine DW150A to DW150I packets at the protocol layer. In order to convert the DW150 back to the same protocol word 115 generated by the transmitter, the packetizer must receive a DW150A containing control data. Upon receiving this packet, the packetizer can reconstruct the protocol word 115 by combining the control data in DW150A with the corresponding user data in DW150B to DW150I.
[0027] Implementing packetization can result in improved bandwidth utilization compared to, for example, mapping each protocol word to two DWs. In that case, the C2C interface would have to transmit 16 DWs for eight protocol words 115. Packetization may inject some additional latency (because the packetizer must wait for DW150A containing control data to translate DW150B~I back to protocol word 115), but the C2C interface would only have to transmit nine DWs, which saves bandwidth that could be used to transmit other protocol words (e.g., another batch of eight protocol words).
[0028] Figure 4 is a flowchart of Method 400 for encoding control signals to avoid packetization, according to one embodiment. Packetization can improve performance over mapping a protocol word to multiple data walls (DWs), but it adds latency. Therefore, encoding control data within a protocol word so that the size of the protocol word is less than or equal to the size of the DW may be advantageous because doing so allows for one-to-one mapping and avoids the latency associated with packetization. Method 400 illustrates a packetizer capable of encoding control data.
[0029] In block 405, the packetizer determines whether the protocol word exceeds the size of the data writing (DW). This can be similar to block 205 in method 200, where in some cases the protocol word may be larger than the DW, and in other cases it may be less than or equal to the DW. If the protocol word is less than or equal to the DW, method 400 proceeds to block 210 of method 200, where the protocol word is transmitted using a one-to-one mapping. Otherwise, method 400 proceeds to block 410, where the packetizer determines whether the control signal contains a hole. In other words, the packetizer determines whether the control data within the protocol word can be encoded into a smaller size. Generally, if the control data contains a hole, for example, a series of ones bounded on both sides by zeros, a series of zeros bounded on both sides by ones, a series of ones ending in a word that is not the last word in a transfer of multiple protocol words, or a series of ones beginning in the last word in a transfer of multiple protocol words, this means that the control data cannot be encoded. In that case, method 400 proceeds to block 215 of method 200, and packetization is performed as shown in Figure 3.
[0030] Figure 5 illustrates, in one embodiment, control data that can be encoded and control data that cannot be encoded. Specifically, Figure 5 illustrates control data in the transmission of a protocol word with holes and control data without holes. The control data in Figure 5 is a strobe signal in AXI streaming, but the embodiments herein can be applied to any protocol having control data having a series of 1s or zeros (e.g., an identifiable pattern). In this example, the shaded portion of the control data represents "1" (active bits), and the blank portion of the control data represents "zero" (inactive bits). Furthermore, the embodiments can be applied to any protocol having control data having other types of identifiable patterns. For example, the control data may have one or more patterns of 1s and zeros (e.g., 0011001100) that can be encoded using fewer bits. Thus, the embodiments are not limited to control data containing a series of 1s or zeros.
[0031] The top four examples in Figure 5 illustrate control data for the transmission of protocol words that do not contain holes. In these examples, the control data can be encoded or compressed. For example, instead of transmitting all bits in the control data, the DW can indicate only the position of the first valid byte in a protocol word that is not the last in the transmission (i.e., when TLAST is 0), or the position of the first invalid byte in the last protocol word in the transmission (i.e., when TLAST is 1). Flag bits can be used to indicate when all bytes of data in the control data for a transmission are valid. In this way, when there are no holes in the strobe signal, the DW requires only a few bits (e.g., 32 bits or less) to encode or represent all of the control data. This encoding or compression of the control data may be sufficient to reduce the size of the protocol word so that a one-to-one mapping can be made between the encoded protocol word and the DW. For example, if the protocol word is 300 bits but the DW is 288, encoding the control data in the protocol word can reduce it to 288 bits or less so that each bit can be mapped to the corresponding bit in the DW.
[0032] The six examples at the bottom of Figure 5 illustrate embodiments where holes exist in the control data, meaning that the control data cannot be encoded or compressed. Using AXI streaming as one embodiment, the transmission of a protocol word has holes if one or more of the following conditions are false: TLAST == 0 AND TKEEP[W-1] == 0 TKEEP[N-1:0] is all 1, TKEEP[M-1:N+K] is all 1, and TKEEP[N+K-1:N] is all 0, where K≧1, M>N+1, and M≦W. TKEEP[N-1:0] is all 0, TKEEP[M-1:N+K] is all 0, and TKEEP[N+K-1:N] is all 1, where K≧1, M>N+1, and M≦W. TLAST==1 and TKEEP[0]==0, where W is the width of the TKEEP signal in the AXI-S interface, M is the data bit in the protocol word, and N is the control bit in the protocol word.
[0033] Returning to Method 400, assuming there are no holes in the transfer (e.g., a group of protocol words), Method 400 proceeds to block 415, where the packetizer encodes the control data such that the size of the encoded protocol words does not exceed the size of the DW. Using the example in Figure 5, some bits of the DW are used to indicate the position of the first valid byte in a protocol word that is not the last in the transfer, or the position of the first invalid byte in the last protocol word in the transfer. Flag bits can be used to indicate when all bytes of data in the control data for the transfer are valid.
[0034] In block 420, the packetizer can perform a one-to-one mapping for the encoded protocol word in each DW transmission. As a result, the encoded protocol word can be transmitted over C2C with the same efficiency as the original protocol word, which did not exceed the size of the DW. Therefore, encoding the protocol word avoids the latency introduced by packetization.
[0035] Encoding protocol words can be described mathematically. Assume that a protocol (e.g., a bus interface) transmits a word containing M data bits (e.g., user data) and N control bits to a protocol layer. Assume that DW has D available wires. The problem is as follows. That is, if M+N>D, M<D, and N<D, define a method to limit N to K under a restricted function such that M+K≦D, define a method to packetize N when N cannot be limited to K, and achieve a desired trade-off between bandwidth and latency. When a transfer arrives such that N cannot be compressed to K, the packetizer packetizes the transfer as indicated by the "yes" result of block 410 of block 410. Packetization is expressed as follows. That is, let R be a positive integer such that N*R≦D-1<N*(R+1). The packetizer accumulates R transfers, strips off N control bits, and accumulates them separately in a register. When R transfers are accumulated, the packetizer transmits a "header" flit that becomes R control bits, followed by R transfers. This is illustrated in FIG. 3 above.
[0036] Instead, if N can be compressed to K, the packetizer compresses the protocol word so that these encoded words can be mapped one-to-one with DW. This is illustrated by blocks 415 and 420 of method 400.
[0037] Furthermore, method 400 can be modified to be used with protocols that always generate protocol words that exceed the size of the DW. In that case, the logic of block 405 can be omitted because the protocol word is always larger than the DW. However, packetization is still "on demand" because the packetizer can determine on the fly whether the protocol word can be encoded or compressed (e.g., when the control data has no holes), and if so, can transmit the encoded protocol word without performing packetization. However, if the protocol word cannot be compressed or encoded so that its size is reduced to or less than the size of the DW, packetization is performed.
[0038] Figure 6 is a flowchart of Method 600, according to one embodiment, for decoding a control signal and performing reverse packetization on a data word received at an inter-chip interface. While Method 400 describes the logic within the packetizer in the transmitter IC, Method 600 describes the logic within the packetizer in the receiver IC.
[0039] In block 605, the packetizer receives the DW from the PHY layer and the link layer after it has been transmitted over the C2C interface. In block 610, the packetizer determines, using encoded control data or by packetization, whether the DW was transmitted normally (i.e., without encoding or packetization). For example, the first DW in transmission may have one or more bits used to indicate how the transmitting packetizer processed the protocol word (e.g., direct one-to-one mapping to the DW, performing control data encoding, or packetization).
[0040] If the DW is transmitted normally (i.e., the original protocol word did not exceed the size of the DW), method 600 proceeds to block 615, where the packetizer converts the DW back to a protocol word.
[0041] However, if the transmitting packetizer has encoded the control data, method 600 proceeds to block 620, where the receiving packetizer decodes the control data in the DW. That is, the packetizer can evaluate the encoded data and determine the position of the first valid byte in a protocol word that is not the last in transmission, or the position of the first invalid byte in the last protocol word in transmission. Alternatively, the packetizer can evaluate flag bits to determine when all bytes of data in the control data for transmission are valid.
[0042] In block 625, once decrypted, the packetizer can use this information to convert the decrypted DW back into the original protocol word.
[0043] If the DW is packetized, method 600 proceeds to block 630, and the receiving packetizer waits until it has received the entire packet transfer. For example, as shown in Figure 3, the packetizer may know that each packetized transfer contains nine DWs, and therefore, upon detecting that a DW is the first word in the transfer, the packetizer waits until it has received all nine DWs in that transfer.
[0044] In block 635, the packetizer merges the removed control data back into the protocol word. In this way, the packetization process is reversed so that the original protocol word is reconstructed as shown by the final step in Figure 3.
[0045] The embodiments presented in this disclosure are referenced above. However, the scope of this disclosure is not limited to any specific described embodiments. Rather, any combination of the features and elements described is intended to implement and practice the intended embodiments, whether or not they relate to different embodiments. Furthermore, while the embodiments disclosed herein may achieve advantages over other possible solutions or the prior art, whether or not a particular advantage is achieved by a given embodiment does not limit the scope of this disclosure. Accordingly, the aforementioned aspects, features, embodiments, and advantages are merely illustrative and shall not be considered elements or limitations of the appended claims unless expressly enumerated in the claims.
[0046] As will be understood by those skilled in the art, the embodiments disclosed herein may be embodied as systems, methods, or computer program products. Accordingly, embodiments may take the form of entirely hardware embodiments, entirely software embodiments (including firmware, resident software, microcode, etc.), or embodiments that combine software and hardware embodiments, all of which may be generally referred to herein as “circuits,” “modules,” or “systems.” Furthermore, embodiments may take the form of computer program products embodied in one or more computer-readable media in which computer-readable program code is embodied.
[0047] Any combination of one or more computer-readable media may be used. A computer-readable media may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any preferred combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include electrical connections with one or more wires, portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any preferred combination thereof. In the context of this specification, a computer-readable storage medium is any tangible medium that contains or can store programs for use by, or in connection with, an instruction execution system, apparatus, or device.
[0048] A computer-readable signal medium may include, for example, a propagating data signal in which computer-readable program code is embodied, either in the baseband or as part of a carrier wave. Such a propagating signal may take any of various forms, including but not limited to electromagnetic, optical, or any preferred combination thereof. A computer-readable signal medium may be any computer-readable medium, rather than a computer-readable storage medium, that can communicate, propagate, or transfer a program for use by or in connection with an instruction execution system, apparatus, or device.
[0049] Program code, embodied on a computer-readable medium, can be transmitted using any suitable medium, including but not limited to wireless, wireline, fiber optic cable, RF, or any preferred combination thereof.
[0050] Computer program code for performing the operations of the embodiments of this disclosure may be written in any combination of one or more programming languages, including, for example, object-oriented programming languages such as Java®, Smalltalk, and C++, and conventional procedural programming languages such as the C programming language or similar programming languages. The program code may run entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer, partially on a remote computer, or fully on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it may be connected to an external computer (for example, via the Internet using an Internet service provider).
[0051] Aspects of the present disclosure are described below with reference to the flowcharts and / or block diagrams of the methods, apparatus (systems), and computer program products according to the embodiments presented herein. It will be understood that each block in the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general-purpose computer, a dedicated computer, or another programmable data processing device such that instructions executed via the processor of the computer or other programmable data processing device result in a machine that creates means for implementing the functions / actions specified in the blocks of the flowcharts and / or block diagrams.
[0052] These computer program instructions can also be stored in a computer-readable storage medium, which can instruct a computer, a programmable data processing device, and / or other device to function in a particular manner, so as to produce a product that includes instructions that implement the modes of function / action specified in the blocks of a flowchart and / or block diagram.
[0053] Computer program instructions can also be loaded into a computer, other programmable data processing device, or other device to execute a series of operational steps on the computer, other programmable device, or other device, thereby generating a computer implementation process. Thus, instructions executed on a computer or other programmable device provide a process for implementing functions / actions specified in blocks of flowcharts and / or block diagrams.
[0054] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions described in a block may occur in a different order than shown in the figure. For example, two consecutively shown blocks may actually be executed substantially simultaneously, or the blocks may be executed in reverse order depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowchart illustrations, and combinations of blocks in the block diagrams and / or flowchart illustrations, may be implemented by a dedicated hardware-based system that performs a specified function or action, or executes a combination of dedicated hardware and computer instructions.
[0055] Some non-exclusive examples of disclosure techniques can be expressed as follows:
[0056] Example 1. An integrated circuit, Application circuit configuration, Chip-to-chip (C2C) interface and The application circuit configuration and the C2C interface are connected to a protocol layer, and the protocol layer is The process involves receiving multiple protocol words transmitted over a C2C interface from an application circuit configuration, wherein each of the protocol words exceeds the size of a data word (DW) supported by the C2C interface. Multiple protocol words, Mapping sub-parts of multiple protocol words to separate DWs, where each sub-part is less than or equal to the size of the DW; An integrated circuit configured to packetize by generating at least one DW containing the remaining parts of multiple protocol words not included in the sub-part.
[0057] Example 2. The integrated circuit according to Example 1, wherein the remaining portion of the multiple protocol words contains control data within the multiple protocol words, and the sub-part contains user data.
[0058] Example 3. The integrated circuit according to Example 2, wherein at least one DW includes control data from each of a plurality of protocol words, but does not include user data from the plurality of protocol words.
[0059] Example 4. The integrated circuit according to Example 1, wherein the size of the DW is limited by the number of wires in the C2C interface.
[0060] Example 5. Link layer and The integrated circuit according to Example 1, further comprising a physical (PHY) layer, wherein the link layer and the PHY layer are coupled between the protocol layer and the C2C interface.
[0061] Example 6. The integrated circuit according to Example 1, wherein the protocol layer is configured to determine, before packetizing the multiple protocol words, that at least one of the multiple protocol words contains control data that cannot be encoded in such a way that the size of at least one of the multiple protocol words is less than or equal to the size of the DW.
[0062] Example 7. The protocol layer is The application circuit configuration receives a first protocol word, Determining that the control data within the first protocol word can be encoded in such a way that the size of the first protocol word is reduced to less than or equal to the size of the DW, The integrated circuit according to Embodiment 1, configured to transmit a first protocol word containing encoded control data over a C2C interface without packetization.
[0063] Example 8. The integrated circuit according to Example 7, wherein the encoded control data indicates the location of an identifiable pattern within a first protocol word.
[0064] Example 9. A system, A first integrated circuit connected to a second integrated circuit via a chip-to-chip (C2C) interface, The first integrated circuit includes a protocol layer connected between the application circuit configuration and the C2C interface, and the protocol layer is The process involves receiving multiple protocol words transmitted over a C2C interface from an application circuit configuration, wherein each of the protocol words exceeds the size of a data word (DW) supported by the C2C interface. Multiple protocol words, Mapping sub-parts of multiple protocol words to separate DWs, where each sub-part is less than or equal to the size of the DW; A system configured to packetize by generating at least one DW that includes the remaining parts of multiple protocol words not included in the sub-part.
[0065] Example 10. The system according to Example 9, wherein the remaining part of the multiple protocol words contains control data within the multiple protocol words, and the sub-part contains user data.
[0066] Example 11. The system according to Example 10, wherein at least one DW contains control data from each of the multiple protocol words, but does not contain user data from the multiple protocol words.
[0067] Example 12. The system according to Example 9, wherein the size of the DW is limited by the number of wires in the C2C interface.
[0068] Example 13. Link layer and The system according to Example 9, further comprising a physical (PHY) layer, wherein the link layer and the PHY layer are coupled between the protocol layer and the C2C interface.
[0069] Example 14. The system according to Example 9, wherein the protocol layer is configured to determine, before packetizing the multiple protocol words, that at least one of the multiple protocol words contains control data that cannot be encoded in such a way that the size of at least one of the multiple protocol words is less than or equal to the size of the DW.
[0070] Example 15. The protocol layer is The application circuit configuration receives a first protocol word, Determining that the control data within the first protocol word can be encoded in such a way that the size of the first protocol word is reduced to less than or equal to the size of the DW, The system according to Embodiment 9, configured to transmit a first protocol word containing encoded control data over a C2C interface without packetization.
[0071] Example 16. The system according to Example 15, wherein the encoded control data indicates the location of an identifiable pattern within a first protocol word.
[0072] Example 17. A method, In the protocol layer of an integrated circuit, receiving multiple protocol words transmitted over a C2C interface, wherein each of the multiple protocol words exceeds the size of a data word (DW) supported by the C2C interface. Multiple protocol words, Mapping sub-parts of multiple protocol words to separate DWs, where each sub-part is less than or equal to the size of the DW; A method comprising: generating at least one DW containing the remaining parts of multiple protocol words not included in the sub-parts; and packetizing by doing so.
[0073] Example 18. The method of Example 17, wherein the remaining part of the multiple protocol words includes control data within the multiple protocol words, and the sub-part includes user data.
[0074] Example 19. The method according to Example 18, wherein at least one DW contains control data from each of a plurality of protocol words, but does not contain user data from the plurality of protocol words.
[0075] Example 20. The method according to Example 17, wherein the size of the DW is limited to the number of wires in the C2C interface.
[0076] The above applies to specific examples, but other and further examples may be devised without departing from the basic scope, and the scope will be determined by the following "Claims".
Claims
1. It is an integrated circuit, Application circuit configuration, Chip-to-chip (C2C) interface and The application circuit configuration and the C2C interface are connected to a protocol layer, and the protocol layer is The process involves receiving a plurality of protocol words transmitted over the C2C interface from the application circuit configuration, wherein each of the plurality of protocol words exceeds the size of a data word (DW) supported by the C2C interface. The aforementioned multiple protocol words, Mapping sub-parts of the aforementioned plurality of protocol words to separate DWs, wherein each of the sub-parts is less than or equal to the size of the DW, An integrated circuit configured to perform packetization by generating at least one DW including the remaining parts of the plurality of protocol words not included in the sub-part.
2. The integrated circuit according to claim 1, wherein the remaining portion of the plurality of protocol words includes control data within the plurality of protocol words, and the sub-portion includes user data.
3. The integrated circuit according to claim 2, wherein the at least one DW includes control data from each of the plurality of protocol words, but does not include user data from the plurality of protocol words.
4. The integrated circuit according to claim 1, wherein the size of the DW is limited to the number of wires in the C2C interface.
5. Link layer and The integrated circuit according to claim 1, further comprising a physical (PHY) layer, wherein the link layer and the PHY layer are coupled between the protocol layer and the C2C interface.
6. The integrated circuit according to claim 1, wherein the protocol layer is configured to determine, before packetizing the plurality of protocol words, whether at least one of the plurality of protocol words contains control data that cannot be encoded such that the size of the at least one is less than or equal to the size of the DW.
7. The aforementioned protocol layer Receiving a first protocol word from the aforementioned application circuit configuration, It is determined that the control data within the first protocol word can be encoded in such a way that the size of the first protocol word is reduced to less than or equal to the size of the DW, The integrated circuit according to claim 1, configured to transmit the first protocol word containing the encoded control data over the C2C interface without packetization, based on the determination that the control data can be encoded, wherein the encoded control data indicates the position of an identifiable pattern within the first protocol word.
8. It is a system, The first integrated circuit and The system comprises a second integrated circuit connected to the first integrated circuit via a chip-to-chip (C2C) interface, The first integrated circuit comprises a protocol layer connected between the application circuit configuration and the C2C interface, and the protocol layer is The process involves receiving a plurality of protocol words transmitted over the C2C interface from the application circuit configuration, wherein each of the plurality of protocol words exceeds the size of a data word (DW) supported by the C2C interface. The aforementioned multiple protocol words, Mapping sub-parts of the aforementioned plurality of protocol words to separate DWs, wherein each of the sub-parts is less than or equal to the size of the DW, A system configured to packetize by generating at least one DW including the remaining parts of the plurality of protocol words not included in the sub-parts.
9. The system according to claim 8, wherein the remaining portion of the plurality of protocol words includes control data within the plurality of protocol words, the sub-portion includes user data, and the at least one DW includes control data from each of the plurality of protocol words but does not include user data from the plurality of protocol words.
10. The system according to claim 8, wherein the size of the DW is limited to the number of wires in the C2C interface.
11. The first integrated circuit is Link layer and The system according to claim 8, further comprising a physical (PHY) layer, wherein the link layer and the PHY layer are coupled between the protocol layer and the C2C interface.
12. The system according to claim 8, wherein the protocol layer is configured to determine, before packetizing the plurality of protocol words, whether at least one of the plurality of protocol words contains control data that cannot be encoded such that the size of the at least one is less than or equal to the size of the DW.
13. The aforementioned protocol layer Receiving a first protocol word from the aforementioned application circuit configuration, It is determined that the control data within the first protocol word can be encoded in such a way that the size of the first protocol word is reduced to less than or equal to the size of the DW, The system according to claim 8, configured to transmit the first protocol word containing the encoded control data over the C2C interface without packetization, based on the determination that the control data can be encoded.
14. The system according to claim 13, wherein the encoded control data indicates the location of an identifiable pattern within the first protocol word.
15. It is a method, In the protocol layer of an integrated circuit, receiving multiple protocol words transmitted over a C2C interface, wherein each of the multiple protocol words exceeds the size of a data word (DW) supported by the C2C interface. The aforementioned multiple protocol words, Mapping sub-parts of the aforementioned plurality of protocol words to separate DWs, wherein each of the sub-parts is less than or equal to the size of the DW, A method comprising: generating at least one DW including the remaining parts of the plurality of protocol words not included in the sub-parts; and packetizing by doing so.