Cascade-type energy storage power conversion system and control method for suppressing second harmonic currents

Abstract

This invention provides a cascade-type power conversion system and control method for energy storage that suppresses second-harmonic currents. [Solution] The cascade-type energy storage power conversion system provides low-impedance bypass to secondary harmonic currents by adding decoupling inductors and decoupling capacitors to the AC side of the submodules. The control method generates a differential mode modulation signal for the submodule H-bridge converter by proportional-integral control based on the transmission grid voltage, output current, and active / reactive power references; detects and extracts secondary harmonic current components based on the DC side battery cluster current of each submodule, suppresses them precisely by closed-loop control, generates a common mode modulation signal for the submodule based on this, and drives and operates the power switching device by superimposing the differential mode modulation signal and the common mode modulation signal.

Description

[Technical Field]

[0001] "Cross-referencing of related applications" This invention claims priority to the Chinese patent application filed with the Chinese National Patent Office on 22 July 2025, application number 202511006382.3, title "Cascade-type energy storage power conversion system and control method for suppressing secondary harmonic currents," all of which are incorporated herein by reference for all purposes.

[0002] The present invention relates to the field of power electronics, and more particularly to a cascade-type power conversion system (PCS) and control method for suppressing second harmonic currents. [Background technology]

[0003] This section of the explanation merely provides background information related to the present invention and does not necessarily constitute prior art.

[0004] Energy storage systems based on cascaded H-bridge converters can directly output high voltages of 6kV or more by connecting multiple H-bridge converters in series. These energy storage systems can be directly connected to a medium-voltage distribution network and do not require a step-up transformer, thus offering the advantages of high efficiency and large capacity. However, when an H-bridge converter outputs AC power, its instantaneous power contains a component of twice the commercial frequency, and this component may be transmitted to the DC side, resulting in a large-amplitude second-harmonic current. Excessively large second-harmonic currents can adversely affect battery life and the stable operation of the system.

[0005] Conventional technologies have disclosed many methods for suppressing the DC double frequency, but it has been difficult to balance system cost and suppression effectiveness. For example, (1) Connecting an LC filter in series with the DC side of the H-bridge converter suppresses the second harmonic current on the battery side. However, because the frequency of the second harmonic current is low, the capacitance of the inductor and capacitor elements required for the LC filter is large, increasing the system volume and raising costs.

[0006] (2) Injecting a third harmonic into the modulated signal converts the second harmonic component into a harmonic component, thereby reducing the amplitude of the second harmonic current. However, the suppression effect of this method still has some limitations. On the one hand, injecting a third harmonic may introduce a fourth harmonic current on the DC side. On the other hand, overshoot phenomena are more likely to occur in the modulated signal, affecting the suppression effect. Therefore, conventional control policies based on third harmonic injection still have limited effectiveness in suppressing second harmonic currents and are not able to meet the requirements of high-performance power electronics conversion systems.

[0007] (3) To reduce the amplitude of ripple current, an active power filter is connected in parallel to the DC side of the H-bridge converter, but this proposed technique requires extra power devices, complicates control, and increases system costs. [Overview of the project]

[0008] To solve the above problems, the present invention proposes a cascade PCS and control method for suppressing second harmonic currents. The proposed method uses a cascade PCS based on a differential topology to effectively suppress second harmonic currents on the battery side of an energy storage system through active power decoupling control, thereby improving system stability and battery life.

[0009] In some embodiments, the following technical means are employed: A cascade PCS for suppressing second harmonic currents, comprising a cascade unit in which N submodules are connected in series, three of which are provided and connected phase by phase to a three-phase (A-phase, B-phase, and C-phase) power grid, each of the N submodules being connected sequentially and comprising a battery cluster in which multiple battery cells are connected in series, a DC-side LC filter, and an H-bridge converter, the H-bridge converter comprising two half-bridges which are a U-bridge arm and a V-bridge arm, respectively, where one decoupling inductor is connected to the AC side of each half-bridge of the H-bridge converter, the N submodules being connected in series to each other based on the decoupling inductors and then connected in series to the three-phase power grid, and in each of the N submodules, each decoupling inductor is connected in series to one decoupling capacitor and then connected to the negative terminal of the battery cluster of the submodule in which it is located.

[0010] In some other embodiments, the following technical means are employed: A control method for a cascade-type PCS to suppress second harmonic currents, To establish a mathematical model of a cascade PCS and determine the AC-side decoupling capacitor parameters, The process involves extracting angular frequency signals from the power grid, converting the voltage and current on the power grid side to a two-phase rotating coordinate system (dq coordinate), obtaining the ideal modulation voltage of the converter based on the converted current and voltage, collecting the state of charge (SOC) status signals of each battery cluster, combining them with the converted current to generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization, and combining these with the ideal modulation voltage of the converter to generate a differential mode modulation signal. Based on the average value of the DC current of each phase battery cluster, a self-adaptive adjustment coefficient is calculated. Forward and reverse phase separation is performed on the average second harmonic current of each phase battery cluster to obtain the positive and negative phase components of the second harmonic current. Then, a suitable common-mode modulation signal is generated by closed-loop proportional-integral (PI) control to suppress the second harmonic current. Finally, the self-adaptive adjustment coefficient and the common-mode modulation signal are multiplied to obtain a common-mode modulation signal suitable for each submodule. This includes superimposing the difference mode modulated signal and the common mode modulated signal to generate pulse-width modulation (PWM) control signals for each submodule switching device using a carrier phase shift modulation scheme.

[0011] As a further technical proposal, a specific process for obtaining the ideal modulation voltage of the converter based on the converted current and voltage is: The current after dq conversion is compared with the current reference value of the converter in dq coordinates, tracking control for the current command is achieved by PI control, the voltage and current after dq conversion are coupled and decoupled, and the ideal modulation voltage of the converter is obtained by dq / abc conversion. id The goal is to obtain i = a, b, c.

[0012] As a further technical proposal, generating a differential mode modulated signal by combining it with the ideal modulation voltage of the converter is, specifically, The SOC status signal of each battery cluster is collected and combined with the converted current to create a modulated signal u for phase-to-phase SOC equalization. 0bd and a modulation signal u for in-phase SOC equalization ijbd Generate, Modulated signal u for phase-to-phase SOC equalization 0bd and the ideal modulation voltage of the converter u id After adding the voltage obtained by scaling and the modulation signal u for in-phase SOCSOC equalization, ijbd Add the difference mode modulated signal u dijIt is to obtain, where \(i = a, b, c\), \(j = 1, 2, \ldots, N\), and \(N\) is the number of sub - modules.

[0013] As a further technical solution, calculating the self - adaptive adjustment coefficient based on the average value of the DC current of each - phase battery cluster is specifically averaging the output current signal of the battery cluster with a low - pass filter and extracting the average value of the DC current of each - phase battery cluster after the averaging process. Calculating the self - adaptive adjustment coefficient based on the average value of the DC current is specifically

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[0014] As a further technical solution, performing positive - negative phase separation on the average second - harmonic current of each - phase battery cluster, obtaining the positive - phase component and negative - phase component of the double - frequency harmonic current, and generating the corresponding common - mode modulation signal by closed - loop PI control is specifically After extracting the second - harmonic component by passing the output current signal of the battery cluster through the band - pass filter \(H\) bp (s), performing an averaging process to obtain the average value of the second - harmonic current of each - phase, performing positive - negative phase separation on the average value of the second - harmonic current to obtain the positive - phase component and negative - phase component of the double - frequency harmonic current, performing coordinate transformation on the positive - phase component and negative - phase component respectively, and then performing inverse coordinate transformation after passing through the PI controller, and adding the obtained values to obtain the common - mode modulation signal in order to control the double - frequency harmonic current component to zero.

[0015] As a further technical solution, superimposing the differential - mode modulation signal and the common - mode modulation signal is specifically The difference-mode modulation signal and common-mode modulation signal of the jth submodule of the cascade unit connected to each phase of the three-phase power grid are added together to obtain the modulation signal required for the U-bridge arm of the corresponding submodule's H-bridge converter, and the difference-mode modulation signal and common-mode modulation signal of the jth submodule of the cascade unit connected to each phase of the three-phase power grid are subtracted to obtain the modulation signal required for the V-bridge arm of the corresponding submodule's H-bridge converter. The goal is to generate PWM control signals corresponding to the submodule switching device using a carrier phase shift modulation scheme, for both the modulation signals required for the U-bridge arm and the modulation signals required for the V-bridge arm.

[0016] In some other embodiments, the following technical means are employed: A control system for a cascade-type PCS to suppress second harmonic currents. A model building module configured to establish a mathematical model of a cascade PCS and determine the AC-side decoupling capacitor parameters, A differential mode modulation signal generation module is configured to extract angular frequency signals from the power grid, convert the voltage and current on the power grid side into dq coordinates, obtain the ideal modulation voltage of the converter based on the converted current and voltage, collect the SOC status signals of each battery cluster, combine them with the converted current to generate a modulation signal for inter-phase SOC equalization and an intra-phase SOC equalization, and combine them with the ideal modulation voltage of the converter to generate a differential mode modulation signal. A common mode modulation signal generation module is configured to calculate a self-adaptive adjustment coefficient based on the average value of the DC current of each phase battery cluster, perform positive and negative phase separation on the average second harmonic current of each phase battery cluster, obtain the positive and negative phase components of the second harmonic current, generate an appropriate common mode modulation signal by closed-loop PI control to suppress the second harmonic current, multiply the self-adaptive adjustment coefficient and the common mode modulation signal to obtain a common mode modulation signal suitable for each submodule, and The system includes a control module configured to superimpose the difference-mode modulated signal and the common-mode modulated signal to generate a PWM control signal for each submodule switching device using a carrier phase-shift modulation scheme.

[0017] In some other embodiments, the following technical means are employed: A terminal device comprising a processor configured to implement instructions and a memory configured to store a plurality of instructions, wherein the instructions are loaded by the processor and are suitable for executing a control method for a cascaded PCS to suppress the second harmonic currents described above.

[0018] In some other embodiments, the following technical means are employed: A computer-readable storage medium having multiple instructions stored therein, which are loaded by the processor of a terminal device and are suitable for executing a control method for a cascaded PCS to suppress the above-mentioned second harmonic current.

[0019] Compared to the prior art, the present invention has the following beneficial effects: (1) In the cascade PCS topology of the present invention, a decoupling inductor and a decoupling capacitor are added to the AC side. The AC-side decoupling inductor of each submodule performs a filtering function for the module and can also be shared with other submodules, thereby eliminating the need for conventional inductors on the power grid side. A single conduction path is created for secondary harmonic currents via the decoupling capacitor, reducing the secondary harmonic currents flowing through the battery cluster, while forming a single high-pass filter and providing a path for harmonics in the output voltage of the submodule converter, thereby improving the quality of the converter's output voltage. The above topology effectively reduces the demand for DC-side filter capacitors in the submodules compared to conventional cascade energy storage systems, thereby reducing system costs.

[0020] In the topology of the cascade PCS of the present invention, decoupling capacitors with low rated voltages are added to the AC side of both bridge arms of the submodule, which can be equivalent to a capacitance with a high rated voltage and low capacitance value on the power grid side of the cascade energy storage system. This equivalent capacitance is advantageous for improving the quality of the output voltage waveform of the cascade PCS.

[0021] (2) The present invention enables on-grid power control by controlling the differential mode modulation signal output from the H-bridge converter, thereby enabling control of energy storage and power exchange with the power grid. The differential mode modulation signal enables decoupling between power control and second harmonic current suppression, ensuring that second harmonic current control does not affect power control.

[0022] This invention suppresses second-harmonic currents by controlling the common-mode modulated signal output from an H-bridge converter, and requires only one set of controllers and a self-adaptive adjustment coefficient k ij By combining these methods, synchronous control of the second harmonic currents of all battery clusters throughout the entire system is achieved, reducing the computational load.

[0023] This invention enables both power control and second-harmonic current suppression at the output of a single H-bridge converter submodule, without the need to add additional switching devices, by superimposing a difference-mode modulated signal and a common-mode modulated signal.

[0024] Further aspects and advantages of the present invention are described in the following description, some of which will become apparent from the following description or will be understood through the practice of the present invention. [Brief explanation of the drawing]

[0025] [Figure 1] This is a schematic diagram of the structure of a cascade-type PCS for suppressing second harmonic currents according to an embodiment of the present invention. [Figure 2]This diagram shows the relationship between the minimum value of the AC-side decoupling capacitor and the voltage utilization rate, maximum voltage, and maximum current of the capacitance according to an embodiment of the present invention. [Figure 3] This is a power control block diagram of a cascade-type PCS according to an embodiment of the present invention. [Figure 4] This is a block diagram of a cascade-type PCS with second-harmonic current suppression control according to an embodiment of the present invention. [Figure 5] This is a schematic diagram of the synthesis of a difference-mode modulated signal and a common-mode modulated signal according to an embodiment of the present invention. [Figure 6] This diagram shows the effect of suppressing DC-side second-frequency harmonic current according to an embodiment of the present invention. [Modes for carrying out the invention]

[0026] It should be noted that the following detailed descriptions are all illustrative and intended to further illustrate the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art.

[0027] It should be noted that the terms used herein are for the sole purpose of describing specific embodiments and are not intended to limit the exemplary embodiments of the present invention. Where used herein, singular nouns are intended to include plural nouns unless the context explicitly indicates otherwise, and it should also be understood that where the terms “contains” and / or “includes” are used herein, they indicate the presence of features, processes, operations, devices, assemblies and / or combinations thereof.

[0028] Explanation of terms: The dq transform is a mathematical method for transforming a three-phase AC system from a stationary coordinate system (abc coordinate system) to a synchronous rotating coordinate system (dq coordinate system). Its core principle is to convert the electric quantities in the three-phase stationary coordinate system into components of the linear axis (d axis) and horizontal axis (q axis) in the rotating coordinate system. This transformation combines the Clarke transform and the Park transform to convert complex AC signals into easily controllable DC signals. dq / abc transformation: This is the inverse transformation of the dq transformation.

[0029] Example 1 In one or more embodiments, a cascade PCS for suppressing second harmonic currents is disclosed, specifically, with reference to Figure 1, comprising three cascade units, each containing N submodules connected in series, each phase of a three-phase (A, B, C) power grid connected to one of the three cascade units, each of the N submodules connected sequentially, and including a battery cluster with multiple battery cells connected in series, a DC-side LC filter, and an H-bridge converter. The H-bridge converter includes one U-bridge arm and one V-bridge arm, a total of two bridge arms (half-bridges), and the AC sides of the two bridge arms are connected by decoupling inductors L u and L v After being connected to each of the above, they are connected in series to other submodules to form the cascade unit, and finally, they are connected in series to the three-phase power grid, and the decoupling inductor L u and L v This is a decoupling capacitor C u and C v After being connected in series, it is connected to the negative terminal of the battery cluster of the submodule in which it is located. Typically, decoupling capacitor C u and C v The difference between these two can be ignored, so they can be collectively defined as capacitance C.

[0030] In this embodiment, by optimizing the structure of the AC side circuit, the AC side decoupling inductor of each phase submodule performs the filtering function of this module and can also be shared with other submodules, thereby allowing the conventional inductor L on the power grid side to function as a filter. ac This can be omitted. Therefore, the AC-side filter inductor of each submodule is

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[0031] In this embodiment, in a cascade PCS, decoupling capacitors with low rated voltages are added to the AC side of both bridge arms of the submodule, which can be equivalent to a capacitance with a high rated voltage and low capacitance value on the grid side of the cascade energy storage system. This equivalent capacitance creates one conduction path for the second harmonic current, reducing the second harmonic current flowing through the battery cluster, while also forming a high-pass filter, providing one passage for the harmonics of the output voltage of the submodule converter, which is advantageous for improving the quality of the output voltage waveform of the cascade PCS.

[0032] Example 2 In this embodiment, a method for controlling a cascade PCS to suppress second harmonic currents is further disclosed based on the cascade PCS disclosed in Example 1, and specifically includes the following process.

[0033] S101: Establish a mathematical model of the cascade PCS and determine the AC side decoupling capacitor parameters.

[0034] Based on the structure of the cascade PCS of Example 1, a mathematical model of the cascade PCS in the dq coordinate system is established, and based on Kirchhoff's laws, the dynamics model of the converter on the power grid side under ideal power grid voltage conditions is:

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[0035] Energy E stored in the AC capacitor C c teeth,

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[0036] When ωt=0, the minimum energy that can be stored in the AC capacitor is:

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[0037]

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[0038] The common-mode voltage u of the capacitor obtained by combining equations (4) and (5) is c teeth,

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[0039] As K0 approaches 1, it can be seen that the voltage utilization rate increases. c =V cmax In this case, it has the strongest ability to suppress second-harmonic currents. To ensure effective suppression of second-harmonic currents, the minimum value of the AC side decoupling capacitor is

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[0040] If the voltage of the power grid is constant, the minimum value of the required AC side decoupling capacitor is different from V Amax , I Amax and η v The relationship is as shown in Figure 2. When the maximum power is constant, the selection of the AC side decoupling capacitor is determined by the capacitor voltage η. v and V cmax It can be seen that they are inversely proportional. v High, or V cmax If η is too large, the required capacitance value decreases, reducing the volume and cost of the passive element. However, in this case, the switching device needs to withstand greater current stress. Therefore, in practical applications, to design the capacitance value of the AC side decoupling capacitor that meets performance and cost requirements, η is determined based on the specific device type and its rated parameters. v and V cmax The range of selections should be determined rationally.

[0041] S102: Extract the angular frequency signal of the power grid, convert the voltage and current on the power grid side into dq coordinates, and obtain the ideal modulation voltage of the converter based on the converted current and voltage. The SOC (State of Charge) status signals of each battery cluster are collected and combined with the converted current to generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization. These are then combined with the converter's ideal modulation voltage to generate a differential mode modulation signal.

[0042] In this embodiment, on-grid power control is achieved by controlling the differential mode modulation signal output from the H-bridge converter. Specifically, referring to Figure 3, when the voltage of the three-phase power grid is equalized, the current reference value of the dq coordinate is calculated from the reference power value based on instantaneous power theory.

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[0043] Based on the voltage signal from the power grid, the angular frequency signal ωt of the power grid is extracted using a phase-locked loop, and the voltage u from the power grid is used. in and current i i Convert to dq coordinates, and the voltage u d u q and current i d and i q Obtain it.

[0044] current i d The difference between the current reference value i*d and the current i q The difference between this value and the current reference value i*q is taken, and the resulting difference is calculated using the PI controller G. pc (s) enables tracking control for current commands, acquires the differential mode control signal required for the submodule, and in the dq coordinates, the differential mode control signal u required for the submodule is obtained. dj and u qj teeth,

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[0045] Voltage u after dq conversion d u q , and the current decoupling after the DQ conversion are coupled, and the ideal modulation voltage of the converter is obtained by DQ / ABC conversion u id We obtain the values ​​i=a,b,c.

[0046] To ensure the equalization of the State of Charge (SOC) of each battery cluster during operation of a cascade energy storage system, this embodiment integrates the equalization policies between phases and within phases of battery clusters. The SOC state signal of each battery cluster is SOC ij The data is collected and combined with the direction of the output current to form a modulated signal u for phase-to-phase SOC equalization. 0bd and a modulation signal u for in-phase SOC equalization ijbd Generates.

[0047] Specifically, in order for a cascade H-bridge converter energy storage system to ensure the consistency of the State of Charge (SOC) of all battery clusters during charging and discharging, an appropriate zero-phase signal is used to achieve inter-phase SOC equalization and intra-phase SOC equalization by modulating the ideal zero-phase voltage u id It must be injected into, and the zero-sequence voltage corresponding to the phase voltage balance of the battery cluster is,

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[0048] Based on the difference between each battery cluster SOC within the same phase, different zero-sequence components are used to create the intraphase difference mode modulated signal u ij It must be injected into,

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[0049] Inter-phase SOC equalization modulation signal u 0bd and the ideal modulation voltage u of the converter id After addition, it is proportionally scaled by 1 / N times, and the obtained voltage is added to the modulation signal u for in-phase SOC equalization ijbd to obtain the differential mode modulation signal u dij to achieve power control, where i = a, b, c, j = 1, 2,..., N, and N is the number of sub-modules.

[0050] S103: Based on the average value of the DC current of each phase's battery cluster, calculate the self-adaptive adjustment coefficient, perform positive and negative phase separation on the average second harmonic current of each phase's battery cluster, obtain the positive and negative components of the double-frequency harmonic current, and then generate the corresponding common mode modulation signal by closed-loop PI control to suppress the double-frequency harmonic current. Multiply the self-adaptive adjustment coefficient by the common mode modulation signal to obtain the common mode modulation signal suitable for each sub-module.

[0051] As a specific embodiment, referring to FIG. 4, by controlling the differential common mode modulation signal output from the H-bridge converter, the suppression of the double-frequency harmonic current is realized. The specific process is as follows: In this embodiment, a second-order band-pass filter H bp (s) is designed for extracting the second harmonic component from the DC-side current,

Equation

[0052] Considering that there may be differences in the output currents of each sub-module after adding the equalization control, in this embodiment, in order to significantly reduce the calculation burden of the controller, a method combining average value control and deviation adjustment is further designed. The specific implementation process is as follows: The output current signal i of the battery cluster dcij is passed through a band-pass filter H bp (s) to extract the second harmonic component i shij as, and through averaging processing, the average value of the second harmonic current of each phase [Number] can be obtained.

[0053] Specifically, calculating the average value of the second harmonic current of each phase [Number] is specifically, [Number] the average value of the extracted second harmonic current [Number] is subjected to positive and negative phase separation to obtain the positive phase component i ship and the negative phase component i shin of the double-frequency harmonic current respectively. Then, closed-loop PI control is performed on the positive and negative phase components in the dq coordinate system respectively to generate the ideal common-mode modulation signal u shi required by the system to achieve effective suppression of the second harmonic current under ideal conditions.

[0054] In this embodiment, one common-mode modulation signal can be obtained by a PI controller and is used to control the double-frequency harmonic current component to zero. The PI controller is specifically as follows: [Number] where K ps and K is are the proportional gain and integral gain of the PI controller respectively.

[0055] To ensure that all submodules can suppress the second harmonic current within acceptable limits, deviation adjustment is necessary, specifically, the output current signal i of the battery cluster. dcij This is a low-pass filter H lp (s) via the DC component i avij The data is obtained, and then, after averaging, the average value of the DC current of each phase battery cluster is obtained.

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[0056] In this embodiment, a low-pass filter H is used to extract the DC component of the battery's output current. lp (s) can be designed as follows:

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[0057] Average value of DC current from all battery clusters in each phase

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[0058]

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[0059] Specifically, referring to Figure 5, the sum of the difference-mode modulated signal and the common-mode modulated signal of the j-th submodule of each phase is used as the modulation signal required for the U-bridge arm of the H-bridge converter of the submodule corresponding to this phase, and the subtraction of the difference-mode modulated signal and the common-mode modulated signal of the j-th submodule of each phase is used as the modulation signal required for the V-bridge arm of the H-bridge converter of the submodule corresponding to this phase. PWM control signals S of the jth submodule switching device for each phase 1ij S 2ij S 3ij and S 4ij To achieve this, the modulation signals required for the U-bridge arm and the modulation signals required for the V-bridge arm are used in a carrier phase-shift modulation scheme to generate the PWM control signal for the jth submodule switching device of this phase.

[0060] Figure 6 shows the simulation results when the DC-side second harmonic current suppression method according to the present invention was applied under the conditions of a 6kV power grid environment, with N=8 submodules, a total system inductance of 27mH, and a total capacitance of 54000μF. As can be seen from the figure, the peak value of the fluctuation peak of the output current of the battery cluster was only 10.1A, accounting for 5.8% of the average output value, demonstrating that the proposed method has a remarkable effect in suppressing second harmonic currents.

[0061] In summary, the battery cluster 2x harmonic current suppression method for a cascade H-bridge converter energy storage system based on a differential topology according to this embodiment involves constructing a common-mode current circuit on the AC side of the H-bridge converter, generating a differential-mode modulated signal in combination with closed-loop control based on on-grid current to achieve active power control, and generating a common-mode modulated signal by extracting the 2x harmonic component in the battery cluster current and performing closed-loop control. Finally, by superimposing the differential-mode modulated signal and the common-mode modulated signal, the 2x harmonic current is effectively suppressed, current ripple is reduced, and system stability and battery life are improved.

[0062] Example 2 In one or more embodiments, a control system for a cascade PCS for suppressing second harmonic currents is disclosed, and the control system is: A model building module configured to establish a mathematical model of a cascade PCS and determine the AC-side decoupling capacitor parameters, A differential mode modulation signal generation module is configured to extract angular frequency signals from the power grid, convert the voltage and current on the power grid side into dq coordinates, obtain the ideal modulation voltage of the converter based on the converted current and voltage, collect the SOC status signals of each battery cluster, combine them with the converted current to generate a modulation signal for inter-phase SOC equalization and an intra-phase SOC equalization, and combine them with the ideal modulation voltage of the converter to generate a differential mode modulation signal. A common mode modulation signal generation module is configured to calculate a self-adaptive adjustment coefficient based on the average value of the DC current of each phase battery cluster, perform positive and negative phase separation on the average second harmonic current of each phase battery cluster, obtain the positive and negative phase components of the second harmonic current, generate an appropriate common mode modulation signal by closed-loop PI control to suppress the second harmonic current, multiply the self-adaptive adjustment coefficient and the common mode modulation signal to obtain a common mode modulation signal suitable for each submodule, and The system includes a control module configured to superimpose the difference-mode modulated signal and the common-mode modulated signal to generate a PWM control signal for each submodule switching device using a carrier phase-shift modulation scheme.

[0063] Since the specific implementation methods for each of the above modules are the same as in Example 1, the details are omitted here.

[0064] Example 3 In one or more embodiments, a terminal device is disclosed that includes a processor configured to implement instructions and a memory configured to store a plurality of instructions, the instructions being loaded by the processor and suitable for executing a control method for a cascaded PCS for suppressing second harmonic currents as described in Embodiment 1.

[0065] In this embodiment, the processor may be a central processing unit CPU, or it may be another general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware assembly, etc. The general-purpose processor may be a microprocessor, or the processor may be any common processor, etc.

[0066] The memory may include read-only memory and random-access memory, and may provide instructions and data to the processor. A portion of the memory may include non-volatile random-access memory. For example, the memory may further store device type information.

[0067] In the implementation process, the steps of the method described above can be implemented by using hardware integrated logic circuits within the processor, or by using instructions in the form of software.

[0068] Example 4 In one or more embodiments, a computer-readable storage medium is disclosed which stores a plurality of instructions, and which are suitable for being loaded by a processor of a terminal device to execute a control method for a cascaded PCS for suppressing second harmonic currents as described in Embodiment 1.

[0069] Although specific embodiments of the present invention have been described above with reference to the drawings, this is not intended to limit the scope of protection of the present invention. Rather, various modifications or changes made by those skilled in the art based on the technical solutions of the present invention without requiring work worthy of inventive step are included within the scope of protection of the present invention.

Claims

1. A control method for a cascade-type energy storage power conversion system performed by a computer to suppress second harmonic currents, A cascade-type energy storage power conversion system for suppressing second harmonic currents, comprising a cascade unit in which N submodules are connected in series, with one cascade unit connected to each phase of a three-phase power grid, each of the N submodules being sequentially connected and comprising a battery cluster, a DC-side inductance-capacitance (LC) filter, and an H-bridge converter, the H-bridge converter comprising two half-bridges which are a U-bridge arm and a V-bridge arm, where each half-bridge of the H-bridge converter of each of the N submodules is connected to one decoupling inductor, then connected in series to another submodule, and finally connected in series to the three-phase power grid, each of the decoupling inductors is connected in series to one decoupling capacitor, and then connected to the negative terminal of the battery cluster of the submodule in which each of the decoupling inductors is located. The control method described above is The objective is to establish a mathematical model of a cascade-type energy storage power conversion system and determine the AC-side decoupling capacitor parameters, wherein the minimum value of the AC-side decoupling capacitor is [Math 1] where V Ａｍａｘ represents the maximum amplitude of the output voltage on the AC side of the H-bridge converter, I Ａｍａｘ represents the maximum amplitude of the output current on the AC side of the H-bridge converter, N represents the number of sub-modules included in each phase of the cascaded energy storage system, ω is the angular frequency of the power grid, V ｃｍａｘ is the maximum value of the capacitor voltage on the AC side, η ｖ is the capacitor voltage utilization factor, and The process involves extracting angular frequency signals from the power grid, converting the voltage and current on the power grid side into dq coordinates, obtaining the ideal modulation voltage of the converter based on the converted current and voltage, collecting the charge state-of-octane (SOC) signals of each battery cluster, combining them with the converted current to generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization, and combining these with the ideal modulation voltage of the converter to generate a differential mode modulation signal. Based on the average value of the DC current of each phase battery cluster, a self-adaptive adjustment coefficient is calculated, positive and negative phase separation is performed on the average second harmonic current of each phase battery cluster, the positive and negative phase components of the second harmonic current are obtained, and an appropriate common-mode modulation signal is generated by closed-loop PI control to suppress the second harmonic current. The self-adaptive adjustment coefficient and the common-mode modulation signal are multiplied to obtain a common-mode modulation signal suitable for each submodule. A control method for a cascade-type energy storage power conversion system for suppressing second harmonic currents, characterized by superimposing the difference-mode modulated signal and the common-mode modulated signal to generate PWM control signals for each submodule switching device using a carrier phase-shift modulation method.

2. The specific process for obtaining the ideal modulation voltage of the converter based on the converted current and voltage is as follows: A control method for a cascade-type energy storage power conversion system for suppressing second harmonic currents, as described in claim 1, characterized by comparing the current after dq conversion with the current reference value of the converter in dq coordinates, realizing tracking control for the current command by PI control, coupling and decoupling the voltage after dq conversion and the current after dq conversion, and obtaining the ideal modulated voltage of the converter by dq / abc conversion.

3. In combination with the ideal modulation voltage of the converter, generating a differential mode modulated signal is, specifically, The SOC status signals of each battery cluster are collected and combined with the converted current to generate a modulation signal for inter-phase SOC equalization and a modulation signal for intra-phase SOC equalization. A control method for a cascade-type energy storage power conversion system for suppressing second harmonic currents, as described in claim 1, characterized in that a modulation signal for inter-phase SOC equalization and the ideal modulation voltage of the converter are added together, and then the voltage obtained by scaling and the modulation signal for intra-phase SOC equalization are added together to obtain a difference mode modulation signal.

4. Calculating the self-adaptive adjustment coefficient based on the average value of the DC current of each phase battery cluster is, specifically, This involves averaging the output current signals of the battery clusters using a low-pass filter to extract the average value of the DC current of each phase of the battery cluster. Calculating the self-adjustment coefficient based on the average value of the DC current means, specifically, [Math 2] In the formula, i ａｖｉｊ This is the output current of the i-th phase, j-th submodule battery cluster, [Math 3] The control method for a cascade-type energy storage power conversion system for suppressing second harmonic currents according to claim 1, characterized in that represents the average value of the output currents of all battery clusters in the i-th phase.

5. Specifically, the process involves performing positive and negative phase separation on the average second harmonic current of each phase of the battery cluster, obtaining the positive and negative phase components of the second harmonic current, and then generating a corresponding common-mode modulated signal using closed-loop PI control. The output current signal of the battery cluster is filtered through the bandpass filter H. ｂｐ After extracting the second harmonic component via (s), an averaging process is performed to obtain the average value of the second harmonic current of each phase. By performing positive and negative phase separation on the average value of the second harmonic current, the positive and negative phase components of the second harmonic current are obtained. A control method for a cascade-type energy storage power conversion system for suppressing second harmonic currents, as described in claim 1, characterized in that a coordinate transformation is performed on the positive-sequence and negative-sequence components, and then an inverse coordinate transformation is performed after passing through the PI controller, and the obtained values ​​are added together to obtain a common-mode modulated signal in order to control the second-harmonic current component to zero.

6. Superimposing the difference-mode modulated signal and the common-mode modulated signal specifically means, The difference mode modulation signal and the common mode modulation signal of the jth submodule of each phase are added together to obtain the modulation signal required for the U-bridge arm of the H-bridge converter of the corresponding submodule, and the difference mode modulation signal and the common mode modulation signal of the jth submodule of each phase are subtracted to obtain the modulation signal required for the V-bridge arm of the H-bridge converter of the corresponding submodule. A control method for a cascade-type energy storage power conversion system for suppressing second harmonic currents, as described in claim 1, characterized in that the modulation signals required for the U-bridge arm and the modulation signals required for the V-bridge arm are generated using a carrier phase shift modulation scheme to produce PWM control signals corresponding to the submodule switching device.

7. A model building module configured to establish a mathematical model of a cascade-type energy storage power conversion system and to determine the AC-side decoupling capacitor parameters, wherein the minimum value of the decoupling capacitor is [Math 4] where V Ａｍａｘ represents the maximum amplitude of the output voltage on the AC side of the H-bridge converter, I Ａｍａｘ represents the maximum amplitude of the output current on the AC side of the H-bridge converter, N represents the number of sub-modules included in each phase of the cascaded energy storage system, ω is the angular frequency of the power grid, V ｃｍａｘ is the maximum value of the capacitor voltage on the AC side, η ｖ is the capacitor voltage utilization rate, the model building module, and A differential mode modulation signal generation module is configured to extract angular frequency signals from the power grid, convert the voltage and current on the power grid side into dq coordinates, obtain the ideal modulation voltage of the converter based on the converted current and voltage, collect the SOC status signals of each battery cluster, combine them with the converted current to generate a modulation signal for inter-phase SOC equalization and an intra-phase SOC equalization, and combine them with the ideal modulation voltage of the converter to generate a differential mode modulation signal. A common-mode modulation signal generation module configured to calculate a self-adaptive adjustment coefficient based on the average value of the DC current of each phase battery cluster, specifically, The output current signals of the battery clusters are averaged using a low-pass filter, and the average value of the DC current of each phase of the battery clusters is extracted. Calculating the self-adjustment coefficient based on the average value of the DC current means, specifically, [Math 5] In the formula, i ａｖｉｊ This is the output current of the i-th phase, j-th submodule battery cluster, [Math 6] This represents the average value of the output current of all battery clusters in phase i. A common-mode modulation signal generation module performs positive and negative phase separation on the average second harmonic current of each phase battery cluster, obtains the positive and negative phase components of the second harmonic current, generates an appropriate common-mode modulation signal by closed-loop PI control to suppress the second harmonic current, multiplies the self-adaptive adjustment coefficient with the common-mode modulation signal to obtain a common-mode modulation signal suitable for each submodule, and The control system for a cascade-type energy storage power conversion system for suppressing second harmonic currents according to claim 1, further comprising a control module configured to superimpose the difference-mode modulated signal and the common-mode modulated signal to generate a PWM control signal for each submodule switching device using a carrier phase-shift modulation method.

8. A terminal device comprising a processor configured to execute instructions and a memory configured to store a plurality of instructions, wherein the instructions are loaded by the processor and are suitable for executing a control method for a cascade energy storage power conversion system for suppressing second harmonic currents as described in any one of claims 1 to 6.

9. A computer-readable storage medium characterized in that it stores a plurality of instructions, the instructions being loaded by a processor of a terminal device and suitable for executing a control method for a cascade energy storage power conversion system for suppressing second harmonic currents as described in any one of claims 1 to 6.

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