Method for manufacturing multilayer ceramic electronic components, multilayer ceramic electronic components, and circuit boards

Abstract

To provide a manufacturing method of a multilayer ceramic electronic component capable of suppressing fusion of an external electrode, the multilayer ceramic electronic component, and a circuit board.SOLUTION: A manufacturing method of a multilayer ceramic electronic component includes: a step of preparing an element assembly including a first end face which includes a plurality of dielectric layers and a plurality of internal electrode layers laminated via the plurality of dielectric layers and in which ends of partial internal electrode layers in the plurality of internal electrode layers are exposed, and a second end face in which ends of the other partial internal electrode layers in the plurality of internal electrode layers are exposed and which is opposed with the first end face; a first external electrode forming step of seizing and forming a first external electrode on the first end face; and a second external electrode forming step is seizing and forming a second external electrode, of which the composition is different from that of the first external electrode, on the second end face at a temperature lower than that in the first external electrode forming step by 50°C or more.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing multilayer ceramic electronic components, multilayer ceramic electronic components, and circuit boards. [Background technology]

[0002] In multilayer ceramic electronic components such as multilayer ceramic capacitors, external electrodes are formed by applying a metal paste to the molded body after firing and then baking it. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 8-306580 [Patent Document 2] Japanese Patent Application Publication No. 8-22930 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] During this curing process, one of the challenges is the fusion between the multilayer ceramic electronic components and the jig. Such fusion leads to a decrease in yield. Therefore, it is necessary to cure the external electrodes without any fusion.

[0005] Various measures have been taken to address this issue. For example, it has been disclosed that a ceramic powder for mold release is sprinkled on the component and then baked (see, for example, Patent Document 1). However, the ceramic powder itself may fuse with the external electrode. Therefore, it has been disclosed that a conductive paste containing metal powders of various particle shapes is prepared, and that a baked electrode layer is formed by applying the conductive paste to the outer surface of the component and baking it (see, for example, Patent Document 1). It has also been disclosed that an adhesive layer is provided on the surface of the sheath, and after the external electrodes have been applied, multiple ceramic electronic components are individually and independently held in place by the adhesive layer while the external electrodes are baked (see, for example, Patent Document 2).

[0006] However, in the methods described in Patent Documents 1 and 2, it is difficult to prevent fusion because the metal paste portion to be baked is in contact with the jig.

[0007] The present invention has been made in view of the above problems, and aims to provide a method for manufacturing a multilayer ceramic electronic component that can suppress the fusion of external electrodes, a multilayer ceramic electronic component, and a circuit board. [Means for solving the problem]

[0008] A method for manufacturing a multilayer ceramic electronic component according to the present invention includes the steps of: preparing a base body having a plurality of dielectric layers and a plurality of internal electrode layers stacked via the plurality of dielectric layers, having a first end face on which the ends of some of the plurality of internal electrode layers are exposed and a second end face on which the ends of other parts of the plurality of internal electrode layers are exposed and facing the first end face; forming a first external electrode by baking a first external electrode onto the first end face; and forming a second external electrode on the second end face by baking a second external electrode having a different composition from the first external electrode at a temperature 50°C or more lower than that of the first external electrode formation step.

[0009] In the above manufacturing method, the second external electrode formation step may be performed at a temperature 70°C or more lower than that of the first external electrode formation step.

[0010] In the above manufacturing method, the first external electrode and the second external electrode contain boron, and the second external electrode may contain a higher amount of boron than the first external electrode.

[0011] In the above manufacturing method, the second external electrode may have a boron content greater than 2 wt% in terms of oxides than the first external electrode.

[0012] In the above manufacturing method, the first external electrode and the second external electrode contain silicon, and the second external electrode may contain less silicon than the first external electrode.

[0013] In the above manufacturing method, the first external electrode and the second external electrode may have copper as their main component.

[0014] In the above manufacturing method, the first external electrode may be mainly composed of nickel, and the second external electrode may be mainly composed of copper.

[0015] In the above manufacturing method, the first external electrode and the second external electrode may contain at least one of aluminum, calcium, strontium, lithium, sodium, and phosphorus as an additive.

[0016] Another manufacturing method of a multilayer ceramic electronic component includes a step of preparing a ceramic laminate having a plurality of ceramic green sheets and a plurality of internal electrode patterns laminated through the plurality of ceramic green sheets, wherein a first end face has exposed ends of some of the plurality of internal electrode patterns, and a second end face has exposed ends of some other of the plurality of internal electrode patterns and is opposite to the first end face; a step of applying a metal paste to the first end face; a firing step of firing the ceramic laminate and the metal paste simultaneously to obtain a body from the ceramic laminate; and a baking step of applying a metal paste to the second end face of the body and baking it at a temperature 50°C or more lower than that in the firing step.

[0017] A multilayer ceramic electronic component according to the present invention includes a body having a plurality of dielectric layers and a plurality of internal electrode layers laminated through the plurality of dielectric layers, wherein a first end face has exposed ends of some of the plurality of internal electrode layers, and a second end face has exposed ends of some other of the plurality of internal electrode layers; a first external electrode provided on the first end face; and a second external electrode provided on the second end face and having a composition different from that of the first external electrode.

[0018] In the above multilayer ceramic electronic component, the first external electrode and the second external electrode contain boron, and the second external electrode may have a higher boron content than the first external electrode.

[0019] In the above multilayer ceramic electronic component, the second external electrode may have a boron content more than 2 wt% in terms of oxide conversion higher than that of the first external electrode.

[0020] In the above multilayer ceramic electronic component, the first external electrode and the second external electrode contain silicon, and the second external electrode may have a lower silicon content than the first external electrode.

[0021] In the above multilayer ceramic electronic component, the first external electrode and the second external electrode may have copper as a main component.

[0022] In the above multilayer ceramic electronic component, the first external electrode may contain nickel as a main component, and the second external electrode may contain copper as a main component.

[0023] In the above multilayer ceramic electronic component, the first external electrode and the second external electrode may contain at least one of aluminum, calcium, strontium, lithium, sodium, and phosphorus as an additive.

[0024] The circuit board according to the present invention is a circuit board provided with any one of the above multilayer ceramic electronic components.

Effect of the Invention

[0025] According to the present invention, it is possible to provide a method for manufacturing a multilayer ceramic electronic component, a multilayer ceramic electronic component, and a circuit board that can suppress the fusion of external electrodes.

Brief Description of the Drawings

[0026] <00​​​​​​​​​​​​​​​​​​​​​​​​​​ [Figure 10] This diagram illustrates a flow chart of another manufacturing method for multilayer ceramic capacitors. [Figure 11] (a) and (b) are diagrams illustrating the first coating process. [Figure 12] (a) and (b) are diagrams illustrating the second coating process. [Modes for carrying out the invention]

[0027] The embodiments will be described below with reference to the drawings.

[0028] Figure 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. Figure 2 is a cross-sectional view taken along line AA in Figure 1. Figure 3 is a cross-sectional view taken along line BB in Figure 1. As illustrated in Figures 1 to 3, the multilayer ceramic capacitor 100 comprises a base body 10 having a substantially rectangular parallelepiped shape, and a first external electrode 20a and a second external electrode 20b provided on two opposing end faces of either of the base body 10. Of the four faces of the base body 10 other than the two end faces, the two faces other than the top and bottom faces in the stacking direction are referred to as side faces. The first external electrode 20a and the second external electrode 20b extend to the top face, bottom face and two side faces of the base body 10 in the stacking direction. However, the first external electrode 20a and the second external electrode 20b are spaced apart from each other.

[0029] The base body 10 has a structure in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 mainly composed of metal are alternately stacked. In other words, the base body 10 comprises a plurality of internal electrode layers 12 facing each other and dielectric layers 11 sandwiched between each of the plurality of internal electrode layers 12. The edges of each internal electrode layer 12 in the direction in which it is stretched are alternately exposed at the end face of the base body 10 where the first external electrode 20a is provided and the end face where the second external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately conductive to the first external electrode 20a and the second external electrode 20b. Consequently, the multilayer ceramic capacitor 100 has a structure in which a plurality of dielectric layers 11 are stacked via internal electrode layers 12. Furthermore, in the laminate of dielectric layers 11 and internal electrode layers 12, the outermost layer in the stacking direction is an internal electrode layer 12, and the upper and lower surfaces of the laminate are covered by a cover layer 13. The cover layer 13 is mainly composed of a ceramic material. For example, the composition of the cover layer 13 may be the same as or different from that of the dielectric layer 11.

[0030] The dimensions of the multilayer ceramic capacitor 100 are, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.110 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.1 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but are not limited to these dimensions.

[0031] The dielectric layer 11 mainly consists of a ceramic material having a perovskite structure represented by the general formula ABO3. Note that this perovskite structure is an ABO3 structure that deviates from the stoichiometric composition. 3-αIt includes. For example, as the ceramic material, barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), Ba forming a perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1), etc., can be selected and used from at least one of them. Ba 1-x-y Ca x Sr y Ti 1-z Zr z O3 includes barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconium titanate, calcium zirconium titanate, and barium calcium zirconium titanate, etc.

[0032] An additive may be added to the dielectric layer 11. As additives to the dielectric layer 11, oxides of magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon can be mentioned.

[0033] The internal electrode layer 12 is mainly composed of base metals such as nickel (Ni), copper (Cu), tin (Sn), etc. As the internal electrode layer 12, noble metals such as platinum (Pt), palladium (Pd), silver (Ag), gold (Au), or alloys containing these may be used.

[0034] As illustrated in Figure 2, the region where the internal electrode layer 12 connected to the first external electrode 20a and the internal electrode layer 12 connected to the second external electrode 20b face each other is the region in the multilayer ceramic capacitor 100 where capacitance is generated. Therefore, this region where capacitance is generated is referred to as the capacitance section 14. In other words, the capacitance section 14 is the region where adjacent internal electrode layers 12 connected to different external electrodes face each other.

[0035] The region in which internal electrode layers 12 connected to the first external electrode 20a face each other without being connected to the internal electrode layer 12 connected to the second external electrode 20b is called the end margin 15. Similarly, the region in which internal electrode layers 12 connected to the second external electrode 20b face each other without being connected to the internal electrode layer 12 connected to the first external electrode 20a is also called the end margin 15. In other words, the end margin 15 is the region in which internal electrode layers 12 connected to the same external electrode face each other without being connected to internal electrode layers 12 connected to different external electrodes. The end margin 15 is a region in which no capacitance is generated. The end margin 15 may have the same composition as the dielectric layer 11 of the capacitance portion 14, or it may have a different composition.

[0036] As illustrated in Figure 3, in the base body 10, the region extending from the two sides of the base body 10 to the internal electrode layer 12 is called the side margin 16. That is, the side margin 16 is a region provided so as to cover the ends of the multiple internal electrode layers 12 stacked in the above-described laminated structure that extend to the two sides. The side margin 16 is also a region that does not generate capacitance. The side margin 16 may have the same composition as the dielectric layer 11 of the capacitance portion 14, or it may have a different composition.

[0037] The first external electrode 20a and the second external electrode 20b have different compositions. This allows the appropriate temperature for forming the first external electrode 20a to be different from the appropriate temperature for forming the second external electrode 20b. Therefore, the temperature for forming one external electrode can be lower than the temperature for forming the other external electrode. For example, the temperature for forming the second external electrode 20b can be lower than the temperature for forming the first external electrode 20a. In this case, the second external electrode 20b can be formed after the first external electrode 20a. If the vicinity of the first external electrode 20a is not held by a jig when forming the first external electrode 20a, fusion between the first external electrode 20a and the jig can be suppressed. Even if the vicinity of the first external electrode 20a is held by a jig when forming the second external electrode 20b, the temperature for forming the second external electrode 20b will be lower, thus suppressing fusion between the jig and the first external electrode 20a. Even when firing without using a jig and without aligning the base body 10, the temperature at which the second external electrode 20b is formed after the first external electrode 20a is fired is lower, so the glass components of the first external electrode 20a and the glass components of the second external electrode 20b do not react, and the fusion of the first external electrode 20a and the second external electrode 20b can be suppressed.

[0038] Furthermore, because the composition of the first external electrode 20a and the composition of the second external electrode 20b are different, the natural frequencies generated in the first external electrode 20a and the natural frequencies generated in the second external electrode 20b are different, thereby suppressing resonance of the multilayer ceramic capacitor 100. As a result, the occurrence of noise can be suppressed.

[0039] For example, the main metal components of the first external electrode 20a and the second external electrode 20b can be the same, while the composition of additives such as glass can be different. For example, the boron content in the second external electrode 20b can be made greater than the boron content in the first external electrode 20a. This allows the temperature at which the second external electrode 20b is formed to be lower than the temperature at which the first external electrode 20a is formed. Note that the boron content can also be rephrased as the wt% of boron in oxide terms, assuming that the weight of the main metal in oxide terms is 100 wt%. For example, it is preferable that the boron content in the second external electrode 20b be 2 wt% or more greater than the boron content in the first external electrode 20a, more preferably 3 wt% or more greater, more preferably 5 wt% or more greater, and even more preferably 8 wt% or more greater.

[0040] Alternatively, the silicon content of the second external electrode 20b may be greater than the silicon content of the first external electrode 20a. This allows the temperature at which the second external electrode 20b is formed to be lower than the temperature at which the first external electrode 20a is formed. Note that the silicon content can also be rephrased as the wt% of silicon oxide when the weight of the main component metal in terms of oxide is assumed to be 100 wt%. For example, it is preferable that the silicon content in the second external electrode 20b be 2 wt% or more greater than the silicon content in the first external electrode 20a, more preferably 4 wt% or more greater, and even more preferably 6 wt% or more greater.

[0041] Alternatively, by adjusting the content of each component in the additive glass, a difference in the temperature at which the glass becomes liquid may be created, thereby lowering the temperature at which the second external electrode 20b is formed compared to the temperature at which the first external electrode 20a is formed. For example, the content of at least one of aluminum, calcium, strontium, lithium, sodium, and phosphorus may be adjusted. In this case, the content can also be expressed as the wt% of the oxide, assuming that the weight of the oxide equivalent of the main component metal is 100 wt%.

[0042] Figure 4 illustrates a state in which a multilayer ceramic capacitor 100 is mounted on a circuit board 201. As illustrated in Figure 4, the lower surface in the stacking direction is positioned to face the land 203 on the circuit board 201. The first external electrode 20a and the second external electrode 20b are electrically connected to the circuit board 201 independently via solder 202 to the land 203 on the circuit board 201.

[0043] As illustrated in Figures 5(a) and 5(b), a plating layer may be provided on the first external electrode 20a, or on the second external electrode 20b. During the plating process, the first external electrode 20a and the second external electrode 20b function as underlayment layers. The plating layer mainly consists of metals such as copper, nickel, aluminum, zinc, and tin, or two or more alloys thereof. The plating layer may be a single-metallic-component plating layer, or multiple plating layers of different metal components. For example, the plating layer has a structure in which a first plating layer 21, a second plating layer 22, and a third plating layer 23 are formed in order from the underlayment layer side. The first plating layer 21 is, for example, a copper plating layer. The second plating layer 22 is, for example, a nickel plating layer. The third plating layer 23 is, for example, a tin plating layer.

[0044] Next, the manufacturing method of the multilayer ceramic capacitor 100 will be described. Figure 6 is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor 100.

[0045] (Process for producing raw material powder) First, a dielectric material is prepared to form the dielectric layer 11. The A-site and B-site elements contained in the dielectric layer 11 are usually present in the form of a sintered body of ABO3 particles. For example, BaTiO3 is a tetragonal compound having a perovskite structure and exhibits a high dielectric constant. This BaTiO3 can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been conventionally known for synthesizing the main component ceramic of the dielectric layer 11, such as the solid-phase method, the sol-gel method, and the hydrothermal method. In this embodiment, any of these can be employed.

[0046] A predetermined additive compound is added to the obtained ceramic powder according to the purpose. Examples of additive compounds include oxides of magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glass containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon. Of these, SiO2 primarily functions as a sintering aid.

[0047] For example, a ceramic material can be prepared by wet-mixing a ceramic raw material powder with a compound containing an additive, followed by drying and pulverization. For example, the ceramic material obtained as described above may be subjected to pulverization as needed to adjust the particle size, or the particle size may be adjusted by combining this with a classification process. A dielectric material can be obtained through the above steps.

[0048] (Coating process) Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained dielectric material and wet-mixed. Using the resulting slurry, a ceramic green sheet 52 is coated onto the substrate 51 by, for example, a die coater or a doctor blade and then dried. The substrate 51 is, for example, a polyethylene terephthalate (PET) film.

[0049] (Internal electrode formation process) Next, as illustrated in Figure 7(a), an internal electrode pattern 53 is deposited on the ceramic green sheet 52. In Figure 7(a), as an example, four layers of the internal electrode pattern 53 are deposited on the ceramic green sheet 52 at predetermined intervals. The ceramic green sheet 52 on which the internal electrode pattern 53 is deposited is used as the stacking unit. A metal paste of the main component metal of the internal electrode layer 12 is used for the internal electrode pattern 53. The deposition method may be printing, sputtering, vapor deposition, etc.

[0050] (Crimping process) Next, the ceramic green sheet 52 is peeled off the substrate 51 and the laminate units are stacked as illustrated in Figure 7(b). Then, a predetermined number of cover sheets 54 (for example, 2 to 10 layers) are stacked on the top and bottom of the laminate obtained by stacking the laminate units and heat-pressed, and then cut to a predetermined chip size (for example, 1.0 mm × 0.5 mm). In the example in Figure 7(b), the cut is made along the dotted line. The cover sheet 54 may have the same composition as the ceramic green sheet 52, or it may have different additives.

[0051] (Firing process) Subsequently, oxygen partial pressure 10 -5 ~10 -8 The material is fired in an ATM reducing atmosphere at 1100°C to 1300°C for 10 minutes to 2 hours. In this way, the base material 10 can be obtained.

[0052] (Re-oxidation process) Subsequently, a re-oxidation treatment may be performed in an N2 gas atmosphere at 600°C to 1000°C.

[0053] (1st coating process) Next, as illustrated in Figure 8(a), multiple base bodies 10 are held by the jig 60. In this case, the vicinity of the first end face of the base body 10 is not held, but the second end face side is held. In this state, as illustrated in Figure 8(b), with the first end face side of the base body 10 facing downwards, the first metal paste 55a, which will become the first external electrode 20a, is applied to the first end face of the base body 10 by a dipping method or the like.

[0054] (First external electrode formation process) Next, the first external electrode 20a is formed by baking the first metal paste 55a at a temperature of approximately 700°C to 900°C.

[0055] (2nd coating process) Next, as illustrated in Figure 9(a), a plurality of base bodies 10, each having a first external electrode 20a formed on it, are held by a jig 60. In this case, the base body 10 is not held near its second end face, but only on its first end face side. In this case, the jig 60 may be in contact with the first external electrode 20a. In this state, as illustrated in Figure 9(b), a second metal paste 55b, which will become the second external electrode 20b, is applied to the second end face of the base body 10 by a dipping method or the like.

[0056] (Second external electrode formation process) Next, the second external electrode 20b is formed by baking the second metal paste 55b at a temperature lower than that of the first external electrode formation process.

[0057] (Plating process) Subsequently, a metal coating such as copper, nickel, or tin may be applied to the first external electrode 20a and the second external electrode 20b by plating.

[0058] According to the manufacturing method of this embodiment, when the first metal paste 55a is baked, the first metal paste 55a and the jig 60 are not in contact, so fusion between the first external electrode 20a and the jig 60 does not occur. Next, the temperature when baking the second metal paste 55b is lower than the temperature when baking the first metal paste 55a. In this case, even if the jig 60 is in contact with the first external electrode 20a, the lower temperature suppresses fusion between the first external electrode 20a and the jig 60. Furthermore, even when firing without using the jig 60 and without aligning the base body 10, the lower temperature at which the second external electrode 20b is formed after the first external electrode 20a is baked prevents the glass component of the first external electrode 20a from reacting with the glass component of the second external electrode 20b, thereby suppressing fusion between the first external electrode 20a and the second external electrode 20b.

[0059] From the viewpoint of lowering the temperature at which the second metal paste 55b is baked compared to the temperature at which the first metal paste 55a is baked, the composition of the first metal paste 55a and the composition of the second metal paste 55b are made different.

[0060] For example, the main metal components of the first metal paste 55a and the second metal paste 55b can be the same, while the composition of additives such as glass can be different. For example, the boron content in the second metal paste 55b can be increased compared to the boron content in the first metal paste 55a. This allows the temperature at which the second metal paste 55b is baked to be lower than the temperature at which the first metal paste 55a is baked. Note that the boron content can also be rephrased as the wt% of boron in oxide terms, assuming that the weight of the main metal components in oxide terms is 100 wt%. For example, it is preferable that the boron content in the second metal paste 55b be 2 wt% or more greater than the boron content in the first metal paste 55a, more preferably 5 wt% or more greater, and even more preferably 8 wt% or more greater.

[0061] Alternatively, the silicon content of the second metal paste 55b may be increased compared to the silicon content of the first metal paste 55a. This allows the temperature at which the second metal paste 55b is baked to be lower than the temperature at which the first metal paste 55a is baked. Note that the silicon content can also be rephrased as the wt% of silicon in terms of oxide, assuming that the weight of the main component metal in terms of oxide is 100 wt%. For example, it is preferable that the silicon content in the second metal paste 55b be 2 wt% or more greater than the silicon content in the first metal paste 55a, more preferably 4 wt% or more greater, and even more preferably 6 wt% or more greater.

[0062] Alternatively, by adjusting the content of each component in the additive glass, a difference in the temperature at which the glass becomes liquid may be created, thereby lowering the temperature at which the second metal paste 55b is baked compared to the temperature at which the first metal paste 55a is baked. For example, the content of at least one of aluminum, calcium, strontium, lithium, sodium, and phosphorus may be adjusted. In this case, the content can also be expressed as the wt% of the oxide, assuming that the weight of the main component metal in terms of oxide is 100 wt%.

[0063] By setting the baking temperature in the second external electrode formation step as low as possible compared to the baking temperature in the first external electrode formation step, fusion between the jig 60 and the first external electrode 20a can be suppressed. For example, it is preferable to set the baking temperature in the second external electrode formation step 50°C or more lower than the baking temperature in the first external electrode formation step, preferably 70°C or more lower, and even more preferable to set it 100°C or more lower.

[0064] Furthermore, the baking temperature (maximum temperature of the baking process) in the second external electrode formation step is preferably in the range of 750°C to 840°C, preferably in the range of 750°C to 800°C, and preferably in the range of 750°C to 780°C.

[0065] Next, another method for manufacturing the multilayer ceramic capacitor 100 will be described. Figure 10 is a diagram illustrating the flow of another method for manufacturing the multilayer ceramic capacitor 100. From the raw material powder preparation process to the crimping process, the flow diagram is the same as in Figure 6. This is how a ceramic laminate is obtained.

[0066] (1st coating process) Next, as illustrated in Figure 11(a), multiple ceramic laminates 70 are held by a jig 60. In this case, the area near the first end face of the ceramic laminate 70 is not held, but the second end face side is held. In this state, as illustrated in Figure 11(b), with the first end face side of the ceramic laminate 70 facing downwards, the first metal paste 55a, which will become the first external electrode 20a, is applied to the first end face of the ceramic laminate 70 by a dipping method or the like.

[0067] (Firing process) Subsequently, oxygen partial pressure 10 -5 ~10 -8 The material is fired in an atm reducing atmosphere at 1100°C to 1300°C for 10 minutes to 2 hours. In this way, a substrate 10 with the first external electrode 20a formed can be obtained.

[0068] (Re-oxidation process) Subsequently, a re-oxidation treatment may be performed in an N2 gas atmosphere at 600°C to 1000°C.

[0069] (2nd coating process) Next, as illustrated in Figure 12(a), a plurality of base bodies 10, each with a first external electrode 20a formed on it, are held by a jig 60. In this case, the base body 10 is not held near its second end face, but only on its first end face side. In this case, the jig 60 may be in contact with the first external electrode 20a. In this state, as illustrated in Figure 12(b), a second metal paste 55b, which will become the second external electrode 20b, is applied to the second end face of the base body 10 by a dipping method or the like.

[0070] (Second external electrode formation process) Next, the second external electrode 20b is formed by baking the second metal paste 55b at a temperature lower than that of the firing process.

[0071] (Plating process) Subsequently, a metal coating such as copper, nickel, or tin may be applied to the first external electrode 20a and the second external electrode 20b by plating.

[0072] According to the manufacturing method of this embodiment, when the first metal paste 55a is fired, the first metal paste 55a and the jig 60 are not in contact, so no fusion occurs between the first external electrode 20a and the jig 60. Next, the temperature when firing the second metal paste 55b is lower than the temperature when firing the first metal paste 55a. In this case, even if the jig 60 is in contact with the first external electrode 20a, the low temperature suppresses fusion between the first external electrode 20a and the jig 60.

[0073] From the viewpoint of lowering the firing temperature of the second metal paste 55b to a lower temperature than that of the first metal paste 55a, the composition of the first metal paste 55a and the composition of the second metal paste 55b are made different.

[0074] For example, in the first metal paste 55a, a co-material of ceramic particles is added without adding glass. In the second metal paste 55b, glass is added without adding the co-material. This makes it possible to set the firing temperature of the second metal paste 55b lower than that of the first metal paste 55a.

[0075] Alternatively, the main metal components of the first metal paste 55a and the second metal paste 55b may be different. For example, the main component of the first metal paste 55a may be nickel, and the main component of the second metal paste 55b may be copper. This makes it possible to set the firing temperature of the second metal paste 55b lower than that of the first metal paste 55a.

[0076] By setting the baking temperature in the second external electrode formation step as low as possible compared to the firing temperature in the firing step, fusion between the jig 60 and the first external electrode 20a can be suppressed. For example, it is preferable to set the baking temperature in the second external electrode formation step at least 50°C lower than the firing temperature in the firing step, preferably at least 70°C lower, and even more preferably at least 100°C lower.

[0077] Furthermore, the baking temperature (maximum temperature of the baking process) in the second external electrode formation step is preferably in the range of 750°C to 840°C, preferably in the range of 750°C to 800°C, and preferably in the range of 750°C to 780°C.

[0078] Although the above embodiments describe multilayer ceramic capacitors as an example of ceramic electronic components, they are not limited to this. For example, the configurations of the above embodiments can also be applied to other multilayer ceramic electronic components such as varistors and thermistors. [Examples]

[0079] Below, a multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were investigated.

[0080] (Examples 1-3 and Comparative Examples 1-3) A substrate was prepared in which multiple dielectric layers and multiple internal electrode layers were alternately stacked. In the substrate, the multiple internal electrode layers were alternately exposed on the first end face and the second end face.

[0081] Five types of metal pastes, A to E, were prepared for forming external electrodes. In all of metal pastes A to E, copper powder is the main metal component, with glass added. The composition of the glass component differs in metal pastes A to E. Table 1 shows the composition of the glass component added to each of metal pastes A to E. The glass component added to metal paste A contained 42 wt% barium oxide (BaO), 20 wt% zinc oxide (ZnO), 6 wt% silicon dioxide (SiO2), 24 wt% boron oxide (B2O3), and 8 wt% other components. The glass component added to metal paste B contained 42 wt% barium oxide (BaO), 20 wt% zinc oxide (ZnO), 8 wt% silicon dioxide (SiO2), 20 wt% boron oxide (B2O3), and 10 wt% other components. The glass component added to metal paste C contained 42 wt% barium oxide (BaO), 20 wt% zinc oxide (ZnO), 8 wt% silicon dioxide (SiO2), 18 wt% boron oxide (B2O3), and 12 wt% other components. The glass component added to metal paste D contained 38 wt% barium oxide (BaO), 18 wt% zinc oxide (ZnO), 12 wt% silicon dioxide (SiO2), 12 wt% boron oxide (B2O3), and 20 wt% other components. The glass component added to metal paste E contained 35 wt% barium oxide (BaO), 17 wt% zinc oxide (ZnO), 16 wt% silicon dioxide (SiO2), 9 wt% boron oxide (B2O3), and 23 wt% other components. [Table 1]

[0082] For all of metal pastes A through E, the amount of glass component added was set to 8 wt% when the copper powder content was 100 wt%. The recommended baking temperature for metal paste A is 750°C. The recommended baking temperature for metal paste B is 800°C. The recommended baking temperature for metal paste C is 840°C. The recommended baking temperature for metal paste D is 870°C. The recommended baking temperature for metal paste E is 900°C.

[0083] Next, as explained in Figure 8(a), the jig was used to hold the second end face side of the base body, but not the area near the first end face. The first metal paste was then applied to the first end face of the base body using a dipping method or similar, and baked at the recommended baking temperature for the first metal paste used. In Example 1, metal paste C was used as the first metal paste. In Example 2, metal paste D was used as the first metal paste. In Example 3, metal paste E was used as the first metal paste. In Comparative Example 1, metal paste B was used as the first metal paste. In Comparative Example 2, metal paste C was used as the first metal paste. In Comparative Example 3, metal paste E was used as the first metal paste.

[0084] Next, as explained in Figure 9(a), the jig was used to hold the first end face side of the base body, but not the vicinity of the second end face where the first external electrode was formed. The second metal paste was then applied to the second end face of the base body using a dip method or the like, and baked at the recommended baking temperature of the second metal paste used. In Example 1, metal paste A was used as the second metal paste. In Example 2, metal paste B was used as the second metal paste. In Example 3, metal paste A was used as the second metal paste. In Comparative Example 1, metal paste B was used as the second metal paste. In Comparative Example 2, metal paste B was used as the second metal paste. In Comparative Example 3, metal paste D was used as the second metal paste.

[0085] In Example 1, the curing temperature of the second metal paste was 90°C lower than that of the first metal paste. In Example 2, the curing temperature of the second metal paste was 70°C lower than that of the first metal paste. In Example 3, the curing temperature of the second metal paste was 150°C lower than that of the first metal paste. In Comparative Example 1, the curing temperature of the second metal paste was the same as that of the first metal paste. In Comparative Example 2, the curing temperature of the second metal paste was 40°C lower than that of the first metal paste. In Comparative Example 3, the curing temperature of the second metal paste was 30°C lower than that of the first metal paste.

[0086] For each of Examples 1-3 and Comparative Examples 1-3, the percentage of samples in which fusion occurred between the first external electrode and the jig (fusion rate) was examined for 1000 samples. The results are shown in Table 2. As shown in Table 2, the fusion rate was 0% in all of Examples 1-3. This is thought to be because the baking temperature of the second metal paste was lower than that of the first metal paste. On the other hand, in Comparative Example 1, the fusion rate was 100%. This is thought to be because the baking temperatures of the first metal paste and the second metal paste were the same, but the baking temperature of the second metal paste was higher. From the results of Examples 1-3 and Comparative Examples 1-3, it is thought that the fusion rate will be 0% if the temperature difference is 50°C or more. [Table 2]

[0087] Although embodiments of the present invention have been described in detail above, the present invention is not limited to these specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims. [Explanation of symbols]

[0088] 10 Base Body 11 Dielectric layer 12 Internal electrode layer 13. Cover layer 14 Capacity part 15 End margin 16 Side margins 20a 1st external electrode 20b 2nd external electrode 51 Base material 60 jigs 70 Ceramic Laminate 52 Ceramic Green Sheet 53 Internal electrode pattern 100 Multilayer Ceramic Capacitors

Claims

1. A step of preparing a substrate having a plurality of dielectric layers and a plurality of internal electrode layers stacked via the plurality of dielectric layers, having a first end face in which the ends of some of the plurality of internal electrode layers are exposed, and a second end face in which the ends of other parts of the plurality of internal electrode layers are exposed and facing the first end face, A first external electrode formation step is to form a first external electrode by baking it onto the first end face, A method for manufacturing a multilayer ceramic electronic component, comprising: a second external electrode formation step of forming a second external electrode having a different composition from the first external electrode on the second end face by firing it at a temperature 50°C or more lower than that of the first external electrode formation step.

2. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein the second external electrode formation step is performed by baking at a temperature 70°C or more lower than that of the first external electrode formation step.

3. A method for manufacturing a multilayer ceramic electronic component according to claim 1 or claim 2, wherein the first external electrode and the second external electrode contain boron, and the second external electrode has a higher boron content than the first external electrode.

4. The method for manufacturing a multilayer ceramic electronic component according to claim 3, wherein the second external electrode has a boron content of more than 2 wt% in terms of oxides compared to the first external electrode.

5. The first external electrode and the second external electrode contain silicon, A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 4, wherein the second external electrode has a higher silicon content than the first external electrode.

6. The method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 5, wherein the first external electrode and the second external electrode are mainly composed of copper.

7. The first external electrode is mainly composed of nickel, The method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 5, wherein the second external electrode is mainly composed of copper.

8. A method for manufacturing a multilayer ceramic electronic component according to any one of claims 1 to 7, wherein the first external electrode and the second external electrode contain at least one of aluminum, calcium, strontium, lithium, sodium, and phosphorus as additives.

9. A step of preparing a ceramic laminate having a plurality of ceramic green sheets and a plurality of internal electrode patterns laminated via the plurality of ceramic green sheets, the laminate having a first end face where the ends of some of the internal electrode patterns are exposed and a second end face where the ends of other parts of the internal electrode patterns are exposed and facing the first end face, The steps include applying metal paste to the first end face, A firing step in which the ceramic laminate and the metal paste are fired simultaneously to obtain a base material from the ceramic laminate, A method for manufacturing a multilayer ceramic electronic component, comprising a baking step of applying a metal paste to the second end face of the base body and baking it at a temperature at least 50°C lower than the firing step.

10. A substrate having a plurality of dielectric layers and a plurality of internal electrode layers stacked via the plurality of dielectric layers, having a first end face on which the ends of some of the internal electrode layers are exposed and a second end face on which the ends of other parts of the internal electrode layers are exposed, The first external electrode provided on the first end face, The system includes a second external electrode provided on the second end face, which has a different composition from the first external electrode, The first external electrode and the second external electrode contain boron, The second external electrode has a higher boron content than the first external electrode. The second external electrode is a multilayer ceramic electronic component having a boron content of more than 2 wt% in terms of oxides compared to the first external electrode.

11. The first external electrode and the second external electrode contain silicon, The multilayer ceramic electronic component according to claim 10, wherein the second external electrode has a higher silicon content than the first external electrode.

12. The multilayer ceramic electronic component according to claim 10 or claim 11, wherein the first external electrode and the second external electrode are mainly composed of copper.

13. The first external electrode is mainly composed of nickel, The second external electrode is a multilayer ceramic electronic component according to any one of claims 10 to 12, with copper as the main component.

14. The multilayer ceramic electronic component according to any one of claims 10 to 13, wherein the first external electrode and the second external electrode contain at least one of aluminum, calcium, strontium, lithium, sodium, and phosphorus as additives.

15. A circuit board provided with the multilayer ceramic electronic component according to any one of claims 10 to 14.

16. A substrate having a plurality of dielectric layers and a plurality of internal electrode layers stacked via the plurality of dielectric layers, the substrate having a first end face on which the ends of some of the internal electrode layers are exposed and a second end face on which the ends of other parts of the internal electrode layers are exposed The first external electrode provided on the first end face, The system includes a second external electrode provided on the second end face, which has a different composition from the first external electrode, The first external electrode and the second external electrode contain silicon, A multilayer ceramic electronic component wherein the silicon content in the second external electrode is 2 wt% or more greater than the silicon content in the first external electrode.

Images