Semiconductor device, method for manufacturing a semiconductor device, and power conversion device

Abstract

To provide a semiconductor device and a power converter using the semiconductor device in which the bonding strength between the electrode and the terminal of a semiconductor element is secured.SOLUTION: A semiconductor device 1 has a semiconductor element 2 having an electrode 3, a substrate 4, a terminal 5a, and a bonding material 11. The terminal 5a includes a through hole 6 and has a step portion 7 inside the through hole 6. The bonding material 11 covers the step portion 7 inside the through hole 6 and is in contact with the electrode 3 of the semiconductor element 2.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a method for manufacturing a semiconductor device, and a power conversion device.

Background Art

[0002] In recent years, with the movement towards a decarbonized society, semiconductor devices typified by power semiconductor devices are used not only in household electric appliances such as air conditioners but also in in-vehicle applications such as electric vehicles and hybrid vehicles and railway applications. As a configuration of such a semiconductor device, for example, a terminal having a through hole and an electrode of a semiconductor element are joined by a bonding material such as solder and are electrically connected in the semiconductor device (see, for example, JP-A-2017-117846 and JP-A-2011-204886).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, since the semiconductor devices as described above are applied to a wide range of products, the frequency of use in high-load environments (for example, high-temperature environments or vibration environments) has increased. Therefore, high reliability and long life of the semiconductor device are required. In addition, it is known that the joint between the electrode and the terminal on the semiconductor element has a great influence on the reliability and life of the semiconductor device.

[0005] This disclosure provides a semiconductor device that solves the above-mentioned problems, and the purpose of this disclosure is to provide a semiconductor device that ensures the bonding strength between the electrodes and terminals of a semiconductor element, and a power conversion device using said semiconductor device. [Means for solving the problem]

[0006] A semiconductor device according to this disclosure comprises a semiconductor element, a substrate, terminals, and a bonding material. The semiconductor element has electrodes. The semiconductor element is mounted on the substrate. The terminals are connected to the electrodes of the semiconductor element. The terminals are provided with through holes having stepped portions. The bonding material covers the stepped portions of the through holes and is in contact with the electrodes of the semiconductor element.

[0007] A power conversion device according to this disclosure comprises a main conversion circuit, a drive circuit, and a control circuit. The main conversion circuit has the semiconductor device described above and converts and outputs the input power. The drive circuit outputs a drive signal to the semiconductor device to drive it. The control circuit outputs a control signal to the drive circuit to control the drive circuit.

[0008] A method for manufacturing a semiconductor device according to this disclosure comprises a preparation step, a semiconductor element mounting step, a semiconductor element bonding step, a terminal mounting step, and a terminal bonding step. In the preparation step, a substrate, a semiconductor element having electrodes, and a terminal having a through hole with a stepped portion are prepared. In the semiconductor element mounting step, the semiconductor element is mounted on the substrate via a first bonding material. In the semiconductor element bonding step, the semiconductor element is bonded to the substrate via the first bonding material by heating the first bonding material. In the terminal mounting step, the terminal is mounted on the electrodes of the semiconductor element via a second bonding material. In the terminal bonding step, the terminal is bonded to the electrodes via the second bonding material by heating the second bonding material. In the terminal bonding step, the second bonding material covers the stepped portion of the through hole and is in contact with the electrodes of the semiconductor element.

[0009] A method for manufacturing a semiconductor device according to this disclosure comprises a preparation step, a semiconductor element mounting step, a terminal mounting step, and a bonding step. In the preparation step, a substrate, a semiconductor element having electrodes, and a terminal having a through hole with a stepped portion are prepared. In the semiconductor element mounting step, the semiconductor element is mounted on the substrate via a first bonding material. In the terminal mounting step, the terminal is mounted on the electrodes of the semiconductor element via a second bonding material. In the bonding step, the semiconductor element is bonded to the substrate via the first bonding material and the terminal is bonded to the electrodes via the second bonding material by heating the first and second bonding materials. In the bonding step, the second bonding material covers the stepped portion of the through hole and is in contact with the electrodes of the semiconductor element.

[0010] A method for manufacturing a semiconductor device according to this disclosure comprises a preparation step, a terminal mounting step, and a terminal joining step. In the preparation step, a semiconductor element having electrodes and a terminal having a through hole with a stepped portion are prepared. In the terminal mounting step, the terminal is mounted on the electrodes of the semiconductor element such that the through hole overlaps the electrodes. In the terminal joining step, the terminal is joined to the electrodes via the bonding material by supplying a fluid bonding material into the through hole. In the terminal joining step, the bonding material covers the stepped portion of the through hole and is in contact with the electrodes of the semiconductor element. [Effects of the Invention]

[0011] According to the above, a semiconductor device that ensures the bonding strength between the electrodes and terminals of a semiconductor element, and a power conversion device using said semiconductor device can be obtained. [Brief explanation of the drawing]

[0012] [Figure 1] This is a partial plan view showing the top surface of the semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view along the line segment II-II in Figure 1. [Figure 3] This is a partially enlarged cross-sectional view of region III in Figure 2. [Figure 4]It is a partially enlarged cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 5] It is a partially enlarged cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 6] It is a partially enlarged cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 7] It is a partially enlarged cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 8] It is a partially enlarged cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 9] It is a partially enlarged cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 10] It is a flowchart of the manufacturing method of the semiconductor device according to Embodiment 1. [Figure 11] It is a modified example of the flowchart of the manufacturing method of the semiconductor device according to Embodiment 1. [Figure 12] It is a cross-sectional view of the semiconductor device according to Embodiment 2. [Figure 13] It is a cross-sectional view of the semiconductor device according to Embodiment 3. [Figure 14] It is a partially enlarged cross-sectional view in region XIV of FIG. 13. [Figure 15] It is a cross-sectional view of a modified example of the semiconductor device according to Embodiment 3. [Figure 16] It is a partially enlarged cross-sectional view in region XVI of FIG. 15. [Figure 17] It is a cross-sectional view of the semiconductor device according to Embodiment 4. [Figure 18] It is a partially enlarged cross-sectional view in region XVIII of FIG. 17. [Figure 19] It is a flowchart of the manufacturing method of the semiconductor device according to Embodiment 4. [Figure 20] It is a cross-sectional view of the semiconductor device according to Embodiment 5. [Figure 21] It is a partially enlarged cross-sectional view after mounting the bonding material of the semiconductor device according to Embodiment 5. [Figure 22]This is a partially enlarged cross-sectional view of region XXII in Figure 20. [Figure 23] This is a cross-sectional view of a modified example of the semiconductor device according to Embodiment 5. [Figure 24] This is a partially enlarged cross-sectional view of a modified example of the semiconductor device according to Embodiment 5 after the bonding material has been attached. [Figure 25] Figure 23 is a partially enlarged cross-sectional view of region XXV. [Figure 26] This is a block diagram showing the configuration of a power conversion system to which the power conversion device according to Embodiment 6 is applied. [Modes for carrying out the invention]

[0013] Embodiments of the present disclosure will be described below. Unless otherwise specified, the same or corresponding parts in the following drawings will be given the same reference numerals, and their descriptions will not be repeated.

[0014] Embodiment 1. <Configuration of semiconductor device> Figure 1 is a partial plan view of the semiconductor device 1 according to Embodiment 1, as seen from the top surface. Figure 2 is a cross-sectional view taken along line segment II-II in Figure 1. Figure 3 is a partially enlarged cross-sectional view of the semiconductor device 1 in region III of Figure 2.

[0015] The semiconductor device 1 shown in Figures 1 to 3 is, for example, a power semiconductor device and mainly comprises a semiconductor element 2, a substrate 4, terminals 5a, 5b, and 5c, metal wire wiring 12, sealing resin 14, and an insulating heat dissipation sheet 13. As shown in Figure 3, the semiconductor element 2 has electrodes 3. As shown in Figure 2, the semiconductor element 2 is mounted on the surface (top surface) of the substrate 4 via a bonding portion 11c. The semiconductor element 2 has electrodes 3 on the surface (top surface) opposite to the surface (bottom surface) facing the substrate 4. Through holes 6 are formed in terminals 5a and 5b. Inside the through holes 6 of terminals 5a and 5b, a plurality of concave stepped portions 7 are formed on the side surface of each through hole 6. The electrodes 3 are connected to terminal 5a by a bonding portion 11a made of bonding material 11. The bonding portion 11a fills the inside of the through hole 6 so as to cover the stepped portions 7 formed on the side surface of the through hole 6 of terminal 5a. In other words, electrode 3 is connected by the joint portion 11a to the region where the through hole 6 of terminal 5a is formed.

[0016] The substrate 4 is connected to the terminal 5b by a joint 11b made of bonding material 11. The joint 11b fills the inside of the through-hole 6 of the terminal 5b so as to cover the stepped portion 7 formed on the side surface of the through-hole 6. The substrate 4 is connected to the region where the through-hole 6 of the terminal 5b is formed by the joint 11b. The terminal 5c is connected to the electrode (not shown) of the semiconductor element 2 via metal wire wiring 12. The substrate 4 is connected to the insulating heat dissipation sheet 13 on the side opposite to the side on which the semiconductor element 2 is mounted (bottom surface).

[0017] As shown in Figures 1 and 2, two semiconductor elements 2 are mounted on the surface of the substrate 4. Each of the two semiconductor elements 2 includes an electrode 3 (see Figure 3). The electrodes 3 of the two semiconductor elements 2 are connected by a terminal 5a and a junction 11a. In other words, a through hole 6 is formed in the terminal 5a in the region located on the semiconductor element 2. In the semiconductor device 1 shown in Figures 1 and 2, two through holes 6 are formed in the terminal 5a. The terminal 5a extends from the two semiconductor elements 2 to the outside of the sealing resin 14. The terminal 5b is connected to the outer periphery of the upper surface of the substrate 4 by a junction 11b. In the plan view shown in Figure 1, the terminal 5c extends along the direction in which the terminal 5a extends.

[0018] The semiconductor element 2, the substrate 4, and parts of terminals 5a, 5b, and 5c are covered by a sealing resin 14. Parts of terminals 5a, 5b, and 5c extend outward from the surface of the sealing resin 14 so that they can be connected to external devices outside the sealing resin 14. The parts of terminals 5a, 5b, and 5c that extend outward from the sealing resin 14 may be bent, for example, by forming. Conductors (not shown), such as wiring or terminals, for electrical connection to a circuit board or other semiconductor device are connected to these parts of terminals 5a, 5b, and 5c. Any method can be used to connect the conductors to the parts, but for example, the conductors and parts may be fixed together with fixing members such as screws.

[0019] As shown in Figures 1 and 2, the circuit configuration of the semiconductor device 1 is a so-called 2-in-1 type, with two semiconductor elements 2 mounted on a single module. The circuit configuration of the semiconductor device 1 shows, for example, the upper arm or lower arm in an inverter circuit. The circuit configuration of the semiconductor device does not necessarily have to be a 2-in-1 type. For example, a 1-in-1 type or a 6-in-1 type may be adopted as the circuit configuration.

[0020] The semiconductor element 2 is a so-called power semiconductor element 2 that controls power. The number of semiconductor elements 2 mounted on the semiconductor device 1 is at least one. Note that multiple semiconductor elements 2 may be mounted depending on the specifications of the semiconductor device 1. Furthermore, materials such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond may be used as the semiconductor element 2. So-called wide-bandgap semiconductor materials, which have a wider bandgap than silicon, can be used as the substrate for the semiconductor element 2. When a wide-bandgap semiconductor material is used as the substrate, a highly efficient and high-temperature resistant semiconductor device 1 can be obtained. In particular, when the bonding portion 11a, which serves as the bonding material 11, is a sintered material made of silver (Ag), the heat resistance of the bonding portion 11a is improved. In this case, a power semiconductor element 2 made of silicon carbide, which can operate at high temperatures, can be suitably used. As a result, a semiconductor device 1 that can operate at higher temperatures than when a silicon-based semiconductor element is used can be realized.

[0021] The type of semiconductor element 2 is not particularly limited, but for example, IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), Schottky barrier diodes, etc. can be used. Also, for example, semiconductor element 2 may be an RC-IGBT (Reverse Conducting IGBT) in which an IGBT and a freewheeling diode are integrated on a single semiconductor chip. The length of one side of semiconductor element 2 is, for example, 1.5 mm or more and 15 mm or less.

[0022] As shown in Figure 2, an insulating heat dissipation sheet 13 is connected to the surface of the substrate 4 opposite to the surface on which the semiconductor element 2 is mounted. The material constituting the substrate 4 can be any material having high thermal conductivity. For example, the substrate 4 may be made of a metallic material such as copper (Cu), aluminum (Al), or copper-molybdenum (CuMo) alloy. Alternatively, the substrate 4 may be made of a composite material such as silicon carbide-aluminum composite material (AlSiC) or silicon carbide-magnesium composite material (MgSiC).

[0023] The insulating heat dissipation sheet 13 includes an insulating layer 13a and a metal layer 13b. The insulating layer 13a is connected to the bottom surface of the substrate 4 (the surface opposite to the top surface on which the semiconductor element 2 is fixed). The metal layer 13b is connected to the surface of the insulating layer 13a opposite to the surface connected to the substrate 4. The insulating heat dissipation sheet 13 has a laminated structure (two-layer structure) in which the insulating layer 13a and the metal layer 13b are laminated. In the metal layer 13b, the surface opposite to the surface connected to the insulating layer 13a is exposed from the sealing resin 14. Note that the insulating heat dissipation sheet 13 does not have to be a two-layer structure. In other words, the insulating heat dissipation sheet 13 may include an insulating layer 13a and multiple other metal layers 13b. For example, in the insulating heat dissipation sheet 13, two or more metal layers 13b may be laminated.

[0024] The thermal conductivity of the insulating heat dissipation sheet 13 is, for example, 2 W / (m·K) or more and 18 W / (m·K) or less. The thickness of the insulating heat dissipation sheet 13 is, for example, 0.1 mm or more and 0.2 mm or less. The insulating layer 13a may be composed of, for example, a resin containing a filler. As the filler, for example, a filler containing any of the following can be used: alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2), or boron nitride (BN). As the material for the insulating layer 13a, a resin filled with the above-mentioned filler can be used. As the resin, for example, epoxy resin can be used. The material constituting the metal layer 13b includes a metal with excellent thermal conductivity. As the metal, for example, copper (Cu) or aluminum (Al) can be used.

[0025] As shown in Figures 2 and 3, terminal 5a is provided with a through hole 6. The through hole 6 is filled with bonding material 11, and a joint portion 11a is formed so that terminal 5a and the electrode 3 of the semiconductor element 2 are connected. Terminal 5a has a first main surface 8a facing the electrode 3 of the semiconductor element 2 and a second main surface 8b on the opposite side of the first main surface 8a. The interface between the joint portion 11a and terminal 5a is formed such that the joint portion 11a extends not only to the inner side of the through hole 6 but also to the first main surface 8a and the second main surface 8b of terminal 5a. Terminal 5b is also provided with a through hole 6 in the same way as terminal 5a. Similar to the joint portion 11a, a joint portion 11b is formed so that terminal 5b and the substrate 4 are connected.

[0026] The material constituting terminals 5a, 5b, and 5c is, for example, copper (Cu). Furthermore, the material constituting terminals 5a, 5b, and 5c may be any material that possesses both electrical conductivity and heat dissipation properties. For example, the material constituting terminals 5a, 5b, and 5c may be an alloy containing either copper (Cu) or aluminum (Al), or a composite material formed by laminating these metals.

[0027] The thickness of terminals 5a, 5b, and 5c is, for example, 0.3 mm to 1.2 mm. Terminals 5a, 5b, and 5c form an integrated lead frame until tie-bar cutting or lead cutting is performed in the manufacturing process described later. The thickness of terminals 5a, 5b, and 5c in direction C shown in Figure 2, and the width of terminals 5a, 5b, and 5c in direction B shown in Figure 1 may be appropriately changed depending on the capacity of the current flowing through terminals 5a, 5b, and 5c. For example, the capacity of the current flowing through the metal wire wiring 12 connected to the electrodes (control electrodes) of the semiconductor element 2 is relatively smaller than the capacity of the current flowing through terminals 5a and 5b. Therefore, the thickness and width of terminal 5c may be smaller compared to terminals 5a and 5b. This makes it possible to miniaturize the semiconductor device 1. In recent years, the current capacity required for semiconductor devices 1 has been increasing. For example, the rated current of semiconductor device 1 may exceed 1000A. In such cases, the thickness of terminals 5a and 5b may exceed the 1.2 mm mentioned above.

[0028] The material constituting the metal wire wiring 12 is a metal containing one selected from the group consisting of aluminum (Al), copper (Cu), silver (Ag), and gold (Au). The metal wire wiring 12 may also be made of an alloy selected from the above group. The metal wire wiring 12 is joined to the terminal 5c and the electrodes of the semiconductor element 2 by pressurization and ultrasonic vibration. The metal wire wiring 12 is a wiring that carries current to control the semiconductor element 2. Therefore, the current capacity required of the metal wire wiring 12 is relatively small. Consequently, the contact area between the metal wire wiring 12 and the electrodes and terminal 5c of the semiconductor element 2 can be reduced. For this reason, the diameter of the metal wire wiring 12 is, for example, 0.02 mm or more and 0.2 mm or less.

[0029] The main component material of the sealing resin 14 is, for example, a thermosetting resin. As the thermosetting resin, for example, epoxy resin can be used. In addition to thermosetting properties, the material constituting the sealing resin 14 may also be a resin having elastic modulus, adhesion, heat resistance, and insulation properties according to the external size and internal structure of the semiconductor device 1. For example, in addition to epoxy resin, silicon resin, phenol resin, polyimide resin, etc. may be used as the material. Furthermore, in order to ensure the strength and thermal conductivity of the semiconductor device 1, the sealing resin 14 may contain dispersed fine particles or fillers. The materials constituting the fine particles and fillers may be, for example, inorganic ceramic materials. Examples of inorganic ceramic materials include alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2), boron nitride (BN), diamond, silicon carbide (SiC), or boron oxide (B2O3). The sealing resin 14 can improve heat dissipation from the heat-generating semiconductor element 2 to the outside of the semiconductor device 1 by containing fine particles or fillers.

[0030] Here, a feature of the semiconductor device 1 according to this embodiment 1 is that a concave step portion 7 is provided on the side surface 6a of the through hole 6 of terminals 5a and 5b, as shown in Figures 2 and 3. Specifically, as shown in Figure 3, the step portion 7 is composed of a first step surface 7a, a second step surface 7b, and a third step surface 7c. The first step surface 7a and the second step surface 7b each extend so as to intersect with the side surface 6a of the through hole 6. The first step surface 7a and the second step surface 7b face each other so as to be parallel to each other. The first step surface 7a and the second step surface 7b extend in a direction perpendicular to the side surface 6a of the through hole 6.

[0031] The third stepped surface 7c extends in a direction along the side surface 6a of the through hole 6. The third stepped surface 7c is, for example, parallel to the extending direction of the side surface 6a of the through hole 6. The third stepped surface 7c intersects with the first stepped surface 7a and the second stepped surface 7b, respectively. The third stepped surface 7c may be perpendicular to the first stepped surface 7a and the second stepped surface 7b in the cross-section shown in Figure 3. The third stepped surface 7c is located at the position furthest from the central axis R of the stepped portion 7 when viewed from the central axis R of the through hole 6. Such a stepped portion 7 is formed on the side surface 6a of the through hole 6 by a chemical processing method such as etching or a physical processing method such as machining. The stepped portion 7 is formed on the inner circumferential surface of the through hole 6 so as to extend in the circumferential direction around the central axis R. The stepped portion 7 may be formed around the entire circumference of the inner circumferential surface of the through hole 6, or it may be formed only on a part of the inner circumferential surface in the circumferential direction, as will be described later.

[0032] By providing such a stepped portion 7 on the side surface 6a of the through hole 6, the contact area between the terminal 5a and the joint portion 11a is increased, thus obtaining an anchoring effect. As a result, the bonding strength between the joint portion 11a and the terminal 5a is greatly improved, and a highly reliable and long-life semiconductor device 1 can be obtained. The anchoring effect can be obtained with at least one stepped portion 7. However, from the viewpoint of further increasing the anchoring effect, it is preferable to provide multiple stepped portions 7. Furthermore, from the viewpoint of improving the anchoring effect, the stepped portion 7 may be provided symmetrically with respect to the central axis R of the through hole 6, or asymmetrically with respect to the central axis R. For example, as shown in Figure 4, the stepped portion 7 may be provided only on a part of the side surface 6a of the through hole 6.

[0033] Furthermore, as shown in Figure 5, a stepped portion 7 having the shape of an internal screw may be provided on the side surface 6a of the through hole 6. Here, Figures 4 and 5 are partially enlarged cross-sectional views showing modified examples of the semiconductor device 1 shown in Figures 1 to 3. Figures 4 and 5 correspond to Figure 3. In the semiconductor device 1 shown in Figure 5, the stepped portion 7 is composed only of a first stepped surface 7a and a second stepped surface 7b. The intersection line 7d of the first stepped surface 7a and the second stepped surface 7b is arranged in a spiral shape around the central axis R. The first stepped surface 7a and the second stepped surface 7b intersect at an angle with respect to the side surface 6a of the through hole 6 so that they intersect. In other words, the first stepped surface 7a and the second stepped surface 7b are formed to be inclined with respect to the side surface 6a in the cross-section including the central axis R shown in Figure 5.

[0034] As shown in Figure 3, the step width t, which is the distance from the side surface 6a of the through hole 6 to the third stepped surface 7c, is substantially uniform across the multiple stepped portions 7 aligned in the thickness direction (direction C in Figure 3) of the terminal 5a. The step width t is substantially the same as the joining width w between the terminal 5a and the joining material 11 on the first main surface 8a and the second main surface 8b of the terminal 5a. However, the step width t may differ from the joining width w. For example, the step width t may be shorter than the joining width w between the terminal 5a and the joining material 11 on the first main surface 8a and the second main surface 8b of the terminal 5a. However, in order to avoid the formation of voids or the residue of solvent, as described later, it is preferable that the step width t be 0.5 times or less the hole diameter D of the through hole 6.

[0035] The shape of the stepped portion 7 can be any shape, but it may be changed by the processing method of the stepped portion 7. Figures 6 and 7 are partially enlarged cross-sectional views showing modified examples of the semiconductor device 1 shown in Figures 1 to 3. Figures 6 and 7 correspond to Figure 3. As shown in Figure 6, in the modified example of the semiconductor device 1, the stepped portion 7 is composed only of a first stepped surface 7a and a second stepped surface 7b. In the cross-section shown in Figure 6, the extending direction of the first stepped surface 7a and the extending direction of the second stepped surface 7b intersect. In other words, the cross-sectional shape of the stepped portion 7 shown in Figure 6 is V-shaped.

[0036] Furthermore, as shown in Figure 7, the cross-sectional shape of the stepped portion 7 in the cross-section including the central axis R of the through hole 6 may be a concave shape composed of a curved surface. A stepped portion 7 with a concave shape whose inner circumferential surface is composed of a curved surface, as shown in Figure 7, can be formed by processing the inner circumferential surface of the through hole 6 by a chemical processing method such as etching. By forming a stepped portion 7 of this shape, the stress and strain generated at the joint 11a during the operation of the semiconductor device 1 can be alleviated. However, it is important to note that if the step width t of the stepped portion 7 becomes large, the stress and strain generated at the joint 11a may increase.

[0037] The material constituting the bonding material 11 used in the semiconductor device 1 described above is selected from the group consisting of, for example, solder, sintered material, or adhesive. When solder, which is a conductive metal containing tin (Sn), is used as the bonding material 11, it is preferable that when the solder used as the bonding material 11 is melted, the solder spreads sufficiently to wet not only the inside of the through hole 6, including the stepped portion 7, but also to the areas adjacent to the through hole 6 on the first main surface 8a and the second main surface 8b of the terminal 5. In this case, the bonding area at the interface between the bonding material 11 and the terminal 5 can be increased, so that the bonding strength at the interface can be ensured. For example, as shown in Figure 3, the bonding portion 11a that joins the terminal 5a and the semiconductor element 2 can be made into a rivet-like shape. In this case, the interface between the bonding portion 11a and the terminal 5a is formed to extend not only to the side surface 6a of the through hole 6 including the stepped portion 7, but also to the first main surface 8a and the second main surface 8b of the terminal 5a. That is, a part of the bonding portion 11a is exposed on the second main surface 8b of the terminal 5a. Of the joint portion 11a, the surface of the portion that protrudes from the second main surface 8b of the terminal 5a is formed as a curved surface.

[0038] The semiconductor element 2 generates heat during the operation of the semiconductor device 1. Therefore, as the bonding material 11, the bonding portion 11a may be made of a sintered material using fine particles of metal containing silver (Ag) or copper (Cu), which have excellent heat dissipation properties. When the bonding portion 11a is made of a sintered material, the through hole 6 provided in the terminal 5 opens on the upper surface, which is the second main surface 8b. Therefore, during the heating process of the sintered material that is to become the bonding portion 11a located inside the through hole 6, the solvent contained in the sintered material is sufficiently evaporated. As a result, the solvent can be reliably removed from the sintered material that is to become the bonding portion 11a. This effect can be similarly obtained for the bonding portion 11b located in the through hole 6 of the terminal 5b. Examples of solvents include an organic film provided on the surface of the fine metal particles to prevent aggregation of the fine metal particles, and a solvent kneaded with the fine metal particles to paste the sintered material.

[0039] In this case, if a large amount of solvent remains in the joint 11a after the heating process of the sintered material that is to become the joint 11a, voids caused by the solvent will be generated in the joint 11a. As a result, the joint material 11 will not fill the stepped portion 7, and the strength of the joint 11a and joint 11b will be insufficient. Furthermore, if large voids are formed in the joint 11a and joint 11b, the reliability, lifespan, and thermal conductivity of the joint 11a and joint 11b will decrease. On the other hand, in the semiconductor device 1 according to this embodiment, when sintered material is used as the joint material 11, the terminal 5 is penetrated by the through hole 6 (the through hole 6 is not closed), so the solvent in the sintered material is sufficiently removed from the joint 11a and joint 11b during the heating process. Therefore, the above problems can be prevented.

[0040] Since the wettability of the sintered material is inferior to that of the solder, the shape of the joint 11a using the sintered material is as shown in Figure 8. Here, Figure 8 is a partially enlarged cross-sectional view showing a modified example of the semiconductor device 1 shown in Figures 1 to 3. Figure 8 corresponds to Figure 3. The joint 11a of the semiconductor device 1 shown in Figure 8 is made of sintered material. The upper surface of the joint 11a shown in Figure 8 is a nearly flat plane. In addition, the surfaces of the joint 11a positioned on the first main surface 8a and the second main surface 8b of the terminal 5a extend in a direction perpendicular to the first main surface 8a or the second main surface 8b.

[0041] In the joints 11a and 11b formed by the bonding material 11, if a high thermal conductivity of, for example, 100 W / (m·K) or more is not required, the bonding material 11 may be a sintered material containing resin or an adhesive. When the bonding material 11 is a sintered material containing resin or an adhesive, the joints 11a and 11b are made less elastic by the resin. As a result, highly reliable and long-lasting joints 11a and 11b can be obtained. Furthermore, in the joint 11c that bonds the semiconductor element 2 to the substrate 4, a plate-shaped bonding material 11 can be used, but to improve productivity, a paste-like bonding material 11 may be used. The paste-like bonding material 11 may be placed on the surface of the substrate 4, for example, by a screen printing method.

[0042] As shown in Figure 9, a plating layer 10 may be provided on the surfaces of terminals 5a and 5b that come into contact with the bonding material 11. Figure 9 is a partially enlarged cross-sectional view showing a modified example of the semiconductor device 1 shown in Figures 1 to 3. Figure 9 corresponds to Figure 3. The plating layer 10 may be selected from the group consisting of a nickel (Ni) plating layer, a silver (Ag) plating layer, and a tin (Sn) plating layer. The thickness of the plating layer 10 is 0.001 mm or more and 0.002 mm or less. In Figure 9, the plating layer 10 is formed over the entire interface between the bonding portion 11a and terminal 5a, but the plating layer 10 may be provided only in part at the interface between the bonding portion 11a and terminal 5a and the interface between the bonding portion 11b and terminal 5b. <Manufacturing method for semiconductor devices> Figure 10 is a flowchart illustrating a method for manufacturing a semiconductor device 1 according to Embodiment 1. The method for manufacturing the semiconductor device 1 will be described below. As shown in Figure 10, the method for manufacturing the semiconductor device 1 includes a step (S1) in which a substrate 4 and a semiconductor element 2 are prepared. In this step (S1), the substrate 4, the semiconductor element 2, and the bonding material 11, and other components necessary for the subsequent steps are prepared.

[0043] Next, the first mounting process (S2) is performed. In this process (S2), the semiconductor element 2 is mounted on the surface of the substrate 4 via a bonding material 11, which serves as the first bonding material. Specifically, first, a plate-shaped bonding material 11, corresponding to the size of the flat surface of the semiconductor element 2, is placed at a predetermined position on the surface of the substrate 4. Furthermore, the semiconductor element 2 is mounted on top of the bonding material 11. If necessary, a dedicated jig for positioning and fixing may be used to prevent the substrate 4, bonding material 11, and semiconductor element 2 from shifting position. The dedicated jig is made of, for example, carbon material. The dedicated jig is provided with openings for positioning the substrate 4, bonding material 11, and semiconductor element 2 so that these components can be easily positioned (not shown).

[0044] Next, the first bonding process (S3) is performed. In this process (S3), the semiconductor element 2 and the substrate 4 are bonded via the bonding material 11. Specifically, the substrate 4, on which the bonding material 11 and semiconductor element 2 are mounted, is placed in a reflow apparatus that heats and cools. Subsequently, the bonding material 11 melts due to heating by the reflow apparatus. After that, the substrate 4 on which the bonding material 11 and semiconductor element 2 are mounted is cooled. As a result, the semiconductor element 2 and the substrate 4 are bonded by a joint 11c formed by the solidified bonding material 11. It should be noted that heating and cooling must be performed according to a temperature profile corresponding to the material composition of the bonding material 11 (for example, solder, sintered material, or adhesive). If a dedicated jig as described above is used, the dedicated jig is also placed in the reflow apparatus together with the substrate 4, and heating and cooling are performed.

[0045] Next, the metal wire wiring process (S4) is carried out. In this process (S4), a wire bonding apparatus is used to connect the externally connected terminal 5c and the electrode (control electrode) of the semiconductor element 2 via metal wire wiring 12 (see Figure 1).

[0046] Next, the second mounting process (S5) is performed. In this process (S5), terminal 5a (see Figure 2) is placed on the electrode 3 (see Figure 3) of the semiconductor element 2 via a bonding material 11 as a second bonding material. The bonding material 11 is a plate-shaped bonding material having a size corresponding to the size of the electrode 3. Terminal 5a has a through hole 6 with a stepped portion 7. Terminal 5a is positioned so that the through hole 6 is located on the bonding material 11. Also, terminal 5b (see Figure 2) is placed on the surface of the substrate 4 via a plate-shaped bonding material 11. Terminal 5b has a through hole 6 with a stepped portion 7. Terminal 5b is positioned so that the through hole 6 is located on the bonding material 11. If necessary, a special jig may be used to position and fix the bonding material 11 mounted on the electrode 3 of the semiconductor element 2, the bonding material 11 mounted on the surface of the substrate 4, terminal 5a, and terminal 5b so that their positions do not shift.

[0047] Next, the second bonding process (S6) is performed. In this process (S6), the electrodes 3 and terminals 5a of the semiconductor element 2, and the substrate 4 and terminals 5b are bonded via the bonding material 11. Specifically, the substrate 4, on which the bonding material 11, terminals 5a, and terminals 5b are mounted, is placed in a reflow apparatus for heating and cooling. Next, the bonding material 11 is melted by heating in the reflow apparatus. The heating temperature at this time is lower than the heating temperature in the first bonding process (S3). Subsequently, by cooling the molten bonding material 11, the semiconductor element 2 and terminals 5a, and the substrate 4 and terminals 5b are bonded by the bonding portions 11a and 11b made of the bonding material 11. Heating and cooling are performed according to a temperature profile corresponding to the material composition of the bonding material 11 (for example, solder, sintered material, and adhesive). Furthermore, the melting point of the bonding material 11 melted in this step (S6) is lower than the melting point of the bonding material 11 that constitutes the joint 11c used to bond the substrate 4 and the semiconductor element 2. This is to prevent the bonding material 11 that was already used to bond the substrate 4 and the semiconductor element 2 in the first bonding step (S3) from melting during the heating in this step (S6).

[0048] Furthermore, after the above step (S6), the joints 11a and 11b are located within the through-hole 6 and can be seen from the upper surface (second main surface 8b) of terminals 5a and 5b, respectively. Therefore, it is easy to confirm from the upper surface of the semiconductor device 1 (the second main surface 8b side of terminal 5a) that the through-hole 6 is filled with the bonding material 11. In addition, since the bonding material 11 and the surrounding members of the bonding material 11 can be identified from the upper surface of the semiconductor device 1, the state of the joints 11a and 11b can be easily inspected automatically using image processing.

[0049] Next, the sealing process (S7) is performed. In this process (S7), the semiconductor element 2 is sealed with sealing resin 14 using a transfer mold. Specifically, a tablet-shaped sealing resin 14 and an insulating heat dissipation sheet 13 (see Figure 2) are prepared. The insulating heat dissipation sheet 13 is placed inside the mold of the transfer molding apparatus. Next, the semiconductor element 2 and the substrate 4 to which terminals 5a, 5b, and 5c are bonded are placed on the insulating heat dissipation sheet 13. Next, the tablet-shaped sealing resin 14 is introduced into the apparatus. Next, by heating the inside of the mold, the insulating heat dissipation sheet 13 and the substrate 4 adhere closely together, and at the same time, the semiconductor element 2, the substrate 4, and terminals 5a, 5b, and 5c are sealed with the molten sealing resin 14, except for some of terminals 5a, 5b, and 5c. Next, a curing process is performed to harden the sealing resin 14. If terminals 5a, 5b, and 5c are composed of lead frames, the tie bars, resin, and lead frame frames are cut. Next, the parts (tips) of terminals 5a, 5b, and 5c protruding from the sealing resin 14 are formed and bent. Finally, the semiconductor device is inspected to ensure that it meets the electrical characteristics of the semiconductor device 1. In this way, the semiconductor device 1 shown in Figures 1 to 3 is manufactured.

[0050] Next, a modified example of the method for manufacturing the semiconductor device 1 is shown. Figure 11 is a flowchart illustrating a modified example of the method for manufacturing the semiconductor device 1 according to Embodiment 1. The method for manufacturing the semiconductor device 1 shown in Figure 11 basically comprises the same steps as the method for manufacturing the semiconductor device 1 shown in Figure 10, but the steps from the first mounting step (S2) onward shown in Figure 10 are different.

[0051] As shown in Figure 11, the process of preparing the substrate 4 and semiconductor element 2 (S1a) and the first mounting process (S2a) are carried out in the same way as the process (S1) and process (S2) shown in Figure 10. After that, the second mounting process (S3a) is carried out. This process (S3a) is the same as the second mounting process (S) shown in Figure 10. 5 This is the same process as (S2a). Note that process (S3a) may be performed before process (S2a) described above.

[0052] Next, the first bonding process (S4a) is performed. In this process (S4a), the first bonding process (S3) and the second bonding process (S6) shown in Figure 10 are performed simultaneously. That is, the substrate 4, on which the semiconductor elements 2 and terminals 5a and 5b are stacked on its upper surface via bonding material 11, is placed into the reflow apparatus. Heating and cooling in the reflow apparatus simultaneously bond the substrate 4 to the semiconductor elements 2, the semiconductor elements 2 to terminals 5a, and the substrate 4 to terminals 5b.

[0053] Subsequently, the metal wire wiring process (S5a) and the sealing process (S6a) are carried out in the same manner as steps (S4) and (S7) shown in Figure 10. In this way, the semiconductor device 1 shown in Figures 1 to 3 can also be obtained.

[0054] The method for manufacturing the semiconductor device 1 shown in Figure 11 reduces the number of heating and cooling processes using a reflow apparatus compared to the method for manufacturing the semiconductor device 1 shown in Figure 10. As a result, productivity in the manufacturing process of the semiconductor device 1 can be increased. Furthermore, since the number of heating and cooling processes can be reduced, the thermal history of the semiconductor device 1 can be suppressed. This suppresses the occurrence of defects caused by such thermal history, such as distortion occurring in the joint 11c where the semiconductor element 2 and the substrate 4 are joined, or warping of each component of the semiconductor device 1. In addition, if a dedicated jig is used for aligning the semiconductor element 2, the bonding material 11, and the terminals 5a and 5b, the alignment of the above components can be performed all at once before the above process (S4a), thus reducing the number of man-hours required for using the dedicated jig compared to the method for manufacturing the semiconductor device shown in Figure 10. Furthermore, the same bonding material 11 can be used for the bonding material 11 that forms the joint 11a, the joint 11b, and the joint 11c. Therefore, compared to the case where the type of joining material 11 is changed for joints 11a and 11b and joint 11c, the work can be simplified, and the occurrence of problems such as applying a different type of joining material 11 to each joint than that designed can be suppressed.

[0055] <Effects and Effects> A semiconductor device 1 according to this disclosure comprises a semiconductor element 2 having electrodes 3, a substrate 4, terminals 5a, 5b, and 5c, metal wire wiring 12, and sealing resin 14. The semiconductor element 2 is mounted on the substrate 4 via a bonding material 11. The semiconductor element 2 has electrodes 3 on the side opposite to the side facing the substrate 4. Terminal 5c is connected to the electrodes 3 of the semiconductor element 2 via the metal wire wiring 12. Terminals 5a and 5b include through holes 6, each having a plurality of concave stepped portions 7 inside the through hole 6. The bonding material 11 covers the stepped portions 7 inside the through hole 6 and is in contact with the electrodes 3 of the semiconductor element 2. That is, the electrodes 3 are connected to a bonding portion 11a including the bonding material 11 that covers the stepped portions 7 inside the through hole 6 of terminal 5a. The substrate 4 is connected to a bonding portion 11b including the bonding material 11 that covers the stepped portions 7 inside the through hole 6 of terminal 5b.

[0056] In this way, the bonding area between terminal 5a and joint 11a, and the bonding area between terminal 5b and joint 11b are increased, resulting in an anchoring effect. Therefore, the bonding strength of joint 11a can be improved compared to when there is no step portion 7 in the through hole 6. As a result, a highly reliable and long-life semiconductor device 1 can be obtained. Furthermore, even if a crack occurs in joint 11a, crack propagation can be suppressed because the shape of joint 11a is complex. The same effect can be obtained in joint 11b as well.

[0057] In the semiconductor device 1 described above, as shown in Figure 3, the bonding material 11 extends from inside the through hole 6 to the first main surface 8a and the second main surface 8b. In other words, the bonding portion 11a that joins the terminal 5a and the semiconductor element 2 is formed such that the interface between the bonding portion 11a and the terminal 5a extends not only to the side surface 6a of the through hole 6 including the stepped portion 7, but also to the first main surface 8a and the second main surface 8b of the terminal 5a. In this way, the bonding portion 11a takes on a rivet-like shape, and the bonding strength of the bonding portion 11a is increased. The same effect can be obtained with the bonding portion 11b.

[0058] The materials constituting the bonding material 11 used in the semiconductor device 1 may include any one selected from the group consisting of solder, sintered material, and adhesive. If the bonding material 11 is solder, the wettability of the solder causes the bonding material 11 to adhere closely to the surface of the terminal 5 (the side surface 6a of the through hole 6 and the surface of the stepped portion 7), thereby ensuring the bonding strength between the bonding portion 11a and the terminal 5.

[0059] When the bonding material 11 is a sintered material using fine particles of metal containing silver (Ag) or copper (Cu), a joint 11a with excellent heat dissipation can be obtained. Furthermore, because the through-hole 6 is not closed, the solvent contained in the sintered material is sufficiently evaporated during the heating process to form the joint 11a, and the solvent can be removed from the joint 11a. As a result, the stepped portion 7 of the through-hole 6 can be reliably covered with the bonding material 11, and the formation of voids in the joint 11a can be prevented. When the bonding material 11 is a sintered material containing resin or an adhesive, the joints 11a and 11b can be made less elastic. As a result, a highly reliable and long-life semiconductor device 1 can be obtained.

[0060] In the semiconductor device 1 described above, terminals 5a and 5b include a plating layer 10 formed in the region in contact with the bonding material 11. That is, at terminals 5a and 5b, the plating layer 10 may be provided on the interface with the bonding material 11. The plating layer 10 mainly consists of one selected from the group consisting of nickel (Ni), silver (Ag), gold (Au), and tin (Sn). That is, the plating layer 10 may be one selected from the group consisting of nickel plating, silver plating, gold plating, and tin plating. In this way, the terminals 5 can improve adhesion with the bonding material 11 at the interface with the bonding portions 11a and 11b, thereby preventing the occurrence of unbonded areas. As a result, the bonding strength between the bonding portions 11a and 11b and terminals 5 can be ensured. In particular, when the bonding material 11 is solder, the plating layer 10 improves the wettability of the solder, so that, for example, the bonding material 11 can be sufficiently adhered to the stepped portion 7 of the through hole 6.

[0061] Embodiment 2. <Configuration of semiconductor device> Figure 12 is a cross-sectional view of the semiconductor device 1 according to Embodiment 2. Figure 12 corresponds to Figure 2. The semiconductor device 1 shown in Figure 12 basically has the same configuration as the semiconductor device 1 shown in Figures 1 to 3, but differs in that a cooler 15 is connected to the metal layer 13b of the insulating heat dissipation sheet 13. Specifically, the cooler 15 is connected to the metal layer 13b of the insulating heat dissipation sheet 13, which is exposed from the sealing resin 14, via a joint 11d.

[0062] If the operating temperature of the semiconductor element 2 exceeds the rated value, the switching performance of the semiconductor element 2 will decrease, and in the worst case, thermal runaway will occur, damaging the semiconductor element 2. For this reason, the heat dissipation and cooling performance of the semiconductor device 1 can be improved not only by using a substrate 4 with excellent thermal conductivity, but also by providing a cooler 15 via an insulating heat dissipation sheet 13. For example, a material selected from the group consisting of the aforementioned bonding material 11, thermal grease, and TIM (Thermal Interface Material) can be placed on the lower surface of the insulating heat dissipation sheet 13, and the substrate 4 and the cooler 15 can be connected by a bonding portion 11d made of this material.

[0063] The material of the cooler 15 is a metal with excellent thermal conductivity, such as aluminum (Al). The cooler 15 has a plurality of heat dissipation fins 15a. The cooling method of the cooler 15 may be air-cooled or water-cooled. Alternatively, the substrate 4 and the cooler 15 may be integrated without forming a joint 11d. In this case, by not forming a joint 11d, the interface caused by the presence of the joint 11d is eliminated, and thus the thermal resistance at that interface can be eliminated. As a result, the heat dissipation and cooling performance from the heat-generating semiconductor element 2 in the semiconductor device 1 are improved. When the substrate 4 and the cooler 15 are integrated, a flat film-like insulating layer 13a is provided between the substrate 4 and the cooler 15. The material constituting the insulating layer 13a may be an inorganic material selected from the group consisting of alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2), or boron nitride (BN), or an organic material selected from the group consisting of epoxy resin, polyimide resin, acrylic resin, and polyphenylene sulfide (PPS) resin.

[0064] <Effects and Effects> The semiconductor device 1 may include a cooler 15 connected to the substrate 4 via an insulating heat dissipation sheet 13. Specifically, the semiconductor device 1 may include a cooler 15 connected to the metal layer 13b of the insulating heat dissipation sheet 13 exposed from the sealing resin 14 via a joint 11d. In this way, the heat dissipation and cooling performance from the heat-generating semiconductor element 2 in the semiconductor device 1 can be improved.

[0065] The semiconductor device 1 may include a cooler 15 connected to the substrate 4. Specifically, the semiconductor device 1 may include a cooler 15 directly connected to the substrate 4 without using an insulating heat dissipation sheet 13. In this case, the expensive insulating heat dissipation sheet 13 is not required in the manufacture of the semiconductor device 1, thus reducing the manufacturing cost of the semiconductor device 1.

[0066] Embodiment 3. <Configuration of semiconductor device> Figure 13 is a cross-sectional view of the semiconductor device 1 according to Embodiment 3. Figure 13 corresponds to Figure 2. Figure 14 is a partially enlarged cross-sectional view of region XIV in Figure 13. Figure 14 corresponds to Figure 3. The semiconductor device 1 shown in Figures 13 and 14 basically has the same configuration as the semiconductor device 1 shown in Figures 1 to 3, but the shape of the through-hole 6 is different from that of the semiconductor device 1 shown in Figures 1 to 3. Specifically, as shown in Figure 14, in the through-hole 6 provided in terminal 5, the second opening area S2 of the through-hole 6 on the second main surface 8b is smaller than the first opening area S1 of the through-hole 6 on the first main surface 8a. From a different perspective, in the through-hole 6 provided in terminals 5a and 5b, the width of the through-hole 6 on the second main surface 8b is narrower than the width of the through-hole 6 on the first main surface 8a. The extending direction of the side surface 6a of the through-hole 6 is inclined with respect to the first main surface 8a. The side surface 6a of the through-hole 6 is inclined to face the electrode 3 of the semiconductor element 2.

[0067] As shown in Figures 13 and 14, there is one recessed step portion 7 on the side surface 6a of the through hole 6. However, from the viewpoint of improving the anchoring effect, it is desirable to have multiple step portions 7. As shown in Figure 14, the bonding width w between the terminal 5a and the bonding material 11 on the first main surface 8a is greater than the step width t. This is because, when the bonding material 11 mounted on the semiconductor element 2 is heated in a reflow apparatus, especially when the bonding material 11 is solder, the wettability of the bonding material 11 causes the bonding material 11 to wet and spread on the first main surface 8a away from the through hole 6, so that the bonding width w between the bonding material 11 and the first main surface 8a is greater than the step width t.

[0068] <Effects and Effects> In the semiconductor device 1 described above, terminal 5a may have a first main surface 8a facing the electrode 3 of the semiconductor element 2, and a second main surface 8b opposite to the first main surface 8a. The through hole 6 may be formed to extend from the first main surface 8a to the second main surface 8b. The second opening area S2 of the through hole 6 on the second main surface 8b may be smaller than the first opening area S1 of the through hole 6 on the first main surface 8a. In other words, in the semiconductor device 1 described above, the shape of the through hole 6 provided in terminal 5 is such that the second opening area S2 of the through hole 6 on the second main surface 8b is smaller than the first opening area S1 of the through hole 6 on the first main surface 8a. In this way, in the manufacturing process of the semiconductor device 1, a plate-shaped bonding material 11 can be fitted into the inside of the through hole 6 from the first main surface 8a side, making it easy to position and fix the bonding material 11.

[0069] <Structure and effects of the modified example> Figure 15 is a cross-sectional view of a modified example of the semiconductor device 1 according to Embodiment 3. Figure 15 corresponds to Figure 13. Figure 16 is a partially enlarged cross-sectional view of region XVI in Figure 15. Figure 16 corresponds to Figure 14. The semiconductor devices shown in Figures 15 and 16 basically have the same configuration as the semiconductor devices shown in Figures 13 and 14, but the shapes of the joints 11a and 11b differ from those of the semiconductor devices shown in Figures 13 and 14. Specifically, as shown in Figure 16, in the joint 11a, the top surface of the bonding material 11 is positioned between the stepped portion 7 in the through hole 6 and the second main surface 8b. In other words, the connection interface between the joint 11a and the terminal 5a does not extend to the second main surface 8b, which is the upper surface of the terminal 5a. The joint 11a does not extend onto the second main surface 8b. The shape of the top surface of the bonding material 11 is a concave shape as shown in Figure 16, but it may be a convex shape depending on the material of the bonding material 11 and the terminal 5 or the heating conditions. The top surface is formed by a curved surface. This configuration also allows for the same effects as those obtained with the semiconductor device 1 shown in Figures 13 and 14.

[0070] Here, as the required power capacity of the semiconductor device 1 tends to increase, the rated current of the semiconductor device 1 may exceed, for example, 1000A. In this case, the thickness of the terminal 5 may exceed 1.2mm. In such cases, the heat capacity of the terminal 5 is large, and during heating by the reflow apparatus, the heat transferred from the semiconductor element 2 and the bonding material 11 to the terminal 5 causes a large temperature gradient in the thickness direction of the terminal 5 (direction C in Figure 16). As a result, the temperature of the terminals 5a and 5b is higher on the first main surface 8a side than on the second main surface 8b side. Consequently, the bonding material 11 near the first main surface 8a remains molten for a longer period, while the bonding material 11 near the second main surface 8b, where the temperature is relatively lower, begins to harden more quickly. Therefore, the joints 11a and 11b shown in Figures 15 and 16 are formed.

[0071] Embodiment 4. <Configuration of semiconductor device> Figure 17 is a cross-sectional view of the semiconductor device 1 according to Embodiment 4. Figure 17 corresponds to Figure 2. Figure 18 is a partially enlarged cross-sectional view of region XVIII in Figure 17. Figure 18 corresponds to Figure 3. The semiconductor device 1 shown in Figures 17 and 18 basically has the same configuration as the semiconductor device 1 shown in Figures 1 to 3, but the shape of the through-hole 6 is different from that of the semiconductor device 1 shown in Figures 1 to 3. Specifically, as shown in Figure 18, the through-hole 6 provided in the terminal 5 has a shape in which the second opening area S2 of the through-hole 6 on the second main surface 8b is larger than the first opening area S1 of the through-hole 6 on the first main surface 8a. From a different perspective, in the through-hole 6 provided in terminals 5a and 5b, the width of the through-hole 6 on the second main surface 8b is wider than the width of the through-hole 6 on the first main surface 8a. The extending direction of the side surface 6a of the through-hole 6 is inclined with respect to the first main surface 8a. The side surface 6a of the through-hole 6 is inclined so as to face away from the electrode 3 side of the semiconductor element 2 (upwards) when viewed from the terminal 5. Due to the shape of this through-hole 6, the manufacturing method of the semiconductor device 1 shown in Figures 17 and 18, as described later, differs from the manufacturing method of the semiconductor device shown in Figures 1 to 3.

[0072] <Manufacturing method for semiconductor devices> Next, a method for manufacturing the semiconductor device 1 according to Embodiment 4 will be described. Figure 19 is a flowchart illustrating the method for manufacturing the semiconductor device 1 according to Embodiment 4. The method for manufacturing the semiconductor device 1 shown in Figure 19 basically includes the same steps as the method for manufacturing the semiconductor device 1 shown in Figure 10, but the second mounting step (S5b) and the second bonding step (S6b) differ from the second mounting step (S5) and the second bonding step (S6) shown in Figure 10.

[0073] As shown in Figure 19, the following steps are performed in the same manner as steps (S1), (S2), (S3), and (S4) shown in Figure 10: preparation of the substrate 4 and semiconductor element 2 (S1b), first mounting step (S2b), first bonding step (S3b), and metal wire wiring step (S4b). Subsequently, the second mounting step (S5b) is performed. In this step (S5b), without mounting the bonding material 11, the terminal 5a is positioned relative to the electrode 3 of the semiconductor element 2 bonded to the substrate 4. Also, the terminal 5b is positioned relative to the substrate 4.

[0074] Next, the second bonding process (S6b) is carried out. In this process (S6b), with the substrate 4, semiconductor element 2, terminals 5a and 5b heated, molten bonding material 11, which is a fluid bonding material 11, is applied to the through holes 6 from the upper surface (second main surface 8b) side of terminals 5a and 5b using a syringe or the like. At this time, since the second opening area S2 of the through holes 6 on the second main surface 8b of terminals 5a and 5b is larger than the first opening area S1 of the through holes 6 on the first main surface 8a, the position where the molten bonding material 11 is applied is easily determined.

[0075] Subsequently, the sealing process (S6a) is performed in the same manner as the process (S7) shown in Figure 10. In this way, the semiconductor device 1 shown in Figures 17 and 18 can be obtained.

[0076] <Effects and Effects> In the semiconductor device 1 described above, the second opening area S2 of the through-hole 6 on the second main surface 8b may be larger than the first opening area S1 of the through-hole 6 on the first main surface 8a of the terminal 5. In other words, the shape of the through-hole 6 provided in the terminal 5 is such that the second opening area S2 of the through-hole 6 on the second main surface 8b is larger than the first opening area S1 of the through-hole 6 on the first main surface 8a. In this way, when the molten bonding material 11 is applied to the through-hole 6 from the second main surface 8b side, the application position of the molten bonding material 11 can be easily determined. Such a manufacturing method is effective, for example, when it is difficult to mount and position the plate-shaped bonding material 11 on the electrode 3.

[0077] For example, when solder is used as the bonding material 11, the solder applied to the upper surface of the through-hole 6 will spread to even the fine details on the side surface 6a of the through-hole 6 due to the wettability of the solder. Therefore, even if the solder application position is slightly off, the semiconductor element 2 and the terminal 5 will be joined without any problems. However, when a sintered material is used as the bonding material 11, applying the sintered material using the method described above may cause the sintering of the sintered material to progress during the application process. Similarly, when an adhesive is used as the bonding material 11, applying the adhesive using the method described above may cause the adhesive to harden. In this case, the bonding material 11 may be adjusted to a viscosity that is easy to apply, and then applied to the through-hole 6 of the terminal 5 at room temperature using a syringe or the like.

[0078] Embodiment 5. <Configuration of semiconductor device> Figure 20 is a cross-sectional view of the semiconductor device 1 according to Embodiment 5. Figure 20 corresponds to Figure 2. Figure 21 is a partially enlarged view of the semiconductor device 1 according to Embodiment 5 immediately after the bonding material 11 is mounted on the electrode 3 of the semiconductor element 2. Figure 22 is a partially enlarged cross-sectional view of region XXII in Figure 20. Figure 22 corresponds to Figure 3. The semiconductor device 1 shown in Figures 20 to 22 basically has the same configuration as the semiconductor device 1 shown in Figures 1 to 3, but the shape of the through-hole 6 is different from that of the semiconductor device 1 shown in Figures 1 to 3. Specifically, in the semiconductor device 1 shown in Figures 20 to 22, a convex-shaped step portion 7 is formed on the side surface 6a of the through-hole 6. In the through-hole 6, the first opening area S1 and the second opening area S2 are larger than the minimum hole area S3 in the narrow region L.

[0079] The first narrow region L is an area inside the through hole 6, located at a distance l from the first main surface 8a in the direction C, which is along the central axis R of the through hole 6. The narrow region L has the minimum hole area S3, which is the smallest hole area in the through hole 6. In the cross-section shown in Figure 21 (a cross-section including the central axis R of the through hole 6), the stepped portion 7 has a convex shape. The third stepped surface 7c of the stepped portion 7 is located closest to the central axis R of the through hole 6. The hole area of ​​the through hole 6 is almost uniform in the direction C, except for the portion where the stepped portion 7 exists. In other words, the side surface 6a of the through hole 6 is almost perpendicular to the first main surface 8a and the second main surface 8b in the area other than the stepped portion 7.

[0080] The joint portion 11a, made of the bonding material 11, is connected to the electrode 3 of the semiconductor element 2 and is in contact with the portion of the first main surface 8a of the terminal 5a adjacent to the through hole 6. The joint portion 11a fills the region of the through hole 6 on the first main surface 8a side of the stepped portion 7. A part of the joint portion 11a is positioned to extend above the stepped portion 7. A part of the joint portion 11a is in contact with the third stepped surface 7c, which is the end face of the stepped portion 7, and the first stepped surface 7a, which is the upper surface. The upper end of the bonding material 11 does not reach the second main surface 8b. The upper surface of the bonding material 11 is a curved surface that is convex toward the second main surface 8b side. The shape of the through hole 6 of the terminal 5b and the shape of the joint portion 11b connected to the terminal 5b are the same as the shape of the through hole 6 of the terminal 5a and the shape of the joint portion 11a connected to the terminal 5a.

[0081] The method for manufacturing the semiconductor device 1 shown in Figure 20 can be basically the same as the method for manufacturing the semiconductor device 1 shown in Figures 1 to 3. For example, when using the manufacturing method shown in Figure 10, after performing steps (S1) to (S4), in the second mounting step (S5), as shown in Figure 21, a plate-shaped bonding material 11 having the same or slightly smaller area as the first opening area S1 of the through hole 6 of the first main surface 8a is first mounted on the electrodes 3 of the semiconductor element 2 and on the substrate 4 (see Figure 20). Then, terminals 5a and 5b are positioned so that the through hole 6 overlaps with the bonding material 11. By doing so, the bonding material 11 overlaps with the through hole 6, or the upper part of the bonding material 11 is inserted into the through hole 6, making it easy to position and fix terminals 5a and 5b to the bonding material 11. After that, by performing the second bonding step (S6) in Figure 10, the bonding material 11 is positioned inside the through hole 6 as shown in Figure 22. Subsequently, by performing the sealing process (S7) shown in Figure 10, the semiconductor device 1 shown in Figure 20 can be obtained.

[0082] Note that the first opening area S1 and the second opening area S2 may be different. From the viewpoint of bonding strength, it is preferable that the first opening area S1 is larger than the second opening area S2. Also, since the second opening area S2 is larger than the minimum hole area S3, the manufacturing method described in Embodiment 4 can also be used as the manufacturing method for the semiconductor device 1 according to this embodiment.

[0083] <Effects and Effects> In the semiconductor device 1 described above, the through-hole 6 may have a narrow region L as a first region where the radial area of ​​the through-hole 6 is minimized. The first opening area S1 of the through-hole 6 on the first main surface 8a and the second opening area S2 of the through-hole 6 on the second main surface 8b may be larger than the area in the narrow region L (minimum hole area S3). In this way, by using a plate-shaped joining material 11 with an area equal to or slightly smaller than the first opening area S1, the relative positioning and fixing of the joining material 11 and the terminals 5a and 5b becomes easier. Also, as shown in Figure 22, the joint takes on a rivet-like shape, and the joining strength of the joint 11a is increased.

[0084] <Structure and effects of the modified example> Figure 23 is a cross-sectional view of a modified example of the semiconductor device 1 according to Embodiment 5. Figure 23 corresponds to Figure 20. Figure 24 is a partially enlarged view of the manufacturing method of the semiconductor device 1 shown in Figure 23, in which the bonding material 11 is mounted on the electrode 3 of the semiconductor element 2. Figure 24 corresponds to Figure 21. Figure 25 is a partially enlarged cross-sectional view of region XXV in Figure 23. Figure 25 corresponds to Figure 22.

[0085] The semiconductor device 1 shown in Figures 23 to 25 basically has the same configuration as the semiconductor device 1 shown in Figures 20 to 22, but the shape of the through-hole 6 differs from that of the semiconductor device 1 shown in Figures 20 to 22. Specifically, the side surface 6a is inclined with respect to the first main surface 8a and the second main surface 8b so that a narrow region L is formed in the central part of the through-hole 6 in the direction along the central axis R. In other words, the side surface 6a of the through-hole 6 intersects with the first main surface 8a and the second main surface 8b at an angle so that the hole area gradually increases from the narrow region L toward the first main surface 8a and the second main surface 8b, respectively. In addition, a concave step portion 7 is provided on the side surface 6a in the narrow region L. The third step surface 7c is located further from the central axis R than the first step surface 7a and the second step surface 7b. The first step surface 7a and the second step surface 7b extend in a direction perpendicular to the central axis R. The stepped portion 7 of the groove is formed in an annular shape so as to extend in the circumferential direction with respect to the central axis R. The stepped portion 7 may be formed only on a portion of the circumferential direction.

[0086] As shown in Figure 25, the joint 11a made of the bonding material 11 connects the electrode 3 and the terminal 5a, similar to the joint 11a shown in Figure 22. The joint 11a is connected to the electrode 3 of the semiconductor element 2 and is in contact with the portion of the terminal 5a adjacent to the through hole 6 on the first main surface 8a. The surface (side) of the joint 11a located between the electrode 3 and the first main surface 8a is concave and curved. The joint 11a fills the region on the first main surface 8a side of the step portion 7 in the through hole 6 and the interior of the concave step portion 7. A part of the joint 11a is positioned to extend above the step portion 7. A part of the joint 11a is in contact with a part of the side 6a located above the step portion 7 (on the second main surface 8b side). The upper end of the bonding material 11 does not reach the second main surface 8b. The upper surface of the bonding material 11 is a curved surface that is convex toward the second main surface 8b side. Furthermore, the shape of the through-hole 6 of terminal 5b and the shape of the joint 11b connected to terminal 5b shown in Figure 23 are the same as the shape of the through-hole 6 of terminal 5a and the shape of the joint 11a connected to terminal 5a.

[0087] The method for manufacturing the semiconductor device 1 shown in Figure 23 can be basically the same as the method for manufacturing the semiconductor device 1 shown in Figure 20. In the method for manufacturing the semiconductor device 1 shown in Figure 23, in the second mounting step (S5) in Figure 10, a plate-shaped bonding material 11 having the same or slightly smaller area as the first opening area S1 of the through hole 6 of the first main surface 8a is mounted on the electrodes 3 of the semiconductor element 2 and on the substrate 4 (see Figure 23), as shown in Figure 24. After that, terminals 5a and 5b are positioned so that the through hole 6 overlaps with the bonding material 11.

[0088] In this way, similar to the manufacturing method of the semiconductor device 1 shown in Figure 20, by using a plate-shaped bonding material 11 with an area equal to or slightly smaller than the first opening area S1, the arrangement and fixing of terminals 5a and 5b to the bonding material 11 becomes easier. Furthermore, as shown in Figure 25, since the bonding portions 11a and 11b have a complex shape near the stepped portion 7 (a structure in which the bonding area with the side surface 6a of the through hole 6 is relatively large), the bonding strength of the bonding portions 11a and 11b can be increased.

[0089] Embodiment 6. This embodiment applies the semiconductor device described in Embodiments 1 to 5 above to a power converter. Although this disclosure is not limited to a specific power converter, Embodiment 6 will be described below, in which the disclosure is applied to a three-phase inverter.

[0090] Figure 26 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0091] The power conversion system shown in Figure 26 consists of a power source 20, a power converter 16, and a load 21. The power source 20 is a DC power source and supplies DC power to the power converter 16. The power source 20 can be made up of various components, for example, a DC grid, a solar cell, or a battery, or it may be made up of a rectifier circuit or AC / DC converter connected to an AC grid. Alternatively, the power source 20 may be made up of a DC / DC converter that converts DC power output from a DC grid into a predetermined power.

[0092] The power converter 16 is a three-phase inverter connected between the power supply 20 and the load 21. It receives DC power from the power supply 20, converts it into AC power, and supplies AC power to the load 21. As shown in Figure 26, the power converter 16 includes a main conversion circuit 17 that converts DC power into AC power and outputs it, a drive circuit 18 that outputs drive signals to drive each switching element of the main conversion circuit 17, and a control circuit 19 that outputs control signals to the drive circuit 18 to control the drive circuit 18.

[0093] Load 21 is a three-phase motor driven by AC power supplied from the power converter 16. Note that Load 21 is not limited to a specific application; it is a motor mounted in various electrical devices, such as hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0094] The details of the power converter 16 are described below. The main conversion circuit 17 is equipped with switching elements and freewheeling diodes (not shown), and by switching the switching elements, it converts the DC power supplied from the power supply 20 into AC power and supplies it to the load 21. There are various specific circuit configurations for the main conversion circuit 17, but the main conversion circuit 17 according to this embodiment is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes antiparallel to each switching element. The semiconductor device 1 according to any of the above embodiments 1 to 5 is applied to each switching element of the main conversion circuit 17. The six switching elements are connected in series in pairs to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 17, are connected to the load 21.

[0095] The drive circuit 18 generates drive signals to drive the switching elements of the main conversion circuit 17 and supplies them to the control electrodes of the switching elements of the main conversion circuit 17. Specifically, according to the control signal from the control circuit 19, which will be described later, it outputs drive signals to turn on the switching elements and drive signals to turn off the switching elements to the control electrodes of each switching element. When the switching elements are kept in the ON state, the drive signal is a voltage signal (ON signal) that is greater than or equal to the threshold voltage of the switching elements, and when the switching elements are kept in the OFF state, the drive signal is a voltage signal (OFF signal) that is less than or equal to the threshold voltage of the switching elements.

[0096] The control circuit 19 controls the switching elements of the main converter circuit 17 so that the desired power is supplied to the load 21. Specifically, it calculates the time (on time) that each switching element of the main converter circuit 17 should be in the ON state based on the power to be supplied to the load 21. For example, the main converter circuit 17 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. The control circuit 19 then outputs a control command (control signal) to the drive circuit 18 so that an ON signal is output to the switching elements that should be in the ON state at each point in time, and an OFF signal is output to the switching elements that should be in the OFF state. The drive circuit 18 outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to this control signal.

[0097] In the power conversion device according to this embodiment, a semiconductor device according to any of Embodiments 1 to 5 is used as the switching element of the main conversion circuit 17, thereby realizing a power conversion device with high reliability and long lifespan.

[0098] Although this embodiment describes a two-level power converter, it is not limited to this and can be applied to various power converters. In this embodiment, a two-level power converter is used, but it may also be a three-level or multi-level power converter, and when supplying power to a single-phase load, embodiments 1 to 5 may be applied to a single-phase inverter. Furthermore, when supplying power to a DC load, this disclosure can also be applied to a DC / DC converter or an AC / DC converter.

[0099] Furthermore, the power conversion device to which this disclosure is applied is not limited to cases where the load is an electric motor, but can also be used, for example, as a power supply device for electrical discharge machining equipment, laser machining equipment, induction heating cookers, or non-contact power supply systems, and can even be used as a power conditioner for solar power generation systems or energy storage systems.

[0100] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. At least two of the embodiments disclosed herein can be combined, as long as they do not contradict each other. The basic scope of this disclosure is indicated by the claims rather than the foregoing description, and all modifications within the meaning and scope equivalent to the claims are intended to be included.

[0101] The various aspects of this disclosure are summarized below as an appendix. (Note 1) A semiconductor device having electrodes, A substrate on which the aforementioned semiconductor element is mounted, The semiconductor element comprises terminals arranged to face the electrodes of the semiconductor element, The terminal includes a through hole having a stepped portion, and further, A semiconductor device comprising a bonding material that covers the stepped portion inside the through hole and is in contact with the electrode of the semiconductor element. (Note 2) The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, The semiconductor device according to Appendix 1, wherein the second opening area of ​​the through hole on the second main surface is smaller than the first opening area of ​​the through hole on the first main surface. (Note 3) The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, The semiconductor device according to Appendix 1, wherein the second opening area of ​​the through hole on the second main surface is larger than the first opening area of ​​the through hole on the first main surface. (Note 4) The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, The through hole has a first region in which the area of ​​the through hole in the radial direction is minimized. With respect to the area in the first region, The semiconductor device according to Appendix 1, wherein the first opening area of ​​the through hole on the first main surface and the second opening area of ​​the through hole on the second main surface are large. (Note 5) The semiconductor device according to any one of the appendices 2 to 4, wherein the bonding material extends from the inside of the through hole to the first main surface and the second main surface. (Note 6) The semiconductor device according to any one of the appendices 1 to 5, wherein the material constituting the bonding material includes one selected from the group consisting of solder, sintered material, and adhesive. (Note 7) The aforementioned terminal is A semiconductor device according to any one of the appendices 1 to 6, comprising a plating layer formed in the region in contact with the bonding material. (Note 8) The semiconductor device according to Appendix 7, wherein the plating layer mainly consists of at least one selected from the group consisting of nickel, silver, gold, and tin. (Note 9) The substrate is a semiconductor device as described in any one of the appendices 1 to 8, with aluminum or copper as the main component. (Note 10) The substrate is provided with an insulating heat dissipation sheet connected to the side opposite to the side on which the semiconductor element is mounted, The aforementioned insulating heat dissipation sheet is Insulating layer and, A semiconductor device according to any one of the appendices 1 to 9, comprising the insulating layer and a laminated metal layer. (Note 11) The semiconductor device according to Appendix 10, comprising a cooler connected to the substrate via the insulating heat dissipation sheet. (Note 12) A semiconductor device according to any one of the appendices 1 to 11, comprising a cooler connected to the substrate. (Note 13) A semiconductor device according to any one of the appendices 1 to 12, comprising the semiconductor element, the substrate, and a sealing resin covering a portion of the terminals. (Note 14) The semiconductor device is an insulated gate bipolar transistor, as described in any one of the appendices 1 to 13. (Note 15) The semiconductor device is a semiconductor device according to any one of the appendices 1 to 14, including a wide-bandgap semiconductor. (Note 16) A main conversion circuit having the semiconductor device described in Appendix 1, which converts and outputs the input power, A drive circuit that outputs a drive signal to the semiconductor device to drive the semiconductor device, A control circuit that outputs a control signal to the drive circuit to control the drive circuit, A power conversion device equipped with this device. (Note 17) A step of preparing a substrate, a semiconductor element having electrodes, and a terminal having a stepped portion and a through hole, A step of mounting the semiconductor element on the substrate via a first bonding material, A step of bonding the semiconductor element to the substrate via the first bonding material by heating the first bonding material, A step of mounting the terminal on the electrode of the semiconductor element via a second bonding material, The process includes a step of heating the second bonding material to bond the terminal to the electrode via the second bonding material, A method for manufacturing a semiconductor device, wherein in the step of joining the terminals, the second joining material covers the stepped portion of the through hole and is in contact with the electrode of the semiconductor element. (Note 18) A step of preparing a substrate, a semiconductor element having electrodes, and a terminal having a stepped portion and a through hole, A step of mounting the semiconductor element on the substrate via a first bonding material, A step of mounting the terminal on the electrode of the semiconductor element via a second bonding material, The process includes the steps of: heating the first bonding material and the second bonding material to bond the semiconductor element to the substrate via the first bonding material, and bonding the terminal to the electrode via the second bonding material, A method for manufacturing a semiconductor device, wherein in the bonding step, the second bonding material covers the stepped portion of the through hole and is in contact with the electrode of the semiconductor element. (Note 19) A step of preparing a semiconductor element having electrodes and a terminal having a through hole with a stepped portion, A step of mounting the terminal on the electrode such that the through hole overlaps the electrode of the semiconductor element, The process includes supplying a fluid bonding material into the through hole to bond the terminal to the electrode via the bonding material, A method for manufacturing a semiconductor device, wherein in the step of joining the terminals, the joining material covers the stepped portion of the through hole and is in contact with the electrode of the semiconductor element. [Explanation of Symbols]

[0102] 1 Semiconductor device, 2 Semiconductor element, 3 Electrode, 4 Substrate, 5, 5a, 5b, 5c Terminal, 6 Through hole, 6a Side surface, 7 Stepped portion, 7a First stepped surface, 7b Second stepped surface, 7c Third stepped surface, 7d Intersecting wire, 8a First main surface, 8b Second main surface, 10 Plating layer, 11 Bonding material, 11a, 11b, 11c, 11d Joint, 12 Metal wire wiring, 13 Insulating heat dissipation sheet, 13a Insulating layer, 13b Metal layer, 14 Sealing resin, 15 Cooler, 15a Heat dissipation fin, 16 Power converter, 17 Main conversion circuit, 18 Drive circuit, 19 Control circuit, 20 Power supply, 21 Load, D Hole diameter, L Narrow region, R Central axis, S1 First opening area, S2 Second opening area, S3 Minimum hole area, l 1st distance, t step width, w joint width.

Claims

1. A semiconductor device having electrodes, A substrate on which the aforementioned semiconductor element is mounted, The semiconductor element comprises terminals arranged to face the electrodes of the semiconductor element, The terminal includes a through hole having a stepped portion, and further, The bonding material covers the stepped portion inside the through hole and is in contact with the electrode of the semiconductor element, The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, A semiconductor device wherein the bonding material extends from the inside of the through hole to the first main surface and the second main surface.

2. The semiconductor device according to claim 1, wherein the second opening area of ​​the through hole on the second main surface is smaller than the first opening area of ​​the through hole on the first main surface.

3. The semiconductor device according to claim 1, wherein the second opening area of ​​the through hole on the second main surface is larger than the first opening area of ​​the through hole on the first main surface.

4. The through hole has a first region in which the area of ​​the through hole in the radial direction is minimized. With respect to the area in the first region, The semiconductor device according to claim 1, wherein the first opening area of ​​the through hole on the first main surface and the second opening area of ​​the through hole on the second main surface are large.

5. The semiconductor device according to any one of claims 1 to 4, wherein the material constituting the bonding material includes one selected from the group consisting of solder, sintered material, and adhesive.

6. The aforementioned terminal is A semiconductor device according to any one of claims 1 to 4, comprising a plating layer formed in the region in contact with the bonding material.

7. The semiconductor device according to claim 6, wherein the plating layer mainly consists of at least one selected from the group consisting of nickel, silver, gold, and tin.

8. The semiconductor device according to any one of claims 1 to 4, wherein the substrate is mainly composed of aluminum or copper.

9. The substrate is provided with an insulating heat dissipation sheet connected to the side opposite to the side on which the semiconductor element is mounted, The aforementioned insulating heat dissipation sheet is Insulating layer and, A semiconductor device according to any one of claims 1 to 4, comprising the insulating layer and a laminated metal layer.

10. The semiconductor device according to claim 9, comprising a cooler connected to the substrate via the insulating heat dissipation sheet.

11. A semiconductor device according to any one of claims 1 to 4, comprising a cooler connected to the substrate.

12. A semiconductor device according to any one of claims 1 to 4, comprising the semiconductor element, the substrate, and a sealing resin covering a portion of the terminals.

13. The semiconductor device according to any one of claims 1 to 4, wherein the semiconductor element is an insulated gate bipolar transistor.

14. The semiconductor device according to any one of claims 1 to 4, wherein the semiconductor element includes a wide-bandgap semiconductor.

15. A semiconductor device having electrodes, A substrate on which the aforementioned semiconductor element is mounted, The semiconductor element comprises terminals arranged to face the electrodes of the semiconductor element, The terminal includes through holes having a plurality of stepped portions arranged in the thickness direction of the terminal, and further, The bonding material covers the stepped portion inside the through hole and is in contact with the electrode of the semiconductor element, The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, The upper end of the bonding material is positioned between the first main surface and the second main surface in a semiconductor device.

16. A semiconductor device according to claim 1, comprising a main conversion circuit that converts and outputs input power, A drive circuit that outputs a drive signal to the semiconductor device to drive the semiconductor device, A control circuit that outputs a control signal to the drive circuit to control the drive circuit, A power conversion device equipped with this device.

17. A step of preparing a substrate, a semiconductor element having electrodes, and a terminal having a stepped portion and a through hole, A step of mounting the semiconductor element on the substrate via a first bonding material, A step of bonding the semiconductor element to the substrate via the first bonding material by heating the first bonding material, A step of mounting the terminal on the electrode of the semiconductor element via a second bonding material, The process includes a step of heating the second bonding material to bond the terminal to the electrode via the second bonding material, The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, A method for manufacturing a semiconductor device, wherein in the step of joining the terminals, the second bonding material covers the stepped portion of the through hole and contacts the electrode of the semiconductor element, and the second bonding material extends from the inside of the through hole to the first main surface and the second main surface.

18. A step of preparing a substrate, a semiconductor element having electrodes, and a terminal having a stepped portion and a through hole, A step of mounting the semiconductor element on the substrate via a first bonding material, A step of mounting the terminal on the electrode of the semiconductor element via a second bonding material, The process includes the steps of: heating the first bonding material and the second bonding material to bond the semiconductor element to the substrate via the first bonding material, and bonding the terminal to the electrode via the second bonding material, The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, A method for manufacturing a semiconductor device, wherein in the bonding step, the second bonding material covers the stepped portion of the through hole and is in contact with the electrode of the semiconductor element, and the second bonding material extends from the inside of the through hole to the first main surface and the second main surface.

19. A step of preparing a semiconductor element having electrodes and a terminal having a through hole with a stepped portion, A step of mounting the terminal on the electrode such that the through hole overlaps the electrode of the semiconductor element, The process includes supplying a fluid bonding material into the through hole to bond the terminal to the electrode via the bonding material, The aforementioned terminal is The first main surface of the semiconductor device facing the electrode, It has a second main surface opposite to the first main surface, The through hole is formed to extend from the first main surface to the second main surface, A method for manufacturing a semiconductor device, wherein in the step of joining the terminals, the joining material covers the stepped portion of the through hole and contacts the electrodes of the semiconductor element, and the joining material extends from the inside of the through hole to the first main surface and the second main surface.

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