Semiconductor device and power converter equipped therewith

Abstract

An insulating substrate (15) and a semiconductor element (21) are installed on a base plate (2) to which a case (5) is mounted. An encapsulating material (25) in which an inorganic material (29) is added to a single resin material (27) is filled in the case (5). The amount of the inorganic material (29) is distributed in the encapsulating material (25) in a manner that gradually increases from the encapsulating material surface (25a) toward the base plate (3).

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a power conversion device including the same.

Background Art

[0002] In a semiconductor device for power (power module), high voltage resistance and high reliability are required. In a semiconductor device, for example, a semiconductor element for power is mounted on an insulating substrate disposed on a base plate to which a case is attached, and the semiconductor element and the like are sealed with a sealing material filled in the case. Each member such as the case, the base plate, the insulating substrate, and the sealing material has a different coefficient of linear expansion from each other. Thus, the semiconductor device is formed by combining a plurality of members having different coefficients of linear expansion.

[0003] The sealing material for sealing the semiconductor element and the like also contacts the insulating substrate and the case having different coefficients of linear expansion from each other. Therefore, due to the difference in the expansion and contraction of each member accompanying the heat generation of the semiconductor element, the sealing material may peel off from the case. In addition, cracks may occur in the case. In order to suppress such problems, in Patent Document 1, a semiconductor device that reinforces the case by providing a beam on the case has been proposed. In addition, in Patent Document 2, a semiconductor device in which a coating film that does not bring the sealing material into contact with the case is interposed between the sealing material and the case has been proposed.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] As mentioned above, semiconductor devices are required to suppress delamination or cracking caused by differences in the coefficients of thermal expansion of each component in contact with the sealing material.

[0006] This disclosure is made under such development, with one objective being to provide a semiconductor device that can suppress delamination or cracking caused by differences in the coefficient of thermal expansion of each component, and the other objective being to provide a power converter equipped with such a semiconductor device. [Means for solving the problem]

[0007] The semiconductor device according to this disclosure comprises a base plate, an insulating substrate, a semiconductor element, a case, and a encapsulant. The insulating substrate is disposed on the base plate. The semiconductor element is mounted on the insulating substrate. The case is mounted on the base plate so as to surround the insulating substrate and the semiconductor element. The encapsulant fills the area enclosed by the case and encapsulates the semiconductor element. The encapsulant comprises a single resin material and an inorganic material added to the resin material. The encapsulant has a first part and a second part. The first part is positioned from the base plate toward the encapsulant surface so as to cover the semiconductor element. The second part is positioned from the encapsulant surface toward the base plate so as to cover the first part. The amount of inorganic material in the first part of the encapsulant is greater than the amount of inorganic material in the second part of the encapsulant. The sealing material is formed such that the amount of inorganic material gradually increases from the sealing material surface toward the base plate. The first part includes a first region having a thickness of 3 mm toward the sealing material surface toward the base plate. The second part includes a second region having a thickness of 3 mm toward the sealing material surface toward the base plate. The difference between the amount of inorganic material contained in the first region and the amount of inorganic material contained in the second region is greater than 0% by weight and less than 15% by weight.

[0008] The power conversion device according to this disclosure has the semiconductor device described above, and includes a main conversion circuit that converts and outputs input power, and a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. [Effects of the Invention]

[0009] In the semiconductor device described herein, the encapsulating material that is filled into the case and seals the semiconductor element, etc., is a single organic material to which an inorganic material is added. The encapsulating material has a first part that covers the semiconductor element, etc., and a second part that covers the first part. The amount of inorganic material in the first part is greater than the amount of inorganic material in the second part. As a result, in the first part, the difference in the coefficient of thermal expansion between the insulating substrate on which the semiconductor element is mounted and the encapsulating material can be reduced. In the second part, the difference in the coefficient of thermal expansion between the case and the encapsulating material can be reduced. As a result, delamination or cracking caused by the difference in the coefficient of thermal expansion can be suppressed.

[0010] The power conversion device according to this disclosure, by being equipped with the above-mentioned semiconductor device, can suppress delamination or cracking caused by differences in the coefficient of thermal expansion, thereby contributing to improved reliability of the power conversion device. [Brief explanation of the drawing]

[0011] [Figure 1] This is a cross-sectional view showing the cross-sectional structure of the semiconductor device according to Embodiment 1. [Figure 2] This is a schematic cross-sectional view showing the distribution of inorganic material in the sealing material injected into the case in the same embodiment. [Figure 3] This figure illustrates the amount of inorganic material in the sealing material in the same embodiment. [Figure 4] This is a cross-sectional view showing the cross-sectional structure of a semiconductor device according to a modified example in the same embodiment. [Figure 5] This is a cross-sectional view showing the cross-sectional structure of the semiconductor device according to Embodiment 2. [Figure 6] This is a schematic cross-sectional view showing the distribution of inorganic material in the sealing material injected into the case in the same embodiment. [Figure 7] This is a block diagram of a power conversion device according to Embodiment 3. [Modes for carrying out the invention]

[0012] Embodiment 1. An example of a semiconductor device according to Embodiment 1 will be described. As shown in Figure 1, the semiconductor device 1 mainly comprises a base plate 3, an insulating substrate 15, a semiconductor element 21, a case 5, and a sealing material 25. The insulating substrate 15 includes a first insulating substrate 15a and a second insulating substrate 15b. The semiconductor element 21 includes a first semiconductor element 21a and a second semiconductor element 21b.

[0013] For case 5, materials such as polyphenylene sulfide (PPS), polybutylene terephthalate (PBT), polyethylene terephthalate (PET), a mixture of polybutylene terephthalate and polyethylene terephthalate, nylon, phenolic resin, or epoxy resin are used. Case 5 is provided with a protrusion 7 that extends from the inner wall toward the side where the semiconductor element 21 is located. Case 5 is attached to the base plate 3 by adhesive 9.

[0014] For example, a ceramic substrate or an aluminum nitride substrate is used as the insulating substrate 15. The insulating substrate 15 is placed on the base plate 3. The semiconductor element 21 is mounted on the insulating substrate 15. The sealing material 25 is filled inside the case 5. The semiconductor element 21 and the like are sealed by the sealing material 25.

[0015] The structure of the semiconductor device 1 will be described in more detail. An element circuit board 17 is arranged on one main surface of the insulating substrate 15. The element circuit board 17 includes a first element circuit board 17a and a second element circuit board 17b. A conductor plate 13 is arranged on the other main surface of the insulating substrate 15. The conductor plate 13 includes a first conductor plate 13a and a second conductor plate 13b. The conductor plate 13 (first conductor plate 13a, second conductor plate 13b) is joined to the base plate 3 by solder 11.

[0016] The semiconductor element 21 is joined to the element circuit board 17 by solder 19. The first semiconductor element 21a is joined to the first element circuit board 17a. The second semiconductor element 21b is joined to the second element circuit board 17b. A wiring material 23 is electrically connected to the semiconductor element 21. The wiring material 23 includes a first wiring material 23a, a second wiring material 23b, and a third wiring material 23c.

[0017] The first semiconductor element 21a and an electrode terminal (not shown) mounted on the case 5 are electrically connected by the first wiring material 23a. The second semiconductor element 21b and an electrode terminal (not shown) mounted on the case 5 are electrically connected by the second wiring material 23b. The first semiconductor element 21a and the second semiconductor element 21b are electrically connected by the third wiring material 23c. The insulating substrate 15, the semiconductor element 21, the wiring material 23, etc. are sealed by a sealing material 25.

[0018] Next, the sealing material 25 will be described in more detail. The sealing material 25 is composed of a single resin material 27 and an inorganic material 29 as a filler. The sealing material 25 is filled in the case 5 in such a manner that the amount (weight %) of the inorganic material 29 gradually increases from the sealing material surface 25a toward the base plate 3.

[0019] For example, an epoxy resin is applied as the single resin material 27. In addition to the epoxy resin, for example, any one of a polyimide, a polyamide, an acrylic resin, and a silicone resin may be applied. For example, silica is applied as the inorganic material 29. The shape of the silica as the inorganic material 29 is substantially spherical. The size of the inorganic material 29 is 0.1 μm to 100 μm. In addition to silica, for example, alumina, aluminum nitride, silicon nitride, boron nitride, or boron oxide may be applied.

[0020] Figure 2 shows a cross-sectional structure of a semiconductor device 1, schematically illustrating the distribution of inorganic material 29 in the encapsulant 25 by the density of dots. As shown in Figure 2, the encapsulant 25 includes a lower layer 31 as a first part and an upper layer 33 as a second part. The lower layer 31 is positioned from the base plate 3 toward the encapsulant surface 25a of the encapsulant 25 so as to cover the semiconductor element 21. The lower layer 31 includes a first region 31a with a thickness L1 of 3 mm from the base plate 3.

[0021] The upper layer 33 is positioned from the sealing material surface 25a toward the base plate 3 so as to cover the lower layer 31. The upper layer 33 includes a second region 33a with a thickness L2 of 3 mm from the sealing material surface 25a. The amount of inorganic material 29 in the lower layer 31 is greater than the amount of inorganic material 29 in the upper layer 33. The thickness L of the sealing material 25 is approximately 6 mm to 20 mm.

[0022] Note that in Figure 2, for the sake of explanation, the sealing material 25 is divided by dotted lines to show the lower layer 31, the first region 3a, the upper layer 33, and the second region 33a, but the sealing material 25 itself does not have boundaries corresponding to dotted lines. The sealing material 25 is formed as a single layer from the surface of the base plate 3 to the sealing material surface 25a.

[0023] As described above, the sealing material 25 is formed in such a manner that the amount (by weight) of inorganic material 29 gradually increases from the sealing material surface 25a toward the base plate 3. The variation range of the amount of inorganic material 29 in the sealing material 25 is, for example, about 70% by weight to 90% by weight. Here, the depth from the sealing material surface 25a is denoted as position X. The amount of inorganic material 29 on the sealing material surface 25a is denoted as B. The amount of inorganic material 29 at position X from the sealing material surface 25a is denoted as Y.

[0024] As shown in Figure 3, the amount Y of the inorganic material 29 can be approximately expressed as a linear function, Y = AX + B. The amount of inorganic material 29 at position X is defined as the amount of inorganic material 29 contained in a thickness of 1 mm downward from position X. Note that, for example, in parts located near the surface of the sealing material 25 and parts located near the surface of the base plate 3, the amount of inorganic material may deviate from the amount estimated by this linear function.

[0025] In actual sealing materials 25, the amount of inorganic material varies somewhat from the amount estimated from a linear function. In particular, the amount (distribution) of inorganic material 29 can vary significantly between the top and bottom layers of the sealing material 25. In the top layer, the amount of inorganic material 29 tends to be low because it is not supplied from above. On the other hand, in the bottom layer, the amount of inorganic material 29 tends to be high because it does not settle to the lower layers.

[0026] In the semiconductor device 1 described above, the sealing material 25 is injected (filled) into the case 5 after the insulating substrate 15 and semiconductor element 21 are mounted on the base plate 3 and the wiring material 23 is connected. At this time, in order to reduce the interfacial resistance between the inorganic material 29 as a filler and the epoxy resin (organic material) as a single resin material 27, a coupling treatment is performed in advance to coat the surface of the inorganic material 29.

[0027] The coupling process reduces the interfacial resistance between the inorganic material 29 and the resin material 27 (epoxy resin), making it easier for the inorganic material 29 to settle in the resin material 27 toward the base plate 3 before the injected sealant 25 hardens. This allows the amount of inorganic material 29 to be gradually increased from the sealant surface 25a toward the base plate 3.

[0028] Here, we will explain the difference between this method and semiconductor devices encapsulated by the transfer molding method. In the transfer molding method, semiconductor devices are encapsulated by injecting a encapsulant into a mold. In this case, the encapsulant hardens in a very short time (for example, in a few seconds). Therefore, it is thought that the inorganic material added to the encapsulant is distributed almost uniformly within the encapsulant.

[0029] In contrast to the transfer molding method, the method of encapsulating semiconductor elements 21, etc., by injecting a sealing material 25 into a case 3 requires, for example, about 30 minutes to 1 hour for the sealing material 25 to harden. During this time, the inorganic material 29 in the sealing material 25 settles toward the base plate 3, allowing for a gradient in the amount of inorganic material 29.

[0030] In the semiconductor device 1 described above, the encapsulating material 25 is formed such that the amount (by weight) of the inorganic material 29 gradually increases from the encapsulating material surface 25a toward the base plate 3. This suppresses delamination or cracking caused by differences in the coefficients of thermal expansion of each component. This will be explained in more detail.

[0031] First, the coefficient of thermal expansion of the insulating substrate 15 is approximately 3 to 7 ppm / K. The coefficient of thermal expansion of case 5 is approximately 10 to 30 ppm / K. The coefficient of thermal expansion of the encapsulating material 25 varies depending on the amount of inorganic material 29 contained in the resin material 27. When the amount of inorganic material 29 is small, the coefficient of thermal expansion is approximately 20 ppm / K. On the other hand, when the amount of inorganic material 29 is large, the coefficient of thermal expansion is approximately 8 ppm / K.

[0032] The encapsulant 25 is formed such that the amount (by weight) of inorganic material 29 gradually increases from the encapsulant surface 25a toward the base plate 3. As a result, in the lower layer 31 of the encapsulant 25, the difference between the coefficient of thermal expansion of the lower layer 31 (first coefficient of thermal expansion) and the coefficient of thermal expansion of the insulating substrate 15 that the lower layer 31 encapsulates becomes small. On the other hand, in the upper layer 33 of the encapsulant 25, the difference between the coefficient of thermal expansion of the upper layer 33 (second coefficient of thermal expansion) and the coefficient of thermal expansion of the case 5 that the upper layer 33 contacts becomes small. As a result, delamination of the encapsulant 25 from the case 5 can be suppressed. Furthermore, the occurrence of cracks in the case 5 can be suppressed. By suppressing delamination and cracking, the reliability of the semiconductor device can be improved.

[0033] From the viewpoint of suppressing delamination or cracking, it is desirable to adjust the amount of inorganic material 29 added to the resin material 27 so that the difference between the amount of inorganic material 29 in the first region 31a of the lower layer 31 and the amount of inorganic material 29 in the second region 33a of the upper layer 33 is greater than 0% by weight and less than 15% by weight. If the difference in the amount of inorganic material 29 exceeds 15% by weight, the coefficient of linear expansion of the encapsulant 25 becomes very large compared to other components, which may cause warping of the semiconductor device 1 and lead to cracking of the encapsulant 25 itself.

[0034] The reason for setting the thickness L1 of the first region 31a to 3 mm is as follows. First, the distance from the surface (top surface) of the base plate 3 to the surface (top surface) of the semiconductor element 21 is approximately 2 mm. Therefore, the reliability of the semiconductor element 21 and its surroundings is thought to be affected by the portion of the encapsulating material 25 that has a thickness of approximately 3 mm (2 mm + 1 mm) from the base plate 3. Thus, the thickness L1 of the first region 31a, which affects the reliability of the semiconductor element 21, was set to 3 mm.

[0035] Furthermore, if the thickness L1 of the first region 31a and the thickness L2 of the second region 33a are set to a size greater than 3 mm, the difference between the amount of inorganic material in the first region 31a and the amount of inorganic material in the second region 33a becomes smaller, making it difficult to clearly identify the effect of the sealing material 25 caused by the distribution of the inorganic material 29.

[0036] On the other hand, if the thickness L2 of the second region 33a is set to less than 3 mm, the amount of inorganic material 29 near the surface 25a of the sealing material becomes extremely small, defining a layer consisting almost entirely of resin material 27, making it difficult to determine the effect of the sealing material 25 as containing inorganic material 29.

[0037] In the semiconductor device 1 described above, the amount of inorganic material 29 is adjusted so that the difference between the amount of inorganic material 29 in the first region 31a and the amount of inorganic material 29 in the second region 33a is greater than 0% by weight and less than 15% by weight. This suppresses the delamination of the encapsulant 25 from the case 5 and also suppresses the occurrence of cracks in the case 5. By suppressing delamination and cracking, the reliability of the semiconductor device 1 is improved.

[0038] One method for measuring the amount of inorganic material contained in the encapsulant of a semiconductor device involves heating the encapsulant. For example, the amount of inorganic material can be determined from the residual percentage after heating a resin material (encapsulant) containing inorganic material at a temperature of 600°C for about 4 hours. Another method for measuring the linear expansion coefficient of the encapsulant involves using a thermomechanical analyzer (TMA). By measuring the expansion rate of the encapsulant while changing the temperature, the expansion coefficient per unit temperature (linear expansion coefficient) can be calculated.

[0039] (modified version) An example of a modified semiconductor device will be described. As shown in Figure 4, in the modified semiconductor device 1, a slanted portion 7a is formed on a protruding portion 7 provided on the inner wall of the case 5. The slanted portion 7a is inclined so as to gradually approach the insulating substrate 15 from the base plate 3 toward the surface 25a of the sealing material. Note that the other configurations are the same as those of the semiconductor device 1 shown in Figure 1, so the same reference numerals are used for the same components, and their descriptions will not be repeated unless necessary.

[0040] In the modified semiconductor device 1, the inclined portion 7a is inclined in such a manner that it gradually approaches the insulating substrate 15 from the base plate 3 toward the sealing material surface 25a. In other words, the inclined portion 7a is inclined away from the insulating substrate 15, etc. toward the base plate 3 from the upper end of the protruding portion 7. As a result, the space DC between the insulating substrate 15 and the case 5, in which the sealing material 25 is filled, is further expanded. This space DC is filled with a sealing material 25 that contains a larger amount of inorganic material 29 and has a relatively small coefficient of thermal expansion.

[0041] A sealing material 25 with a relatively low coefficient of linear expansion is filled into the space between the insulating substrate 15, which has a relatively low coefficient of linear expansion, and the case 5, which has a relatively high coefficient of linear expansion. As a result, in the semiconductor device 1 according to the comparative example, thermal strain caused by temperature changes in the semiconductor device 1 can be effectively suppressed from extending to the insulating substrate 15, which has a relatively low coefficient of linear expansion.

[0042] Embodiment 2. An example of a semiconductor device according to Embodiment 2 will be described. As shown in Figures 5 and 6, the sealing material 25 comprises a lower layer 31 as the first part, an upper layer 33 as the second part, and an intermediate layer 35 as the intermediate part.

[0043] In Figure 6, the distribution of inorganic material 29 in the sealing material 25 is schematically shown by the density of the dots. Also, in Figures 5 and 6, for the sake of explanation, the sealing material 25 is divided by dotted lines to show the lower layer 31, intermediate layer 35, and upper layer 33, etc., but there are no boundaries corresponding to dotted lines in the sealing material 25 itself. The sealing material 25 is formed as a single layer from the surface of the base plate 3 to the sealing material surface 25a.

[0044] The sealing material 25 is composed of a single resin material 27 and an inorganic material 29 as a filler. The amount of inorganic material 29 in the lower layer 31 is greater than the amount of inorganic material 29 in the upper layer 33. The amount of inorganic material 29 in the intermediate layer 35 is less than the amount of inorganic material 29 in the lower layer 31, but greater than the amount of inorganic material 29 in the upper layer 33.

[0045] The variation in the amount of inorganic material 29 in the sealing material 25 is, for example, about 70% to 90% by weight. The difference between the amount of inorganic material 29 in the first region 31a of the lower layer 31 and the amount of inorganic material 29 in the second region 33a of the upper layer 33 is greater than 0% by weight and less than 15% by weight.

[0046] The coefficient of thermal expansion of the intermediate layer 35 (third coefficient of thermal expansion) is greater than that of the lower layer 31 (first coefficient of thermal expansion) and less than that of the upper layer 33 (second coefficient of thermal expansion). Note that the other components are the same as those of the semiconductor device 1 shown in Figure 1, etc., so the same reference numerals are used for the same components, and their descriptions will not be repeated unless necessary.

[0047] In the semiconductor device 1 described above, the encapsulating material 25 is injected (filled) into the case 3 after the insulating substrate 15 and semiconductor elements 21 are mounted on the base plate 3 and the wiring material 23 is connected. At this time, first, the encapsulating material 25 that will become the lower layer 31 is filled into the case 3. Next, before the encapsulating material 25 that will become the lower layer 31 hardens, the encapsulating material 25 that will become the upper layer 33 is filled into the case 3 so as to cover the encapsulating material 25 that will become the lower layer 31. The encapsulating material 25 that will become the lower layer 31 contains more inorganic material 29 than the encapsulating material 25 that will become the upper layer 33.

[0048] Before the entire sealant 25 hardens, a portion of the sealant 25 that will become the lower layer 31 and a portion of the sealant 25 that will become the upper layer 33 mix together to form an intermediate layer 35. In the intermediate layer 35, the amount of inorganic material 29 is greater than the amount of inorganic material 29 contained in the sealant 25 that will become the upper layer 33, and less than the amount of inorganic material 29 contained in the sealant 25 that will become the lower layer.

[0049] As mentioned above, by applying a coupling treatment to the surface of the inorganic material 29, the interfacial resistance between the resin material 27 (epoxy resin) and the inorganic material 29 is reduced. As a result, by the time the entire sealing material 25 hardens, the inorganic material 29 settles toward the base plate 3, and in both the lower layer 31 and the upper layer 33 of the sealing material 25, the amount of inorganic material 29 is distributed such that there is more of it on the side closer to the base plate 3. In the intermediate layer 35, the amount of inorganic material 29 increases from the upper layer 33 toward the lower layer 31.

[0050] In the semiconductor device 1 described above, as previously mentioned, in the lower layer 31 of the encapsulating material 25, the difference between the coefficient of thermal expansion of the lower layer 31 and the coefficient of thermal expansion of the insulating substrate 15 that the lower layer 31 encapsulates becomes small. On the other hand, in the upper layer 33 of the encapsulating material 25, the difference between the coefficient of thermal expansion of the upper layer 33 and the coefficient of thermal expansion of the case 5 that the upper layer 33 contacts becomes small. As a result, delamination of the encapsulating material 25 from the case 5 can be suppressed. Furthermore, the occurrence of cracks in the case 5 can be suppressed. By suppressing delamination and cracking, the reliability of the semiconductor device 1 is improved.

[0051] Furthermore, the semiconductor device 1 described above provides the following effect: In the sealing material 25, the intermediate layer 35 is located between the upper layer 33, which has a relatively large coefficient of thermal expansion, and the lower layer 31, which has a relatively small coefficient of thermal expansion. This reduces the stress caused by the difference in the coefficients of thermal expansion between the upper layer 33 and the lower layer 31.

[0052] Embodiment 3. Embodiment 3 describes an example of a power conversion device equipped with the semiconductor device described in each embodiment.

[0053] This section describes a power conversion device to which the semiconductor device 1 described in Embodiment 1 or Embodiment 2 above is applied. Although this disclosure is not limited to a specific power conversion device, Embodiment 4 below describes a case in which this disclosure is applied to a three-phase inverter.

[0054] Figure 7 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied. The power conversion system shown in Figure 7 consists of a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 100 can be made up of various things, for example, a DC grid, a solar cell, or a storage battery. It may also be made up of a rectifier circuit or AC / DC converter connected to an AC grid. Alternatively, the power supply 100 may be made up of a DC / DC converter that converts DC power output from a DC grid into a predetermined power.

[0055] The power converter 200 is a three-phase inverter connected between the power supply 100 and the load 300. It converts the DC power supplied from the power supply 100 into AC power and supplies the AC power to the load 300. As shown in Figure 7, the power converter 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

[0056] Load 300 is a three-phase motor driven by AC power supplied from power converter 200. Note that Load 300 is not limited to a specific application; it is a motor installed in various electrical devices, such as hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0057] The details of the power converter 200 are described below. The main conversion circuit 201 includes switching elements and freewheeling diodes (not shown). By switching the switching elements, the DC power supplied from the power supply 100 is converted into AC power and supplied to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes antiparallel to each of the switching elements.

[0058] At least one of each switching element and each freewheeling diode in the main conversion circuit 201 is a switching element or freewheeling diode in a semiconductor device 202 corresponding to the semiconductor device 1 according to at least one of the embodiments 1 and 2 described above. The six switching elements form upper and lower arms connected in series for every two switching elements, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of a full bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0059] Furthermore, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built into the semiconductor device 202, or it may be configured to be a separate drive circuit from the semiconductor device 202. The drive circuit generates a drive signal to drive the switching elements of the main conversion circuit 201 and supplies it to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, according to a control signal from the control circuit 203, which will be described later, it outputs a drive signal to turn on the switching element and a drive signal to turn off the switching element to the control electrodes of each switching element. When the switching element is kept in the ON state, the drive signal is a voltage signal (ON signal) that is greater than or equal to the threshold voltage of the switching element, and when the switching element is kept in the OFF state, the drive signal is a voltage signal (OFF signal) that is less than or equal to the threshold voltage of the switching element.

[0060] The control circuit 203 controls the switching elements of the main converter circuit 201 so that the desired power is supplied to the load 300. Specifically, it calculates the time (on time) that each switching element of the main converter circuit 201 should be in the ON state based on the power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. The control circuit then outputs a control command (control signal) to the drive circuit of the main converter circuit 201 so that an ON signal is output to the switching elements that should be in the ON state at each point in time, and an OFF signal is output to the switching elements that should be in the OFF state. The drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to this control signal.

[0061] In the power conversion device according to this embodiment, since the semiconductor device 1 according to Embodiment 1 or Embodiment 2 is used as the semiconductor device 202 constituting the main conversion circuit 201, reliability can be improved and a longer lifespan can be achieved.

[0062] In this embodiment, an example of applying the present disclosure to a two-level three-phase inverter has been described, but the present disclosure is not limited to this and can be applied to various power conversion devices. In this embodiment, a two-level power conversion device is used, but a three-level or multi-level power conversion device may also be used, and in the case of supplying power to a single-phase load, the present disclosure may be applied to a single-phase inverter. Furthermore, in the case of supplying power to a DC load, etc., the present disclosure can also be applied to a DC / DC converter or an AC / DC converter.

[0063] Furthermore, the power conversion device to which this disclosure is applied is not limited to cases where the load is an electric motor, but can also be used, for example, as a power supply device for an electrical discharge machine, laser processing machine, induction heating cooker, or contactless power supply system, and can even be used as a power conditioner for a solar power generation system or energy storage system.

[0064] Furthermore, the semiconductor devices described in each embodiment can be combined in various ways as needed.

[0065] The embodiments disclosed herein are illustrative and not limiting. This disclosure is indicated by the claims, not the scope described above, and all modifications in the meaning and scope equivalent to the claims are intended.

[0066] Furthermore, this disclosure includes the following aspects. [Note 1] Base plate and An insulating substrate placed on the base plate, A semiconductor element mounted on the aforementioned insulating substrate, A case mounted on the base plate so as to surround the insulating substrate and the semiconductor element, A sealing material is provided to fill the region enclosed by the aforementioned case and to encapsulate the semiconductor element. Equipped with, The aforementioned sealing material is A single resin material, The inorganic material added to the aforementioned resin material and Includes, The aforementioned sealing material is A first portion is positioned from the base plate toward the surface of the sealing material of the sealing material so as to cover the semiconductor element, A second part is positioned from the surface of the sealing material toward the base plate so as to cover the first part, It has, A semiconductor device wherein the amount of the inorganic material in the first part of the sealing material is greater than the amount of the inorganic material in the second part of the sealing material.

[0067] [Note 2] The semiconductor device according to Appendix 1, wherein the sealing material is formed in such a manner that the amount of the inorganic material gradually increases from the surface of the sealing material toward the base plate.

[0068] [Note 3] The first part includes a first region having a thickness of 3 mm from the base plate toward the surface of the sealing material, The second part includes a second region having a thickness of 3 mm from the surface of the sealing material toward the base plate, The semiconductor device as described in Appendix 2, wherein the difference between the amount of inorganic material contained in the first region and the amount of inorganic material contained in the second region is greater than 0% by weight and less than 15% by weight.

[0069] [Note 4] The sealing material includes an intermediate portion located between the first and second portions. The semiconductor device according to Appendix 1, wherein the amount of the inorganic material in the intermediate portion is less than the amount of the inorganic material in the first portion and greater than the amount of the inorganic material in the second portion.

[0070] [Note 5] In the first part, the amount of inorganic material increases from the side where the second part is located toward the base plate. In the second part, the amount of the inorganic material increases from the surface of the sealing material toward the side where the first part is located. The semiconductor device according to Appendix 4, wherein in the intermediate portion, the amount of the inorganic material increases from the side where the second portion is located to the side where the first portion is located.

[0071] [Note 6] The first part includes a first region having a thickness of 3 mm from the base plate toward the surface of the sealing material, The second part includes a second region having a thickness of 3 mm from the surface of the sealing material toward the base plate, The semiconductor device described in Appendix 4, wherein the difference between the amount of inorganic material contained in the first region and the amount of inorganic material contained in the second region is greater than 0% by weight and less than 15% by weight.

[0072] [Note 7] The first part includes a first region having a thickness of 3 mm from the base plate toward the surface of the sealing material, The second part includes a second region having a thickness of 3 mm from the surface of the sealing material toward the base plate, The first region has a first coefficient of thermal expansion, The second region has a second coefficient of thermal expansion, The insulating substrate has a third coefficient of thermal expansion, The first coefficient of thermal expansion is greater than the third coefficient of thermal expansion. The semiconductor device described in Appendix 1, wherein the second coefficient of thermal expansion is greater than the first coefficient of thermal expansion.

[0073] [Note 8] The semiconductor device according to any one of the appendices 1 to 7, wherein the case has a protruding portion formed thereon that is inclined to protrude from the base plate side toward the surface of the sealing material, gradually approaching the insulating substrate.

[0074] [Note 9] The semiconductor device according to any one of the appendices 1 to 8, wherein the single resin material is selected from the group consisting of epoxy resin, polyimide, polyamide, acrylic resin, and silicone resin.

[0075] [Note 10] The semiconductor device according to any one of the appendices 1 to 9, wherein the inorganic material includes at least one selected from the group consisting of silica, alumina, aluminum nitride, silicon nitride, boron nitride, and boron oxide.

[0076] [Note 11] A semiconductor device described in any one of the appendices 1 to 10, and a main conversion circuit that converts and outputs the input power, A control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. A power conversion device equipped with this device. [Industrial applicability]

[0077] This disclosure is effectively utilized in semiconductor devices that seal semiconductor elements and the like mounted inside a case with an sealing material. [Explanation of Symbols]

[0078] 1 Semiconductor device, 3 Base plate, 5 Case, 7 Protrusion, 7a Inclined part, 9 Adhesive, 11 Solder, 13 Conductor plate, 13a First conductor plate, 13b Second conductor plate, 15 Insulating substrate, 15a First insulating substrate, 15b Second insulating substrate, 17 Element circuit board, 17a First element circuit board, 17b Second element circuit board, 19 Solder, 21 Semiconductor element, 21a First semiconductor element, 21b Second semiconductor element, 23 Wiring material, 23a First wiring material, 23b Second wiring material, 23c Third wiring material, 25 Encapsulating material, 25a Encapsulating material surface, 27 Resin material, 29 Inorganic material, 31 Lower layer, 31a First region, 33 Upper layer, 33a Second region, 35 Intermediate layer, L1, L2, L Thickness, 100 Power supply, 200 Power converter, 300 load, 201 main conversion circuit, 202 semiconductor device, 203 control circuit.

Claims

1. Base plate and An insulating substrate placed on the base plate, A semiconductor element mounted on the aforementioned insulating substrate, A case mounted on the base plate so as to surround the insulating substrate and the semiconductor element, A sealing material is provided to fill the region enclosed by the aforementioned case and to encapsulate the semiconductor element. Equipped with, The aforementioned sealing material is A single resin material, An inorganic material added to the aforementioned resin material and subjected to coupling treatment and Includes, The aforementioned sealing material is A first portion is positioned from the base plate toward the surface of the sealing material of the sealing material so as to cover the semiconductor element, A second part is positioned from the surface of the sealing material toward the base plate so as to cover the first part, It has, The amount of the inorganic material in the first part of the sealing material is greater than the amount of the inorganic material in the second part of the sealing material. The sealing material is formed in such a manner that the amount of the inorganic material gradually increases from the surface of the sealing material toward the base plate. The first part includes a first region having a thickness of 3 mm from the base plate toward the surface of the sealing material, The second part includes a second region having a thickness of 3 mm from the surface of the sealing material toward the base plate, A semiconductor device in which the difference between the amount of inorganic material contained in the first region and the amount of inorganic material contained in the second region is greater than 0% by weight and less than 15% by weight.

2. The sealing material includes an intermediate portion located between the first and second parts. The semiconductor device according to claim 1, wherein the amount of the inorganic material in the intermediate portion is less than the amount of the inorganic material in the first portion and greater than the amount of the inorganic material in the second portion.

3. In the first part, the amount of the inorganic material increases from the side where the second part is located toward the base plate. In the second part, the amount of the inorganic material increases from the surface of the sealing material toward the side where the first part is located. The semiconductor device according to claim 2, wherein in the intermediate portion, the amount of the inorganic material increases from the side where the second portion is located to the side where the first portion is located.

4. The first region has a first coefficient of thermal expansion, The second region has a second coefficient of thermal expansion, The insulating substrate has a third coefficient of thermal expansion, The first coefficient of thermal expansion is greater than the third coefficient of thermal expansion. The semiconductor device according to claim 1, wherein the second coefficient of thermal expansion is greater than the first coefficient of thermal expansion.

5. The semiconductor device according to claim 1, wherein the case has a protruding portion formed thereon that is inclined and protrudes from the base plate side toward the surface of the sealing material, gradually approaching the insulating substrate.

6. The semiconductor device according to claim 1, wherein the single resin material is selected from the group consisting of epoxy resin, polyimide, polyamide, acrylic resin, and silicone resin.

7. The semiconductor device according to claim 1, wherein the inorganic material comprises at least one selected from the group consisting of silica, alumina, aluminum nitride, silicon nitride, boron nitride, and boron oxide.

8. The semiconductor device according to claim 4, wherein the coefficient of linear expansion of the case is greater than the first coefficient of linear expansion.

9. A semiconductor device according to any one of claims 1 to 8, comprising a main conversion circuit that converts and outputs input power, A control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit. A power conversion device equipped with this device.

Images