Multilayer ceramic electronic components

JP7904685B2Active Publication Date: 2026-08-13TAIYO YUDEN KK
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-11-29
Publication Date
2026-08-13

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【0012】 以上述べたように、本発明によれば、クラックの発生を抑制可能な高背型の積層セラミックコンデンサを提供することができる。

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Abstract

To provide a tall multi-layer ceramic capacitor capable of suppressing the occurrence of cracks.SOLUTION: A multi-layer ceramic electronic component includes a ceramic body. The ceramic body includes: a laminate including an electrode stack having a plurality of internal electrodes stacked in a first axis direction, a pair of covers covering the electrode stack from both sides in the first axis direction, and a pair of covered surfaces perpendicular to a second axis orthogonal to a first axis, end portions of the internal electrodes in a second axis direction being aligned on the covered surfaces within a range of 0.5 μm in the second axis direction; and a pair of side margins covering the pair of covered surfaces and having a porosity at both ends in the first axis direction of 3% or more. The ceramic body has a dimension in the first axis direction, which is 1.5 times or more a dimension in the second axis direction, and a proportion of an area of the electrode stack to an entire cross-section perpendicular to a third axis in a center portion in a third axis direction orthogonal to the first axis and the second axis is 80% or more.SELECTED DRAWING: Figure 3
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Description

Technical Field

[0001] The present invention relates to a high-profile multilayer ceramic electronic component.

Background Art

[0002] In recent years, the high functionality and miniaturization of electronic devices such as portable information terminals have been increasingly progressing. Along with this, for multilayer ceramic capacitors used for power storage and noise removal in such electronic devices, there is a demand for a technology that can increase the capacitance without increasing the mounting space occupied on the mounting surface.

[0003] On the other hand, in the ceramic body constituting the multilayer ceramic capacitor, by reducing the thickness of the margin portion that covers the periphery of the electrode laminate portion where the internal electrodes are laminated, the electrode laminate portion can be expanded by that amount. As a result, in the multilayer ceramic capacitor, it is possible to achieve a large capacitance without increasing the size.

[0004] As an example, a technology that can reduce the thickness of the side margin portion that covers the electrode laminate portion from the lateral direction is known (for example, see Patent Document 1). In this technology, by attaching a side margin portion with a uniform thickness later, it becomes possible to accurately protect the internal electrodes even with a side margin portion having a small thickness.

[0005] Also, a high-profile multilayer ceramic capacitor in which the number of laminations of the internal electrodes in the ceramic body is increased is known (for example, see Patent Document 2). In such a multilayer ceramic capacitor, although the height on the mounting surface increases, the mounting space occupied on the mounting surface can be kept small by maintaining the area of each internal electrode.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

[0007] When pursuing high capacity while keeping the mounting space small, the proportion of the electrode stacked portion to the ceramic body inevitably increases, meaning the proportion of the margin portion decreases. As a result, during the firing of the ceramic body, the shrinkage behavior of the electrode stacked portion becomes dominant, making the margin portion, which shrinks differently from the electrode stacked portion, more susceptible to crack formation.

[0008] In view of the above circumstances, the object of the present invention is to provide a high-profile multilayer ceramic capacitor capable of suppressing the occurrence of cracks. [Means for solving the problem]

[0009] To achieve the above objective, a multilayer ceramic electronic component according to one embodiment of the present invention comprises a ceramic body. The ceramic body comprises an electrode stack having a plurality of internal electrodes stacked in the first axial direction; a pair of cover portions covering the electrode stack from both sides in the first axial direction; a pair of covering surfaces perpendicular to a second axis orthogonal to the first axis, such that the ends of the plurality of internal electrodes in the second axial direction are aligned within 0.5 μm in the second axial direction; and a pair of side margin portions covering the pair of covering surfaces, with a pore ratio of 3% or more at both ends in the first axial direction. In the above ceramic body, the dimension in the first axial direction is 1.5 times or more the dimension in the second axial direction, and the ratio of the area of ​​the electrode stack to the entire cross-section perpendicular to the third axis in the central part of the third axial direction which is perpendicular to the first and second axes is 80% or more.

[0010] In this configuration, the pore ratio at both ends in the first axial direction of the side margin portion, which constitutes the edge of the ceramic body where cracks are likely to occur during firing, is increased. As a result, crack occurrence in the side margin portion can be effectively suppressed even in multilayer ceramic electronic components with a high-profile configuration where the electrode stacking portion has a large proportion.

[0011] The ratio of the number of layers of the multiple internal electrodes to the dimension of the electrode stacking portion in the first axial direction may be 800 layers / mm or more. In each of the pair of side margin portions described above, the pore ratio in the central part in the first axial direction may be lower than the pore ratio at both ends in the first axial direction. In this case, it is preferable that the pore ratio in the central part in the first axial direction of each of the pair of side margin portions is less than 3%. [Effects of the Invention]

[0012] As described above, the present invention provides a high-back multilayer ceramic capacitor capable of suppressing crack occurrence. [Brief explanation of the drawing]

[0013] [Figure 1] This is a perspective view of a multilayer ceramic capacitor according to one embodiment of the present invention. [Figure 2] This is a cross-sectional view of the multilayer ceramic capacitor shown above, along the line A-A' in Figure 1. [Figure 3] This is a cross-sectional view of the multilayer ceramic capacitor shown above, along the line B-B' in Figure 1. [Figure 4] The flowchart shows the manufacturing method for the multilayer ceramic capacitor described above. [Figure 5] This is a perspective view of the laminate prepared in step S01. [Figure 6] This is a perspective view of the unfired ceramic body obtained in step S02. [Modes for carrying out the invention]

[0014] Hereinafter, an embodiment of the present invention will be described while referring to the drawings. In the drawings, an X-axis, a Y-axis, and a Z-axis that are orthogonal to each other are shown as appropriate. The X-axis, Y-axis, and Z-axis are common throughout the drawings.

[0015] [Basic Configuration of Multilayer Ceramic Capacitor 10] FIGS. 1 to 3 are diagrams showing a multilayer ceramic capacitor 10 according to an embodiment of the present invention. FIG. 1 is a perspective view of the multilayer ceramic capacitor 10. FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line A-A' in FIG. 1. FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line B-B' in FIG. 1.

[0016] The multilayer ceramic capacitor 10 includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The ceramic body 11 is configured as a hexahedron having a pair of end faces E perpendicular to the X-axis, a pair of side faces S perpendicular to the Y-axis, and a pair of main faces M perpendicular to the Z-axis. The external electrodes 14 and 15 cover a pair of end faces E of the ceramic body 11.

[0017] The multilayer ceramic capacitor 10 is configured as a high-profile type in which the dimension T in the Z-axis direction of the ceramic body 11 is larger than the dimension W in the Y-axis direction. That is, in the multilayer ceramic capacitor 10, by increasing the dimension T of the ceramic body 11, a large capacitance can be ensured while being able to be mounted in a mounting space limited in the Y-axis direction.

[0018] Specifically, in the multilayer ceramic capacitor 10, the dimension T is 1.5 times or more the dimension W. Also, the dimension L in the X-axis direction of the ceramic body 11 may be larger than the dimension W and may be smaller than the dimension T. In the multilayer ceramic capacitor 10, within the range satisfying the above conditions, the dimensions T, W, and L of the ceramic body 11 can be arbitrarily determined.

[0019] The planar shape along the mounting surface of the multilayer ceramic capacitor 10 is preferably equal to or larger than the 0201 shape with a dimension of 0.25 mm in the X-axis direction and a dimension of 0.125 mm in the Y-axis direction, and is preferably equal to or smaller than the 1608 shape with a dimension of 1.6 mm in the X-axis direction and a dimension of 0.8 mm in the Y-axis direction.

[0020] The first and second external electrodes 14 and 15 covering the pair of end faces E of the ceramic body 11 each extend from each end face E of the ceramic body 11 to the pair of main faces M and the pair of side faces S. As a result, in the external electrodes 14 and 15, both the cross section parallel to the X-Z plane and the cross section parallel to the X-Y plane are U-shaped.

[0021] Note that the shape of the external electrodes 14 and 15 is not limited to those shown in FIGS. 1 and 2. For example, the external electrodes 14 and 15 may extend from both end faces E of the ceramic body 11 only to one main face M, and the cross section parallel to the X-Z plane may be L-shaped. Also, the external electrodes 14 and 15 may not extend to any of the main faces M and side faces S.

[0022] The external electrodes 14 and 15 are formed of a good electrical conductor. Examples of the good electrical conductor forming the external electrodes 14 and 15 include metals or alloys mainly composed of copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and the like.

[0023] The ceramic body 11 is formed of a dielectric ceramic and has a laminate 16 and a pair of side margin portions 19. The laminate 16 constitutes the main face M and the end face E of the ceramic body 11 and has a pair of covering faces F facing in the Y-axis direction. The side margin portions 19 each cover the covering face F of the laminate 16 and constitute the side face S of the ceramic body 11.

[0024] The laminate 16 has a laminated structure in which multiple ceramic layers are stacked in the Z-axis direction. The laminate 16 has an electrode laminated section 17 and a pair of cover sections 18. The electrode laminated section 17 is provided with multiple first and second internal electrodes 12 and 13 arranged between the multiple ceramic layers. The cover sections 18 cover the electrode laminated section 17 from above and below in the Z-axis direction.

[0025] The cover portion 18 is defined as the part of the laminate 16 that is outside the outermost internal electrodes 12 and 13 in the Z-axis direction. The electrode laminate portion 17 is defined as the part of the laminate 16 that is inside the cover portion 18 in the Z-axis direction. Figure 3 shows the dimensions t in the Z-axis direction and w in the Y-axis direction of the electrode laminate portion 17.

[0026] The internal electrodes 12 and 13 are sheet-like structures extending along the XY plane and are arranged alternately along the Z-axis. In the electrode stacking section 17, the first internal electrode 12 is drawn out from one end face E, and the second internal electrode 13 is drawn out from the other end face E. As a result, the internal electrodes 12 and 13 are connected to the external electrodes 14 and 15, respectively.

[0027] The Y-axis ends of the internal electrodes 12 and 13 are located on the coating surface F of the laminate 16 that covers the side margin portion 19. Since the coating surface F of the laminate 16 is formed as a cut surface during the manufacturing process of the multilayer ceramic capacitor 10, the positions of the Y-axis ends of the internal electrodes 12 and 13 are aligned within 0.5 μm in the Y-axis direction.

[0028] Thus, in the ceramic body 11, the cover portion 18 and the side margin portion 19 constitute a margin portion that protects the area around the electrode stack portion 17 where the internal electrodes 12 and 13 are arranged. As a result, the multilayer ceramic capacitor 10 can mechanically protect the internal electrodes 12 and 13 and ensure insulation between the internal electrodes 12 and 13.

[0029] With this configuration, when a voltage is applied between the first external electrode 14 and the second external electrode 15 in the multilayer ceramic capacitor 10, a voltage is applied to multiple ceramic layers between the first internal electrode 12 and the second internal electrode 13. As a result, the multilayer ceramic capacitor 10 stores a charge corresponding to the voltage between the first external electrode 14 and the second external electrode 15.

[0030] In the ceramic substrate 11, high dielectric ceramics are used to increase the capacitance of each ceramic layer between the internal electrodes 12 and 13. Examples of high dielectric ceramics include perovskite materials containing barium (Ba) and titanium (Ti), such as barium titanate (BaTiO3).

[0031] The ceramic layer may also be composed of a system of materials such as strontium titanate (SrTiO3), calcium titanate (CaTiO3), magnesium titanate (MgTiO3), calcium zirconate (CaZrO3), calcium zirconate titanate (Ca(Zr,Ti)O3), barium zirconate (BaZrO3), and titanium dioxide (TiO2).

[0032] The internal electrodes 12 and 13 are formed from a good electrical conductor. Typical good electrical conductors forming the internal electrodes 12 and 13 include nickel (Ni), but other examples include metals or alloys mainly composed of copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au).

[0033] [Detailed configuration of multilayer ceramic capacitor 10] The multilayer ceramic capacitor 10 according to this embodiment achieves high capacitance due to a configuration in which the electrode stacking portion 17 accounts for a large proportion of the ceramic body 11. Specifically, in this embodiment, the area of ​​the electrode stacking portion 17 accounts for 80% or more of the total cross-section along the YZ plane in the central part of the ceramic body 11 in the X-axis direction.

[0034] In the cross-section at the center in the X-axis direction shown in Figure 3, the area of ​​the ceramic body 11 is obtained by the product of dimensions T and W, and the area of ​​the electrode stacking portion 17 is obtained by the product of dimensions t and w. Therefore, the ratio (%) of the area of ​​the electrode stacking portion 17 to the area of ​​the ceramic body 11 in this cross-section can be calculated as "100 × (t × w) / (T × W)".

[0035] On the other hand, in ceramic bodies 11 with a large proportion of electrode stacking portion 17, the thickness of the cover portion 18 and side margin portion 19, which are margin portions covering the periphery of the electrode stacking portion 17, becomes smaller. As a result, cracks are more likely to occur in the cover portion 18 and side margin portion 19 during firing of the ceramic body 11 in the manufacturing process of the multilayer ceramic capacitor 10.

[0036] In other words, the shrinkage behavior of the ceramic body 11 during firing differs significantly between the electrode stacking portion 17 where the internal electrodes 12 and 13 are located, and the cover portion 18 and side margin portion 19 where the internal electrodes 12 and 13 are not located. In ceramic bodies 11 where the thickness of the cover portion 18 and side margin portion 19 is small, the shrinkage behavior of the electrode stacking portion 17 tends to be dominant.

[0037] Therefore, during firing of the ceramic body 11, large loads are likely to be applied to the cover portion 18 and side margin portion 19, which have different shrinkage behaviors from the electrode stacked portion 17. Due to the load applied during firing, stress tends to concentrate at both ends in the Z-axis direction of the side margin portion 19, which constitutes the ridge portion extending along the X-axis direction of the ceramic body 11.

[0038] In this regard, in the multilayer ceramic capacitor 10 according to this embodiment, high-pore portions P, which have many pores, are provided at both ends of each side margin portion 19 in the Z-axis direction. Here, the ends of the side margin portion 19 in the Z-axis direction refer only to the portions adjacent in the Y-axis direction to the pair of cover portions 18 in the side margin portion 19, that is, the portions adjacent in the Y-axis direction to the electrode stacked portion 17 are not included. As a result, in the ceramic body 11 during firing, the high-pore portions P deform flexibly, effectively relieving the stress generated in the side margin portion 19.

[0039] Therefore, during firing of the ceramic body 11, the occurrence of cracks at both ends in the Z-axis direction of the side margin portion 19, where stress tends to concentrate, can be suppressed. Consequently, in the multilayer ceramic capacitor 10, the protective effect of the side margin portion 19 on the electrode stacked portion 17 is less likely to be impaired, and problems such as a decrease in moisture resistance are less likely to occur.

[0040] Specifically, in the multilayer ceramic capacitor 10, the pore ratio of the high-pore portion P in the side margin portion 19 must be 3% or more, and preferably 5% or more. The pore ratio is defined as the ratio of the total area of ​​all pores to the cross-section of the target portion in the side margin portion 19.

[0041] For example, the pore ratio can be calculated as the ratio of the sum of the cross-sectional areas of all pores present in a given region to the area of ​​a given region, in an image of the cross-section of the side margin portion 19 taken with a scanning electron microscope (SEM) at a predetermined magnification (e.g., 10,000x). The pore ratio may also be obtained as the average of values ​​calculated for multiple regions.

[0042] In a multilayer ceramic capacitor 10, it is preferable to have a large number of ceramic layers in the electrode stacking section 17, that is, a large number of internal electrode layers 12 and 13, in order to obtain a large capacitance. Specifically, in a multilayer ceramic capacitor 10, it is preferable that the ratio of the total number of internal electrode layers 12 and 13 to the dimension t of the electrode stacking section 17 is 800 layers / mm or more, and more preferably 900 layers / mm or more.

[0043] Furthermore, in the side margin portion 19, it is preferable that the high-pore portion P is located adjacent to the cover portion 18 in the Y-axis direction. On the other hand, in the side margin portion 19, in order to more reliably protect the electrode stack portion 17 in which the internal electrodes 12 and 13 are arranged, it is preferable that the pore ratio of the portion adjacent to the electrode stack portion 17 in the Y-axis direction be as low as possible.

[0044] Therefore, in the side margin portion 19, it is preferable that the high pore portion P is present only at both ends in the Z-axis direction, and that the pore ratio in the central part in the Z-axis direction is smaller than that of the high pore portion P. Specifically, the pore ratio in the central part in the Z-axis direction of the side margin portion 19 is preferably less than 3%, and more preferably 2% or less.

[0045] [Manufacturing method for multilayer ceramic capacitor 10] Figure 4 is a flowchart showing the manufacturing method of the multilayer ceramic capacitor 10 according to this embodiment. Figures 5 and 6 show the manufacturing process of the multilayer ceramic capacitor 10. The manufacturing method of the multilayer ceramic capacitor 10 will be described below in reference to Figure 4, with appropriate reference to Figures 5 and 6.

[0046] (Step S01: Laminate preparation) In step S01, an unfired laminate 16, as shown in Figure 5, is prepared. The unfired laminate 16 can be made using a laminated sheet in which multiple large ceramic sheets are stacked in the Z-axis direction. A conductive paste for forming internal electrodes 12 and 13 is patterned on the ceramic sheet corresponding to the electrode laminate 17.

[0047] The unfired laminate 16 is obtained by cutting the laminated sheet along the XZ and YZ planes. For cutting the laminated sheet, a cutting device equipped with, for example, a push-cutting blade or a rotary blade can be used. As a result, in the laminate 16, a pair of covering surfaces F are obtained as cut surfaces where both ends of the internal electrodes 12 and 13 in the Y-axis direction are aligned.

[0048] (Step S02: Formation of side margins) In step S02, a pair of unfired side margin portions 19 are provided on each of the two coating surfaces F of the unfired laminate 16 fabricated in step S01. As a result, as shown in Figure 6, an unfired ceramic body 11 is obtained in which a pair of sides S are formed by the unfired side margin portions 19.

[0049] The side margin portion 19 can be formed by any method. For example, the side margin portion 19 can be formed using a ceramic sheet, which is a dielectric green sheet. In this case, the ceramic sheet can be punched out on the covering surface F of the laminate 16, or it can be pre-cut and attached to the covering surface F of the laminate 16.

[0050] Furthermore, in order to form the side margin portion 19, an unformed ceramic slurry can be used instead of a pre-formed ceramic sheet. In this case, the ceramic slurry can be applied to the coating surface F of the laminate 16 by, for example, immersing the coating surface F of the laminate 16.

[0051] (Step S03: High pore formation treatment) In step S03, a high-pore formation treatment is applied to each side margin portion 19 of the unfired ceramic body 11 obtained in step S02 to form high-pore portions P. Any known technique can be used as the high-pore formation treatment, but one example is a treatment that reduces the packing density of ceramic particles at both ends Q of the side margin portion 19.

[0052] As a treatment to reduce the packing density of ceramic particles at both ends Q of the side margin portion 19, for example, an acid treatment can be used to dissolve a portion of the ceramic particles using an acid. This acid treatment can be carried out by immersing both ends Q of the side margin portion 19 in a fluorine-containing acid such as hydrofluoric acid.

[0053] (Step S04: Firing) In step S04, the ceramic body 11, which has undergone a high-pore formation treatment on the side margin portion 19 in step S03, is fired to produce the ceramic body 11 of the multilayer ceramic capacitor 10 shown in Figures 1-3. As a result, high-pore portions P are formed at both ends Q in the Z-axis direction of the pair of side margin portions 19.

[0054] The firing temperature in step S04 can be determined based on the sintering temperature of the ceramic body 11. For example, when using a barium titanate (BaTiO3)-based material, the firing temperature can be set to approximately 1000-1300°C. Furthermore, firing can be carried out, for example, under a reducing atmosphere or a low oxygen partial pressure atmosphere.

[0055] (Step S05: External electrode formation) In step S05, external electrodes 14 and 15 are formed on both ends of the ceramic body 11 obtained in step S04 in the X-axis direction, thereby fabricating the multilayer ceramic capacitor 10 shown in Figures 1 to 3. The method for forming the external electrodes 14 and 15 in step S05 can be arbitrarily selected from known methods.

[0056] As a result, the multilayer ceramic capacitor 10 is completed. In this manufacturing method, a side margin portion 19 is formed on the coating surface F of the laminate 16 in which the internal electrodes 12 and 13 are exposed, so that the positions of the ends of the multiple internal electrodes 12 and 13 in the ceramic body 11 in the Y-axis direction are aligned within a range of 0.5 μm or less in the Y-axis direction.

[0057] [Other embodiments] Although embodiments of the present invention have been described above, it goes without saying that the present invention is not limited to the embodiments described above and can be modified in various ways.

[0058] For example, in the above embodiment, a multilayer ceramic capacitor 10 was described as an example of a multilayer ceramic electronic component, but the present invention is applicable to multilayer ceramic electronic components in general. Examples of such multilayer ceramic electronic components include chip varistors, chip thermistors, and multilayer inductors. [Explanation of Symbols]

[0059] 10…Multilayer ceramic capacitor 11…Ceramic base 12,13…Internal electrode 14,15...External electrode 16…Laminate 17… Electrode stacking section 18...Cover part 19... Side margin section P... High School Poa Club M…Main surface S...Side E...End face F…Coated surface

Claims

1. The ceramic body comprises: an electrode stack having a plurality of internal electrodes stacked in the first axial direction; a pair of cover portions covering the electrode stack from both sides in the first axial direction; a pair of covering surfaces perpendicular to a second axis orthogonal to the first axis, such that the ends of the plurality of internal electrodes in the second axial direction are aligned within 0.5 μm in the second axial direction; and a pair of side margin portions covering the pair of covering surfaces, with a pore ratio of 3% or more at both ends in the first axial direction. In the ceramic body, the dimension in the first axial direction is 1.5 times or more the dimension in the second axial direction, and the ratio of the area of ​​the electrode stack to the entire cross-section perpendicular to the third axis in the central part of the third axial direction which is perpendicular to the first and second axes is 80% or more. In each of the pair of side margin portions, the pore ratio in the central part in the first axial direction is lower than the pore ratio at both ends in the first axial direction. Multilayer ceramic electronic components.

2. A multilayer ceramic electronic component according to claim 1, The ratio of the number of layers of the plurality of internal electrodes to the dimension of the electrode stack in the first axial direction is 800 layers / mm or more. Multilayer ceramic electronic components.

3. A multilayer ceramic electronic component according to Claim 1, In each of the pair of side margin portions, the pore ratio in the central part in the first axial direction is less than 3%. Multilayer ceramic electronic components.

Citation Information

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