Region-selective atomic layer deposition of metal oxide or insulating layers on patterned substrates

Abstract

The selective deposition of metal oxide or insulator layers on nonmetallic substrates without concomitant growth on the metallic substrate, using cyclic azasilanes, thiasilanes, or telluriumsilanes to suppress growth on metallic surfaces, is described. Films over 7 nanometers thick can be grown on insulator substrates such as thermal silicon oxide or silicon, with no growth observed on metallic regions such as copper. Such insulator-on-insulator (DoD) growth is a key element for many fabrication schemes proposed for future semiconductor device fabrication, such as fully self-aligned vias.

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the priority of U.S. Provisional Patent Application No. 63 / 333,286, filed on April 21, 2022, the disclosure of which is hereby incorporated by reference in its entirety.

Background Art

[0002] As the pattern size shrinks during semiconductor manufacturing, the alignment of existing features on the substrate with the mask becomes a significant obstacle in further shrinking the feature size. The misalignment between the substrate and the mask leads to an edge placement error, which is the difference between the desired and actual positions of the features on the device. This mismatch can cause both immediate device failures and time - dependent dielectric breakdowns, affecting the reliability of the device. Additionally, when vias connect to metal wiring, the edge placement error can not only increase the capacitance between the via and the adjacent metal wiring but also reduce the contact area between the via and the target line, resulting in an increase in resistance. The resulting RC delay can reduce the switching speed of transistors and significantly degrade the performance of the device.

[0003] One way to avoid edge placement error is to create fully self-aligned vias (FSAVs) that are selectively grown on existing insulating layers without growing an insulating film on metal wiring. Such region-selective deposition (ASD) can mitigate these manufacturing challenges by enabling bottom-up material placement without the use of masks. In the case of FSAVs, the topography created by the dielectric-on-dielectric (DoD) process of ASD provides greater vertical distance between subsequent metal layers, allowing for a greater tolerance for horizontal misalignment or a larger critical dimension (CD) via. While several schemes for depositing DoD layers of ASD have been reported, few have been able to achieve the desired film thickness of 5-10 nm while simultaneously meeting other film properties and manufacturability targets. [Overview of the project] [Means for solving the problem]

[0004] In one embodiment, the present disclosure provides a method for selectively depositing a metal oxide layer or an insulating layer on a patterning substrate, (a) A process of introducing a patterning substrate having metallic and nonmetallic regions into the reaction zone of a deposition chamber and heating the reaction zone to approximately 175°C to approximately 350°C. (b) Exposing the patterned substrate to pulses of a heteroatom silacyclo compound and purging the deposition chamber, and (c) A process of forming a metal oxide layer or insulating layer on a patterned substrate by carrying out atomic layer deposition or chemical vapor deposition on the substrate. The present invention relates to a method comprising a metal oxide layer or an insulating layer being selectively formed in a non-metallic region of a patterned substrate.

[0005] In summary, the following embodiments are proposed as particularly preferred within the scope of the present invention.

[0006] Embodiment 1: A method for selectively depositing a metal oxide layer or an insulating layer on a patterning substrate, (a) A process of introducing a patterning substrate having metallic and nonmetallic regions into the reaction zone of a deposition chamber and heating the reaction zone to approximately 175°C to approximately 350°C. (b) Exposing the patterned substrate to pulses of a heteroatom silacyclo compound and purging the deposition chamber, and (c) A process of forming a metal oxide layer or insulating layer on a patterned substrate by carrying out atomic layer deposition or chemical vapor deposition on the patterned substrate. A method comprising a metal oxide layer or an insulating layer being selectively formed in a non-metallic region of a patterned substrate.

[0007] Embodiment 2: Step (c) is, (d) A step of exposing a patterned substrate to pulses of a metal alkyl compound, (e) A step of purging the deposition chamber, (f) A step of exposing the patterned substrate to a pulse of water, (g) A step of purging the deposition chamber, and (h) Repeat steps (d) to (g) until the desired thickness of the metal oxide layer or insulating layer is obtained. The method according to Embodiment 1, including the method described above.

[0008] Embodiment 3: The method according to Embodiment 1 or 2, further comprising the step of performing a plasma treatment step before step (a).

[0009] Embodiment 4: The method according to any one of Embodiments 1 to 3, further comprising the step of performing at least one plasma treatment step before or after any of steps (a) to (g).

[0010] Embodiment 5: The method according to any one of Embodiments 2 to 4, wherein the metal alkyl compound is a Group 12 or Group 13 metal alkyl compound.

[0011] Embodiment 6: The method according to Embodiment 5, wherein the metal alkyl compound is selected from diethylzinc, trimethylaluminum, dimethylaluminum isopropoxide, dimethylzinc, trimethylgallium, triethylgallium, triethylaluminum, trimethylindium, dimethylcadmium, and dimethylmercury.

[0012] Embodiment 7: The heteroatom silacyclo compound is a cyclic azasilane having formula (1), a cyclic thiasilane having formula (2), or a cyclic tellursilane having formula (3).

[0013] [ka]

[0014] (In the formula, R1 is hydrogen, or a linear, branched, or cyclic alkyl, aryl, alkynyl, alkenyl, alkoxy, silyl, or alkylamino group having 1 to about 12 carbon atoms, and R2 is a linear, branched, or cyclic alkyl, aryl, alkynyl, alkenyl, alkoxy, silyl, or alkylamino group having 1 to about 12 carbon atoms, and n is an integer from 1 to about 4, and X and Y are each independently a linear, branched, or cyclic alkyl, aryl, alkynyl, alkenyl, alkoxy, silyl, or alkylamino group.) The method according to any one of embodiments 1 to 6.

[0015] Embodiment 8: The heteroatom silacyclo compound is N-methyl-aza-2,2,4-trimethylsilacyclopentane, N-(2-aminoethyl)-2,2,4-trimethyl-1-aza-silacyclopentane, Nn-butyl-aza-2,2-dimethoxysilacyclopentane, N-ethyl-2,2-dimethoxy-4-methyl-1-aza-2-silacyclopentane, (N,N-dimethylaminopropyl)-aza-2-methyl-2-meth The method according to Embodiment 7, wherein the material is xysilacyclopentane, (1-(3-triethoxysilyl)propyl)-2,2-diethoxy-1-aza-silacyclopentane, N-allyl-aza-2,2-dimethoxysilacyclopentane, Nt-butyl-aza-2,2-dimethoxysilacyclopentane, 2,2,4-trimethyl-1-thia-2-silacyclopentane, or 2,2,4-trimethyl-1-tellur2-silacyclopentane.

[0016] Embodiment 9: The method according to any one of Embodiments 1 to 8, wherein the metallic region of the substrate includes at least one of copper, cobalt, tungsten, ruthenium, and molybdenum.

[0017] Embodiment 10: The method according to Embodiment 1, wherein the nonmetallic region of the substrate includes at least one of silicon, germanium, silicon-germanium alloy, silicon dioxide, silicon nitride, titanium nitride, tantalum nitride, silicon oxycarbide, silicon oxynitride, silicon carboxynitride, aluminum oxide, hafnium dioxide, titanium dioxide, and zinc oxide.

[0018] Embodiment 11: The method according to any one of Embodiments 1 to 10, wherein the substrate comprises silicon dioxide or copper on silicon.

[0019] Embodiment 12: The method according to any one of Embodiments 1 to 11, wherein the pulse of the heteroatom silacyclo compound in step (b) is at least about 0.1 seconds.

[0020] Embodiment 13: The method according to any one of Embodiments 1 to 12, wherein the pulse of the heteroatom silacyclo compound in step (b) is about 0.1 seconds to about 10 seconds.

[0021] Embodiment 14: The method according to embodiment 13, wherein the pulse of the heteroatom silacyclo compound in step (b) is about 5 seconds.

[0022] Embodiment 15: The method according to any one of embodiments 1 to 14, wherein the reaction zone in step (a) is heated to about 225 °C to about 275 °C.

[0023] Embodiment 16: The method according to any one of embodiments 1 to 15, wherein the thickness of the insulator film is about 5 nm to about 50 nm.

[0024] Embodiment 17: The method according to embodiment 16, wherein the thickness of the insulator film is about 5 nm to about 10 nm.

[0025] Embodiment 18: The method according to any one of embodiments 1 to 17, wherein a blocking layer is formed on the patterned substrate in step (b).

[0026] Embodiment 19: Step (c) is (d) exposing the patterned substrate to a pulse of a metal alkyl compound, (e) purging the deposition chamber, (f) exposing the patterned substrate to a pulse of water, (g) purging the deposition chamber, (h) repeating steps (d) to (g) at least once, (i) performing a plasma treatment step, and (j) repeating steps (d) to (i) until the desired thickness of the metal oxide layer or insulator layer is obtained comprising the method according to embodiment 1.

[0027] Embodiment 20: The method according to embodiment 1, wherein the metal oxide layer or insulator layer is formed from a metal alkyl compound. <00001​​

[0029] Embodiment 22: The method according to Embodiment 21, wherein the metal alkyl compound is selected from diethylzinc, trimethylaluminum, dimethylaluminum isopropoxide, dimethylzinc, trimethylgallium, triethylgallium, triethylaluminum, trimethylindium, dimethylcadmium, and dimethylmercury.

[0030] The following detailed description of preferred embodiments of the present invention will be better understood in conjunction with the accompanying drawings. For the purpose of illustrating the present invention, currently preferred embodiments are shown in the drawings. However, it should be understood that the present invention is not limited to the arrangements and means shown. The drawings are as follows. [Brief explanation of the drawing]

[0031] [Figure 1] These are graphs showing the film thickness versus time for Examples 1 and 2 and Comparative Examples 1 and 2. [Modes for carrying out the invention]

[0032] Aspects of this disclosure relate to a method for forming a region-selective deposited insulator-on-insulator (DoD of ASD) layer, by first reacting a patterning substrate with a heteroatom silacyclo compound, and then performing metal oxide atomic layer deposition (ALD) growth using sequential pulses of metal alkyl and water, or by performing chemical vapor deposition (CVD) using simultaneous addition of metal alkyl and water, thereby selectively growing a layer or film of metal oxide or insulator on a nonmetallic portion of the patterning substrate.

[0033] It was discovered that exposure of a metal surface to a heteroatomic silacyclo compound at sufficiently high temperatures, such as approximately 175°C to 350°C, preferably approximately 225°C to 275°C, significantly inhibits film growth during subsequent exposure to the metal oxide deposition process. Specifically, the heteroatomic silacyclo compound acts as a blocking group to manipulate the growth of metal oxides such as zinc oxide on various patterning substrates. While an inhibitory effect on non-metallic substrates is also observed after exposure to the heteroatomic silacyclo compound, this effect is greater in the metallic portions of the substrate, resulting in the selective growth of metal oxide films in the non-metallic regions of the substrate. Zinc oxide films exceeding 7 nm in thickness grew on a thermal oxidation substrate without growing on copper under the same conditions. Taking PVD copper on a silicon patterned substrate as a specific example, it was found that at sufficiently high temperatures (e.g., approximately 175°C to 350°C, especially 225°C to 275°C), the heteroatom silacyclo compound blocking layer delays the growth of the zinc oxide film on the copper portion of the substrate, thereby enabling selective growth on the silicon portion.

[0034] The method according to this disclosure includes the steps of introducing a patterning substrate having metallic and nonmetallic regions into the reaction zone of a deposition chamber and heating the reaction zone to about 175°C to about 350°C, exposing the patterning substrate to pulses of a heteroatom silacyclo compound and purging the deposition chamber, and performing ALD or CVD on the patterning substrate to form a metal oxide layer or insulating layer or film. For the purposes of this disclosure, the terms “layer” and “film” may be understood to be synonymous. In one embodiment, ALD includes the step of exposing the substrate (now including a blocking layer) to the following series of steps repeated as many times as necessary to achieve a desired film thickness: exposing the substrate to pulses of a metallic alkyl compound, purging the deposition chamber, exposing the substrate to pulses of deionized water, and purging the deposition chamber. The resulting metal oxide layer or insulating layer is selectively formed in the nonmetallic regions of the patterning substrate.

[0035] In some embodiments, pretreatment of the substrate before exposure to the heteroatom silacic compound is within the scope of this disclosure. Pretreatment may be achieved by chemical, structural, or plasma pretreatment methods well known in the art. For example, the substrate can be pretreated by washing it in an ethanol, isopropanol, citrate, or acetic acid-based formulation, or by exposing the substrate to an N2 remotely inductively coupled plasma at 225°C to 250°C for 60 seconds. Other similar substrate pretreatment processes known in the art are also applicable. Such treatment may improve the performance of the resulting film, but the appropriate pretreatment method and conditions can be determined on a case-by-case basis depending on the specific substrate, apparatus, reactants, and reaction conditions.

[0036] In some embodiments, after several sequences of metal alkyl exposure / purging / water exposure / purging (e.g., about 1 to about 50 sequences) are completed, the substrate is subjected to a plasma treatment pulse (e.g., about 10 seconds). For example, a series of five exposure / pulse sequences may be performed before the plasma treatment. This series of (e.g.) five exposure / pulse sequences, followed by a plasma pulse, may be referred to as a "supercycle." Such a supercycle can be repeated as many times as necessary to form a metal oxide film or insulating film of the desired thickness. In some embodiments, performing the plasma treatment step before or after either the exposure or purging step is also within the scope of this disclosure.

[0037] The preparation of metal oxide films or insulating films having a thickness of 5 nm to 10 nm, particularly 7 nm to 10 nm, which is currently desirable in the microelectronics industry, and further, the preparation of metal oxide films or insulating films having a thickness of up to approximately 50 nm, is within the scope of this disclosure. The desired film thickness or layer thickness can be achieved by repeatedly performing the steps described herein.

[0038] In the methods described herein, various metal alkyl compounds, including but not limited to Group 12 and Group 13 metal alkyl compounds, can be used. Exemplary metal alkyl compounds that can be used include, currently preferred, diethylzinc, trimethylaluminum, and dimethylaluminum isopropoxide, as well as dimethylzinc, trimethylgallium, triethylgallium, triethylaluminum, trimethylindium, dimethylcadmium, and dimethylmercury.

[0039] The blocking layer on the patterned substrate is applied by exposing the substrate to pulses of heteroatom silacyclo compounds, such as cyclic azasilane, cyclic tellursilane, or cyclic thiasilane compounds.

[0040] A suitable cyclic azasilane has general formula (1).

[0041] [ka]

[0042] In formula (1), R1 is hydrogen, or a linear, branched, or cyclic alkyl group, aryl group, alkynyl group, alkenyl group, alkoxy group, silyl group, or alkylamino group having 1 to about 12 carbon atoms (preferably 1 to about 4 carbon atoms), R2 is a linear, branched, or cyclic alkyl group, aryl group, alkynyl group, alkenyl group, alkoxy group, silyl group, or alkylamino group having 1 to about 12 carbon atoms (preferably 1 to about 4 carbon atoms), n is an integer from 1 to about 4, and X and Y are each independently a linear, branched, or cyclic alkyl group, aryl group, alkynyl group, alkenyl group, alkoxy group, silyl group, or alkylamino group (preferably having about 1 to about 4 carbon atoms). It is within the scope of this disclosure that R1, R2, X, and Y are either unsubstituted or substituted with functional groups such as alkyl groups (methyl, ethyl, or propyl groups, etc.), alkoxysilyl groups (trimethoxysilyl or triethoxysilyl groups, etc.), alkoxy groups (methoxy or alkoxy groups, etc.), and / or halogen groups (chloro, bromo, fluoro, or iodine groups, etc.).

[0043] Exemplary R1, R2, X, and Y substituents include, but are not limited to, hydrogen, methyl, ethyl, n-propyl, i-propyl, n-butyl, s-butyl, t-butyl, pentyl, hexyl, phenyl, cyclohexyl, heptyl, n-octyl, 2-ethylhexyl, nonyl, decyl, dodecyl, octadecyl, methoxy, ethoxy, n-propoxy, i-propoxy, n-butoxy, s-butoxy, t-butoxy, vinyl, allyl, norborneyl, methylnorborneyl, ethyl(N) Examples include propylnorborneyl, propylnorborneyl, trimethylsilyl, trimethoxysilyl, methyl(trimethoxysilyl), ethyl(trimethoxysilyl), propyl(trimethoxysilyl), triethoxysilyl, methyl(triethoxysilyl), ethyl(triethoxysilyl), propyl(triethoxysilyl), amino, methylamino, ethylamino, propylamino, methyl(dimethylamino), ethyl(dimethylamino), propyl(dimethylamino), and chloromethyl.

[0044] Preferably, R1 is hydrogen or an alkyl group such as a methyl group or an ethyl group, R2 is an optionally substituted alkyl group, alkenyl group or alkylamino group having 1 to about 4 carbon atoms, for example 1, 2, 3 or 4 carbon atoms, and X and Y are preferably alkyl groups or alkoxy groups having 1 to about 4 carbon atoms, for example 1, 2, 3 or 4 carbon atoms.

[0045] Examples of cyclic azasilane compounds effective for forming a blocking layer on a patterning substrate include, but are not limited to, N-methyl-aza-2,2,4-trimethylsilacyclopentane, N-(2-aminoethyl)-2,2,4-trimethyl-1-aza-silacyclopentane, Nn-butyl-aza-2,2-dimethoxysilacyclopentane, N-ethyl-2,2-dimethoxy-4-methyl-1-aza-2-silacyclopentane, (N,N-dimethylaminopropyl)-aza-2-methyl-2-methoxysilacyclopentane, (1-(3-triethoxysilyl)propyl)-2,2-diethoxy-1-aza-silacyclopentane, N-allyl-aza-2,2-dimethoxysilacyclopentane, and Nt-butyl-aza-2,2-dimethoxysilacyclopentane, having the following structures.

[0046] [ka]

[0047] A suitable cyclic thiasilane has general formula (2).

[0048] [ka]

[0049] In formula (2), R1, n, X, and Y are as described above. Preferably, R1 is hydrogen or an alkyl group such as a methyl group or an ethyl group, and X and Y are preferably alkyl groups or alkoxy groups having 1 to about 4 carbon atoms, for example, 1, 2, 3, or 4 carbon atoms.

[0050] An exemplary cyclic thiasilane compound effective for forming a blocking layer on a patterning substrate is 2,2,4-trimethyl-1-thia-2-silacyclopentane, which has the following structure.

[0051] [ka]

[0052] A suitable cyclic tellursilane has general formula (3).

[0053] [ka]

[0054] In formula (3), R1, n, X, and Y are as described above. Preferably, R1 is hydrogen or an alkyl group such as a methyl group or an ethyl group, and X and Y are preferably alkyl groups or alkoxy groups having 1 to about 4 carbon atoms, for example, 1, 2, 3, or 4 carbon atoms.

[0055] An exemplary cyclic tellursilane compound effective for forming a blocking layer on a patterning substrate is 2,2,4-trimethyl-1-tellur2-silacyclopentane, which has the following structure.

[0056] [ka]

[0057] Currently preferred compounds for use in the methods described herein are cyclic azasilanes, and in particular N-methyl-aza-2,2,4-trimethylsilacyclopentane is a preferred compound for forming a blocking layer on a patterning substrate.

[0058] [ka]

[0059] The parameters of the purge cycle are not particularly limited and can be optimized based on specific reaction conditions, apparatus, and reactants. Generally, any inert gas such as argon or nitrogen can be used, and a typical purge cycle is at least about 2 seconds long. In preferred embodiments, the purge is about 5 seconds (after the metal alkyl pulse and the water pulse) and about 30 seconds (after the heteroatom silacyclo compound pulse).

[0060] To create an effective blocking layer for heteroatom silacic compounds, the temperature of the substrate and the reaction zone of the deposition chamber is important. Specifically, the temperature of the substrate and reaction zone during the deposition of at least a metal oxide layer or insulating layer is preferably about 175°C to about 350°C, more preferably about 225°C to about 275°C. It is understood that the substrate temperature range encompasses all temperatures within that range, and therefore the temperature of about 175°C to about 350°C includes, for example, about 200°C, about 225°C, about 250°C, about 275°C, about 300°C, about 325°C, about 300°C, about 325°C, and all temperatures in between.

[0061] If the blocking layer is deposited in the same deposition chamber and under the same reaction conditions as the metal oxide layer or insulating layer, the deposition temperature of the substrate and reaction zone may also be within this temperature range. Optionally, the blocking layer can be applied at different temperatures, for example, approximately 20°C to approximately 325°C (including all temperatures within this range), in the same or different reaction chambers.

[0062] The pulse length for each reactant can also be optimized based on the specific reaction conditions and apparatus, and is generally kept as short as practically possible. The pulse lengths for metal alkyl compounds and water may be as short as 0.05 seconds or about 1 second in some embodiments. The pulse length for heteroatom silacic compounds is relatively short, for example, at least about 0.1 seconds, preferably about 0.1 to about 10 seconds, more preferably about 2 to about 6 seconds, even more preferably about 3 to about 5 seconds, and even more preferably about 5 seconds.

[0063] The transfer of reactants such as heteroatom silacic compounds and metal alkyl compounds in a carrier gas is within the scope of this disclosure. While not limited to these, any noble gas such as argon, or other inert gases such as nitrogen, are suitable. However, the absence of a carrier gas is also within the scope of this disclosure.

[0064] Various different types of patterning substrates are suitable for use in the methods described herein, provided that they include metallic and nonmetallic regions. Suitable substrates include, but are not limited to, silicon dioxide and copper on silicon, which are currently preferred. Other suitable possible substrates include, but are not limited to, substrates containing nonmetallic regions including silicon, germanium, silicon-germanium alloys, silicon dioxide, silicon nitride, titanium nitride, tantalum nitride, silicon oxycarbide, silicon oxynitride, silicon carboxynitride, aluminum oxide, hafnium dioxide, titanium dioxide, and / or zinc oxide, as well as substrates containing metallic regions including copper, cobalt, tungsten, ruthenium, and / or molybdenum.

[0065] Herein, the present invention will be described in relation to the following non-limiting embodiments. [Examples]

[0066] (Comparative Example 1) Zinc oxide was grown on thermally grown silicon dioxide that had been cleaned for 60 seconds in a 225°C N2 remotely inductively coupled plasma (2500W) using an alternating pulse sequence of 0.1 seconds of diethylzinc, 5 seconds of purging, 0.1 seconds of water, and 5 seconds of purging (repeated 50 times). The film grew rapidly at 2.8 angstroms per cycle. The film thickness after 24 cycles was 5.0 nm.

[0067] (Comparative Example 2) PVD copper on silicon was cleaned by washing with ethanol for 5 minutes. Zinc oxide was grown on the cleaned copper by exposing the copper substrate to N2 remotely inductively coupled plasma (2500W) at 225°C for 60 seconds, followed by an alternating pulse sequence of 0.1 seconds of diethylzinc, 5 seconds of purging, 0.1 seconds of water, and 5 seconds of purging (repeated 50 times). A small film growth of 7 angstroms was observed during the first 24 cycles, after which ALD-like growth began, reaching 2.6 angstroms per cycle by the final cycle.

[0068] (Example 1) Thermally grown silicon dioxide was cleaned for 60 seconds in a 225°C N2 remotely inductively coupled plasma (2500W), then exposed to N-methyl-aza-2,2,4-trimethylsilacyclopentane for 5 seconds, followed by a 30-second purge. Next, it was exposed to an alternating pulse sequence of 0.1 seconds of diethylzinc, 5 seconds of purging, 0.1 seconds of water, and 5 seconds of purging (this was repeated 50 times). Film growth began at the 11th cycle and reached 3.0 angstroms per cycle until the final cycle. The film thickness at the 44th cycle was 7.3 nm.

[0069] (Example 2) The PVD copper on silicon was cleaned by washing with ethanol for 5 minutes. The copper was then exposed to 225°C N2 remotely inductively coupled plasma (2500W) for 60 seconds, followed by further exposure to N-methyl-aza-2,2,4-trimethylsilacyclopentane for 5 seconds, and then purged for 30 seconds. Subsequently, it was exposed to an alternating pulse sequence of 0.1 seconds of diethylzinc, 5 seconds of purging, 0.1 seconds of water, and 5 seconds of purging (this sequence was repeated 50 times). Film growth began at the 44th cycle and remained below 1 angstrom per cycle until the final cycle.

[0070] Table 1 below summarizes the steps performed in Examples 1 and 2. Step 2 was omitted in Comparative Examples 1 and 2. Figure 1 shows the thickness versus time data for the films prepared in Examples 1 and 2 and Comparative Examples 1 and 2.

[0071] Without the application of heteroatomic silacyclo compounds, growth on non-metallic oxide surfaces began immediately, while on copper metal, growth was observed to be slow for approximately 30 cycles before ALD-like deposition of metal oxides began. The thickness gap between growth on non-metallic and metallic surfaces is insufficient for most ASD DoD schemes, and if growth is slow observed on copper during the first 30 cycles, further process steps for cleaning or mitigation are required. In contrast, applying heteroatomic silacyclo compounds before initiating the metal oxide deposition process resulted in a larger thickness gap between the two surfaces, and no metal oxide growth was observed on copper for 40 cycles. This resulted in the formation of an ASD DoD layer with a thickness of >7 nm on the non-metallic surface, while the metallic surface was preserved and no metal oxide or insulating film was deposited. This thickness is sufficient for FSAV schemes.

[0072] [Table 1]

[0073] Those skilled in the art will understand that modifications can be made to the embodiments described above without departing from the broader concept of the invention. Therefore, it will be understood that the present invention is not limited to the specific embodiments disclosed, but is intended to cover modifications within the spirit and scope of the invention as defined by the appended claims.

Claims

1. A method for selectively depositing a metal oxide layer or an insulating layer on a patterning substrate, (a) A step of introducing a patterning substrate having metallic and nonmetallic regions into the reaction zone of a deposition chamber and heating the reaction zone to 175°C to 350°C. (b) Exposing the patterned substrate to a pulse of a heteroatom silacyclo compound containing N, S, or Te, and purging the deposition chamber, and (c) A step of forming a metal oxide layer or an insulating layer on the patterned substrate by carrying out atomic layer deposition or chemical vapor deposition on the patterned substrate, A method wherein the heteroatom silacyclo compound reacts with the metal region upon exposure to the metal region to prevent deposition, thereby selectively forming the metal oxide layer or the insulating layer in the nonmetallic region of the patterning substrate.

2. Step (c) is, (d) A step of exposing the patterned substrate to a pulse of a metal alkyl compound, (e) A step of purging the deposit chamber, (f) A step of exposing the patterned substrate to a pulse of water, (g) A step of purging the deposit chamber, and (h) The method according to claim 1, comprising the step of repeating steps (d) to (g) until a desired thickness of the metal oxide layer or insulating layer is obtained.

3. The method according to claim 1 or 2, further comprising the step of performing a plasma treatment step before step (a).

4. The method according to claim 1, further comprising the step of performing at least one plasma treatment step before or after any of steps (a) to (g).

5. The method according to claim 2, wherein the metal alkyl compound is a Group 12 or Group 13 metal alkyl compound.

6. The method according to claim 5, wherein the metal alkyl compound is selected from diethylzinc, trimethylaluminum, dimethylaluminum isopropoxide, dimethylzinc, trimethylgallium, triethylgallium, triethylaluminum, trimethylindium, dimethylcadmium, and dimethylmercury.

7. The heteroatom silacyclo compound is a cyclic azasilane having formula (1), a cyclic thiasilane having formula (2), or a cyclic tellursilane having formula (3). 【Chemistry 1】 (In the formula, R １ R is a hydrogen atom, or a linear, branched, or cyclic alkyl group, aryl group, alkynyl group, alkenyl group, alkoxy group, silyl group, or alkylamino group having 1 to 12 carbon atoms, which may be substituted. ２ The method according to claim 1, wherein is a linear, branched, or cyclic, optionally substituted alkyl group, aryl group, alkynyl group, alkenyl group, alkoxy group, silyl group, or alkylamino group having 1 to 12 carbon atoms, n is an integer from 1 to 4, and X and Y are each independently a linear, branched, or cyclic, optionally substituted alkyl group, aryl group, alkynyl group, alkenyl group, alkoxy group, silyl group, or alkylamino group.

8. The heteroatom silacyclo compounds include N-methyl-aza-2,2,4-trimethylsilacyclopentane, N-(2-aminoethyl)-2,2,4-trimethyl-1-aza-silacyclopentane, N-n-butyl-aza-2,2-dimethoxysilacyclopentane, N-ethyl-2,2-dimethoxy-4-methyl-1-aza-2-silacyclopentane, and (N,N-dimethylaminopropyl)-aza-2-methyl-2-methoxy The method according to claim 7, wherein the silacyclopentane is (1-(3-triethoxysilyl)propyl)-2,2-diethoxy-1-aza-silacyclopentane, N-allyl-aza-2,2-dimethoxysilacyclopentane, N-t-butyl-aza-2,2-dimethoxysilacyclopentane, 2,2,4-trimethyl-1-thia-2-silacyclopentane, or 2,2,4-trimethyl-1-tellur2-silacyclopentane.

9. The method according to claim 1, wherein the metallic region of the substrate comprises at least one of copper, cobalt, tungsten, ruthenium, and molybdenum.

10. The method according to claim 1, wherein the nonmetallic region of the substrate includes at least one of silicon, germanium, silicon-germanium alloy, silicon dioxide, silicon nitride, titanium nitride, tantalum nitride, silicon oxycarbide, silicon oxynitride, silicon carboxynitride, aluminum oxide, hafnium dioxide, titanium dioxide, and zinc oxide.

11. The method according to claim 1, wherein the substrate comprises silicon dioxide or copper on silicon.

12. The method according to claim 1, wherein the pulse of the heteroatom silacyclo compound in step (b) is at least 0.1 seconds.

13. The method according to claim 1, wherein the pulse of the heteroatom silacyclo compound in step (b) is 0.1 seconds to 10 seconds.

14. The method according to claim 13, wherein the pulse of the heteroatom silacyclo compound in step (b) is 5 seconds.

15. The method according to claim 1, wherein the reaction zone in step (a) is heated to 225°C to 275°C.

16. The method according to claim 1, wherein the thickness of the insulating layer is 5 nm to 50 nm.

17. The method according to claim 16, wherein the thickness of the insulating layer is 5 nm to 10 nm.

18. The method according to claim 1, wherein step (b) forms a blocking layer on the patterning substrate, and the blocking layer delays the formation of the metal oxide or insulating layer in the metal region.

19. Step (c) is, (d) A step of exposing the patterned substrate to a pulse of a metal alkyl compound, (e) A step of purging the deposit chamber, (f) A step of exposing the patterned substrate to a pulse of water, (g) A step of purging the deposit chamber, (h) A process in which steps (d) to (g) are repeated at least once. (i) A process for carrying out a plasma treatment process, and (j) The method according to claim 1, comprising the step of repeating steps (d) to (i) until a desired thickness of metal oxide layer or insulating layer is obtained.

20. The method according to claim 1, wherein the metal oxide layer or the insulating layer is formed from a metal alkyl compound.

21. The method according to claim 19, wherein the metal alkyl compound is a Group 12 or Group 13 metal alkyl compound.

22. The method according to claim 21, wherein the metal alkyl compound is selected from diethylzinc, trimethylaluminum, dimethylaluminum isopropoxide, dimethylzinc, trimethylgallium, triethylgallium, triethylaluminum, trimethylindium, dimethylcadmium, and dimethylmercury.

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