Back contact battery and its manufacturing method, solar module

Abstract

This application discloses a back-contact battery and a solar module, relating to the technical field of photovoltaic power generation, which reduces the risk of hot spots in the back-contact battery and effectively suppresses leakage loss in the back-contact battery by providing a portion of the dielectric layer where leakage passages are not provided. The back-contact battery includes a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a dielectric layer. The first doped semiconductor layer is provided in a first region and a third region. The second doped semiconductor layer is provided in a second region and a third region. The doping types of the first and second doped semiconductor layers are opposite. In the third region, the first and second doped semiconductor layers are provided overlapping in the thickness direction of the semiconductor substrate to form a laminated structure. The dielectric layer is provided at least between the first and second doped semiconductor layers. Leakage passages are provided within the dielectric layer.

Description

Technical Field

[0001] This application relates to the technical field of photovoltaic power generation, and in particular, to back contact batteries, their manufacturing methods, and solar modules.

[0002] (Cross-reference to related applications) This application claims the priority of a Chinese patent application filed with the Chinese Patent Office on July 10, 2024, with an application number of 202410918523.8 and an application title of "Back Contact Battery and Solar Module", and the priority of a Chinese patent application filed with the Chinese Patent Office on July 10, 2024, with an application number of 202410918519.1 and an application title of "Back Contact Battery, Its Manufacturing Method, and Solar Module", and all of their contents are incorporated herein by reference.

Background Art

[0003] A back contact battery refers to a solar cell in which there are no electrodes on the light-receiving surface of the battery cell, and both the positive and negative electrodes are provided on the non-light-receiving surface side of the battery cell. By doing so, the shielding of the electrodes against the battery cell can be reduced, the short-circuit current of the battery cell can be increased, and the energy conversion efficiency of the battery cell can be improved.

[0004] When viewed from the back contact battery side, it is necessary to separate two doped semiconductor layers of opposite doping types included in the back contact battery so as to suppress the generation of forward leakage current and give the back contact battery a high photoelectric conversion efficiency in the forward voltage region. When viewed from the solar module side, when two doped semiconductor layers of opposite doping types included in the back contact battery in the solar module are separated, the resistance between them increases, so the corresponding reverse breakdown voltage increases, and the hot spot risk of the back contact battery increases. In the above situation, in conventional solar cells, the hot spot risk of the solar cell is reduced to a certain extent by a method of locally and electrically connecting two doped semiconductor layers of opposite doping types.

[0005] However, conventional back-contact batteries, which have a low risk of hot spots, do not offer desirable operating performance. [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] The object of this application is to provide a back contact battery, a method for manufacturing the same, and a solar module that enable good operating performance for the back contact battery by directly or indirectly connecting a portion of the first doped semiconductor layer and a portion of the second doped semiconductor layer of opposite doping types in a laminated structure via a leakage current passage provided in the dielectric layer, thereby providing the back contact battery with a low risk of hot spots, and by effectively reducing the direct transport recombination of carriers collected in the first doped semiconductor layer and the second doped semiconductor layer in the laminated structure by the portion of the dielectric layer where no leakage current passage is provided, thereby effectively suppressing leakage current loss in the back contact battery. [Means for solving the problem]

[0007] To achieve the above objective, in a first embodiment, this application provides a back-contact battery comprising a semiconductor substrate, a first doped semiconductor layer, a second doped semiconductor layer, and a dielectric layer. The semiconductor substrate comprises a first surface and a second surface facing each other. The first surface includes a first region and a second region distributed at intervals, and a third region located between the first region and the second region. A first doped semiconductor layer is provided in the first region and the third region. A second doped semiconductor layer is provided in the second region and the third region. Here, the first doped semiconductor layer and the second doped semiconductor layer have opposite doping types. In the third region, the first doped semiconductor layer and the second doped semiconductor layer are provided overlapping in the thickness direction of the semiconductor substrate to form a laminated structure. A dielectric layer is provided at least between the first doped semiconductor layer and the second doped semiconductor layer. At least one leakage path is provided within the dielectric layer.

[0008] In the back-contact battery provided in this application, in a third region, a first doped semiconductor layer and a second doped semiconductor layer with opposite doping types are arranged overlapping in the thickness direction of the semiconductor substrate to form a laminated structure. Next, the back-contact battery further includes a dielectric layer provided at least between the first doped semiconductor layer and the second doped semiconductor layer, the dielectric layer can realize a physical structural separation between the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure. At least one leakage path is provided within the dielectric layer, in which case electrical conduction can be directly or indirectly achieved between a partial region of the first doped semiconductor layer and a partial region of the second doped semiconductor layer in the laminated structure via the leakage path. Because the doping types of the first doped semiconductor layer and the second doped semiconductor layer are opposite, a butt joint with a low reverse dielectric breakdown voltage can be formed between the first doped semiconductor layer and the second doped semiconductor layer by creating a localized leakage point, thereby providing a high burnout prevention capability when the back-contact battery is shielded and helping to reduce the risk of hot spots in the back-contact battery.

[0009] Selectively, the thickness of the portion of the dielectric layer where the leakage current passage is not provided is 13 nm or more.

[0010] By making the dielectric layer thickness 13 nm or more, it is given electrical insulating or semi-insulating properties. As a result, the portion of the dielectric layer without leakage current passages electrically isolates the portion of the first doped semiconductor layer and the portion of the second doped semiconductor layer in the laminated structure, effectively reducing the direct transport recombination of carriers collected in the first and second doped semiconductor layers in the laminated structure. This effectively suppresses leakage current loss in the back-contact battery and provides it with good operating performance. As can be seen from the above, in the back-contact battery provided in this application, the insulating or semi-insulating properties of the portion of the dielectric layer without leakage current passages effectively suppress leakage current loss in the forward voltage region of the back-contact battery. At the same time, the leakage current passages provided in the dielectric layer enable controllability of leakage current, reducing the risk of hot spots in the back-contact battery. Simultaneously, it enables controllability of leakage current and electrical isolation, which helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back-contact battery. It is understandable that, due to the presence of leakage current pathways, the thickness of the dielectric layer may be less than 13 nm near these pathways. This is due to limitations of the conventional manufacturing process or other causes, and therefore, while it is not possible to achieve the desired state for certain parts of the dielectric layer in this application, it should be considered to be within the scope of protection of this application.

[0011] In one possible implementation, the first doped semiconductor layer and the second doped semiconductor layer are connected via a dielectric layer. In this case, if the leakage path does not penetrate the dielectric layer, the connection may be indirect via the dielectric layer. If the leakage path penetrates the dielectric layer, the first doped semiconductor layer and the second doped semiconductor layer may be directly connected. When a leakage path exists, forming a reverse leakage region in the portion corresponding to the leakage path (where this portion has electrical conductivity) helps to reduce the reverse dielectric breakdown voltage of the back contact battery and improve the burnout prevention capability of the back contact battery.

[0012] One possible implementation is that the thickness of the portion of the dielectric layer where the leakage path is provided is 7 nm or less. By reducing the thickness of the portion of the dielectric layer where the leakage path is provided, and keeping the thickness of the leakage path in the dielectric layer to 7 nm or less, leakage is achieved in the leakage path, giving the back contact battery the ability to prevent hot spots. Furthermore, by controlling the thickness of the portion of the dielectric layer where the leakage path is provided, the degree of leakage between the first doped semiconductor layer and the second doped semiconductor layer can be adjusted, thereby enabling the adjustment of leakage and electrical isolation, which helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back contact battery.

[0013] In one possible implementation, the dielectric layer is interrupted at the leakage path. The isolation effect of the dielectric layer between the portions of the first doped semiconductor layer and the second doped semiconductor layer corresponding to the leakage path is eliminated, and the conductivity resistance of those portions corresponding to the leakage path is reduced. At the same time, during the formation process of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, the portion of the dielectric layer corresponding to the leakage path helps to reduce the degree to which the diffusion of doped elements on one side away from the semiconductor substrate to the opposite side of the dielectric layer via the leakage path is inhibited. This increases the butt area of ​​the direct or indirect electrical connection regions of the first doped semiconductor layer and the second doped semiconductor layer, further reducing the reverse dielectric breakdown voltage of the back contact battery and further improving the ability to prevent burnout of the back contact battery in mounting environments with many shielding materials such as dust.

[0014] In real-world situations, to achieve the effect of optimizing and setting leakage current, two types of leakage paths (i.e., leakage paths that do not penetrate the dielectric layer and leakage paths that penetrate the dielectric layer) can be provided simultaneously in different parts of the dielectric layer and used in combination.

[0015] In one possible implementation, the butt surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer has an irregular shape.

[0016] Compared to cases where the butt surfaces in the connection region have a flat and regular shape, when the butt surfaces in the connection region have an irregular shape, the butt surfaces have uneven and undulating characteristics, which helps to increase the contact area between the first doped semiconductor layer and the second doped semiconductor layer in the connection region, that is, it helps to increase the junction area of ​​the butt joint, which in turn helps to further reduce the reverse dielectric breakdown voltage of the back contact battery and reduce the risk of hot spots in the back contact battery.

[0017] In one possible implementation, the abutting surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer forms an angle less than 90° with respect to the first surface of the semiconductor substrate.

[0018] When the thickness of one of the first and second doped semiconductor layers in a laminated structure that is closer to the semiconductor substrate is constant, compared to the case where the abutting surface of the connection region between the first and second doped semiconductor layers is perpendicular to the first surface, if the abutting surface of the connection region and the first surface form an angle smaller than 90°, the abutting surface is provided at an angle with respect to the first surface. This helps to provide a larger contact area in the connection region between the first and second doped semiconductor layers, further increasing the bonding area of ​​the abutting joint. This helps to further reduce the reverse dielectric breakdown voltage of the back-contact battery and reduce the risk of hot spots in the back-contact battery. Furthermore, when the abutting surfaces of the connection region are inclined with respect to the first surface, the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, one that is further away from the semiconductor substrate, more effectively covers the other that is closer to the semiconductor substrate. This prevents defects such as holes from occurring in the connection region on the layer further away from the semiconductor substrate, further contributing to improving the yield of back contact batteries.

[0019] As one possible implementation, the back contact battery further includes a third doped semiconductor portion located between the first doped semiconductor layer and the second doped semiconductor layer, and connected to the first doped semiconductor layer and the second doped semiconductor layer, respectively.

[0020] One possible realization is that the material of the third doped semiconductor portion contains at least one doping element. The doping type of the third doped semiconductor portion is the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, and the doping concentration of the doping element in the third doped semiconductor portion is smaller than the doping concentration of the doping element in one of the first doped semiconductor layer and the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion.

[0021] Taking the example that the doping type of the third doped semiconductor portion is the same as the doping type of the second doped semiconductor layer, when the doping concentration of the doped element in the third doped semiconductor portion is lower than the doping concentration of the doped element in the second doped semiconductor layer, a high-low junction with a doping concentration gradient can be formed between the third doped semiconductor portion and the second doped semiconductor layer in the direction approaching the second doped semiconductor layer from the first doped semiconductor layer. The built-in electric field effect of this high-low junction facilitates the transport and dispersion of leakage current, further reducing the reverse dielectric breakdown voltage of the back contact battery and improving the burnout prevention capability of the back contact battery.

[0022] In one possible implementation, a dielectric layer is provided between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer via a dielectric layer in which a leakage current passage is provided. In this case, by providing a dielectric layer, the electrical conductivity efficiency between the third doped semiconductor portion and at least one of the first doped semiconductor layer and the second doped semiconductor layer can be adjusted. For example, insulation or semi-insulation can be achieved through regions of the dielectric layer that do not have leakage paths, or the electrical conductivity efficiency can be controlled by setting the thickness of the dielectric layer. Furthermore, by providing leakage paths within the dielectric layer, local current conduction can be made easier. Moreover, by adjusting the number and size of leakage paths provided within the dielectric layer, the contact area and carrier transport efficiency of the connection region between at least one end of the third doped semiconductor portion and the first doped semiconductor layer (or second doped semiconductor layer) can be adjusted and controlled. This helps to adjust and control the leakage conditions of the reverse leakage region on the sides of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure. Furthermore, it helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back-contact battery, preventing hot spots and ensuring that battery efficiency losses are small, and ultimately, no losses occur.

[0023] In one possible realization, a dielectric layer is provided between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer via a dielectric layer in which a leakage current passage is provided, in which case at least one type of group IIIA doping element and at least one type of group VA doping element are doped in the portion of the third doped semiconductor portion adjacent to the dielectric layer, that is, two types of doping elements such as P-type and N-type are doped in the portion of the third doped semiconductor portion adjacent to the dielectric layer.

[0024] When other elements remain unchanged, compared with the case where only one of the dopant elements of Group IIIA or Group VA is doped in the portion of the third doped semiconductor part close to the dielectric layer, when two groups of dopant elements such as the dopant element of Group IIIA and the dopant element of Group VA are doped in the portion of the third doped semiconductor part close to the dielectric layer, since the doping types of the two types of dopant elements such as P-type and N-type are opposite, the dopant elements of the two doping types recombine in the third doped semiconductor part, resulting in a weakened self-conductivity. Furthermore, by adjusting the doping concentration of the other dopant element of Group IIIA or Group VA in the dielectric layer, the control of the electrical conduction efficiency is realized, which is further helpful for balancing the corresponding reverse breakdown voltage and operating efficiency of the back contact battery.

[0025] As a possible implementation form, the mating surface of the connection region between the third doped semiconductor part and the first doped semiconductor layer and / or the mating surface of the connection region between the third doped semiconductor part and the second doped semiconductor layer has an irregular shape. Regarding the application principle of the beneficial effect in this case, reference can be made to the application principle of the beneficial effect when the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer has an irregular shape as described above, and the detailed description is omitted here.

[0026] As a possible implementation form, the mating surface of the connection region between the third doped semiconductor part and the first doped semiconductor layer and / or the mating surface of the connection region between the third doped semiconductor part and the second doped semiconductor layer forms an angle smaller than 90° with respect to the first surface of the semiconductor substrate. Regarding the application principle of the beneficial effect in this case, reference can be made to the application principle of the beneficial effect when the mating surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer forms an angle smaller than 9° with respect to the first surface of the semiconductor substrate as described above, and the detailed description is omitted here.

[0027] As a possible implementation form, the size of the crystal particles in the third doped semiconductor part is smaller than the size of the crystal particles in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. As can be understood, in actual situations, even crystal particles in the same region do not have the same size, and it is impossible to guarantee that any crystal particle satisfies the above relationship. Therefore, when the sizes of most crystal particles in the third doped semiconductor part are smaller than the size of the crystal particles in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, it is considered that the size of the crystal particles in the third doped semiconductor part is smaller than the size of the crystal particles in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure.

[0028] When the above technical means are adopted, the smaller the crystal particles in the doped semiconductor layer, the more interfaces there are between the crystal particles in the doped semiconductor layer, and thus the resistance of the crystal particle boundary surface becomes larger. Based on this, if the sizes of all the crystal particles in the third doped semiconductor part are smaller than the size of the crystal particles in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, in this case, the resistance of the third doped semiconductor part is larger than the resistance of at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. This contributes to strengthening the function of regulating and controlling the carrier transport between the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure by the third doped semiconductor part. Therefore, by providing the third doped semiconductor part with small crystal particle sizes between the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, the exchange of carriers on both sides can be restricted, the passage of leakage current can be reduced, and the efficiency loss of the back contact battery can be prevented. In addition, a part of the leakage current can be consumed and a part of the leakage current can be allowed to pass through, realizing the function of preventing hot spots.

[0029] One possible implementation is that the average size of the crystal grains in the third doped semiconductor layer is smaller than the average size of the crystal grains in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. For the principle of application of the beneficial effect in this case, refer to the principle of application of the beneficial effect when the size of the crystal grains in the third doped semiconductor layer is smaller than the size of the crystal grains in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, as described above, and a detailed explanation is omitted here.

[0030] One possible implementation is that the crystallinity of the third doped semiconductor portion is smaller than the crystallinity of at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure. For the principle of application of the beneficial effect in this case, refer to the principle of application of the beneficial effect when the size of the crystal grains in the third doped semiconductor portion is smaller than the size of the crystal grains in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, as described above, and a detailed explanation is omitted here.

[0031] As one possible realization, in a stacked structure, if one of the first and second doped semiconductor layers, which is closer to the semiconductor substrate, is the first doped semiconductor layer, then in the direction from the second surface toward the first surface, the surface of the third region is higher than the surface of the second region, and the dielectric layer extends further between the sidewall where the third region transitions to the second region and the second doped semiconductor layer. Alternatively, in a stacked structure, if one of the first and second doped semiconductor layers, which is closer to the semiconductor substrate, is the second doped semiconductor layer, then in the direction from the second surface toward the first surface, the surface of the third region is higher than the surface of the first region, and the dielectric layer extends further between the sidewall where the third region extends into the first region and the first doped semiconductor layer.

[0032] In a laminated structure, if one of the first and second doped semiconductor layers, which is closer to the semiconductor substrate, is the first doped semiconductor layer, and the surface of the third region is higher than the surface of the second region in the direction from the second surface to the first surface, then the second doped semiconductor layer extends from the surface of the second region through the sidewall transitioning from the third region to the second region to the portion corresponding to the third region of the first doped semiconductor layer. Based on this, if the dielectric layer further extends at least between the sidewall transitioning from the third region to the second region and the second doped semiconductor layer, the portion of the dielectric layer extending to the sidewall transitioning from the third region to the second region ensures sufficient coverage of the irregularly doped butt joint region of the dielectric layer. This ensures that the back-contact battery can effectively adjust and control leakage loss between the first and second doped semiconductor layers in the laminated structure when there is a small amount of dust or other shielding in its mounting environment, and further helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back-contact battery. Furthermore, the portion of the dielectric layer extending at least to the sidewall transitioning from the third region to the second region helps to passivate the portion of the semiconductor substrate corresponding to the boundary between the second and third regions, thereby further improving the operating performance of the back-contact battery. In addition, regarding the beneficial effects when, of the first and second doped semiconductor layers included in the stacked structure, the one closer to the semiconductor substrate is the second doped semiconductor layer, and the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface, and the dielectric layer further extends between the sidewall of the third region extending to the first region and the first doped semiconductor layer, please refer to the above, and a detailed explanation will be omitted here.

[0033] One possible implementation is that the size of the leakage path is 12 nm or larger, and / or the size of the leakage path is less than or equal to the thickness of one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is closer to the semiconductor substrate.

[0034] When the size of the leakage path is 12 nm or larger, it is possible to prevent the decrease in the reverse dielectric breakdown voltage of the back contact battery from being small due to the small size of the leakage path, thereby ensuring a low hot spot risk for the back contact battery. Furthermore, when the size of the leakage path is less than or equal to the thickness of one of the first doped semiconductor layers and the second doped semiconductor layer included in the multilayer structure that is closer to the semiconductor substrate, it is possible to prevent the entire area of ​​the side wall of the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure that is closer to the semiconductor substrate from being exposed through the leakage path, thereby controlling the butt area of ​​the connection region between the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure, which helps to ensure low leakage loss in the forward voltage region of the back contact battery.

[0035] As one possible implementation, a dielectric layer is provided between a portion of the first doped semiconductor layer and a first region included in the first surface, and at least one leakage path is provided within the portion of the dielectric layer corresponding to the first region. And / or, a dielectric layer is provided between a portion of the second doped semiconductor layer and a second region included in the first surface, and at least one leakage path is provided within the portion of the dielectric layer corresponding to the second region. By providing a dielectric layer between a portion of the first doped semiconductor layer and the first region, and / or between a portion of the second doped semiconductor layer and the second region, the first region and / or the second region are passivated, and at the same time, they can collect carriers in the semiconductor substrate through the leakage path provided in the dielectric layer, thereby achieving carrier regulation control and optimizing battery performance.

[0036] As one possible realization, if L1 is the straight-line distance between different leakage paths provided in the portion of the dielectric layer located between the first doped semiconductor layer and the second doped semiconductor layer, and L2 is the straight-line distance between different leakage paths provided in the portion of the dielectric layer located between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, then L1 > L2. And / or, if A is the size of the leakage path provided in the portion of the dielectric layer located between the first doped semiconductor layer and the second doped semiconductor layer, and B is the size of the leakage path provided in the portion of the dielectric layer located between the first doped semiconductor layer and the first surface, or between the second doped semiconductor layer and the first surface, then A > B.

[0037] When the back-contact battery is in the forward voltage region, the portion of the first doped semiconductor layer corresponding to the first region and the portion of the second doped semiconductor layer corresponding to the second region need to collect and extract carriers of the corresponding conductivity type generated after the semiconductor substrate absorbs photons, thereby forming a photocurrent. Based on this, the carrier transport capacity of the portion of the first doped semiconductor layer corresponding to the first region and the portion of the second doped semiconductor layer corresponding to the second region affects the operating efficiency of the back-contact battery. Furthermore, when the back-contact battery is shielded, a reverse leakage current region is formed at the connection point between the first doped semiconductor layer and the second doped semiconductor layer in the third region, making it easier to extract leakage current and reducing the risk of hot spots. In the above case, if the linear distance L1 between different leakage current paths provided in the portion of the dielectric layer located between the first doped semiconductor layer and the second doped semiconductor layer is larger, it helps to make the density of local leakage current points between the first doped semiconductor layer and the second doped semiconductor layer sparser, making it easier to control the magnitude of leakage current and to give the back-contact battery high operating efficiency. On the other hand, this helps to further disperse leakage current and heat-generating points, preventing localized heat accumulation and burnout problems, and further improving the burnout prevention capability of the back-contact battery. When the linear distance L2 of different leakage paths provided in the portion of the dielectric layer located between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, is smaller, providing more carrier transport paths between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, improves the carrier collection capability of the first doped semiconductor layer or the second doped semiconductor layer, reduces carrier recombination losses, and further improves the operating efficiency of the back-contact battery. Furthermore, the beneficial effects when the size A of the leakage path provided in the portion of the dielectric layer located between the first doped semiconductor layer and the second doped semiconductor layer is larger than the size B of the leakage path provided in the portion of the dielectric layer located between the first doped semiconductor layer and the first surface, or between the second doped semiconductor layer and the first surface, can be found in the above description, and a detailed explanation is omitted here.

[0038] As one possible implementation, the back-contact battery further includes a first electrode electrically connected to a first doped semiconductor layer and a second electrode electrically connected to a second doped semiconductor layer.

[0039] As one possible implementation, in a laminated structure, one of the first and second doped semiconductor layers included in the laminated structure, the one closer to the semiconductor substrate, has a top surface away from the semiconductor substrate, a bottom surface close to the semiconductor substrate, and a side surface connecting the bottom surface and the top surface. The other of the first and second doped semiconductor layers included in the laminated structure, the one farther from the semiconductor substrate, covers a portion of the top surface and a portion of the side surface of the one closer to the semiconductor substrate. The dielectric layer comprises a first dielectric portion and a second dielectric portion. The first dielectric portion is provided between the other portion farther from the semiconductor substrate and the top surface close to the semiconductor substrate. The second dielectric portion is provided between the other portion farther from the semiconductor substrate and the side surface close to the semiconductor substrate.

[0040] The dielectric layer can not only adjust and control the leakage current between the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure in the thickness direction of the semiconductor substrate, but also adjust and control the leakage current between the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure in the direction parallel to the first plane, ensuring that both the reverse dielectric breakdown voltage and leakage loss of the back contact battery meet the operating requirements. Furthermore, when the first dielectric portion is provided between one side of the semiconductor substrate that is far from it and one side that is close to it, and the second dielectric portion is provided between one side of the semiconductor substrate that is far from it and one side that is close to it, there is a non-zero angle between the extending directions of the first and second dielectric portions. By adjusting the size of this angle, the spacing between the second dielectric portion and the adjacent structure can be adjusted, thereby controlling the extending range over which one of the first and second doped semiconductor layers included in the laminated structure, which is far from the semiconductor substrate, can extend to the one that is close to the semiconductor substrate via a leakage current path. In addition, the size of the abutting area of ​​the connection region between the first and second doped semiconductor layers can be adjusted, which helps to balance the operating efficiency and reverse dielectric breakdown voltage of the back contact battery.

[0041] One possible implementation is that at least one leakage path is located within the first dielectric part, and / or at least one leakage path is located within the second dielectric part, and / or at least one leakage path is located between the first dielectric part and the second dielectric part.

[0042] The location of the leakage path in the dielectric layer offers a variety of possible implementations, which not only improves the applicability of the back-contact battery provided in this application to different use cases, but also eliminates the need to strictly control manufacturing precision or add extra operating steps to form the leakage path at a specific location, thereby reducing the manufacturing difficulty of the back-contact battery and simplifying the manufacturing procedure for the back-contact battery.

[0043] As one possible implementation, the dielectric layer material may be an insulating material, or may include both an insulating material and a semiconductor material. The dielectric layer material may be a simple insulating material, or it may include both an insulating material and a semiconductor material, which can reduce the difficulty of manufacturing the dielectric layer while improving the applicability of the back contact battery to different use cases.

[0044] As one possible implementation, the dielectric layer material contains oxygen and / or silicon.

[0045] When the above technical means are adopted, there are many types of oxygen-containing insulating materials, such as silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, or hafnium oxide. Therefore, when the dielectric layer material contains oxygen, the applicability to different use cases of the back-contact battery provided in this application can be improved. Furthermore, since oxygen-containing insulating materials generally have a high dielectric constant, the dielectric layer will have high insulating or semi-insulating properties, further reducing direct transport recombination of carriers collected in the first doped semiconductor layer and the second doped semiconductor layer in the laminated structure, which helps to ensure high photoelectric conversion efficiency of the back-contact battery. In addition, when the dielectric layer material contains silicon, the compatibility between the dielectric layer and the first doped semiconductor layer and the second doped semiconductor layer, respectively, can be improved, further improving the operating performance of the back-contact battery.

[0046] As one possible implementation, when the dielectric layer material includes both insulating and semiconductor materials, the type of semiconductor material in the dielectric layer is the same as the type of semiconductor material in the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, specifically the one closer to the semiconductor substrate.

[0047] When the above technical means are adopted, in the thickness direction of the semiconductor substrate, the dielectric layer covers at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure that is closer to the semiconductor substrate. Based on this, in the actual manufacturing process, if the type of semiconductor material in the dielectric layer is the same as the type of semiconductor material in one of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure that is closer to the semiconductor substrate, then selective etching of the entire first doped semiconductor layer or the entire second doped semiconductor layer by the masking effect of the insulating material included in the dielectric layer will not completely remove the portion of the first doped semiconductor layer or the second doped semiconductor layer that is close to the insulating material. In this case, the etching agent will not completely remove the portion of the first doped semiconductor layer or the second doped semiconductor layer that is close to the insulating material. Because the corresponding etching time of the etching agent is relatively short, the influence of the etching agent on the dielectric layer is reduced, ensuring that the size of the leakage current passage opened in the dielectric layer is not too large, further improving the degree of leakage current loss adjustment control by the dielectric layer, and further improving the operating efficiency of the back contact battery.

[0048] Selectively, the portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate is the first dielectric portion. In the dielectric layer, at least one leakage current passage is provided within the first dielectric portion. In the third region, in the direction from the first region toward the second region, the width of the first dielectric portion is greater than or equal to the width of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, but further away from the semiconductor substrate.

[0049] The dielectric layer included in the back contact battery includes a first dielectric portion provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate. By providing a first dielectric portion whose width is greater than or equal to the width of one of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure that is furthest from the semiconductor substrate, it is possible to regulate and control the electrical transport between the first doped semiconductor layer and the second doped semiconductor layer included in the laminated region. At least one leakage current passage is provided within the first dielectric portion, and in this case, electrical conduction can be directly or indirectly achieved between a partial region of the first doped semiconductor layer and a partial region of the second doped semiconductor layer in the laminated structure via this leakage current passage. Because the doping types of the first doped semiconductor layer and the second doped semiconductor layer are opposite, a butt joint with a low reverse dielectric breakdown voltage can be formed between the first doped semiconductor layer and the second doped semiconductor layer by creating a localized leakage current point. This provides a high burnout prevention capability when the back contact battery is shielded, and helps to reduce the risk of hot spots in the back contact battery. Furthermore, in the dielectric layer, a leakage current passage is provided within the first dielectric portion, and the first doped semiconductor layer and the second doped semiconductor layer included in the stacked region have a surface morphology that is almost parallel to the first surface. Since this surface morphology is simpler than the surface morphology of the sides of the first doped semiconductor layer and the second doped semiconductor layer, when providing a leakage current passage in the first dielectric portion, it is not limited by structural complexity, and only the pattern or installation position of the corresponding leakage current passage needs to be adjusted, without the need to consider other factors. For example, when creating a leakage current passage by etching, it may be necessary to adjust the etching angle separately from general etching. This reduces the difficulty of creating a leakage current passage in the dielectric layer using processes such as laser etching, thereby reducing the difficulty of manufacturing back contact batteries, and also improves the compatibility of the back contact battery manufacturing procedure provided in this application with general back contact battery manufacturing processes, thus contributing to the improvement of back contact battery manufacturing methods.

[0050] Furthermore, the dielectric layer can achieve physical separation, and by selecting a functional layer having electrical insulating or semi-insulating properties, it is possible to control the electrical transport between the first doped semiconductor layer and the second doped semiconductor layer in the stacked region. Therefore, the portion of the dielectric layer where no leakage current passage is provided electrically isolates the portion of the first doped semiconductor layer and the portion of the second doped semiconductor layer in the stacked structure, effectively reducing the direct transport recombination of carriers collected in the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure. This effectively suppresses leakage current loss in the back-contact battery and provides the back-contact battery with good operating performance. As can be seen from the above, in the back-contact battery provided in this application, the risk of hot spots in the back-contact battery is reduced via the leakage current passage provided in the dielectric layer, and leakage current loss in the forward voltage region of the back-contact battery can be effectively suppressed by the insulating properties of the portion of the dielectric layer where no leakage current passage is provided. Furthermore, in the dielectric layer, compared to creating leakage pathways in the first doped semiconductor layer and the second doped semiconductor layer within the laminated structure at corresponding positions on one side close to the semiconductor substrate using an etching process, creating leakage pathways only within the first dielectric portion located between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate is less difficult, more precise, and facilitates accurate adjustment and control of leakage and insulation, which helps in adjusting the back contact battery to balance the corresponding reverse dielectric breakdown voltage and operating efficiency.

[0051] One possible implementation is that in a single laminated structure, leakage paths are continuously distributed along the extending direction of the laminated structure. In this case, the butt area of ​​the electrical connection region via the leakage paths between the first doped semiconductor layer and the second doped semiconductor layer is increased, the area occupancy ratio of the reverse leakage region on the first surface is increased, and further the ability to prevent burnout of the back contact battery is improved.

[0052] One possible implementation is to provide multiple spaced leakage current pathways within a first dielectric section located in a single laminated structure. In this case, compared to the case where the leakage current pathways are continuously distributed, the spacing between adjacent leakage current pathways in the first dielectric section provides insulation or semi-insulation. Therefore, the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity types can be electrically isolated. Consequently, compared to continuously distributed leakage current pathways, providing multiple spaced leakage current pathways within a first dielectric section located in a single laminated structure reduces the butt area of ​​the electrical connection region between the first doped semiconductor layer and the second doped semiconductor layer via the leakage current pathways, reduces the area occupied by the first surface of the reverse leakage current region, and helps to further improve the operating performance of the back contact battery.

[0053] As one possible implementation, the total size of the leakage current pathways shall be between 50 μm and 200 μm.

[0054] When the back-contact battery provided in this application is implemented in an environment with few shielding objects, reducing the total size of the leakage pathways reduces the occupancy ratio between the first and second regions of the reverse leakage area, thereby further reducing leakage losses in the forward voltage region of the back-contact battery and helping to ensure high operating efficiency of the back-contact battery. When implemented in an environment with many shielding objects, increasing the total size of the leakage pathways increases the occupancy ratio between the first and second regions of the reverse leakage area, thereby reducing the reverse dielectric breakdown voltage of the back-contact battery and helping to ensure a low hot spot risk for the back-contact battery. However, if the total size of the leakage pathways is too large, it is prone to causing localized overheating, affecting the hot spot prevention effect, and this problem is particularly pronounced when there is only one leakage pathway. Therefore, controlling the total size of the leakage pathways within the above range contributes to improving the hot spot prevention capability of the back-contact battery. As can be seen from the above, the total size of the leakage pathways can be set according to different environmental requirements to improve the applicability of the back-contact battery provided in this application to different actual use cases.

[0055] As one possible implementation, to improve the applicability of the back-contact battery provided in this application to different actual use cases, multiple leakage current pathways are provided at intervals within the first dielectric portion located in a single stacked structure, with the size of at least one leakage current pathway being 5 μm or more and 80 μm or less. For the principle of application of the beneficial effect in this case, refer to the principle of application of the beneficial effect when the total size of the leakage current pathways is 50 μm or more and 200 μm or less, as described above, and a detailed explanation is omitted here. Furthermore, by reducing the size of a single leakage current pathway, overheating at a single point can be avoided, and the risk prevention capability of the back-contact battery can be enhanced. By providing multiple points, it is possible to ensure that the leakage current is distributed effectively and in a timely manner, thereby ensuring a low hot spot risk for the back-contact battery.

[0056] As one possible implementation, when multiple leakage current paths are provided within the first dielectric section, the distance between two adjacent leakage current paths shall be 1 μm or more and 200 μm or less.

[0057] When the size of the leakage path is constant, the distance between the geometric centers of two adjacent leakage paths is inversely proportional to the distribution density in the first dielectric portion of the leakage path. The distance between two adjacent leakage paths is also inversely proportional to the distribution density in the first dielectric portion of the leakage path. The distribution density in the first dielectric portion of the leakage path is approximately directly proportional to the leakage loss in the forward voltage region of the back contact battery and inversely proportional to the reverse dielectric breakdown voltage of the back contact battery. Based on this, when the back contact battery provided in this application is installed in an environment with little shielding such as bird droppings, leaves, or dust, increasing the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths can reduce the occupancy ratio between the first and second regions of the reverse leakage region. This helps to further reduce the leakage loss in the forward voltage region of the back contact battery and ensure high operating efficiency of the back contact battery. When the back-contact battery provided in this application is installed in an environment with many obstructions such as bird droppings, leaves, or dust, the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths can be kept within a small range, thereby increasing the occupancy ratio between the first and second regions of the reverse leakage area. This helps to reduce the reverse dielectric breakdown voltage of the back-contact battery and ensure a low hot spot risk for the back-contact battery. Furthermore, the distance between two adjacent heating points can also be controlled by controlling the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths. By adjusting the distance and distributing the heating points, overlapping heating points can be avoided, thus preventing localized overheating. As can be seen from the above, the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths can be set according to different environmental requirements to improve the applicability of the back-contact battery provided in this application to different actual use cases.

[0058] One possible implementation is that when multiple leakage current passages are provided within the first dielectric section, the distance between two adjacent leakage current passages is equal.

[0059] When the distance between two adjacent leakage paths is equal, the distance between adjacent leakage points between the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure is also equal. This helps to ensure a uniform distribution in the third region of the reverse leakage area, further contributing to the dispersion of the heat generation area. This prevents burnout problems caused by localized heat concentration in the back contact battery, further improving the burnout prevention capability of the back contact battery and effectively enhancing the safety of the back contact battery.

[0060] As one possible implementation, the minimum distance between the leakage path and the edge of the first dielectric part is set to 5 μm or more and 50 μm or less.

[0061] By defining a minimum spacing range, it is possible to avoid damage to the portion of the first doped semiconductor layer adjacent to the third region and / or the portion of the second doped semiconductor layer adjacent to the third region provided in the second region during the leakage path fabrication process, due to the leakage path being too close to the edge of the first dielectric portion, thereby affecting carrier collection and further impacting battery efficiency. It is also possible to prevent the distribution density of the leakage path in the first dielectric portion from becoming low due to a large minimum spacing, ensuring that the reverse leakage region occupies a predetermined proportion of the third region and securing a low hot spot risk for the back contact battery.

[0062] As one possible implementation, in the third region, the width of the first dielectric portion in the direction from the first region to the second region is set to 10 μm or more and 200 μm or less.

[0063] When the distribution density in the first dielectric portion of the leakage current path is constant, the width of the first dielectric portion and the occupancy ratio on the first surface side of the reverse leakage current region are directly proportional. Based on this, the width of the first dielectric portion can be set according to different environmental demands, thereby enabling the back contact battery to have a lower hot spot risk in mounting environments with many shielding materials such as dust, or to have a lower leakage current loss in mounting environments with few shielding materials such as dust, thereby improving the applicability of the back contact battery provided in this application to different actual use cases. Furthermore, by keeping the width of the first dielectric portion within the above range, it is possible to prevent the difficulty of selectively etching the dielectric material due to the narrow width of the first dielectric portion from increasing, which helps to reduce the difficulty of manufacturing the back contact battery.

[0064] As one possible implementation, the back contact battery further includes a first electrode electrically connected to a first doped semiconductor layer and a second electrode electrically connected to a second doped semiconductor layer, wherein the minimum distance between at least one of the first electrode and the second electrode and a leakage path provided in the first dielectric portion is 30 μm or more and 300 μm or less.

[0065] To prevent the first and second electrodes from coming into contact with a leakage current area and causing a short circuit, which would affect the operating efficiency of the back-contact battery, a predetermined distance must be maintained between at least one of the first and second electrodes and the leakage current path adjacent to it.

[0066] In one possible implementation, the first dielectric layer penetrates through at least one leakage path. In this case, the isolation effect of the dielectric layer between the portions of the first doped semiconductor layer and the second doped semiconductor layer corresponding to the leakage paths is eliminated, and the conductivity resistance of those portions corresponding to the leakage paths decreases. At the same time, when forming the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, the portion of the dielectric layer corresponding to the leakage path helps to reduce the degree to which the diffusion of dopants on one side away from the semiconductor substrate to the opposite side of the dielectric layer via the leakage path is inhibited. This increases the butt area of ​​the direct or indirect electrical connection regions of the first doped semiconductor layer and the second doped semiconductor layer, further reducing the reverse dielectric breakdown voltage of the back contact battery and further improving the ability to prevent burnout of the back contact battery in mounting environments with many shielding materials such as dust.

[0067] As one possible implementation, if H1 is the thickness of the portion of the first dielectric part corresponding to at least one leakage path, and H2 is the thickness of the portion of the first dielectric part not corresponding to a leakage path, then the ratio of H1 to H2 is greater than 0 and less than or equal to 0.5.

[0068] In actual application, by removing a portion of the thickness of the area corresponding to the leakage path in the first dielectric layer, the degree to which the portion of the dielectric layer corresponding to the leakage path inhibits the diffusion of dopants on one side away from the semiconductor substrate to the opposite side of the dielectric layer via the leakage path can be reduced. This reduces the risk of hot spots in the back-contact battery, controls the dopant diffusion range by the thickness of the portion of the first dielectric layer remaining in the leakage path, and further controls the butt area of ​​the direct or indirect electrical connection regions between the first doped semiconductor layer and the second doped semiconductor layer. Finally, it is possible to adjust and control the reverse dielectric breakdown voltage and leakage loss of the back-contact battery, thereby improving the applicability of the back-contact battery provided in this application to different use cases.

[0069] One possible implementation is that the density of the portion of the first dielectric layer corresponding to the leakage path is smaller than the density of the rest of the first dielectric layer. In this case, another example of the installation configuration of the first dielectric layer in the leakage path can be provided. In this case, the density of the portion of the first dielectric layer corresponding to the leakage path is small, and because the density of the portion of the first dielectric layer corresponding to the leakage path is low, the degree to which the portion of the dielectric layer corresponding to the leakage path inhibits the diffusion of dopants on one side away from the semiconductor substrate to the opposite side of the dielectric layer via the leakage path is reduced, thereby reducing the risk of hot spots in back-contact batteries.

[0070] One possible implementation is that, when one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure is the first doped semiconductor layer, at least a portion of the first region and the third region constitute a rectangular region, or when one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure is the second doped semiconductor layer, at least a portion of the second region and the third region constitute a rectangular region.

[0071] Here, one rectangular region has at least two first sides extending in a first direction. One rectangular region has at least two second sides extending in a second direction. The first direction is parallel to the direction of the long side extension of the rectangular region, and the second direction is parallel to the direction of the short side extension of the rectangular region. In one rectangular region, at least one second side adjacent to the first side forms the vertex angle of the rectangular region.

[0072] In one possible realization, when one rectangular region has at least two first sides extending in a first direction, and one rectangular region has at least two second sides extending in a second direction, and in one rectangular region at least two second sides adjacent to a first side form a vertex angle of the rectangular region, the leakage path includes at least one first leakage path provided on at least one first side of the rectangular region along the first direction, and / or the leakage path includes at least one second leakage path provided on at least one second side of the rectangular region along the second direction.

[0073] In one possible implementation, when one rectangular region has at least two first sides extending in a first direction, and one rectangular region has at least two second sides extending in a second direction, and in one rectangular region at least two second sides adjacent to the first side form a vertex angle of the rectangular region, the leakage path includes at least one third leakage path provided at at least one vertex angle of the rectangular region.

[0074] When the above technical means are adopted, there are at least three selectable installation locations for the leakage path within the rectangular area, which not only helps to improve the applicability of the back contact battery provided in this application to different use cases, but also eliminates the need to strictly control manufacturing precision or add additional operating steps to form the leakage path at a specific location, thereby reducing the difficulty of manufacturing the back contact battery and simplifying the manufacturing procedure for the back contact battery.

[0075] In one possible implementation, the leakage path includes at least one first leakage path, at least one second leakage path, and at least one third leakage path, wherein the cross-sectional area of ​​the third leakage path along the direction parallel to the first surface is greater than the cross-sectional area of ​​the first leakage path and / or the second leakage path along the direction parallel to the first surface.

[0076] The distance between the electrode and the vertex angle of the rectangular region is larger than the distance between the electrode and the long side of the rectangular region, and the distance between the electrode and the short side of the rectangular region. In this case, a third leakage passage with a large cross-sectional area along the direction parallel to the first surface can be provided. In other words, the cross-sectional area of ​​the third leakage passage along the direction parallel to the first surface may be larger than the cross-sectional area of ​​the first leakage passage and / or the second leakage passage along the direction parallel to the first surface. In this case, a leakage passage with a large cross-sectional area can be provided in a wide laminated structure, ensuring a low reverse dielectric breakdown voltage of the back contact battery. At the same time, it becomes unnecessary to provide a first leakage passage and / or a second leakage passage with a large cross-sectional area at the spacing to increase the occupancy ratio of the reverse leakage region on the first surface side, thereby reducing process difficulty and improving the yield of the back contact battery.

[0077] One possible implementation is that a third domain is established between each domain of the first domain and each domain of the second domain.

[0078] Compared to the case where the third region is provided between only a portion of the first region and only a portion of the second region, the extended length of the laminated structure provided in the third region is longer, which helps to increase the installation area of ​​the leakage path in the laminated structure, increases the butt area of ​​the electrical connection area via the leakage path between the first doped semiconductor layer and the second doped semiconductor layer, increases the area occupancy ratio of the reverse leakage area on the first surface, and further improves the burnout prevention capability of the back contact battery.

[0079] In one possible implementation, the first surface further includes a fourth region located between the first and second regions. The third region is provided between only a portion of the first region and only a portion of the second region, and the fourth and third regions do not overlap with each other. Compared to the case where the third region is provided between each region of the first region and each region of the second region, the extension length of the laminated structure provided in the third region is shorter, which helps to reduce the installation area of ​​the leakage path in the laminated structure, reduces the butt area of ​​the electrical connection area via the leakage path between the first doped semiconductor layer and the second doped semiconductor layer, reduces the area occupied by the reverse leakage region on the first surface, and helps to further improve the operating performance of the back contact battery.

[0080] As one possible implementation, the dielectric layer further includes a second dielectric portion provided between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first surface. In this case, the presence of the second dielectric portion allows the first doped semiconductor layer and the second doped semiconductor layer to be separated in a direction parallel to the first surface, further reducing leakage loss between the first doped semiconductor layer and the second doped semiconductor layer, and improving the operating efficiency of the back contact battery in mounting environments with little shielding such as dust or bird droppings.

[0081] As one possible implementation, the back-contact battery further includes a first interface passivation layer. The first interface passivation layer is provided at least between the first doped semiconductor layer and the semiconductor substrate. The passivation contact structure consisting of the first interface passivation layer and the first doped semiconductor layer has an excellent interface passivation effect, enables selective carrier collection, reduces the carrier recombination rate in at least the first region of the first surface, and can further improve the photoelectric conversion efficiency of the back-contact battery.

[0082] As one possible implementation, the back-contact battery further includes a second interface passivation layer. The second interface passivation layer is provided at least between the second doped semiconductor layer and the semiconductor substrate. The passivation contact structure, consisting of the second interface passivation layer and the portion located in the second region of the second doped semiconductor layer, enables selective carrier collection and can reduce the carrier recombination rate in the second region of the first surface.

[0083] As one possible realization, in the stacked structure, if one of the first doped semiconductor layer and the second doped semiconductor layer, which is further away from the semiconductor substrate, is the first doped semiconductor layer, then in the third region, in the direction from the first region toward the second region, the width of the first interface passivation layer is smaller than the width of the first doped semiconductor layer. Alternatively, if one of the first doped semiconductor layer and the second doped semiconductor layer, which is further away from the semiconductor substrate, is the second doped semiconductor layer, then in the third region, in the direction from the first region toward the second region, the width of the second interface passivation layer is smaller than the width of the second doped semiconductor layer.

[0084] If, among the first and second doped semiconductor layers in the stacked structure, the width of one of the layers furthest from the semiconductor substrate is greater than the width of its corresponding interface passivation layer, then in the third region, there is no corresponding interface passivation layer between the portions of the first and second doped semiconductor layers corresponding to the leakage current pathways. This helps to reduce the conduction resistance between them, which in turn helps to further reduce the reverse dielectric breakdown voltage of the back-contact battery.

[0085] In a second embodiment, the application provides a solar module including a battery string and a package layer. The battery string is made up of multiple back-contact batteries connected together, as provided in the first embodiment and various implementations thereof. The package layer is for covering the surface of the battery string.

[0086] The beneficial effects of the second aspect and its various realizations in this application can be found by referring to the analysis of the beneficial effects of the first aspect and its various realizations, and a detailed explanation is omitted here.

[0087] In a third embodiment, the present application provides a method for manufacturing a back-contact battery, comprising the following steps: First, a semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface. The first surface includes a first region and a second region distributed at intervals, and a third region located between the first region and the second region. Next, a first doped semiconductor layer is formed in the first region and the third region. Next, a dielectric layer is formed in at least the portion of the first doped semiconductor layer corresponding to the third region. Next, a second doped semiconductor layer is formed in the second region and the third region. Here, the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. In the third region, the first doped semiconductor layer and the second doped semiconductor layer are provided overlapping in the thickness direction of the semiconductor substrate to form a laminated structure. Here, at least one leakage path is provided in the dielectric layer.

[0088] In one possible implementation, the portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate is the first dielectric portion. In the dielectric layer, at least one leakage current passage is provided within the first dielectric portion. In the third region, in the direction from the first region toward the second region, the width of the first dielectric portion is greater than or equal to the width of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, which are furthest from the semiconductor substrate.

[0089] One possible implementation is to create a leakage current path within the first dielectric portion using a laser etching process.

[0090] For the beneficial effects of the third aspect and its various realizations in this application, refer to the analysis of the beneficial effects of the first aspect and its various realizations; a detailed explanation is omitted here. [Brief explanation of the drawing]

[0091] The drawings described herein are intended to further illustrate this application and to constitute part of it, and the exemplary embodiments and descriptions herein are for interpretation purposes only and are not intended to improperly limit this application.

[0092] [Figure 1] This is a schematic diagram 1 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 2] This is a schematic diagram 2 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 3] This is a schematic diagram 3 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 4] This is schematic diagram 4 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 5] Figure 5 is a schematic diagram of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 6] This is a schematic diagram 6 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 7] This is a schematic diagram 7 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 8] This is a schematic diagram 8 of the longitudinal structure of the back contact battery provided in the first set of embodiments of this application. [Figure 9] Figure 1 shows a schematic top view of one side of the first doped semiconductor layer and the second doped semiconductor layer of the back contact battery provided in the embodiment of this application. [Figure 10] Figure 2 shows a schematic top view of one side of the first doped semiconductor layer and the second doped semiconductor layer of the back contact battery provided in the embodiment of this application. [Figure 11] Figure 3 shows a schematic top view of one side of the first doped semiconductor layer and the second doped semiconductor layer of the back contact battery provided in the first set of embodiments of this application. [Figure 12] Figure 4 shows a schematic top view of one side of the first doped semiconductor layer and the second doped semiconductor layer of the back contact battery provided in the first set of embodiments of this application. [Figure 13] Figure 5 shows a schematic top view of one side of the first doped semiconductor layer and the second doped semiconductor layer of the back contact battery provided in the first set of embodiments of this application. [Figure 14] This is SEM diagram 1 of the structure in a stacked structure of the back contact battery provided in the first set of embodiments of this application. [Figure 15] This is SEM diagram 2 of the stacked structure of the back-contact battery provided in the first set of embodiments of this application (the approximate location of the dielectric layer is enclosed by a dashed line in the figure). [Figure 16] This is an SEM diagram 3 of the structure in a stacked structure of the back contact battery provided in the first set of embodiments of this application. [Figure 17] This is a schematic longitudinal cross-sectional view of the first structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 18] This is a schematic longitudinal cross-sectional view of a second structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 19] This is a schematic longitudinal cross-sectional view of a third structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 20] This is a schematic longitudinal cross-sectional view of a fourth structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 21] This is a schematic longitudinal cross-sectional view of a fifth structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 22]This is a schematic longitudinal cross-sectional view of a sixth structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 23] This is a schematic longitudinal cross-sectional view of a seventh structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 24] This is a schematic longitudinal cross-sectional view of an eighth structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 25] This is a schematic longitudinal cross-sectional view of a ninth structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 26] This is a schematic longitudinal cross-sectional view of a tenth structure of a back-contact battery provided in the second set of embodiments of this application. [Figure 27] This is a schematic diagram 1 of possible distribution locations of leakage current paths in a local region on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 28] This is a schematic diagram 2 of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 29] This is a schematic diagram 3 of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 30] Figure 4 is a schematic diagram of possible distribution locations of leakage current paths in a local region on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 31] Figure 5 is a schematic diagram of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 32] Figure 6 is a schematic diagram of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 33] This is a schematic diagram 7 of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 34]This is a schematic diagram 8 of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Figure 35] This is a schematic diagram 9 of possible distribution locations of leakage current paths in a local area on the first surface side of a back-contact battery provided in the second set of embodiments of this application. [Modes for carrying out the invention]

[0093] Embodiments of this application will be described below with reference to the drawings. However, it should be understood that these descriptions are illustrative only and do not limit the scope of this application. In addition, in the following description, explanations of known structures and technologies will be omitted to avoid unnecessary confusion with the concepts of this application.

[0094] The drawings show various schematic diagrams of structures according to embodiments of this application. These drawings are not drawn proportionally, and some details may be enlarged and some details omitted for clarity. The shapes of the various regions and layers shown in the drawings, and their relative sizes and positions, are illustrative only and may vary in reality due to manufacturing tolerances and technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0095] In the context of this application, when one layer / element is described as being located "above" another layer / element, this layer / element may be located directly above this other layer / element, or an intermediate layer / element may exist between them. Also, if one layer / element is located "above" another layer / element in a certain orientation, then by changing the orientation, that layer / element may be located "below" the other layer / element. To further clarify the technical problem, technical solution and beneficial effects that this application seeks to solve, the application will be described in more detail below in combination with drawings and embodiments. It should be understood that the specific embodiments described herein are for interpretive purposes only and are not intended to limit this application.

[0096] Furthermore, the terms “first” and “second” are used solely for descriptive purposes and should not be understood as indicating or implying relative importance or the quantity of the indicated technical feature. Accordingly, features designated as “first” or “second” may be explicitly or implicitly defined as including one or more such features. In the description of this application, unless explicitly and specifically limited, “multiple” means two or more.

[0097] In the description of this application, unless otherwise explicitly defined or limited, the terms “attach,” “connect,” and “join” should be understood in a broad sense. For example, a connection may be fixed, detachable, integral, mechanical, electrically, directly, indirectly via an intermediate medium, or it may be an internal communication between two elements or an interaction between two elements. Those skilled in the art will understand the specific meaning of the above terms in this application depending on the specific situation.

[0098] A back-contact battery refers to a solar cell in which there are no electrodes on the light-receiving surface of the battery cell, and both the positive and negative electrodes are located on the non-light-receiving side of the battery cell. This design reduces the shielding of the battery cell by the electrodes, increases the short-circuit current of the battery cell, and improves the energy conversion efficiency of the battery cell.

[0099] From the perspective of the back contact battery, it is necessary to separate the two oppositely doped semiconductor layers contained in the back contact battery in order to suppress the generation of forward leakage current and to give the back contact battery high photoelectric conversion efficiency in the forward voltage region. From the perspective of the solar module, if the two oppositely doped semiconductor layers contained in the back contact battery of the solar module are separated, the resistance between them increases, which increases the corresponding reverse dielectric breakdown voltage and increases the risk of hot spots in the back contact battery. In the above situation, conventional solar cells reduce the risk of hot spots in the solar cell to some extent by locally electrically connecting the two oppositely doped semiconductor layers.

[0100] In back-contact batteries, which have a low risk of hot spots, the overlapping portions of two oppositely doped semiconductor layers in the thickness direction of the semiconductor substrate come into electrical contact. This increases the leakage current in the forward voltage region of the back-contact battery, lowering its operating efficiency and ultimately degrading its performance.

[0101] To solve the above technical problems, in a first embodiment, the present invention provides a back-contact battery. As shown in Figures 1 and 17, the back-contact battery provided in the embodiment of the present invention includes a semiconductor substrate 11, a first doped semiconductor layer 12, a second doped semiconductor layer 13, and a dielectric layer 14. The semiconductor substrate 11 has opposing first and second surfaces. The first surface includes a first region 16 and a second region 17 distributed at intervals, and a third region 18 located between the first region 16 and the second region 17. The first doped semiconductor layer 12 is provided in the first region 16 and the third region 18. The second doped semiconductor layer 13 is provided in the second region 17 and the third region 18. Here, the first doped semiconductor layer 12 and the second doped semiconductor layer 13 have opposite doping types. In the third region 18, the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are provided overlapping in the thickness direction of the semiconductor substrate 11 to form a laminated structure. A dielectric layer 14 is provided at least between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. At least one leakage current passage 15 is provided within the dielectric layer 14.

[0102] As shown in Figure 1, in the back-contact battery provided in the embodiment of this application, a first doped semiconductor layer 12 and a second doped semiconductor layer 13 of opposite conductivity types (also called opposite doping types) are provided overlapping in the thickness direction of the semiconductor substrate 11 in the third region 18 to form a laminated structure. Next, the back-contact battery further includes a dielectric layer 14 provided at least between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, and at least one leakage current passage 15 is provided within the dielectric layer 14, in which case electrical conductivity can be achieved between a partial region of the first doped semiconductor layer 12 and a partial region of the second doped semiconductor layer 13 in the laminated structure via the leakage current passage 15. Because the doping types of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are opposite, a butt joint with a low reverse dielectric breakdown voltage can be formed between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 by creating a localized leakage point. This provides high burnout prevention capability when the back contact battery is shielded, and helps reduce the risk of hot spots in the back contact battery.

[0103] In the following, the first set of back contact batteries of the first embodiment of this application will be described with reference to Figures 1 to 16.

[0104] In the embodiments of this set, as shown in Figure 1, selectively, in the back contact battery provided in the embodiments of this application, the thickness of the dielectric layer 14 is 13 nm or more.

[0105] The dielectric layer 14 can achieve physical separation between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure, and by making the thickness of the dielectric layer 14 13 nm or more, it is given a certain degree of electrical insulation or semi-insulation properties. Therefore, the portion of the dielectric layer 14 in which the leakage path 15 is not provided achieves electrical isolation between a partial region of the first doped semiconductor layer 12 and a partial region of the second doped semiconductor layer 13 in the stacked structure, effectively reducing direct transport recombination of carriers collected in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the stacked structure, thereby effectively suppressing leakage loss in the back contact battery and providing the back contact battery with good operating performance. As can be seen from the above, in the back-contact battery provided in the embodiment of this application, the insulating or semi-insulating properties of the portion of the dielectric layer 14 where the leakage passage 15 is not provided effectively suppress leakage loss in the forward voltage region of the back-contact battery, and the leakage passage 15 provided in the dielectric layer 14 reduces the risk of hot spots in the back-contact battery, enabling regulating controllability of leakage and electrical isolation, and helping to adjust the corresponding reverse dielectric breakdown voltage and operating efficiency of the back-contact battery to be balanced.

[0106] In actual application processes, the embodiments of this application do not specifically limit the structure and materials of the semiconductor substrate, but are acceptable as long as they are applicable to the back-contact battery provided in the embodiments of this application.

[0107] A semiconductor substrate may be a semiconductor substrate on which no structure is formed. Alternatively, a semiconductor substrate may be a semiconductor substrate on which several structures are formed, in which case the structures formed on the semiconductor substrate can be provided according to actual needs and are not specifically limited here. For example, a semiconductor substrate may include a semiconductor substrate and a passivation anti-reflective layer provided on the side of the semiconductor substrate opposite to the first doped semiconductor layer and the second doped semiconductor layer, which passivates the side of the semiconductor substrate opposite to the first doped semiconductor layer and the second doped semiconductor layer to reduce the carrier recombination rate on that side and help more light rays to be refracted into the semiconductor substrate through that side, thereby further improving the operating efficiency of the back contact battery. Here, the material of the semiconductor substrate may include any one of the following semiconductor materials: silicon, germanium silicon, germanium, or gallium arsenide. The material of the passivation anti-reflective layer may include silicon oxide, silicon nitride, or aluminum oxide.

[0108] Furthermore, the first surface of the semiconductor substrate corresponds to the non-light-receiving surface of the back-contact battery, and the second surface of the semiconductor substrate corresponds to the light-receiving surface of the back-contact battery. Here, the distribution on the first surface of the first, second, and third regions of the semiconductor substrate can be determined according to the distribution on the first surface of the first doped semiconductor layer and the second doped semiconductor layer. Since the first doped semiconductor layer included in the back-contact battery is provided in the first and third regions, the distribution range on the first surface of the first and third regions can be determined according to the requirements for the distribution of the first doped semiconductor layer in the actual use case. Since a portion of the second doped semiconductor layer included in the back-contact battery is provided in the second region of the first surface, the distribution range on the first surface of the second region can be determined according to the requirements for the distribution of the second doped semiconductor layer on the semiconductor substrate in the actual use case.

[0109] It can be understood that the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region. One of the first and second regions corresponds to the P region, the other of the first and second regions corresponds to the N region, and the third region corresponds to the PN stacked region.

[0110] The morphology of the first and second regions on the first surface can be determined according to the morphology of the electrode structure of the back contact battery and the actual use case. For example, the first and second regions may be distributed alternately in a strip-like pattern with gaps between them, or they may be distributed alternately in a cross-finger-like pattern with gaps between them.

[0111] Furthermore, as described above, the first doped semiconductor layer and the second doped semiconductor layer are provided on the first surface of the semiconductor substrate. Here, as shown in Figure 1, if one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure is the first doped semiconductor layer 12, the surface of the second region 17 may be coplanar with the surface of the third region 18. As shown in Figure 2, if one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure is the second doped semiconductor layer 13, the surface of the first region 16 may be coplanar with the surface of the third region 18.

[0112] Alternatively, as shown in Figure 3, if one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure is the first doped semiconductor layer 12, the surface of the third region 18 may be higher than the surface of the second region 17 in the direction from the second surface toward the first surface. As shown in Figure 4, if one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure is the second doped semiconductor layer 13, the surface of the third region 18 may be higher than the surface of the first region 16 in the direction from the second surface toward the first surface. By doing so, it is ensured that the portion of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that is formed earlier is selectively etched away and not left in the region where it comes into contact with the semiconductor substrate 11, thereby preventing short circuits.

[0113] In the first doped semiconductor layer and the second doped semiconductor layer, from the viewpoint of doping type, the doping type of the first doped semiconductor layer may be N-type, in which case the doping type of the second doped semiconductor layer is P-type. Alternatively, the doping type of the first doped semiconductor layer may be P-type, in which case the doping type of the second doped semiconductor layer is N-type. The embodiments of this application do not specifically limit the doping types of the first doped semiconductor layer and the second doped semiconductor layer, but it is sufficient that their doping types are opposite.

[0114] From a materials standpoint, the material of the first doped semiconductor layer and / or the second doped semiconductor layer may include any one of the following semiconductor materials: silicon, germanium silicon, or germanium. From a materials arrangement standpoint, the crystalline phase of the first doped semiconductor layer and / or the second doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline.

[0115] From the viewpoint of the stacking configuration, as shown in Figures 1 and 3, in the stacked structure, the first doped semiconductor layer 12 may be provided between the second doped semiconductor layer 13 and the semiconductor substrate 11, in which case the first doped semiconductor layer 12 is closer to the semiconductor substrate 11 than the second doped semiconductor layer 13 in the stacked structure. Alternatively, as shown in Figures 2 and 4, in the stacked structure, the second doped semiconductor layer 13 may be provided between the first doped semiconductor layer 12 and the semiconductor substrate 11, in which case the second doped semiconductor layer 13 is closer to the semiconductor substrate 11 than the first doped semiconductor layer 12 in the stacked structure.

[0116] From the viewpoint of installation position, as shown in Figures 1 to 4, at least a portion of the first doped semiconductor layer 12 may be directly formed on the semiconductor substrate 11. Alternatively, as shown in Figures 5 and 6, the back contact battery includes a first interface passivation layer 21. Here, if the first doped semiconductor layer 12 is the one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is closer to the semiconductor substrate 11, the first interface passivation layer 21 is provided between the first doped semiconductor layer 12 and the semiconductor substrate 11. If the second doped semiconductor layer 13 is the one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is closer to the semiconductor substrate 11, the first interface passivation layer 21 is provided between the first doped semiconductor layer 12 and the semiconductor substrate 11 and extends between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. The material and thickness of the first interface passivation layer 21 can be set according to the material of the first doped semiconductor layer 12 and the actual requirements, and are not specifically limited thereto. For example, when the first doped semiconductor layer is a doped polycrystalline silicon layer, the first interface passivation layer is a tunnel passivation layer. Furthermore, for example, when the first doped semiconductor layer is a doped amorphous silicon layer, the first interface passivation layer is an intrinsic amorphous silicon layer.

[0117] With respect to the second doped semiconductor layer, as shown in Figures 1 to 6, at least a portion of the second doped semiconductor layer 13 may be directly formed on the semiconductor substrate 11. Alternatively, as shown in Figures 7 and 8, the back contact battery includes a second interface passivation layer 22. Here, if one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure is the first doped semiconductor layer 12, then the second interface passivation layer 22 is provided between the second doped semiconductor layer 13 and the semiconductor substrate 11, and extends between the second doped semiconductor layer 13 and the first doped semiconductor layer 12. If one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure is the second doped semiconductor layer 13, then the second interface passivation layer 22 is provided between the second doped semiconductor layer 13 and the semiconductor substrate 11. The material and thickness of the second interface passivation layer 22 can be set according to the material of the second doped semiconductor layer 13 and the actual requirements, and are not specifically limited therein. For example, when the second doped semiconductor layer is a doped polycrystalline silicon layer, the second interface passivation layer is a tunnel passivation layer. Furthermore, for example, when the second doped semiconductor layer is a doped amorphous silicon layer, the second interface passivation layer is an intrinsic amorphous silicon layer.

[0118] From the viewpoint of the installation range, as shown in Figure 9, a third region in which a laminated structure (the location of the grid pattern region in the figure) is formed may be provided between the entire first region and the entire second region. In this case, in the direction of extension of the third region, i.e., the direction of extension of the laminated structure, all the adjacent edge regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 overlap in the thickness direction of the semiconductor substrate 11 (the region shown as a grid pattern in the figure). Here, the direction of extension of the laminated structure can be determined according to the specific shapes of the first region 16 and the second region 17. For example, when the first region 16 and the second region 17 are distributed in a strip shape with gaps between them, the direction of extension of the laminated structure is parallel to the direction of extension of the first region 16 or the second region 17. Furthermore, for example, when the first region 16 and the second region 17 are distributed in a cross-finger shape with a gap between them, if the laminated structure is provided between the two finger-shaped regions, the extension direction of the laminated structure is parallel to the extension direction of the finger-shaped regions, and if the laminated structure is provided between the finger-shaped region and the connecting region, the extension direction of the laminated structure is parallel to the extension direction of the connecting region. Alternatively, as shown in Figures 10 to 12, the third region on which the laminated structure is formed may be provided only between a portion of the first region and a portion of the second region, in which case only a portion of the adjacent edge regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 overlap in the thickness direction of the semiconductor substrate 11, and in this case the first surface further has a fourth region provided between the first region and the second region that does not overlap with the third region. In this case only a portion of the adjacent edge regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 overlap in the thickness direction of the semiconductor substrate 11. As shown in Figures 10 to 13, the fourth region may be provided with only the first doped semiconductor layer 12, only the second doped semiconductor layer 13, only a nonconductive structure such as a physical spacer like an insulating groove or a chemical film layer made of an intrinsic semiconductor material or insulating material, or one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 and the above-mentioned nonconductive structure.The principle for determining the extension direction of the laminated structure in this case is the same as the principle for determining the extension direction of the laminated structure when the third region 18 on which the laminated structure is formed is provided between each region of the first region 16 and each region of the second region 17, as described above, and a detailed explanation is omitted here.

[0119] Furthermore, in actual application processes, the connection configuration between the first doped semiconductor layer and the second doped semiconductor layer can be divided into at least the following two types.

[0120] In the first type, the first doped semiconductor layer and the second doped semiconductor layer are connected via a dielectric layer in which a leakage current passage is provided. As shown in Figures 1 to 5, the connection may be a direct connection between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. Alternatively, as shown in Figures 6, 7 and 16, when the leakage current passage does not penetrate the dielectric layer, the connection may be indirect via a portion of the dielectric layer corresponding to the leakage current passage (this portion has electrical conductivity characteristics). This helps to reduce the reverse dielectric breakdown voltage of the back contact battery and improve the burnout prevention capability of the back contact battery by forming a reverse leakage current region. Furthermore, in this case, the abutting area of ​​the connection region provided in the leakage passage 15 is approximately equal to the cross-sectional area of ​​the leakage passage 15. Because the abutting area is relatively small in this case, it further reduces the direct transport recombination of carriers collected in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the laminated structure, which helps to further suppress leakage losses in the back contact battery and provide the back contact battery with high operating efficiency.

[0121] In the first type, as shown in Figures 1 to 7, the butt surface of the connection region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 may have a regular shape such as a flat or curved surface. Alternatively, the butt surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer may have an irregular shape. Understandably, compared to the case where the butt surface in the connection region has a flat and regular shape, when the butt surface in the connection region has an irregular shape, the butt surface has an uneven and undulating characteristic, which helps to increase the contact area between the first doped semiconductor layer and the second doped semiconductor layer in the connection region, that is, it helps to increase the junction area of ​​the butt joint, which further helps to lower the reverse dielectric breakdown voltage of the back contact battery and reduce the risk of hot spots in the back contact battery.

[0122] Furthermore, in the first type, the abutting surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer may be provided between the first doped semiconductor layer and the second doped semiconductor layer only in a direction perpendicular to the first surface. Alternatively, the abutting surface of the connection region between the first doped semiconductor layer and the second doped semiconductor layer may have an angle less than 90° with respect to the first surface of the semiconductor substrate. For example, the abutting surface and the first surface may have an angle of 0°, 10°, 20°, 30°, 40°, 50°, 60°, 70°, or 80°. When the thickness of one of the first and second doped semiconductor layers in a laminated structure that is closer to the semiconductor substrate is constant, compared to the case where the abutting surface of the connection region between the first and second doped semiconductor layers is perpendicular to the first surface, if the abutting surface of the connection region and the first surface form an angle smaller than 90°, the abutting surface is provided at an angle with respect to the first surface. This helps to provide a larger contact area in the connection region between the first and second doped semiconductor layers, further increasing the bonding area of ​​the abutting joint. This helps to further reduce the reverse dielectric breakdown voltage of the back-contact battery and reduce the risk of hot spots in the back-contact battery. Furthermore, when the abutting surfaces of the connection region are inclined with respect to the first surface, the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, one that is further away from the semiconductor substrate, more effectively covers the other that is closer to the semiconductor substrate. This prevents defects such as holes from occurring in the connection region on the layer further away from the semiconductor substrate, further contributing to improving the yield of back contact batteries.

[0123] As a second type, as shown in Figures 14 to 16, the back contact battery may further include a third doped semiconductor portion 23 located between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, and connected to each of the first doped semiconductor layer 12 and the second doped semiconductor layer 13. In other words, the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are connected via the third doped semiconductor portion 23.

[0124] Here, if the back contact battery further includes a third doped semiconductor portion, as shown in Figures 14 to 16, from the viewpoint of formation position, a dielectric layer 14 is provided between at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 and the third doped semiconductor portion 23, and at least one end of the third doped semiconductor portion 23 is connected to the first doped semiconductor layer 12 or the second doped semiconductor layer 13 via the dielectric layer 14, which is provided with a leakage current passage 15. The above-described connection may be a direct connection between at least one end of the third doped semiconductor portion 23 and the first doped semiconductor layer 12 or the second doped semiconductor layer 13, or, as shown in Figures 6 and 7, it may be an indirect connection via a portion of the dielectric layer 14 corresponding to the leakage current passage (this portion has electrical conductivity characteristics) when the leakage current passage does not penetrate the dielectric layer 14. Based on this, by providing a dielectric layer 14, the electrical conductivity efficiency between the third doped semiconductor portion 23 and at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can be adjusted. For example, insulation or semi-insulation can be achieved through regions of the dielectric layer 14 that do not have leakage passages 15, or the electrical conductivity efficiency can be controlled by setting the thickness of the dielectric layer 14. Furthermore, by providing leakage passages 15 within the dielectric layer 14, local current conduction can be made easier. In addition, the number and size of leakage passages 15 provided within the dielectric layer 14 can be adjusted, and leakage of the dielectric layer 14 can be controlled. By adjusting the thickness of the portion corresponding to the passage 15, it is possible to adjust and control the contact area and carrier transport efficiency of the connection region between at least one end of the third doped semiconductor portion 23 and the first doped semiconductor layer 12 (or second doped semiconductor layer 13). This helps to adjust and control the leakage current conditions of the reverse leakage region on the sides of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure. Furthermore, it helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back contact battery, thereby preventing hot spots and ensuring that battery efficiency losses are small, and ultimately, no losses occur.

[0125] Alternatively, as shown in Figures 14 to 16, a dielectric layer may be provided only between the first doped semiconductor layer and the third doped semiconductor portion. In this case, the third doped semiconductor portion can be connected to the first doped semiconductor layer via a leakage current passage provided in the dielectric layer, and the third doped semiconductor portion can be connected to the second doped semiconductor layer even without the leakage current passage. Alternatively, a dielectric layer may be provided between each of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion. In this case, the third doped semiconductor portion needs to be connected to each of the first doped semiconductor layer and the second doped semiconductor layer via a leakage current passage provided within the dielectric layer.

[0126] Regarding the doping type of the third doped semiconductor portion, the doping type of the third doped semiconductor portion can be determined according to the relative positional relationship between the third doped semiconductor portion and the dielectric layer. The doping type of the third doped semiconductor portion may be the same as the doping type of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, where no dielectric layer is provided between them and the third doped semiconductor portion, thereby reducing the manufacturing difficulty of the third doped semiconductor portion. For example, as shown in Figures 14 to 16, a dielectric layer 14 is provided only between the second doped semiconductor layer 13 and the third doped semiconductor portion 23, and in this case, the doping type of the third doped semiconductor portion 23 may be the same as the doping type of the first doped semiconductor layer 12.

[0127] For example, the material of the third doped semiconductor portion may contain at least one doping element. At the same time, the doping type of the third doped semiconductor portion may be the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, and the doping concentration of the doping element in the third doped semiconductor portion may be smaller than the doping concentration of the doping element in one of the first doped semiconductor layer and the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion. Taking the example that the doping type of the third doped semiconductor portion is the same as the doping type of the second doped semiconductor layer, when the doping concentration in the doped element of the third doped semiconductor portion is lower than the doping concentration of the doped element in the second doped semiconductor layer, a high-low junction with a doping concentration gradient can be formed between the third doped semiconductor portion and the second doped semiconductor layer in the direction approaching the second doped semiconductor layer from the first doped semiconductor layer. The built-in electric field of this high-low junction facilitates the transport and dispersion of leakage current, further reducing the reverse dielectric breakdown voltage of the back contact battery and improving the burnout prevention capability of the back contact battery.

[0128] It should be explained that in actual application processes, if the doping type of the third doped semiconductor portion is the same as the doping type of either the first doped semiconductor layer or the second doped semiconductor layer, the doping concentration of the doped element in the third doped semiconductor portion may be equal to the doping concentration of the doped element in either the first doped semiconductor layer or the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion. Furthermore, whether the doping type of the third doped semiconductor portion is specifically the same as that of the first doped semiconductor layer or the second doped semiconductor layer can be determined according to the installation position of the dielectric layer and the actual use case, and is not specifically limited here.

[0129] For example, if the doping type of the third doped semiconductor portion is the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, the third doped semiconductor portion is selectively configured such that its doping type is opposite to that of the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure that is closer to the semiconductor substrate, and is connected to the other layer that is further away from the semiconductor substrate via a dielectric layer with a leakage current passage. For example, if the first doped semiconductor layer is the one of the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure that is closer to the semiconductor substrate, the third doped semiconductor portion is configured such that its doping type is opposite to that of the first doped semiconductor layer, and is connected to the second doped semiconductor layer via a dielectric layer with a leakage current passage. Furthermore, for example, if, among the first and second doped semiconductor layers included in the laminated structure, the one closer to the semiconductor substrate is the second doped semiconductor layer, the third doped semiconductor portion has a doping type opposite to that of the second doped semiconductor layer and is connected to the first doped semiconductor layer via a dielectric layer in which a leakage current passage is provided. As shown in Figures 1 to 7, 14 and 15, compared to the case where the first doped semiconductor layer 12 and the second doped semiconductor layer 13 are connected via a dielectric layer 14 in which a leakage current passage 15 is provided, in this case the butt area of ​​the connection region between the third doped semiconductor portion 23 with the opposite conductivity type and the one closer to the semiconductor substrate 11 is larger (larger than the cross-sectional area of ​​the leakage current passage 15). Therefore, in this case, the risk of hot spots in the back contact battery can be further reduced and the ability to prevent burnout of the back contact battery can be improved. Next, it can be understood that the portion of the dielectric layer 14 where the leakage passage 15 is not provided can effectively limit the formation range of the third doped semiconductor portion 23 and / or contribute to reducing the doping concentration of the doped element in the third doped semiconductor portion 23, and further affect the abutting area of ​​one of the adjacent surfaces between the third doped semiconductor portion 23 and the semiconductor substrate 11, thereby effectively suppressing leakage loss.

[0130] Furthermore, for example, if the doping type of the third doped semiconductor portion is the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, the doping type of the third doped semiconductor portion may be opposite to that of the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure, and it is connected to the one closer to the semiconductor substrate via a dielectric layer in which a leakage current passage is provided. For example, if the first doped semiconductor layer is the one closer to the semiconductor substrate among the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure, the doping type of the third doped semiconductor portion is opposite to that of the second doped semiconductor layer, and it is connected to the first doped semiconductor layer via a dielectric layer in which a leakage current passage is provided. Furthermore, for example, if, among the first and second doped semiconductor layers included in the laminated structure, the one closer to the semiconductor substrate is the second doped semiconductor layer, the third doped semiconductor portion has a doping type opposite to that of the first doped semiconductor layer and is connected to the second doped semiconductor layer via a dielectric layer in which a leakage current passage is provided. In this case, it also helps to increase the proportion of the reverse leakage current region occupied, further reducing the burnout prevention capability of the back contact battery.

[0131] Next, the embodiments of this application do not specifically limit the type and concentration of the doping elements in the third doped semiconductor portion. The type and concentration of the doping elements in each part of the third doped semiconductor portion may be the same, in which case only a group IIIA doping element or a group VA doping element is doped in each part of the third doped semiconductor portion. Here, only one type of group IIIA doping element or one type of group VA doping element may be doped in each part of the third doped semiconductor portion, or multiple types of group IIIA doping elements or multiple types of group VA doping elements may be doped.

[0132] Alternatively, a dielectric layer is provided between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer via a dielectric layer in which a leakage current passage is provided. In this case, the portion of the third doped semiconductor portion adjacent to the dielectric layer may have two types of doping elements, Group IIIA and Group VA. That is, the portion of the third doped semiconductor portion adjacent to the dielectric layer is doped with two types of doping elements, P-type and N-type. Understandably, when other factors remain unchanged, compared to the case where the portion of the third doped semiconductor adjacent to the dielectric layer contains only one type of doping element from group IIIA or group VA, the case where the portion of the third doped semiconductor adjacent to the dielectric layer contains two types of doping elements, such as group IIIA and group VA, is different because the doping types of the two types of doping elements, P-type and N-type, are opposite. Therefore, the third doped semiconductor, which was originally doped with only one type of doping element from group IIIA or group VA, will recombine after the other type of doping element from group IIIA or group VA is added, weakening its conductivity. Thus, by adjusting the doping concentration of the other doping element from group IIIA or group VA in the dielectric layer, it is possible to control the electrical conductivity efficiency and further help to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back-contact battery. The portion of the third doped semiconductor adjacent to the dielectric layer may contain one or more types of group IIIA doping elements, or one or more types of group VA doping elements. Furthermore, the specific doping type of the third doped semiconductor portion can be determined according to the positional relationship between the first doped semiconductor layer, the second doped semiconductor layer, and the third doped semiconductor portion and the dielectric layer. When there is no dielectric layer between the first doped semiconductor layer and the third doped semiconductor portion, and a dielectric layer is provided between the second doped semiconductor layer and the third doped semiconductor portion, the doping type of the third doped semiconductor portion is the same as that of the first doped semiconductor layer. When there is no dielectric layer between the second doped semiconductor layer and the third doped semiconductor portion, and a dielectric layer is provided between the first doped semiconductor layer and the third doped semiconductor portion, the doping type of the third doped semiconductor portion is the same as that of the second doped semiconductor layer.

[0133] Furthermore, in the case of the second type, the abutting surfaces of the connection regions between the third doped semiconductor portion and the first doped semiconductor layer and / or the abutting surfaces of the connection regions between the third doped semiconductor portion and the second doped semiconductor layer may be provided between the first doped semiconductor layer and the second doped semiconductor layer only in a direction perpendicular to the first surface. Alternatively, as shown in Figures 14 to 16, the abutting surfaces of the connection regions between the third doped semiconductor portion 23 and the first doped semiconductor layer 12 and / or the abutting surfaces of the connection regions between the third doped semiconductor portion 23 and the second doped semiconductor layer 13 may form an angle less than 90° with respect to the first surface of the semiconductor substrate 11. For example, the abutting surfaces and the first surface may form an angle such as 0°, 10°, 20°, 30°, 40°, 50°, 60°, 70°, or 80°. For the principle of applying the beneficial effect in this case, you can refer to the principle of applying the beneficial effect when the abutting surface of the connection region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 and the first surface of the semiconductor substrate 11 form an angle smaller than 90°, as described above, and a detailed explanation is omitted here.

[0134] From the viewpoint of crystal particle size, the size of the crystal particles in the third doped semiconductor layer may be equal to the size of the crystal particles in the first doped semiconductor layer and the second doped semiconductor layer. Alternatively, as shown in Figure 16, the size of the crystal particles in the third doped semiconductor layer 23 may be smaller than the size of the crystal particles in at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In other words, the size of the crystal particles in the third doped semiconductor layer 23 may be smaller than the size of the crystal particles in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that are closer to the semiconductor substrate, and / or the size of the crystal particles in the third doped semiconductor layer 23 may be smaller than the size of the crystal particles in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that are further from the semiconductor substrate. Understandably, the smaller the crystal particles in a doped semiconductor layer, the more interfaces there are between the crystal particles in the doped semiconductor layer, and therefore the greater the resistance of the crystal particle interfaces. Based on this, the size of the crystal grains in the third doped semiconductor section 23 is smaller than the size of the crystal grains in at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In this case, the resistance of the third doped semiconductor section 23 is greater than the resistance of at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. This contributes to enhancing the effect of the third doped semiconductor section 23 in regulating and controlling carrier transport between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. Therefore, by positioning the third doped semiconductor section 23, which has a small crystal grain size, between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure, the exchange of carriers on both sides can be restricted, reducing the passage of leakage current and preventing efficiency loss of the battery cell. In addition, it is possible to consume some of the leakage current and allow some of the leakage current to pass through, thereby realizing a hot spot prevention function.

[0135] Alternatively, as shown in Figure 16, the average size of the crystal grains in the third doped semiconductor section 23 may be smaller than the average size of the crystal grains in at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In other words, the average size of the crystal grains in the third doped semiconductor section 23 may be smaller than the average size of the crystal grains in one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is closer to the semiconductor substrate, and / or, the average size of some of the crystal grains in the third doped semiconductor section 23 may be smaller than the average size of the crystal grains in one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is further away from the semiconductor substrate. The crystallization rate of these three can be evaluated from the size of the crystal grains. The crystallization rate in the third doped semiconductor section 23 may be smaller than the crystallization rate of at least one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure. In other words, the crystallinity of the third doped semiconductor layer 23 may be smaller than the crystallinity of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that are closer to the semiconductor substrate, and / or, the crystallinity of the third doped semiconductor layer 23 may be smaller than the crystallinity of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that are further away from the semiconductor substrate. For the application principle of the beneficial effects in these cases, refer to the application principle of the beneficial effects when the size of the crystal particles in the third doped semiconductor layer is smaller than the size of the crystal particles in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, as described above, and a detailed explanation is omitted here.

[0136] In the dielectric layer, from the viewpoint of the thickness direction, the thickness of the dielectric layer in the embodiments of this application may be any thickness of 13 nm or more, and is not specifically limited thereto.

[0137] For example, the thickness of the dielectric layer may be 150 nm or less. For instance, the thickness of the dielectric layer may be 13 nm, 14 nm, 14.5 nm, 15 nm, 16 nm, 17 nm, 18 nm, 20 nm, 30 nm, 50 nm, 60 nm, 80 nm, 100 nm, 120 nm, or 150 nm. This prevents the amount of dielectric layer manufacturing material used from increasing due to the large thickness of the dielectric layer, which helps to suppress the manufacturing cost of back contact batteries. At the same time, the thickness of the dielectric layer may also affect the length of the leakage path, and since the length of the leakage path is directly proportional to the transport resistance of the leakage current, this prevents the length of the leakage path from becoming excessively long due to the thickness of the dielectric layer, which would increase the transport resistance heat output in the leakage path when the back contact battery is shielded, thus ensuring a high burnout prevention capability for back contact batteries.

[0138] Furthermore, as shown in Figures 14 and 15, the dielectric layer 14 may be interrupted in the leakage passage 15. In this case, the thickness of the portion of the dielectric layer 14 where the leakage passage 15 is provided is 0, and the leakage passage 15 penetrates the dielectric layer 14. Alternatively, as shown in Figure 16, the thickness of the portion of the dielectric layer 14 where the leakage passage 15 is provided may be greater than 0. In this case, the thickness of the portion of the dielectric layer 14 where the leakage passage 15 is provided affects the inhibitory effect of the leakage passage 15 on the diffusion of doped elements within the first doped semiconductor layer 12 and the second doped semiconductor layer 13 to the other of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 when manufacturing the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that are furthest from the semiconductor substrate. This affects the extent to which the doped elements extend after crossing the leakage passage, and further affects the occupancy ratio of the reverse leakage region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. Based on this, the thickness of the portion of the dielectric layer where the leakage path is provided can be determined according to the requirements for the reverse dielectric breakdown voltage and leakage loss of back-contact batteries in actual use cases, and is not specifically limited here.

[0139] For example, as shown in Figure 16, the thickness of the portion of the dielectric layer 14 where the leakage current passage 15 is provided may be 7 nm or less. For example, the thickness of the portion of the dielectric layer 14 where the leakage current passage 15 is provided may be 0, 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, or 7 nm. By making the thickness of the portion of the dielectric layer 14 where the leakage current passage 15 is provided small, and by keeping the thickness of the leakage current passage 15 of the dielectric layer 14 to 7 nm or less, leakage current is realized in the leakage current passage, giving the back contact battery the ability to prevent hot spots. Furthermore, by controlling the thickness of the portion of the dielectric layer 14 where the leakage current passage 15 is provided, the degree of leakage current between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 can be adjusted, thereby enabling the adjustment of leakage current and electrical isolation, which helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back contact battery. Next, the thickness of the dielectric layer 14 affects its electrical transport performance. In particular, for dielectric layers 14 made of the same material, the thinner the thickness, the higher the electrical transport performance and the more electrical connection can be realized. Conversely, the thicker the thickness, the lower the electrical transport performance, the better the insulation, and the more electrical isolation can be realized. Effective electrical connection can be realized when the thickness of the dielectric layer 14 in the leakage path is 7 nm or less.

[0140] From the viewpoint of film layer structure, the dielectric layer may be a single layer or a multilayer structure. For example, the dielectric layer may be a single layer composed only of doped silicate glass or an etching mask layer (e.g., a silicon nitride layer). Furthermore, for example, the dielectric layer may be a laminate including at least one of doped silicate glass and an etching mask layer and a portion corresponding to a third region of a first interface passivation layer or a second interface passivation layer. Furthermore, for example, the dielectric layer may be a laminate including at least one of doped silicate glass and an etching mask layer and a doped semiconductor material.

[0141] From a materials standpoint, the dielectric layer material may consist solely of an insulating material, or it may contain both an insulating material and a semiconductor material. This allows for improved applicability to different use cases of back-contact batteries while reducing the manufacturing difficulty of the dielectric layer. Herein, the embodiments of this application do not specifically limit the types of insulating and semiconductor materials, or the distribution of insulating and semiconductor materials in the dielectric layer when the dielectric layer material includes both, as long as they are applicable to the back-contact batteries provided in the embodiments of this application.

[0142] For example, the dielectric layer material may contain oxygen and / or silicon. There are many types of oxygen-containing insulating materials, such as silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, or hafnium oxide. Therefore, when the dielectric layer material contains oxygen, the applicability of the back-contact battery provided in the embodiments of this application to different use cases can be improved. In addition, since oxygen-containing insulating materials generally have a high dielectric constant, the dielectric layer will have high insulating or semi-insulating properties, further reducing direct transport recombination of carriers collected in the first doped semiconductor layer and the second doped semiconductor layer in the laminated structure, which helps to ensure high photoelectric conversion efficiency of the back-contact battery. Furthermore, when the dielectric layer material contains silicon (it may be a silicon-containing semiconductor material such as silicon or germanium silicon, or a silicon-containing insulating material such as silicon oxide, silicon nitride, or silicon oxynitride), the compatibility between the dielectric layer and the first doped semiconductor layer and the second doped semiconductor layer, respectively, can be improved, further improving the operating performance of the back-contact battery.

[0143] For example, when the dielectric layer includes both an insulating material and a semiconductor material, the type of semiconductor material in the dielectric layer may be the same as the type of semiconductor material in the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure, whichever is closer to the semiconductor substrate. When the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure are closer to the semiconductor substrate, the type of semiconductor material in the dielectric layer may be the same as the type of semiconductor material in the first doped semiconductor layer. Alternatively, when the second doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure are closer to the semiconductor substrate, the type of semiconductor material in the dielectric layer may be the same as the type of semiconductor material in the second doped semiconductor layer. As shown in Figures 14 and 15, in the thickness direction of the semiconductor substrate 11, the dielectric layer 14 covers at least the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the multilayer structure, whichever is closer to the semiconductor substrate 11. Based on this, in the actual manufacturing process, if the type of semiconductor material in the dielectric layer 14 is the same as the type of semiconductor material in one of the first doped semiconductor layer 12 and second doped semiconductor layer 13 included in the laminated structure that is closer to the semiconductor substrate 11, then selectively etching either the entire first doped semiconductor layer 12 or the entire second doped semiconductor layer 13 by the masking effect of the insulating material included in the dielectric layer 14 will not completely remove the portion of the first doped semiconductor layer 12 or the second doped semiconductor layer 13 that is close to the insulating material. In this case, the corresponding etching time of the etching agent will be relatively short, reducing the influence of the etching agent on the dielectric layer 14, ensuring that the size of the leakage current passage 15 opened in the dielectric layer 14 is not too large, further improving the degree of leakage current loss adjustment control by the dielectric layer 14, and further improving the operating efficiency of the back contact battery.

[0144] It should be explained that when the dielectric layer includes both insulating and semiconductor materials, the type of semiconductor material in the dielectric layer may differ from the type of semiconductor material in the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure, specifically the one closer to the semiconductor substrate. In the actual manufacturing process, before forming the insulating material included in the dielectric layer, the semiconductor material included in the dielectric layer may be formed in the first doped semiconductor layer and the second doped semiconductor layer included in the multilayer structure, depending on actual demand, specifically the one closer to the semiconductor substrate.

[0145] In actual application processes, the dielectric layer material may include silicon oxide, silicon nitride, intrinsic / doped amorphous silicon, intrinsic / doped polycrystalline silicon, intrinsic / doped single-crystal silicon, phosphorus / boron-doped silicate glass, aluminum oxide, aluminum nitride, phosphorus nitride, titanium nitride, or silicon carbide. One or more of the above materials are selected depending on the actual situation. The dielectric layer at the leakage path location may be made of the same material as the dielectric layers at other locations. For example, by adjusting the thickness of the same material, electrical connection and isolation can be achieved at different locations, and the fabrication process using this method is simple while avoiding matching problems between film layers. The dielectric layer at the leakage path location may be made of a different material than the dielectric layers at other locations. For example, a conductive dielectric layer may be provided in the leakage path, while other locations have insulating or semi-insulating dielectric layers, and by using a combination of film layers, different regions can avoid interfering with each other.

[0146] From the viewpoint of the formation range, the dielectric layer may be provided only in the thickness direction of the semiconductor substrate between the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure. Alternatively, as shown in Figures 1 to 7, the dielectric layer 14 may be provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure in the thickness direction of the semiconductor substrate 11, and also between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure in a direction parallel to the first surface. Alternatively, as shown in Figures 13 and 14, the dielectric layer 14 may be provided not only between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure, but also partially provided on the semiconductor substrate 11. In this case, if the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure are closer to the semiconductor substrate 11, the dielectric layer 14 is further provided between the second doped semiconductor layer 13 and the semiconductor substrate 11, with at least a portion of its area in contact with the semiconductor substrate 11. Alternatively, if the second doped semiconductor layer 13 and the first doped semiconductor layer 12 included in the stacked structure are closer to the semiconductor substrate 11, the dielectric layer 14 is further provided between the first doped semiconductor layer 12 and the semiconductor substrate 11, with at least a portion of its area in contact with the semiconductor substrate 11. The dielectric layer 14 can passivate a portion of the semiconductor substrate 11, reducing the carrier recombination rate on the side of the semiconductor substrate 11 where the dielectric layer 14 is formed, thereby improving the operating performance of the back-contact battery.

[0147] Here, as described above, if, of the first and second doped semiconductor layers included in the stacked structure, the one closer to the semiconductor substrate is the first doped semiconductor layer, and the surface of the third region is higher than the surface of the second region in the direction from the second surface to the first surface, the dielectric layer may further extend at least between the sidewall transitioning from the third region to the second region and the second doped semiconductor layer. The dielectric layer may extend only between the sidewall transitioning from the third region to the second region and the second doped semiconductor layer, or it may extend between the sidewall transitioning from the third region to the second region, a part of the second region and the second doped semiconductor layer, respectively.

[0148] In a stacked structure, if one of the first and second doped semiconductor layers, which is closer to the semiconductor substrate, is the second doped semiconductor layer, and the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface, the dielectric layer may further extend at least between the sidewall of the third region that spans the first region and the first doped semiconductor layer. The dielectric layer may extend only between the sidewall of the third region that spans the first region and the first doped semiconductor layer, or it may extend between the sidewall of the third region that spans the first region, a portion of the first region and the first doped semiconductor layer, respectively.

[0149] In a laminated structure, if one of the first and second doped semiconductor layers, which is closer to the semiconductor substrate, is the first doped semiconductor layer, and the surface of the third region is higher than the surface of the second region in the direction from the second surface to the first surface, then the second doped semiconductor layer extends from the surface of the second region through the sidewall transitioning from the third region to the second region to the portion corresponding to the third region of the first doped semiconductor layer. Based on this, if the dielectric layer further extends at least between the sidewall transitioning from the third region to the second region and the second doped semiconductor layer, the portion of the dielectric layer extending to the sidewall transitioning from the third region to the second region ensures sufficient coverage of the irregularly doped butt joint region of the dielectric layer. This ensures that the back-contact battery can effectively adjust and control leakage loss between the first and second doped semiconductor layers in the laminated structure when there is a small amount of dust or other shielding in its mounting environment, and further helps to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back-contact battery. Furthermore, the portion of the dielectric layer extending at least to the sidewall transitioning from the third region to the second region helps to passivate the portion of the semiconductor substrate corresponding to the boundary between the second and third regions, thereby further improving the operating performance of the back-contact battery. In addition, regarding the beneficial effects when, of the first and second doped semiconductor layers included in the stacked structure, the one closer to the semiconductor substrate is the second doped semiconductor layer, and the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface, and the dielectric layer further extends between the sidewall of the third region extending to the first region and the first doped semiconductor layer, please refer to the above, and a detailed explanation will be omitted here.

[0150] In actual application processes, when a dielectric layer is provided between the first doped semiconductor layer and the second doped semiconductor layer in both the thickness direction of the semiconductor substrate and the direction parallel to the first surface, the average thickness of the portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate may be equal to the average thickness of the portion provided between the first doped semiconductor layer and the second doped semiconductor layer in the direction parallel to the first surface, or the average thickness of the portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate may be greater than the average thickness of the portion provided between the first doped semiconductor layer and the second doped semiconductor layer in the direction parallel to the first surface. This prevents high leakage loss in the semiconductor substrate thickness direction of the first doped semiconductor layer and the second doped semiconductor layer due to a large overlap width of the stacked structure (relative to the thickness of one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is closer to the semiconductor substrate), thereby ensuring high operating efficiency of the back contact battery.

[0151] Next, when a dielectric layer is provided between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first plane, and between the first doped semiconductor layer and / or the second doped semiconductor layer and the semiconductor substrate, the average thickness of the portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first plane may be equal to the average thickness of the portion of the dielectric layer provided between the first doped semiconductor layer and / or the second doped semiconductor layer and the semiconductor substrate, or the average thickness of the portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first plane may be less than the average thickness of the portion of the dielectric layer provided between the first doped semiconductor layer and / or the second doped semiconductor layer and the semiconductor substrate, thereby ensuring a predetermined leakage current between the first doped semiconductor layer and the second doped semiconductor layer in a direction parallel to the first plane, and ensuring a low hot spot risk for the back contact battery.

[0152] Furthermore, as shown in Figures 14 to 16, of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure, the one closer to the semiconductor substrate 11 has a top surface away from the semiconductor substrate 11, a bottom surface close to the semiconductor substrate 11, and a side surface connecting the bottom surface and the top surface, and the other of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure, the one further away from the semiconductor substrate 11, covers a part of the top surface and a part of the side surface of the one closer to the semiconductor substrate 11, and the dielectric layer 14 is defined to include a first dielectric portion 19 and a second dielectric portion 20. The first dielectric portion 19 is provided between the other part further away from the semiconductor substrate 11 and the top surface of the one closer to the semiconductor substrate 11. For example, the first dielectric portion 19 is provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the thickness direction of the semiconductor substrate 11. The second dielectric portion 20 is provided between one side of the semiconductor substrate 11 that is far from it and the other side that is close to it. For example, the second dielectric portion 20 is provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in a direction parallel to the first surface. The dielectric layer 14 can not only adjust and control the leakage current between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the laminated structure in the thickness direction of the semiconductor substrate 11, but can also adjust and control the leakage current between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the laminated structure in a direction parallel to the first surface, ensuring that both the reverse dielectric breakdown voltage and leakage loss of the back contact battery meet the operating requirements. Furthermore, when the first dielectric portion 19 is provided between one side of the semiconductor substrate 11 that is away from it and one side of the semiconductor substrate 11 that is close to it, and the second dielectric portion 20 is provided between one side of the semiconductor substrate 11 that is away from it and one side of the semiconductor substrate 11 that is close to it, there is a non-zero angle between the extending direction of the first dielectric portion 19 and the second dielectric portion 20. By adjusting the size of this angle to control the spacing between the second dielectric portion 20 and the adjacent structure, the extending range that the third doped semiconductor portion 23 can extend to the side close to the semiconductor substrate 11 via the leakage current passage 15 can be adjusted and controlled. In addition, the size of the abutting area of ​​the connection region between the third doped semiconductor portion 23 and the first doped semiconductor layer 12 (or the second doped semiconductor layer 13) can be adjusted and controlled, which helps to balance the operating efficiency and reverse dielectric breakdown voltage of the back contact battery.In the above case, the size of the angle between the first dielectric portion 19 and the second dielectric portion 20 can be determined according to the actual use case, the morphology of one side of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure that is close to the semiconductor substrate 11, the requirements for the operating efficiency and reverse dielectric breakdown voltage of the back contact battery, and the actual manufacturing process.

[0153] Furthermore, the form, size, and distribution of leakage pathways in the dielectric layer can be randomly configured. Next, as described above, the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure can reduce the reverse dielectric breakdown voltage of the back-contact battery by achieving local electrical conduction through leakage pathways provided in the dielectric layer. As can be seen from the above, the size and distribution of leakage pathways in the dielectric layer affect the distribution and abutting area of ​​the connection region between the first doped semiconductor layer and the second doped semiconductor layer, and further affect the leakage loss and reverse dielectric breakdown voltage of the back-contact battery. Based on this, the size and distribution of leakage pathways can be determined according to the requirements for operating efficiency and hot spot risk of the back-contact battery in actual use cases and the actual manufacturing process, and are not specifically limited here. It should be explained that the specific meaning of the size of the leakage pathway can be determined according to the specific form of the leakage pathway, and are not specifically limited here. Generally, the size of the leakage pathway refers to the size of the cross-section perpendicular to the direction from the first doped semiconductor layer to the second doped semiconductor layer. For example, if the cross-sectional shape of the leakage path is circular, the size of the leakage path may be the radius or diameter of the circle.

[0154] For example, the size of the leakage path may be 12 nm or larger, and / or less than or equal to the thickness of the first doped semiconductor layer and the second doped semiconductor layer in the stacked structure that is closer to the semiconductor substrate. For example, the size of the leakage path may be 12 nm, 15 nm, 18 nm, 20 nm, 30 nm, 50 nm, 60 nm, or 80 nm. When the size of the leakage path is 12 nm or larger, it is possible to prevent the decrease in the reverse dielectric breakdown voltage of the back contact battery from being small due to the small size of the leakage path, and to ensure a low hot spot risk for the back contact battery. Furthermore, if the size of the leakage path is less than or equal to the thickness of one of the first and second doped semiconductor layers in the laminated structure that is closer to the semiconductor substrate, it is possible to prevent the entire area of ​​the side wall of the first and second doped semiconductor layers in the laminated structure that is closer to the semiconductor substrate from being exposed through the leakage path. This helps to control the junction area of ​​the butt joint between the first and second doped semiconductor layers in the laminated structure and ensure low leakage loss in the forward voltage region of the back contact battery.

[0155] For example, as shown in Figures 1 to 7, at least one leakage passage 15 may be located within the first dielectric portion 19, and / or at least one leakage passage 15 may be located within the second dielectric portion 20, and / or at least one leakage passage 15 may be located between the first dielectric portion 19 and the second dielectric portion 20. There are many possible realizations for the placement of the leakage passage 15 in the dielectric layer 14, which not only helps to improve the applicability of the back-contact battery provided in the embodiment of this application to different use cases, but also helps to reduce the difficulty of manufacturing the back-contact battery and simplify the manufacturing procedure for the back-contact battery by eliminating the need to strictly control manufacturing precision or add an additional operating step to form the leakage passage 15 at a specific location. When the first dielectric portion 19, the second dielectric portion 20, the leakage current passage 15, and the third doped semiconductor portion 23 are used in combination, superior effects may be produced. It is preferable to provide the leakage current passage 15 in the dielectric layer between the third doped semiconductor portion 23 and the first doped semiconductor layer 12 or the second doped semiconductor layer 13. This allows for further adjustment and control of the transport of leakage current carriers via the third doped semiconductor portion 23, and enables an increase or decrease in leakage current transport capacity as needed.

[0156] Selectively, in the third region, the distribution density in the second dielectric portion of the leakage path is greater than the distribution density in other parts of the dielectric layer of the leakage path.

[0157] As one possible implementation, a dielectric layer 14 is provided between a portion of the first doped semiconductor layer 12 and a first region 16 included in the first surface, and at least one leakage passage 15 is provided within the portion of the dielectric layer 14 corresponding to the first region 16. And / or, a dielectric layer 14 is provided between a portion 13 of the second doped semiconductor layer and a second region 17 included in the first surface, and at least one leakage passage 15 is provided within the portion of the dielectric layer 14 corresponding to the second region 17. The dielectric layer 14 passesivates the first region 16 and / or the second region 17, and at the same time, they can collect carriers in the semiconductor substrate 11 through the leakage passage 15 provided within the dielectric layer 14, thereby achieving carrier regulation control and optimizing battery performance.

[0158] Here, when a dielectric layer is provided between a part of the first doped semiconductor layer and a first region included in the first surface, and / or when a dielectric layer is provided between a part of the second doped semiconductor layer and a second region included in the first surface, the size of the leakage path provided in the portion of the dielectric layer corresponding to the first and / or second region, the straight-line distance between the different leakage paths, and the installation range in the first and second regions of the dielectric layer can be set according to actual needs and are not specifically limited here.

[0159] For example, if we define L1 as the straight-line distance between different leakage paths located within the portion of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer, and L2 as the straight-line distance between different leakage paths located within the portion of the dielectric layer between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, then L1 > L2. Understandably, when the back-contact battery is in the forward voltage region, the portion of the first doped semiconductor layer corresponding to the first region and the portion of the second doped semiconductor layer corresponding to the second region need to collect and extract carriers of the corresponding conductivity type generated after the semiconductor substrate absorbs photons, and form a photocurrent. Based on this, the carrier transport capacity of the portion of the first doped semiconductor layer corresponding to the first region and the portion of the second doped semiconductor layer corresponding to the second region affects the operating efficiency of the back-contact battery. Furthermore, when the back contact battery is shielded, a reverse leakage current region is formed at the connection point between the first doped semiconductor layer and the second doped semiconductor layer in the third region, making it easier to extract leakage current and reducing the risk of hot spots. When the linear distance L1 between different leakage current paths located within the portion of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer is larger, it helps to make the density of localized leakage current points between the first doped semiconductor layer and the second doped semiconductor layer sparser, making it easier to control the magnitude of leakage current and give the back contact battery high operating efficiency. On the other hand, it helps to further disperse the leakage current and further disperse the heat-generating points, preventing heat from accumulating locally and causing burnout problems, and further improving the burnout prevention capability of the back contact battery. When the linear distance L2 of different leakage paths provided within the portion of the dielectric layer located between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, is smaller, providing more carrier transport paths between the first doped semiconductor layer and the first region, or between the second doped semiconductor layer and the second region, can improve the carrier collection capability of the first doped semiconductor layer or the second doped semiconductor layer, reduce carrier recombination losses, and further improve the operating efficiency of the back contact battery.

[0160] For example, if we define the size of the leakage path provided in the portion of the dielectric layer located between the first doped semiconductor layer and the second doped semiconductor layer as A, and the size of the leakage path provided in the portion of the dielectric layer located between the first doped semiconductor layer and the first surface, or between the second doped semiconductor layer and the first surface as B, then A > B. For the beneficial effects in this case, you can refer to the beneficial effects when L1 is greater than L2 described above, and a detailed explanation is omitted here.

[0161] Of course, in order to improve the passivation effect in part of the first region and / or part of the second region of the dielectric layer, L2 may be equal to or greater than L1, and / or A may be equal to or less than B.

[0162] Furthermore, the back contact battery may further include a first electrode and a second electrode, the first electrode being electrically connected to the first doped semiconductor layer, and the second electrode being electrically connected to the second doped semiconductor layer. When one of the first and second doped semiconductor layers in the stacked structure, which is closer to the semiconductor substrate, is the first doped semiconductor layer, the distance between the dielectric layer and the second electrode may be 400 μm or less. When one of the first and second doped semiconductor layers in the stacked structure, which is closer to the semiconductor substrate, is the second doped semiconductor layer, the distance between the dielectric layer and the first electrode may be 400 μm or less. The presence of the dielectric layer reduces the influence on carrier collection of the first and second doped semiconductor layers, and ensures strong carrier collection capabilities of the first and second doped semiconductor layers.

[0163] Selectively, embodiments of this application further provide a method for manufacturing a back-contact battery, the method for manufacturing a back-contact battery may include the following steps.

[0164] First, a semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface facing each other. The first surface includes a first region and a second region distributed at intervals, and a third region located between the first region and the second region.

[0165] Next, a first doped semiconductor layer can be formed on the entire surface of the first surface of the semiconductor substrate by a process such as chemical vapor deposition. Here, if the material of the first doped semiconductor layer contains silicon and the doping of the first doped semiconductor layer is achieved by a diffusion process, after the first doped semiconductor layer is obtained, doped silicate glass is formed on the side of the first doped semiconductor layer opposite to the semiconductor substrate. Next, a laser irradiation process is used to process the portion of the doped silicate glass corresponding to the second region (or the portion corresponding to the local region of the first region and the second region, or the portion corresponding to the second region and the third region, or the portion corresponding to the second region, the third region and the fourth region, or the portion corresponding to the local region of the first region, the second region and the third region, or the portion corresponding to the local region of the first region, the second region and the third region and the fourth region), thereby forming leakage current passages in the doped silicate glass of the corresponding region, and the doped silicate glass in the region that has not been irradiated with the laser remains as a mask layer. Next, the masking action of the mask layer selectively removes the first doped semiconductor layer in areas not covered by the mask layer through a wet chemical etching process. After etching, the remaining portion of the doped silicate glass in the laser-irradiated area covers the sides of the first doped semiconductor layer, and also covers the portion corresponding to the boundary between the first and third regions of the semiconductor substrate, and the portion corresponding to the boundary between the third and second regions of the doped silicate glass, with the interrupted portion of the doped silicate glass becoming a leakage current path. Based on this, after wet chemical etching, the remaining portion of the doped silicate glass forms a dielectric layer.

[0166] Next, a second doped semiconductor layer can be formed on the entire surface of the second region and the first doped semiconductor layer of the semiconductor substrate by a process such as chemical vapor deposition. Then, by an etching process, the portion of the second doped semiconductor layer that covers the first region corresponding to the first doped semiconductor layer (or the portion of the second doped semiconductor layer that covers the first region and the fourth region corresponding to the first doped semiconductor layer) is selectively removed.

[0167] Here, when manufacturing the back contact battery provided in the embodiment of this application by the means described above, the distribution and size of the leakage path in the dielectric layer can be adjusted and controlled by means such as controlling the laser irradiation position, spot size, laser energy, and spot arrangement.

[0168] In other embodiments, the dielectric layer can be fabricated as a single layer or a composite layer of two or more layers by an atomic layer deposition process, a plasma chemical vapor deposition process, or a low-pressure chemical vapor deposition process. For example, a silicon oxide layer may be laminated on a surface away from the silicon substrate of doped silicate glass (see above for fabrication method) having a leakage channel formed by laser irradiation. The silicon oxide layer can be fabricated by a low-pressure chemical vapor deposition process. In this way, a silicon oxide layer is further formed in the leakage channel, the dielectric layer is a laminate of doped silicate glass and a silicon oxide layer, and a dielectric layer capable of achieving electrical connection exists in the leakage channel.

[0169] In other embodiments, leakage pathways can be obtained by chemical etching. For example, a mask can be used to cover areas other than the area where the leakage pathway is to be installed, followed by chemical etching to obtain areas where the film layer is thinned or where the film layer is locally cut, thereby obtaining the leakage pathway.

[0170] Next, with reference to Figures 17 to 35, the second set of back contact batteries of the first embodiment of this application will be described.

[0171] As shown in Figure 17, selectively, in the back-contact battery provided in the embodiments of this application, the dielectric layer 14 has a first dielectric portion 19 that is provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the thickness direction of the semiconductor substrate 11. In other words, in the thickness direction of the semiconductor substrate 11, the positional relationship of the first doped semiconductor layer 12, the second doped semiconductor layer 13, and the first dielectric portion 19 is first doped semiconductor layer 12, first dielectric portion 19, and second doped semiconductor layer 13. In the dielectric layer 14, at least one leakage passage 15 is provided within the first dielectric portion 19. In the third region 18, in the direction from the first region 16 toward the second region 17, the width of the first dielectric portion 19 is greater than or equal to the width of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is furthest from the semiconductor substrate 11.

[0172] The dielectric layer 14 included in the back contact battery includes a first dielectric portion 19 provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the thickness direction of the semiconductor substrate 11. By providing the first dielectric portion 19 whose width is greater than or equal to the width of one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure that is furthest from the semiconductor substrate 11, it is possible to regulate and control the electrical transport between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated region. At least one leakage current passage 15 is provided within the first dielectric portion 19, and in this case, electrical conduction between a partial region of the first doped semiconductor layer 12 and a partial region of the second doped semiconductor layer 13 in the laminated structure can be directly or indirectly achieved via the leakage current passage 15. Furthermore, in the dielectric layer 14, a leakage passage 15 is provided within the first dielectric portion 19, and the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated region have a surface morphology that is almost parallel to the first surface. Since this surface morphology is simpler than the side surface morphology of the first doped semiconductor layer 12 and the second doped semiconductor layer 13, when providing a leakage passage 15 within the first dielectric portion 19, the complexity of the structure is not limited, and it is only necessary to adjust the pattern or installation position of the corresponding leakage passage 15, without needing to consider other factors. For example, when manufacturing the leakage passage 15 by etching, it may be necessary to adjust the etching angle separately from general etching. This reduces the difficulty of creating a leakage passage 15 within the dielectric layer 14 using processes such as laser etching, thereby reducing the difficulty of manufacturing back contact batteries, and also improves the compatibility of the back contact battery provided in the embodiment of this application with the manufacturing process of general back contact batteries, thus contributing to the improvement of the manufacturing method of back contact batteries.Furthermore, the dielectric layer 14 can achieve physical structural separation, and by selecting a functional layer having electrical insulating or semi-insulating properties, it is possible to control the electrical transport between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the laminated region. Therefore, the portion of the dielectric layer 14 where the leakage passage 15 is not provided electrically isolates the portion of the first doped semiconductor layer 12 and the portion of the second doped semiconductor layer 13 in the laminated structure, effectively reducing the direct transport recombination of carriers collected in the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the laminated structure. This effectively suppresses leakage loss in the back contact battery and provides the back contact battery with good operating performance. As can be seen from the above, in the back contact battery provided in the embodiment of this application, the risk of hot spots in the back contact battery is reduced via the leakage passage 15 provided in the dielectric layer 14, and leakage loss in the forward voltage region of the back contact battery can be effectively suppressed by the insulating properties of the portion of the dielectric layer 14 where the leakage passage 15 is not provided. Furthermore, in the dielectric layer 14, compared to the case where leakage current passages 15 are created by etching at corresponding positions on one side of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure that are close to the semiconductor substrate 11, creating leakage current passages 15 only within the first dielectric portion 19 provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in the thickness direction of the semiconductor substrate 11 is less difficult, more precise, and makes it easier to achieve accurate adjustment control for leakage current and insulation, which helps in adjusting to balance the corresponding reverse dielectric breakdown voltage and operating efficiency of the back contact battery.

[0173] As described in the first set of embodiments of the first embodiment, the embodiments of this application do not specifically limit the material and conductivity type of the semiconductor substrate in actual application processes. For example, the semiconductor substrate may be a silicon substrate. Alternatively, the semiconductor substrate may be a semiconductor material substrate of any one of the following: a germanium silicon substrate, a germanium substrate, or a gallium arsenide substrate.

[0174] Similarly, the distribution of the first, second, and third regions on the first surface, the morphology of the first and second regions on the first surface, the doping types of the first and second doped semiconductor layers, the materials, the arrangement of materials, the stacking configuration, the installation position of the first doped semiconductor layer, the material and thickness of the first interface passivation layer, the installation position of the second doped semiconductor layer, the material and thickness of the second interface passivation layer, and the installation range of the third region are as described in the first set of embodiments of the first embodiment, and a detailed explanation is omitted.

[0175] Similarly, the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region. One of the first and second regions corresponds to the P region, the other of the first and second regions corresponds to the N region, and the third region corresponds to the PN overlap region.

[0176] For example, as shown in Figure 27, the first region 16 and the second region 17 may be distributed alternately in a band-like manner with intervals between them. Here, the first region 16 and the second region 17 may each contain multiple finger-shaped regions 220, and the finger-shaped regions 220 included in the first region 16 and the finger-shaped regions 220 included in the second region 17 extend in the first direction and are distributed with intervals in the second direction. The first direction is different from the second direction. The first and second directions may be any two directions that are parallel to the first plane and different from each other. Selectively, the first and second directions are orthogonal.

[0177] For example, as shown in Figure 28, the first region 16 and the second region 17 may be distributed in a cross-finger shape with spacing between them. Here, the first region 16 and the second region 17 each include multiple finger-like regions 220 and at least one connecting region 221. The finger-like regions 220 included in the first region 16 and the finger-like regions 220 included in the second region 17 extend in a first direction and are distributed with spacing between them in a second direction. The connecting region 221 included in the first region 16 is connected to the finger-like regions 220 included in the first region 16, and the connecting region 221 included in the second region 17 is connected to the finger-like regions 220 included in the second region 17. The first direction is different from the second direction. The first and second directions may be any two directions that are parallel to the first plane and different from each other. Selectively, the first and second directions are orthogonal.

[0178] Furthermore, as shown in Figures 27 and 28, the finger-shaped regions included in the first region 16 and the second region 17 may be regular rectangular regions. Alternatively, the first and second regions may include irregular rectangular regions. For example, as shown in Figures 29 and 30, when one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure is the first doped semiconductor layer, at least a portion of the first region 16 and the third region 18 can form a rectangular region. In this case, at least a portion of the first region 16 is obtained by removing the portion where the third region 18 exists from the rectangular region, i.e., it is a "rectangular region with a defect". Alternatively, if, among the first and second doped semiconductor layers included in the stacked structure, the one closer to the semiconductor substrate is the second doped semiconductor layer, then at least a portion of the second region 17 and the third region 18 can form a rectangular region. In this case, at least a portion of the second region 17 is obtained by removing the portion where the third region 18 exists from the rectangular region, i.e., it is a "rectangular region with a defect."

[0179] Selectively, in the third region, in the direction from the first region toward the second region, the width of the interface passivation layer corresponding to the one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is further away from the semiconductor substrate may be equal to the width of the one that is further away from the semiconductor substrate. For example, as shown in Figure 20, if the first doped semiconductor layer 12 is the one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is further away from the semiconductor substrate 11, then in the third region 18, in the direction from the first region 16 toward the second region 17, the width of the first interface passivation layer 21 may be equal to the width of the first doped semiconductor layer 12. Furthermore, for example, as shown in Figure 22, if, among the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure, the one furthest from the semiconductor substrate 11 is the second doped semiconductor layer 13, then in the third region 18, the width of the second interface passivation layer 22 in the direction from the first region 16 to the second region 17 may be equal to the width of the second doped semiconductor layer 13.

[0180] Alternatively, in the third region, in the direction from the first region toward the second region, the width of the interface passivation layer corresponding to the one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is further from the semiconductor substrate may be smaller than the width of the one that is further from the semiconductor substrate. For example, as shown in Figure 23, when the first doped semiconductor layer 12 is the one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure that is further from the semiconductor substrate 11, in the third region 18, in the direction from the first region 16 toward the second region 17, the width of the first interface passivation layer 21 is smaller than the width of the first doped semiconductor layer 12. Furthermore, for example, as shown in Figure 24, if the second doped semiconductor layer 13, which is one of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the stacked structure, is the second doped semiconductor layer 13, then in the third region 18, in the direction from the first region 16 to the second region 17, the width of the second interface passivation layer 22 is smaller than the width of the second doped semiconductor layer 13. In the third region 18, there is no corresponding interface passivation layer between the portions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 that correspond to the leakage current passage 15, which helps to reduce the conductivity resistance between them and further reduces the reverse dielectric breakdown voltage of the back contact battery.

[0181] In the third region, in the direction from the first region to the second region, the width of one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is furthest from the semiconductor substrate affects the proportion of the reverse leakage region occupied in the third region, and further affects the reverse dielectric breakdown voltage and leakage loss of the back contact battery. Therefore, the width of the one furthest from the semiconductor substrate can be determined according to the actual use case, and it is sufficient that the width of the first dielectric portion is greater than or equal to the width of one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is furthest from the semiconductor substrate.

[0182] For example, in the third region, in the direction from the first region to the second region, the width of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that are furthest from the semiconductor substrate may be 5 μm or more and 200 μm or less. For example, the width of the layer furthest from the semiconductor substrate may be 5 μm, 10 μm, 30 μm, 50 μm, 80 μm, 100 μm, 150 μm, 180 μm, or 200 μm.

[0183] In the dielectric layer, from a materials standpoint, the material of the dielectric layer may include at least one insulating material and / or an intrinsic semiconductor material, as long as it can provide an insulating or semi-insulating effect to the dielectric layer. For example, the material of the dielectric layer may include at least one of silicon oxide, silicon nitride, intrinsic amorphous silicon, intrinsic polycrystalline silicon, intrinsic single-crystal silicon, phosphorus-doped glass, boron-doped glass, aluminum oxide, aluminum nitride, phosphorus nitride, titanium nitride, and silicon carbide.

[0184] From the viewpoint of the formation range, the specific installation range of the dielectric layer between the first doped semiconductor layer and the second doped semiconductor layer can be determined according to the materials of the first doped semiconductor layer and the second doped semiconductor layer, and the actual use case, and the dielectric layer should include a first dielectric portion provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate.

[0185] For example, as shown in Figure 17, the dielectric layer 14 may include only the first dielectric portion 19, that is, the dielectric layer 14 may be provided only in the thickness direction of the semiconductor substrate 11 between the first doped semiconductor layer 12 and the second doped semiconductor layer 13. For example, if the back contact battery provided in the embodiment of this application is a hybrid back contact battery or a heterojunction back contact battery, the dielectric layer may include only the first dielectric portion. Here, a hybrid back contact battery refers to a back contact battery in which the N region and P region correspond to a tunnel passivation contact structure and a heterocontact structure, respectively. Furthermore, for example, if the back contact battery provided in the embodiment of this application is a back contact battery with a coupled tunnel passivation contact structure, the dielectric layer may include only the first dielectric portion, in which case the first doped semiconductor layer and the second doped semiconductor layer can be electrically connected in a direction parallel to the first surface, thereby improving the ability to prevent burnout of the back contact battery in mounting environments with many shielding materials such as dust.

[0186] For example, as shown in Figure 25, the dielectric layer 14 may further include a second dielectric portion 20 provided between the first doped semiconductor layer 12 and the second doped semiconductor layer 13 in a direction parallel to the first plane. In other words, in a direction parallel to the first plane, the relative positions of the first doped semiconductor layer 12, the second doped semiconductor layer 13, and the second dielectric portion 20 are first doped semiconductor layer 12, second dielectric portion 20, and second doped semiconductor layer 13. For example, if the back contact battery provided in the embodiment of this application is a back contact battery coupled with a tunnel passivation contact structure, the dielectric layer may include a first dielectric portion and a second dielectric portion. The presence of the second dielectric portion allows the first doped semiconductor layer and the second doped semiconductor layer to be separated in a direction parallel to the first surface, further reducing leakage loss between the first doped semiconductor layer and the second doped semiconductor layer, and improving the operating efficiency of the back contact battery in mounting environments with little shielding such as dust or bird droppings. Of course, if the embodiment of this application is a different type of back contact battery, the dielectric layer may further include the second dielectric portion. Selectively, in the back contact battery provided in the embodiment of this application, the back contact battery further includes the second dielectric portion to further reduce leakage loss between the first doped semiconductor layer and the second doped semiconductor layer and further improve the operating performance of the back contact battery, when a third region in which a stacked structure is formed is provided between each region of the first region and each region of the second region. When a third region with a laminated structure is provided between each region of the first region and each region of the second region, the third region with the laminated structure is provided over the entire area between the first and second regions, and in this case the laminated structure extends over a long distance, localized leakage is achieved by adjusting the leakage region on the top surface of the doped semiconductor layer in the laminated structure that is close to the semiconductor substrate, on the side opposite to the semiconductor substrate, via the first dielectric part. However, if, for example, the entire side surface of the doped semiconductor layer in the laminated structure that is close to the semiconductor substrate becomes a leakage region, it will lead to high leakage loss, so by introducing a second dielectric part, the side leakage situation is controlled and battery performance is optimized.

[0187] As can be seen from the above, the installation area of ​​the dielectric layer can be determined according to the materials of the first and second doped semiconductor layers in the actual use case, and the requirements for the reverse dielectric breakdown voltage and leakage loss of the back-contact battery in the actual use case, and is not specifically limited here.

[0188] Regarding the width provided in the first dielectric section, it is understandable that when the distribution density of leakage current paths in the first dielectric section is constant, the width of the first dielectric section and the occupancy ratio of the reverse leakage current region on the first surface side are directly proportional. Based on this, the width of the first dielectric section can be set according to different environmental requirements, and it is sufficient that the width of the first dielectric section is greater than or equal to the width of one of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure that is furthest from the semiconductor substrate.

[0189] For example, in the third region, the width of the first dielectric portion in the direction from the first region to the second region may be 10 μm or more and 200 μm or less. For example, in the third region, the width of the first dielectric portion in the direction from the first region to the second region may be 10 μm, 30 μm, 50 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, or 200 μm. As described above, the width of the first dielectric portion can be set according to different environmental requirements, thereby allowing the back contact battery to have a lower hot spot risk in mounting environments with many shielding materials such as dust, or to have a lower leakage current loss in mounting environments with few shielding materials such as dust, thereby improving the applicability of the back contact battery provided in the embodiment of this application to different actual use cases. Furthermore, by keeping the width of the first dielectric portion within the above range, it is possible to prevent the difficulty of selectively etching the dielectric material caused by a small width of the first dielectric portion, thereby contributing to a reduction in the manufacturing difficulty of back contact batteries.

[0190] For example, a back-contact battery may further include a first electrode (not shown) electrically connected to a first doped semiconductor layer, and a second electrode (not shown) electrically connected to a second doped semiconductor layer. The minimum distance between at least one of the first and second electrodes and a leakage path provided in the first dielectric portion is 30 μm or more and 300 μm or less. For example, the minimum distance may be 30 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 220 μm, 250 μm, 260 μm, 280 μm, 290 μm, or 300 μm. In order to avoid the electrodes coming into contact with the leakage area and causing a short circuit, which would affect the efficiency of the battery, a predetermined distance must be maintained between at least one of the first and second electrodes and the leakage path adjacent to it. The reason for this is that, in the actual application process, there is generally a certain degree of processing error in the equipment used to manufacture the first and second electrodes. As a result, the target formation range of the first and second electrodes differs to some extent from the actual formation range. Furthermore, some degree of film layer damage occurs during the creation of leakage current pathways, which affects carrier generation and collection. If either the first or second electrode is electrically connected to this pathway, it affects carrier collection and further impacts battery efficiency. Based on this, it is necessary to leave a predetermined distance.

[0191] The installation configurations in the first dielectric section of the leakage current path can be divided into at least the following three types.

[0192] As a first type, as shown in Figure 25, the first dielectric portion 19 may penetrate (i.e., be interrupted) at least one leakage path 15. The isolation effect of the dielectric layer 14 between the portions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13 corresponding to the leakage path 15 is eliminated, and the conductivity resistance of those portions corresponding to the leakage path 15 decreases. At the same time, when forming the first doped semiconductor layer 12 and the second doped semiconductor layer 13 included in the laminated structure, the portion of the dielectric layer 14 corresponding to the leakage path 15 helps to reduce the degree to which the diffusion of dopants on one side away from the semiconductor substrate 11 to the opposite side of the dielectric layer 14 via the leakage path 15 is inhibited, increasing the butt area of ​​the direct or indirect electrical connection region between the first doped semiconductor layer 12 and the second doped semiconductor layer 13, further reducing the reverse dielectric breakdown voltage of the back contact battery, and further improving the ability to prevent burnout of the back contact battery in mounting environments with many shielding materials such as dust.

[0193] As a second type, as shown in Figure 26, the thickness of the portion of the first dielectric portion 19 corresponding to at least one leakage passage 15 is smaller than the thickness of the rest of it. In actual application, by removing a portion of the thickness of the portion of the first dielectric portion 19 corresponding to the leakage passage 15, the degree to which the portion of the dielectric layer 14 corresponding to the leakage passage 15 inhibits the diffusion of dopants on one side away from the semiconductor substrate 11 to the opposite side of the dielectric layer 14 via the leakage passage 15 can be reduced, thereby reducing the risk of hot spots in the back-contact battery. Furthermore, the thickness of the portion of the first dielectric portion 19 remaining in the leakage passage 15 can control the dopant diffusion range, and further control the butt area of ​​the direct or indirect electrical connection regions of the first doped semiconductor layer 12 and the second doped semiconductor layer 13. Finally, the reverse dielectric breakdown voltage and leakage loss of the back-contact battery can be adjusted and controlled, improving the applicability of the back-contact battery provided in the embodiment of this application to different use cases.

[0194] In this second type case, if we define H1 as the thickness of the portion of the first dielectric that corresponds to at least one leakage path, and H2 as the thickness of the portion of the first dielectric that does not correspond to a leakage path, then the data range for the ratio of H1 to H2 can be determined according to the reverse dielectric breakdown voltage and leakage loss of the back-contact battery in the actual use case, and is not specifically limited here. For example, the ratio of H1 to H2 may be greater than 0 and less than or equal to 0.5. A large ratio of H1 to H2 prevents the thickness of the portion of the first dielectric layer remaining in the leakage path from becoming large, which increases the resistance of the electrical connection between the first doped semiconductor layer and the second doped semiconductor layer through the leakage path. This helps to reduce the transport heat output in the leakage path when the back-contact battery is shielded, further improving the hot spot risk of the back-contact battery.

[0195] As a third type, the density of the portion of the first dielectric part corresponding to the leakage path is smaller than the density of the rest of the dielectric part. Another example of the installation configuration of the first dielectric part in the leakage path can be provided. In this case, the density of the portion of the first dielectric part corresponding to the leakage path is small, and in contrast, the density of the portion of the first dielectric part corresponding to the leakage path is low. This reduces the degree to which the portion of the dielectric layer corresponding to the leakage path inhibits the diffusion of dopants on one side away from the semiconductor substrate to the opposite side of the dielectric layer via the leakage path, thereby reducing the risk of hot spots in the back-contact battery. The density of the portion of the first dielectric part corresponding to the leakage path and the density of the rest of the dielectric part can be determined according to the requirements for the reverse dielectric breakdown voltage and leakage loss of the back-contact battery in the actual use case, and is not specifically limited here.

[0196] Regarding the leakage current passages provided within the first dielectric section, the number and size of the leakage current passages within the first dielectric section affect the occupancy ratio in the third region of the reverse leakage current area, and further affect the reverse dielectric breakdown voltage and leakage current loss of the back contact battery. Therefore, the number and size of the leakage current passages provided within the first dielectric section can be determined according to the actual use case and are not specifically limited here. Only one leakage current passage may be provided within the first dielectric section, or multiple leakage current passages may be provided. Furthermore, the specific meaning represented by the size of the leakage current passage can be determined according to the specific form of the leakage current passage and are not specifically limited here. Generally, the size of a leakage current passage refers to the size of the cross-section perpendicular to the direction from the first doped semiconductor layer to the second doped semiconductor layer. For example, if the cross-sectional shape of the leakage current passage is circular, the size of the leakage current passage may be the radius or diameter of the circle. Furthermore, for example, if the cross-sectional shape of the leakage current passage is square, the size of the leakage current passage may be the length of the sides of the square. Next, the cross-sectional shape of the leakage path may be anything other than a circle or square, such as an ellipse, triangle, rhombus, trapezoid, parallelogram, or rectangle.

[0197] For example, the total size of the leakage pathways may be between 50 μm and 200 μm. For instance, the total size of the leakage pathways may be 50 μm, 60 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, or 200 μm (it should be noted that when only one leakage pathway is established in the first dielectric part, the total size of the leakage pathways is the size of that single leakage pathway. When multiple leakage pathways are established in the first dielectric part, the total size of the leakage pathways is the sum of the sizes of the multiple leakage pathways). When the back contact battery provided in the embodiment of this application is installed in an environment with little shielding such as bird droppings, leaves, or dust, by setting the total size of the leakage pathways to a small range, the occupancy ratio between the first and second regions of the reverse leakage area can be reduced, thereby further reducing leakage losses in the forward voltage region of the back contact battery and helping to ensure high operating efficiency of the back contact battery. When the back-contact battery provided in the embodiments of this application is installed in an environment with many obstructions such as bird droppings, leaves, or dust, increasing the total size of the leakage pathways increases the occupancy ratio between the first and second regions of the reverse leakage area, thereby helping to reduce the reverse dielectric breakdown voltage of the back-contact battery and ensure a low hot spot risk for the back-contact battery. However, if the total size of the leakage pathways is too large, it is prone to causing localized overheating, affecting the hot spot prevention effect, and this problem is particularly pronounced when there is only one leakage pathway. Therefore, controlling the total size of the leakage pathways within the above range contributes to improving the hot spot prevention capability of the back-contact battery. As can be seen from the above, the total size of the leakage pathways can be set according to different environmental requirements to improve the applicability of the back-contact battery provided in the embodiments of this application to different actual use cases. The size of one leakage pathway refers to the distance between two points on the edge of the leakage pathway in a certain direction, and generally the maximum size of this dimension is selected. The total size of the leakage pathways is the sum of the sizes of the leakage pathways taken in the same direction.

[0198] For example, when multiple leakage paths are provided within the first dielectric portion, the size of at least one leakage path shall be 5 μm or more and 80 μm or less. For example, when multiple leakage paths are provided within the first dielectric portion, the size of at least one leakage path may be 5 μm, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, or 80 μm, etc. This improves the applicability of the back-contact battery provided in the embodiment of this application to different actual use cases. For the principle of application of the beneficial effect in this case, refer to the principle of application of the beneficial effect when the total size of the leakage paths is 50 μm or more and 200 μm or less, as described above, and a detailed explanation is omitted here. Furthermore, by reducing the size of a single leakage path, overheating at one point can be avoided, and the risk prevention capability of the back-contact battery can be enhanced. By providing multiple points, it is possible to ensure that the leakage current is distributed effectively in a timely manner, and a low hot spot risk of the back-contact battery can be ensured.

[0199] Furthermore, when multiple leakage paths are provided within the first dielectric section, the distribution between different leakage paths affects the distribution density and the degree of dispersion in the third region of the reverse leakage area, and further affects the burnout prevention capability and operating efficiency of the back contact battery. Therefore, the distribution between different leakage paths can be determined according to the requirements for the above-mentioned conditions of the back contact battery in actual use cases, and this is not specifically limited here.

[0200] For example, when multiple leakage paths are provided within the first dielectric section, the distance between two adjacent leakage paths may be 1 μm or more and 200 μm or less. For example, the distance between two adjacent leakage paths may be 1 μm, 5 μm, 10 μm, 20 μm, 50 μm, 80 μm, 100 μm, 150 μm, or 200 μm. Here, the distance between two adjacent leakage paths is the distance between the adjacent edges of the two leakage paths, and generally the shortest distance is used as the distance. It can be understood that, when the size of the leakage path is constant, the distance between the geometric centers of two adjacent leakage paths and the distribution density of the leakage path in the first dielectric section are inversely proportional. The distance between two adjacent leakage paths and the distribution density of the leakage path in the first dielectric section are also inversely proportional. The distribution density of the leakage path in the first dielectric section is approximately directly proportional to the leakage loss in the forward voltage region of the back contact battery and inversely proportional to the reverse dielectric breakdown voltage of the back contact battery. Based on this, when the back-contact battery provided in the embodiment of this application is installed in an environment with little shielding such as bird droppings, leaves, or dust, increasing the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths can reduce the occupancy ratio between the first and second regions of the reverse leakage area, thereby further reducing leakage losses in the forward voltage region of the back-contact battery and helping to ensure high operating efficiency of the back-contact battery. When the back-contact battery provided in the embodiment of this application is installed in an environment with a lot of shielding such as bird droppings, leaves, or dust, decreasing the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths can increase the occupancy ratio between the first and second regions of the reverse leakage area, thereby reducing the reverse dielectric breakdown voltage of the back-contact battery and helping to ensure a low hot spot risk for the back-contact battery. Furthermore, the distance between two adjacent heating points can be controlled by controlling the distance between the geometric centers of two adjacent leakage current pathways or the distance between two adjacent leakage current pathways. By adjusting the distance and distributing the heating points, overlapping heating points can be avoided, thus preventing localized overheating.As can be seen from the above, in order to improve the applicability of the back contact battery provided in the embodiment of this application to different actual use cases, the distance between the geometric centers of two adjacent leakage paths or the distance between two adjacent leakage paths can be set according to different environmental requirements.

[0201] Next, when multiple leakage paths are provided within the first dielectric portion, the distance between two adjacent leakage paths may or may not be equal. Here, when the distance between two adjacent leakage paths is equal, the distance between adjacent leakage points between the first doped semiconductor layer and the second doped semiconductor layer in the laminated structure is equal, which helps to achieve a uniform distribution in the third region of the reverse leakage region, further helps to achieve dispersion of the heat generation region, prevents the occurrence of burnout problems due to localized heat concentration in the back contact battery, further improves the burnout prevention capability of the back contact battery, and effectively improves the safety of the back contact battery.

[0202] For example, the minimum distance between the leakage path and the edge of the first dielectric part may be 5 μm or more and 50 μm or less. For instance, the minimum distance between the leakage path and the edge of the first dielectric part may be 5 μm, 10 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, or 50 μm. In the actual manufacturing process, the leakage path can be created within the first dielectric part by an etching process such as laser or wet etching. Based on this, by defining a minimum spacing range, it is possible to avoid damage to the portion of the first doped semiconductor layer adjacent to the third region and / or the portion of the second doped semiconductor layer adjacent to the third region provided in the second region during the leakage path fabrication process, due to the leakage path being too close to the edge of the first dielectric portion, thereby affecting carrier collection and further impacting battery efficiency. It is also possible to prevent the distribution density of the leakage path in the first dielectric portion from becoming low due to a large minimum spacing, ensuring that the reverse leakage region occupies a predetermined proportion of the third region and securing a low hot spot risk for back-contact batteries. Furthermore, by keeping the minimum spacing between the leakage path and the edge of the first dielectric portion within the above range during the actual manufacturing process, it is possible to prevent the etching process from affecting other structures adjacent to the edge of the first dielectric portion due to a small minimum spacing. For example, when forming a leakage path in a laser etching process, it is possible to prevent damage by the high-temperature laser to the portion of the first doped semiconductor layer in the first region that is close to the third region and / or the portion of the second doped semiconductor layer in the second region that is close to the third region, thereby ensuring high carrier collection capability of the first doped semiconductor layer in the first region and the second doped semiconductor layer in the second region, and further improving the operating performance of the back contact battery. In addition, it is possible to prevent the distribution density in the first dielectric portion of the leakage path from becoming low due to the large minimum gap, so that the reverse leakage region occupies a predetermined proportion of the third region, thereby ensuring a low hot spot risk for the back contact battery.

[0203] The specific distribution of leakage current paths between the first and second regions can be determined according to the configurations of the first and second regions and the actual use case, and is not specifically limited here.

[0204] As shown in Figures 33 and 34, in a single laminated structure, the leakage current passages 15 are continuously distributed in the direction of extension of the laminated structure. This increases the butt area of ​​the electrical connection region via the leakage current passages 15 between the first doped semiconductor layer and the second doped semiconductor layer, increases the area occupancy ratio of the reverse leakage current region on the first surface, and further helps to improve the burnout prevention capability of the back contact battery. Also, in a single laminated structure, when the leakage current passages 15 are continuously distributed in the direction of extension of the laminated structure, the size of the leakage current passage 15 refers to the width in the direction from the first region 16 to the second region 17. For example, when the first region 16 and the second region 17 are distributed in a strip shape with a gap between them, the size of the leakage current passage 15 is the width in the distribution direction of the different finger-shaped regions 220 of the leakage current passage 15. Furthermore, for example, when the first region 16 and the second region 17 are distributed in a cross-finger shape with a gap between them, the size of the leakage path 15 is the width of the leakage path 15 in the direction from the first region 16 to the second region 17. For example, the size of the leakage path may be 50 μm or more and 200 μm or less. For example, the size of the leakage path may be 50 μm, 60 μm, 70 μm, 80 μm, 100 μm, 120 μm, 150 μm, or 200 μm, etc.

[0205] Alternatively, as shown in Figures 31, 32, and 35, a plurality of spaced leakage current passages 15 may be provided within the first dielectric portion located in a single laminated structure. Compared to the case where the leakage current passages 15 are continuously distributed, the portions of the first dielectric portion between adjacent leakage current passages 15 have an insulating or semi-insulating effect, thereby electrically isolating the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity types. Therefore, compared to continuously distributed leakage current passages, when a plurality of spaced leakage current passages are provided within the first dielectric portion located in a single laminated structure, the butt area of ​​the electrical connection region between the first doped semiconductor layer and the second doped semiconductor layer via the leakage current passages 15 is reduced, the area occupied by the first surface of the reverse leakage current region is reduced, and the operating performance of the back contact battery is further improved. In addition, this further disperses the leakage current and heat-generating points, preventing heat from concentrating locally and causing burnout problems, and further improving the burnout prevention capability of the back contact battery. The spacing distribution direction of the different leakage current passages 15 provided within the first dielectric portion located in a single laminated structure can be set according to actual needs and is not specifically limited thereto. For example, the spacing distribution direction of the different leakage current passages 15 provided within the first dielectric portion located in a single laminated structure may be parallel to the extending direction of the laminated structure, parallel to the direction from the first region 16 to the second region 17, or parallel to the diagonal direction of the third region 18, etc.

[0206] For example, as shown in Figure 27, when the first region 16 and the second region 17 are distributed alternately in a strip-like manner with gaps between them, the orthographic projection of the leakage current passage 15 onto the first surface is located between the finger-shaped region 220 included in the first region 16 and the adjacent finger-shaped region 220 included in the second region 17.

[0207] For example, when the first and second regions are distributed in a cross-finger shape with spacing between them, the leakage path may include at least one first leakage path 222 located between a finger-shaped region 220 included in the first region 16 and an adjacent finger-shaped region 220 included in the second region 17, as shown in Figure 28. And / or, as shown in Figure 28, the leakage path also includes at least one second leakage path 223 located between a connecting region 221 included in one of the first region 16 and the second region 17, and a finger-shaped region 220 included in the other of the first region 16 and the second region 17. And / or, as shown in Figure 28, the leakage path may further include at least one third leakage path 224 located between the vertex angle of the finger-shaped region 220, in the direction of the extension of the diagonal of the finger-shaped region 220, where the orthographic projection onto the first surface includes one of the first region 16 and the second region 17, and the other of the first region 16 and the second region 17. When the first region 16 and the second region 17 are distributed in a cross-finger shape with a gap between them, there are at least three selectable locations for the installation of the leakage path between the first region 16 and the second region 17, which not only helps to improve the applicability of the back contact battery provided in the embodiment of this application to different use cases, but also eliminates the need to strictly control manufacturing precision or add additional operating steps to form the leakage path at a specific location, thus reducing the difficulty of manufacturing the back contact battery and simplifying the manufacturing procedure for the back contact battery. (It should be noted that in order to illustrate the possible distribution of the leakage path on the first surface side with a finite number of drawings, both Figures 27 and 28 show various possible distribution locations of the leakage path in the same drawing, but this does not mean that in the actual application process, the leakage path must be provided at all of the various possible distribution locations shown in the drawing simultaneously.)

[0208] Here, when the first and second regions are distributed in a cross-finger shape with spacing between them, and the leakage path includes at least one first leakage path, in the first direction, the length of the finger-shaped region is greater than its own width, so the first leakage path provided between the finger-shaped region included in the first region and the adjacent finger-shaped region included in the second region has a large installable range in the first direction. The distance between the short side and apex angle position of the finger-shaped region included in one of the first and second regions and the connecting region included in the other of the first and second regions is small, making it easier to fabricate conductive materials for the second and third leakage paths. The distance between the apex angle of the finger-shaped region included in one of the first and second regions in the diagonal extension direction and the other of the first and second regions is large compared to the distance between the lengths of two adjacent finger-shaped regions and the distance between the finger-shaped region and the adjacent connecting region distributed with spacing between it and itself. In a laminated structure, the width between the apex angle provided in the finger-shaped region included in one of the first or second regions and the other of the first or second regions is also large, and in this case, a third leakage passage with a large cross-sectional area along the direction parallel to the first surface can be provided. In other words, the cross-sectional area of ​​the third leakage passage along the direction parallel to the first surface may be larger than the cross-sectional area of ​​the first leakage passage and / or the second leakage passage along the direction parallel to the first surface. By providing a leakage passage with a large cross-sectional area in a wide laminated structure, it becomes necessary to provide a first leakage passage and / or a second leakage passage with a large cross-sectional area at intervals to ensure a low reverse dielectric breakdown voltage of the back contact battery and increase the occupancy ratio of the reverse leakage region on the first surface side, thereby reducing process difficulty and contributing to improved yield of back contact batteries.

[0209] Of course, the cross-sectional area of ​​the third leakage passage in the direction parallel to the first surface may be less than or equal to the cross-sectional area of ​​the first leakage passage and / or the second leakage passage in the direction parallel to the first surface.

[0210] For example, as shown in Figures 29 and 30, as described above, when one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is closer to the semiconductor substrate is the first doped semiconductor layer, at least a portion of the first region 16 and the third region 18 constitute a rectangular region, or when one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure that is closer to the semiconductor substrate is the second doped semiconductor layer, at least a portion of the second region 17 and the third region 18 constitute a rectangular region. Here, one rectangular region has at least two first sides (i.e., the long sides of the rectangular region) extending in the first direction. One rectangular region has at least two second sides (i.e., the short sides of the rectangular region) extending in the second direction. The first direction is parallel to the direction in which the long sides of the rectangular region extend, and the second direction is parallel to the direction in which the short sides of the rectangular region extend. Furthermore, in a single rectangular region, at least the first side and the adjacent second side form the vertex angle of the rectangular region (wherein, if the rectangular region is a regular rectangular region with a right angle at its vertex, the vertex angle of the rectangular region is formed by connecting only the first side and the adjacent second side of one rectangular region; if the rectangular region is a chamfered rectangular region, the vertex angle of the rectangular region is formed by connecting the first side, the adjacent second side, and the adjacent chamfered side of one rectangular region). Understandably, a laminated structure is provided in the third region 18, and a first dielectric portion having a leakage path is provided between the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure. Based on this, when at least a portion of the first region 16 and the third region 18 constitute a rectangular region, the leakage path is provided within the range corresponding to the third region 18 of the rectangular region. Alternatively, when at least a portion of the second region 17 and the third region 18 constitute a rectangular region, the leakage path is provided within the range corresponding to the third region 18 of the rectangular region.

[0211] In the above case, the leakage path may include at least one first leakage path 222 provided on at least one first side along the first direction of the rectangular region, and / or the leakage path may include at least one second leakage path 223 provided on at least one second side along the second direction of the rectangular region.

[0212] Next, the leakage path may include at least one third leakage path 224 provided at at least one vertex angle of the rectangular area.

[0213] As can be seen from the above, there are at least three selectable examples of installation positions for the leakage path within the rectangular area, which not only helps to improve the applicability of the back contact battery provided in the embodiment of this application to different use cases, but also helps to reduce the difficulty of manufacturing the back contact battery and simplify the manufacturing procedure for the back contact battery, as it eliminates the need to strictly control manufacturing precision or add additional operating steps to form the leakage path at a specific location.

[0214] The leakage current pathway may include at least one of the first, second, and third leakage current pathways, any two of them, or all three of them. The specific installation location of the leakage current pathway can be determined according to the distribution of the first, second, and third regions (it should be noted that, in order to explain the possible distribution of the leakage current pathway on the first side using a finite drawing, Figures 29 and 30 both show various possible distribution locations of the leakage current pathway on the same drawing, but this does not mean that in actual application, the leakage current pathway must be installed simultaneously in various possible distribution locations shown in the drawing).

[0215] Here, we will explain using the example that at least a portion of the first region and the third region constitute a rectangular region.

[0216] For example, as shown in Figure 29, when a rectangular area consisting of the entire first area 16 and the third area 18 and a part of the second area 17 are distributed alternately in a strip-like manner with gaps between them, the leakage current passage may include at least one first leakage current passage 222, and / or at least one leakage current passage may include at least one third leakage current passage 224.

[0217] Furthermore, for example, as shown in Figure 30, when a rectangular region composed of a portion of the first region 16 and the third region 18, the remaining portion of the first region 16, and a portion of the second region 17 are distributed alternately at intervals in a cross-finger shape, the leakage current passage may include at least one first leakage current passage 222, and / or the leakage current passage may include at least one second leakage current passage 223, and / or the leakage current passage may include at least one third leakage current passage 224.

[0218] It should be noted that, as shown in Figures 29 and 30, when the leakage path includes at least one first leakage path 222, the length of the rectangular area is greater than its width in the first direction, so the first leakage path 222 has a large installation range along the long side of the rectangular area. The fabrication of conductive material for the second leakage path 223 and the third leakage path 224 is easier along the short side and at the apex angle of the rectangular area. Next, the distance between the electrode and the apex angle of the rectangular area is larger than the distance between the electrode and the long side of the rectangular area, and the distance between the electrode and the short side of the rectangular area. In this case, a third leakage path 224 with a large cross-sectional area along the direction parallel to the first surface can be provided. In other words, the cross-sectional area of ​​the third leakage path 224 along the direction parallel to the first surface may be larger than the cross-sectional area of ​​the first leakage path 222 and / or the second leakage path 223 along the direction parallel to the first surface. In this way, a large cross-sectional area leakage passage can be provided in a wide laminated structure, ensuring a low reverse dielectric breakdown voltage of the back contact battery. At the same time, it eliminates the need to provide a first leakage passage 222 and / or a second leakage passage 223 with a large cross-sectional area at intervals to increase the proportion of the reverse leakage area occupied on the first surface side, thereby reducing process difficulty and contributing to improved yield of back contact batteries.

[0219] Of course, the cross-sectional area of ​​the third leakage passage in the direction parallel to the first surface may be less than or equal to the cross-sectional area of ​​the first leakage passage and / or the second leakage passage in the direction parallel to the first surface.

[0220] Furthermore, it should be explained that, as mentioned above, when at least a portion of one of the first and second regions and the third region form a rectangular region, the third region 18 may be located between each region of the first region 16 and each region of the second region 17, as shown in Figure 33, in which case the first region 16 and the second region 17 are distributed in a strip-like manner with spacing between them. Alternatively, the third region 18 may be located between only a portion of the first region 16 and only a portion of the second region 17, in which case the distribution of the first region 16 and the second region 17 can be set according to the actual demand, for example, the first and second regions may be distributed in a strip-like manner with spacing between them, or they may be distributed in a cross-finger-like manner with spacing between them.

[0221] Selectively, embodiments of this application provide a method for manufacturing a back-contact battery. The method for manufacturing a back-contact battery includes the following steps:

[0222] First, a semiconductor substrate is provided. The semiconductor substrate has a first surface and a second surface. The first surface includes a first region and a second region distributed at intervals, and a third region located between the first region and the second region. The material and conductivity type of the semiconductor substrate, and the distribution of the first region, second region, and third region on the first surface can be found in the above description, and a detailed explanation is omitted here.

[0223] Next, the first doped semiconductor layer is formed in the first and third regions.

[0224] For example, an intrinsic semiconductor layer can be formed on the first surface side, extending across the entire surface, by a process such as chemical vapor deposition. Next, a first doped semiconductor layer can be formed on the intrinsic semiconductor layer by doping the intrinsic semiconductor layer through a doping process such as diffusion or ion implantation. It should be explained that when the material of the first doped semiconductor layer contains silicon and the first doped semiconductor layer is formed by a diffusion process, a doped silicate glass is formed on the side of the first doped semiconductor layer opposite to the semiconductor substrate after the first doped semiconductor layer has been formed. Next, in the actual manufacturing process, if the doped silicate glass is not formed after the first doped semiconductor layer has been formed in other cases, it is necessary to form a mask layer on the side of the first doped semiconductor layer opposite to the semiconductor substrate by a process such as chemical vapor deposition. Next, the portion located in the second region of the doped silicate glass or mask layer (or the portion corresponding to the local region of the first region and the second region, or the portion corresponding to the second region and the third region, or the portion corresponding to the second region, the third region and the fourth region, or the portion corresponding to the local region of the first region, the second region and the third region, or the portion corresponding to the local region of the first region, the second region and the third region) can be removed by selective etching of the doped silicate glass or mask layer using a process such as a laser. Next, the first doped semiconductor layer in the region not covered by the doped silicate glass or mask layer is removed by the protective effect of the doped silicate glass or mask layer.

[0225] It should be explained that if the dielectric layer does not contain doped silicate glass or a mask layer, the doped silicate glass or mask layer must be removed before forming the second doped semiconductor layer.

[0226] Furthermore, if the manufactured back contact battery further includes a first interface passivation layer, it is necessary to form the first interface passivation layer on the first surface side before forming the first doped semiconductor layer. Next, after forming the first doped semiconductor layer that extends across the entire surface of the first interface passivation layer, selective etching of the first interface passivation layer and the first doped semiconductor layer can be achieved using the same doped silicate glass or mask layer. Alternatively, the first interface passivation layer can be selectively etched independently via the corresponding mask before forming the first doped semiconductor layer.

[0227] Next, a dielectric layer is formed in a portion corresponding to at least the third region of the first doped semiconductor layer.

[0228] For example, when the dielectric layer is formed of doped silicate glass or a mask layer, a leakage current passage can be created within the first dielectric portion by an etching process such as a laser etching process or a wet etching process. When the dielectric layer includes not only doped silicate glass or a mask layer but also other dielectric film layers, or when the dielectric layer does not include doped silicate glass or a mask layer, it is necessary to form a dielectric layer that extends across the entire surface of the first doped semiconductor layer and the second region by a process such as chemical vapor deposition. Then, by an etching process such as a laser, portions of the dielectric layer that do not correspond to the third region can be removed, and at the same time, a leakage current passage can be created within the first dielectric portion contained in the dielectric layer.

[0229] Next, a second doped semiconductor layer is formed in the second and third regions. Here, the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. In the third region, the first doped semiconductor layer and the second doped semiconductor layer are arranged overlapping in the thickness direction of the semiconductor substrate to form a laminated structure. The portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate is the first dielectric portion. In the dielectric layer, at least one leakage current passage is provided within the first dielectric portion. In the third region, in the direction from the first region toward the second region, the width of the first dielectric portion is greater than or equal to the width of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure that are furthest from the semiconductor substrate.

[0230] For example, a first doped semiconductor layer and an intrinsic semiconductor layer provided across the entire surface of a second region can be formed by a process such as chemical vapor deposition. Next, a second doped semiconductor layer can be formed on the intrinsic semiconductor layer by doping the intrinsic semiconductor layer by a doping process such as diffusion or ion implantation. Next, a mask layer needs to be formed on the side of the second doped semiconductor layer opposite to the semiconductor substrate by a process such as chemical vapor deposition (if a doped silicate glass is formed on the side of the second doped semiconductor layer opposite to the semiconductor substrate after the second doped semiconductor layer has been formed, and the doped silicate glass can be used as a mask layer, then it is not necessary to separately form a mask layer by a chemical vapor deposition process). Next, the portion of the mask layer located in the first region (or the portion of the second doped semiconductor layer covering the first region and the fourth region corresponding to the first doped semiconductor layer) can be removed by selectively etching the mask layer with a process such as a laser. Next, the mask layer protects and removes at least the portion corresponding to the first region of the second doped semiconductor layer (if the second doped semiconductor layer is not formed in the fourth region, it is necessary to remove the portion corresponding to the fourth region of the second doped semiconductor layer). Finally, the mask layer can be removed by a process such as wet etching.

[0231] It should be explained that if the manufactured back contact battery further includes a second interface passivation layer, it is necessary to form the second interface passivation layer, which is provided across the entire surface of the first doped semiconductor layer and the second region, before forming the second doped semiconductor layer. Next, after forming the second doped semiconductor layer, which is provided across the entire surface of the second interface passivation layer, selective etching of the second interface passivation layer and the second doped semiconductor layer can be achieved using the same mask layer. Alternatively, the second interface passivation layer can be selectively etched independently using the corresponding mask before forming the second doped semiconductor layer.

[0232] In a second embodiment, the embodiment of the present application provides a solar module including a battery string and a package layer. The battery string is made up of multiple back-contact batteries connected together, as provided in the first embodiment and various realizations thereof. The package layer is for covering the surface of the battery string.

[0233] For the beneficial effects of the second embodiment and its various realizations in the embodiments of this application, refer to the analysis of the beneficial effects of the first embodiment and its various realizations, and a detailed explanation is omitted here.

[0234] The above description does not go into detail about the structure of each layer, etching, or other technical details. However, those skilled in the art should understand that layers, regions, etc., of a desired shape can be formed by various technical means. Furthermore, those skilled in the art can design methods that are not exactly the same as those described above to form the same structure. Also, although each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0235] The embodiments of this application have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this application. The scope of this application is limited by the appended claims and equivalents. A person skilled in the art can make various substitutions and modifications without departing from the scope of this application, and all such substitutions and modifications shall remain within the scope of this application. The various technical features disclosed in this application may be freely combined to form other embodiments, provided that there are no technical obstacles or inconsistencies, and all such other embodiments shall be within the scope of protection of this application. [Explanation of symbols]

[0236] 11 Semiconductor substrates 12. First doped semiconductor layer 13. Second doped semiconductor layer 14 Dielectric layer 15 Earth leakage path 16 First area 17 Second area 18 Third area 19. First Dielectric Section 20 Second Dielectric Section 21 First interface passivation layer 22 Second interface passivation layer 23 Third Doped Semiconductor Section 220 finger-like area 221 Connection Area 222 1st leakage path 223 2nd earth leakage path 224 3rd leakage path

Claims

1. A semiconductor substrate having opposing first and second surfaces, wherein the first surface includes a first region and a second region distributed at intervals, and a third region located between the first region and the second region, A first doped semiconductor layer provided in the first region and the third region, A second doped semiconductor layer provided in the second and third regions, wherein the doping types of the first doped semiconductor layer and the second doped semiconductor layer are opposite, and in the third region, the first doped semiconductor layer and the second doped semiconductor layer are provided overlapping in the thickness direction of the semiconductor substrate to form a stacked structure; A dielectric layer provided at least between the first doped semiconductor layer and the second doped semiconductor layer, having at least one leakage path, Back contact batteries, including

2. The back contact battery according to claim 1, wherein the thickness of the portion of the dielectric layer in which the leakage current passage is not provided is 13 nm or more.

3. The dielectric layer is interrupted in the leakage path. Alternatively, the back contact battery according to claim 2, wherein the thickness of the portion of the dielectric layer in which the leakage current passage is provided is 7 nm or less.

4. The back contact battery according to claim 1, wherein the first doped semiconductor layer and the second doped semiconductor layer are connected via the dielectric layer.

5. The back contact battery according to claim 2, further comprising a third doped semiconductor portion located between the first doped semiconductor layer and the second doped semiconductor layer and connected to the first doped semiconductor layer and the second doped semiconductor layer, respectively.

6. The back contact battery according to claim 5, wherein the material of the third doped semiconductor portion contains at least one doping element, the doping type of the third doped semiconductor portion is the same as the doping type of one of the first doped semiconductor layer and the second doped semiconductor layer, and the doping concentration of the doping element in the third doped semiconductor portion is smaller than the doping concentration of the doping element in one of the first doped semiconductor layer and the second doped semiconductor layer that has the same doping type as the third doped semiconductor portion.

7. The back contact battery according to claim 5, wherein the dielectric layer is provided between at least one of the first doped semiconductor layer and the second doped semiconductor layer and the third doped semiconductor portion, and at least one end of the third doped semiconductor portion is connected to the first doped semiconductor layer or the second doped semiconductor layer via the dielectric layer in which the leakage current passage is provided.

8. The back contact battery according to claim 7, wherein at least one group IIIA doping element and at least one group VA doping element are doped in the portion of the third doped semiconductor portion adjacent to the dielectric layer.

9. The back contact battery according to claim 5, wherein the abutting surface of the connection region between the third doped semiconductor portion and the first doped semiconductor layer and / or the abutting surface of the connection region between the third doped semiconductor portion and the second doped semiconductor layer forms an angle less than 90° with respect to the first surface of the semiconductor substrate.

10. The back contact battery according to claim 5, wherein the size of the crystal grains in the third doped semiconductor portion is smaller than the size of the crystal grains in at least one of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure.

11. When, of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, the one closer to the semiconductor substrate is the first doped semiconductor layer, the surface of the third region is higher than the surface of the second region in the direction from the second surface toward the first surface, and the dielectric layer further extends at least between the side wall transitioning from the third region to the second region and the second doped semiconductor layer, Alternatively, the back contact battery according to claim 1, wherein, of the first doped semiconductor layer and the second doped semiconductor layer included in the stacked structure, the one closer to the semiconductor substrate is the second doped semiconductor layer, the surface of the third region is higher than the surface of the first region in the direction from the second surface to the first surface, and the dielectric layer further extends at least between the side wall transitioning from the third region to the first region and the first doped semiconductor layer.

12. A dielectric layer is provided between a part of the first doped semiconductor layer and the first region included in the first surface, and at least one leakage current passage is provided in the portion of the dielectric layer corresponding to the first region. The back contact battery according to claim 1, and / or, the dielectric layer is provided between a part of the second doped semiconductor layer and a second region included in the first surface, and at least one leakage path is provided in the portion of the dielectric layer corresponding to the second region.

13. Of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, the one closer to the semiconductor substrate has a top surface away from the semiconductor substrate, a bottom surface close to the semiconductor substrate, and a side surface connecting the bottom surface and the top surface, and the other of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure, the one further away from the semiconductor substrate covers a portion of the top surface and a portion of the side surface of the one closer to the semiconductor substrate. The dielectric layer comprises a first dielectric portion and a second dielectric portion. The back contact battery according to claim 1, wherein the first dielectric portion is provided between the other side away from the semiconductor substrate and the top surface adjacent to the semiconductor substrate, and the second dielectric portion is provided between the other side away from the semiconductor substrate and the side surface adjacent to the semiconductor substrate.

14. At least one of the leakage current passages is located within the first dielectric portion, and / or At least one of the leakage current passages is located within the second dielectric portion, and / or The back contact battery according to claim 13, wherein at least one leakage path is located between the first dielectric portion and the second dielectric portion.

15. The portion of the dielectric layer provided between the first doped semiconductor layer and the second doped semiconductor layer in the thickness direction of the semiconductor substrate is a first dielectric portion, and in the dielectric layer, at least one leakage current passage is provided within the first dielectric portion, and in the third region, in the direction from the first region toward the second region, the width of the first dielectric portion is greater than or equal to the width of the first doped semiconductor layer and the second doped semiconductor layer included in the laminated structure that is furthest from the semiconductor substrate, according to claim 1.

16. The first dielectric portion penetrates at least one of the leakage current passages, Alternatively, if the thickness of the portion of the first dielectric part corresponding to at least one of the leakage current passages is H1, and the thickness of the portion of the first dielectric part not corresponding to the leakage current passage is H2, then the ratio of H1 to H2 is greater than 0 and less than or equal to 0.5, the back contact battery according to claim 15.

17. The back contact battery according to claim 1, further comprising a first electrode electrically connected to the first doped semiconductor layer and a second electrode electrically connected to the second doped semiconductor layer.

18. A battery string comprising a plurality of back contact batteries according to any one of claims 1 to 17, A package layer for covering the surface of the battery string, Solar modules, including...

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