Doping of metal barrier layers

Abstract

Methods for doping barrier layers such as tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), and molybdenum nitride (MoN) are described. The dopants can include one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), and the like. The doped barrier layers provide improved adhesion at thicknesses of less than about 15 Å.

Description

[Technical Field]

[0001] Embodiments of this disclosure generally relate to methods for processing and / or doping barrier layers. More specifically, embodiments of this disclosure relate to methods for processing and doping ALD metal barrier films with ruthenium. [Background technology]

[0002] Microelectronic devices, such as semiconductors or integrated circuits, can contain millions of electronic circuit components, including transistors and capacitors. To further increase the density of devices found on integrated circuits, smaller feature sizes are desired. To achieve these smaller feature sizes, the sizes of conductive wires, vias, and interconnects, gates, etc., must be reduced. Reliable formation of multi-level interconnect structures is also necessary to improve circuit density and quality. Advances in manufacturing technology have made it possible to use copper in conductive wires, interconnects, vias, and other structures. However, electromigration in interconnect structures remains a major obstacle to overcome, along with the reduction of feature sizes for interconnects and the increased use of copper. Such electromigration can adversely affect the electrical properties of various components of the integrated circuit.

[0003] Specifically, at nodes below 5 nm, the thickness of the copper interconnect barrier and liner becomes more challenging in terms of device reliability and barrier layer adhesion. Furthermore, the baseline thickness of the barrier film and liner at 5 nm is approximately 45 Å. Increased thickness reduces the space available for gap filling, potentially increasing resistivity.

[0004] Tantalum nitride (TaN) is a copper barrier with a film thickness exceeding 10 Å, and the film is continuous. However, at nodes less than 22 nm, TaN deposited by thermal atomic layer deposition (thermal ALD) does not provide a good copper barrier layer. Therefore, a new method is needed to deposit films that are effective copper barriers. [Overview of the project]

[0005] Embodiments of the present disclosure provide a method for forming a doped barrier layer. In one or more embodiments, the method includes the steps of: forming a first barrier film on a substrate by atomic layer deposition; doping the first barrier film with a dopant metal by exposing the first barrier film to a metal precursor during a flash chemical vapor deposition process; and forming a doped barrier layer by forming a second barrier film on the doped first barrier film by atomic layer deposition.

[0006] Further embodiments of the present disclosure relate to a method for forming a doped metal nitride layer. In one or more embodiments, the method includes the steps of: exposing a substrate having a dielectric layer having at least one feature to a first metal precursor and ammonia to form a first metal nitride film on the substrate; doping a first barrier film with a dopant metal by exposing the first metal nitride film to a dopant metal precursor during a flash chemical vapor deposition process; and exposing the substrate to the first metal precursor and ammonia to form a second metal nitride film on the doped first metal nitride film, thereby forming a doped metal nitride layer.

[0007] Further embodiments of the present disclosure relate to a non-transient computer-readable medium including instructions, which, when executed by a controller of a processing system, cause the processing system to perform operations to form a first barrier film on a substrate, to dope the first barrier film with a dopant metal to form a doped first barrier film, and to form a second barrier film on the doped first barrier film to form a doped barrier layer.

[0008] To allow for a more detailed understanding of the above-mentioned features of the present invention, a more specific description of the invention, which has been concisely summarized above, can be given by reference to embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only show typical embodiments of the invention and should not be considered limiting in scope, as the invention can accept other equally effective embodiments. [Brief explanation of the drawing]

[0009] [Figure 1] This is a process flow diagram according to one or more embodiments of the present disclosure. [Figure 2] This is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 3A] This is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 3B] This is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 3C] This is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 4] This is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 5] This is a cross-sectional view of a cluster tool according to one or more embodiments of the present disclosure. [Modes for carrying out the invention]

[0010] Before describing some exemplary embodiments of this disclosure, it should be understood that this disclosure is not limited to the configuration or process step details described below. Other embodiments of this disclosure are possible and can be implemented and performed in various ways.

[0011] As used herein and in the appended claims, the terms “substrate” and “wafer” are interchangeable and both refer to the surface or portion of a surface on which a process operates. Those skilled in the art will understand that a reference to a substrate may also refer to only a portion of the substrate unless the context explicitly indicates otherwise. In addition, a reference to depositing on a substrate may mean both a bare substrate and a substrate on which one or more films or features are deposited or formed.

[0012] As used herein, “substrate” refers to any substrate on which a film treatment is performed during a manufacturing process, or the surface of a material formed on a substrate. For example, substrate surfaces that can be treated include, depending on the application, materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, as well as any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. A substrate includes, but is not limited to, a semiconductor wafer. A substrate may be subjected to pretreatment processes for polishing, etching, reduction, oxidation, hydroxylation (or otherwise generating or grafting a target chemical moiety to impart chemical functionality), annealing, and / or baking of the substrate surface. In addition to performing film treatments directly on the surface of the substrate itself, in this disclosure, any of the disclosed film treatment steps may also be performed on an underlying layer formed on the substrate, as will be disclosed in more detail below, and the term “substrate surface” is intended to include the underlying layer as indicated in the context. Therefore, for example, when a film / layer or partial film / layer is deposited on a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface. What constitutes a given substrate surface depends on what kind of film is deposited and the specific chemicals used.

[0013] As used herein and in the appended claims, terms such as “reactive gas,” “precursor,” and “reactant” are used interchangeably to mean a gas containing a nuclide that reacts with the substrate surface. For example, the first “reactive gas” may simply be adsorbed onto the substrate surface and available for further chemical reactions with a second reactive gas.

[0014] As used herein, the term “approximately” means roughly or nearly, and in the context of the numbers or ranges described, it means a variation of ±15% or less of the number. For example, values ​​that differ by ±14%, ±10%, ±5%, ±2%, or ±1% satisfy the definition of approximately.

[0015] As used herein, “atomic layer deposition” or “periodic deposition” refers to the deposition of a layer of material on a substrate surface by sequentially exposing it to two or more reactive compounds. The substrate or a portion of the substrate is exposed separately to two or more reactive compounds introduced into the reaction zone of a processing chamber. In a time-domain ALD process, exposure to each reactive compound is separated by a time delay so that each compound can be deposited and / or reacted with the substrate surface and then purged from the processing chamber. These reactive compounds are said to be sequentially exposed to the substrate. In a spatial ALD process, different portions of the substrate surface or material on the substrate surface are simultaneously exposed to two or more reactive compounds such that no given point on the substrate is substantially exposed to two or more reactive compounds simultaneously. As used herein and in the appended claims, the term “substantially” as used in this respect means, as understood by those skilled in the art, that only a small portion of the substrate may be simultaneously exposed to multiple reactive gases by diffusion, and that simultaneous exposure is not intended.

[0016] In one aspect of a time-domain ALD process, a first reactive gas (i.e., a first precursor or Compound A) is pulsed into the reaction zone, followed by a first time delay. Next, a second precursor or Compound B is pulsed into the reaction zone, followed by a second delay. During each time delay, a purge gas such as argon is introduced into the processing chamber to purge the reaction zone or otherwise remove any residual reactive compounds or reaction by-products from the reaction zone. Alternatively, the purge gas may flow continuously throughout the deposition process such that only the purge gas flows during the time delay between pulses of the reactive compounds. The reactive compounds are pulsed alternately until the desired film or film thickness is formed on the substrate surface. In any scenario, the ALD process that pulses Compound A, the purge gas, Compound B, and the purge gas is a cycle, which can start with either Compound A or Compound B and continue through each sequence of the cycle until a film with a predetermined thickness is achieved.

[0017] In one embodiment of a spatial ALD process, a first reactive gas and a second reactive gas (e.g., nitrogen gas) are supplied to the reaction zone simultaneously but separated by an inert gas curtain and / or a vacuum curtain. The substrate is moved relative to the gas supply device such that any given point on the substrate is exposed to the first reactive gas and the second reactive gas.

[0018] The adhesion of the barrier layer is advantageously found to be improved by doping the barrier layer with one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), etc.

[0019] In one or more embodiments, the barrier layer can be deposited via ALD. In a typical ALD process, a film can be deposited using alternating pulses or flows of an "A" precursor and a "B" precursor. The alternating exposure of the surface to reactants "A" and "B" is continued until a film of the desired thickness is reached. However, instead of pulsing the reactants, the gas can be flowed simultaneously from one or more gas supply heads or nozzles, and the substrate and / or gas supply head can be moved so that the substrate is sequentially exposed to each of the reactive gases. Of course, the ALD cycles described above are merely illustrative of the many and diverse ALD process cycles in which the deposited layer is formed by alternating layers of precursor and co-reactant.

[0020] In one or more embodiments, the co-reactant is in the form of a vapor or gas. The reactants may be supplied with a carrier gas. The carrier gas, purge gas, deposition gas, or other process gas can include nitrogen, hydrogen, argon, neon, helium, or combinations thereof. The various plasmas described herein, such as nitrogen plasma or inert gas plasma, may be ignited from a plasma co-reactant gas and / or may include a plasma co-reactant gas.

[0021] In one or more embodiments, the various gases for the process may be pulsed from an inlet, through a gas channel, through various holes or outlets, into a central channel. In one or more embodiments, the deposition gas may be pulsed sequentially onto and through a showerhead. Alternatively, as described above, the gas can be flowed simultaneously through a gas supply nozzle or head, and the substrate and / or gas supply head can be moved so that the substrate is sequentially exposed to the gas.

[0022] In one or more embodiments, the barrier layer material and the dopant metal are deposited using a multi-chamber process with the barrier layer material (e.g., tantalum nitride (TaN)) and the dopant metal separated. In other embodiments, a single-chamber method is used, where all processes are carried out in a single chamber and the different layers are separated by gas purging.

[0023] Some embodiments of the present invention are intended for barrier applications, such as copper barrier applications. A barrier layer formed by one or more embodiments can be used as a copper barrier. Suitable barrier films for copper barrier applications include, but are not limited to, TaN and MnN. Suitable dopants for copper barrier applications include, but are not limited to, Ru, Cu, Co, Mn, Al, Ta, Mo, Nb, V, or combinations thereof. Plasma treatment can be used after doping to promote the formation of intermetallic compounds between the matrix and the dopant, remove film impurities, and improve the density of the barrier layer. In other embodiments, post-treatment may include, but is not limited to, physical vapor deposition (PVD), thermal annealing, and chemical strengthening. In some copper barrier applications, high-frequency plasma (defined as above about 14 MHz or above about 40 MHz) can be used with any inert gas, including, but not limited to, one or more of neon (Ne), hydrogen (H2), and argon (Ar) gases. In one or more embodiments, higher plasma frequencies (above 13.56 MHz) can be used to prevent low-k damage. In some embodiments, the barrier film is a copper barrier containing Ru-doped TaN.

[0024] Suitable precursors for depositing barrier films include metal-containing precursors and nitrogen-containing precursors. For example, if the barrier film is tantalum nitride (TaN), the tantalum-containing precursor may be pentakis(dimethylamino)tantalum (PDMAT), and the nitrogen-containing precursor may be ammonia. If the barrier film is manganese nitride (MnN), the manganese-containing precursor may be bis]bis(trimethylsilyl)amide]manganese(II) (Mn(TMSA)2). Other suitable precursors are known to those skilled in the art. Organic nuclides in the organic-containing precursors for barrier films may be partially incorporated into the underlying layer (such as a dielectric layer), thereby improving adhesion at the barrier-underlying layer interface.

[0025] In one or more embodiments, the dopant metal may be incorporated into the barrier layer by any suitable method known to those skilled in the art. For example, in one or more embodiments, the dopant metal may be incorporated into the barrier layer by alternating and / or co-flow of precursors in atomic layer deposition (ALD), chemical vapor deposition (CVD), and plasma atomic layer deposition (PEALD), a precursor having a polymetallic ligand, and dopant implantation / thermal diffusion. In one or more embodiments, when the dopant metal is incorporated into the barrier layer by alternating and / or co-flow of precursors in atomic layer deposition (ALD), chemical vapor deposition (CVD), and plasma atomic layer deposition (PEALD), a suitable metal-containing precursor can be used. Examples of suitable precursors include metal complexes containing the desired dopant, such as a dopant metal coordinated with an organic ligand or a carbonyl ligand. In one or more embodiments, the dopant precursor may contain a polymetallic ligand. A suitable dopant precursor should have a vapor pressure sufficient to be deposited by a suitable process such as ALD, plasma atomic layer deposition (PEALD), or chemical vapor deposition (CVD). In one or more embodiments, the dopant is deposited using a chemical vapor deposition (CVD) process.

[0026] As used herein, “chemical vapor deposition” refers to a process in which a substrate surface is exposed to precursors and / or co-reagents simultaneously or substantially simultaneously. As used herein, “substantially simultaneously” refers to either co-flow or when there is a substantial overlap in the exposure of precursors.

[0027] Depending on the dopant precursor used, co-reactants may be used to deposit the dopant. For example, reducing gases such as hydrogen and ammonia can be used as co-reactants to deposit some dopants. The metal dopant precursor and co-reactants may be flowed together or sequentially.

[0028] In one or more embodiments, ion implantation may be used to incorporate the dopant metal into the barrier layer. In other embodiments, a second metal dopant, such as cobalt (Co), can be added to the doped barrier layer using physical vapor deposition (PVD) co-treatment. In further embodiments, the barrier film can be annealed in an atmosphere containing the dopant metal to allow the dopant to thermally diffuse into the film.

[0029] In one or more embodiments, PVD treatment with dopant sputtering can be used as a method for incorporating dopants into the matrix. For example, PVD treatment using cobalt (Co) can be used to implant Co into a ruthenium tantalum nitride (RuTaN) matrix to form a RuTaN\Co compound. This treatment can be used to add a first dopant, or additional dopants other than the dopant inside the film.

[0030] In one or more embodiments, the dopant is not limited to metals. In one or more embodiments, nonmetals such as silicon (Si) and boron (B) can also be used as dopants. Nonmetallic dopants may also be used for thermal diffusion.

[0031] In some embodiments, instead of using a reducing gas coreactant, or in addition to it, a plasma post-treatment step may be used after the barrier film has been exposed to the dopant metal precursor. According to one or more embodiments, the plasma comprises any suitable inert gas known to those skilled in the art. In one or more embodiments, the plasma comprises one or more of helium (He), argon (Ar), ammonia (NH3), hydrogen (H2), and nitrogen (N2). In some embodiments, the plasma may include a mixture of Ar and H2, for example, a mixture having an Ar:H2 molar ratio in the range of 1:1 to 1:10. The plasma power may be in the range of about 200 to about 1000 watts. The plasma frequency may be in the range of 350 kHz to 40 MHz. The plasma treatment time may vary in the range of 5 seconds to 60 seconds, for example, 10 seconds to 30 seconds. In some embodiments, the pressure during plasma treatment may be in the range of 0.5 to 50 Torr, for example, 1 to 10 Torr. In some embodiments, the wafer spacing may be in the range of 100 mils to 600 mils.

[0032] In one or more embodiments, the barrier film may be exposed to dopant metal precursors during deposition, i.e., dopant metal precursors can be used sequentially in the ALD cycle to provide a doped barrier film. For example, an initial metal nitride barrier layer can be formed using 1 to 10 cycles of metal-containing precursors and nitrogen-containing precursors, followed by exposure to 1 to 10 cycles of dopant metal precursors, then the cycles of metal-containing precursors and nitrogen-containing precursors can be restarted, and then further doping can be optionally performed until the desired thickness of the doped barrier film is reached. Alternatively, in other embodiments, the barrier film may be completely deposited to the desired thickness before exposure to dopant metal precursors.

[0033] In various embodiments, the duration of exposure to the dopant metal-containing precursor may be in the range of 1 to 60 seconds, for example, 3 to 30 seconds or 5 to 10 seconds. The longer the exposure to the dopant metal precursor, the greater the doping of the barrier film, unless the barrier film reaches maximum doping relative to the density of the barrier film.

[0034] Figure 1 shows a process flow diagram of a method according to one or more embodiments. Figures 2 to 4 show cross-sectional views of a microelectronic device 200 according to one or more embodiments of the present disclosure. Referring to Figure 2, a dielectric layer 204 is formed on a substrate 202. In one or more embodiments, the dielectric layer 204 may include at least one feature 206. The figure shows a substrate with a single feature for illustrative purposes, but those skilled in the art will understand that two or more features may be present. The shape of the feature 206 can be any suitable shape, including but not limited to trenches and cylindrical vias. When used in this regard, the term “feature” means any intentional surface irregularity. Suitable examples of features include, but are not limited to, trenches with a top, two sidewalls and a bottom, and peaks with a top and two sidewalls. Features can have any suitable aspect ratio (ratio of the depth of the feature to the width of the feature). In some embodiments, the aspect ratio is approximately 5:1, 10:1, 15:1, 20:1, 25:1, 30:1, 35:1, or 40:1 or higher.

[0035] In one or more embodiments, at least one feature 206 includes a bottom 212, a first side wall 208, and a second side wall 210.

[0036] In one or more embodiments, the dielectric layer 204 is a low-k dielectric layer. In a particular embodiment, the dielectric layer 204 is silicon oxide (SiO₂ x ) includes. Further embodiments include a dielectric layer 204 which is porous or carbon-doped SiO x The invention provides that the dielectric layer 204 is porous or carbon-doped SiO2 having a k value of less than about 5. In some embodiments, the dielectric layer 204 is porous or carbon-doped SiO2 having a k value of less than about 5.x It is a layer. In other embodiments, the dielectric layer 204 is a multilayer structure. For example, in one or more embodiments, the dielectric layer 204 includes a multilayer structure having one or more of a dielectric layer, an etching stop layer, and a hard mask layer.

[0037] Referring to Figures 1 to 3A, in operation 104, a barrier film 214 is deposited on the dielectric layer 204 on the substrate 202. In some embodiments, the barrier film 214 is formed by a conformal deposition process. In some embodiments, the barrier film 214 is formed by one or more of atomic layer deposition or chemical vapor deposition.

[0038] In one or more embodiments, the deposition of the barrier film 214 is substantially conformal. In one or more embodiments, the barrier film 214 is formed on a first sidewall 208, a second sidewall 210, and a bottom 212 of at least one feature. As used herein, a “substantially conformal” layer refers to a layer whose thickness is substantially the same throughout (e.g., at the top, middle, and bottom of the sidewalls, and at the bottom of the opening 206). A substantially conformal layer may vary in thickness by only about 5%, 2%, 1%, or 0.5% or less.

[0039] Figure 3A shows a microelectronic device 200 after the deposition of a barrier film 214 covering at least a portion of the first side wall 208, the second side wall 210, and the bottom 212 of at least one feature 206. As shown in Figure 3B, the barrier layer 214 can cover the entire first side wall 208, the second side wall 210, and the bottom 212 of at least one feature 206. In one or more embodiments, the barrier film 214 may include one or more of the following: tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), molybdenum nitride (MoN), etc.

[0040] In one or more embodiments, the barrier film 214 is deposited by atomic layer deposition (ALD) and has a thickness ranging from about 2 Å to about 10 Å. In some embodiments, the barrier film 214 is deposited in a single ALD cycle. In other embodiments, the barrier film 214 is deposited in 1 to 15 ALD cycles.

[0041] Referring to Figures 1 and 3B, in operation 106, the barrier film 214 is doped by depositing a chemical vapor deposition of the doped barrier film 216. In one or more embodiments, the barrier film may be doped with one or more of the following: ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), etc. In a particular embodiment, the barrier film may be doped with ruthenium (Ru). Thus, in one or more embodiments, the doped barrier film 216 contains one or more of the following: ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), etc.

[0042] In one or more embodiments, the metal dopant diffuses through the barrier filler 214 into the dielectric layer 204. While not intended to be theoretical, it is conceivable that the metal dopant could selectively diffuse through the barrier layer 214 into the dielectric layer and form a complex with an electromigration-resistant dielectric material. One proposed mechanism is that the exposed precursor can preferentially migrate to the dielectric / barrier interface via grain boundaries or other weak pathways.

[0043] In one or more embodiments, the complex formed is a metal oxide (MO x ) or metal silicate (MSi x It may also be O). Therefore, the dopant is ruthenium (Ru) and the dielectric layer is silicon oxide (SiO). xIn embodiments including, ruthenium (Ru) diffuses through the barrier layer 214 and can form ruthenium oxide (RuO x ) or ruthenium silicon oxide (RuSiO x ). This ruthenium silicon oxide barrier layer can prevent the electromigration of copper from the conductive material 222 to the dielectric layer 204.

[0044] In other embodiments, the metal dopant can form an intermetallic compound with the barrier layer matrix, resulting in a high-density and low-resistivity phase that exhibits excellent barrier properties against copper (Cu), oxygen (O), carbon (C), etc., such as Ta x Ru y N or Ta x Ru y N z O is obtained.

[0045] In addition to being a barrier for the conductive material 222, the doped barrier layer 220 may also be a barrier against the diffusion of oxygen from the dielectric layer 204 to the conductive material 222. The diffusion of oxygen from the dielectric layer 204 to the conductive material 222 may result in oxygen reacting with components in the conductive material 222 and / or a seed layer (not shown). For example, if the conductive material contains copper (Cu), oxygen may react with copper at the interface between the barrier layer and the conductive material 222, and thus may fix the copper at the barrier layer / conductive material interface. As a result, copper cannot segregate throughout the conductive material. Similarly, if there is a seed layer containing copper, oxygen may react with the copper in the seed layer at the seed layer / barrier layer interface and fix the copper at the interface.

[0046] In one or more embodiments, it is believed that oxygen diffusing into the barrier layer reacts with the dopant and prevents oxygen from diffusing into the conductive material 222. As a result, oxygen is not available to react with the seed layer or the conductive material 222.

[0047] In one or more embodiments, the doped barrier film 216 is deposited by chemical vapor deposition and has a thickness in the range of about 1 Å to about 3 Å.

[0048] In one or more embodiments, the doped barrier film 216 contains dopants in the range of about 0.01 to about 50% by weight, based on the total weight of the barrier film. In certain embodiments, the doped barrier film 216 contains dopants in the range of about 5% to about 70%, for example, dopants in the range of about 10% to about 30% by weight, for example, dopants in the range of about 8% to about 25% by weight, or dopants in the range of about 10% to about 20% by weight. In some embodiments, the barrier film 214 contains dopants in the range of about 5 to about 30% by weight, for example, about 5% by weight, about 6% by weight, about 7% by weight, about 8% by weight, about 9% by weight, about 10% by weight, about 11% by weight, about 12% by weight, about 13% by weight, about 14% by weight, 15% by weight, about 16% by weight, about 17% by weight, about 18% by weight, about 19% by weight, about 20% by weight, about 21% by weight, about 22% by weight, about 23% by weight, about 24% by weight, 25% by weight, about 26% by weight, about 27% by weight, about 28% by weight, about 29% by weight, or about 30% by weight.

[0049] Referring to Figures 1 and 3C, in operation 108, a second barrier film 218 is deposited on the doped barrier film 216. In one or more embodiments, the second barrier film 218 contains the same material as the barrier film 214. In one or more embodiments, the second barrier film 218 may contain one or more of the following: tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), molybdenum nitride (MoN), etc.

[0050] In one or more embodiments, the second barrier film 218 is deposited by atomic layer deposition (ALD) and has a thickness ranging from about 2 Å to about 6 Å. In some embodiments, the second barrier film 218 is deposited in a single ALD cycle. In other embodiments, the second barrier film 218 is deposited in 1 to 15 ALD cycles.

[0051] In one or more embodiments, the doped barrier layer 220, comprising a barrier film 216, a doped barrier film 216, and a second barrier film 218, has a combined thickness in the range of about 5 Å to about 15 Å, or about 8 Å to about 10 Å. In further embodiments, the combined thickness is less than about 15 Å.

[0052] In one or more embodiments, the doped barrier layer 220 has a high metal content and amorphous crystallinity. While not intended to be theoretical, it is conceivable that doping the barrier layer reduces the ALD crystallinity of the deposited barrier layer, thereby reducing diffusion shortcuts at grain boundaries. Doping within the barrier layer rather than on top of it minimizes dopant diffusion, thus reducing the risk of integration and corrosion.

[0053] In one or more embodiments, the doped barrier layer 220 contains a dopant metal in the barrier film, the dopant metal being a nanocrystalline amorphous matrix. In certain embodiments, the doped tantalum nitride (TaN) barrier film contains ruthenium (Ru) in the tantalum nitride film, the ruthenium (Ru) being a nanocrystalline amorphous matrix. The doped barrier films of one or more embodiments exhibit better diffusion barrier properties than undoped barrier films. Furthermore, the doped barrier films of one or more embodiments exhibit excellent adhesion to copper and oxides.

[0054] In operation 110, the device is optionally post-processed. Optional post-processing operation 110 may be, for example, a process to modify the film properties (e.g., annealing), or a further film deposition process to grow an additional film (e.g., an additional ALD or CVD process). In some embodiments, optional post-processing operation 110 may be a process to modify the properties of the deposited film. In some embodiments, optional post-processing operation 110 includes a step of annealing the as-deposited film. In some embodiments, annealing is performed at temperatures in the range of approximately 300°C, 400°C, 500°C, 600°C, 700°C, 800°C, 900°C, or 1000°C. The annealing environment in some embodiments includes an inert gas (e.g., nitrogen molecules (N2), argon (Ar)), or a reducing gas (e.g., hydrogen molecules (H2) or ammonia (NH3)), or one or more oxidizing agents such as oxygen (O2), ozone (O3), or peroxides, but is not limited. Annealing can be performed over any appropriate length of time. In some embodiments, the film is annealed for a predetermined time ranging from about 15 seconds to about 90 minutes, or from about 1 minute to about 60 minutes. In some embodiments, annealing the film in its as-deposited state increases the film's density, decreases its resistivity, and / or improves its purity.

[0055] Referring to Figure 4, the conductive filler material 222 fills at least a portion of the trench 206, which is lined with a barrier film 214, a doped barrier film 216, and a second barrier film 218. According to one or more embodiments, the conductive filler material 222 comprises copper (Cu) or a copper alloy. In further embodiments, the conductive filler material 222 also comprises manganese (Mn). In other embodiments, the conductive filler material 222 further comprises aluminum (Al). In some embodiments, the conductive filler material 222 comprises tungsten (W).

[0056] In Figure 4, the conductive filler material 220 is shown in direct contact with the barrier layer 220, but an intermediate layer, such as an adhesive layer or seed layer, may be present between the conductive filler material 222 and the barrier layer 220. For example, in one or more embodiments, the microelectronic device 200 further includes an adhesive layer containing one or more of Ru and Co. In addition to Ru and / or Co, the adhesive layer may contain one or more dopants such as Mn, Al, Mg, Cr, Nb, Ti, or V. In some embodiments, the adhesive layer contains Ru and Mn. In other embodiments, the adhesive layer contains Co and Mn.

[0057] In certain embodiments, a seed layer (not shown) may be deposited on top of the doped barrier layer 220. According to one or more embodiments, the seed layer may include a copper alloy such as a Cu-Mn alloy.

[0058] In addition to being a copper barrier, the doped barrier layer 220 may also be a barrier against the diffusion of oxygen from the dielectric layer 204 to the conductive filler material 222. The diffusion of oxygen from the dielectric layer 204 to the conductive filler material 222 could result in the oxygen reacting with components in the conductive filler material 222 and / or the seed layer.

[0059] In some embodiments, the substrate is moved from the first chamber to a separate subsequent chamber for further processing. The substrate can be moved directly from the first chamber to a separate processing chamber, or it can be moved from the first chamber to one or more transfer chambers before being moved to a separate processing chamber. In some embodiments, the deposition of barrier and dopant films can be performed in a single chamber, and then post-processing can be performed in separate chambers. Thus, the processing apparatus can comprise multiple chambers communicating with transfer stations. This type of apparatus is sometimes referred to as a "cluster tool" or "clustered system."

[0060] Generally, a cluster tool is a modular system comprising multiple chambers that perform various functions, including substrate center detection and orientation, degassing, annealing, deposition, and / or etching. According to one or more embodiments, a cluster tool includes at least a first chamber and a central transfer chamber. The central transfer chamber can house a robot capable of shuttle transporting substrates between the processing chambers and the load lock chamber. The transfer chamber is typically maintained under vacuum and provides an intermediate step for shuttle transporting substrates from one chamber to another and / or to the load lock chamber located at the front end of the cluster tool. Two well-known cluster tools that may conform to this disclosure are Centura® and Endura®, both available from Applied Materials, Inc. in Santa Clara, California. However, the exact arrangement and combination of chambers may be modified for the purpose of performing specific steps of the processes described herein. Other available processing chambers include, but are not limited to, periodic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, chemical cleaning, plasma nitriding, degassing, orientation, hydroxide, and other substrate processes. Performing processes in chambers on the cluster tool allows for avoiding surface contamination of the substrate by atmospheric impurities without oxidation prior to subsequent film deposition.

[0061] According to one or more embodiments, the substrate is continuously under vacuum or "load-lock" conditions and is not exposed to ambient air when moving from one chamber to the next. Thus, the transfer chamber is under vacuum and "pumped down" under vacuum pressure. An inert gas may be present in the processing chamber or transfer chamber. In some embodiments, the inert gas is used as a purge gas to remove some or all of the reactants (e.g., reactants). According to one or more embodiments, the purge gas is injected at the outlet of the deposition chamber to prevent the reactants (e.g., reactants) from moving from the deposition chamber to the transfer chamber and / or additional processing chambers. Thus, the flow of the inert gas forms a curtain at the chamber outlet.

[0062] Substrates can be processed within a single-substrate deposition chamber, where a single substrate is loaded, processed, and unloaded before another substrate is processed. Substrates can also be processed sequentially, similar to a conveyor system, in which case multiple substrates are individually loaded into a first section of the chamber, move through the chamber, and unloaded from a second section. The shape of the chamber and associated conveyor system can form a straight or curved path. Furthermore, the processing chamber may be a carousel where multiple substrates move around a central axis and are subjected to processes such as deposition, etching, annealing, and washing throughout the entire carousel path.

[0063] During processing, the substrate can be heated or cooled. Such heating or cooling can be achieved by any suitable means, including but not limited to, changing the temperature of the substrate support and flowing a heated or cooled gas over the substrate surface. In some embodiments, the substrate support includes a heater / cooler that can be controlled to conductively change the substrate temperature. In one or more embodiments, the gas used (either a reactive or inert gas) is heated or cooled to locally change the substrate temperature. In some embodiments, the heater / cooler is located in a chamber adjacent to the substrate surface to convectively change the substrate temperature.

[0064] The substrate may also be stationary or rotating during processing. A rotating substrate can rotate continuously or in discontinuous steps (around the substrate axis). For example, the substrate may rotate throughout the entire process, or it may rotate only slightly between exposures to different reactive or purge gases. Rotating the substrate (continuously or in steps) during processing can help result in more uniform deposition or etching, for example, by minimizing the effects of local variations in the shape and dimensions of the gas flow.

[0065] Further embodiments of the present disclosure, as shown in Figure 5, relate to a processing tool 900 for forming the described device and carrying out the method. The cluster tool 900 includes at least one central transfer station 921, 931 having multiple sides. Robots 925, 935 are positioned within the central transfer stations 921, 931 and are configured to move robot blades and wafers to each of the multiple sides.

[0066] The cluster tool 900 comprises several processing chambers 902, 904, 906, 908, 910, 912, 914, 916, and 918, also called process stations, connected to a central transfer station. The various processing chambers provide separate processing areas isolated from adjacent process stations. The processing chambers can be any suitable chamber, including, but are not limited to, atomic layer deposition chambers, chemical vapor deposition chambers, annealing chambers, and the like. Specific arrangements of processing chambers and components can vary depending on the cluster tool and should not be construed as limiting the scope of this disclosure.

[0067] In the embodiment shown in Figure 5, the factory interface 950 is connected to the front of the cluster tool 900. The factory interface 950 includes a loading chamber 954 and an unloading chamber 956 on its front surface 951. The loading chamber 954 is shown on the left and the unloading chamber 956 is shown on the right, but those skilled in the art will understand that this is merely a representative example of one possible configuration.

[0068] The size and shape of the loading chamber 954 and unloading chamber 956 can vary, for example, depending on the substrate being processed by the cluster tool 900. In the illustrated embodiment, the loading chamber 954 and unloading chamber 956 are sized to hold a wafer cassette in which multiple wafers are arranged within the cassette.

[0069] Robot 952 is located within the factory interface 950 and can move between the loading chamber 954 and the unloading chamber 956. Robot 952 can transfer wafers from the cassette in the loading chamber 954 to the load lock chamber 960 via the factory interface 950. Robot 952 can also transfer wafers from the load lock chamber 962 to the cassette in the unloading chamber 956 via the factory interface 950. As will be understood by those skilled in the art, the factory interface 950 may have two or more robots 952. For example, the factory interface 950 may have a first robot that transfers wafers between the loading chamber 954 and the load lock chamber 960, and a second robot that transfers wafers between the load lock 962 and the unloading chamber 956.

[0070] The illustrated cluster tool 900 has a first section 920 and a second section 930. The first section 920 is connected to the factory interface 950 via load lock chambers 960, 962. The first section 920 includes a first transfer chamber 921 in which at least one robot 925 is located. The robot 925 is also called a robotic wafer transfer mechanism. The first transfer chamber 921 is centrally located relative to the load lock chambers 960, 962, processing chambers 902, 904, 916, 918, and buffer chambers 922, 924. In some embodiments, the robot 925 is a multi-arm robot capable of independently moving two or more wafers at a time. In some embodiments, the first transfer chamber 921 comprises two or more robotic wafer transfer mechanisms. The robot 925 within the first transfer chamber 921 is configured to move wafers between chambers around the first transfer chamber 921. Each wafer is supported on a wafer transport blade located at the distal end of the first robotic mechanism.

[0071] After processing the wafer in the first section 920, the wafer may be passed through a pass-through chamber to the second section 930. For example, chambers 922, 924 may be unidirectional or bidirectional pass-through chambers. Pass-through chambers 922, 924 can be used, for example, to cryogenically cool the wafer before processing in the second section 930, or to allow cooling or post-processing of the wafer before returning it to the first section 920.

[0072] The system controller 990 communicates with the first robot 925, the second robot 935, the first set of processing chambers 902, 904, 916, 918, and the second set of processing chambers 906, 908, 910, 912, 914. The system controller 990 can be any suitable component capable of controlling the processing chambers and robots. For example, the system controller 990 may be a computer including a central processing unit (CPU) 992, memory 994, input / output (I / O) 996, and support circuits 998. The controller 990 may control the processing tool 900 directly, or it may be controlled via a computer (or controller) associated with a particular processing chamber and / or support system component.

[0073] In one or more embodiments, the controller 990 may be one of any form of general-purpose computer processor that can be used in an industrial environment to control various chambers and subprocessors. The memory 994 or computer-readable medium of the controller 990 may be one or more of readily available memories such as non-transient memory (e.g., random access memory (RAM)), read-only memory (ROM), floppy disks, hard disks, optical storage media (e.g., compact discs or digital video discs), flash drives, or any other form of local or remote digital storage. The memory 994 may hold an instruction set that can be operated by the processor (CPU 992) to control the parameters and components of the processing tool 900.

[0074] Support circuits 998 are coupled to the CPU 992 to support the processor in a conventional manner. These circuits include caches, power supplies, clock circuits, input / output circuits, and subsystems. One or more processes may be stored in memory 994 as software routines, which, when executed or invoked by the processor, cause the processor to control the operation of the processing tools 900 or individual processing units in the manner described herein. Software routines may also be stored and / or executed by a second CPU (not shown) located remotely from the hardware controlled by the CPU 992.

[0075] Some or all of the processes and methods of this disclosure may be performed in hardware. Therefore, the processes may be performed in software, using a computer system, for example, in hardware as an application-specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware. When executed by a processor, the software routines transform a general-purpose computer into a dedicated computer (controller) that controls the operation of the chamber so that the processes can be executed.

[0076] In some embodiments, the controller 990 has one or more configurations for executing individual processes or subprocesses to carry out the method. The controller 990 can be connected to and configured to operate intermediate components in order to perform the functions of the method. For example, the controller 990 can be connected to and configured to control a physical vapor deposition chamber.

[0077] The process, when executed by a processor, may be stored in the memory 994 of the system controller 990 as a software routine that causes a processing chamber to execute the process of the present disclosure. The software routine may also be stored and / or executed by a second processor (not shown) located remotely from the hardware controlled by the processor. Some or all of the methods of the present disclosure may be executed in hardware. Thus, the process may be implemented in software, in hardware such as an application-specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware, using a computer system. When the software routine is executed by a processor, it transforms a general-purpose computer into a dedicated computer (controller) that controls the operation of the chamber so that the process can be executed.

[0078] In some embodiments, the system controller 990 has a configuration that controls the atomic layer deposition chamber to deposit a barrier film on the substrate. The controlled system 990 has a second configuration that controls the chemical vapor deposition chamber to deposit a metal film on the barrier film at a temperature in the range of approximately 20°C to approximately 400°C.

[0079] In one or more embodiments, the processing tool comprises a central transfer station equipped with a robot configured to move wafers; a plurality of process stations, each connected to the central transfer station and providing a processing area separated from the processing area of ​​an adjacent process station, each process station comprising a deposition chamber, a plasma processing chamber, a remote plasma source, and an annealing chamber; and controllers connected to the central transfer station and the plurality of process stations, configured to actuate the robot to move wafers between process stations and to control the processes performed at each of the process stations.

[0080] The present disclosure will now be described with reference to the following embodiments. Before describing some exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the configuration or process step details described below. Other embodiments of the present disclosure are possible and can be implemented and performed in various ways.

[0081] Examples Example 1. Ruthenium doping of tantalum nitride (TaN): monolayer TaN of approximately 3–4 Å was deposited at 250–275°C using PDMAT and an ammonia precursor via nine ALD cycles. Doping this TaN with Ru by flash CVD resulted in Ru of approximately 1–2 Å having a nanocrystalline structure. Another 3–4 Å TaN was deposited at 250–275°C using PDMAT and an ammonia precursor via nine ALD cycles. The final Ru-doped TaN barrier layer had a thickness of approximately 8–10 Å.

[0082] Example 2. Ruthenium doping of tantalum nitride (TaN): monolayer 7 Å TaN was deposited at 250–275°C using PDMAT and an ammonia precursor via 12 ALD cycles. Doping this TaN with Ru by flash CVD yielded Ru with a nanocrystalline structure of approximately 1 Å to 2 Å. Another 3 Å TaN was deposited at 250–275°C using PDMAT and an ammonia precursor via 5 ALD cycles. The final Ru-doped TaN barrier layer had a thickness of approximately 11–12 Å.

[0083] Example 3. Ruthenium doping of tantalum nitride (TaN): multilayer 4 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. This TaN was doped with Ru by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. Another 4 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. Another film of doped Ru was deposited by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. A third 3 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. The final Ru-doped TaN barrier layer had a thickness of approximately 13 Å.

[0084] Example 4. Ruthenium doping of tantalum nitride (TaN): multilayer A 3 Å layer of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. This TaN was doped with Ru by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. Another 2 Å layer of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. Another film of doped Ru was deposited by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. Another 3 Å layer of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. Another film of doped Ru was deposited by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. Another 2 Å layer of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. The final Ru-doped TaN barrier layer was approximately 12 Å thick.

[0085] Example 5. Ruthenium doping of tantalum nitride (TaN): Intermediate post-treatment after Ru doping TaN of approximately 5–7 Å was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. This TaN was doped with Ru by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure, which was then exposed to a hydrogen (H2) plasma for 10 seconds. Another layer of 3–5 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. The final Ru-doped TaN barrier layer had a thickness of approximately 9–13 Å.

[0086] Example 6. Ruthenium doping of tantalum nitride (TaN): Intermediate post-treatment after Ru doping Approximately 4 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. This TaN was doped with Ru by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure, which was then exposed to a hydrogen (H2) plasma for 10 seconds. Another 4 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. Another film of doped Ru was deposited by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure, which was then exposed to a hydrogen (H2) plasma for 10 seconds. Another 3 Å of TaN was deposited via ALD using PDMAT and an ammonia precursor at 250–275°C. The final Ru-doped TaN barrier layer was approximately 13 Å thick.

[0087] Throughout this specification, any reference to “one embodiment,” “a particular embodiment,” “one or more embodiments,” or “embodiments” means that any particular feature, structure, material, or property described in relation to an embodiment is included in at least one embodiment of this disclosure. Therefore, any occurrence of phrases such as “in one or more embodiments,” “a particular embodiment,” “in one embodiment,” or “in a certain embodiment” in various parts of this specification does not necessarily refer to the same embodiment of this disclosure. Furthermore, any particular feature, structure, material, or property may be combined in any suitable way in one or more embodiments.

[0088] While the disclosure herein has been described with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the methods and apparatus of the disclosure without departing from the spirit and scope of the disclosure. Accordingly, the disclosure is intended to include modifications and variations that fall within the scope of the appended claims and their equivalents.

Claims

1. A method for forming a doped barrier layer, The steps include forming a first barrier film having a thickness in the range of 2 Å to 10 Å on a dielectric layer on a substrate by atomic layer deposition, A step of doping the first barrier film with a dopant metal by exposing the first barrier film to a metal precursor during a flash chemical vapor deposition process, thereby forming a doped first barrier film having a thickness in the range of 1 Å to 3 Å and containing a dopant metal in the range of greater than 10% by weight and less than or equal to 30% by weight, wherein the dopant metal diffuses through the first barrier film to the dielectric layer and forms a complex with the dielectric layer. The steps include forming a second barrier film having a thickness in the range of 2 Å to 6 Å on the doped first barrier film by atomic layer deposition to form a doped barrier layer having a combined thickness in the range of 5 Å to 15 Å comprising the first barrier film, the doped first barrier film, and the second barrier film, Includes, A method in which one or more of the first barrier films or the second barrier films are deposited at a temperature in the range of 250 to 275°C.

2. The method according to claim 1, wherein the first barrier film and the second barrier film include one or more of the following: tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), and molybdenum nitride (MoN).

3. The method according to claim 1, wherein the dopant metal includes one or more of the following: ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), etc.

4. The method according to claim 1, wherein the first barrier film and the second barrier film each contain tantalum nitride (TaN), and the dopant metal each contain ruthenium (Ru).

5. The dopant metal forms an intermetallic compound with the first barrier film and the second barrier film, and the intermetallic compound is Ta x Ru y N or Ta x Ru y N X The method according to claim 4, having the formula O.

6. The method according to claim 1, further comprising the step of exposing the doped barrier layer, after doping, to one or more of the following: plasma treatment, physical vapor deposition (PVD) treatment, thermal annealing, and chemical strengthening.

7. The method according to claim 1, wherein the substrate includes at least one feature.

8. The method according to claim 7, wherein at least one of the features has an aspect ratio of about 10:1 or greater.

9. A method for forming a doped metal nitride layer, The steps include: exposing a substrate to a first metal precursor and ammonia to form a first metal nitride film on the substrate, wherein the substrate includes a dielectric layer having at least one characteristic, and the first metal nitride film has a thickness in the range of 2 Å to 10 Å; A step of doping the first metal nitride film with a dopant metal by exposing the first metal nitride film to a dopant metal precursor during a flash chemical vapor deposition process, thereby forming a doped first metal nitride film having a thickness in the range of 1 Å to 3 Å and containing a dopant metal in the range of greater than 10% by weight and less than or equal to 30% by weight, wherein the dopant metal diffuses through the first metal nitride film to the dielectric layer and forms a complex with the dielectric layer. The steps include: exposing the substrate to the first metal precursor and ammonia to form a second metal nitride film on the doped first metal nitride film, thereby forming a doped metal nitride layer having a combined thickness in the range of 5 Å to 15 Å comprising the first metal nitride film, the doped first metal nitride film, and the second metal nitride film; Includes, A method for depositing one or more of the first metal nitride films or the second metal nitride films at a temperature in the range of 250 to 275°C.

10. The method according to claim 9, wherein the first metal nitride film and the second metal nitride film include one or more of tantalum nitride (TaN), niobium nitride (NbN), manganese nitride (MnN), titanium nitride (TiN), and molybdenum nitride (MoN).

11. The method according to claim 9, wherein the dopant metal includes one or more of the following: ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), etc.

12. The method according to claim 9, further comprising the step of exposing the doped metal nitride layer, after doping, to one or more of the following: plasma treatment, physical vapor deposition (PVD) treatment, thermal annealing, and chemical strengthening.

13. The method according to claim 9, wherein the at least one feature includes a first side wall, a second side wall, and a bottom, and the first metal nitride film is substantially conformal.

14. The method according to claim 13, wherein at least one of the features has an aspect ratio of about 10:1 or greater.

15. The dopant metal forms an intermetallic compound with the first metal nitride film and the second metal nitride film, and the intermetallic compound is Ta x Ru y N or Ta x Ru y N X The method according to claim 9, having the formula of O.

16. A non-transient computer-readable medium containing instructions, wherein when the instructions are executed by a controller of a processing system, the processing system receives the following information: A first barrier film having a thickness in the range of 2 Å to 10 Å is formed on a dielectric layer on a substrate. The first barrier film is doped with a dopant metal to form a doped first barrier film having a thickness in the range of 1 Å to 3 Å and containing a dopant metal in a range of greater than 10% by weight and less than or equal to 30% by weight, the dopant metal diffuses through the first barrier film to the dielectric layer and forms a complex with the dielectric layer, A second barrier film is formed on the doped first barrier film to form a doped barrier layer having a combined thickness in the range of 5 Å to 15 Å comprising the first barrier film, the doped first barrier film, and the second barrier film. Perform the action, A non-transient computer-readable medium in which one or more of the first barrier films or the second barrier films are deposited at a temperature in the range of 250 to 275°C.

17. The non-transient computer-readable medium according to claim 16, further comprising an instruction, when executed by the controller of the processing system, to cause the processing system to perform an operation to expose the doped barrier layer, after doping, to one or more of the following: plasma treatment, physical vapor deposition (PVD) treatment, thermal annealing, and chemical strengthening.

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