Semiconductor equipment

Abstract

To provide a novel display device.SOLUTION: A display device includes a first layer including a driving circuit, a second layer including a plurality of pixel circuits, and a third layer including a plurality of light-emitting elements. The second layer is provided on the first layer, the third layer is provided on the second layer, and a conductive layer is provided between the driving circuit and the pixel circuits. The driving circuit has a function of controlling the operation of the pixel circuits. One of the pixel circuits is electrically connected to one of the light-emitting elements. The pixel circuit has a function of controlling the emission luminance of the light-emitting element.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention disclosed herein include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, methods for driving them, or methods for manufacturing them. [Background technology]

[0003] In recent years, electronic devices equipped with display devices, such as smartphones and tablet terminals, have become widespread. Typical examples of display devices include liquid crystal displays, organic EL (Electro-Luminescence) elements, light-emitting devices equipped with light-emitting elements such as LEDs, and electronic paper that displays information using electrophoresis.

[0004] For example, the basic structure of an organic EL element consists of a layer containing a light-emitting organic compound sandwiched between a pair of electrodes. By applying a voltage to this element, light can be obtained from the light-emitting organic compound. Because a display device using such an organic EL element does not require a backlight, which is necessary for liquid crystal displays and the like, it is possible to realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1.

[0005] Furthermore, Patent Document 2 discloses a pixel circuit for controlling the luminescence brightness of an organic EL element, which corrects the threshold value variation of transistors for each pixel and improves the display quality of the display device. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-324673 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-132816 [Summary of the Invention] [Problems to be Solved by the Invention]

[0007] On the other hand, depending on the configuration of the organic EL element, a high voltage may be required for driving. In order to drive such an organic EL element, it was necessary to provide a power source for generating a high voltage.

[0008] <统一格式,将换行符均改为空格,使格式更紧凑,以下同理> One aspect of the present invention aims to provide a downsized display device. Or, one aspect of the present invention aims to provide a display device with high color reproducibility. Or, one aspect of the present invention aims to provide a high-definition display device. Or, one aspect of the present invention aims to provide a highly reliable display device. Or, one aspect of the present invention aims to provide a display device with reduced power consumption. Or, one aspect of the present invention aims to provide a novel display device.

[0009] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems can be extracted from the descriptions in the specification, drawings, claims, etc. [Means for Solving the Problems]

[0010] (1) One aspect of the present invention is a semiconductor device comprising first and second transistors, first to fifth switches, first to third capacitors, and a display element, wherein the first transistor has a back gate, the gate of the first transistor is electrically connected to the first switch, the second switch and a first capacitor are provided between the gate and source of the first transistor, the back gate of the first transistor is electrically connected to the third switch, the second capacitor is provided between the back gate and source of the first transistor, the source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor, the gate of the second transistor is electrically connected to the fifth switch, the third capacitor is provided between the gate and source of the second transistor, and the source of the second transistor is electrically connected to one terminal of the display element.

[0011] Furthermore, in (1), the first switch may have the function of selecting whether to conduct or not conduct between the first wiring and the gate of the first transistor. Also, the second switch may have the function of selecting whether to conduct or not conduct between the gate and source of the first transistor. Also, the third switch may have the function of selecting whether to conduct or not conduct between the second wiring and the back gate of the first transistor. The fourth switch may have the function of selecting whether to conduct or not conduct between the third wiring and the source of the first transistor. The fifth switch may have the function of selecting whether to conduct or not conduct between the fourth wiring and the gate of the second transistor.

[0012] Furthermore, in (1), transistors can be used as the first to fifth switches. The fourth and fifth switches may be p-channel type transistors. Also, the fourth and fifth switches may be transistors in which silicon is included in the semiconductor layer where the channel is formed.

[0013] (2) Another aspect of the present invention is a semiconductor device comprising first and second transistors, first to fifth switches, first to third capacitors, a first display element, and a second display element, wherein the first transistor has a back gate, the gate of the first transistor is electrically connected to the first switch, the second switch and a first capacitor are provided between the gate and source of the first transistor, the back gate of the first transistor is electrically connected to the third switch, the second capacitor is provided between the back gate and source of the first transistor, the source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor, the gate of the second transistor is electrically connected to the fifth switch, the third capacitor is provided between the gate and source of the second transistor, and the source of the second transistor is electrically connected to one terminal of the first display element and one terminal of the second display element.

[0014] Furthermore, in (2), the first switch may have the function of selecting whether to conduct or not conduct between the first wiring and the gate of the first transistor. The second switch may have the function of selecting whether to conduct or not conduct between the gate and source of the first transistor. The third switch may have the function of selecting whether to conduct or not conduct between the second wiring and the back gate of the first transistor. The fourth switch may have the function of selecting whether to conduct or not conduct between the third wiring and the source of the first transistor. The fifth switch may have the function of selecting whether to conduct or not conduct between the fourth wiring and the gate of the second transistor.

[0015] Furthermore, in (2), the first capacitor may have the function of maintaining the potential difference between the gate and source of the first transistor. The second capacitor may have the function of maintaining the potential difference between the back gate and source of the first transistor. The third capacitor may have the function of maintaining the potential difference between the gate and source of the second transistor.

[0016] Furthermore, in (2), the drain of the first transistor may be electrically connected to the fifth wiring. For example, the other terminal of the first display element may be electrically connected to the sixth wiring, and the other terminal of the second display element may be electrically connected to the seventh wiring.

[0017] Furthermore, a display device may be constructed by arranging multiple semiconductor devices described in (2) in a matrix. For example, the first display elements may be arranged in odd-numbered rows and the second display elements in even-numbered rows. By making the first display elements emit light during odd-numbered frame periods and the second display elements emit light during even-numbered frame periods, a display device with interlace driving functionality can be realized.

[0018] (3) Another aspect of the present invention comprises first to eighth transistors, first to third capacitors, and a display element, wherein the gates of the first transistor and the sixth transistor are electrically connected to a first wire, the gates of the third transistor and the fourth transistor are electrically connected to a second wire, the gate of the seventh transistor is electrically connected to a third wire, the gate of the eighth transistor is electrically connected to a fourth wire, one of the sources or drains of the first transistor is electrically connected to a fifth wire, the other of the sources or drains of the first transistor is electrically connected to the gate of the second transistor, one of the sources or drains of the third transistor, and one terminal of the first capacitor, one of the sources or drains of the second transistor is electrically connected to a sixth wire, one of the sources or drains of the fourth transistor is electrically connected to a seventh wire, and the other of the sources or drains of the fourth transistor is electrically connected to one terminal of the second capacitor, and the other of the sources or drains of the second transistor The semiconductor device is electrically connected to the other source or drain of the third transistor, the other terminal of the first capacitor, the other terminal of the second capacitor, one source or drain of the fifth transistor, and one source or drain of the sixth transistor; one source or drain of the seventh transistor is electrically connected to the seventh wiring; the gate of the fifth transistor is electrically connected to the other source or drain of the seventh transistor, one source or drain of the eighth transistor, and one terminal of the third capacitor; the other source or drain of the sixth transistor and the other source or drain of the eighth transistor are electrically connected to the eighth wiring; the other source or drain of the fifth transistor is electrically connected to the other terminal of the third capacitor and one terminal of the display element; the other terminal of the display element is electrically connected to the ninth wiring; the second transistor has a back gate, and the back gate is electrically connected to the other source or drain of the fourth transistor and one terminal of the second capacitor.

[0019] Furthermore, in (3), a transistor in which the semiconductor forming the channel includes an oxide semiconductor may be used as the second transistor. The second transistor comprises either a source or a drain, the other source or drain, a gate, and a back gate. The second transistor may have a function in which the gate potential and the back gate potential change in response to a change in the potential of the other source or drain.

[0020] Furthermore, in (3), the fifth transistor may be a transistor in which the semiconductor forming the channel includes an oxide semiconductor. The fifth transistor comprises either a source or a drain, the other source or drain, and a gate. The fifth transistor may have a function in which the gate potential changes in response to a change in the potential of the other source or drain.

[0021] (4) Another aspect of the present invention is a semiconductor device comprising first and second transistors, first to sixth switches, first to third capacitors, and a display element, wherein the first transistor has a back gate, the gate of the first transistor is electrically connected to the first switch, the gate and source of the first transistor are a second switch and a first capacitor, the back gate of the first transistor is electrically connected to the third switch, the back gate and source of the first transistor are a second capacitor, the source of the first transistor is electrically connected to the fourth switch and the drain of the second transistor, the gate of the second transistor is electrically connected to the fifth switch and the sixth switch, the gate and source of the second transistor are a third capacitor, and the source of the second transistor is electrically connected to the display element.

[0022] Furthermore, in (4), the first switch may have the function of selecting whether to conduct or not conduct between the first wiring and the gate of the first transistor, the second switch may have the function of selecting whether to conduct or not conduct between the gate and source of the first transistor, the third switch may have the function of selecting whether to conduct or not conduct between the second wiring and the back gate of the first transistor, the fourth switch may have the function of selecting whether to conduct or not conduct between the third wiring and the source of the first transistor, the fifth switch may have the function of selecting whether to conduct or not conduct between the second wiring and the gate of the second transistor, and the sixth switch may have the function of selecting whether to conduct or not conduct between the third wiring and the gate of the second transistor.

[0023] Furthermore, in (4), the first capacitor may have the function of maintaining the potential difference between the gate and source of the first transistor, the second capacitor may have the function of maintaining the potential difference between the back gate and source of the first transistor, and the third capacitor may have the function of maintaining the potential difference between the gate and source of the second transistor.

[0024] Furthermore, in (1), (2), (3), and (4), the oxide semiconductor preferably contains at least one of indium and zinc. The display element may be a single-structure organic EL element or a tandem-structure organic EL element.

[0025] (5) Another aspect of the present invention is a display device having a first layer including a drive circuit, a second layer including a plurality of pixel circuits, and a third layer including a plurality of light-emitting elements, wherein the second layer is provided on the first layer and the third layer is provided on the second layer, the drive circuit has the function of controlling the operation of the plurality of pixel circuits, one of the plurality of pixel circuits is electrically connected to one of the plurality of light-emitting elements, the pixel circuit has the function of controlling the luminescence brightness of the light-emitting element, and a conductive layer is provided between the drive circuit and the plurality of pixel circuits.

[0026] Furthermore, in (5), it is preferable that the conductive layer and the plurality of pixel circuits have overlapping regions. The conductive layer may also be in the form of a mesh.

[0027] Furthermore, in (5), the driving circuit may have, for example, a Si transistor. Also, the pixel circuit may have, for example, an OS transistor. The light-emitting element may be, for example, an organic EL element. Also, the light-emitting element may be a tandem structure light-emitting element. [Effects of the Invention]

[0028] According to one aspect of the present invention, a miniaturized display device can be provided. Alternatively, a display device with high color reproducibility can be provided. Alternatively, a high-definition display device can be provided. Alternatively, a highly reliable display device can be provided. Alternatively, one aspect of the present invention can provide a display device with reduced power consumption. Alternatively, a novel display device can be provided.

[0029] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description in the specification, drawings, claims, etc. [Brief explanation of the drawing]

[0030] [Figure 1] Figure 1 is a diagram illustrating a semiconductor device. [Figure 2] Figure 2 is a diagram illustrating a semiconductor device. [Figure 3] Figure 3 is a diagram illustrating a semiconductor device. [Figure 4] Figure 4 is a diagram illustrating a semiconductor device. [Figure 5] Figure 5 is a diagram illustrating a semiconductor device. [Figure 6] Figure 6 is a diagram illustrating the planar layout of a semiconductor device. [Figure 7] Figure 7 is a diagram illustrating a semiconductor device. [Figure 8] Figure 8 is a diagram illustrating a semiconductor device. [Figure 9] Figure 9 is a diagram illustrating a semiconductor device. [Figure 10]Figure 10 is a diagram illustrating a semiconductor device. [Figure 11] Figure 11 is a diagram illustrating a semiconductor device. [Figure 12] Figure 12 is a diagram illustrating a semiconductor device. [Figure 13] Figure 13 is a diagram illustrating a semiconductor device. [Figure 14] Figure 14 is a diagram illustrating a semiconductor device. [Figure 15] Figure 15 is a diagram illustrating a semiconductor device. [Figure 16] Figures 16A to 16C show the circuit symbols for transistors. [Figure 17] Figure 17 is a timing chart illustrating the operation of a semiconductor device. [Figure 18] Figure 18 is a diagram illustrating the operation of a semiconductor device. [Figure 19] Figure 19 is a diagram illustrating the operation of a semiconductor device. [Figure 20] Figure 20 is a diagram illustrating the operation of a semiconductor device. [Figure 21] Figure 21 is a diagram illustrating the operation of a semiconductor device. [Figure 22] Figure 22 is a diagram illustrating the operation of a semiconductor device. [Figure 23] Figure 23 is a diagram illustrating the operation of a semiconductor device. [Figure 24] Figure 24 is a diagram illustrating the operation of a semiconductor device. [Figure 25] Figure 25 is a diagram illustrating a semiconductor device. [Figure 26] Figure 26 is a timing chart illustrating the operation of a semiconductor device. [Figure 27] Figure 27 is a diagram illustrating the operation of a semiconductor device. [Figure 28] Figure 28 is a diagram illustrating the operation of a semiconductor device. [Figure 29] Figure 29 is a diagram illustrating the operation of a semiconductor device. [Figure 30]Figure 30 is a diagram illustrating the operation of a semiconductor device. [Figure 31] Figure 31 is a diagram illustrating the operation of a semiconductor device. [Figure 32] Figure 32 is a diagram illustrating the operation of a semiconductor device. [Figure 33] Figure 33 is a diagram illustrating a semiconductor device. [Figure 34] Figure 34 is a diagram illustrating a semiconductor device. [Figure 35] Figure 35 is a timing chart illustrating the operation of a semiconductor device. [Figure 36] Figure 36 is a diagram illustrating the operation of a semiconductor device. [Figure 37] Figure 37 is a diagram illustrating the operation of a semiconductor device. [Figure 38] Figure 38 is a diagram illustrating the operation of a semiconductor device. [Figure 39] Figure 39 is a diagram illustrating the operation of a semiconductor device. [Figure 40] Figure 40 is a diagram illustrating the operation of a semiconductor device. [Figure 41] Figure 41 is a diagram illustrating the operation of a semiconductor device. [Figure 42] Figure 42 is a diagram illustrating a semiconductor device. [Figure 43] Figure 43 is a diagram illustrating the operation of a semiconductor device. [Figure 44] Figure 44 is a diagram illustrating a semiconductor device. [Figure 45] Figure 45 is a diagram illustrating a semiconductor device. [Figure 46] Figure 46 is a diagram illustrating a semiconductor device. [Figure 47] Figure 47 is a diagram illustrating a semiconductor device. [Figure 48] Figure 48 is a diagram illustrating a semiconductor device. [Figure 49] Figures 49A and 49B illustrate semiconductor devices. [Figure 50] Figures 50A and 50B illustrate semiconductor devices. [Figure 51] Figure 51 is a diagram illustrating a semiconductor device. [Figure 52] Figure 52 is a diagram illustrating a semiconductor device. [Figure 53] Figure 53 is a diagram illustrating a semiconductor device. [Figure 54] Figure 54 is a diagram illustrating a semiconductor device. [Figure 55] Figure 55A is a diagram illustrating a display device. Figures 55B1 to 55B7 are diagrams illustrating examples of pixel configurations. [Figure 56] Figure 56 is a diagram illustrating an example of pixel configuration. [Figure 57] Figures 57A1, 57A2, 57B, and 57C illustrate examples of pixel configurations. [Figure 58] Figures 58A to 58D illustrate examples of the configuration of a light-emitting element. [Figure 59] Figures 59A to 59D show examples of the configuration of light-emitting elements. [Figure 60] Figures 60A to 60D show examples of the configuration of a light-emitting element. [Figure 61] Figures 61A and 61B show examples of the configuration of a light-emitting element. [Figure 62] Figures 62A to 62C show examples of the configuration of a light-emitting element. [Figure 63] Figures 63A and 63B are perspective views of the display device. [Figure 64] Figure 64A is a perspective view of the display device. Figure 64B is a plan view of the display device. [Figure 65] Figure 65 is a perspective view of the display device. [Figure 66] Figure 66A is a perspective view of the display device. Figures 66B and 66C show examples of conductive layers. [Figure 67] Figure 67 is a perspective view of the display device. [Figure 68] Figures 68A and 68B are perspective views of the display device. [Figure 69]Figures 69A to 69C are schematic perspective views of the display module. [Figure 70] Figure 70 is a cross-sectional view showing an example of a display device. [Figure 71] Figure 71 is a cross-sectional view showing an example of a display device. [Figure 72] Figure 72 is a cross-sectional view showing an example of a display device. [Figure 73] Figure 73 is a cross-sectional view showing an example of a display device. [Figure 74] Figure 74 is a cross-sectional view showing an example of a display device. [Figure 75] Figure 75 is a cross-sectional view showing an example of a display device. [Figure 76] Figure 76A is a block diagram of the display device. Figure 76B is a timing chart illustrating the operation of the display device. [Figure 77] Figure 77A is a block diagram of the display device. Figure 77B is a timing chart illustrating the operation of the display device. [Figure 78] Figure 78A is a block diagram of the display device. Figure 78B is a timing chart illustrating the operation of the display device. [Figure 79] Figure 79A is a top view showing an example of a transistor configuration. Figures 79B and 79C are cross-sectional views showing an example of a transistor configuration. [Figure 80] Figure 80A is a diagram illustrating the classification of crystal structures. Figure 80B is a diagram illustrating the XRD spectrum of the CAAC-IGZO film. Figure 80C is a diagram illustrating the micro-electron diffraction pattern of the CAAC-IGZO film. [Figure 81] Figures 81A to 81F illustrate an example of an electronic device. [Figure 82] Figures 82A to 82F illustrate an example of an electronic device. [Figure 83] Figures 83A and 83B illustrate an example of an electronic device. [Figure 84] Figure 84 is a diagram illustrating an example of an electronic device. [Figure 85]Figures 85A to 85C show the evaluation results of the Id-Vd characteristics of the transistors. [Figure 86] Figure 86 shows the evaluation results of the dielectric breakdown voltage of the transistor. [Modes for carrying out the invention]

[0031] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope. Therefore, the present invention is not to be construed as being limited to the contents of the following embodiments.

[0032] In this specification, a semiconductor device refers to a device that utilizes semiconductor properties, including circuits containing semiconductor elements (transistors, diodes, photodiodes, etc.), devices having such circuits, etc. It also refers to any device that can function by utilizing semiconductor properties. For example, integrated circuits, chips equipped with integrated circuits, and electronic components with chips housed in packages are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices are themselves semiconductor devices, and may also contain semiconductor devices.

[0033] Furthermore, when it is stated in this specification that X and Y are connected, it is assumed that this specification discloses the cases in which X and Y are electrically connected, functionally connected, and directly connected. Therefore, it is assumed that the disclosed connections are not limited to predetermined connections, such as those shown in the figures or text, but also include connections other than those shown in the figures or text. X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0034] One example of a case where X and Y are electrically connected is that one or more elements that enable the electrical connection between X and Y (e.g., switches, transistors, capacitive elements, inductors, resistors, diodes, display devices, light-emitting devices, loads, etc.) can be connected between X and Y.

[0035] One example of a functional connection between X and Y is when one or more circuits that enable the functional connection between X and Y (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal conversion circuits (digital-to-analog conversion circuits, analog-to-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc.), voltage sources, current sources, switching circuits, amplification circuits (circuits that can increase the signal amplitude or current amount, such as operational amplifiers, differential amplifiers, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y.

[0036] Furthermore, when it is explicitly stated that X and Y are electrically connected, this includes both cases where X and Y are electrically connected (i.e., connected with another element or circuit in between) and cases where X and Y are directly connected (i.e., connected without another element or circuit in between).

[0037] Furthermore, for example, it can be expressed as, "X, Y, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and the connection is in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Alternatively, it can be expressed as, "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Alternatively, it can be expressed as, "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using similar notation to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and their technical scope determined. Note that these notational methods are examples only and are not limited to them. Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0038] Even if independent components are shown as electrically connected in a circuit diagram, a single component may possess the functions of multiple components. For example, if part of a wire also functions as an electrode, a single conductive film possesses the functions of both the wire and the electrode. Therefore, in this specification, "electrically connected" includes cases where a single conductive film possesses the functions of multiple components.

[0039] Furthermore, in this specification, "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0F, a region of wiring having a capacitance value higher than 0F, parasitic capacitance, the gate capacitance of a transistor, etc. Therefore, in this specification, "capacitive element" includes not only a circuit element comprising a pair of electrodes and a dielectric material contained between the electrodes, but also parasitic capacitance occurring between wirings, the gate capacitance occurring between one of the sources or drains of a transistor and the gate, etc. Also, terms such as "capacitive element," "parasitic capacitance," and "gate capacitance" can be replaced with terms such as "capacitance," and conversely, the term "capacitance" can be replaced with terms such as "capacitive element," "parasitic capacitance," and "gate capacitance." In addition, the term "a pair of electrodes" in "capacitance" can be replaced with terms such as "a pair of conductors," "a pair of conductive regions," and "a pair of regions." The capacitance value can be, for example, 0.05fF or more and 10pF or less. Alternatively, it may be, for example, 1pF or more and 10μF or less.

[0040] Furthermore, in this specification, a transistor has three terminals called the gate, source, and drain. The gate is a control terminal that controls the amount of current flowing between the source and drain. The two terminals that function as either the source or the drain are the input and output terminals of the transistor. Depending on the conductivity type of the transistor (n-channel or p-channel) and the potential applied to the three terminals of the transistor, one of the two input and output terminals becomes the source and the other becomes the drain. For this reason, in this specification, the terms source and drain can be used interchangeably. Also, in this specification, when describing the connection relationships of a transistor, the notation "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) is used. Depending on the structure of the transistor, in addition to the three terminals described above, there may be a back gate. In this case, in this specification, one of the gate or back gate of the transistor may be called the first gate, and the other of the gate or back gate of the transistor may be called the second gate. Furthermore, in the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, if a transistor has three or more gates, in this specification, each gate may be referred to as the first gate, second gate, third gate, and so on.

[0041] Furthermore, in this specification, the term "node" can be replaced with terminals, wiring, electrodes, conductive layers, conductors, impurity regions, etc., depending on the circuit configuration, device structure, etc. Also, terminals, wiring, etc. can be replaced with "node".

[0042] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" in this specification are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "1st" in one embodiment of this specification may be referred to as "2nd" in another embodiment or in the claims. Also, for example, a constituent element referred to as "1st" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0043] Furthermore, in this specification, phrases indicating arrangement such as "above," "below," "upward," or "downward" are sometimes used for convenience to explain the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, the phrases explained in the specification are not limited to those described and can be appropriately rephrased depending on the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the drawing shown by 180 degrees.

[0044] Furthermore, the terms "above" and "below" do not limit the positional relationship of the components to being directly above or below each other and in direct contact. For example, the expression "electrode B on insulating layer A" does not require electrode B to be formed in direct contact with insulating layer A, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0045] Furthermore, in this specification, terms such as "overlapping" do not limit the state of the stacking order of the components. For example, the expression "electrode B overlapping insulating layer A" does not exclude not only the state in which electrode B is formed on top of insulating layer A, but also the state in which electrode B is formed below insulating layer A or the state in which electrode B is formed to the right (or left) of insulating layer A.

[0046] Furthermore, in this specification, the terms "adjacent" and "proximity" are not limited to direct contact between components. For example, the expression "electrode B adjacent to insulating layer A" does not require that insulating layer A and electrode B be formed in direct contact, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0047] Furthermore, in this specification, terms such as "film" and "layer" can be interchanged as needed. For example, the term "conductive layer" may be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to the term "insulating layer." Alternatively, depending on the circumstances, terms such as "film" and "layer" can be omitted and replaced with other terms. For example, the term "conductive layer" or "conductive film" may be changed to the term "conductor." Or, the term "conductor" may be changed to the term "conductive layer" or "conductive film." Alternatively, for example, the term "insulating layer" or "insulating film" may be changed to the term "insulator." Or, the term "insulator" may be changed to the term "insulating layer" or "insulating film."

[0048] Furthermore, in this specification, terms such as "electrode," "wiring," and "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" or "wiring" include cases where multiple "electrodes" or "wiring" are formed as a single unit. Similarly, for example, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" also includes cases where multiple "electrodes," "wiring," or "terminals" are formed as a single unit. Therefore, for example, an "electrode" can be part of "wiring" or a "terminal," and for example, a "terminal" can be part of "wiring" or an "electrode." In addition, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" depending on the circumstances.

[0049] Furthermore, in this specification, terms such as "wiring," "signal line," and "power line" can be interchanged with each other depending on the circumstances or situation. For example, the term "wiring" may be changed to the term "signal line." Also, for example, the term "wiring" may be changed to the term "power line." Similarly, the reverse is also true; terms such as "signal line" and "power line" may be changed to the term "wiring." Terms such as "power line" may be changed to the term "signal line." Similarly, the reverse is also true; terms such as "signal line" may be changed to the term "power line." In addition, the term "potential" applied to the wiring may be changed to the term "signal," depending on the circumstances or situation. Similarly, the reverse is also true; terms such as "signal" may be changed to the term "potential."

[0050] Furthermore, in this specification, a "switch" is defined as a device having multiple terminals and a function to switch (select) between continuity and non-continuity between the terminals. For example, if a switch has two terminals and there is continuity between both terminals, the switch is said to be in a "conductive state" or "on state." Conversely, if there is no continuity between both terminals, the switch is said to be in a "non-conductive state" or "off state." Note that switching to either a continuative or non-conductive state, or maintaining either a continuative or non-conductive state, may be referred to as "controlling the continuity state."

[0051] In short, a switch is a device that controls whether or not an electric current flows. Alternatively, a switch is a device that selects and switches the path through which an electric current flows. Examples include electrical switches and mechanical switches. In other words, a switch can be anything that can control an electric current, and is not limited to any particular type.

[0052] Examples of switches include transistors (e.g., bipolar transistors, MOS transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, diode-connected transistors, etc.), or logic circuits combining these. When a transistor is used as a switch, the "conducting state" of the transistor refers to a state in which the source and drain electrodes of the transistor can be considered to be electrically short-circuited. Conversely, the "non-conducting state" of the transistor refers to a state in which the source and drain electrodes of the transistor can be considered to be electrically disconnected. When a transistor is used simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0053] One example of a mechanical switch is a switch using MEMS (Micro-Electro-Mechanical Systems) technology. This switch has mechanically movable electrodes, and the movement of these electrodes selects between conductivity and non-conductivity.

[0054] In this specification, "parallel" means that two lines are positioned at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. "Approximately parallel" or "roughly parallel" means that two lines are positioned at an angle of -30° or more and 30° or less. "Perpendicular" means that two lines are positioned at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. "Approximately perpendicular" or "roughly perpendicular" means that two lines are positioned at an angle of 60° or more and 120° or less.

[0055] In this specification, when count values ​​and measured values ​​are referred to as "identical," "same," "equal," or "uniform" (including synonyms thereof), unless otherwise explicitly stated, this refers to a margin of error of plus or minus 20%.

[0056] The embodiments described herein will be explained with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope. Therefore, the present invention is not to be interpreted as being limited to the contents of the embodiments. In the configuration of the invention in the embodiments, the same reference numerals are used in common across different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. Also, when referring to similar functions, the hatch patterns may be the same, and reference numerals may not be assigned. Furthermore, in order to make the drawings easier to understand, some components may be omitted in perspective views or top views, etc.

[0057] Furthermore, in the drawings and other illustrations relating to this specification, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to the size or aspect ratio. The drawings are schematic representations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, they may include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences.

[0058] Furthermore, in drawings and other illustrations relating to this specification, arrows indicating the X, Y, and Z directions may be included. In this specification, the "X direction" refers to the direction along the X-axis, and unless explicitly stated, the forward and reverse directions may not be distinguished. The same applies to the "Y direction" and "Z direction." Also, the X, Y, and Z directions are directions that intersect each other. More specifically, the X, Y, and Z directions are directions that are orthogonal to each other. In this specification, one of the X, Y, or Z directions may be referred to as the "first direction" or "first direction." Another may be referred to as the "second direction" or "second direction." The remaining one may be referred to as the "third direction" or "third direction."

[0059] In this specification, when the same symbol is used for multiple elements, and especially when it is necessary to distinguish them, an identifying symbol such as "A", "b", "_1", "[n]", or "[m,n]" may be added to the symbol.

[0060] (Embodiment 1) A semiconductor device 100A according to one aspect of the present invention will now be described. The semiconductor device 100A according to one aspect of the present invention can be used, for example, as a pixel in a display device.

[0061] <Example Configuration> Figure 1 shows an example of the circuit configuration of the semiconductor device 100A. The semiconductor device 100A includes a pixel circuit 51A and a light-emitting element 61. The pixel circuit 51A includes transistors M1 to M8 and capacitors C1 to C3. In this embodiment, transistors M1 to M8 are enhancement-type (normally-off type) n-channel field-effect transistors unless otherwise specified. Therefore, their threshold voltage (also called "Vth") is greater than 0V.

[0062] The gate of transistor M1 is electrically connected to wiring GLa, one of its source or drain is electrically connected to wiring DL, and the other of its source or drain is electrically connected to the gate of transistor M2. Transistor M1 has the function of selecting whether to conduct or not conduct between the gate of transistor M2 and wiring DL.

[0063] Furthermore, the gate of transistor M2 is electrically connected to one terminal of capacitor C1, one of its source or drain is electrically connected to wiring 101, and the other of its source or drain is electrically connected to the other terminal of capacitor C1. Transistor M2 also has a back gate. The back gate of transistor M2 is electrically connected to one terminal of capacitor C2. The other terminal of capacitor C2 is electrically connected to the other of its source or drain.

[0064] The gate of transistor M3 is electrically connected to wiring GLB, one of its source or drain is electrically connected to one terminal of capacitor C1, and the other of its source or drain is electrically connected to the other terminal of capacitor C1. Transistor M3 has the function of selecting whether to conduct or not conduct between the gate and source of transistor M2.

[0065] Furthermore, the gate of transistor M4 is electrically connected to wiring GLB, one of its source or drain is electrically connected to wiring 102, and the other of its source or drain is electrically connected to one terminal of capacitor C2. Transistor M4 has a function to select whether to conduct or not conduct between wiring 102 and one terminal of capacitor C2.

[0066] The gate of transistor M5 is electrically connected to one terminal of capacitor C3, and one of its sources or drains is electrically connected to the other source or drain of transistor M2. The other source or drain of transistor M5 is electrically connected to the other terminal of capacitor C3 and to one terminal of light-emitting element 61 (e.g., the anode terminal). The other terminal of light-emitting element 61 (e.g., the cathode terminal) is electrically connected to wiring 104.

[0067] The gate of transistor M6 is electrically connected to wiring GLa, one of its source or drain is electrically connected to the other of the source or drain of transistor M2, and the other of the source or drain is electrically connected to wiring 103. Transistor M6 has the function of selecting whether to conduct or not conduct between the other of the source or drain of transistor M2 and wiring 103.

[0068] The gate of transistor M7 is electrically connected to wiring GLc, one of its source or drain is electrically connected to wiring 102, and the other of its source or drain is electrically connected to the gate of transistor M5. Transistor M7 has the function of selecting whether to conduct or not conduct between the gate of transistor M5 and wiring 102.

[0069] The gate of transistor M8 is electrically connected to wiring GLd, one of its sources or drains is electrically connected to the gate of transistor M5, and the other of its sources or drains is electrically connected to wiring 103. Transistor M8 has the function of selecting whether to conduct or not conduct between the gate of transistor M5 and wiring 103.

[0070] Furthermore, the region where the other terminals of capacitors C1 and C2, the other source or drain of transistor M2, the other source or drain of transistor M3, one source or drain of transistor M5, and one source or drain of transistor M6 are electrically connected is also called node ND1.

[0071] Furthermore, the region where one terminal of capacitance C2, the back gate of transistor M2, and the other source or drain of transistor M4 are electrically connected is also called node ND2.

[0072] Furthermore, the region where the other source or drain of transistor M1, the other source or drain of transistor M3, one terminal of capacitor C1, and the gate of transistor M2 are electrically connected is also called node ND3.

[0073] Furthermore, the region where the gate of transistor M5, one terminal of capacitor C3, the other source or drain of transistor M7, and one source or drain of transistor M8 are electrically connected is also called node ND4.

[0074] Capacitor C1 has the function of maintaining the potential difference between the source or drain of transistor M2 and the gate of transistor M2 when node ND3 is floating. Capacitor C2 has the function of maintaining the potential difference between the source or drain of transistor M2 and the back gate of transistor M2 when node ND2 is floating. Capacitor C3 has the function of maintaining the potential difference between the source or drain of transistor M5 and the gate of transistor M5 when node ND4 is floating.

[0075] A pixel circuit 51A according to one aspect of the present invention can use transistors containing various semiconductors. For example, a transistor containing a single-crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in the channel formation region can be used. Furthermore, it is not limited to elemental semiconductors whose main component is a single element (e.g., silicon (Si) or germanium (Ge)), but compound semiconductors (e.g., silicon germanium (SiGe) or gallium arsenide (GaAs)) or oxide semiconductors can be used.

[0076] Furthermore, while this embodiment and others show an example of configuring the semiconductor device 100A using n-channel transistors, the present invention is not limited to this. Some or all of the transistors constituting the semiconductor device 100A may be p-channel transistors.

[0077] As an example, Figure 2 shows a circuit configuration example of a semiconductor device 100A in which transistors M6 to M8, among the transistors constituting the pixel circuit 51A, are p-channel type transistors. In the circuit configuration shown in Figure 2, the gate of transistor M6 is electrically connected to the wiring GLe.

[0078] Furthermore, the pixel circuit 51A according to one aspect of the present invention can use transistors of various structures. For example, various transistor configurations can be used, such as planar type, fin type, tri-gate type, top-gate type, bottom-gate type, and double-gate type (structure in which gates are arranged above and below the channel). In addition, MOS type transistors, junction type transistors, bipolar transistors, etc., can be used as transistors according to one aspect of the present invention.

[0079] For example, an OS transistor (a transistor containing an oxide semiconductor in the semiconductor layer where the channel is formed) may be used as the transistor constituting the pixel circuit 51A. Since oxide semiconductors have a band gap of 2 eV or more, their off-current is extremely low.

[0080] At room temperature, the off-current value of an OS transistor per 1 μm channel width is 1 aA (1 × 10⁻¹⁶). -18 A) Below, 1zA(1×10 -21 A) Less than or equal to 1yA(1×10 -24 A) It can be less than or equal to the following. Note that the off-current value of a Si transistor (a transistor in which the semiconductor layer on which the channel is formed contains silicon) per 1 μm of channel width at room temperature is 1 fA (1 × 10⁻¹⁶). -15 A) More than 1pA (1×10 -12 A) The answer is as follows. Therefore, it can be said that the off-current of an OS transistor is about 10 orders of magnitude lower than that of a Si transistor.

[0081] By using OS transistors in the pixel circuit 51A, the charge written to each node can be retained for a long period of time. For example, when displaying a still image that does not require rewriting for each frame, it becomes possible to continue displaying the image even if the operation of the peripheral drive circuit is stopped. This method of stopping the operation of the peripheral drive circuit while a still image is being displayed is also called "idling stop drive." By performing idle stop drive, the power consumption of the display device can be reduced.

[0082] Furthermore, OS transistors exhibit almost no increase in off-current even in high-temperature environments. Specifically, the off-current hardly increases even at ambient temperatures between room temperature and 200°C. In addition, the on-current does not decrease significantly even in high-temperature environments. Semiconductor devices containing OS transistors operate stably and with high reliability even in high-temperature environments.

[0083] Furthermore, OS transistors have high dielectric strength between the source and drain. By using OS transistors in the transistors that make up the pixel circuit 51A, stable operation is achieved even when the potential difference between potential Va and potential Vc is large, resulting in a highly reliable semiconductor device. In particular, it is preferable to use OS transistors for one or both of transistors M2 and M5.

[0084] The semiconductor layer of the OS transistor preferably comprises, for example, indium, M (where M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium), and zinc. In particular, M is preferably one or more selected from aluminum, gallium, yttrium, and tin.

[0085] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO") as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used as the semiconductor layer.

[0086] When the semiconductor layer is an In-M-Zn oxide, it is preferable that the atomic ratio of In in the In-M-Zn oxide is greater than or equal to the atomic ratio of M. Possible atomic ratios of metal elements in such an In-M-Zn oxide include: In:M:Zn=1:1:1 or near that composition, In:M:Zn=1:1:1.2 or near that composition, In:M:Zn=1:3:2 or near that composition, In:M:Zn=1:3:4 or near that composition, In:M:Zn=2:1:3 or near that composition, In:M:Zn=3:1:2 or near that composition, and In:M:Zn=4:2:3 Examples include compositions near the desired atomic ratio, such as In:M:Zn=4:2:4.1 or near that ratio, In:M:Zn=5:1:3 or near that ratio, In:M:Zn=5:1:6 or near that ratio, In:M:Zn=5:1:7 or near that ratio, In:M:Zn=5:1:8 or near that ratio, In:M:Zn=6:1:6 or near that ratio, In:M:Zn=5:2:5 or near that ratio, etc. Note that "nearby composition" includes a range of ±30% of the desired atomic ratio.

[0087] For example, when describing a composition with an atomic ratio of In:Ga:Zn = 4:2:3 or a similar ratio, it includes cases where, when the atomic ratio of In is 4, the atomic ratio of Ga is between 1 and 3, and the atomic ratio of Zn is between 2 and 4. Also, when describing a composition with an atomic ratio of In:Ga:Zn = 5:1:6 or a similar ratio, it includes cases where, when the atomic ratio of In is 5, the atomic ratio of Ga is greater than 0.1 and 2 or less, and the atomic ratio of Zn is between 5 and 7. Furthermore, when describing a composition with an atomic ratio of In:Ga:Zn = 1:1:1 or a similar ratio, it includes cases where, when the atomic ratio of In is 1, the atomic ratio of Ga is greater than 0.1 and 2 or less, and the atomic ratio of Zn is greater than 0.1 and 2 or less.

[0088] Furthermore, transistor M2 has the function of controlling the amount of current Ie flowing through the light-emitting element 61. In other words, transistor M2 has the function of controlling the amount of light emitted by the light-emitting element 61. Therefore, transistor M2 is also called a "driving transistor".

[0089] Furthermore, transistor M5 has the function of switching between conduction and non-conductivity between transistor M2 and the light-emitting element 61. When transistor M5 is in the off state, the light-emitting element 61 is extinguished, and when transistor M5 is in the on state, the light-emitting element 61 can emit light. Therefore, transistor M5 is also called the "light-emitting transistor". In order to reliably supply the amount of current determined by the drive transistor to the light-emitting element 61, transistor M5 must be reliably in the on state regardless of the values ​​of its source potential and drain potential.

[0090] Of the transistors constituting the pixel circuit 51A, transistors M1, M3, M4, M6, M7, and M8 function as switches. Therefore, the semiconductor device 100A can be shown as in Figure 3.

[0091] Furthermore, transistor M5 also functions as a switch. Therefore, semiconductor device 100A can also be shown as in Figure 4. Transistors M1 and M3 to M8 can be replaced with elements that can realize the function of a switch.

[0092] The transistors constituting the pixel circuit 51A may be transistors with back gates. By providing a back gate, the electric field generated outside the transistor is less likely to act on the channel formation region, thereby stabilizing the operation of the semiconductor device and improving its reliability. Furthermore, the threshold voltage of the transistor can be changed by controlling the potential of the back gate.

[0093] Figure 5 shows an example of the circuit configuration of semiconductor device 100A in which not only transistor M2, but also transistors M1 and M3 through M8 are composed of transistors with back gates. In Figure 5, examples are shown in which the gate and back gate are electrically connected for each of transistors M1 and M3 through M8. However, it is not necessary to provide back gates for all transistors that make up the semiconductor device.

[0094] Furthermore, the gate and back gate may not be electrically connected, and an arbitrary potential may be supplied to the back gate. Note that the potential supplied to the back gate is not limited to a fixed potential. The potential supplied to the back gate of transistors constituting a semiconductor device may differ for each transistor, or it may be the same for each transistor.

[0095] Figure 6 shows a planar layout diagram of the semiconductor device 100A shown in Figure 5. In the planar layout diagram shown in Figure 6, the semiconductor layer 111 of transistor M1 is provided on the wiring GLa. The wiring GLa and the semiconductor layer 111 have overlapping regions. In addition, a portion of the wiring GLa functions as the back gate of transistor M1. The conductor 112 functions as the gate of transistor M1 and is electrically connected to the wiring GLa at the contact hole 113.

[0096] Furthermore, a semiconductor layer 114 of transistor M3 is provided on the wiring GLb. The wiring GLb and the semiconductor layer 114 have overlapping regions. In addition, a portion of the wiring GLb functions as the back gate of transistor M3. The conductor 115 functions as the gate of transistor M3 and is electrically connected to the wiring GLb at the contact hole 116.

[0097] Furthermore, a semiconductor layer 117 of transistor M4 is provided on the wiring GLb. The wiring GLb and the semiconductor layer 117 have overlapping regions. In addition, a portion of the wiring GLb functions as the back gate of transistor M4. The conductor 118 functions as the gate of transistor M4 and is electrically connected to the wiring GLb at the contact hole 119.

[0098] Furthermore, a semiconductor layer 121 of transistor M6 is provided on the wiring GLa. The wiring GLa and the semiconductor layer 121 have overlapping regions. In addition, a portion of the wiring GLa functions as the back gate of transistor M6. The conductor 122 functions as the gate of transistor M6 and is electrically connected to the wiring GLa at the contact hole 123.

[0099] Furthermore, a semiconductor layer 124 of transistor M7 is provided on the wiring GLc. The wiring GLc and the semiconductor layer 124 have overlapping regions. In addition, a portion of the wiring GLc functions as the back gate of transistor M7. The conductor 125 functions as the gate of transistor M7 and is electrically connected to the wiring GLc at the contact hole 126.

[0100] Furthermore, a semiconductor layer 127 of transistor M8 is provided on the wiring GLd. The wiring GLd and the semiconductor layer 127 have overlapping regions. In addition, a portion of the wiring GLd functions as the back gate of transistor M8. Conductor 128 functions as the gate of transistor M8 and is electrically connected to the wiring GLd at the contact hole 129.

[0101] One of the sources or drains of transistor M1 is electrically connected to wiring DL via conductive layer 131. The other of the sources or drains of transistor M1 is electrically connected to conductive layer 133 via conductive layer 132.

[0102] Furthermore, a semiconductor layer 134 of transistor M2 is provided on the conductive layer 136. The conductive layer 136 and the semiconductor layer 134 have overlapping regions. A portion of the conductive layer 136 functions as the back gate of transistor M2. In addition, a conductive layer 135, which is electrically connected to the conductive layer 133, functions as the gate of transistor M2.

[0103] One of the sources or drains of transistor M2 is electrically connected to wiring 101 via conductive layer 137. The other of the sources or drains of transistor M2 is electrically connected to conductive layer 138. The region where conductive layer 133 and conductive layer 138 overlap functions as capacitance C1. The region where conductive layer 136 and conductive layer 138 overlap functions as capacitance C2.

[0104] Furthermore, a semiconductor layer 142 of transistor M5 is provided on the conductive layer 141. The conductive layer 141 and the semiconductor layer 142 have overlapping regions. A portion of the conductive layer 141 functions as the back gate of transistor M5. The conductor 143 functions as the gate of transistor M5 and is electrically connected to the wiring GLc at the contact hole 144.

[0105] One of the sources or drains of transistor M5 is electrically connected to conductive layer 138. The other of the sources or drains of transistor M5 is electrically connected to conductive layer 145. The region where conductive layer 141 and conductive layer 145 overlap functions as capacitance C3. Conductive layer 145 is electrically connected to light-emitting element 61.

[0106] Furthermore, one of the sources or drains of transistor M5 is electrically connected to wiring 102 via conductive layer 146. The other source or drain of transistor M5 and one of the sources or drains of transistor M8 are electrically connected to conductive layer 141 via conductive layer 147. The other source or drain of transistor M8 is electrically connected to wiring 103 via conductive layer 148.

[0107] Furthermore, conductive layer 138 functions as node ND1, conductive layer 136 functions as node ND2, conductive layer 133 functions as node ND3, and conductive layer 141 functions as node ND4.

[0108] Furthermore, as shown in Figure 7, a wire GLe may be provided to electrically connect the gate of transistor M6 to the wire GLe. Alternatively, a wire GLf may be provided to electrically connect the gate of transistor M4 to the wire Glf. By providing wires GLe and GLf, the on and off states of transistors M1 to M8 can be controlled independently.

[0109] Furthermore, as shown in Figure 8, either the source or drain of transistor M2 and either the source or drain of transistor M7 may be electrically connected to wiring 101. Also, wiring 103 and wiring 104 may be electrically connected. That is, the cathode of light-emitting element 61 may be electrically connected to wiring 103.

[0110] Furthermore, if the gate capacitance of transistor M2 is sufficiently large, capacitance C1 does not need to be formed. If the back gate capacitance of transistor M2 is sufficiently large, capacitance C2 does not need to be formed. If the gate capacitance of transistor M5 is sufficiently large, capacitance C3 does not need to be formed.

[0111] Alternatively, as shown in Figure 9, one of the sources or drains of transistor M2, one of the sources or drains of transistor M4, and one of the sources or drains of transistor M7 may be electrically connected to the wiring 101.

[0112] Furthermore, as shown in Figure 10, one source or drain of transistor M2, one source or drain of transistor M7, and the other source or drain of transistor M6 may be electrically connected to the wiring 101.

[0113] Furthermore, as shown in Figure 11, one source or drain of transistor M2, one source or drain of transistor M4, one source or drain of transistor M7, and the other source or drain of transistor M6 may be electrically connected to the wiring 101. In the circuit configurations shown in Figures 10 and 11, the formation of transistor M8 and wiring GLd can be omitted.

[0114] Alternatively, as shown in Figure 12, one source or drain of transistor M4 may be electrically connected to wiring 102, and one source or drain of transistor M7 may be electrically connected to wiring 106. The other source or drain of transistor M6 may be electrically connected to wiring 103, and one source or drain of transistor M8 may be electrically connected to wiring 107.

[0115] Furthermore, as shown in Figure 13, some or all of transistors M6, M7, and M8 may be replaced with diodes. Replacing transistor M7 with a diode eliminates the need to form wiring GLc. Replacing transistor M8 with a diode eliminates the need to form wiring GLd.

[0116] Furthermore, as shown in Figure 14, some or all of transistors M4, M6, M7, and M8 may be replaced with diodes.

[0117] Alternatively, as shown in Figure 15, a transistor M9 may be placed between the gate of transistor M2 and the wiring 103.

[0118] The transistors constituting the pixel circuit 51A may be single-gate transistors with one gate between the source and drain, or double-gate transistors. Figure 16A shows an example of a circuit symbol for a double-gate transistor 180A.

[0119] Transistor 180A has a configuration in which transistors Tr1 and Tr2 are connected in series. Figure 16A shows a state in which one source or drain of transistor Tr1 is electrically connected to terminal S, the other source or drain of transistor Tr1 is electrically connected to one source or drain of transistor Tr2, and the other source or drain of transistor Tr2 is electrically connected to terminal D. Also in Figure 16A, the gates of transistors Tr1 and Tr2 are electrically connected and are also electrically connected to terminal G.

[0120] The transistor 180A shown in Figure 16A has the function of switching between conduction and non-conductivity between terminals S and D by changing the potential of terminal G. Therefore, the double-gate transistor 180A contains transistors Tr1 and Tr2 and functions as a single transistor. In other words, in Figure 16A, one of the source or drain of transistor 180A is electrically connected to terminal S, the other source or drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.

[0121] Furthermore, the transistors constituting the pixel circuit 51A may be triple-gate transistors. Figure 16B shows an example of a circuit symbol for a triple-gate transistor 180B.

[0122] Transistor 180B has a configuration in which transistors Tr1, Tr2, and Tr3 are connected in series. Figure 16B shows a state in which one source or drain of transistor Tr1 is electrically connected to terminal S, the other source or drain of transistor Tr1 is electrically connected to one source or drain of transistor Tr2, the other source or drain of transistor Tr2 is electrically connected to one source or drain of transistor Tr3, and the other source or drain of transistor Tr3 is electrically connected to terminal D. Also in Figure 16B, the gates of transistors Tr1, Tr2, and Tr3 are electrically connected and also electrically connected to terminal G.

[0123] The transistor 180B shown in Figure 16B has the function of switching between conduction and non-conductivity between terminals S and D by changing the potential of terminal G. Therefore, the triple-gate transistor 180B contains transistors Tr1, Tr2, and Tr3 and functions as a single transistor. In other words, in Figure 16B, one of the source or drain of transistor 180B is electrically connected to terminal S, the other source or drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.

[0124] Furthermore, the transistors constituting the pixel circuit 51A may be configured with four or more transistors connected in series. The transistor 180C shown in Figure 16C shows a configuration in which six transistors (transistors Tr1 to Tr6) are connected in series. It also shows a configuration in which the gates of the six transistors are electrically connected and are electrically connected to terminal G.

[0125] The transistor 180C shown in Figure 16C has the function of switching between conduction and non-conductivity between terminals S and D by changing the potential of terminal G. Therefore, transistor 180C contains transistors Tr1 to Tr6 and functions as a single transistor. In other words, in Figure 16C, one of the source or drain of transistor 180C is electrically connected to terminal S, the other source or drain is electrically connected to terminal D, and the gate is electrically connected to terminal G.

[0126] Transistors that have multiple gates and whose multiple gates are electrically connected, such as transistors 180A, 180B, and 180C, are sometimes called "multi-gate transistors."

[0127] For example, when operating a transistor in the saturation region, the channel length of the transistor may be increased to improve its electrical characteristics in the saturation region. A multi-gate transistor may be used to realize a transistor with a long channel length.

[0128] Various display elements can be used as the light-emitting element 61, such as EL elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), micro LEDs, QLEDs (Quantum-dot Light Emitting Diodes), and electron emission elements.

[0129] <Example of operation> Next, an example of the operation of the semiconductor device 100A shown in Figure 1 will be explained using the drawings. Figure 17 is a timing chart for illustrating the operation example of the semiconductor device 100A. Figures 18 to 24 are circuit diagrams for illustrating the operation example of the semiconductor device 100A.

[0130] The video signal Vdata is supplied to wiring DL. Potential Va is supplied to wiring 101, potential V1 to wiring 102, potential V0 to wiring 103, and potential Vc to wiring 104. In addition, either potential H or potential L is supplied to wiring GLa, wiring GLB, wiring GLC, and wiring GLD, respectively.

[0131] The potential Va is the anode potential, and the potential Vc is the cathode potential. Furthermore, potential V1 is a higher potential than potential V0, and supplying potential V1 to the gate of a transistor will turn the transistor ON. Also, potential V0 is a potential that will turn the transistor OFF by supplying potential V0 to the gate of the transistor. Potential V0 is, for example, 0V or potential L. In this embodiment, for example, potential V0 is set to 0V and potential V1 to 3V. Furthermore, potential Va is set to 15V and potential Vc to 0V.

[0132] The semiconductor device 100A has a function to control the magnitude of the current Ie (see Figure 23) flowing through the light-emitting element 61 in accordance with the video signal Vdata supplied from the wiring DL. The luminescence brightness of the light-emitting element 61 is controlled by the magnitude of the current Ie.

[0133] In addition, in drawings, symbols indicating potential, such as "H," "L," "V0," or "V1" (also called "potential symbols"), may be placed adjacent to terminals or wiring. Furthermore, to make potential changes in terminals and wiring easier to understand, potential symbols attached to terminals and wiring with potential changes may be enclosed in a box. Additionally, an "×" symbol may be superimposed on an off-state transistor.

[0134] The current Ie flowing through the light-emitting element 61 is mainly determined by the video signal Vdata and the Vth of transistor M2. Therefore, even if the same video signal Vdata is supplied to multiple pixel circuits, the current Ie will differ for each pixel if the Vth of transistor M2 in each pixel circuit is different. Thus, variations in the Vth of transistor M2 contribute to a decrease in display quality.

[0135] Therefore, by acquiring the Vth of transistor M2 for each pixel, the variation in current Ie is reduced. Note that the operation of acquiring the Vth of transistor M2 is sometimes called "threshold correction operation."

[0136] [Vth correction operation] First, a reset operation is performed during period T11. Specifically, potential H is supplied to wiring GLa, wiring GLB, and wiring GLd, and potential L is supplied to wiring GLc (see Figure 18). In this specification, "potential H" is the potential that turns on an n-channel transistor and turns off a p-channel transistor. Also, "potential L" is the potential that turns off an n-channel transistor and turns on a p-channel transistor.

[0137] Therefore, transistors M1, M3, M4, M6, and M8 are turned on, and transistor M7 is turned off.

[0138] Furthermore, potential V0 is supplied to node ND1 via transistor M6. Additionally, potential V0 is supplied to node ND3 via transistors M6 and M3. Potential V1 is supplied to node ND2 via transistor M4. Potential V0 is supplied to node ND4 via transistor M8. Therefore, transistor M5 is in the off state.

[0139] Furthermore, during period T11, wiring DL and wiring 103 become conductive via transistors M1, M3, and M6. Therefore, during period T11, it is preferable to set wiring DL and wiring 103 to the same potential or to set wiring DL to a floating state. Also, when the pixel circuit 51A is configured as shown in Figure 7, wiring GLa and wiring GLe are separated, so the reset operation during period T11 can be performed by supplying potential L to wiring GLa and potential H to wiring GLe.

[0140] Next, during period T12, a potential L is supplied to the wiring GLa (see Figure 19). This causes transistors M1 and M6 to turn off.

[0141] Since the potential of node ND2 is potential V1, transistor M2 is in the ON state. Therefore, the potential of node ND1 rises via wiring 101 and transistor M2. Also, since transistor M3 is in the ON state, the potential of node ND3 rises. Specifically, the potentials of nodes ND1 and ND3 rise to the value obtained by subtracting the Vth of transistor M2 from the potential V1.

[0142] Next, during period T13, a potential L is supplied to the wiring GLb (see Figure 20). As a result, transistors M3 and M4 turn off. Consequently, nodes ND1, ND2, and ND3 become floating, and the charge supplied to each node is retained.

[0143] [Data writing operation] During period T14, potential H is supplied to wiring GLa, potential H is supplied to wiring GLc, and potential L is supplied to wiring GLd (see Figure 21). As a result, transistor M1 turns on and the video signal Vdata is supplied to node ND3. Also, transistor M6 turns on and potential V0 is supplied to node ND1.

[0144] Since nodes ND1 and ND2 are capacitively coupled via capacitor C2, when the potential of node ND1 changes from V1-Vth to V0, the potential of node ND2 also changes accordingly. In this embodiment, since potential V0 is 0V, the potential of node ND2 is expressed as potential V1-(potential V1-Vth). That is, the potential of node ND2 is Vth.

[0145] Additionally, transistor M7 turns on and transistor M8 turns off, supplying potential V1 to node ND4. Transistor M5 also turns on, causing the potential at the anode terminal of light-emitting element 61 to become potential V0.

[0146] Next, during period T15, a potential L is supplied to the wiring GLc (see Figure 22). As a result, transistor M7 turns off, and node ND4 becomes floating.

[0147] [Light emission operation] During period T16, a potential L is supplied to the wiring GLa (see Figure 23). This turns off transistors M1 and M6. Current flows from wiring 101 to wiring 104. That is, current Ie flows to the light-emitting element 61, and the light-emitting element 61 emits light with a brightness corresponding to the current Ie. Also, when current flows from wiring 101 to wiring 104, the potential of node ND1 and the anode terminal of the light-emitting element 61 rises.

[0148] Furthermore, nodes ND2 and ND3 become floating. Nodes ND1 and ND3 are capacitively coupled via capacitor C1. During period T16, when the potential of node ND1 changes from potential V0 to potential Va1, the potential of node ND3 also changes similarly. Here, the potential of node ND3 becomes the video signal Vdata + potential Va1. That is, even if the source potential of transistor M2 changes, the potential difference (voltage) between the gate and source of transistor M2 remains the same as the video signal Vdata.

[0149] Similarly, in response to the potential change at node ND1, the potential at node ND2 becomes Vth + potential Va1. Therefore, the potential difference between the back gate and source of transistor M2 remains at Vth.

[0150] Furthermore, the anode terminal of the light-emitting element 61 and node ND4 are capacitively coupled via capacitor C3. Therefore, when the potential of the anode terminal of the light-emitting element 61 changes from potential V0 to potential Va2, the potential of node ND4 also changes accordingly. In this case, the potential of node ND4 becomes potential V1 + potential Va2. That is, even if the potential of the anode terminal of the light-emitting element 61 changes, the potential difference (voltage) between the gate and source of transistor M5 remains at potential V1 - potential V0.

[0151] For example, if the gate of transistor M5 is at a fixed potential, increasing the source potential of transistor M5 will decrease the potential difference between the gate and source. When the potential difference between the gate and source falls below the threshold voltage of transistor M5, transistor M5 will turn off. Therefore, if the anode potential is increased, a higher potential must also be supplied to the gate, requiring the addition of a power supply or power supply circuit.

[0152] In a semiconductor device 100A according to one aspect of the present invention, a bootstrap circuit is configured by providing a capacitor C3 between the gate and source of transistor M5. This allows the ON state of transistor M5 to be maintained even when the anode potential is increased, without the need to add a power supply circuit. Therefore, a stable current Ie can be supplied to the light-emitting element 61. Capacitor C3 is sometimes referred to as the "bootstrap capacitor." Capacitors C1 and C2 also function as bootstrap capacitors.

[0153] A semiconductor device 100A according to one aspect of the present invention can be suitably used not only for single-structure light-emitting elements but also for tandem-structure light-emitting elements that require a larger driving voltage than single-structure light-emitting elements. The structure of the light-emitting element will be described later.

[0154] Furthermore, as mentioned above, the amount of current Ie flowing through the light-emitting element 61 is determined by the video signal Vdata and the Vth of transistor M2. In a semiconductor device 100A according to one aspect of the present invention, the amount of current Ie flowing through the light-emitting element 61 can be controlled by the video signal Vdata by performing a threshold correction operation.

[0155] Since the luminescence brightness of the light-emitting element 61 is controlled by the video signal Vdata, it is necessary to ensure that the transistor M5 is kept ON during light emission operation. In one aspect of the present invention, the semiconductor device 100A can be reliably kept ON during light emission operation. When the semiconductor device 100A according to one aspect of the present invention is used in a display device, accurate control of the current Ie becomes possible, thereby improving the reproduction of intermediate tones. Therefore, the display quality of the display device can be improved.

[0156] [Extinguishing operation] During period T17, a potential H is supplied to the wiring GLd (see Figure 24). This turns on transistor M8. Then, a potential V0 is supplied from wiring 103 to node ND4, and transistor M5 turns off. When transistor M5 is turned off, no current flows to the light-emitting element 61, and the light-emitting element 61 stops emitting light.

[0157] Display devices that use light-emitting elements such as EL elements as display elements can keep the light-emitting elements lit for the duration of one frame. This driving method is also called "hold type" or "hold type drive." By using hold type drive for the display device, phenomena such as flicker on the display screen can be reduced. On the other hand, with hold type drive, afterimages and blurring of images are more likely to occur when displaying videos. The resolution that a person perceives when displaying a video is also called "video resolution." In other words, hold type drive tends to reduce video resolution.

[0158] Furthermore, "black insertion drive" is known to improve afterimages and image blurring in video display. "Black insertion drive" is also called "pseudo-impulse drive" or "pseudo-impulse drive." Black insertion drive is a driving method that displays black every other frame, or displays black for a certain period within a frame.

[0159] A semiconductor device 100A according to one aspect of the present invention facilitates the implementation of black insertion drive through extinguishing operation. A display device using the semiconductor device 100A according to one aspect of the present invention is less prone to a decrease in video resolution and can achieve high-quality video display.

[0160] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0161] (Embodiment 2) This embodiment describes a semiconductor device 100B according to one aspect of the present invention. Semiconductor device 100B is a modified example of semiconductor device 100A. Therefore, in order to reduce repetition in the explanation, we will mainly describe the differences between semiconductor device 100B and semiconductor device 100A.

[0162] <Example Configuration> Figure 25 shows an example of the circuit configuration of semiconductor device 100B. Semiconductor device 100B includes a pixel circuit 51B and a light-emitting element 61. Pixel circuit 51B has a configuration similar to pixel circuit 51A but without transistor M8. Therefore, the wiring GLd electrically connected to the gate of transistor M8 can be reduced. In addition, either the source or drain of transistor M7 is electrically connected to wiring GLc, and the gate of transistor M7 is electrically connected to wiring 105.

[0163] <Example of operation> Next, an example of the operation of semiconductor device 100B will be explained using drawings. Figure 26 is a timing chart for illustrating an example of the operation of semiconductor device 100B. Figures 27 to 32 are circuit diagrams for illustrating an example of the operation of semiconductor device 100B.

[0164] The wiring 105 is supplied with a potential of V2. Potential V2 is higher than potential V1. Also, potential V2 is less than or equal to potential H. In this embodiment, for example, potential V2 is set to 6V.

[0165] [Vth correction operation] First, a reset operation is performed during period T21. Specifically, a potential H is supplied to wiring GLa and GLB, and a potential L is supplied to wiring GLC (see Figure 27). As a result, transistors M1, M3, M4, M6, and M7 are turned ON.

[0166] Furthermore, potential V0 is supplied to node ND1 via transistor M6. Additionally, potential V0 is supplied to node ND3 via transistors M6 and M3. Potential V1 is supplied to node ND2 via transistor M4. Potential L is supplied to node ND4 via transistor M7. Therefore, transistor M5 is in the off state.

[0167] Furthermore, similar to the period T11 described above, it is preferable to either set wiring DL and wiring 103 to the same potential or to put wiring DL in a floating state during period T21.

[0168] Next, during period T22, a potential L is supplied to the wiring GLa (see Figure 28). This turns off transistors M1 and M6. Similar to period T12 described above, the potentials at nodes ND1 and ND3 rise to the value obtained by subtracting the Vth of transistor M2 from the potential V1.

[0169] Next, during period T23, a potential L is supplied to the wiring GLb (see Figure 29). Transistors M3 and M4 then turn off. Nodes ND1, ND2, and ND3 become floating, and the charge supplied to each node is retained.

[0170] [Data writing operation] During period T24, a potential H is supplied to wiring GLa and a potential H is supplied to wiring GLc (see Figure 30). As a result, transistor M1 turns on and the video signal Vdata is supplied to node ND3. Transistor M6 also turns on and a potential V0 is supplied to node ND1. As with period T14 described above, the potential at node ND2 becomes Vth.

[0171] Furthermore, since transistor M7 is ON, charge is supplied from wiring GLc to node ND4. The potential of node ND4 rises to the value obtained by subtracting the Vth of transistor M7 from the potential H. In this embodiment, the potential H is 6V. If the Vth of transistors M5 and M7 is 1V, the potential of node ND4 (potential H-Vth) becomes 5V. Therefore, transistor M5 is ON.

[0172] [Light emission operation] During period T25, a potential L is supplied to the wiring GLa (see Figure 31). Transistors M1 and M6 are then turned off. Similar to period T16 described above, current flows from wiring 101 to wiring 104, and the light-emitting element 61 emits light with a brightness corresponding to the current Ie. Also, the potentials of node ND1 and the anode terminal of the light-emitting element 61 rise. The potential of node ND1 becomes potential Va1, and the potential of the anode terminal becomes potential Va2. Furthermore, the potential of node ND3 becomes the video signal Vdata + potential Va1, and the potential of node ND2 becomes Vth + potential Va1.

[0173] Node ND4 is in a floating state, and the potential difference between node ND4 and the anode terminal is maintained via capacitance C3. Therefore, the potential of node ND4 changes in accordance with the potential change at the anode terminal of the light-emitting element 61. When the potential at the anode terminal rises from potential V0 to potential Va2, the potential of node ND4 becomes potential H - Vth + potential Va2. In other words, even if the potential at the anode terminal, which corresponds to the source side of transistor M5, rises, the ON state of transistor M5 is reliably maintained.

[0174] In this embodiment, both potential H and potential V2 are 6V (the same potential). Therefore, the potential at node ND4 becomes higher than the potential of either the source or drain of transistor M7, and the potential of the gate, causing transistor M7 to turn off.

[0175] [Extinguishing operation] During period T26, a potential L is supplied to the wiring GLc (see Figure 32). As a result, transistor M7 turns ON, and the potential of node ND4 becomes L. When the potential of node ND4 becomes L, transistor M5 turns OFF, and the light emission of the light-emitting element 61 stops.

[0176] The semiconductor device 100B, like the semiconductor device 100A, can be suitably used not only for single-structure light-emitting elements but also for tandem-structure light-emitting elements that require a larger driving voltage than single-structure elements. Furthermore, like the semiconductor device 100A, it can perform black insertion drive. A display device using the semiconductor device 100B according to one aspect of the present invention can achieve high-quality video display with less degradation of video resolution.

[0177] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0178] (Embodiment 3) This embodiment describes a semiconductor device 100C according to one aspect of the present invention. The semiconductor device 100C is a modified example of the semiconductor device 100B. Therefore, the semiconductor device 100C is also a modified example of the semiconductor device 100A. To reduce repetition in the explanation, we will mainly describe the differences between the semiconductor device 100C and semiconductor devices 100A and 100B.

[0179] <Example Configuration> Figure 33 shows an example of the circuit configuration of semiconductor device 100C. Semiconductor device 100C includes a pixel circuit 51C and a light-emitting element 61. Pixel circuit 51C differs from pixel circuit 51B in that the gate of transistor M7 is electrically connected to wiring GLa. Therefore, the wiring 105 shown in Figure 25 does not need to be provided. Thus, the formation of wiring 105 can be omitted.

[0180] Of the transistors constituting the pixel circuit 51C, transistors M1, M3, M4, M6, and M7 function as switches. Therefore, the semiconductor device 100C can be shown as in Figure 34.

[0181] <Example of operation> Next, an example of the operation of semiconductor device 100C will be explained using drawings. Figure 35 is a timing chart for illustrating an example of the operation of semiconductor device 100C. Figures 36 to 41 are circuit diagrams for illustrating an example of the operation of semiconductor device 100C.

[0182] [Vth correction operation] First, during period T31, the same reset operation as in period T21 is performed. Specifically, a potential H is supplied to wiring GLa and wiring GLB, and a potential L is supplied to wiring GLC (see Figure 36). During period T31, transistors M1, M3, M4, M6, and M7 are turned ON.

[0183] Furthermore, potential V0 is supplied to node ND1 via transistor M6. Additionally, potential V0 is supplied to node ND3 via transistors M6 and M3. Potential V1 is supplied to node ND2 via transistor M4. Potential L is supplied to node ND4 via transistor M7. Therefore, transistor M5 is in the off state.

[0184] Furthermore, similar to the period T21 described above, it is preferable to either set wiring DL and wiring 103 to the same potential or to put wiring DL in a floating state during period T31.

[0185] Next, during period T32, a potential L is supplied to the wiring GLa (see Figure 37). As a result, transistors M1, M6, and M7 turn off. Similar to period T12 described above, the potentials of nodes ND1 and ND3 rise to the value obtained by subtracting the Vth of transistor M2 from the potential V1. Also, node ND4 becomes floating, and the charge supplied to node ND4 is retained.

[0186] Next, during period T33, a potential L is supplied to the wiring GLb (see Figure 38). Transistors M3 and M4 then turn off. Nodes ND1, ND2, and ND3 become floating, and the charge supplied to each node is retained.

[0187] [Data writing operation] During period T34, a potential H is supplied to wiring GLa and a potential H is supplied to wiring GLc (see Figure 39). As a result, transistor M1 turns on and the video signal Vdata is supplied to node ND3. Transistor M6 also turns on and a potential V0 is supplied to node ND1. As with period T24 described above, the potential at node ND2 becomes Vth.

[0188] Furthermore, transistor M7 turns on, and charge is supplied from wiring GLc to node ND4. The potential of node ND4 rises to the value obtained by subtracting the Vth of transistor M7 from the potential H. In this embodiment, for example, if the potential H is 6V and the Vth of transistors M5 and M7 is 1V, then the potential of node ND4 (potential H-Vth) becomes 5V. Therefore, transistor M5 turns on.

[0189] [Light emission operation] During period T35, a potential L is supplied to wiring GLa (see Figure 40). Transistors M1 and M6 are then turned off. Similar to period T25 described above, current flows from wiring 101 to wiring 104, and the light-emitting element 61 emits light with a brightness corresponding to the current Ie. At this time, the potentials of node ND1 and the anode terminal of the light-emitting element 61 rise. The potential of node ND1 becomes potential Va1, and the potential of the anode terminal becomes potential Va2. Also, the potential of node ND3 becomes the video signal Vdata + potential Va1, and the potential of node ND2 becomes Vth + potential Va1.

[0190] Node ND4 is in a floating state, and the potential difference between node ND4 and the anode terminal is maintained via capacitance C3. Therefore, the potential of node ND4 changes in accordance with the potential change at the anode terminal. When the potential at the anode terminal rises from potential V0 to potential Va2, the potential of node ND4 becomes potential H - Vth + potential Va2. In other words, even if the potential at the anode terminal, which corresponds to the source side of transistor M5, rises, the ON state of transistor M5 is reliably maintained.

[0191] [Extinguishing operation] During period T36, a potential H is supplied to wiring GLa and a potential L is supplied to wiring GLc (see Figure 41). As a result, transistors M1, M6, and M7 turn ON, the potential at node ND1 becomes potential V0, and the potential at node ND4 becomes potential L. When the potential at node ND4 becomes potential L, transistor M5 turns OFF, and the light emission of the light-emitting element 61 stops.

[0192] During period T36, a video signal Vdata for writing to another semiconductor device 100C electrically connected to wiring DL may be supplied to node ND3 via transistor M1, but since transistor M5 is in the off state, this does not interfere with the extinguishing operation.

[0193] The semiconductor device 100C, like semiconductor devices 100A and 100B, can be suitably used not only for single-structure light-emitting elements but also for tandem-structure light-emitting elements that require a larger driving voltage than single-structure elements. Furthermore, like semiconductor devices 100A and 100B, it can perform black insertion drive. A display device using the semiconductor device 100C according to one aspect of the present invention can achieve high-quality video display with less degradation of video resolution.

[0194] <Example 1> Figure 42 shows a modified semiconductor device 100Ca, which is a modified version of semiconductor device 100C. The semiconductor device 100Ca shown in Figure 42 includes a pixel circuit 51Ca. The pixel circuit 51Ca differs from the pixel circuit 51C shown in Figure 33 in that it includes a transistor M8 between the wiring GLc and node ND4.

[0195] Specifically, the gate of transistor M8 is electrically connected to wiring GLB, one of its sources or drains is electrically connected to wiring GLC, and the other of its sources or drains is electrically connected to node ND4.

[0196] In the circuit configuration example shown in Figure 33, during the Vth correction operation period T32, node ND4 becomes floating, which may cause the potential of node ND4 to fluctuate and potentially bring transistor M5 into a state close to the ON state.

[0197] Figure 43 is a circuit diagram showing the operating state of semiconductor device 100Ca shown in Figure 42 during period T32. By including transistor M8, node ND4 is prevented from becoming floating during period T32 when Vth correction operation is performed, and the potential of node ND4 can be fixed to potential L. By including transistor M8, accurate Vth correction operation can be achieved. Therefore, the display quality of semiconductor device 100Ca can be improved.

[0198] <Modification 2> Figure 44 shows a semiconductor device 100Cb, which is a modified example of the semiconductor device 100C shown in Figure 33. The semiconductor device 100Cb includes a pixel circuit 51Cb. The pixel circuit 51Cb differs from the pixel circuit 51C in that it uses p-channel type transistors for transistors M6 and M7. In addition, the gates of transistors M6 and M7 are electrically connected to the wiring GLd. As shown in the above embodiment, at least some of the transistors constituting the semiconductor device 100C may be p-channel type transistors.

[0199] Furthermore, as shown in the above embodiment, transistors containing various semiconductors can be used as transistors constituting the semiconductor device. For example, single-crystal silicon or polycrystalline silicon may be used as the p-channel type transistor. Low-temperature polysilicon (LTPS) may be used as the polycrystalline silicon.

[0200] When transistors M1 to M5 are formed as n-channel type transistors and transistors M6 and M7 are formed as p-channel type transistors, for example, an n-channel type OS transistor may be stacked on top of a p-channel type Si transistor using single-crystal silicon as the semiconductor layer.

[0201] In Figure 44, the region 51a containing the Si transistor and the region 51b containing the OS transistor of the pixel circuit 51Cb are shown by dashed lines.

[0202] For example, the semiconductor device 100Cb may have a stacked configuration of layers 40, 50, and 60. Figure 45 is a schematic perspective view of the semiconductor device 100Cb when it has a stacked configuration of layers 40, 50, and 60. In Figure 45, an example is shown in which p-channel type Si transistors M6 and M7 are formed on layer 40, and n-channel type OS transistors M1 to M5 are formed on layer 50. Thus, region 51a is formed on layer 40, and region 51b is formed on layer 50 (not shown in Figure 45). That is, region 51a and region 51b can be provided on top of each other. Also in Figure 45, an example is shown in which a light-emitting element 61 is formed on layer 60.

[0203] In Figure 45, some of the transistors constituting the pixel circuit 51Cb are located in layer 40, and other parts are located in layer 50. By stacking the transistors constituting the pixel circuit 51Cb, the occupied area of ​​the semiconductor device 100Cb can be reduced. Therefore, the mounting density of the semiconductor device 100Cb can be increased. In addition, the constraints on the arrangement and size of the transistors constituting the semiconductor device 100Cb are relaxed, increasing the design flexibility of the semiconductor device. Therefore, the reliability of the semiconductor device can be improved.

[0204] Furthermore, by using a combination of a Si transistor, which has a faster operating speed than an OS transistor, and an OS transistor with a lower off-current in the semiconductor device 100Cb, it is possible to improve the operating speed and reduce power consumption.

[0205] For example, in semiconductor device 100Cb, high-speed reset operation can be achieved by using Si transistors. Also, by using OS transistors, the video signal Vdata written to node ND3 can be held for a long time. Therefore, in a display device using semiconductor device 100Cb as pixels, power consumption can be reduced by performing idle stop driving when displaying still images or by reducing the frame frequency. By using OS transistors, the gradation of pixels can be maintained even when the frame frequency is significantly reduced (e.g., 1fps or less).

[0206] Further, when the light-emitting element 61 is a bottom emission type light-emitting element, a layer 60 may be provided below the layers 40 and 50. Further, the layer 40 may be formed on the layer 50.

[0207] <Modified Example 3> FIG. 46 shows a semiconductor device 100Cc which is a modified example of the semiconductor device 100C. The semiconductor device 100Cc includes a pixel circuit 51Cc. In the pixel circuit 51Cc, among the transistors M1 to M7 included in the pixel circuit 51C, an n-channel type OS transistor is used for the transistors M2 and M5, and a p-channel type Si transistor is used for the other transistors.

[0208] <Modified Example 4> FIG. 47 shows a semiconductor device 100Cd which is a modified example of the semiconductor device 100C. The semiconductor device 100Cd includes a pixel circuit 51Cd. Further, in the pixel circuit 51Cd, among the transistors M1 to M7 included in the pixel circuit 51C, a p-channel type Si transistor is used for the transistors M5 and M6, and an n-channel type OS transistor is used for the transistors M1 to M4. Further, the gate of the transistor M6 is electrically connected to a wiring GLd. Further, the transistors M7 and the capacitor C3 are not provided. By making the transistor M5 a p-channel type transistor, the formation of the transistors M7 and the capacitor C3 can be omitted.

[0209] <Modified Example 5> FIG. 48 shows a semiconductor device 100Ce which is a modified example of the semiconductor device 100Cd. As shown in FIG. 48, a p-channel type Si transistor may be used for the transistor M5, and an n-channel type OS transistor may be used for the transistors M1 to M4 and the transistor M6. The gate of the transistor M6 is electrically connected to a wiring GLa.

[0210] The configuration shown in the present embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0211] (Embodiment 4) In this embodiment, a semiconductor device 100D including four transistors, one capacitor, and one light-emitting element will be described. A circuit configuration example of the semiconductor device 100D is shown in FIG. 49A. The semiconductor device 100D includes a pixel circuit 51D and a light-emitting element 61. The pixel circuit 51D includes transistors M1 to M4 and a capacitor C1.

[0212] The gate of the transistor M1 is electrically connected to the wiring GLa, one of the source or drain is electrically connected to the wiring DL, and the other of the source or drain is electrically connected to the gate of the transistor M2. The transistor M1 has a function of selecting whether to make the connection between the gate of the transistor M2 and the wiring DL conductive or non-conductive.

[0213] Also, the gate of the transistor M2 is electrically connected to one terminal of the capacitor C1, one of the source or drain is electrically connected to the wiring 101, and the other of the source or drain is electrically connected to the other terminal of the capacitor C1. Also, the transistor M2 has a back gate. The back gate of the transistor M2 is electrically connected to the other terminal of the capacitor C1.

[0214] The gate of the transistor M3 is electrically connected to the wiring GLc, one of the source or drain is electrically connected to one terminal of the capacitor C1, and the other of the source or drain is electrically connected to the wiring 103. The transistor M3 has a function of selecting whether to make the connection between the gate of the transistor M2 and the wiring 103 conductive or non-conductive.

[0215] Furthermore, the gate of transistor M4 is electrically connected to wiring GLB, and one of the sources or drains of transistor M4 is electrically connected to the other source or drain of transistor M2. In addition, the other source or drain of transistor M4 is electrically connected to wiring 103. Transistor M4 has a function to select whether to conduct or not conduct between wiring 103 and the other source or drain of transistor M2.

[0216] Furthermore, the source or drain of transistor M2 is electrically connected to one terminal of the light-emitting element 61 (for example, the anode terminal). The other terminal of the light-emitting element 61 (for example, the cathode terminal) is electrically connected to the wiring 104.

[0217] Furthermore, the region where one terminal of capacitor C1, the other source or drain of transistor M1, the gate of transistor M2, and one source or drain of transistor M3 are electrically connected is also called node ND1.

[0218] Furthermore, the region where the other terminal of capacitor C1, the other source or drain of transistor M2, and one terminal of light-emitting element 61 are electrically connected is also called node ND2.

[0219] Alternatively, as shown in Figure 49B, a p-channel transistor may be used for transistor M2. In this case, the other terminal of capacitor C1 is electrically connected to wiring 101.

[0220] According to the semiconductor device 100D shown in this embodiment, the number of transistors can be reduced, and therefore the occupied area can be reduced.

[0221] Alternatively, the semiconductor device 100E may include four p-channel transistors, two capacitors, and one light-emitting element, as shown in Figure 50A. The semiconductor device 100E includes a pixel circuit 51E and a light-emitting element 61. The pixel circuit 51E includes transistors M1 to M4, capacitors C1 and C2.

[0222] The gate of transistor M1 is electrically connected to wiring GLa, one of its source or drain is electrically connected to wiring DL, and the other of its source or drain is electrically connected to the gate of transistor M3. Transistor M1 has the function of selecting whether to conduct or not conduct between the gate of transistor M3 and wiring DL.

[0223] Furthermore, the gate of transistor M2 is electrically connected to wiring GLB, one of its source or drain is electrically connected to wiring 101, and the other of its source or drain is electrically connected to one of its source or drains of transistor M3.

[0224] The other source or drain of transistor M3 is electrically connected to one source or drain of transistor M4. The gate of transistor M4 is electrically connected to wiring GLc, and the other source or drain is electrically connected to wiring 103.

[0225] Furthermore, the source or drain of transistor M3 is electrically connected to one terminal of the light-emitting element 61. The other terminal of the light-emitting element 61 is electrically connected to the wiring 104.

[0226] One terminal of capacitor C1 is electrically connected to either the source or drain of transistor M3. The other terminal of capacitor C1 is electrically connected to the gate of transistor M3. One terminal of capacitor C2 is electrically connected to wiring 101. The other terminal of capacitor C2 is electrically connected to one terminal of capacitor C1.

[0227] Furthermore, as shown in Figure 50B, n-channel transistors may be used for transistors M1 and M4.

[0228] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0229] (Embodiment 5) In this embodiment, a semiconductor device 100F according to one aspect of the present invention will be described. The semiconductor device 100F is a modified example of the semiconductor device 100C shown in FIG. 41. In order to reduce the repetition of explanations, mainly, the differences between the semiconductor device 100F and the semiconductor device 100C shown in FIG. 41 will be described.

[0230] <Configuration Example> A circuit configuration example of the semiconductor device 100F is shown in FIG. 51. The semiconductor device 100F includes a pixel circuit 51F, a light-emitting element 61a, and a light-emitting element 61b. The pixel circuit 51F has the same configuration as the pixel circuit 51C shown in FIG. 41, but is different in that the other of the source or drain of the transistor M5 is electrically connected to one terminal (for example, the anode terminal) of the light-emitting element 61a and one terminal (for example, the anode terminal) of the light-emitting element 61b.

[0231] Also, the other terminal (for example, the cathode terminal) of the light-emitting element 61a is electrically connected to the wiring 104a. The other terminal (for example, the cathode terminal) of the light-emitting element 61b is electrically connected to the wiring 104b.

[0232] Among the transistors constituting the pixel circuit 51F, the transistors M1, M3, M4, M6, and M7 function as switches. Therefore, the semiconductor device 100F can be shown as in FIG. 52.

[0233] <Operation Example> The semiconductor device 100F can control the light emission of the light-emitting element 61a and the light-emitting element 61b by controlling the potentials of the wiring 104a and the wiring 104b. For example, when it is desired to cause the light-emitting element 61a to emit light, the potential Vc may be supplied to the wiring 104a and a potential equal to or higher than the potential Va may be supplied to the wiring 104b. Also, when it is desired to cause the light-emitting element 61b to emit light, the potential Vc may be supplied to the wiring 104b and a potential equal to or higher than the potential Va may be supplied to the wiring 104a.

[0234] Furthermore, if you want to make both the light-emitting element 61a and the light-emitting element 61b emit light, you can simply supply the potential Vc to both the wiring 104a and the wiring 104b.

[0235] The semiconductor device 100F can control the light emission of two light-emitting elements 61 (light-emitting elements 61a and 61b) with a single pixel circuit 51F. Therefore, the area occupied by the pixel circuit per pixel is reduced, making it easier to improve the pixel density of the display device. In addition, the reduced area required for a single pixel circuit increases the design flexibility of the semiconductor device and the display device. Thus, it becomes easier to achieve higher functionality and improved reliability in the semiconductor device and the display device.

[0236] The configuration shown in this embodiment can also be applied to semiconductor device 100A and semiconductor device 100B.

[0237] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0238] (Embodiment 6) In this embodiment, a semiconductor device 100G according to one aspect of the present invention will be described. The semiconductor device 100G is a modified example of the semiconductor device 100C shown in Figure 41. Therefore, it is also a modified example of the semiconductor device 100F. In order to reduce repetition in the explanation, the differences between the semiconductor device 100G and the semiconductor device 100C shown in Figure 41 will be described mainly.

[0239] <Example Configuration> Figure 53 shows an example of the circuit configuration of the semiconductor device 100G. The semiconductor device 100G includes a pixel circuit 51G, a light-emitting element 61a, and a light-emitting element 61b. The pixel circuit 51G also includes circuits 52a and 52b.

[0240] Circuit 52a comprises transistor M5a, transistor M7a, and capacitor C3a. The gate of transistor M5a is electrically connected to one terminal of capacitor C3a, and one of its source or drain is electrically connected to the other source or drain of transistor M2. The other source or drain of transistor M5a is also electrically connected to the other terminal of capacitor C3a and to one terminal of light-emitting element 61a (e.g., the anode terminal). The other terminal of light-emitting element 61a (e.g., the cathode terminal) is also electrically connected to wiring 104a. The gate of transistor M7a is electrically connected to wiring GLa, one of its source or drain is electrically connected to wiring GLC, and the other source or drain is electrically connected to the gate of transistor M5a.

[0241] Furthermore, the region where the gate of transistor M5a, one terminal of capacitor C3a, and the other source or drain of transistor M7a are electrically connected is also called node ND4a.

[0242] Circuit 52b comprises transistor M5b, transistor M7b, and capacitor C3b. The gate of transistor M5b is electrically connected to one terminal of capacitor C3b, and one of its sources or drains is electrically connected to the other source or drain of transistor M2. The other source or drain of transistor M5b is also electrically connected to the other terminal of capacitor C3b and to one terminal of light-emitting element 61b (e.g., the anode terminal). The other terminal of light-emitting element 61b (e.g., the cathode terminal) is also electrically connected to wiring 104b. The gate of transistor M7b is electrically connected to wiring GLa, one of its sources or drains is electrically connected to wiring GLC, and the other source or drain is electrically connected to the gate of transistor M5b.

[0243] Furthermore, the region where the gate of transistor M5b, one terminal of capacitor C3b, and the other source or drain of transistor M7b are electrically connected is also called node ND4b.

[0244] In other words, transistors M5a and M5b correspond to transistor M5. Transistors M7a and M7b correspond to transistor M7. Capacitors C3a and C3b correspond to capacitor C3. Nodes ND4a and ND4b correspond to node ND4. Also, light-emitting elements 61a and 61b correspond to light-emitting element 61, and wiring 104a and 104b correspond to wiring 104.

[0245] <Example of operation> The semiconductor device 100G can control the light emission of light-emitting elements 61a and 61b by controlling the potentials of wiring 104a and 104b. For example, to make light-emitting element 61a emit light, a potential Vc should be supplied to wiring 104a and a potential Va or higher should be supplied to wiring 104b. Similarly, to make light-emitting element 61b emit light, a potential Vc should be supplied to wiring 104b and a potential Va or higher should be supplied to wiring 104a.

[0246] Furthermore, if you want to make both the light-emitting element 61a and the light-emitting element 61b emit light, you can simply supply the potential Vc to both the wiring 104a and the wiring 104b.

[0247] The semiconductor device 100G can control the light emission of two light-emitting elements 61 (light-emitting elements 61a and 61b) using a set of transistors M1, M2, M3, M4, M6, capacitors C1 and C2. Therefore, the area occupied by the pixel circuit per pixel is reduced, making it easier to improve the pixel density of the display device. In addition, the reduced area required for a single pixel circuit increases the design flexibility of the semiconductor device and the display device. Therefore, it becomes easier to achieve higher functionality and improved reliability of the semiconductor device and the display device.

[0248] The configuration shown in this embodiment can also be applied to semiconductor device 100A and semiconductor device 100B.

[0249] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0250] (Embodiment 7) This embodiment describes a semiconductor device 100H according to one aspect of the present invention. The semiconductor device 100H is a modified example of the semiconductor device 100G shown in Figure 53. To reduce repetition in the explanation, we will mainly describe the differences between the semiconductor device 100H and the semiconductor device 100G.

[0251] <Example Configuration> Figure 54 shows an example of the circuit configuration of the semiconductor device 100H. The semiconductor device 100H includes a pixel circuit 51H, a light-emitting element 61a, and a light-emitting element 61b. The pixel circuit 51H also includes circuits 52a and 52b.

[0252] In semiconductor device 100H, one of the sources or drains of transistor M7b in circuit 52b is electrically connected to wiring GLd, which is different from semiconductor device 100G. Also, both the cathode of light-emitting element 61a and the cathode of light-emitting element 61b are electrically connected to wiring 104.

[0253] <Example of operation> The semiconductor device 100H can control the light emission of the light-emitting elements 61a and 61b by controlling the potentials of the wiring GLc and GLd. For example, if only the light-emitting element 61a is to be made to emit light, a potential H should be supplied to the wiring GLc and a potential L should be supplied to the wiring GLd during the period T34 shown in the above embodiment. Similarly, if only the light-emitting element 61b is to be made to emit light, a potential L should be supplied to the wiring GLc and a potential H should be supplied to the wiring GLd during the period T34 shown in the above embodiment.

[0254] Furthermore, if you want both the light-emitting element 61a and the light-emitting element 61b to emit light, you can supply a potential H to both the wiring GLc and the wiring GLd during the period T34 shown in the above embodiment.

[0255] Similar to semiconductor device 100G, semiconductor device 100H can also control the light emission of two light-emitting elements 61 (light-emitting elements 61a and 61b) using a set of transistors M1, M2, M3, M4, M6, capacitors C1 and C2. Therefore, the area occupied by the pixel circuit per pixel is reduced, making it easier to improve the pixel density of the display device. Furthermore, the reduced area required for a single pixel circuit increases the design flexibility of the semiconductor device and the display device. Thus, it becomes easier to achieve higher functionality and improved reliability of the semiconductor device and the display device.

[0256] The configuration shown in this embodiment can also be applied to semiconductor device 100A and semiconductor device 100B.

[0257] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0258] (Embodiment 8) This embodiment describes an example of the configuration of a display device 10 using a semiconductor device 100 (semiconductor device 100A, semiconductor device 100B, semiconductor device 100C, semiconductor device 100Ca, semiconductor device 100Cb, semiconductor device 100Cc, semiconductor device 100Cd, semiconductor device 100Ce, semiconductor device 100D, semiconductor device 100E, semiconductor device 100F, semiconductor device 100G, or semiconductor device 100H). Figure 55A is a block diagram illustrating the display device 10. The display device 10 has a display area 235, a first drive circuit unit 231, and a second drive circuit unit 232. The display area 235 has a plurality of pixels 230 arranged in a matrix. A semiconductor device 100 according to one aspect of the present invention can be used for the pixels 230.

[0259] The circuits included in the first drive circuit section 231 function, for example, as a scan line drive circuit. The circuits included in the second drive circuit section 232 function, for example, as a signal line drive circuit. A circuit may also be provided at a position facing the first drive circuit section 231 across the display area 235. A circuit may also be provided at a position facing the second drive circuit section 232 across the display area 235. The circuits included in the first drive circuit section 231 and the second drive circuit section 232 are sometimes collectively referred to as "peripheral drive circuits" or "drive circuits."

[0260] Various types of circuits can be used in the peripheral drive circuit, such as shift registers, level shifters, inverters, latches, analog switches, and logic circuits. Transistors and capacitive elements can also be used in the peripheral drive circuit. The transistors in the peripheral drive circuit may be formed using the same process as the transistors included in the pixel 230.

[0261] For example, OS transistors may be used for the transistors constituting the pixel 230, and Si transistors may be used for the transistors constituting the peripheral drive circuit. OS transistors have a low off-current, thus reducing power consumption. Also, Si transistors have a faster operating speed than OS transistors, making them suitable for use in peripheral drive circuits. Furthermore, depending on the display device, OS transistors may be used for both the transistors constituting the pixel 230 and the transistors constituting the peripheral drive circuit. Furthermore, depending on the display device, Si transistors may be used for both the transistors constituting the pixel 230 and the transistors constituting the peripheral drive circuit. Alternatively, depending on the display device, Si transistors may be used for the transistors constituting the pixel 230, and OS transistors may be used for the transistors constituting the peripheral drive circuit.

[0262] Furthermore, both Si transistors and OS transistors may be used in the transistors constituting the pixel 230. Also, both Si transistors and OS transistors may be used in the transistors constituting the peripheral drive circuit.

[0263] Furthermore, the display device 10 has m (m is an integer of 1 or more) wires 236, each arranged substantially parallel to the other and whose potential is controlled by a circuit included in the first drive circuit section 231, and n (n is an integer of 1 or more) wires 237, each arranged substantially parallel to the other and whose potential is controlled by a circuit included in the second drive circuit section 232.

[0264] Note that Figure 55A shows an example where wiring 236 and wiring 237 are connected to pixel 230. However, wiring 236 and wiring 237 are just examples, and the wiring connected to pixel 230 is not limited to wiring 236 and wiring 237.

[0265] The display area 235 comprises a plurality of pixels 230 arranged in an m x n matrix. For example, a pixel 230 located in the r-th row (where r is an arbitrary number, and in this embodiment, it is an integer between 1 and m) is electrically connected to the first drive circuit unit 231 via the r-th wiring 236. Similarly, a pixel 230 located in the s-th column (where s is an arbitrary number, and in this embodiment, it is an integer between 1 and n) is electrically connected to the second drive circuit unit 232 via the s-th wiring 237.

[0266] By arranging three pixels 230—one controlling red light, one controlling green light, and one controlling blue light—in a stripe pattern, and integrating them as a single pixel 240, full-color display can be achieved by controlling the amount of light emitted (luminescence) of each pixel 230. Thus, each of these three pixels 230 functions as a sub-pixel. That is, each of the three sub-pixels controls the amount of light emitted, such as red light, green light, or blue light (see Figure 55B1). Note that the color of light controlled by each of the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but may also be cyan (C), magenta (M), and yellow (Y) (see Figure 55B2).

[0267] Furthermore, the arrangement of the three pixels 230 that make up one pixel 240 may be a delta arrangement (see Figure 55B3). Specifically, the three pixels 230 that make up one pixel 240 may be arranged so that the lines connecting their respective center points form a triangle.

[0268] Furthermore, the areas of the three subpixels (pixel 230) do not have to be the same. If the luminous efficiency and reliability differ depending on the emission color, the area of ​​the subpixels may be changed for each emission color (see Figure 55B4). The arrangement of subpixels shown in Figure 55B4 may be referred to as an "S-stripe arrangement," etc.

[0269] Alternatively, the four subpixels may be combined and function as a single pixel. For example, a subpixel controlling white light may be added to the three subpixels that control red, green, and blue light respectively (see Figure 55B5). Adding a subpixel that controls white light can increase the brightness of the display area. Alternatively, a subpixel that controls yellow light may be added to the three subpixels that control red, green, and blue light respectively (see Figure 55B6). Alternatively, a subpixel that controls white light may be added to the three subpixels that control cyan, magenta, and yellow light respectively (see Figure 55B7).

[0270] By increasing the number of subpixels that function as a single pixel, and by appropriately combining subpixels that control light such as red, green, blue, cyan, magenta, and yellow, the reproduction of midtones can be improved. Therefore, the display quality can be enhanced.

[0271] Furthermore, as shown in Figure 56, the subpixels (pixels 230) of the S-stripe array may be arranged such that subpixels of the same emission color are adjacent to adjacent pixels 240.

[0272] Furthermore, as shown in Figures 57A1 and 57A2, in pixels 240 arranged in a stripe pattern, adjacent pixels 230 that control the same emission color may be provided between adjacent pixels 240.

[0273] In Figures 57A1 and 57A2, pixels 230a and 230b controlling red light are adjacent in the row direction, pixels 230a and 230b controlling green light are adjacent in the row direction, and pixels 230a and 230b controlling blue light are adjacent in the row direction. The pixels 240 shown in Figures 57A1 and 57A2 can also be described as a configuration in which one pixel 230 is divided into two along the column direction. Note that three or more pixels 230 of the same emission color may be adjacent to each other. That is, one pixel 230 may be divided into three or more parts.

[0274] As shown in Figure 57A1, a single pixel 240 may be formed by a pixel 230a that controls red light, a pixel 230a that controls green light, and a pixel 230a that controls blue light. Alternatively, as shown in Figure 57A2, a single pixel 240 may be formed by a pixel 230a and a pixel 230b that controls red light, a pixel 230a and a pixel 230b that controls green light, and a pixel 230a and a pixel 230b that controls blue light.

[0275] By providing multiple sub-pixels that control the same light emission color within a single pixel 240, the number of gradations that can be reproduced by the display device 10 can be increased. Therefore, the display quality of the display device can be improved.

[0276] Furthermore, as shown in Figure 57B, pixels 230a and 230b that control the same emission color may be provided adjacent to each other in the column direction. The pixel configuration shown in Figure 57B can also be described as a configuration in which the pixel 240 shown in Figure 55B1 is divided into two in the row direction. By dividing the pixel 240, the pixel density of the display area 235 can be increased. Therefore, a higher-resolution image display can be realized.

[0277] Furthermore, similar to Figures 57A1 and 57A2, in the S-stripe array, the sub-pixel 230 may also be divided into multiple parts (see Figure 57C). The pixel 240 shown in Figure 57C can function in the same way as the pixel 240 shown in Figures 57A1 and 57A2.

[0278] Furthermore, a display device according to one aspect of the present invention can reproduce a variety of color gamuts. For example, it can reproduce color gamuts such as the PAL (Phase Alternating Line) and NTSC (National Television System Committee) standards used in television broadcasting, the sRGB (standard RGB) and Adobe RGB standards widely used in display devices for electronic devices such as personal computers, digital cameras, and printers, the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard used in HDTV (High Definition Television), the DCI-P3 (Digital Cinema Initiatives P3) standard used in digital cinema projection, and the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television).

[0279] Furthermore, by arranging 240 pixels in a 1920 x 1080 matrix, a display device 10 capable of full-color display at a resolution known as Full HD (also called "2K resolution," "2K1K," or "2K"). Also, for example, by arranging 240 pixels in a 3840 x 2160 matrix, a display device 10 capable of full-color display at a resolution known as Ultra HD (also called "4K resolution," "4K2K," or "4K"). Furthermore, for example, by arranging 240 pixels in a 7680 x 4320 matrix, a display device 10 capable of full-color display at a resolution known as Super Hi-Vision (also called "8K resolution," "8K4K," or "8K"). By increasing the number of pixels, it is also possible to realize a display device 10 capable of full-color display at a resolution of 16K or 32K.

[0280] Furthermore, the pixel density of the display area 235 is preferably 100 ppi or more and 10,000 ppi or less, and more preferably 1,000 ppi or more and 10,000 ppi or less. For example, it may be 2,000 ppi or more and 6,000 ppi or less, or 3,000 ppi or more and 5,000 ppi or less.

[0281] There are no particular limitations on the aspect ratio of the display area 235. The display area 235 of the display device 10 can support various aspect ratios, such as 1:1 (square), 4:3, 16:9, and 16:10.

[0282] The diagonal size of the display area 235 may be between 0.1 inches and 100 inches, or it may be greater than 100 inches.

[0283] When the display device 10 is used as a display device for virtual reality (VR) or augmented reality (AR), the diagonal size of the display area 235 can be 0.1 inches or more and 5.0 inches or less, preferably 0.5 inches or more and 2.0 inches or less, and more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display area 235 may be 1.5 inches or close to 1.5 inches. By setting the diagonal size of the display area 235 to 2.0 inches or less, preferably close to 1.5 inches, the exposure process performed by the exposure device (typically a scanner device) can be completed in one pass, thereby improving the productivity of the manufacturing process.

[0284] Furthermore, the configuration of the transistors used in the display area 235 may be appropriately selected according to the diagonal size of the display area 235. For example, when a single-crystal Si transistor is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 3 inches or less. When an LTPS transistor is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 30 inches or less, and more preferably 1 inch or more and 30 inches or less. When an LTPO (a configuration combining an LTPS transistor and an OS transistor) is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 50 inches or less, and more preferably 1 inch or more and 50 inches or less. When an OS transistor is used in the display area 235, the diagonal size of the display area 235 is preferably 0.1 inches or more and 200 inches or less, and more preferably 50 inches or more and 100 inches or less.

[0285] Single-crystal Si transistors are extremely difficult to enlarge due to the size limitations of the single-crystal Si substrate. Similarly, LTPS transistors require laser crystallization during the manufacturing process, making them difficult to scale (typically screen sizes exceeding 30 inches diagonally). On the other hand, OS transistors are not subject to the constraints of laser crystallization during the manufacturing process, or can be manufactured at relatively low process temperatures (typically below 450°C), allowing them to accommodate relatively large display panels (typically between 50 and 100 inches diagonally). Furthermore, LTPO transistors can be applied to display panel sizes in the range between those using LTPS and OS transistors (typically between 1 and 50 inches diagonally).

[0286] <Example of light-emitting element configuration> A light-emitting element (also called a light-emitting device) that can be used in a semiconductor device according to one aspect of the present invention will be described.

[0287] As shown in Figure 58A, the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (conductive layer 171, conductive layer 173). The EL layer 172 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430. Layer 4420 may include, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer). Light-emitting layer 4411 may include, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

[0288] A configuration comprising a layer 4420, an emissive layer 4411, and a layer 4430 provided between a pair of electrodes can function as a single emissive unit, and in this specification, the configuration shown in Figure 58A is referred to as a single structure.

[0289] Furthermore, Figure 58B shows a modified example of the EL layer 172 of the light-emitting element 61 shown in Figure 58A. Specifically, the light-emitting element 61 shown in Figure 58B comprises a layer 4430-1 on the conductive layer 171, a layer 4430-2 on layer 4430-1, a light-emitting layer 4411 on layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on layer 4420-1, and a conductive layer 173 on layer 4420-2. For example, when the conductive layer 171 is the anode and the conductive layer 173 is the cathode, layer 4430-1 functions as a hole injection layer, layer 4430-2 functions as a hole transport layer, layer 4420-1 functions as an electron transport layer, and layer 4420-2 functions as an electron injection layer. Alternatively, if conductive layer 171 is used as the cathode and conductive layer 173 as the anode, layer 4430-1 functions as an electron injection layer, layer 4430-2 functions as an electron transport layer, layer 4420-1 functions as a hole transport layer, and layer 4420-2 functions as a hole injection layer. With such a layer structure, it is possible to efficiently inject carriers into the light-emitting layer 4411 and improve the efficiency of carrier recombination within the light-emitting layer 4411.

[0290] As shown in Figure 58C, a configuration in which multiple light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, light-emitting layer 4413) are provided between layer 4420 and layer 4430 is also an example of a single structure.

[0291] Furthermore, as shown in Figure 58D, a configuration in which multiple light-emitting units (EL layer 172a, EL layer 172b) are connected in series via an intermediate layer (charge generation layer) 4440 is referred to as a tandem structure or stack structure in this specification. It should be noted that a tandem structure enables the realization of a light-emitting element capable of high-brightness emission.

[0292] Furthermore, if the light-emitting element 61 is in the tandem structure shown in Figure 58D, the light-emitting colors of the EL layer 172a and EL layer 172b may be the same. For example, the light-emitting colors of both the EL layer 172a and EL layer 172b may be green. Note that if the display area 235 includes three sub-pixels R, G, and B, and each sub-pixel is equipped with a light-emitting element, the light-emitting elements of each sub-pixel may be in a tandem structure. Specifically, the EL layer 172a and EL layer 172b of the R sub-pixel each have a material capable of emitting red light, the EL layer 172a and EL layer 172b of the G sub-pixel each have a material capable of emitting green light, and the EL layer 172a and EL layer 172b of the B sub-pixel each have a material capable of emitting blue light. In other words, the materials of the light-emitting layer 4411 and the light-emitting layer 4412 may be the same. By making the light-emitting color of EL layer 172a and EL layer 172b the same, the current density per unit of luminous intensity can be reduced. Therefore, the reliability of the light-emitting element 61 can be improved.

[0293] The light-emitting color of the light-emitting element can be red, green, blue, cyan, magenta, yellow, or white, depending on the material that makes up the EL layer 172. Furthermore, the color purity can be further enhanced by adding a microcavity structure to the light-emitting element.

[0294] The light-emitting layer may contain two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). For light-emitting devices that emit white light, it is preferable to have a configuration in which the light-emitting layer contains two or more types of light-emitting materials. To obtain white light emission using two types of light-emitting materials, one should select materials whose emission colors are complementary. Alternatively, for example, by making the emission colors of the first light-emitting layer and the second light-emitting layer complementary, a light-emitting device that emits white light as a whole can be obtained. The same applies to light-emitting devices having three or more light-emitting layers.

[0295] The light-emitting layer preferably contains two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). Alternatively, it is preferable to have two or more light-emitting materials, and for each light-emitting material to emit light that contains spectral components of two or more colors from R, G, and B.

[0296] Examples of luminescent materials include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and thermally activated delayed fluorescence (TADF) materials. For TADF materials, materials in thermal equilibrium between the singlet and triplet excited states may also be used. Such TADF materials have a shorter emission lifetime (excitation lifetime), which helps suppress efficiency degradation in the high-brightness region of the light-emitting element.

[0297] <Method for forming light-emitting elements> The following describes an example of a method for forming the light-emitting element 61.

[0298] Figure 59A shows a schematic top view of the light-emitting element 61. In Figure 59A and other figures, the light-emitting element 61 that emits red light is referred to as light-emitting element 61R, the light-emitting element 61 that emits green light is referred to as light-emitting element 61G, and the light-emitting element 61 that emits blue light is referred to as light-emitting element 61B. In Figure 59A, the symbols R, G, and B are added within the light-emitting area of ​​each light-emitting element for ease of distinction. The configuration of the light-emitting element 61 shown in Figure 59A may also be called an SBS (Side By Side) structure. Furthermore, Figure 59A illustrates a configuration having three light-emitting colors: red (R), green (G), and blue (B), but is not limited to this. For example, a configuration having four or more colors is also possible.

[0299] The light-emitting elements 61R, 61G, and 61B are each arranged in a matrix. Figure 59A shows a so-called stripe arrangement in which light-emitting elements of the same color are arranged in one direction, but the arrangement method of the light-emitting elements is not limited to this. As an arrangement method for the light-emitting elements, a delta arrangement, zigzag arrangement, S-stripe arrangement, or pentile arrangement can be used.

[0300] It is preferable to use organic EL devices such as OLED (Organic Light Emitting Diode) or QOLED (Quantum-dot Organic Light Emitting Diode) as the light-emitting elements 61R, 61G, and 61B. Examples of light-emitting materials for the light-emitting elements include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and thermally activated delayed fluorescence (TADF) materials.

[0301] Figure 59B is a schematic cross-sectional view corresponding to the dashed line A1-A2 in Figure 59A. Figure 59B shows cross-sections of the light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B. The light-emitting elements 61R, 61G, and 61B are each provided on an insulating layer 363 and have a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode. The insulating layer 363 can be an inorganic insulating film or an organic insulating film, or both. It is preferable to use an inorganic insulating film as the insulating layer 363. Examples of inorganic insulating films include oxide insulating films and nitride insulating films such as silicon oxide film, silicon oxide nitride film, silicon nitride film, silicon nitride film, aluminum oxide film, aluminum oxide nitride film, and hafnium oxide film.

[0302] The light-emitting element 61R has an EL layer 172R between a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode. The EL layer 172R has a luminescent organic compound that emits light with intensity in at least the red wavelength range. The EL layer 172G of the light-emitting element 61G has a luminescent organic compound that emits light with intensity in at least the green wavelength range. The EL layer 172B of the light-emitting element 61B has a luminescent organic compound that emits light with intensity in at least the blue wavelength range.

[0303] Each of the EL layers 172R, 172G, and 172B may have, in addition to a layer containing a light-emitting organic compound (light-emitting layer), one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0304] A conductive layer 171, which functions as a pixel electrode, is provided for each light-emitting element. A conductive layer 173, which functions as a common electrode, is provided as a continuous layer common to all light-emitting elements. A conductive film that is transparent to visible light is used for either the conductive layer 171 that functions as a pixel electrode or the conductive layer 173 that functions as a common electrode, and a conductive film that is reflective is used for the other. By making the conductive layer 171 that functions as a pixel electrode transparent and the conductive layer 173 that functions as a common electrode reflective, a bottom-emission type display device can be made. Conversely, by making the conductive layer 171 that functions as a pixel electrode reflective and the conductive layer 173 that functions as a common electrode transparent, a top-emission type display device can be made. Furthermore, by making both the conductive layer 171 that functions as a pixel electrode and the conductive layer 173 that functions as a common electrode transparent, a dual-emission type display device can also be made.

[0305] For example, if the light-emitting element 61R is of the top-emission type, the light 175R emitted from the light-emitting element 61R is emitted towards the conductive layer 173. If the light-emitting element 61G is of the top-emission type, the light 175G emitted from the light-emitting element 61G is emitted towards the conductive layer 173. If the light-emitting element 61B is of the top-emission type, the light 175B emitted from the light-emitting element 61B is emitted towards the conductive layer 173.

[0306] An insulating layer 272 is provided to cover the edges of the conductive layer 171, which functions as a pixel electrode. The edges of the insulating layer 272 are preferably tapered. The insulating layer 272 can be made of the same material as that used for the insulating layer 363.

[0307] The insulating layer 272 is provided to prevent adjacent light-emitting elements 61 from unintentionally short-circuiting and emitting false light. It also has the function of preventing the metal mask from coming into contact with the conductive layer 171 when a metal mask is used to form the EL layer 172.

[0308] Each of the EL layers 172R, 172G, and 172B has a region in contact with the upper surface of the conductive layer 171, which functions as a pixel electrode, and a region in contact with the surface of the insulating layer 272. The edges of the EL layers 172R, 172G, and 172B are located on the insulating layer 272.

[0309] As shown in Figure 59B, a gap is provided between the EL layers of the light-emitting element, which exhibit two different colors. It is preferable that the EL layers 172R, 172G, and 172B are arranged so that they do not touch each other. This effectively prevents current from flowing through two adjacent EL layers, which can cause unintended light emission (also known as crosstalk). Therefore, contrast can be enhanced, and a display device with high display quality can be realized.

[0310] EL layer 172R, EL layer 172G, and EL layer 172B can be fabricated separately using methods such as vacuum deposition with a shadow mask like a metal mask. Alternatively, they can be fabricated separately using photolithography. By using photolithography, it is possible to realize a display device with high resolution that is difficult to achieve when using a metal mask.

[0311] In this specification, devices fabricated using a metal mask or FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Furthermore, in this specification, devices fabricated without using a metal mask or FMM may be referred to as MML (Metal Maskless) structured devices. Because MML structured display devices are fabricated without a metal mask, they offer greater design flexibility in terms of pixel arrangement and pixel shape compared to MM structured display devices.

[0312] Furthermore, a protective layer 271 is provided on the conductive layer 173, which functions as a common electrode, covering the light-emitting elements 61R, 61G, and 61B. The protective layer 271 has the function of preventing impurities such as water from diffusing to each light-emitting element from above.

[0313] The protective layer 271 can be, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide film, silicon oxide nitride film, silicon nitride film, silicon nitride film, aluminum oxide film, aluminum oxide nitride film, and hafnium oxide film. Alternatively, semiconductor materials such as indium gallium oxide and indium gallium zinc oxide (IGZO) may be used as the protective layer 271. The protective layer 271 may be formed using ALD, CVD, and sputtering methods. Although the example shows a configuration including an inorganic insulating film as the protective layer 271, it is not limited to this. For example, the protective layer 271 may be a multilayer structure of an inorganic insulating film and an organic insulating film.

[0314] In this specification, "nitride oxide" refers to a compound with a higher nitrogen content than oxygen content. Similarly, "oxiditride" refers to a compound with a higher oxygen content than nitrogen content. The content of each element can be measured, for example, using Rutherford backscattering spectrometry (RBS).

[0315] When indium gallium zinc oxide is used as the protective layer 271, it can be processed using either a wet etching method or a dry etching method. For example, when IGZO is used as the protective layer 271, chemicals such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed aluminum etchant)) can be used. The mixed aluminum etchant can be formulated in a volume ratio of approximately phosphoric acid:acetic acid:nitric acid:water = 53.3:6.7:3.3:36.7.

[0316] Figure 59C shows a different example from the one described above. Specifically, Figure 59C has a light-emitting element 61W that emits white light. The light-emitting element 61W has an EL layer 172W that emits white light between a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode.

[0317] The EL layer 172W can, for example, be configured by stacking two light-emitting layers selected so that their respective light-emitting colors are complementary. Alternatively, a stacked EL layer with a charge-generating layer sandwiched between the light-emitting layers may be used. Furthermore, the EL layer 172W may have three or more light-emitting layers.

[0318] Figure 59C shows three light-emitting elements 61W arranged side by side. A colored layer 264R is provided on the top of the left light-emitting element 61W. The colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided on the top of the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided on the top of the right light-emitting element 61W. As a result, the display device can display a color image.

[0319] Here, the EL layer 172W and the conductive layer 173, which functions as a common electrode, are separated between two adjacent light-emitting elements 61W. This prevents current from flowing through the EL layer 172W between two adjacent light-emitting elements 61W, thus preventing unintended light emission. In particular, when a stacked EL layer with a charge generation layer between two light-emitting layers is used as the EL layer 172W, the effect of crosstalk becomes more pronounced as the resolution increases, i.e., the distance between adjacent pixels decreases, resulting in a decrease in contrast. Therefore, this configuration makes it possible to realize a display device that combines high resolution and high contrast.

[0320] The separation of the EL layer 172W and the conductive layer 173, which functions as a common electrode, is preferably performed by photolithography. This allows for a reduction in the spacing between light-emitting elements, thereby enabling a display device with a higher aperture ratio compared to cases where a shadow mask such as a metal mask is used.

[0321] In the case of a bottom-emission type light-emitting element, a colored layer can be provided between the conductive layer 171, which functions as a pixel electrode, and the insulating layer 363.

[0322] Figure 59D shows a different example from the above. Specifically, Figure 59D shows a configuration in which the insulating layer 272 is not provided between the light-emitting element 61R, light-emitting element 61G, and light-emitting element 61B. This configuration makes it possible to create a display device with a high aperture ratio. In addition, by not providing the insulating layer 272, the unevenness of the light-emitting element 61 is reduced, so the viewing angle of the display device is improved. Specifically, the viewing angle can be made 150° or more and less than 180°, preferably 160° or more and less than 180°, and more preferably 160° or more and less than 180°.

[0323] Furthermore, the protective layer 271 covers the sides of the EL layers 172R, 172G, and 172B. This configuration suppresses impurities (typically water, etc.) that could enter from the sides of the EL layers 172R, 172G, and 172B. In addition, the leakage current between adjacent light-emitting elements 61 is reduced, resulting in improved saturation and contrast ratio, and reduced power consumption.

[0324] Furthermore, in the configuration shown in Figure 59D, the top surface shapes of the conductive layer 171, the EL layer 172R, and the conductive layer 173 are roughly identical. Such a structure can be formed all at once using a resist mask or the like after the conductive layer 171, the EL layer 172R, and the conductive layer 173 have been formed. This process can also be called self-aligned patterning, as it involves processing the EL layer 172R and the conductive layer 173 using the conductive layer 173 as a mask. Although the EL layer 172R has been described here, the same configuration can be used for the EL layer 172G and the EL layer 172B.

[0325] Furthermore, in Figure 59D, a protective layer 273 is provided on top of the protective layer 271. For example, by forming the protective layer 271 using an apparatus capable of forming a highly covering film (typically an ALD apparatus, etc.) and forming the protective layer 273 using an apparatus capable of forming a film with lower covering properties than the protective layer 271 (typically a sputtering apparatus, etc.), a region 275 can be provided between the protective layer 271 and the protective layer 273. In other words, the region 275 is located between the EL layer 172R and the EL layer 172G, and between the EL layer 172G and the EL layer 172B.

[0326] Region 275 contains one or more elements selected from, for example, air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically helium, neon, argon, xenon, krypton, etc.). Region 275 may also contain gases used during the deposition of the protective layer 273. For example, when the protective layer 273 is deposited by sputtering, region 275 may contain one or more of the above-mentioned Group 18 elements. If region 275 contains gases, the gases can be identified by gas chromatography or other methods. Alternatively, when the protective layer 273 is deposited by sputtering, the protective layer 273 may also contain gases used during sputtering. In this case, elements such as argon may be detected when the protective layer 273 is analyzed by energy-dispersive X-ray spectroscopy (EDX analysis).

[0327] Furthermore, if the refractive index of region 275 is lower than that of the protective layer 271, light emitted from EL layer 172R, EL layer 172G, or EL layer 172B will be reflected at the interface between the protective layer 271 and region 275. This can suppress the incidence of light emitted from EL layer 172R, EL layer 172G, or EL layer 172B onto adjacent pixels. This suppresses the mixing of different emission colors from neighboring pixels, thereby improving the display quality of the display device.

[0328] In the configuration shown in Figure 59D, the region between the light-emitting element 61R and the light-emitting element 61G, or the region between the light-emitting element 61G and the light-emitting element 61B (hereinafter simply referred to as the distance between light-emitting elements) can be narrowed. Specifically, the distance between light-emitting elements can be 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the distance between the side surface of the EL layer 172R and the side surface of the EL layer 172G, or the distance between the side surface of the EL layer 172G and the side surface of the EL layer 172B, has a region of 1 μm or less, preferably a region of 0.5 μm (500 nm) or less, and more preferably a region of 100 nm or less.

[0329] Furthermore, for example, if region 275 contains a gas, it is possible to isolate the light-emitting elements while suppressing color mixing or crosstalk of light from each light-emitting element.

[0330] Furthermore, region 275 may be filled with a filler. Examples of fillers include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Alternatively, a photoresist may be used as a filler. The photoresist used as a filler may be a positive-type photoresist or a negative-type photoresist.

[0331] Furthermore, when comparing the aforementioned white light-emitting devices (single or tandem structure) with SBS structure light-emitting devices, SBS structure light-emitting devices can consume less power than white light-emitting devices. If you want to keep power consumption low, it is preferable to use SBS structure light-emitting devices. On the other hand, white light-emitting devices are preferable because their manufacturing process is simpler than that of SBS structure light-emitting devices, which can lead to lower manufacturing costs or higher manufacturing yields.

[0332] Figure 60A shows a different example from the one described above. Specifically, the configuration shown in Figure 60A differs from the configuration shown in Figure 59D in the configuration of the insulating layer 363. When the light-emitting elements 61R, 61G, and 61B are processed, a portion of the upper surface of the insulating layer 363 is scraped away, creating a recess. A protective layer 271 is formed in this recess. In other words, in a cross-sectional view, the lower surface of the protective layer 271 is located lower than the lower surface of the conductive layer 171. Having this region effectively suppresses impurities (typically water, etc.) that could enter the light-emitting elements 61R, 61G, and 61B from below. The recess can be formed when impurities (also called residues) that may adhere to the sides of each light-emitting element during processing are removed by wet etching or the like. After removing the above-mentioned residues, covering the sides of each light-emitting element with the protective layer 271 makes it possible to create a highly reliable display device.

[0333] Figure 60B also shows a different example from the above. Specifically, the configuration shown in Figure 60B includes an insulating layer 276 and a microlens array 277 in addition to the configuration shown in Figure 60A. The insulating layer 276 functions as an adhesive layer. When the refractive index of the insulating layer 276 is lower than that of the microlens array 277, the microlens array 277 can concentrate the light emitted from the light-emitting elements 61R, 61G, and 61B. This can improve the light extraction efficiency of the display device. This is particularly preferable when the user views the display surface of the display device from the front, as it allows for the viewing of a bright image. Various types of curing adhesives can be used as the insulating layer 276, such as UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets may also be used.

[0334] Figure 60C shows a different example from the one described above. Specifically, the configuration shown in Figure 60C has three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the configuration shown in Figure 60A. In addition, there is an insulating layer 276 above the three light-emitting elements 61W, and above the insulating layer 276 there are colored layers 264R, 264G, and 264B. Specifically, a colored layer 264R that transmits red light is provided in a position overlapping with the left light-emitting element 61W, a colored layer 264G that transmits green light is provided in a position overlapping with the central light-emitting element 61W, and a colored layer 264B that transmits blue light is provided in a position overlapping with the right light-emitting element 61W. As a result, the display device can display a color image. The configuration shown in Figure 60C is also a modified version of the configuration shown in Figure 59C.

[0335] Figure 60D shows a different example from the one described above. Specifically, in the configuration shown in Figure 60D, the protective layer 271 is provided adjacent to the sides of the conductive layer 171 and the EL layer 172. The conductive layer 173 is provided as a continuous layer common to each light-emitting element. In addition, in the configuration shown in Figure 60D, it is preferable that region 275 is filled with a filler material.

[0336] The color purity of the emitted light can be improved by adding a microcavity structure to the light-emitting element 61. To add a microcavity structure to the light-emitting element 61, the product of the distance d between the conductive layer 171 and the conductive layer 173 and the refractive index n of the EL layer 172 (optical distance) should be configured such that it is m times half the wavelength λ (where m is an integer greater than or equal to 1). The distance d can be calculated using Equation 1.

[0337] d = m × λ / (2 × n) ... Equation 1.

[0338] According to Equation 1, the distance d of the light-emitting element 61 in the microcavity structure is determined according to the wavelength (emission color) of the emitted light. The distance d corresponds to the thickness of the EL layer 172. Therefore, the EL layer 172G may be made thicker than the EL layer 172B, and the EL layer 172R may be made thicker than the EL layer 172G.

[0339] More precisely, distance d is the distance from the reflective region of the conductive layer 171, which functions as a reflective electrode, to the reflective region of the conductive layer 173, which functions as a semi-transparent / semi-reflective electrode. For example, if the conductive layer 171 is a laminate of silver and a transparent conductive film called ITO (Indium Tin Oxide), and the ITO is on the EL layer 172 side, the distance d corresponding to the emission color can be set by adjusting the thickness of the ITO. That is, even if the thicknesses of EL layers 172R, 172G, and 172B are the same, a distance d suitable for the emission color can be obtained by changing the thickness of the ITO.

[0340] However, it can be difficult to precisely determine the location of the reflective regions in conductive layers 171 and 173. In this case, it is assumed that the effect of the microcavity can be sufficiently obtained by assuming that any location in conductive layers 171 and 173 is a reflective region.

[0341] The light-emitting element 61 is composed of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, and the like. Detailed configuration examples of the light-emitting element 61 will be described in other embodiments. In order to improve the light extraction efficiency in the microcavity structure, it is preferable to make the optical distance from the conductive layer 171, which functions as a reflective electrode, to the light-emitting layer an odd multiple of λ / 4. To achieve this optical distance, it is preferable to appropriately adjust the thickness of each layer constituting the light-emitting element 61.

[0342] Furthermore, when light is emitted from the conductive layer 173 side, it is preferable that the reflectance of the conductive layer 173 is greater than its transmittance. Preferably, the light transmittance of the conductive layer 173 should be 2% to 50%, more preferably 2% to 30%, and even more preferably 2% to 10%. By reducing the transmittance (increasing the reflectance) of the conductive layer 173, the effect of the microcavity can be enhanced.

[0343] Figure 61A shows a different example from the one described above. Specifically, in the configuration shown in Figure 61A, the EL layer 172 extends beyond the edge of the conductive layer 171 in each of the light-emitting elements 61R, 61G, and 61B. For example, in light-emitting element 61R, the EL layer 172R extends beyond the edge of the conductive layer 171. Also, in light-emitting element 61G, the EL layer 172G extends beyond the edge of the conductive layer 171. In light-emitting element 61B, the EL layer 172B extends beyond the edge of the conductive layer 171.

[0344] Furthermore, in each of the light-emitting elements 61R, 61G, and 61B, the EL layer 172 and the protective layer 271 have overlapping regions via the insulating layer 270. In addition, an insulating layer 278 is provided on top of the protective layer 271 in the region between adjacent light-emitting elements 61.

[0345] Examples of insulating layer 278 include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Alternatively, a photoresist may be used as the insulating layer 278. The photoresist used as the insulating layer 278 may be a positive-type photoresist or a negative-type photoresist.

[0346] Furthermore, a common layer 174 is provided on the light-emitting element 61R, light-emitting element 61G, light-emitting element 61B, and insulating layer 278, and a conductive layer 173 is provided on the common layer 174. The common layer 174 has a region in contact with EL layer 172R, a region in contact with EL layer 172G, and a region in contact with EL layer 172B. The common layer 174 is shared by light-emitting elements 61R, 61G, and 61B.

[0347] The common layer 174 can be one or more of the following: a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer, and an electron injection layer. For example, the common layer 174 may be a carrier injection layer (a hole injection layer or an electron injection layer). The common layer 174 can also be considered a part of the EL layer 172. The common layer 174 may be provided only as needed. If the common layer 174 is provided, it is not necessary to provide any layers in the EL layer 172 that have the same function as the common layer 174.

[0348] Furthermore, a protective layer 273 is provided on the conductive layer 173, and an insulating layer 276 is provided on the protective layer 273.

[0349] Figure 61B also shows a different example from the above. Specifically, the configuration shown in Figure 61B has three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the configuration shown in Figure 61A. In addition, there is an insulating layer 276 above the three light-emitting elements 61W, and above the insulating layer 276 there are colored layers 264R, 264G, and 264B. Specifically, a colored layer 264R that transmits red light is provided in a position overlapping with the left light-emitting element 61W, a colored layer 264G that transmits green light is provided in a position overlapping with the central light-emitting element 61W, and a colored layer 264B that transmits blue light is provided in a position overlapping with the right light-emitting element 61W. As a result, the display device can display a color image. The configuration shown in Figure 61B is also a modified version of the configuration shown in Figure 60C.

[0350] Figure 62A shows a schematic top view of the light-emitting element 61. Similar to Figure 57A1, Figure 62A shows an example in which multiple light-emitting elements 61 of the same emission color are arranged adjacent to each other. In Figure 62A, two light-emitting elements 61R are adjacent, two light-emitting elements 61G are adjacent, and two light-emitting elements 61B are adjacent. Note that three or more light-emitting elements 61 of the same emission color may be adjacent. Also, Figure 62A illustrates a configuration having three emission colors: red (R), green (G), and blue (B), but is not limited to this. For example, a configuration with four or more emission colors may be used.

[0351] Although Figure 62A shows the arrangement of the light-emitting elements 61 in a stripe pattern, the arrangement method of the light-emitting elements 61 is not limited to this. A delta pattern, zigzag pattern, S-stripe pattern, or pentile pattern can be used as the arrangement method for the light-emitting elements 61.

[0352] Figures 62B and 62C are schematic cross-sectional views corresponding to the dashed line A3-A4 in Figure 62A. Figure 62B corresponds to a modified example of the configuration shown in Figure 60C. Figure 62C corresponds to a modified example of the configuration shown in Figure 60D.

[0353] By using multiple light-emitting elements 61 of the same light-emitting color grouped together as a single sub-pixel, the number of reproducible gradations can be increased. Therefore, the display quality of the display device can be improved.

[0354] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0355] (Embodiment 9) This embodiment describes an example of a stacked configuration of the display device 10.

[0356] Figures 63A and 63B show perspective views of the display device 10. The display device 10 shown in Figure 63A includes a layer 60 superimposed on a layer 50. Layer 50 includes a plurality of pixel circuits 51 arranged in a matrix, a first drive circuit section 231, a second drive circuit section 232, and an input / output terminal section 29. Layer 60 includes a plurality of light-emitting elements 61 arranged in a matrix.

[0357] In the display device 10 shown in Figures 63A and 63B, one pixel circuit 51 and one light-emitting element 61 are electrically connected to function as one pixel 230. Therefore, the region where the multiple pixel circuits 51 of layer 50 and the multiple light-emitting elements 61 of layer 60 overlap functions as a display area 235. As the pixel 230 in the display device 10 shown in Figures 63A and 63B, for example, the semiconductor device 100A, semiconductor device 100B, or semiconductor device 100C shown in the above embodiment can be used.

[0358] Power and signals necessary for the operation of the display device 10 are supplied to the display device 10 via the input / output terminal section 29. In the display device 10 shown in Figure 63A, the transistors in the peripheral drive circuit and the transistors included in the pixels 230 can be formed in the same process.

[0359] Furthermore, as shown in Figure 63B, the display device 10 may be configured by stacking layers 40, 50, and 60. In Figure 63B, a plurality of pixel circuits 51 arranged in a matrix are provided on layer 50, and the first drive circuit unit 231 and the second drive circuit unit 232 are provided on layer 40. By providing the first drive circuit unit 231 and the second drive circuit unit 232 on different layers from the pixel circuits 51, the width of the frame around the display area 235 can be narrowed, thereby increasing the occupied area of ​​the display area 235.

[0360] By increasing the occupied area of ​​the display area 235, the resolution of the display area 235 can be increased. If the resolution of the display area 235 remains constant, the occupied area per pixel can be increased. Therefore, the luminescence brightness of the display area 235 can be increased. In addition, the ratio of the luminescent area to the occupied area of ​​one pixel (also called the "aperture ratio") can be increased. For example, the aperture ratio of a pixel can be set to 40% or more and less than 100%, preferably 50% or more and 95%, and more preferably 60% or more and 95%. Furthermore, by increasing the occupied area per pixel, the current density supplied to the light-emitting element 61 can be reduced. Therefore, the load on the light-emitting element 61 is reduced, and the reliability of the semiconductor device 100 can be increased. Therefore, the reliability of the display device 10 including the semiconductor device 100 can be increased.

[0361] Furthermore, by stacking the display area 235 and peripheral drive circuits, the wiring connecting them electrically can be shortened. As a result, wiring resistance and parasitic capacitance are reduced, and the operating speed of the semiconductor device 100 can be increased. In addition, the power consumption of the semiconductor device 100 is reduced.

[0362] Furthermore, layer 40 may include not only peripheral drive circuits, but also a CPU 23 (Central Processing Unit), a GPU 24 (Graphics Processing Unit), and a memory circuit section 25. In this embodiment, the CPU 23, GPU 24, and memory circuit section 25 are collectively referred to as "functional circuits."

[0363] For example, the CPU 23 has the function of controlling the operation of the GPU 24 and the circuits provided in layer 40 according to a program stored in the memory circuit unit 25. The GPU 24 has the function of performing calculation processing to form image data. In addition, since the GPU 24 can perform many matrix operations (multiply-accumulate operations) in parallel, it can perform calculation processing using neural networks, for example, at high speed. The GPU 24 has the function of correcting image data using correction data stored in the memory circuit unit 25, for example. For example, the GPU 24 has the function of generating image data with corrected brightness, hue, and / or contrast.

[0364] Image data may be upconverted or downconverted using the GPU24. Alternatively, a super-resolution circuit may be provided in layer 40. The super-resolution circuit has the function of determining the potential of any pixel in the display area 235 by summing up the potentials and weights of the surrounding pixels. The super-resolution circuit has the function of upconverting image data with a resolution lower than that of the display area 235. Furthermore, the super-resolution circuit has the function of downconverting image data with a resolution higher than that of the display area 235.

[0365] By incorporating a super-resolution circuit, the load on the GPU24 can be reduced. For example, the GPU24 can process up to 2K resolution (or 4K resolution), and then the super-resolution circuit can upconvert it to 4K resolution (or 8K resolution), thereby reducing the load on the GPU24. Downconversion can be done in the same way.

[0366] The functional circuits of layer 40 do not necessarily have to include all of these configurations, and may include other configurations. For example, they may include a potential generation circuit that generates multiple different potentials, and / or a power management circuit that controls the supply and stop of power for each circuit of the display device 10.

[0367] Power supply and deactivation may be performed for each circuit that makes up the CPU 23. For example, power consumption can be reduced by deactivating the power supply to a circuit that is determined not to be used for a while and reactivating the power supply when needed. The data required when reactivating the power supply can be stored in the memory circuit within the CPU 23 or in the memory circuit unit 25 before the circuit is deactivated. By storing the data required when the circuit is restored, a high-speed restoration of a deactivated circuit can be achieved. Alternatively, circuit operation may be stopped by deactivating the supply of a clock signal.

[0368] Furthermore, the system may include functional circuits such as a DSP circuit, a sensor circuit, a communication circuit, and / or an FPGA (Field Programmable Gate Array).

[0369] When the peripheral drive circuit and the display area 235 are installed on top of each other, a conductive layer 701 may be provided between the peripheral drive circuit and the display area 235. Also, when the peripheral drive circuit and functional circuit and the display area 235 are installed on top of each other, a conductive layer 701 may be provided between the peripheral drive circuit and functional circuit and the display area 235.

[0370] Figure 64A shows a perspective view of a display device 10 having a conductive layer 701 between the peripheral drive circuit and functional circuit and the display area 235. Figure 64B is a plan view of the display device 10 shown in Figure 64A, viewed from the display area 235 side. Note that in Figure 64B, part of the display area 235 is omitted to make it easier to understand the relationship between the display area 235 and the conductive layer 701.

[0371] Each of the peripheral drive circuits and functional circuits may emit electromagnetic noise during operation. If this electromagnetic noise reaches the display area 235, the display quality of the display device 10 may deteriorate. Specifically, the electromagnetic noise may affect the floating nodes (nodes ND1 to ND4) of the pixel circuit 51 in the display area 235, hindering accurate potential maintenance. As a result, the stable operation of the pixel circuit 51 is impaired, and the display quality of the display device 10 deteriorates.

[0372] By providing a conductive layer 701 between the peripheral drive circuit and functional circuit and the display area 235, electromagnetic noise generated during the operation of the peripheral drive circuit and functional circuit can be blocked, preventing a decrease in display quality. Furthermore, blocking electromagnetic noise stabilizes the operation of the pixel circuit 51, enabling more precise potential control. Thus, the display quality of the display device 10 can be improved.

[0373] Furthermore, when viewed from the conductive layer 701 side, it is preferable that the conductive layer 701 covers the entire display area 235. Therefore, it is preferable that the conductive layer 701 and the display area 235 have overlapping regions. Also, the display area 235 has a plurality of pixel circuits 51. Therefore, it is preferable that the conductive layer 701 and the plurality of pixel circuits 51 have overlapping regions.

[0374] The conductive layer 701 is not limited to a planar shape; it may also be a mesh or stripe shape. If the internal stress of the conductive layer 701 is large, providing the conductive layer 701 in a wide planar shape may cause distortion in the layers constituting the display device 10, potentially reducing the reliability of the display device 10. By making the conductive layer 701 a mesh or stripe shape, electromagnetic noise can be blocked and stress on the conductive layer 701 can be relieved.

[0375] Figure 65 is a perspective view of a display device 10 having conductive layers 702 (conductive layers 702a, 702b, 702c, 702d, and 702e) between the peripheral drive circuit and functional circuit and the display area 235. Figure 65 shows an example in which conductive layer 702a is provided overlapping with the first drive circuit section 231, conductive layer 702b is provided overlapping with the second drive circuit section 232, conductive layer 702c is provided overlapping with the CPU 23, conductive layer 702d is provided overlapping with the GPU 24, and conductive layer 702e is provided overlapping with the memory circuit section 25. Preferably, each conductive layer 702 completely covers the respective peripheral drive circuit and functional circuit. However, it is also acceptable to configure it to cover only a portion of the respective peripheral drive circuit and functional circuit.

[0376] Figure 66A is a perspective view of a display device 10 having conductive layers 701 and 702 between the peripheral drive circuit and functional circuit and the display area 235. By providing conductive layer 701 in addition to conductive layer 702, the electromagnetic noise shielding effect can be further enhanced.

[0377] Thus, the conductive layer 701 and the conductive layer 702 function as an electromagnetic shield (sometimes referred to as a "shielding layer" or "shielding layer"). The conductive layer 701 and the conductive layer 702 may be in a floating state, but it is preferable that they be supplied with a fixed potential such as a high power supply potential VDD, a low power supply potential VSS, a common potential COM, or a ground potential GND. For example, the ground potential GND can be supplied to the conductive layer 701 and the conductive layer 702. If the display device 10 has both the conductive layer 701 and the conductive layer 702, the conductive layer 701 and the conductive layer 702 may be at the same potential, or they may be at different potentials. In addition, one of the conductive layer 701 and the conductive layer 702 may be in a floating state.

[0378] Furthermore, while Figure 66A shows an example where the display device 10 has two layers of conductive material that function as an electromagnetic shield, it may also have three or more layers of conductive material that function as an electromagnetic shield. By making the electromagnetic shield multilayered, the effect of blocking electromagnetic noise can be enhanced. When providing a multilayered electromagnetic shield, each layer of the electromagnetic shield should be stacked with an insulator in between.

[0379] Furthermore, similar to the conductive layer 701, the conductive layer 702 is not limited to a planar shape, but may also be in the form of a mesh (see Figure 66B) or stripes (see Figure 66C), etc.

[0380] Alternatively, a conductive layer that functions as wiring may be used as an electromagnetic shield instead of conductive layers 701 and 702. For example, wiring that supplies a fixed potential such as anode potential or cathode potential may be formed below the multiple pixel circuits 51, and this wiring may be used as an electromagnetic shield. By using a conductive layer that functions as wiring as an electromagnetic shield, the number of layers constituting the display device 10 can be reduced. Therefore, the productivity of the display device 10 can be increased.

[0381] Furthermore, some of the transistors constituting the functional circuit of layer 40 may be provided in layer 50. Also, some of the transistors constituting the pixel circuit 51 of layer 50 may be provided in layer 40. Therefore, the functional circuit may be configured to include Si transistors and OS transistors. Also, the pixel circuit 51 may be configured to include Si transistors and OS transistors.

[0382] The transistors in the display device 10 may be n-channel transistors or p-channel transistors. Both n-channel and p-channel transistors may be used. For example, the circuit of the display device 10 may use a CMOS structure that combines n-channel and p-channel transistors.

[0383] Furthermore, for example, if the pixel circuit 51 is composed of multiple types of transistors using different semiconductor materials, the transistors may be placed on different layers for each type of transistor. For example, if the pixel circuit 51 is composed of a region 51a containing Si transistors and a region 51b containing OS transistors, region 51a may be formed on layer 40 and region 51b on layer 50 (see Figure 67). Also, by overlapping regions 51a and 51b, the occupied area of ​​the pixel circuit 51 is reduced. Therefore, the resolution of the display device 10 can be increased.

[0384] Furthermore, a transistor having a low-temperature polysilicon (LTPS) semiconductor layer (hereinafter also referred to as an LTPS transistor) may be used as the transistor included in region 51a. LTPS transistors have high field-effect mobility and good frequency characteristics. A configuration combining an LTPS transistor and an OS transistor is sometimes referred to as LTPO.

[0385] The conductivity types of the transistors in regions 51a and 51b may be different or the same. For example, region 51a may have a p-channel transistor and region 51b may have an n-channel transistor. Alternatively, each of regions 51a and 51b may have an n-channel transistor. Furthermore, each of regions 51a and 51b may have an n-channel transistor and a p-channel transistor.

[0386] Furthermore, for example, if the peripheral drive circuit is composed of multiple types of transistors using different semiconductor materials, the transistors may be placed in different layers for each type of transistor. For example, if the first drive circuit section 231 is composed of a region 231a containing a Si transistor and a region 231b containing an OS transistor, region 231a may be formed in layer 40 and region 231b may be formed in layer 50. Also, for example, if the second drive circuit section 232 is composed of a region 232a containing a Si transistor and a region 232b containing an OS transistor, region 232a may be formed in layer 40 and region 232b may be formed in layer 50. For example, the peripheral drive circuit may be composed of LTPO.

[0387] The conductivity types of the transistors in regions 231a and 231b may be different or the same. For example, region 231a may contain a p-channel transistor and region 231b may contain an n-channel transistor. Alternatively, each of regions 231a and 231b may contain an n-channel transistor. Furthermore, each of regions 231a and 231b may contain an n-channel transistor and a p-channel transistor.

[0388] The conductivity types of the transistors in regions 232a and 232b may be different or the same. For example, region 232a may contain a p-channel transistor and region 232b may contain an n-channel transistor. Alternatively, regions 232a and 232b may each contain an n-channel transistor and a p-channel transistor.

[0389] Modified versions of the display device 10 shown in Figures 63A and 63B are shown in Figures 68A and 68B. The display device 10 shown in Figure 68A has a configuration in which one pixel circuit 51 and two light-emitting elements 61 (light-emitting elements 61a and 61b) are electrically connected. The light emission of the two light-emitting elements 61 can be alternately controlled by one pixel circuit 51. That is, the operation of two pixels 230 (pixels 230a and 230b) can be controlled by one pixel circuit 51. Furthermore, by simultaneously emitting light from light-emitting elements 61a and 61b, it is also possible for them to function as a single pixel 230.

[0390] As pixels 230 in the display device 10 shown in Figures 68A and 68B, for example, the semiconductor device 100F, semiconductor device 100G, or semiconductor device 100H shown in the above embodiment can be used. As mentioned above, semiconductor device 100F, semiconductor device 100G, and semiconductor device 100H are suitable for display devices with high pixel density.

[0391] Furthermore, similar to the display device 10 shown in Figure 63B, a layer 40 may be provided in the display device 10 shown in Figure 68A (see Figure 68B).

[0392] In this embodiment, a configuration is shown in which one pixel circuit 51 controls two light-emitting elements 61, but it is also possible to control three or more light-emitting elements 61 with one pixel circuit 51.

[0393] <Example of display module configuration> Next, an example of the configuration of a display module including a display device according to one aspect of the present invention will be described.

[0394] Figures 69A to 69C are schematic perspective views of the display module 400. The display module 400 has a structure in which an FPC 404 (FPC: Flexible printed circuits) is provided at the input / output terminal section 29 of the display device 10. The FPC 404 has a structure in which wiring is provided on a film made of an insulating material. The FPC 404 is also flexible. The FPC 404 functions as wiring for supplying video signals, control signals, and power potential from an external source to the display device 10. An IC may also be mounted on the FPC 404.

[0395] The display module 400 shown in Figure 69B has a configuration in which a display device 10 is provided on a printed circuit board 401. The printed circuit board 401 has a structure in which wiring is provided inside or on the surface of a substrate made of an insulating material, or both inside and on the surface.

[0396] In the display module 400 shown in Figure 69B, the input / output terminal section 29 of the display device 10 and the terminal section 402 of the printed circuit board 401 are electrically connected via a wire 403. The wire 403 can be formed by wire bonding. Furthermore, either ball bonding or wedge bonding can be used for the wire bonding.

[0397] After the wire 403 is formed, it may be covered with a resin material or the like. Furthermore, the electrical connection between the display device 10 and the printed circuit board 401 may be achieved by methods other than wire bonding. For example, the electrical connection between the display device 10 and the printed circuit board 401 may be achieved with an anisotropic conductive adhesive or bumps.

[0398] Furthermore, in the display module 400 shown in Figure 69B, the terminal section 402 of the printed circuit board 401 is electrically connected to the FPC 404. For example, if the pitch of the electrodes on the input / output terminal section 29 of the display device 10 is different from the pitch of the electrodes on the FPC 404, the input / output terminal section 29 and the FPC 404 may be electrically connected via the printed circuit board 401. Specifically, the spacing (pitch) of the multiple electrodes on the input / output terminal section 29 can be converted to the spacing of the multiple electrodes on the terminal section 402 using the wiring formed on the printed circuit board 401. In other words, even if the pitch of the electrodes on the input / output terminal section 29 is different from the pitch of the electrodes on the FPC 404, an electrical connection between the electrodes of both can be achieved.

[0399] Furthermore, the printed circuit board 401 can be equipped with various elements such as resistive elements, capacitive elements, and semiconductor elements.

[0400] Alternatively, as shown in Figure 69C, the terminal portion 402 may be electrically connected to a connection portion 405 provided on the lower surface of the printed circuit board 401 (the side on which the display device 10 is not installed). For example, by making the connection portion 405 a socket-type connection portion, the display module 400 can be easily attached to and detached from other devices.

[0401] Figure 70 shows an example of a partial cross-sectional configuration of the display device 10 shown in Figure 63A. The display device 10 shown in Figure 70 comprises a substrate 301, a capacitor 246, and a layer 50 including a transistor 310, and a layer 60 including light-emitting elements 61R, 61G, and 61B. The layer 60 is provided on the insulating layer 363 of the layer 50.

[0402] The transistor 310 is a transistor having a channel-forming region in the substrate 301. The substrate 301 can be a semiconductor substrate such as a single-crystal silicon substrate. The transistor 310 comprises a portion of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region of the substrate 301 doped with impurities and functions as either a source or a drain. The insulating layer 314 covers the side surface of the conductive layer 311 and functions as an insulating layer.

[0403] Furthermore, an element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301.

[0404] Furthermore, an insulating layer 261 is provided covering the transistor 310, and a capacitance 246 is provided on the insulating layer 261.

[0405] Capacitor 246 comprises a conductive layer 241, a conductive layer 245, and an insulating layer 243 located between them. The conductive layer 241 functions as one electrode of the capacitor 246, the conductive layer 245 functions as the other electrode of the capacitor 246, and the insulating layer 243 functions as the dielectric of the capacitor 246.

[0406] The conductive layer 241 is provided on the insulating layer 261 and embedded in the insulating layer 254. The conductive layer 241 is electrically connected to either the source or drain of the transistor 310 by a plug 266 embedded in the insulating layer 261. The insulating layer 243 is provided covering the conductive layer 241. The conductive layer 245 is provided in the region that overlaps with the conductive layer 241 via the insulating layer 243.

[0407] An insulating layer 255 is provided covering the capacitance 246, an insulating layer 363 is provided on the insulating layer 255, and light-emitting elements 61R, 61G, and 61B are provided on the insulating layer 363. A protective layer 415 is provided on the light-emitting elements 61R, 61G, and 61B, and a substrate 420 is provided on the upper surface of the protective layer 415 via a resin layer 419.

[0408] The pixel electrodes of the light-emitting element are electrically connected to either the source or drain of the transistor 310 by plugs 256 embedded in the insulating layer 255 and insulating layer 363, a conductive layer 241 embedded in the insulating layer 254, and plugs 266 embedded in the insulating layer 261.

[0409] Figure 71 shows a modified example of the cross-sectional configuration shown in Figure 70. The main difference between the cross-sectional configuration example of the display device 10 shown in Figure 71 and the cross-sectional configuration example shown in Figure 70 is that transistor 320 is provided instead of transistor 310. Note that explanations of parts that are the same as in Figure 70 may be omitted.

[0410] Transistor 320 is a transistor in which a metal oxide (also called an oxide semiconductor) is applied to the semiconductor layer where the channel is formed.

[0411] The transistor 320 comprises a semiconductor layer 321, an insulating layer 323, a conductive layer 324, a pair of conductive layers 325, an insulating layer 326, and a conductive layer 327.

[0412] As the substrate 331, an insulating substrate or a semiconductor substrate can be used.

[0413] An insulating layer 332 is provided on the substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320, and prevents oxygen from detaching from the semiconductor layer 321 to the insulating layer 332. As the insulating layer 332, for example, a film that is less susceptible to hydrogen or oxygen diffusion than a silicon oxide film can be used, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0414] A conductive layer 327 is provided on an insulating layer 332, and an insulating layer 326 is provided covering the conductive layer 327. The conductive layer 327 functions as the first gate electrode of the transistor 320, and a portion of the insulating layer 326 functions as the first gate insulating layer. It is preferable to use an oxide insulating film, such as a silicon oxide film, for at least the portion of the insulating layer 326 that is in contact with the semiconductor layer 321. It is preferable that the upper surface of the insulating layer 326 is flattened.

[0415] The semiconductor layer 321 is provided on the insulating layer 326. Preferably, the semiconductor layer 321 comprises a metal oxide (also called an oxide semiconductor) film having semiconductor properties. Details of materials suitably used for the semiconductor layer 321 will be described later.

[0416] A pair of conductive layers 325 are provided in contact with the semiconductor layer 321 and function as source and drain electrodes.

[0417] Furthermore, an insulating layer 328 is provided covering the top and side surfaces of the pair of conductive layers 325, as well as the side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided on the insulating layer 328. The insulating layer 328 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the semiconductor layer 321 from the insulating layer 264, etc., and to prevent oxygen from detaching from the semiconductor layer 321. As the insulating layer 328, an insulating film similar to that of the insulating layer 332 can be used.

[0418] The insulating layer 328 and the insulating layer 264 are provided with openings that reach the semiconductor layer 321. Inside these openings, the insulating layer 323 and the conductive layer 324 are embedded, in contact with the insulating layer 264, the insulating layer 328, the sides of the conductive layer 325, and the upper surface of the semiconductor layer 321. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.

[0419] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are flattened so that their heights are approximately the same, and the insulating layer 329 and insulating layer 265 are provided covering them.

[0420] Insulating layers 264 and 265 function as interlayer insulating layers. Insulating layer 329 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the transistor 320 from insulating layer 265, etc. As insulating layer 329, an insulating film similar to that used for insulating layers 328 and 332 can be used.

[0421] A plug 274, which is electrically connected to one of the pair of conductive layers 325, is provided so as to be embedded in the insulating layers 265, 329, and 264. Here, it is preferable that the plug 274 comprises a conductive layer 274a that covers the sides of the openings of the insulating layers 265, 329, 264, and 328, and a portion of the upper surface of the conductive layer 325, and a conductive layer 274b that is in contact with the upper surface of the conductive layer 274a. In this case, it is preferable to use a conductive material that does not easily allow hydrogen and oxygen to diffuse as the conductive layer 274a.

[0422] Figure 72 shows an example of a partial cross-sectional configuration of the display device 10 shown in Figure 63B. The display device 10 shown in Figure 72 has a configuration in which a transistor 310A with a channel formed on the substrate 301A of layer 40 and a transistor 310B with a channel formed on the substrate 301A of layer 40 are stacked. The same material as substrate 301 can be used for substrate 301A.

[0423] The display device 10 shown in Figure 72 has a structure in which a layer 60 on which a light-emitting element 61 is provided, a layer 50 on which a substrate 301B, a transistor 310B, and a capacitor 246 are provided, and a layer 40 on which a substrate 301A and a transistor 310A are provided are bonded together.

[0424] A plug 343 is provided on substrate 301B, which penetrates the substrate 301B. The plug 343 functions as a through-silicon via (TSV). The plug 343 is also electrically connected to a conductive layer 342 provided on the back surface of substrate 301B (the surface opposite to the substrate 420 side). On the other hand, a conductive layer 341 is provided on substrate 301A on an insulating layer 261.

[0425] The conductive layer 341 and the conductive layer 342 are joined together, thereby electrically connecting layer 40 and layer 50.

[0426] It is preferable to use the same conductive material for conductive layer 341 and conductive layer 342. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Sn, Zn, Au, Ag, Pt, Ti, Mo, and W, or a metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) composed of the above elements can be used. In particular, it is preferable to use copper for conductive layer 341 and conductive layer 342. This allows the application of Cu-Cu (copper-copper) direct bonding technology (a technology that achieves electrical conductivity by connecting Cu (copper) pads to each other). The conductive layer 341 and conductive layer 342 may be bonded via bumps.

[0427] Figure 73 shows a modified example of the cross-sectional configuration shown in Figure 72. The cross-sectional configuration example of the display device 10 shown in Figure 73 has a configuration in which a transistor 310A with a channel formed on a substrate 301A and a transistor 320 containing a metal oxide are stacked on the semiconductor layer in which the channel is formed. Note that parts similar to those in Figures 70 to 72 may be omitted from the explanation.

[0428] The layer 50 shown in Figure 73 has the same configuration as the layer 50 shown in Figure 71, but without the substrate 331. In the layer 40 shown in Figure 73, an insulating layer 261 is provided covering the transistor 310A, and a conductive layer 251 is provided on the insulating layer 261. An insulating layer 262 is provided covering the conductive layer 251, and a conductive layer 252 is provided on the insulating layer 262. The conductive layers 251 and 252 each function as wiring. An insulating layer 263 and an insulating layer 332 are provided covering the conductive layer 252, and a transistor 320 is provided on the insulating layer 332. An insulating layer 265 is provided covering the transistor 320, and a capacitor 246 is provided on the insulating layer 265. The capacitor 246 and the transistor 320 are electrically connected by a plug 274. Layer 50 is provided on top of the insulating layer 263 of layer 40.

[0429] Transistor 320 can be used as a transistor constituting the pixel circuit 51. Transistor 310 can also be used as a transistor constituting the pixel circuit 51 or as a transistor constituting a peripheral drive circuit. Furthermore, transistors 310 and 320 can be used as transistors constituting functional circuits such as arithmetic circuits or memory circuits.

[0430] This configuration allows for the formation of peripheral drive circuits and other components directly beneath the layer 60 containing the light-emitting element 61, in addition to the pixel circuit 51. Therefore, it becomes possible to miniaturize the display device compared to the case where the drive circuit is located around the display area.

[0431] Figure 74 shows a partial cross-sectional configuration example of the display device 10 shown in Figures 64A and 64B. Figure 74 is a modified example of the cross-sectional configuration example shown in Figure 70. In Figure 74, a conductive layer 701 is provided on an insulating layer 263, and an insulating layer 333 is provided on the conductive layer 701. In addition, an insulating layer 332 is provided on the insulating layer 333.

[0432] The conductive layer 701 is not electrically connected to any conductor (such as a plug) used to supply signals from the circuit in layer 40 to the circuit in layer 50. Similarly, the conductive layer 701 is not electrically connected to any conductor (such as a plug) used to supply signals from the circuit in layer 50 to the circuit in layer 40.

[0433] Figure 74 shows an example of a cross-sectional configuration in which the conductive layer 701 is provided between layer 40 and layer 50, but the conductive layer 701 may be provided on layer 40 or on layer 50.

[0434] Figure 75 shows an example of a partial cross-sectional configuration of the display device 10 shown in Figure 66. Figure 75 is also a modified example of the cross-sectional configuration shown in Figure 74. In Figure 75, a conductive layer 702 is provided on an insulating layer 263, and an insulating layer 334 is provided on the conductive layer 702. Furthermore, a conductive layer 701 is provided on the insulating layer 334, and an insulating layer 333 is provided on the conductive layer 701. Furthermore, an insulating layer 332 is provided on the insulating layer 333.

[0435] Similar to conductive layer 701, conductive layer 702 is not electrically connected to a conductor (such as a plug) used to supply signals from the circuit in layer 40 to the circuit in layer 50. Furthermore, conductive layer 702 is not electrically connected to a conductor (such as a plug) used to supply signals from the circuit in layer 50 to the circuit in layer 40. However, conductive layer 701 and conductive layer 702 may be electrically connected.

[0436] Figure 75 shows an example of a cross-sectional configuration in which conductive layers 701 and 702 are provided between layers 40 and 50. However, conductive layers 701 and 702 may be provided on layer 40 or on layer 50. Alternatively, conductive layer 702 may be provided on layer 40 and conductive layer 701 on layer 50.

[0437] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0438] (Embodiment 10) A display device 10 according to one aspect of the present invention can realize image display using interlaced drive. In this embodiment, the interlaced drive of the display device 10 will be described.

[0439] [Drive Method 1] Figure 76A shows a block diagram of the display device 10. In Figure 76A, pixels 230 arranged in an m x n matrix are shown, specifically 4 rows and 3 columns. The pixels 230 in the first row are electrically connected to the first drive circuit unit 231 via wiring GLa[1]. The pixels 230 in the second row are electrically connected to the first drive circuit unit 231 via wiring GLa[2]. The pixels 230 in the third row are electrically connected to the first drive circuit unit 231 via wiring GLa[3]. The pixels 230 in the fourth row are electrically connected to the first drive circuit unit 231 via wiring GLa[4]. Wiring GLa functions as scan lines.

[0440] Furthermore, the pixels 230 in the first row are electrically connected to the second drive circuit unit 232 via wiring DL[1]. The pixels 230 in the second row are electrically connected to the second drive circuit unit 232 via wiring DL[2]. The pixels 230 in the third row are electrically connected to the second drive circuit unit 232 via wiring DL[3]. Wiring DL functions as a video signal line.

[0441] In Figure 76A, pixel 230 in the 4th row and 3rd column is shown as pixel 230[4,3]. Similarly, pixel 230 in the mth row and 3rd column is shown as pixel 230[m,3]. Note that in Figure 76A, wiring other than wiring GLa and wiring DL is omitted.

[0442] The first drive circuit section 231 is supplied with a start pulse VSP and a clock signal VCLK.

[0443] Figure 76B is a timing chart illustrating the operation of the display device 10 shown in Figure 76A. When a start pulse VSP is supplied to the first drive circuit 231, wiring GLa is selected sequentially in synchronization with the clock signal VCLK. During the period in which wiring GLa is selected, a video signal is supplied from the second drive circuit 232 to the pixel 230. The period in which wiring GLa[1] to wiring GLa[m] are selected sequentially is called a "frame" or "frame period". Generally, the selection of wiring GLa[1] to wiring GLa[m] is repeated during the image display period. Therefore, the start pulse VSP is supplied for each frame period.

[0444] For example, depending on the video source to be displayed, the display quality may be comparable even with a pixel density lower than that of the display device 10. In this case, by switching the selection of odd-numbered and even-numbered wiring GLa for each frame, the load on the light-emitting element 61 can be reduced while maintaining display quality. Therefore, the reliability of the display device 10 can be improved.

[0445] The timing chart in Figure 76B shows an example of operation where, in the first frame (odd-numbered frame), wiring GLa in odd-numbered rows is selected sequentially, and wiring GLa in even-numbered rows is not selected. Similarly, in the second frame (even-numbered frame), wiring GLa in even-numbered rows is selected sequentially, and wiring GLa in odd-numbered rows is not selected. Alternatively, wiring GLa in even-numbered rows may be selected sequentially in odd-numbered frames, and wiring GLa in odd-numbered rows may be selected sequentially in even-numbered frames. This method of switching the rows to which the video signal is written each frame is called "interlace" or "interlaced drive." The method of writing the video signal to all pixels in one frame is called "progressive" or "progressive drive."

[0446] Furthermore, if you want to increase the luminescence brightness, you can perform the display operation using progressive drive by simultaneously illuminating the light-emitting elements 61a and 61b without interlaced drive. Alternatively, you can increase the frame frequency during interlaced drive. The frame frequency is preferably 60Hz or higher, more preferably 120Hz or higher, and even more preferably 240Hz or higher. Interlaced drive and progressive drive can be switched as appropriate.

[0447] [Drive Method 2] Next, we will explain the interlaced drive when using semiconductor device 100F or semiconductor device 100G as pixel 230, using Figure 77. To reduce repetition, we will mainly explain the differences from Figure 76.

[0448] As shown in the above embodiment, each of the semiconductor device 100F and semiconductor device 100G includes a light-emitting element 61a whose cathode is electrically connected to the wiring 104a, and a light-emitting element 61b whose cathode is electrically connected to the wiring 104b.

[0449] Figure 77A is a block diagram of a display device 10 using semiconductor device 100F or semiconductor device 100G as pixels 230. In Figure 77A, pixels 230 in odd-numbered rows are electrically connected to wiring 104a, and pixels 230 in even-numbered rows are electrically connected to wiring 104b. Alternatively, pixels 230 in even-numbered rows may be electrically connected to wiring 104a, and pixels 230 in odd-numbered rows may be electrically connected to wiring 104b.

[0450] Note that in Figure 77A, the wiring other than wiring GLa and wiring DL is omitted.

[0451] Furthermore, since semiconductor devices 100F and 100G can drive light-emitting elements 61a and 61b with a single pixel circuit 51, the number of wirings GLa can be halved. In Figure 77A, the pixels 230 in the first row and the pixels 230 in the second row are electrically connected to wiring GLa[1], which is the first wiring GLa, and the pixels 230 in the third row and the pixels 230 in the fourth row are electrically connected to wiring GLa[2], which is the second wiring GLa.

[0452] In Figure 77A, the wiring GLa that is electrically connected to pixel 230 in the mth row is shown as wiring GLa[p]. When m is even, p is half of m, and when m is odd, p is half of m+1.

[0453] Furthermore, light-emitting elements 61a are used for pixels 230 in odd-numbered rows, and light-emitting elements 61b are used for pixels 230 in even-numbered rows. Alternatively, light-emitting elements 61a may be used for pixels 230 in even-numbered rows, and light-emitting elements 61b may be used for pixels 230 in odd-numbered rows.

[0454] Figure 77B is a timing chart illustrating the operation of the display device 10 shown in Figure 77A. Wires GLa from the 1st to the pth wire are sequentially selected frame by frame in synchronization with the clock signal VCLK. In addition, in the first frame (odd-numbered frames), potential Vc is supplied to wire 104a and potential Va is supplied to wire 104b. In the second frame (even-numbered frames), potential Va is supplied to wire 104a and potential Vc is supplied to wire 104b. Interlace driving can be achieved in this way.

[0455] As shown in the above embodiment, the semiconductor device 100F and semiconductor device 100G are suitable for improving the resolution of the display device because the area occupied by the pixel circuits 51F and 51G that control the light emission of the light-emitting element 61 is small. By operating the display device 10 using the semiconductor device 100F or semiconductor device 100G for the pixels 230 in interlaced drive mode, a display device with a high pixel density can be realized.

[0456] [Drive Method 3] Next, we will explain the interlaced drive when using semiconductor device 100H as pixel 230, using Figure 78. Note that Figure 78 is a modified version of Figure 77. Therefore, to reduce repetition in the explanation, we will mainly explain the parts that differ from Figure 77.

[0457] As shown in the above embodiment, the semiconductor device 100H includes circuit 52a, circuit 52b, light-emitting element 61a, and light-emitting element 61b. Circuit 52a functions as a switch to select whether or not to make the light-emitting element 61a emit light, and circuit 52b functions as a switch to select whether or not to make the light-emitting element 61b emit light. In addition, circuit 52a is electrically connected to wiring GLc, and circuit 52b is electrically connected to wiring GLd.

[0458] When light-emitting elements 61a are used for pixels 230 in odd-numbered rows, wiring GLc is electrically connected to the pixels 230 in odd-numbered rows. When light-emitting elements 61b are used for pixels 230 in even-numbered rows, wiring GLd is electrically connected to the pixels 230 in even-numbered rows.

[0459] Figure 78B is a timing chart illustrating the operation of the display device 10 shown in Figure 78A. Wires GLa from the 1st to the pth wire are selected sequentially frame by frame in synchronization with the clock signal VCLK. In addition, in the first frame (odd-numbered frame), wires GLc are selected sequentially in synchronization with wires GLa. For example, if wire GLa[1] is selected, wire GLc[1] is also selected. In the first frame (odd-numbered frame), none of the wires GLd are selected. Therefore, light-emitting element 61a emits light, but light-emitting element 61b does not.

[0460] In the second frame (even-numbered frame), wiring GLd is selected sequentially in synchronization with wiring GLa. For example, if wiring GLa[1] is selected, wiring GLd[1] is also selected. In the second frame (even-numbered frame), none of the wiring GLc are selected. Therefore, the light-emitting element 61b emits light, while the light-emitting element 61a does not. Interlace driving can be achieved in this way.

[0461] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0462] (Embodiment 11) This embodiment describes a transistor that can be used in a semiconductor device according to one aspect of the present invention.

[0463] <Example of transistor configuration> Figures 79A, 79B, and 79C are a top view and a cross-sectional view of a transistor 500 that can be used in a semiconductor device according to one aspect of the present invention. The transistor 500 can be applied to a semiconductor device according to one aspect of the present invention.

[0464] Figure 79A is a top view of transistor 500. Figures 79B and 79C are cross-sectional views of transistor 500. Here, Figure 79B is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 79A, and is also a cross-sectional view of transistor 500 in the channel length direction. Similarly, Figure 79C is a cross-sectional view of the area indicated by the dashed line A3-A4 in Figure 79A, and is also a cross-sectional view of transistor 500 in the channel width direction. Note that in the top view of Figure 79A, some elements have been omitted for clarity.

[0465] As shown in Figure 79, the transistor 500 includes a metal oxide 531a disposed on a substrate (not shown), a metal oxide 531b disposed on the metal oxide 531a, conductors 542a and 542b disposed on the metal oxide 531b at a distance from each other, an insulator 580 disposed on the conductors 542a and 542b with an opening formed between the conductors 542a and 542b, a conductor 560 disposed in the opening, an insulator 550 disposed between the metal oxide 531b, conductor 542a, conductor 542b, insulator 580, and conductor 560, and a metal oxide 531c disposed between the metal oxide 531b, conductor 542a, conductor 542b, insulator 580, and insulator 550. Here, as shown in Figures 79B and 79C, it is preferable that the upper surface of the conductor 560 substantially coincides with the upper surfaces of the insulator 550, insulator 554, metal oxide 531c, and insulator 580. In the following, metal oxide 531a, metal oxide 531b, and metal oxide 531c may be collectively referred to as metal oxide 531. Also, conductors 542a and conductor 542b may be collectively referred to as conductor 542.

[0466] In the transistor 500 shown in Figure 79, the sides of the conductors 542a and 542b facing the conductor 560 have a generally vertical shape. However, the transistor 500 shown in Figure 79 is not limited to this, and the angle between the side and bottom surfaces of the conductors 542a and 542b may be 10° to 80°, preferably 30° to 60°. Furthermore, the opposing sides of the conductors 542a and 542b may have multiple surfaces.

[0467] As shown in Figure 79, it is preferable that an insulator 554 is placed between the insulator 524, metal oxide 531a, metal oxide 531b, conductor 542a, conductor 542b, and metal oxide 531c and the insulator 580. Here, as shown in Figures 79B and 79C, it is preferable that the insulator 554 is in contact with the side surface of the metal oxide 531c, the top and side surfaces of the conductor 542a, the top and side surfaces of the conductor 542b, the side surfaces of the metal oxide 531a and metal oxide 531b, and the top surface of the insulator 524.

[0468] In the transistor 500, a configuration is shown in which three layers of metal oxide 531a, metal oxide 531b, and metal oxide 531c are stacked in the region where the channel is formed (hereinafter also referred to as the channel formation region) and in its vicinity. However, the present invention is not limited to this. For example, a two-layer structure of metal oxide 531b and metal oxide 531c, or a stacked structure of four or more layers, may be provided. Also, in the transistor 500, the conductor 560 is shown as a two-layer stacked structure. However, the present invention is not limited to this. For example, the conductor 560 may be a single-layer structure or a stacked structure of three or more layers. Furthermore, each of the metal oxide 531a, metal oxide 531b, and metal oxide 531c may have a stacked structure of two or more layers.

[0469] For example, if the metal oxide 531c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has the same composition as metal oxide 531b and the second metal oxide has the same composition as metal oxide 531a.

[0470] Here, the conductor 560 functions as the gate electrode of the transistor, and the conductors 542a and 542b function as the source electrode or drain electrode, respectively. As described above, the conductor 560 is formed to be embedded in the opening of the insulator 580 and in the region sandwiched between the conductors 542a and 542b. Here, the arrangement of the conductors 560, 542a, and 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. In other words, in the transistor 500, the gate electrode can be positioned in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 560 can be formed without providing a positional margin, the occupied area of ​​the transistor 500 can be reduced. This makes it possible to make the display device high-resolution. It also makes it possible to make the display device have a narrow bezel.

[0471] As shown in Figure 79, it is preferable that the conductor 560 has a conductor 560a provided inside the insulator 550 and a conductor 560b provided so as to be embedded inside the conductor 560a.

[0472] The transistor 500 preferably includes an insulator 514 disposed on a substrate (not shown), an insulator 516 disposed on top of the insulator 514, a conductor 505 disposed so as to be embedded in the insulator 516, an insulator 522 disposed on top of the insulator 516 and the conductor 505, and an insulator 524 disposed on top of the insulator 522. It is preferable that a metal oxide 531a is disposed on top of the insulator 524.

[0473] It is preferable that an insulator 574 and an insulator 581, which function as interlayer films, are placed on top of the transistor 500. Here, it is preferable that the insulator 574 is placed in contact with the upper surfaces of the conductor 560, insulator 550, insulator 554, metal oxide 531c, and insulator 580.

[0474] It is preferable that insulators 522, 554, and 574 have a function to suppress the diffusion of hydrogen (for example, at least one such as a hydrogen atom or a hydrogen molecule). For example, it is preferable that insulators 522, 554, and 574 have lower hydrogen permeability than insulators 524, 550, and 580. It is also preferable that insulators 522 and 554 have a function to suppress the diffusion of oxygen (for example, at least one such as an oxygen atom or an oxygen molecule). For example, it is preferable that insulators 522 and 554 have lower oxygen permeability than insulators 524, 550, and 580.

[0475] Here, insulator 524, metal oxide 531, and insulator 550 are separated from insulators 580 and 581 by insulators 554 and 574. Therefore, it is possible to suppress the incorporation of impurities such as hydrogen and excess oxygen contained in insulators 580 and 581 into insulators 524, metal oxide 531, and insulator 550.

[0476] It is preferable that a conductor 545 (conductor 545a and conductor 545b) is provided that is electrically connected to the transistor 500 and functions as a plug. In addition, an insulator 541 (insulator 541a and insulator 541b) is provided in contact with the side surface of the conductor 545 that functions as a plug. That is, the insulator 541 is provided in contact with the inner wall of the opening of the insulator 554, insulator 580, insulator 574, and insulator 581. Alternatively, a first conductor of the conductor 545 may be provided in contact with the side surface of the insulator 541, and a second conductor of the conductor 545 may be provided further inside. Here, the height of the upper surface of the conductor 545 and the height of the upper surface of the insulator 581 can be made to be approximately the same. Although the transistor 500 shows a configuration in which the first conductor and the second conductor of the conductor 545 are stacked, the present invention is not limited to this. For example, the conductor 545 may be provided as a single layer or as a laminated structure of three or more layers. When the structure has a laminated structure, an ordinal number may be assigned to distinguish it according to the order of formation.

[0477] In transistor 500, it is preferable to use a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) for the metal oxide 531 (metal oxide 531a, metal oxide 531b, and metal oxide 531c) that includes the channel formation region. For example, it is preferable to use a metal oxide with a band gap of 2 eV or more, preferably 2.5 eV or more, as the metal oxide that forms the channel formation region of metal oxide 531.

[0478] The above metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). In addition, it is preferable that it contains element M. As element M, one or more of the following can be used: aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), or cobalt (Co). In particular, it is preferable that element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn). Furthermore, it is even more preferable that element M contains either Ga and Sn or both.

[0479] Furthermore, as shown in Figure 79B, the thickness of the metal oxide 531b in the region that does not overlap with the conductor 542 may be thinner than the thickness of the metal oxide 531b in the region that overlaps with the conductor 542. This is formed by removing a portion of the upper surface of the metal oxide 531b when forming the conductors 542a and 542b. When a conductive film that will become the conductor 542 is deposited on the upper surface of the metal oxide 531b, a region with low resistance may be formed near the interface with the conductive film. In this way, by removing the region with low resistance located between the conductors 542a and 542b on the upper surface of the metal oxide 531b, it is possible to prevent the formation of a channel in that region.

[0480] According to one aspect of the present invention, a display device with a small size transistor and high resolution can be provided. Alternatively, a display device with a large on-current transistor and high brightness can be provided. Alternatively, a display device with a fast-operating transistor can be provided. Alternatively, a display device with a stable electrical characteristic transistor can be provided and highly reliable can be provided. Alternatively, a display device with a small off-current transistor can be provided and low power consumption can be provided.

[0481] A detailed configuration of the transistor 500, which can be used in a display device according to one aspect of the present invention, will be described.

[0482] The conductor 505 is arranged to have an overlapping region with the metal oxide 531 and the conductor 560. Furthermore, it is preferable that the conductor 505 is embedded in the insulator 516.

[0483] The conductor 505 comprises conductor 505a, conductor 505b, and conductor 505c. Conductor 505a is provided in contact with the bottom surface and side wall of an opening provided in the insulator 516. Conductor 505b is provided so as to be embedded in a recess formed in conductor 505a. Here, the upper surface of conductor 505b is lower than the upper surface of conductor 505a and the upper surface of the insulator 516. Conductor 505c is provided in contact with the upper surface of conductor 505b and the side surface of conductor 505a. Here, the height of the upper surface of conductor 505c is approximately equal to the height of the upper surface of conductor 505a and the upper surface of the insulator 516. In other words, conductor 505b is enclosed by conductors 505a and conductor 505c.

[0484] It is preferable to use conductive materials for conductors 505a and 505c that have the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use conductive materials that have the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0485] By using conductive materials that have the function of reducing hydrogen diffusion for conductors 505a and 505c, it is possible to suppress the diffusion of impurities such as hydrogen contained in conductor 505b into the metal oxide 531 via the insulator 524, etc. Furthermore, by using conductive materials that have the function of suppressing oxygen diffusion for conductors 505a and 505c, it is possible to suppress the oxidation of conductor 505b and the resulting decrease in conductivity. As conductive materials that have the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore, the conductive material can be used as a single layer or in a laminate for conductor 505a. For example, titanium nitride can be used for conductor 505a.

[0486] Furthermore, it is preferable to use a conductive material whose main component is tungsten, copper, or aluminum for the conductor 505b. For example, tungsten may be used for the conductor 505b.

[0487] Here, conductor 560 may function as the first gate (also called the top gate) electrode. Also, conductor 505 may function as the second gate (also called the bottom gate) electrode. In that case, by changing the potential applied to conductor 505 independently of the potential applied to conductor 560, the V of transistor 500 can be controlled. th This can be controlled. In particular, by applying a negative potential to the conductor 505, the V of transistor 500 can be controlled. th By making the voltage greater than 0V, it becomes possible to reduce the off-current. Therefore, applying a negative potential to the conductor 505 reduces the drain current when the potential applied to the conductor 560 is 0V compared to not applying a potential.

[0488] The conductor 505 should be larger than the channel-forming region in the metal oxide 531. In particular, as shown in Figure 79C, it is preferable that the conductor 505 extends to the region outside the end that intersects with the channel width direction of the metal oxide 531. That is, it is preferable that the conductor 505 and the conductor 560 are superimposed on the outside of the side surface in the channel width direction of the metal oxide 531, with an insulator in between.

[0489] With the above configuration, the channel-forming region of the metal oxide 531 can be electrically surrounded by the electric field of the conductor 560, which functions as the first gate electrode, and the electric field of the conductor 505, which functions as the second gate electrode.

[0490] As shown in Figure 79C, the conductor 505 is extended to function as wiring. However, the configuration is not limited to this, and a conductor that functions as wiring may be provided beneath the conductor 505.

[0491] The insulator 514 preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 500 from the substrate side. Therefore, it is preferable to use an insulating material for the insulator 514 that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms (the above impurities are less permeable). Alternatively, it is preferable to use an insulating material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules) (the above oxygen is less permeable).

[0492] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 514. This suppresses the diffusion of impurities such as water or hydrogen from the substrate side to the transistor 500 side beyond the insulator 514. Alternatively, it suppresses the diffusion of oxygen contained in the insulator 524, etc., to the substrate side beyond the insulator 514.

[0493] The insulators 516, 580, and 581 that function as interlayer films preferably have a lower dielectric constant than the insulator 514. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. For example, as the insulators 516, 580, and 581, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, or silicon oxide having pores can be appropriately used.

[0494] The insulators 522 and 524 have the function as a gate insulator.

[0495] Here, the insulator 524 in contact with the metal oxide 531 preferably desorbs oxygen by heating. In this specification, oxygen that desorbs by heating may be referred to as excess oxygen. For example, the insulator 524 may be appropriately silicon oxide or silicon oxynitride. By providing an oxygen-containing insulator in contact with the metal oxide 531, the oxygen deficiency in the metal oxide 53 can be reduced, and the reliability of the transistor 500 can be improved.

[0496] Specifically, as the insulator 524, it is preferable to use an oxide material in which a part of oxygen desorbs by heating. The oxide that desorbs oxygen by heating is an oxide film in which the desorption amount of oxygen converted to oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0497] As shown in Figure 79C, the thickness of the insulator 524 in the region that does not overlap with the insulator 554 and does not overlap with the metal oxide 531b may be thinner than the thickness of the other regions. In the insulator 524, it is preferable that the thickness of the region that does not overlap with the insulator 554 and does not overlap with the metal oxide 531b is such that the above-mentioned oxygen can diffuse sufficiently.

[0498] It is preferable that the insulator 522 functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 500 from the substrate side, similar to the insulator 514, etc. For example, it is preferable that the insulator 522 has lower hydrogen permeability than the insulator 524. By surrounding the insulator 524, metal oxide 531, and insulator 550, etc., with the insulators 522, 554, and 574, it is possible to suppress the ingress of impurities such as water or hydrogen into the transistor 500 from the outside.

[0499] Furthermore, it is preferable that the insulator 522 has a function to suppress the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule) (i.e., it is difficult for the above-mentioned oxygen to permeate it). For example, it is preferable that the insulator 522 has lower oxygen permeability than the insulator 524. It is preferable that the insulator 522 has a function to suppress the diffusion of oxygen and impurities, thereby reducing the diffusion of oxygen contained in the metal oxide 531 to the substrate side. In addition, it is possible to suppress the reaction of the conductor 505 with the oxygen contained in the insulator 524 and the metal oxide 531.

[0500] The insulator 522 may be an insulator containing an oxide of either or both aluminum and hafnium, which are insulating materials. Preferably, the insulator containing an oxide of either or both aluminum and hafnium is an aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the metal oxide 531 and the incorporation of impurities such as hydrogen from the periphery of the transistor 500 into the metal oxide 531.

[0501] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be subjected to nitriding treatment. Silicon oxide, silicon oxynitride, or silicon nitride may be laminated onto the above insulators.

[0502] The insulator 522 may be a single-layer or multi-layer insulator containing so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material as the insulator that functions as the gate insulator, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0503] Furthermore, the insulators 522 and 524 may have a laminated structure of two or more layers. In that case, the laminated structure is not limited to being made of the same material, but may be made of different materials. For example, an insulator similar to the insulator 524 may be provided below the insulator 522.

[0504] The metal oxide 531 comprises a metal oxide 531a, a metal oxide 531b on the metal oxide 531a, and a metal oxide 531c on the metal oxide 531b. By having the metal oxide 531a below the metal oxide 531b, the diffusion of impurities from structures formed below the metal oxide 531a to the metal oxide 531b can be suppressed. Furthermore, by having the metal oxide 531c on the metal oxide 531b, the diffusion of impurities from structures formed above the metal oxide 531c to the metal oxide 531b can be suppressed.

[0505] Furthermore, it is preferable that the metal oxide 531 has a layered structure of multiple oxide layers with different atomic ratios of each metal atom. For example, if the metal oxide 531 contains at least indium (In) and element M, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 531a to the total number of atoms of all elements constituting metal oxide 531a is higher than the ratio of the number of atoms of element M contained in metal oxide 531b to the total number of atoms of all elements constituting metal oxide 531b. It is also preferable that the atomic ratio of element M contained in metal oxide 531a to In is higher than the atomic ratio of element M contained in metal oxide 531b to In. Here, metal oxide 531c can be any metal oxide that can be used for metal oxide 531a or metal oxide 531b.

[0506] It is preferable that the energy at the lower end of the conduction band of metal oxide 531a and metal oxide 531c is higher than the energy at the lower end of the conduction band of metal oxide 531b. In other words, it is preferable that the electron affinity of metal oxide 531a and metal oxide 531c is smaller than the electron affinity of metal oxide 531b. In this case, it is preferable that metal oxide 531c is a metal oxide that can be used for metal oxide 531a. Specifically, it is preferable that the ratio of the number of atoms of element M contained in metal oxide 531c to the total number of atoms of all elements constituting metal oxide 531c is higher than the ratio of the number of atoms of element M contained in metal oxide 531b to the total number of atoms of all elements constituting metal oxide 531b. It is also preferable that the atomic ratio of element M contained in metal oxide 531c to In is higher than the atomic ratio of element M contained in metal oxide 531b to In.

[0507] Here, at the junctions of metal oxide 531a, metal oxide 531b, and metal oxide 531c, the energy levels at the lower end of the conduction band change smoothly. In other words, the energy levels at the lower end of the conduction band at the junctions of metal oxide 531a, metal oxide 531b, and metal oxide 531c can be said to change continuously or be continuously joined. To achieve this, it is desirable to lower the defect level density of the mixed layer formed at the interface between metal oxide 531a and metal oxide 531b, and at the interface between metal oxide 531b and metal oxide 531c.

[0508] Specifically, by having metal oxide 531a and metal oxide 531b, and metal oxide 531b and metal oxide 531c, share a common element other than oxygen (which serves as the main component), a mixed layer with a low defect level density can be formed. For example, if metal oxide 531b is In-Ga-Zn oxide, then In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc., may be used as metal oxide 531a and metal oxide 531c. Furthermore, metal oxide 531c may be in a layered structure. For example, a layered structure of In-Ga-Zn oxide and Ga-Zn oxide on the In-Ga-Zn oxide, or a layered structure of In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a layered structure of In-Ga-Zn oxide and an oxide that does not contain In may be used as metal oxide 531c.

[0509] Specifically, for metal oxide 531a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. For metal oxide 531b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2 may be used. For metal oxide 531c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, In:Ga:Zn = 4:2:3, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Furthermore, specific examples of layered structures for metal oxide 531c include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0510] In this case, the main carrier pathway is through metal oxide 531b. By configuring metal oxide 531a and metal oxide 531c as described above, the defect level density at the interface between metal oxide 531a and metal oxide 531b, and at the interface between metal oxide 531b and metal oxide 531c, can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and transistor 500 can obtain high on-current and high frequency characteristics. Furthermore, if metal oxide 531c is in a multilayer structure, in addition to the effect of reducing the defect level density at the interface between metal oxide 531b and metal oxide 531c as described above, it is expected that the diffusion of constituent elements of metal oxide 531c towards the insulator 550 will be suppressed. More specifically, by making metal oxide 531c in a multilayer structure and positioning an oxide that does not contain In on top of the multilayer structure, it is possible to suppress In that could diffuse towards the insulator 550. Since the insulator 550 functions as a gate insulator, if In diffuses, it will result in poor transistor characteristics. Therefore, by using a layered structure for the metal oxide 531c, it becomes possible to provide a highly reliable display device.

[0511] A conductor 542 (conductor 542a and conductor 542b) that functions as a source electrode and a drain electrode is provided on the metal oxide 531b. It is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum as the conductor 542, or an alloy containing the above metal elements, or an alloy combining the above metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.

[0512] By providing the conductor 542 in contact with the metal oxide 531, the oxygen concentration in the vicinity of the conductor 542 on the metal oxide 531 may be reduced. Furthermore, a metal compound layer containing the metal in the conductor 542 and components of the metal oxide 531 may be formed in the vicinity of the conductor 542 on the metal oxide 531. In such cases, the carrier concentration increases in the region of the metal oxide 531 near the conductor 542, resulting in a low-resistance region.

[0513] Here, the region between the conductor 542a and the conductor 542b is formed superimposed on the opening of the insulator 580. This allows the conductor 560 to be positioned self-aligned between the conductor 542a and the conductor 542b.

[0514] The insulator 550 functions as a gate insulator. It is preferable that the insulator 550 be placed in contact with the upper surface of the metal oxide 531c. The insulator 550 can be silicon oxide, silicon oxynitride, silicon nitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable.

[0515] Similar to the insulator 524, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 550 is reduced. The film thickness of the insulator 550 is preferably 1 nm or more and 20 nm or less.

[0516] A metal oxide may be provided between the insulator 550 and the conductor 560. It is preferable that the metal oxide suppresses oxygen diffusion from the insulator 550 to the conductor 560. This suppresses the oxidation of the conductor 560 by oxygen in the insulator 550.

[0517] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 550, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By making the gate insulator a laminated structure of insulator 550 and the metal oxide, a laminated structure that is stable against heat and has a high dielectric constant can be made. Therefore, it becomes possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it becomes possible to thin the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator.

[0518] Specifically, metal oxides containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used. In particular, it is preferable to use insulators containing oxides of aluminum, hafnium, or both, such as aluminum oxide, hafnium oxide, or oxides containing aluminum and hafnium (hafnium aluminate).

[0519] Although the conductor 560 is shown as a two-layer structure in Figure 79, it may also be a single-layer structure or a laminated structure of three or more layers.

[0520] It is preferable to use a conductor 560a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0521] The conductor 560a has the function of suppressing oxygen diffusion, thereby preventing the conductor 560b from oxidizing due to oxygen contained in the insulator 550 and reducing its conductivity. It is preferable to use, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide as a conductive material that has the function of suppressing oxygen diffusion.

[0522] The conductor 560b is preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Furthermore, since the conductor 560 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. The conductor 560b may also be in a laminated structure; for example, it may be a laminated structure of titanium or titanium nitride and the above-mentioned conductive material.

[0523] As shown in Figures 79A and 79C, in the region of the metal oxide 531b that does not overlap with the conductor 542, in other words, in the channel-forming region of the metal oxide 531, the side surface of the metal oxide 531 is covered by the conductor 560. This makes it easier to apply the electric field of the conductor 560, which functions as the first gate electrode, to the side surface of the metal oxide 531. Therefore, the on-current of the transistor 500 can be increased and the frequency characteristics can be improved.

[0524] The insulator 554, like the insulator 514, preferably functions as a barrier insulating film that suppresses the ingress of impurities such as water or hydrogen into the transistor 500 from the insulator 580 side. For example, it is preferable that the insulator 554 has lower hydrogen permeability than the insulator 524. Furthermore, as shown in Figures 79B and 79C, it is preferable that the insulator 554 is in contact with the side surface of the metal oxide 531c, the top and side surfaces of the conductor 542a, the top and side surfaces of the conductor 542b, the side surfaces of the metal oxide 531a and metal oxide 531b, and the top surface of the insulator 524. With this configuration, it is possible to suppress the ingress of hydrogen contained in the insulator 580 into the metal oxide 531 from the top or side surfaces of the conductor 542a, conductor 542b, metal oxide 531a, metal oxide 531b, and the insulator 524.

[0525] Furthermore, it is preferable that the insulator 554 has the function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule) (i.e., it is difficult for the above-mentioned oxygen to permeate through it). For example, it is preferable that the insulator 554 has lower oxygen permeability than the insulator 580 or the insulator 524.

[0526] The insulator 554 is preferably deposited using a sputtering method. By depositing the insulator 554 using a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the vicinity of the region of the insulator 524 that is in contact with the insulator 554. This allows oxygen to be supplied from this region to the metal oxide 531 via the insulator 524. Here, the insulator 554 has a function to suppress upward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 531 to the insulator 580. In addition, the insulator 522 has a function to suppress downward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 531 to the substrate side. In this way, oxygen is supplied to the channel formation region of the metal oxide 531. This reduces oxygen deficiency in the metal oxide 531 and suppresses normally-on formation of the transistor.

[0527] As the insulator 554, for example, an insulator containing an oxide of one or both of aluminum and hafnium may be formed as a film. It is preferable to use aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) as the insulator containing an oxide of one or both of aluminum and hafnium.

[0528] The insulator 524, insulator 550, and metal oxide 531 are covered by the hydrogen barrier insulator 554, so the insulator 580 is separated from the insulator 524, metal oxide 531, and insulator 550 by the insulator 554. This prevents impurities such as hydrogen from entering the transistor 500 from the outside, thus providing the transistor 500 with good electrical characteristics and reliability.

[0529] The insulator 580 is provided on the insulator 524, the metal oxide 531, and the conductor 542 via the insulator 554. For example, the insulator 580 is preferably silicon oxide, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, or porous silicon oxide. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and porous silicon oxide are particularly preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0530] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 580 is reduced. Furthermore, the upper surface of the insulator 580 may be flattened.

[0531] The insulator 574 preferably functions as a barrier insulating film that suppresses the incorporation of impurities such as water or hydrogen into the insulator 580 from above, similar to the insulator 514. For example, the insulator 574 can be an insulator that can be used for the insulator 514, insulator 554, etc.

[0532] It is preferable to provide an insulator 581, which functions as an interlayer film, on top of the insulator 574. It is preferable that the insulator 581, like the insulator 524, has a reduced concentration of impurities such as water or hydrogen in the film.

[0533] Conductors 545a and 545b are placed in the openings formed in insulators 581, 574, 580, and 554. Conductors 545a and 545b are provided facing each other with conductor 560 in between. The height of the upper surfaces of conductors 545a and 545b may be on the same plane as the upper surface of insulator 581.

[0534] Furthermore, an insulator 541a is provided in contact with the inner wall of the opening of insulators 581, 574, 580, and 554, and a first conductive portion of conductor 545a is formed in contact with its side surface. Conductor 542a is located in at least a portion of the bottom of the opening, and conductor 545a is in contact with conductor 542a. Similarly, an insulator 541b is provided in contact with the inner wall of the opening of insulators 581, 574, 580, and 554, and a first conductive portion of conductor 545b is formed in contact with its side surface. Conductor 542b is located in at least a portion of the bottom of the opening, and conductor 545b is in contact with conductor 542b.

[0535] It is preferable that the conductors 545a and 545b are made of conductive materials mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors 545a and 545b may be arranged in a laminated structure.

[0536] When the conductor 545 is in a laminated structure, it is preferable to use a conductor that has the function of suppressing the diffusion of impurities such as water or hydrogen, as described above, for the conductors that come into contact with the metal oxide 531a, metal oxide 531b, conductor 542, insulator 554, insulator 580, insulator 574, and insulator 581. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or in a laminate. By using such a conductive material, it is possible to suppress the absorption of oxygen added to the insulator 580 by the conductors 545a and 545b. In addition, it is possible to suppress the mixing of impurities such as water or hydrogen from the layer above the insulator 581 into the metal oxide 531 through the conductors 545a and 545b.

[0537] For insulators 541a and 541b, for example, insulators that can be used for insulator 554 may be used. Since insulators 541a and 541b are provided in contact with insulator 554, it is possible to suppress the mixing of impurities such as water or hydrogen from insulator 580, etc., into the metal oxide 531 through conductors 545a and 545b. Furthermore, it is possible to suppress the absorption of oxygen contained in insulator 580 into conductors 545a and 545b.

[0538] Although not shown in the figures, conductors that function as wiring may be placed in contact with the upper surfaces of conductor 545a and conductor 545b. The conductors that function as wiring are preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. The conductors may also be in a laminated structure, for example, a laminate of titanium or titanium nitride and the conductive material. The conductors may be formed to be embedded in an opening provided in the insulator.

[0539] <Materials that make up a transistor> This section describes the constituent materials that can be used in transistors.

[0540] [substrate] As a substrate for forming the transistor 500, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates), and resin substrates. Examples of semiconductor substrates include silicon, germanium, and other semiconductor substrates, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Furthermore, there are semiconductor substrates having insulating regions within the aforementioned semiconductor substrates, such as SOI (Silicon On Insulator) substrates. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Alternatively, there are substrates having metal nitrides, substrates having metal oxides, etc. Furthermore, there are substrates on which a conductor or semiconductor is provided on an insulating substrate, substrates on which a conductor or insulator is provided on a semiconductor substrate, and substrates on which a semiconductor or insulator is provided on a conductive substrate. Alternatively, substrates on which elements are provided may be used. Elements provided on a substrate include capacitive elements, resistive elements, switch elements, light-emitting elements, and memory elements.

[0541] [Insulator] Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, metal oxides, metal oxidized nitrides, and metal nitride oxides.

[0542] For example, as transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material for the insulator that functions as the gate insulator, it is possible to lower the voltage during transistor operation while maintaining the physical film thickness. On the other hand, by using a material with a low dielectric constant for the insulator that functions as the interlayer film, parasitic capacitance between wiring can be reduced. Therefore, it is best to select the material according to the function of the insulator.

[0543] Examples of insulators with high dielectric constants include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxiditrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxiditrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0544] Examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with voids, or resins.

[0545] Transistors using oxide semiconductors can have their electrical characteristics stabilized by surrounding them with an insulator (insulator 514, insulator 522, insulator 554, and insulator 574, etc.) that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a multilayer structure. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, metal nitrides such as aluminum nitride, titanium aluminum nitride, titanium nitride, silicon oxide, or silicon nitride can be used.

[0546] The insulator that functions as a gate insulator is preferably an insulator that has a region containing oxygen that is desorbed by heating. For example, by having a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is desorbed by heating is in contact with the metal oxide 531, the oxygen deficiency of the metal oxide 531 can be compensated for.

[0547] [conductor] It is preferable to use a metallic element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., as a conductor, or an alloy containing the above metallic elements, or an alloy combining the above metallic elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Alternatively, semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements like phosphorus, or silicides such as nickel silicide may be used.

[0548] Multiple conductors formed from the above materials may be used in a laminated structure. For example, a laminated structure may be formed by combining a material containing the aforementioned metal element with a conductive material containing oxygen. Alternatively, a laminated structure may be formed by combining a material containing the aforementioned metal element with a conductive material containing nitrogen. Furthermore, a laminated structure may be formed by combining a material containing the aforementioned metal element with a conductive material containing oxygen and a conductive material containing nitrogen.

[0549] Furthermore, when using a metal oxide for the channel formation region of a transistor, it is preferable to use a laminated structure for the conductor functioning as the gate electrode, which combines a material containing the aforementioned metal element with a conductive material containing oxygen. In this case, it is preferable to place the conductive material containing oxygen on the channel formation region side. By placing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is more easily supplied to the channel formation region.

[0550] In particular, it is preferable to use a conductive material containing metal elements and oxygen contained in the metal oxide in which the channel is formed as the conductor that functions as the gate electrode. Alternatively, conductive materials containing the aforementioned metal elements and nitrogen may be used. For example, conductive materials containing nitrogen such as titanium nitride and tantalum nitride may be used. In addition, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon-doped indium tin oxide may be used. In addition, indium gallium zinc oxide containing nitrogen may be used. By using such materials, it may be possible to capture hydrogen contained in the metal oxide in which the channel is formed. Alternatively, it may be possible to capture hydrogen that is mixed in from an external insulator or the like.

[0551] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0552] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0553] (Embodiment 12) This embodiment describes metal oxides (hereinafter also referred to as oxide semiconductors) that can be used in the OS transistor described in the above embodiment.

[0554] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 80A. Figure 80A is a diagram illustrating the classification of crystal structures in oxide semiconductors, specifically IGZO (a metal oxide containing In, Ga, and Zn).

[0555] As shown in Figure 80A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous materials. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite) (excluding single crystal and polycrystal). Note that single crystal, polycrystal, and completely amorphous materials are excluded from the "Crystalline" classification. "Crystal" includes single crystal and polycrystal materials.

[0556] The structure within the thick frame shown in Figure 80A represents an intermediate state between "Amorphous" and "Crystal," and belongs to a new boundary region (New crystalline phase). In other words, this structure can be described as being completely different from "Crystal" or the energetically unstable "Amorphous."

[0557] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 80B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or the Seemann-Bohlin method. Hereafter, the XRD spectrum obtained by the GIXD measurement shown in Figure 80B will simply be referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 80B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 80B is 500 nm.

[0558] As shown in Figure 80B, the XRD spectrum of the CAAC-IGZO film shows a peak indicating clear crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows a peak indicating c-axis orientation near 2θ=31°. As shown in Figure 80B, the peak near 2θ=31° is asymmetrical with respect to the angle at which the peak intensity was detected.

[0559] The crystal structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed using nano-beam electron diffraction (NBED). The diffraction pattern of a CAAC-IGZO film is shown in Figure 80C. Figure 80C shows the diffraction pattern observed by NBED with the electron beam incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 80C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. Furthermore, in nano-beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0560] As shown in Figure 80C, the diffraction pattern of the CAAC-IGZO film shows multiple spots indicating c-axis orientation.

[0561] [Structure of oxide semiconductors] Note that when focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in Figure 80A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors also include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductors), amorphous oxide semiconductors, etc.

[0562] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0563] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0564] Each of the multiple crystalline regions described above is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of a single minute crystal, the maximum diameter of that crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0565] In In-M-Zn oxide (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. The In layer may also contain element M. The In layer may also contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM images.

[0566] When structural analysis of a CAAC-OS film is performed using an XRD instrument, for example, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0567] For example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0568] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to factors such as the non-dense arrangement of oxygen atoms in the ab-plane direction and the change in interatomic bond distances due to the substitution of metal atoms.

[0569] A crystal structure in which clear grain boundaries are observed is called a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and field-effect mobility. Therefore, CAAC-OS, which does not exhibit clear grain boundaries, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. In addition, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more effectively than In oxide.

[0570] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities and / or the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0571] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS and amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0572] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. In other words, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0573] [Oxide semiconductor configuration] Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0574] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0575] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0576] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0577] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0578] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0579] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0580] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to give CAC-OS a switching function (on / off function). In other words, CAC-OS has conductive function in part of the material, insulating function in part of the material, and semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I) can be achieved. on This enables high field-effect mobility (μ) and good switching operation.

[0581] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0582] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0583] By using the above-mentioned oxide semiconductor in transistors, it is possible to realize transistors with high field-effect mobility. Furthermore, it is possible to realize highly reliable transistors.

[0584] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO") as the semiconductor layer in which the channel is formed. Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used as the semiconductor layer.

[0585] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor, the impurity concentration in the oxide semiconductor should be reduced to lower the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0586] High-purity intrinsic or substantially high-purity intrinsic oxide semiconductors have a low defect level density, which may result in a low trap level density.

[0587] Charges trapped in the trap levels of oxide semiconductors can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high density of trap levels may exhibit unstable electrical properties.

[0588] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0589] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0590] In oxide semiconductors, the presence of silicon and / or carbon, which are Group 14 elements, leads to the formation of defect levels in the oxide semiconductor. Therefore, the concentrations of silicon and carbon in the oxide semiconductor and the concentrations of silicon and carbon near the interface with the oxide semiconductor (concentrations obtained by SIMS) are 2 × 10⁻¹⁰. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0591] When alkali metals or alkaline earth metals are present in oxide semiconductors, they can form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0592] In oxide semiconductors, the presence of nitrogen generates electrons, which act as carriers, increasing the carrier concentration and making it easier for the semiconductor to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to exhibit normally-on characteristics. Alternatively, the presence of nitrogen in oxide semiconductors can lead to the formation of trap levels. This can result in unstable electrical properties of the transistor. Therefore, the nitrogen concentration in oxide semiconductors obtained by SIMS should be set to 5 × 10⁻¹⁰. 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0593] Hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, potentially creating oxygen vacancies. When hydrogen fills these vacancies, electrons, which act as carriers, can be generated. Furthermore, some of the hydrogen can combine with oxygen bonded to metal atoms to generate electrons. Therefore, transistors using oxide semiconductors containing hydrogen tend to exhibit normally-on characteristics. For this reason, it is preferable to reduce the hydrogen content in oxide semiconductors as much as possible. Specifically, in oxide semiconductors, the hydrogen concentration obtained by SIMS should be 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0594] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0595] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments and examples.

[0596] (Embodiment 13) This embodiment describes electronic equipment to which a semiconductor device according to one aspect of the present invention can be applied.

[0597] A semiconductor device according to one aspect of the present invention can be applied to the display unit of an electronic device. Therefore, it is possible to realize an electronic device with high display quality, or an extremely high-definition electronic device, or a highly reliable electronic device.

[0598] Electronic devices using a semiconductor device according to one aspect of the present invention include televisions, display devices such as monitors, lighting devices, desktop or notebook personal computers, word processors, and DVDs (Digital Versatile). Examples include image playback devices that play still images or videos stored on recording media such as discs, portable CD players, radios, tape recorders, headphone stereos, stereos, desk clocks, wall clocks, cordless telephone handsets, transceivers, car phones, mobile phones, personal digital assistants, tablet devices, portable game consoles, fixed game machines such as pachinko machines, calculators, electronic organizers, e-book readers, electronic translators, voice input devices, video cameras, digital still cameras, electric shavers, high-frequency heating devices such as microwave ovens, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioning equipment such as air conditioners, humidifiers, and dehumidifiers, dishwashers, dish dryers, clothes dryers, futon dryers, electric refrigerators, electric freezers, electric refrigerator-freezers, DNA storage freezers, flashlights, tools such as chainsaws, smoke detectors, and medical equipment such as dialysis machines. Furthermore, industrial equipment such as guide lights, traffic lights, conveyor belts, elevators, escalators, industrial robots, power storage systems, and energy storage devices for power leveling and smart grids can also be included in the category of electronic equipment. In addition, mobile devices propelled by engines using fuel or electric motors using electricity from energy storage devices may also be included in the category of electronic equipment. Examples of such mobile devices include electric vehicles (EVs), hybrid vehicles (HVs) that combine internal combustion engines and electric motors, plug-in hybrid vehicles (PHVs), tracked vehicles in which the tires and wheels of these vehicles are replaced with tracks, motorized bicycles including electric assist bicycles, motorcycles, electric wheelchairs, golf carts, small or large vessels, submarines, helicopters, aircraft, rockets, artificial satellites, space probes, planetary probes, and spacecraft.

[0599] An electronic device according to one aspect of the present invention may have a secondary battery, and it is preferable that the secondary battery can be charged using contactless power transmission.

[0600] Examples of secondary batteries include lithium-ion batteries, nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air batteries, nickel-zinc batteries, and silver-zinc batteries.

[0601] An electronic device according to one aspect of the present invention may have an antenna. By receiving signals with the antenna, the display unit can display images and information. Furthermore, if the electronic device has an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0602] An electronic device according to one aspect of the present invention may have sensors (including those with functions to measure force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0603] An electronic device according to one aspect of the present invention can have various functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date or time, a function to execute various software (programs), a wireless communication function, a function to read programs or data recorded on a recording medium, and so on.

[0604] Furthermore, electronic devices having multiple display units may have functions such as displaying image information primarily on one part of the display unit and text information primarily on another part, or displaying a three-dimensional image by displaying images that take parallax into account on multiple display units. Furthermore, electronic devices having an image receiving unit may have functions such as capturing still images or moving images, automatically or manually correcting captured images, saving captured images to a recording medium (external or built into the electronic device), and displaying captured images on a display unit. It should be noted that the functions of an electronic device according to one aspect of the present invention are not limited to these, and it may have a variety of functions.

[0605] A semiconductor device according to one aspect of the present invention can display high-definition images. Therefore, it can be suitably used in portable electronic devices, wearable electronic devices, and e-book readers. For example, it can be suitably used in xR devices such as VR devices or AR devices.

[0606] Figure 81A shows the external appearance of the camera 8000 with the viewfinder 8100 attached.

[0607] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, a shutter button 8004, etc. A detachable lens 8006 is also attached to the camera 8000. The lens 8006 and the housing of the camera 8000 may be integrated into a single unit.

[0608] Camera 8000 can take an image by pressing the shutter button 8004 or by touching the display unit 8002, which functions as a touch panel.

[0609] The housing 8001 has a mount with electrodes, and in addition to the viewfinder 8100, a strobe device and the like can be connected to it.

[0610] The viewfinder 8100 includes a housing 8101, a display unit 8102, buttons 8103, etc.

[0611] The housing 8101 is attached to the camera 8000 by a mount that engages with the camera 8000's mount. The viewfinder 8100 can display images and other data received from the camera 8000 on the display unit 8102.

[0612] Button 8103 functions as a power button, etc.

[0613] A semiconductor device according to one aspect of the present invention can be applied to the display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100. The viewfinder 8100 may be built into the camera 8000.

[0614] Figure 81B shows the external appearance of the head-mounted display 8200.

[0615] The head-mounted display 8200 includes a mounting section 8201, lenses 8202, a main unit 8203, a display unit 8204, a cable 8205, etc. The mounting section 8201 also has a built-in battery 8206.

[0616] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 8203 is equipped with a wireless receiver and can display received video information on display unit 8204. In addition, main unit 8203 is equipped with a camera and can use information about the user's eyeball or eyelid movements as an input means.

[0617] Furthermore, the attachment unit 8201 may be provided with multiple electrodes at a position that touches the user, capable of detecting the current flowing in accordance with the user's eye movements, and may have a function to recognize the user's gaze. It may also have a function to monitor the user's pulse rate based on the current flowing through the electrodes. In addition, the attachment unit 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function to display the user's biometric information on the display unit 8204, or a function to change the image displayed on the display unit 8204 in accordance with the user's head movements.

[0618] A semiconductor device according to one aspect of the present invention can be applied to the display unit 8204.

[0619] Figures 81C to 81E show the external appearance of the head-mounted display 8300. The head-mounted display 8300 includes a housing 8301, a display unit 8302, a band-shaped fixing device 8304, and a pair of lenses 8305.

[0620] The user can view the display on the display unit 8302 through the lens 8305. It is preferable to position the display unit 8302 in a curved shape, as this allows the user to experience a greater sense of presence. Furthermore, by viewing different images displayed in different areas of the display unit 8302 through the lens 8305, three-dimensional display using parallax can be performed. Note that the configuration is not limited to a single display unit 8302; two display units 8302 may be provided, with one display unit for each of the user's eyes.

[0621] A semiconductor device according to one aspect of the present invention can be applied to the display unit 8302. The semiconductor device according to one aspect of the present invention can also achieve extremely high resolution. For example, even when the display is magnified and viewed using the lens 8305 as shown in Figure 81E, the pixels are difficult for the user to see. In other words, the display unit 8302 can be used to allow the user to view a highly realistic image.

[0622] Figure 81F shows the external appearance of a goggle-type head-mounted display 8400. The head-mounted display 8400 has a pair of housings 8401, a mounting part 8402, and a cushioning member 8403. A display unit 8404 and a lens 8405 are provided inside each of the pair of housings 8401. By displaying different images on the pair of display units 8404, a three-dimensional display using parallax can be performed.

[0623] The user can view the display unit 8404 through the lens 8405. The lens 8405 has a focus adjustment mechanism and its position can be adjusted according to the user's eyesight. The display unit 8404 is preferably a square or a horizontally elongated rectangle. This can enhance the sense of realism.

[0624] The mounting portion 8402 is preferably adjustable to the size of the user's face and has plasticity and elasticity to prevent it from slipping off. Furthermore, it is preferable that a part of the mounting portion 8402 has a vibration mechanism that functions as a bone conduction earphone. This eliminates the need for separate audio equipment such as earphones or speakers, allowing users to enjoy video and audio simply by wearing the device. The housing 8401 may also have a function to output audio data via wireless communication.

[0625] The mounting portion 8402 and the cushioning member 8403 are parts that come into contact with the user's face (forehead, cheeks, etc.). By ensuring that the cushioning member 8403 is in close contact with the user's face, light leakage can be prevented, thereby enhancing the sense of immersion. It is preferable to use a soft material for the cushioning member 8403 so that it adheres closely to the user's face when the user wears the head-mounted display 8400. For example, materials such a...

Claims

1. It comprises first to eighth transistors, first to third capacitors, and a display element. The gate of the first transistor and the gate of the sixth transistor are electrically connected to the first wiring. The gates of the third transistor and the fourth transistor are electrically connected to the second wiring. The gate of the seventh transistor is electrically connected to the third wiring, The gate of the eighth transistor is electrically connected to the fourth wiring, Either the source or drain of the first transistor is electrically connected to the fifth wiring, The source or drain of the first transistor is electrically connected to the gate of the second transistor, the source or drain of the third transistor, and one terminal of the first capacitor. Either the source or the drain of the second transistor is electrically connected to the sixth wiring, Either the source or drain of the fourth transistor is electrically connected to the sixth wiring, The source or drain of the fourth transistor is electrically connected to one terminal of the second capacitor. The other source or drain of the second transistor is electrically connected to the other source or drain of the third transistor, the other terminal of the first capacitor, the other terminal of the second capacitor, one source or drain of the fifth transistor, and one source or drain of the sixth transistor. Either the source or the drain of the seventh transistor is electrically connected to the sixth wiring, The gate of the fifth transistor is electrically connected to the other terminal of the source or drain of the seventh transistor, the other terminal of the source or drain of the eighth transistor, and one terminal of the third capacitor. The other source or drain of the sixth transistor and the other source or drain of the eighth transistor are electrically connected to the seventh wiring. The source or drain of the fifth transistor is electrically connected to the other terminal of the third capacitor and to one terminal of the indicator element. The other terminal of the display element is electrically connected to the eighth wiring. The second transistor is equipped with a back gate, The back gate is a semiconductor device that is electrically connected to the other terminal of the source or drain of the fourth transistor and one terminal of the second capacitor.

2. In claim 1, A semiconductor device in which at least one of the semiconductors in which the channel of the second transistor is formed and the semiconductor in which the channel of the fifth transistor is formed is an oxide semiconductor.

3. In claim 2, The oxide semiconductor comprises at least one of indium and zinc.

4. In claim 1, The aforementioned display element is a semiconductor device which is an organic EL element in a tandem structure.

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