Light-emitting element, method for manufacturing the same, and semiconductor substrate

Abstract

This light-emitting element is provided with: a first nitride semiconductor unit having a first surface perpendicular to a first crystal orientation; and a second nitride semiconductor unit having a second surface perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer positioned above the second surface, the second nitride semiconductor unit being positioned above the first surface.

Description

[Technical Field]

[0001] This disclosure relates to light-emitting elements, etc. [Background technology]

[0002] Light-emitting elements are being put into practical use in various fields. Depending on the application of the light-emitting element, light with polarization characteristics is required.

[0003] Due to constraints such as the materials or device structure constituting the light-emitting element, the light emitted from the light-emitting part (active layer) of the light-emitting element may not have stable polarization characteristics. For example, if a polarizing filter is provided outside the light-emitting element, the efficiency of light utilization is reduced. Methods for emitting light with polarizing characteristics from a light-emitting element are being investigated (see, for example, Non-Patent Document 1). [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Rami T. et. al., "Study and Application of Birefringent Nanoporous GaN in the Polarization Control of Blue Vertical-Cavity Surface-Emitting Lasers", American Chemical Society (ACS) Photonics April 2021, 8, 1041-1047 [Overview of the project]

[0005] A light-emitting element in one aspect of the present disclosure comprises a first nitride semiconductor portion having a first plane perpendicular to a first crystal orientation, and a second nitride semiconductor portion having a second plane perpendicular to a second crystal orientation different from the first crystal orientation, and a light-emitting layer located above the second plane, and located above the first plane.

[0006] A method for manufacturing a light-emitting element according to one aspect of the present disclosure includes the steps of: forming a first nitride semiconductor portion having a first plane perpendicular to a first crystal orientation; forming a second nitride semiconductor portion having a second plane perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second plane; and joining the first plane and the second plane. [Brief explanation of the drawing]

[0007] [Figure 1] This is a schematic diagram illustrating the polarization characteristics of light emitted from a light-emitting part containing a nitride semiconductor. [Figure 2] This is a schematic diagram illustrating a specific example of the birefringence characteristics of a multilayer mirror. [Figure 3] This is a schematic diagram illustrating an example of a light-emitting element to illustrate the findings of this disclosure. [Figure 4] This is a schematic diagram illustrating another example of a light-emitting element to illustrate the findings of this disclosure. [Figure 5] This is a schematic cross-sectional view showing the configuration of a light-emitting element in one embodiment of the present disclosure. [Figure 6] This flowchart shows an example of a method for manufacturing a light-emitting element in one embodiment of the present disclosure. [Figure 7] This is a block diagram showing an example of a manufacturing apparatus for a light-emitting element in one embodiment of the present disclosure. [Figure 8] This is a cross-sectional view along the X direction of a light-emitting substrate equipped with multiple light-emitting elements in Example 1. [Figure 9] This is a cross-sectional view along the Y direction of a light-emitting substrate having multiple light-emitting elements in Example 1. [Figure 10] This is a plan view of a light-emitting substrate equipped with multiple light-emitting elements in Example 1. [Figure 11] This is a partially enlarged cross-sectional view of the light-emitting element in Example 1. [Figure 12] This is a flowchart showing an example of a method for manufacturing a light-emitting element in Example 1. [Figure 13]It is a process cross-sectional view showing an example of the first partial process in the method for manufacturing a light-emitting element in Example 1. [Figure 14] It is a process plan view showing an example of the first partial process in the method for manufacturing a light-emitting element in Example 1. [Figure 15] It is a cross-sectional view showing a configuration example of a template substrate. [Figure 16] It is a cross-sectional view showing a method for forming a semiconductor part in Example 1. [Figure 17] It is a process cross-sectional view showing an example of the second partial process in the method for manufacturing a light-emitting element in Example 1. [Figure 18] It is a process cross-sectional view showing an example of the third partial process in the method for manufacturing a light-emitting element in Example 1. [Figure 19] It is a plan view showing an individualized light-emitting substrate in Example 1. [Figure 20] It is a process plan view showing an example of the first partial process in the method for manufacturing a light-emitting element in another configuration example of Example 1. [Figure 21] It is a process cross-sectional view showing an example of the third partial process in the method for manufacturing a light-emitting element in another configuration example of Example 1. [Figure 22] It is a partially enlarged cross-sectional view of another configuration example of the light-emitting element in Example 1. [Figure 23] It is a process cross-sectional view showing an example of the method for manufacturing a light-emitting element in another configuration example of Example 1. [Figure 24] It is a schematic diagram for explaining the light-emitting element in another configuration example of Example 1. [Figure 25] It is a plan view schematically showing the configuration of a laser element including the light-emitting element in Example 2. [Figure 26] It is a cross-sectional view schematically showing the configuration of a laser element including the light-emitting element in Example 2. [Figure 27] It is a schematic diagram showing the configuration of an electronic device in Example 3.

Embodiments for Carrying Out the Invention

[0008] 〔Definition of Terms, etc.〕 In the following, polarization refers to a bias in the distribution of the vibration directions of light. Sometimes, light with a bias in the distribution of vibration directions is also referred to as polarized light. The polarization direction is the direction perpendicular to the direction of light propagation in which the magnitude of the electric field vector is maximized. In the diagrams below, the polarization direction may be indicated by a dashed double-headed arrow. The polarization ratio can be defined as the ratio of (Is-Ic) to (Is+Ic), where Is is the maximum value of the electric field vector in the polarization direction and Ic is the maximum value of the electric field vector in the direction perpendicular to the direction of light propagation and the polarization direction. The larger the polarization ratio, the larger the proportion of linearly polarized light (the smaller the proportion of unpolarized light), and the stronger the linearly polarized characteristics.

[0009] Furthermore, in this specification, a substance having birefringence properties means that its refractive index differs depending on the polarization direction of the light incident on it. A substance having birefringence properties has the property that its reflectance differs depending on the polarization direction of the incident light, in relation to the above-mentioned difference in refractive index.

[0010] In this specification, Miller indices relating to crystal structure are expressed by adding a minus sign to the index, instead of using a bar above the index. In this specification, the formation of a film or layer by growing a certain material in the c-axis direction is sometimes referred to as c-plane growth (c-plane film formation), and this is the same for other axes as well. Furthermore, in this specification, when describing a component mainly consisting of a single crystal of a certain material, the crystal orientation in the crystal structure of the material forming the component may be simply described as "the a-axis direction of a certain component" for the sake of brevity.

[0011] [Summary of findings in this disclosure] In the following description, to facilitate understanding of the light-emitting element of this disclosure, we will first provide an overview of the findings of this disclosure. Specifically, we will first describe the polarization characteristics of light emitted from a light-emitting element containing a nitride semiconductor, and then describe the birefringence characteristics of a multilayer reflector included in a surface-emitting optical element. Finally, we will provide a general description of an optical element in one aspect of this disclosure.

[0012] (Polarization characteristics of light emitted from nitride semiconductors) Figure 1 is a schematic diagram illustrating the polarization characteristics of light emitted from a light-emitting part containing a nitride semiconductor. In the example shown in Figure 1, the nitride semiconductor is gallium nitride (GaN) having a hexagonal crystal structure. GaN typically has a wurtzite-type crystal structure.

[0013] The diagram labeled 1001 in Figure 1 is a schematic diagram of hexagonal HC, showing the coordinate axes a1-a3 and c. In the hexagonal HC crystal structure, there are crystal planes Pa (a-plane), Pc (c-plane), and Pm (m-plane), which are orthogonal to the a-axis (e.g., a3-axis), c-axis, and m-axis, respectively. The crystal plane Pm corresponds to the prismatic face in the hexagonal prismatic shape of hexagonal HC. The m-axis can have various directions, and Figure 1 shows the m-axis orthogonal to the a3-axis and c-axis. In practice, there are various equivalent planes for crystal planes Pa, Pc, and Pm. In the diagram labeled 1001 in Figure 1, each of a certain crystal plane Pa, Pc, and Pm is illustrated with different hatching patterns.

[0014] The diagram labeled 1002 in Figure 1 is a schematic diagram showing the light-emitting portion 100 in a light-emitting device, where the a-axis, m-axis, and c-axis are shown. The light-emitting portion 100 is typically an active layer, and in the diagram labeled 1002 in Figure 1, structures other than the light-emitting portion 100 in the light-emitting device are omitted and the diagram is schematically illustrated. In the light-emitting portion 100, the upper surface 10c perpendicular to the c-axis corresponds to the crystal plane Pc, the side surface 10a perpendicular to the a-axis corresponds to the crystal plane Pa, and the side surface 10m perpendicular to the m-axis corresponds to the crystal plane Pm. In the diagram labeled 1002 in Figure 1, the upper surface 10c, side surface 10a, and side surface 10m are each illustrated with different hatching patterns.

[0015] Generally, light emitted from semiconductor crystals by radiative recombination may have polarization characteristics corresponding to the crystal orientation. For example, if the light-emitting part 100 is formed from a GaN crystal, the following can be said.

[0016] The light emitted from the light-emitting part 100 has polarization characteristics parallel or perpendicular to the c-axis. The light emitted from the side 10m includes polarized LM11 having a polarization direction PD1 perpendicular to the c-axis (parallel to the a-axis) and polarized LM12 having a polarization direction PD2 parallel to the c-axis (perpendicular to the a-axis). The light emitted from the side 10a includes polarized LA13 having a polarization direction PD3 perpendicular to the c-axis (parallel to the m-axis) and polarized LA14 having a polarization direction PD4 parallel to the c-axis (perpendicular to the m-axis). The light emitted from the top surface 10c includes polarized LC15 having a polarization direction PD5 perpendicular to the c-axis. Since light is a transverse wave, waves with an oscillation direction parallel to the c-axis (so-called longitudinal waves) are not considered in the light emitted from the top surface 10c. Note that "parallel" as used here does not have to be parallel in the strict sense, and a deviation of about 5° from strict parallelism is permitted, and the term "parallel" is used in the same sense in the following description in this specification.

[0017] Typically, due to the band structure of the GaN crystal, polarized LM11 is more dominant than polarized LM12, and higher polarization ratios have been reported. Generally, due to practical advantages in terms of manufacturing cost and luminescence characteristics, the light-emitting portion 100 is often formed by c-plane growth. For example, in the case of an end-face emitting laser including the light-emitting portion 100, the side surface 10m can be suitably used as the light-emitting surface, and in this case, it can also be used for applications where polarization is required.

[0018] On the other hand, the polarization direction PD5 of the polarized LC15 from the upper surface 10c is not fixed in a specific direction due to the rotational symmetry of the GaN crystal structure. Therefore, when using light emission from the upper surface 10c in surface-emitting light-emitting devices such as vertical cavity surface-emitting lasers (VCSELs), it is difficult to stably emit polarization with a specific polarization direction. The c-plane is a polar plane, and GaN crystals formed by c-plane growth are affected by piezoelectric polarization, etc. Therefore, forming the light-emitting part by growing a semi-polar or non-polar plane (e.g., the m-plane) has also been considered, but there are currently many practical obstacles in terms of cost and mass production.

[0019] (Birefringence characteristics of multilayer mirrors) Generally, multilayer mirrors are used in surface-emitting light-emitting devices such as VCSEL elements. For example, distributed Bragg reflectors (DBRs), which are constructed by alternately growing m-planes of GaN and aluminum nitride (AlN) and stacking them, have been reported to have birefringence properties (see, for example, the references below). [DM Schaadt. et. al., "Polarization-dependent beam switch based on an M-plane GaN / AlN distributed Bragg reflector", APPLIED PHYSICS LETTERS 90, 231117 (2007)].

[0020] Figure 2 is a schematic diagram illustrating a specific example of birefringence characteristics in a multilayer mirror. The diagram labeled 2001 in Figure 2 is a schematic diagram of a hexagonal HC crystal, and is shown rotated 90° from the diagram labeled 1001 in Figure 1, with the a3 axis as the axis of rotation. In Figure 2, the a, m, and c coordinate axes corresponding to those in Figure 1 are shown for reference.

[0021] The diagram indicated by the symbol 2002 in Figure 2 is a schematic diagram illustrating the birefringence characteristics of a multilayer mirror RM when the m-plane is the reflective surface. The reflected light emitted from the outermost crystal plane Pm of the multilayer mirror RM practically has an intensity that is the sum of the reflected light from each of the multiple layers stacked in the thickness direction of the multilayer mirror RM.

[0022] The following can be said about the birefringence characteristics when polarized light LI1 and polarized light LI2 are incident perpendicularly to the crystal plane Pm. Here, polarized light LI1 and polarized light LI2 are linearly polarized, polarized light LI1 has a polarization direction perpendicular to the c-axis (parallel to the a-axis), and polarized light LI2 has a polarization direction parallel to the c-axis (perpendicular to the a-axis). Let LR1 be the reflected light corresponding to polarized light LI1, and LR2 be the reflected light corresponding to polarized light LI2. In the figure indicated by the symbol 2002 in Figure 2, an example is shown in which the wavelength of the incident light (polarized light LI1 and polarized light LI2) is changed so that it becomes longer from left to right on the paper.

[0023] The figure indicated by the symbol 2003 in Figure 2 is a table showing an example of the change in polarization reflectance when the wavelengths of the incident polarization LI1 and polarization LI2 are changed for a certain wavelength band. The polarization reflectance PR1 is defined as the ratio of the intensity of reflected light LR1 to the intensity of polarization LI1, and the polarization reflectance PR2 is defined as the ratio of the intensity of reflected light LR2 to the intensity of polarization LI2.

[0024] In the example shown in Figure 2, when the wavelengths of both polarization LI1 and polarization LI2 are relatively short, both polarization reflectances PR1 and PR2 are relatively low. As the wavelengths of polarization LI1 and polarization LI2 increase, the polarization reflectance PR1 becomes higher than that of polarization reflectance PR2, and the difference between polarization reflectances PR1 and PR2 (polarization reflectance difference) increases. Furthermore, as the wavelengths of polarization LI1 and polarization LI2 become even longer, both polarization reflectances PR1 and PR2 increase, and the polarization reflectance difference decreases. In the example shown in Figure 2, it can be said that the multilayer mirror RM has birefringence characteristics in which the polarization reflectance in the polarization direction perpendicular to the c-axis (parallel to the a-axis) is relatively high in a specific wavelength band.

[0025] (Regarding polarization control) Generally, when nitride semiconductors such as GaN are used in the light-emitting part, there are various manufacturing requirements to achieve high luminous efficiency. For example, reducing the defect density of GaN-based semiconductors is not easy, and there are also high demands on the physical properties of the growth substrate (and, from a practical standpoint, cost). In addition, surface-emitting light-emitting devices such as VCSEL elements generally have a manufacturing advantage in that a monolithic resonator can be formed on the growth substrate, allowing for chip inspection on the growth substrate. When manufacturing a VCSEL element "monolithically," for example, a semiconductor layer (light-emitting layer) can be formed on the growth substrate, an upper reflector and a lower reflector can be formed by a method including partial etching of the growth substrate, and then an electrode structure can be formed, thereby forming a large number of VCSEL resonator structures on the growth substrate.

[0026] Conventionally, in the development of technologies to control the polarization direction of surface-emitting light-emitting devices using nitride semiconductors such as GaN as the light-emitting portion, there have been constraints due to fixed ideas that assume monolithic manufacturing and inspection before device isolation, from the perspective of maintaining process advantages. Furthermore, there were constraints on the device structure, which assumed the use of high-quality nitride semiconductors with c-plane film deposition in the light-emitting portion in order to achieve high luminous efficiency. For example, the options for the underlying structure of the light-emitting portion (such as the growth substrate) were limited.

[0027] Therefore, the measures proposed so far for controlling the polarization direction are limited to, for example, interposing a polarization-selective layer between two reflectors located far apart from each other (e.g., multilayer reflectors), or introducing anisotropy into a part of the constituent material.

[0028] While investigating nitride semiconductor growth technology and semiconductor device technology, the inventors obtained new insights that allowed them to break away from the aforementioned preconceived notions.

[0029] Figure 3 is a schematic diagram showing an example of a light-emitting element to illustrate the findings of this disclosure. Figure 3 shows an example of a VCSEL element in which the light-emitting portion includes a GaN crystal. As shown in Figure 3, the light-emitting element 30 in this example has a lower reflective layer RL1 formed on a main substrate (first main substrate) MS, an upper reflective layer RL2 located above the lower reflective layer RL1, and a light-emitting portion LP located between the lower reflective layer RL1 and the upper reflective layer RL2. In Figure 3, for the sake of explanation, a gap is shown between the lower reflective layer RL1, the light-emitting portion LP, and the upper reflective layer RL2, but various layers may be interposed between them. Also, in Figure 3, in order to distinguish the coordinate axes, the coordinate axes relating to the lower reflective layer RL1 are designated as a, c, and m axes, and the coordinate axes relating to the light-emitting portion LP are designated as a', c', and m' axes.

[0030] The lower reflective layer RL1 is a DBR formed on the main substrate MS, for example by m-plane growth. In this case, the surface LMS on the light-emitting part LP side of the lower reflective layer RL1 in the stacking direction is the m-plane. The lower reflective layer RL1 can be designed to have desired reflectivity characteristics corresponding to the emission wavelength of the light-emitting part LP. Here, the reflectivity to unpolarized light such as natural light is called the basic reflectivity. Typically, DBRs have wavelength dependence of basic reflectivity. Therefore, the lower reflective layer RL1 is designed to have a high basic reflectivity in the wavelength range of light emitted from the light-emitting part LP. In addition, in the light-emitting element 30 of this disclosure, the lower reflective layer RL1 is designed to have the aforementioned birefringence characteristics with respect to the emission wavelength of the light-emitting part LP. In the example shown in Figure 3, the lower reflective layer RL1 has birefringence characteristics in which the polarization reflectivity in the polarization direction parallel to the a-axis is relatively higher than the polarization reflectivity in other polarization directions.

[0031] The light-emitting portion LP is formed, for example, by c-plane growth on a growth substrate, in which case the surface LPS in the stacking direction has a c-plane in its crystalline structure. The light-emitting portion LP may be transferred above the lower reflective layer RL1, separated from the growth substrate. A detailed method for manufacturing such a light-emitting element 30 will be described later. In the example shown in Figure 3, the a, c, and m axis directions of the lower reflective layer RL1 and the a', m', and c' axis directions of the light-emitting portion LP are parallel to each other.

[0032] The light-emitting element 30 may have an upper structure such as an upper reflective layer RL2 formed above the light-emitting part LP, and the upper reflective layer RL2 may be, for example, a double-brightened layer (DBR). In the example shown in Figure 3, the upper reflective layer RL2 does not need to have birefringence characteristics.

[0033] In the light-emitting element 30 described above, the lower reflective layer RL1 has the birefringence characteristics described above, so the polarization emitted from the light-emitting part LP in the planar direction (c' axis direction) and reflected by the lower reflective layer RL1 has a polarization direction in the a axis direction (a' axis direction) before laser oscillation. It was found that when laser oscillation occurs, the light-emitting element 30 can emit laser light LB with a specific polarization direction in the planar direction (a' axis direction in the example of Figure 3). Although the details are not yet clear, it is thought that in the state before laser oscillation, polarization with a polarization direction in the a' axis direction is preferentially amplified between the lower reflective layer RL1 and the upper reflective layer RL2, thus satisfying the oscillation conditions, while other polarization components do not satisfy the oscillation conditions because the reflectivity of the reflector with birefringence characteristics (lower reflective layer RL1 in the example above) is low. Once a polarization component that satisfies the oscillation conditions oscillates, the injected carriers are preferentially used for oscillation in that polarization component, so oscillation of other polarization components is further suppressed. As a result, the polarization that was most likely to oscillate before laser oscillation occurred (in the above example, polarization with a polarization direction in the a' axis direction) may have an even higher polarization ratio once laser oscillation occurs.

[0034] For the sake of explanation, the difference between the polarization reflectance in the polarization direction parallel to the a-axis and the polarization reflectance in the polarization direction parallel to the c-axis when light of a certain emission wavelength emitted from the light-emitting unit LP is reflected by the lower reflective layer RL1 is referred to as the polarization reflectance difference. The larger the polarization reflectance difference, the stronger the birefringence characteristics. The larger the polarization reflectance difference in the lower reflective layer RL1 for light of a certain emission wavelength emitted from the light-emitting unit LP, the higher the polarization ratio of the laser light LB emitted by the light-emitting element 30 can become. Furthermore, even if the polarization reflectance difference in the lower reflective layer RL1 is relatively small, the laser oscillation described above can occur, allowing laser light LB with a specific polarization direction to be emitted in the planar direction in the light-emitting element 30.

[0035] Although Figure 3 illustrates a single light-emitting element, multiple light-emitting elements may be arranged in a two-dimensional manner on the main substrate MS. By applying the inventors' developed technology, multiple high-quality light-emitting elements LP can be transferred onto the lower reflective layer RL1 while controlling the crystal orientation of the lower reflective layer RL1 and the crystal orientation of the light-emitting elements LP to a desired relationship. This allows for a two-dimensional arrangement of a laminate including the lower reflective layer RL1 and the light-emitting elements LP on the main substrate MS, enabling subsequent manufacturing processes to proceed on the main substrate MS. Furthermore, chip inspection can be performed on the main substrate MS before chip division. Therefore, the light-emitting elements of this disclosure can be manufactured without significantly compromising the process advantages of conventional VCSELs.

[0036] Figure 4 is a schematic diagram showing another example of a light-emitting element to illustrate the findings of this disclosure. As shown in Figure 4, in the light-emitting element 30 of this other example, the lower reflective layer RL1 has a crystal orientation rotated by 90° around the m axis compared to the example in Figure 3, and in this case, laser light LB having a polarization direction in the m' axis direction is emitted from the light-emitting element 30 in the planar direction.

[0037] In the examples shown in Figures 3 and 4, the polarization direction of the laser light LB emitted from the light-emitting element 30 in the planar direction corresponds to the orientation of the a-axis in the lower reflective layer RL1. In another example of the light-emitting element 30, the light-emitting part LP may be further rotated around the c' axis and positioned on the lower reflective layer RL1, in which case the laser light LB having a polarization direction between the a' axis and the m' axis may be emitted from the light-emitting element 30.

[0038] Furthermore, in the light-emitting element 30, the upper reflective layer RL2 may have birefringence properties, while the lower reflective layer RL1 may not. In this case, the polarization direction of the laser light LB emitted from the light-emitting element 30 in the planar direction can be controlled by the birefringence properties of the upper reflective layer RL2. Both the upper reflective layer RL2 and the lower reflective layer RL1 may have birefringence properties. In this case, they may be arranged so that the polarization directions with high polarization reflectance in the upper reflective layer RL2 and the lower reflective layer RL1 are aligned.

[0039] Furthermore, DBRs formed by a-plane growth may also possess birefringence properties. In nitride semiconductor crystals, the a-plane and m-plane can be considered equivalent in some respects. Therefore, similar to what is described above regarding DBRs formed by m-plane growth, polarization control can also be performed using DBRs formed by a-plane growth. For example, in the light-emitting element 30, the reflective surface of the lower reflective layer RL1 or the upper reflective layer RL2 may be the a-plane, and in this case, the polarization direction of the laser beam LB may be controlled by the birefringence properties of the a-plane of the lower reflective layer RL1 or the upper reflective layer RL2.

[0040] As described above, the light-emitting element in this example enables polarization control of the laser light LB emitted in the planar direction, and allows for stable emission of laser light LB having a required polarization direction.

[0041] The findings of this disclosure are that, in a light-emitting device containing a nitride semiconductor, the polarization characteristics (polarization direction) of light emitted in the planar direction from the light-emitting device can be changed by combining a light-emitting portion with a semiconductor layer having a different crystal orientation from the light-emitting portion in the stacking direction. This makes it possible to control the polarization characteristics (polarization direction) of light emitted in the planar direction from the light-emitting device relatively easily. In general, various constituent materials can be considered for the light-emitting portion, and the multilayer reflector can have various birefringence characteristics depending on the structure and constituent materials of the multilayer reflector. Even with such various combinations, it is possible to realize a light-emitting device that can stably emit polarization with a controlled polarization direction based on the findings of this disclosure.

[0042] [Light-emitting element] A light-emitting element in one embodiment of this disclosure will be described below with reference to the drawings. In one embodiment of this disclosure, an example in which the light-emitting element is a VCSEL element will be described, but the disclosure is not limited thereto and can be applied to surface-emitting light-emitting elements such as resonant cavity light-emitting diodes (RCLEDs). In this embodiment, a current-injection type light-emitting element will be described as an example, but the disclosure is not limited thereto and the light-emitting element of this disclosure may be a photo-excited type. Regarding the electrode structure of the light-emitting element 30, known technologies can be appropriately selected and used in accordance with the mounting form on the circuit board. Known technologies can also be appropriately selected and used for the excitation structure of the light-emitting element 30. Furthermore, in the following, the a, c, and m axes relating to the lower reflective layer RL1 and the a', c', and m' axes relating to the light-emitting part LP will be used as appropriate in the description, and these will also be illustrated in the drawings as appropriate.

[0043] Figure 5 is a schematic cross-sectional view showing the configuration of a light-emitting element in one embodiment of the present disclosure. As shown in Figure 5, the light-emitting element 30 in this embodiment comprises a first nitride semiconductor portion NS1 having a first surface SF1 perpendicular to a first crystal orientation CO1, and a second nitride semiconductor portion NS2 located above the first surface SF1, having a second surface SF2 perpendicular to a second crystal orientation CO2 different from the first crystal orientation CO1, and a light-emitting portion LP located above the second surface SF2. The second nitride semiconductor portion NS2 includes a base portion 8 and an upper layer portion 9 located above the base portion 8 and including the light-emitting portion LP. The first surface SF1 is the surface of the first nitride semiconductor portion NS1 located on the side of the second nitride semiconductor portion NS2, and the second surface SF2 is the surface of the second nitride semiconductor portion NS2 located on the side of the first nitride semiconductor portion NS1. The first surface SF1 and the second surface SF2 of the light-emitting element 30 may be joined to each other. The first nitride semiconductor portion NS1 may be a first nitride semiconductor layer, the second nitride semiconductor portion NS2 may be a second nitride semiconductor layer, the light-emitting portion LP may be a light-emitting layer, and the base portion 8 may be layered.

[0044] The light-emitting element 30 may have a main substrate MS below the first nitride semiconductor portion NS1. In the light-emitting element 30, the first nitride semiconductor portion NS1 may be a lower reflective layer (corresponding to the lower reflective layer RL1 mentioned above). The light-emitting element 30 may also have an upper reflective layer RL2 above the light-emitting portion LP. The light-emitting element 30 may have a junction BP between the first surface SF1 and the second surface SF2. This junction BP will be described in more detail later. The direction from the main substrate MS toward the first nitride semiconductor portion NS1 is defined as the "upward direction".

[0045] In the example shown in Figure 5, the light-emitting element 30 may have an anode EA on the upper layer 9 and a cathode EC on the base 8 in the portion where the upper layer 9 is not located (the exposed portion). The upper reflective layer RL2, anode EA, light-emitting portion LP, base portion 8, and first nitride semiconductor portion NS1 may overlap each other in a plan view. Overlapping two components in a plan view means that at least a part of one component overlaps with the other component when viewed in the direction normal to the main substrate MS (including perceptual viewing).

[0046] The first nitride semiconductor section NS1 and the second nitride semiconductor section NS2 may each contain a nitride semiconductor as their main material. The nitride semiconductor may be, for example, Al x Ga y In z It can be expressed as N(0≦x≦1;0≦y≦1;0≦z≦1;x+y+z=1), and specific examples include GaN-based semiconductors, AlN (aluminum nitride), InAlN (indium aluminum nitride), and InN (indium nitride). GaN-based semiconductors are semiconductors containing gallium atoms (Ga) and nitrogen atoms (N), and typical examples include GaN, AlGaN, AlGaInN, and InGaN. The base portion 8 may be doped (for example, n-type including a donor).

[0047] The light-emitting element 30 may have a first nitride semiconductor portion NS1 and a second nitride semiconductor portion NS2, each containing a GaN-based semiconductor. The first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may each have a hexagonal HC crystal structure (see Figures 1 and 2). The second nitride semiconductor portion NS2 may contain a c-plane GaN-based semiconductor layer. In this specification, a c-plane GaN-based semiconductor layer means a GaN-based semiconductor layer formed by c-plane film deposition.

[0048] In the light-emitting element 30 of this embodiment, the first surface SF1 may be an m-plane. The first nitride semiconductor portion NS1, whose first surface SF1 is an m-plane, has a first crystal orientation CO1 parallel to the m-axis and, as described above, exhibits birefringence with respect to light propagating in the direction of the first crystal orientation CO1. The first nitride semiconductor portion NS1 functions as a lower reflective layer and may be, for example, a DBR having birefringent properties. The first nitride semiconductor portion NS1 may include a plurality of nitride crystal layers with different refractive indices. The first nitride semiconductor portion NS1 may also include an amorphous nitride layer. The amorphous nitride layer does not need to have birefringent properties.

[0049] In the light-emitting element 30 of this embodiment, light generated in the light-emitting section LP is reflected by the first nitride semiconductor section NS1 and the upper reflective layer RL2, causing a round trip and resulting in laser oscillation. In the light-emitting element 30, laser light is emitted from the side with relatively low reflectivity (here, the upper reflective layer RL2 side). The light-emitting element 30 can also emit relatively weak laser light from the side with relatively high reflectivity (here, the lower reflective layer RL1 side). The upper reflective layer RL2 may be, for example, a DBR containing multiple dielectric layers. In the following explanation, for the sake of clarity, the direction of light propagation between the first nitride semiconductor section NS1 and the upper reflective layer RL2 will be described as the direction perpendicular to the first surface SF1 of the first nitride semiconductor section NS1. Even if there is a slight deviation in the direction of light propagation, the birefringence characteristics will not change significantly. Furthermore, in the light-emitting element 30, the material, layered structure, etc. of the first nitride semiconductor section NS1 are adjusted (designed) to have the required polarization reflectivity characteristics (birefringence characteristics) corresponding to the emission wavelength of the light-emitting section LP.

[0050] In the light-emitting element 30 of this embodiment, the light (reflected light) L11 traveling from the first surface SF1 to the second surface SF2 of the first nitride semiconductor part NS1 has a specific polarization direction with respect to the first crystal orientation CO1. For example, in the light-emitting element 30, the first crystal orientation CO1 is in the m-axis direction, and the specific polarization direction of the light (reflected light) L11 from the first surface SF1 is in the a-axis direction of the first nitride semiconductor part NS1. In the light-emitting element 30, the light (reflected light) L11 traveling from the first surface SF1 to the second surface SF2 may have a polarization ratio of more than 50% (for example, a polarization ratio of 80% or more).

[0051] In the light-emitting element 30 of this embodiment, the second surface SF2 of the second nitride semiconductor part NS2 may be a -c plane. The light-emitting part LP may be a GaN-based semiconductor layer having a c plane parallel to the second surface SF2. The light-emitting part LP may be an active layer. The upper layer 9 including the light-emitting part LP may be formed on the base part 8 by epitaxial growth. If the second surface SF2 is a -c plane, the second nitride semiconductor part NS2 may be formed by c-plane growth. The second surface SF2 may be a c plane. For the entire second nitride semiconductor part NS2, the a', c', and m' axes relating to the light-emitting part LP can be used in common. The a, c, and m axes relating to the first nitride semiconductor part NS1 are the <11-20> axes of the nitride semiconductor, respectively. <0001> The axes may be the <1-100> axis. The same applies to the a', c', and m' axes relating to the light-emitting part LP (second nitride semiconductor part NS2).

[0052] Herein, using the light-emitting element 30 in one embodiment as an example, the findings of this disclosure can be summarized as follows. Generally, in a VCSEL that emits laser light from the c-plane, laser light having a polarization ratio (ratio of linear polarization) can be obtained, but since the polarization direction is not determined with respect to the crystal orientation, it is difficult to use as a linearly polarized laser from a design perspective. In this situation, it has been found that the light produced when the light emitted from the c-plane of the light-emitting part LP is reflected by the m-plane of the first nitride semiconductor part NS1 which has birefringence characteristics, and the light (reflected light) L11 that is directed toward the c-plane of the light-emitting part LP in a direction along the m-axis of the first nitride semiconductor part NS1 has a polarization ratio (greater than 0), and its polarization direction can be a direction determined with respect to the crystal orientation of the first nitride semiconductor part NS1 (a specific direction). In this embodiment, by combining c-plane emission and m-plane reflection, it is possible to obtain laser light with a high polarization ratio (e.g., 80% or more), a determined polarization direction (e.g., in the a-axis direction of the first nitride semiconductor part NS1), and that is easy to use as a linearly polarized laser from a design perspective.

[0053] In the example shown in Figure 5, the stacking direction of the second nitride semiconductor portion NS2 is parallel to the c' axis. The second nitride semiconductor portion NS2 has the second crystal orientation CO2 parallel to the c' axis, and as mentioned above, does not exhibit birefringence with respect to light traveling in the direction of the second crystal orientation CO2.

[0054] In the example shown in Figure 5, the reflected light L11 from the first surface SF1 has a polarization direction in the a-axis direction (the magnitude of the electric field vector in the a-axis direction is relatively larger than that of the electric field vectors in other directions), which allows the polarization direction of the light emitted from the light-emitting unit LP to be guided in the a-axis direction (m'-axis direction in the light-emitting unit LP). As a result, laser light LB with a polarization direction in the m'-axis direction is emitted from the light-emitting unit 30 in the planar direction. Therefore, the light-emitting unit 30 can be made capable of controlling the polarization of the laser light LB emitted in the planar direction.

[0055] Specific examples of the light-emitting element 30 in this embodiment will be described later, but as seen above, the light-emitting element 30 can have various configurations. A general explanation is as follows.

[0056] In one example configuration, the light-emitting element 30 may have a first surface SF1 that is semipolar or nonpolar (nonpolar surface). Because the first surface SF1 is semipolar or nonpolar and the first nitride semiconductor part NS1 has birefringence properties, the reflected light L11 from the first surface SF1 may have a specific polarization direction. For example, if the first nitride semiconductor part NS1 has a hexagonal HC crystal structure, the semipolar surface is a surface having a plane orientation oblique to the c-axis of the hexagonal HC. In practice, there are various surfaces that can be semipolar, such as the (11-22) plane and the (1-101) plane. The nonpolar surface is a surface having a plane orientation perpendicular to the c-plane of the hexagonal HC, such as the m-plane or a-plane.

[0057] In one example of the light-emitting element 30, the first surface SF1 may be an m-plane or an a-plane. For example, if the first crystal orientation CO1 is in the a-axis direction (the first surface SF1 is an a-plane), the specific polarization direction of the reflected light L11 from the first surface SF1 may be in the m-axis direction of the first nitride semiconductor part NS1. The first nitride semiconductor part NS1 and the second nitride semiconductor part NS2 may have a crystal structure different from that of hexagonal HC. The first nitride semiconductor part NS1 and the second nitride semiconductor part NS2 may be, for example, cubic, and a plane orientation having birefringence characteristics may be used as the first surface SF1, and the first surface SF1 may be the (111) plane of the cubic crystal. In one example of the light-emitting element 30, the second surface SF2 may be a polar plane. The second surface SF2 is not necessarily limited to a c-plane or a -c-plane. Because the reflected light L11 from the first surface SF1 has a specific polarization direction, and the second nitride semiconductor portion NS2 does not exhibit birefringence with respect to light traveling in the direction of the second crystal orientation CO2, laser light LB with a specific polarization direction is emitted from the light-emitting element 30 in the planar direction.

[0058] In one example configuration of the light-emitting element 30, the first surface SF1 and the second surface SF2 may be directly bonded at the junction BP. The direct bonding method is not particularly limited and may be surface activation bonding, or bonding may be performed by heating and pressurizing. When directly bonded at the junction BP, the materials of the base portion 8 and the first nitride semiconductor portion NS1 may be selected considering lattice mismatch, etc. Typically, an amorphous layer may be formed at the interface between the first nitride semiconductor portion NS1 and the base portion 8 by direct bonding. The light-emitting element 30 may include a transition layer between the first surface SF1 and the second surface SF2. The transition layer is not particularly limited, but examples include an amorphous layer, an oxide layer, a layer containing defects (dislocations, etc.), and a composite layer containing two or more layers selected from this group. The amorphous layer may contain oxygen. The junction BP may contain the above transition layer.

[0059] Furthermore, the light-emitting element 30 only needs to be capable of laser oscillation by allowing light to travel back and forth between the lower reflective layer RL1 and the upper reflective layer RL2, and a medium layer such as a transparent adhesive layer may be included between the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2. The first surface SF1 and the second surface SF2 may be joined via a light-transmitting bonding material.

[0060] [Method for manufacturing light-emitting elements] Figure 6 is a flowchart showing an example of a method for manufacturing a light-emitting element in one embodiment of the present disclosure. As shown in Figure 6, the method for manufacturing a light-emitting element in one embodiment includes a step S10 of forming a first nitride semiconductor part NS1 having a first surface SF1 perpendicular to a first crystal orientation CO1, a step S20 of forming a second nitride semiconductor part NS2 having a second surface SF2 perpendicular to a second crystal orientation CO2 different from the first crystal orientation CO1 and a light-emitting part LP located above the second surface SF2, and a step S30 of joining the first surface SF1 and the second surface SF2.

[0061] In the step of forming the first nitride semiconductor portion NS1, for example, the first nitride semiconductor portion NS1 can be crystal-grown on the main substrate MS. The second nitride semiconductor portion NS2 can be formed, for example, using the ELO (Epitaxial Lateral Overgrowth) method. The second nitride semiconductor portion NS2 may be formed using any other method that can realize a low-defect light-emitting portion LP. In the manufacturing method of the light-emitting element in one embodiment, for example, the second nitride semiconductor portion NS2, which has been crystal-grown on a template substrate including a seed region and a growth suppression region, may be peeled off, and the second surface SF2 of the peeled second nitride semiconductor portion NS2 may be directly bonded to the first surface SF1 of the first nitride semiconductor portion NS1.

[0062] In one example of a method for manufacturing a light-emitting element, the first surface SF1 and the second surface SF2 may be joined by heating and / or pressurizing. In one example of a method for manufacturing a light-emitting element, the first surface SF1 and the second surface SF2 may be joined via a translucent bonding material.

[0063] [Manufacturing equipment] Figure 7 is a block diagram showing an example of a light-emitting element manufacturing apparatus in one embodiment of the present disclosure. The light-emitting element manufacturing apparatus 50 shown in Figure 7 comprises an apparatus M10 that performs the process S10 in Figure 6, an apparatus M20 that performs the process S20 in Figure 6, an apparatus M30 that performs the process S30 in Figure 6, and a control device MC that controls apparatus M10, apparatus M20, and apparatus M30.

[0064] Devices M10 and M20 may include MOCVD devices, and the control unit MC may include a processor and memory. The control unit MC may be configured to control devices M10, M20 and M30 by executing a program stored, for example, in built-in memory, a communication device, or an accessible network, and this program and the recording medium on which this program is stored are also included in this embodiment.

[0065] [Example 1] In Example 1, a light-emitting substrate 40 having multiple light-emitting elements 30 is described as an example. In Example 1, the light-emitting elements 30 are VCSEL elements. One or more light-emitting elements 30 can be cut out from the light-emitting substrate 40, and one or more light-emitting elements 30 can be mounted on a submount or circuit board or the like.

[0066] (Overall structure) The details of each part of the light-emitting element in Example 1 will be described in more detail later, along with an example of a method for manufacturing the light-emitting element, but the overall configuration can be broadly described as follows.

[0067] Figure 8 is a cross-sectional view along the X direction of the light-emitting substrate having a plurality of light-emitting elements in Example 1. Figure 9 is a cross-sectional view along the Y direction of the light-emitting substrate having a plurality of light-emitting elements in Example 1. Figure 10 is a plan view of the light-emitting substrate having a plurality of light-emitting elements in Example 1. As shown in Figures 8, 9 and 10, the light-emitting element 30 in Example 1 comprises a main substrate MS, a first nitride semiconductor portion NS1 located on the main substrate MS, a second nitride semiconductor portion NS2 located on the first nitride semiconductor portion NS1, an insulating film KF and an anode EA located on the second nitride semiconductor portion NS2, an upper reflective layer RL2 located on the anode EA, and a cathode EC located on the base portion 8.

[0068] The second nitride semiconductor portion NS2 includes a base portion 8 and an upper layer portion 9. The base portion 8 and the upper layer portion 9 may include a nitride semiconductor (for example, a GaN-based semiconductor). In Example 1, the X direction is the a-axis direction of the first nitride semiconductor portion NS1 and the a'-axis direction of the second nitride semiconductor portion NS2, which is the <11-20> direction in the nitride semiconductor. The Y direction is the c-axis direction of the first nitride semiconductor portion NS1 and the m'-axis direction of the second nitride semiconductor portion NS2, that is, the <1-100> direction in the nitride semiconductor forming the second nitride semiconductor portion NS2. The Z direction is the m-axis direction of the first nitride semiconductor portion NS1 and the c'-axis direction of the second nitride semiconductor portion NS2, that is, the <1-100> direction in the nitride semiconductor forming the second nitride semiconductor portion NS2. <0001> It is the direction.

[0069] In Example 1, the base portion 8 includes a first portion HD and a second portion SD (low defect portion) in which the through-dislocation density is 1 / 5 or less of that of the first portion HD. The through-dislocation density of the second portion SD is 5 × 10 6 / cm 2The following is also possible. The second nitride semiconductor portion NS2, including such a base portion 8, can be formed, for example, by the ELO method (described later). The second portion SD overlaps with the upper portion 9 in a plan view. Of the upper portion 9, the portion that overlaps with the second portion SD in a plan view becomes a low-dislocation portion that inherits the low-dislocation properties (low-defect properties) of the base portion 8. The first nitride semiconductor portion NS1, which functions as the lower reflective layer, and the upper reflective layer RL2 can be configured to overlap with the second portion SD in a plan view.

[0070] In the light-emitting element 30, the light generated in the light-emitting part LP (see Figure 5) of the upper layer 9 by the current between the anode EA and the cathode EC is emitted as a laser by stimulated emission and feedback between the first nitride semiconductor part NS1 and the upper reflective layer RL2. In the light-emitting element 30, the first surface SF1 is an m-plane, and the first nitride semiconductor part NS1 has birefringence with respect to light traveling in the direction of the first crystal orientation CO1. The polarization reflectance in the a-axis direction of the first nitride semiconductor part NS1 is relatively high in the first surface SF1 compared to other directions. In the light-emitting element 30, the second surface SF2 is a c-plane, and the second nitride semiconductor part NS2 does not have birefringence with respect to light traveling in the direction of the second crystal orientation CO2. As a result, when a current is injected between the anode EA and the cathode EC, the light-emitting element 30 can emit laser light LB with a specific polarization direction in the planar direction. In Example 1, the specific polarization direction is the a' axis direction of the second nitride semiconductor portion NS2 (the a axis direction of the first nitride semiconductor portion NS1).

[0071] Figure 11 is a partially enlarged view of the light-emitting element in Embodiment 1. As shown in Figure 11, the upper layer 9 includes, in order from the bottom, an n-type semiconductor layer 9A as a first-type semiconductor layer, a light-emitting portion LP, and a p-type semiconductor layer 9B as a second-type semiconductor layer. The light-emitting portion LP is an active layer and has an MQW (Multi-Quantum Well) structure, and includes, for example, at least one of InGaN and GaN. The n-type semiconductor layer 9A is, for example, an n-type AlGaN layer. The p-type semiconductor layer 9B is, for example, a p-type GaN layer. The anode EA is provided so as to be in contact with the p-type semiconductor layer 9B.

[0072] The light-emitting element 30 includes an insulating film KF located on the upper layer 9. The insulating film KF includes an aperture AP that overlaps with the upper reflective layer RL2, anode EA, light-emitting portion LP, second portion SD, and first nitride semiconductor portion NS1 in a plan view. The anode EA is a transparent electrode located between the upper layer 9 and the upper reflective layer RL2, and the anode EA is in contact with the upper surface of the insulating film KF. The insulating film KF can be made of SiOx, SiNx, AlOx, or the like.

[0073] In the aperture portion AP, the anode EA and the upper layer portion 9 are in contact. Specifically, the p-type semiconductor layer 9B exposed in the aperture portion AP is in contact with the central part of the anode EA. The aperture portion AP is a current-constricting portion formed by, for example, penetrating the insulating film KF in a circular shape. The aperture portion AP narrows the current path CP between the anode EA and the cathode EC on the anode EA side, thereby increasing the luminous efficiency. In addition, in Embodiment 1, the current path CP from the anode EA in the aperture portion AP through the upper layer portion 9 and the base portion 8 to the cathode EC is formed in the low-defect portions of the base portion 8 and the upper layer portion 9. Therefore, the luminous efficiency of the light-emitting portion LP is increased, and heat generation in the base portion 8 and the upper layer portion 9 is suppressed.

[0074] In Example 1, the first nitride semiconductor portion NS1 can be an epitaxial DBR containing a nitride semiconductor, formed on the main substrate MS by m-plane growth. The first nitride semiconductor portion NS1 has a plurality of pairs PF, each containing a first refractive portion R1 and a second refractive portion R2 having a higher refractive index than the first refractive portion R1. The second refractive portion R2 may contain a GaN-based semiconductor, and the first refractive portion R1 may contain a refractive material (e.g., a nitride semiconductor) with a lower refractive index than the GaN-based semiconductor of the second refractive portion R2. By making the first nitride semiconductor portion NS1 an epitaxial DBR containing a nitride semiconductor, the light reflectivity of the first nitride semiconductor portion NS1 can be increased.

[0075] The first nitride semiconductor portion NS1 may have a structure in which the first refractive portion R1 and the second refractive portion R2 are repeatedly stacked in this order on the main substrate MS, from the viewpoint of increasing reflectivity. In Example 1, the first surface SF1 of the first nitride semiconductor portion NS1 corresponds to the upper surface of the second refractive portion R2 and is the m-plane of the nitride semiconductor crystal structure. Also, the second surface SF2 of the second nitride semiconductor portion NS2 corresponds to the lower surface of the base portion 8 and is the -c-plane of the nitride semiconductor crystal structure.

[0076] The specific stacking structure of the first nitride semiconductor section NS1 is not particularly limited, and for example, a known epitaxial DBR structure can be appropriately applied. The film thickness of the first nitride semiconductor section NS1 may be modulated, and the stacking order of the first refractive section R1 and the second refractive section R2 may be appropriately set. Various combinations of stacking order are possible for the first refractive section R1 and the second refractive section R2. For example, if the optical film thickness is 1 / 2λ, it will not affect the reflectivity, so in the first nitride semiconductor section NS1, the first refractive section R1 with an optical film thickness of 1 / 2λ may be placed on the uppermost layer of the first nitride semiconductor section NS1, in which case the first surface SF1 corresponds to the upper surface of the first refractive section R1. Alternatively, the second refractive section R2 with an optical film thickness of 1 / 2λ may be placed on the bottommost layer of the first nitride semiconductor section NS1 (the layer located on the surface of the main substrate MS).

[0077] In Example 1, a junction BP is provided between the first nitride semiconductor portion NS1 and the base portion 8. Specifically, the junction BP is a transition layer (a layer produced as a byproduct of the junction) formed by directly joining the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2, and is, for example, an amorphous layer. In the light-emitting element 30, the first surface SF1 and the second surface SF2 may each be composed of the same nitride semiconductor. The first surface SF1 may be the interface between the first nitride semiconductor portion NS1 and the junction BP, and the second surface SF2 may be the interface between the base portion 8 and the junction BP. The junction BP may be a crystalline layer containing defects (dislocations, etc.) rather than an amorphous layer.

[0078] The light-emitting element 30 has a mean square surface roughness (RMS) of 0.5 nm or less for both the first surface SF1 and the second surface SF2. This facilitates direct bonding between the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2. The RMS of the first surface SF1 and the second surface SF2 can be measured before direct bonding. When the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 are directly bonded, it can be indirectly determined that the RMS of the first surface SF1 and the second surface SF2 before direct bonding is 0.5 nm or less.

[0079] The constituent materials and crystal orientations of the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 can be adjusted so as to minimize lattice mismatch between the first surface SF1 of the first nitride semiconductor portion NS1 and the second surface SF2 of the second nitride semiconductor portion NS2. In this case, the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2 may be seamlessly and directly bonded. The bonding portion BP may be an interface between the first surface SF1 and the second surface SF2, rather than an amorphous layer.

[0080] The upper reflective layer RL2 is located on the anode EA and can be a dielectric DBR containing a dielectric material. For example, the upper reflective layer RL2 has multiple pairs PS including a third refractive portion R3 and a fourth refractive portion R4 having a higher refractive index than the third refractive portion R3, and each of the third refractive portion R3 and the fourth refractive portion R4 contains a dielectric material. The lower surface of the upper reflective layer RL2 may be included in the third refractive portion R3 and the upper surface of the upper reflective layer RL2 may be included in the fourth refractive portion R4. Also, the refractive index of the third refractive portion R3 may be lower than that of the anode EA. This increases the light reflectivity of the upper reflective layer RL2. Furthermore, by providing the upper reflective layer RL2 in an island-like manner on the anode EA, heat dissipation is improved.

[0081] As shown in Figures 8 and 9, the light-emitting substrate 40 of Example 1 may have air gaps TK between the multiple light-emitting elements 30. The sides of the base portion 8 and the upper layer portion 9 may be the a-plane or m-plane of the GaN-based semiconductor.

[0082] (Manufacturing method) Figure 12 is a flowchart showing an example of a method for manufacturing a light-emitting element in Example 1. As shown in Figure 12, the example of a method for manufacturing a light-emitting element includes a first partial step S100, a second partial step S200, and a third partial step S300. The first partial step S100, the second partial step S200, and the third partial step S300 will be described in order below.

[0083] {First partial process} Figure 13 is a cross-sectional view showing an example of the first partial process of the manufacturing method for a light-emitting element in Example 1. Figure 14 is a plan view showing an example of the first partial process of the manufacturing method for a light-emitting element in Example 1. As shown in Figures 12 to 14, the first partial process S100 includes a step S110 for preparing a template substrate TS, a step S120 for forming a semiconductor portion 8N by the ELO method, a step S130 for forming a plurality of trenches TR to divide the semiconductor portion 8N into a plurality of base portions 8, a step S140 for forming an upper layer 9 on the base portion 8, and a step S150 for separating the second nitride semiconductor portion NS2 from the template substrate TS. In Example 1, the upper layer 9 is grown on the template substrate TS using c-plane growth. In another example, an island-shaped portion (corresponding to the aforementioned second nitride semiconductor portion NS2) including the base portion 8 and the upper layer 9 may be formed on the template substrate TS by dividing the semiconductor portion 8N and the upper layer 9 after forming the upper layer 9 on the semiconductor portion 8N.

[0084] <Template board> The template substrate TS includes seed regions SA and growth inhibition regions DA arranged in a first direction (X direction). The template substrate TS may have, for example, a main substrate (second main substrate) 1, a base portion 4, and a mask pattern 6. The mask pattern 6 may include a mask portion 5 that functions as a growth inhibition region DA and an opening K corresponding to the seed region SA. Specifically, the surface (top surface) of the mask portion 5 may be the growth inhibition region DA. The main substrate 1 and the base portion 4 together may be referred to as the base substrate BS. The template substrate TS can also be referred to as a growth substrate.

[0085] For the main substrate 1, a heterogeneous substrate having a different lattice constant from the semiconductor portion 8N, for example, containing a GaN-based semiconductor, can be used. Examples of heterogeneous substrates include single-crystal silicon (Si) substrates, sapphire (Al2O3) substrates, silicon carbide (SiC) substrates, aluminum nitride (AlN) substrates, etc. The plane orientation of the main substrate 1 is, for example, the (111) plane for a silicon substrate, the (0001) plane for a sapphire substrate, and the 6H-SiC(0001) plane for a SiC substrate. These are examples, and in Example 1, any substrate and plane orientation is acceptable as long as the semiconductor portion 8N is formed using the ELO method and the upper layer 9 can be grown on the c-plane above the semiconductor portion 8N (or the base portion 8 from which the semiconductor portion 8N has been divided).

[0086] Figure 15 is a cross-sectional view showing an example of the configuration of a template substrate. As shown in Figure 15, the template substrate TS may be configured such that a seed portion 3 and a mask pattern 6 are formed in this order on a main substrate 1, in which case the base portion 4 may be the seed portion 3. Alternatively, the template substrate TS may be configured such that a multilayer base portion 4 (including a buffer portion 2 and a seed portion 3) and a mask pattern 6 are formed in this order on a main substrate 1. The seed portion 3 may be formed locally (for example, in a stripe shape) so as to overlap the opening K of the mask pattern 6 in a plan view. The template substrate TS may also be configured such that the mask pattern 6 is formed on a main substrate 1 (for example, a SiC bulk crystal substrate).

[0087] The seed portion 3 is the growth starting point for the semiconductor portion 8N, and may overlap with the opening K in a plan view. It may have a shape with the second direction (Y direction) as the longitudinal direction. The seed portion 3 may be made of a base material such as a GaN-based semiconductor, aluminum nitride (AlN), silicon carbide (SiC), AlScN, or graphene.

[0088] For example, when a silicon substrate is used for the main substrate 1 and a GaN-based semiconductor is used for the seed portion 3, a buffer portion 2 including at least one of an AlN layer and a SiC (silicon carbide) layer may be provided to reduce the possibility of the two (main substrate and seed portion) melting together. If a main substrate 1 that does not melt with the seed portion 3 is used, a configuration without a buffer portion 2 is also possible. Furthermore, if a seed portion 3 with low reactivity with the main substrate 1 is used, a configuration without a buffer portion 2 is also possible. The buffer portion 2 may include a strain relaxation layer. Examples of strain relaxation layers include a superlattice structure of AlGaN and a grated structure in which the Al composition of AlGaN is changed in steps.

[0089] At least one of the buffer portion 2 (e.g., aluminum nitride) and the seed portion 3 (e.g., GaN-based semiconductor) can also be formed using a sputtering apparatus (PSD: pulse sputter deposition, PLD: pulse laser deposition, etc.). Using a sputtering apparatus for film deposition can streamline the manufacturing process.

[0090] The mask pattern 6 is formed on the main substrate 1 or base substrate BS using a material that suppresses the longitudinal growth (growth in the c-axis direction) of the nitride semiconductor, and enables the lateral growth (for example, growth in the a-axis direction) of the nitride semiconductor. Examples of materials for the mask portion 5 of the mask pattern 6 include silicon nitride, silicon carbide, silicon carbonitride, diamond-like carbon, silicon oxide, silicon oxynitride, etc. Alternatively, materials that do not contain silicon, such as titanium nitride, molybdenum nitride, tungsten nitride, tantalum carbide, and even high-melting-point metals (molybdenum, tungsten, platinum, etc.), can be used for the mask portion 5. The mask portion 5 may be a single layer film made of one of these materials, or a multilayer film made by combining multiple of these materials. The thickness of the mask portion 5 may be, for example, about 100 nm to 4 μm. The width Wm (size in the first direction) of the mask portion 5 can be, for example, 10 μm to 200 μm.

[0091] The openings K of the mask pattern 6 may have a longitudinal shape with the first direction (X direction) being the width direction and the second direction (Y direction) being the longitudinal direction. The mask pattern 6 may have multiple openings K arranged in the first direction. The openings K may also have a tapered shape (a shape that narrows in width towards the bottom). The width Wk of the openings K (size in the first direction) can be, for example, about 0.1 μm to 20 μm. The width Wk of the openings K may be smaller than the width Wm of the mask portion 5.

[0092] <Filming of semiconductor parts> Next, the semiconductor portion 8N is formed on the template substrate TS using the ELO method. In Example 1, the semiconductor portion 8N was a GaN layer, and the semiconductor portion 8N was deposited on the template substrate TS using an MOCVD (metal-organic chemical vapor deposition) apparatus, with the top surface being the c-plane. As an example of ELO deposition conditions, the following can be used: substrate temperature: 1120°C, growth pressure: 50kPa, TMG (trimethylgallium): 22sccm, NH3: 15slm, V / III = 6000 (ratio of the amount of Group V raw material supplied to the amount of Group III raw material supplied).

[0093] Figure 16 is a cross-sectional view showing an example of a method for forming the semiconductor portion in Example 1. In Figure 16, the mask portion 5 in the mask pattern 6 shows an example in which a tapered opening K is present. As shown in Figure 16, an initial growth portion SL may be formed on the seed region SA exposed from the opening K, and then the semiconductor portion 8N may be grown laterally from the initial growth portion SL. The initial growth portion SL serves as the starting point for the lateral growth of the semiconductor portion 8N. By appropriately controlling the ELO film deposition conditions, it is possible to control the growth of the semiconductor portion 8N to be in the c-axis direction of the nitride semiconductor or in the a-axis direction (first direction (X direction)).

[0094] For example, the deposition of the initial growth portion SL may be stopped just before the edge of the initial growth portion SL rides up onto the upper surface of the mask portion 5 (when it is in contact with the upper side of the mask portion 5), or immediately after it rides up onto the upper surface of the mask portion 5 (i.e., at this timing, the ELO deposition conditions may be switched from c-axis deposition conditions to a-axis deposition conditions). By growing the initial growth portion SL laterally from a state where it slightly protrudes from the mask portion 5, the growth of the semiconductor portion 8N in the c-axis direction (thickness direction) is suppressed, allowing the semiconductor portion 8N to be grown laterally at high speed and with high crystallinity, while also reducing the consumption of raw materials. This makes it possible to form a thin, wide, low-defect semiconductor portion 8N (crystalline nitride semiconductor such as GaN) at low cost. The initial growth portion SL can be formed to a thickness of, for example, 30 nm to 1000 nm, 50 nm to 400 nm, or 70 nm to 350 nm.

[0095] The deposition temperature for the semiconductor portion 8N (ELO semiconductor portion) may be as high as 1200°C or as low as 1150°C. From the viewpoint of reducing mutual reactions, the semiconductor portion 8N can also be formed at low temperatures below 1000°C. In such low-temperature deposition, if trimethylgallium (TMG) is used as the gallium raw material, the raw material is not sufficiently decomposed, and gallium atoms and carbon atoms may be incorporated into the semiconductor portion 8N in greater quantities than usual. The carbon incorporated into the semiconductor portion 8N reduces the reaction with the mask portion 5, and can reduce adhesion between the mask portion 5 and the semiconductor portion 8N. Therefore, in low-temperature deposition of the semiconductor portion 8N, the supply amount of ammonia may be reduced, and deposition may be performed at a low V / III (<1000) ratio. This allows carbon elements from the raw material or chamber atmosphere to be incorporated into the semiconductor portion 8N, reducing the reaction between the semiconductor portion 8N and the mask portion 5.

[0096] Semiconductor portions 8N that grow laterally in opposite directions from each of two adjacent openings K do not contact (meet) on the mask portion 5 and have a gap GP, thereby reducing the internal stress of the semiconductor portion 8N. As a result, cracks and defects (dislocations) generated in the semiconductor portion 8N can be reduced. The width of the gap GP (size in the first direction X1) can be 5 μm or less, 3 μm or less, or 2 μm or less.

[0097] Among the semiconductor portions 8N, a base portion B, which is a portion located on the initial growth portion SL, becomes a dislocation inheritance portion (the aforementioned first portion HD) with many through dislocations, and a wing portion F, which is a portion located on the mask portion 5, becomes a low defect portion (the aforementioned second portion SD) with a through dislocation density of 1 / 5 or less compared to the dislocation inheritance portion. The wing portion F includes an edge E located above the growth suppression region DA. A through dislocation is a dislocation (defect) that extends in the c-axis direction (<0001> direction) in the semiconductor portion 8N. The through dislocation density can be obtained, for example, by measuring the surface of the semiconductor portion 8N by CL (Cathode Luminescence) and counting the number of black dots in the CL measurement image. The through dislocation density of the wing portion F can be, for example, 5×10 6 [pieces / cm 2 ] or less.

[0098] The density of the basal plane dislocations of the base portion B may be 5×10 8 / cm 2 [[ID=]16] or less. The basal plane dislocations may be dislocations that extend in the in-plane direction of the c-plane of the semiconductor portion 8N. The basal plane dislocation density here can be obtained, for example, by dividing the semiconductor portion 8N to expose the side surface of the base portion B and measuring the dislocation density of this side surface by CL.

[0099] For the wing portion F, the ratio of the width WF (size in the first direction) to the thickness d1 (WF / d1) can be, for example, 2.0 or more. WF / d1 can be 2.0 or more, 4.0 or more, 5.0 or more, 7.0 or more, or 10.0 or more. By setting WF / d1 to 2.0 or more, it is easier to reduce the internal stress of the semiconductor portion 8N. As a result, wafer warping can be reduced. The width WF of the wing portion F may be, for example, 7.0 μm or more, 10.0 μm or more, 20.0 μm or more, or 40.0 μm or more. The thickness d1 may be 10.0 μm or less, 5.0 μm or less, or 2.0 μm or less.

[0100] In Example 1, the width Wm of the mask portion 5 was 50 μm, the width Wk of the opening K was 5 μm, the width of the semiconductor portion 8N was 53 μm, the width (size in the X direction) of the wing portion F was 24 μm, and the layer thickness of the semiconductor portion 8N was 5 μm. The aspect ratio of the semiconductor portion 8N was 53 μm / 5 μm = 10.6, achieving a very high aspect ratio.

[0101] <Separation of the semiconductor section> Next, in Example 1, the semiconductor portion 8N is divided into multiple base portions 8 by forming multiple trenches TR extending in a first direction (X direction). The base portions 8 may be island-like (not connected to the surrounding area) due to the multiple trenches TR and gaps GP. Etching of the semiconductor portion 8N is dry etching, and this dry etching may be stopped at the mask portion 5. In this case, the mask portion 5 functions as an etching stopper, and the mask portion 5 is exposed at the bottom of the trenches TR. It is not necessarily required that the etching stops at the surface of the mask portion 5; it is sufficient if the etching stops within the mask portion 5. The mask portion 5 is formed of a material that is less etchable than the semiconductor portion 8N, and if it can perform its role in stopping the etching, a part of the mask portion 5 may be etched.

[0102] When the trench TR is formed to extend in the width direction (X direction) of the opening K, wafer warping can be reduced. This effect is particularly noticeable when a dissimilar substrate with a different coefficient of thermal expansion than the semiconductor portion 8N is used for the main substrate 1.

[0103] <Formation of the upper layer> Next, in Example 1, each upper layer 9 may be formed in an island shape corresponding to the base portion 8. Nitride semiconductors are less likely to deposit on the mask portion 5, which is a selective growth mask, and the upper layer 9 grows on the upper and side surfaces of the base portion 8 containing the nitride semiconductor, so the upper layer 9 can be formed in an island shape. This avoids patterning damage and improves the condition of the light-emitting portion LP (see Figure 11), which is the active layer of the upper layer 9. The upper layer 9 may be formed above the base portion 8 in a portion that overlaps with the wing portion F in a plan view, or a part of the upper layer 9 may be etched or otherwise removed to expose the base portion 8. By etching or otherwise removing a part of the upper layer 9, for example, the n-type semiconductor layer 9A of the upper layer 9 may be exposed.

[0104] The upper layer 9 may be formed continuously using the same apparatus (e.g., MOCVD apparatus) as the one used to deposit the semiconductor layer 8N, or the substrate may be removed from the apparatus after the semiconductor layer 8N is formed, the surface of the semiconductor layer 8N may be polished, and then the upper layer 9 may be formed. In addition to MOCVD apparatus, sputtering apparatus, remote plasma CVD (remote plasma chemical vapor deposition: RPCVD) apparatus, PSD (Pulse Sputter Deposition) apparatus, etc., can be used to form the upper layer 9. When using remote plasma CVD apparatus or PSD apparatus, hydrogen is not used as a carrier gas, making it easier to form a low-resistance p-type GaN semiconductor layer.

[0105] The MQW structure of the light-emitting portion LP in the upper layer 9 can be, for example, an InGaN / GaN structure with 2 to 6 periods. The In composition varies depending on the desired emission wavelength; for blue light (around 450 nm), the In concentration can be about 15-20%, and for green light (around 530 nm), it can be about 30%. If necessary, an electron blocking layer (e.g., an AlGaN layer) may be formed on the light-emitting portion LP. In addition, to reduce resistance, the surface (about 10 nm) of the p-type semiconductor layer 9B may be made into a p-type high-doped layer.

[0106] The island-shaped portion including the base portion 8 and the upper portion 9 can be made into the second nitride semiconductor portion NS2 of the light-emitting element 30 described above. The second nitride semiconductor portion NS2 formed as described above includes the base portion 8 located below the light-emitting portion LP, and the base portion 8 has a base portion B and a pair of wing portions F extending from the base portion B on both sides. In the second nitride semiconductor portion NS2, the light-emitting portion LP and the wing portions F overlap in a plan view. The portion of the upper portion 9 that overlaps with the wing portions F in a plan view inherits low dislocation properties (low defect properties), so the light emission efficiency in this portion can be increased.

[0107] <Separation of element parts> Next, the mask portion 5 is wet-etched so that the base portion 8 of the second nitride semiconductor portion NS2 is connected only to the substrate portion 4. Then, the second nitride semiconductor portion NS2 can be mechanically separated from the template substrate TS using a temporary support member TM. The temporary support member TM may be an adhesive tape (for example, an adhesive dicing tape used when dicing semiconductor wafers). The specific form of the temporary support member TM is not particularly limited.

[0108] Multiple adjacent second nitride semiconductor portions NS2 on the template substrate TS may be separated by a single temporary support member TM. Alternatively, a single temporary support member TM may be used to selectively separate a portion of multiple second nitride semiconductor portions NS2 on the template substrate TS. For example, multiple second nitride semiconductor portions NS2 can be temporarily bonded to a temporary support member TM so as to straddle multiple second nitride semiconductor portions NS2, such as every two or three portions.

[0109] The present invention is not limited to this, and the second nitride semiconductor portion NS2 may be bonded to the temporary support member TM using solder, or it may be peeled off using an adhesive stamp made with an adhesive or a flexible material such as polydimethylsiloxane (PDMS), which is a silicone elastomer.

[0110] {Second partial process} Figure 17 is a cross-sectional view showing an example of the second partial process of the manufacturing method for a light-emitting element in Example 1. As shown in Figures 12 and 17, the second partial process S200 includes a process S210 for preparing the main substrate MS and a process S220 for forming the first nitride semiconductor part NS1.

[0111] The main substrate MS may consist of one of silicon carbide (SiC), sapphire, or GaN. However, it is not limited to these materials; in Example 1, the main substrate MS may be any material and plane orientation that allows the first nitride semiconductor portion NS1 to be formed by m-plane growth. From the viewpoint of excellent thermal conductivity, a SiC substrate can be used as the main substrate MS. The main substrate MS may also be a light-shielding substrate (e.g., a silicon substrate). As the main substrate MS, a base substrate with a (11-22) plane GaN-based semiconductor layer formed on a sapphire substrate or a base substrate with a (20-21) plane GaN-based semiconductor layer formed on a sapphire substrate may be used. For example, a grooved sapphire substrate can be used as the main substrate MS, and a non-polar plane (m-plane) GaN layer can be deposited on the main substrate MS. A sapphire substrate may be less expensive than a non-polar plane SiC substrate.

[0112] Then, a first nitride semiconductor portion NS1 is formed on the main substrate MS. The first nitride semiconductor portion NS1 may also be formed on the main substrate MS via an underlayment (for example, a GaN layer). As shown in Figure 11 above, by stacking 20 to 40 pairs of pairs PF containing AlN in the first refractive portion R1 and GaN in the second refractive portion R2, an epitaxial DBR with high reflectivity (for example, 96% or more) and high thermal conductivity can be formed.

[0113] As described above, the first nitride semiconductor portion NS1 has a first surface SF1 perpendicular to the first crystal orientation CO1 on the surface opposite to the main substrate MS. The first nitride semiconductor portion NS1 only needs to have birefringence with respect to light propagating in the direction of the first crystal orientation CO1, and its specific configuration is not necessarily limited. The first nitride semiconductor portion NS1 can also be a lattice-matched epitaxial DBR such as AlInN (first refractive portion R1) / GaN (second refractive portion R2).

[0114] The epitaxial DBR may be deposited using the MOCVD method, or it may be deposited using the RPCVD method or sputtering method (such as the PSD method), which allows for low-temperature deposition. By using low-temperature deposition methods such as the RPCVD method or the PSD method, the temperature difference between the deposition process and the post-deposition process is reduced, which can suppress cracks caused by the difference in thermal expansion coefficients between the main substrate MS and the epitaxial DBR.

[0115] In Example 1, 30 pairs of AlN (first refractive layer R1) / GaN (second refractive layer R2) were stacked on a 4H-SiC substrate using the MOVPE method at a growth temperature of 1040°C and a growth pressure of 50 Torr to form an epitaxial DBR. The design peak wavelength of the DBR was 400 nm, and the optical film thickness of GaN within each pair was set to λ / 4. This resulted in obtaining a first nitride semiconductor layer NS1 with a high optical reflectivity of approximately 99%. The first nitride semiconductor layer NS1 can function as the lower reflective layer of a VCSEL.

[0116] Unlike the example shown in Figure 11, the uppermost part of the first nitride semiconductor section NS1 may be the first refractive section R1 (e.g., AlN). The refractive material of the first refractive section R1 may be AlN, AlInN, or InN. The second refractive section R2 includes a GaN-based semiconductor (e.g., GaN). The refractive material of the first refractive section R1 may have a different lattice constant from the GaN-based semiconductor of the second refractive section R2. The refractive material of the first refractive section R1 (e.g., AlN) may have a smaller lattice constant than the GaN-based semiconductor of the second refractive section R2 (e.g., GaN). Regarding the coefficient of thermal expansion, the main material of the main substrate MS (e.g., SiC, Si) < GaN-based semiconductor of the second refractive section R2 (e.g., GaN) < refractive material of the first refractive section R1 (e.g., AlN) may be the case.

[0117] {Third partial process} Figure 18 is a cross-sectional view showing an example of the third partial step in the manufacturing method of a light-emitting element in Example 1. As shown in Figures 14 and 18, the third partial step S300 includes a step S310 for joining the first surface SF1 of the first nitride semiconductor part NS1 and the second surface SF2 of the second nitride semiconductor part NS2, a step S320 for forming an insulating film (current constriction layer) KF, a step S330 for forming an anode EA, a cathode EC and an upper reflective layer RL2, and a step S340 for separating the elements into a plurality of light-emitting elements 30.

[0118] <Joining> First, the back surface of the base portion 8 of the second nitride semiconductor portion NS2, which is temporarily supported by the temporary support member TM, is planarized by polishing or CMP (Chemical Mechanical Polish). Polishing may be, for example, lapping or buffing, and in this case, the polishing agent may include, for example, colloidal silica or an oxidizing agent, or a mixture thereof. As a polishing technique, a polishing method called the CARE (Catalyst Surface Referred Etching) method may be used. This makes it possible to set the RMS of the back surface of the base portion 8 corresponding to the second surface SF2 of the second nitride semiconductor portion NS2 to, for example, 0.5 [nm] or less.

[0119] As mentioned above, the base portion 8 is formed by the ELO method, and since the back surface of the base portion 8 is a surface separated from the template substrate TS, it has high flatness. By using the ELO method, the flatness of the back surface of the base portion 8 can be increased and separation from the template substrate TS can be made easier. If the flatness of the back surface of the base portion 8 is sufficiently high, the above planarization treatment can be omitted.

[0120] Furthermore, the surface of the first nitride semiconductor portion NS1 located on the main substrate MS may be planarized by polishing or CMP as needed. This makes it possible to set the RMS of the surface (first surface SF1) of the first nitride semiconductor portion NS1 to, for example, 0.5 [nm] or less.

[0121] Subsequently, in Example 1, the first surface SF1 of the first nitride semiconductor portion NS1 and the second surface SF2 of the second nitride semiconductor portion NS2 are joined in a crystal orientation relationship where the c-axis direction of the first nitride semiconductor portion NS1 and the m'-axis direction of the second nitride semiconductor portion NS2 are parallel. This joins the first nitride semiconductor portion NS1, which is an m-plane DBR, and the second nitride semiconductor portion NS2, which is a c-plane ELO layer. Then, the second nitride semiconductor portion NS2 and the temporary support member TM are separated, and multiple second nitride semiconductor portions NS2 are transferred onto the first nitride semiconductor portion NS1.

[0122] For example, the first surface SF1 and the second surface SF2 can be directly joined by surface activation bonding. Specifically, the first surface SF1 and the second surface SF2 are plasma-treated in a vacuum. This cleans and activates the surface (resulting in the presence of dangling bonds on the surface). Subsequently, the first surface SF1 and the second surface SF2 are brought into contact with each other, thereby surface activation bonding of the first nitride semiconductor portion NS1 and the second nitride semiconductor portion NS2. Heating and pressurization may be applied during direct bonding. In Example 1, the bonding portion BP may be an amorphous layer.

[0123] <Formation of the superstructure> Next, an insulating film KF is formed above the upper layer 9, having an aperture portion AP (current constriction portion). The material of the insulating film KF is not particularly limited, but for example, SiOx, SiNx, AlOx, etc. can be used. In Example 1, two insulating films KF were formed for each single second nitride semiconductor portion NS2. Specifically, one insulating film KF was formed above each of the two wing portions F of the base portion 8 (see Figure 10).

[0124] An anode EA is formed in the aperture portion AP of the insulating film KF so as to be in contact with the upper layer portion 9, and a cathode EC is formed on the base portion 8 (see Figures 9 and 10). The constituent material of the cathode EC is not particularly limited. The anode EA and cathode EC may be aligned in the Y direction (see Figure 10).

[0125] In a plan view, the anode EA overlaps with the wing portion F of the base portion 8. In a plan view, the anode EA overlaps with the light-emitting portion LP of the upper layer portion 9. In the light-emitting element 30, light traveling back and forth between the first nitride semiconductor portion NS1 and the upper reflective layer RL2 passes through the anode EA.

[0126] The anode EA is formed from a transparent conductive material that is light-transmitting. Examples of transparent conductive materials include indium tin oxide (including crystalline ITO, amorphous ITO, and Sn-doped In2O3), indium zinc oxide (IZO), IFO (F-doped In2O3), tin oxide (including SnO2, Sb-doped SnO2, and F-doped SnO2), and zinc oxide (including ZnO, Al-doped ZnO, and B-doped ZnO).

[0127] The anode EA may contain at least one of Ga (gallium) oxide, Ti (titanium) oxide, Nb (niobium) oxide, or Ni (nickel) oxide. The aperture diameter of the anode EA (the diameter of the current injection region that contacts the p-type semiconductor portion) can be, for example, 2 μm or more and 100 μm or less.

[0128] Next, an upper reflective layer RL2 is formed above the anode EA. This makes it possible to form a light-emitting substrate 40 having multiple light-emitting elements 30. Example 1 shows an example in which two light-emitting elements 30 are formed for each of the multiple second nitride semiconductor parts NS2 arranged on the first nitride semiconductor part NS1.

[0129] In Example 1, the upper reflective layer RL2 may be, for example, an amorphous dielectric. Also in Example 1, the upper reflective layer RL2 may be, for example, a stacked structure of crystalline layers such as SiN, in which case the crystal orientation of each crystal is not particularly limited. The upper reflective layer RL2 may be, for example, a DBR in which a third refractive portion R3 and a fourth refractive portion R4 are alternately stacked, as shown in Figure 11. The third refractive portion R3 includes, for example, SiO2. The fourth refractive portion R4 is a layer containing a material having a higher refractive index than the third refractive portion R3, and includes, for example, Ta2O5, HfO2, ZrO2, TiO2, Al2O3, Nb2O5, ZnO, AlN, SiN, or MgO. Light incident at an angle greater than or equal to the critical angle at the interface between the third refracting section R3 and the fourth refracting section R4 undergoes total internal reflection at this interface, thus achieving a high light reflectivity (e.g., 96% or more) in the upper reflective layer RL2.

[0130] In the light-emitting element 30, the first nitride semiconductor portion NS1 has a higher reflectivity than the upper reflective layer RL2 with respect to the emission wavelength of the light-emitting portion LP. The first nitride semiconductor portion NS1 may have a reflectivity of approximately 100%, for example, about 99%. As a result, the light traveling back and forth between the first nitride semiconductor portion NS1 and the upper reflective layer RL2 is mainly emitted as laser light LB from the upper surface of the upper reflective layer RL2 (the part that overlaps with the aperture portion AP in a plan view).

[0131] Furthermore, the light-emitting element 30 is not limited to a configuration in which the laser beam LB is emitted from the upper reflective layer RL2 side. If the main substrate MS is not translucent, the light-emitting element 30 may be configured in a way that the laser beam LB is emitted from the main substrate MS side (in other words, from the first nitride semiconductor part NS1 side), or it may be configured in a way that the laser beam LB is emitted from both the main substrate MS side and the upper reflective layer RL2 side.

[0132] <Individuation> Figure 19 is a plan view showing the individualized light-emitting substrate in Embodiment 1. As shown in Figure 19, the light-emitting substrate 40 in Figure 18 may be divided into multiple light-emitting substrates 40, each containing two light-emitting elements 30. In Embodiment 1, the light-emitting substrate 40 may also contain four or more light-emitting elements 30.

[0133] [Another configuration example] (a) In an alternative configuration of Example 1, the template substrate TS used in step S100 can further have the following configuration. That is, in the template substrate TS, the seed region SA is only necessary as the starting point for the growth of the semiconductor portion 8N, and the template substrate TS has a seed region SA above the main substrate 1 and a growth suppression region DA. The template substrate TS does not have, for example, a mask portion 5. The template substrate TS has a base layer containing a base material located above the main substrate 1, and the surface of the base layer may have a growth suppression region DA where the base material is modified and a seed region SA where the base material is not modified. The base material may be AlScN, ScN, ZnO, CrN, etc., containing different materials such as Sc (scandium), Zn, Cr, etc. (for example, metal elements other than group III). The base layer may be a single layer structure or a multilayer structure. It may also be a multilayer structure including a periodic structure. Using such a template substrate TS, the semiconductor portion 8N can be formed by the ELO method.

[0134] (b) In an alternative configuration of Example 1, in step S120 (see Figure 12), a gap may be formed between the wing portion F and the mask portion 5 which is the growth inhibition region DA. For example, the seed region SA may be located above the growth inhibition region DA in the thickness direction of the template substrate TS. This makes it easier to improve the flatness of the back surface of the wing portion F.

[0135] (c) In an alternative configuration of Example 1, in step S120 (see Figure 12), semiconductor portions 8N that have grown laterally in opposite directions from each of two adjacent openings K may come into contact (meet) on the mask portion 5. In this case, by removing the met portions, a plurality of bar-shaped semiconductor portions 8N or island-shaped base portions 8 as shown in Figure 14 may be formed.

[0136] (d) Figure 20 is a process plan view showing an example of the first partial process of the manufacturing method of a light-emitting element in an alternative configuration of Example 1. As shown in Figure 20, in the alternative configuration of Example 1, a trench TR extending in the Y direction may be formed to remove the base B that overlaps with the opening K in a plan view. The back surface of the wing portion F of the base portion 8 and the mask portion 5 are weakly coupled to each other, for example, by van der Waals forces. Then, in the process of S150 (see Figure 12), the second nitride semiconductor portion NS2 may be separated by a temporary support member TM without removing the mask portion 5. After forming a plurality of trenches TR, an anchor film may be formed in contact with the side surface of the base portion 8 and the mask portion 5. The anchor film may be, for example, a dielectric film.

[0137] (e) Figure 21 is a cross-sectional view of a process showing an example of the third partial process of the manufacturing method of a light-emitting element in an alternative configuration of Example 1. As shown in Figure 21, in the process of S310 (see Figure 12), for example, a translucent bonding material BM may be formed on the first nitride semiconductor part NS1, and the first surface SF1 and the second surface SF2 may be bonded via the bonding material BM. In this case, the bonding part BP may be a transparent adhesive layer (medium layer) composed of the bonding material BM. As the bonding material BM, for example, a transparent dielectric film can be used, and silicon oxide (SiO2) is a specific example. By setting the optical thickness of the transparent adhesive layer to λ / 4, the bonding part BP can also be used as part of the first nitride semiconductor part NS1.

[0138] (f) Figure 22 is a cross-sectional view showing another configuration example of the light-emitting element 30 in Example 1. In the example shown in Figure 11, an aperture portion AP is provided in the insulating film KF, but the invention is not limited to this. As shown in the example in Figure 22, an annular high-resistance portion HR (region with low p-type doping concentration) may be provided in the p-type semiconductor layer 9B, and the inside of the high-resistance portion HR may be an aperture portion AP (current constriction portion) (a configuration in which the high-resistance portion HR surrounds the aperture portion AP). The aperture portion AP can also be formed by implanting Al (aluminum) and Fe (iron) in the p-type semiconductor layer 9B. Furthermore, in order to give the aperture portion AP a light confinement effect due to the refractive index difference, the area around the aperture can be excavated to create a refractive index difference between the aperture portion AP and its surroundings (for example, making the refractive index of the surrounding area smaller compared to the aperture portion AP).

[0139] (g) Figure 23 is a cross-sectional view showing an example of a method for manufacturing a light-emitting element in an alternative configuration of Example 1. In the example shown in Figure 18, the first nitride semiconductor portion NS1 is formed continuously on the main substrate MS, but is not limited to this. As shown in Figure 23, the first nitride semiconductor portion NS1 may be locally located on the main substrate MS so as to be arranged in a two-dimensional manner in a plan view.

[0140] (h) In the method for manufacturing a light-emitting element in an alternative configuration of Example 1, the upper layer 9 may be formed on a plurality of bar-shaped semiconductor portions 8N in the first partial step S100 (see Figure 12) without performing step S130. The strip-shaped semiconductor portion including the semiconductor portion 8N and the upper layer 9 can be divided on the template substrate TS to form a plurality of second nitride semiconductor portions NS2. Alternatively, the strip-shaped semiconductor portion may be separated from the template substrate TS using, for example, a temporary support member TM, and then divided on the temporary support member TM to form a plurality of second nitride semiconductor portions NS2. The strip-shaped semiconductor portion may also be divided by cleavage.

[0141] (i) As described above, this disclosure relates to novel findings for controlling the polarization direction of laser light LB emitted from the light-emitting element 30 in the c-plane direction of the light-emitting part LP. Conventionally, methods for controlling the polarization direction have been proposed, for example, by utilizing asymmetric resonance or anisotropy of optical gain, and these methods can be combined with the technology of this disclosure to further facilitate the control of the polarization direction of laser light LB. The effect of the birefringence characteristics (polarization reflectance difference) of the first nitride semiconductor part NS1 or the upper reflective layer RL2 in this disclosure can be enhanced by combining the above methods.

[0142] For example, the light-emitting element 30 may have an asymmetric resonator shape by forming an asymmetric aperture or asymmetric mesa, etc., to correspond to the birefringence characteristics (direction of relatively high polarization reflectance) of the first nitride semiconductor part NS1 or the upper reflective layer RL2. Alternatively, the light-emitting element 30 may be formed by bonding a second nitride semiconductor part NS2, which is formed using a high-index surface substrate (e.g., a c-plane off-surface substrate or a non-polar surface), to the first nitride semiconductor part NS1, so as to correspond to the birefringence characteristics of the first nitride semiconductor part NS1 or the upper reflective layer RL2. This makes it easier to control the polarization direction of the laser light LB.

[0143] Furthermore, for example, the light-emitting element 30 may have anisotropic distortion in its light-emitting portion LP. This anisotropic distortion will be explained in detail below with reference to Figure 24. Figure 24 is a schematic diagram illustrating a light-emitting element in an alternative configuration example of Embodiment 1.

[0144] In the light-emitting element 30, strain usually occurs in the light-emitting part LP due to differences in thermal expansion coefficients between the base part 8 and the upper part 9, lattice mismatch, etc. However, since such strain is isotropic within the c-plane and the symmetry of the crystal is preserved, it does not particularly affect the polarization direction of the light emitted from the light-emitting part LP. In contrast, if a crystal is formed in a stripe shape by, for example, the ELO method, uniaxial stress may occur in the stripe direction, and in this case, in-plane anisotropic strain may occur in the light-emitting part LP formed by c-plane growth. A specific example is described below.

[0145] In one configuration example of this disclosure, as shown in the figure indicated by reference numeral 2401 in Figure 24, a semiconductor portion 8N is formed on a template substrate TS by the ELO method, and an upper layer portion 9 is formed on the semiconductor portion 8N. The semiconductor portion 8N is formed by growing laterally in the a' direction with the m' axis direction as the longitudinal direction, starting from a seed region SA exposed from an opening K in the mask pattern 6. The semiconductor portion 8N may be divided into a base portion 8. If the base substrate BS in the template substrate TS is a different type of substrate, the following conditions may occur.

[0146] In other words, for example, if the base substrate BS includes a silicon substrate, when the semiconductor substrate on which the semiconductor portion 8N has been formed under high-temperature conditions is cooled to room temperature, both the semiconductor portion 8N and the base substrate BS shrink as the temperature decreases, but the semiconductor portion 8N shrinks more than the base substrate BS. Therefore, tensile strain occurs in the longitudinal direction (stripe direction) and compressive strain occurs in the transverse direction of the semiconductor portion 8N. In addition, since the light-emitting portion LP formed above the semiconductor portion 8N generally contains a material with a lattice constant greater than that of the semiconductor portion 8N, compressive strain occurs in the light-emitting portion LP. Here, if the underlying layer above the semiconductor portion 8N, which serves as the base for growing the light-emitting portion LP during the film formation process, has anisotropic strain, and the light-emitting portion LP grows in alignment with this underlying layer, compressive strain of different magnitudes occurs in the longitudinal and transverse directions of the light-emitting portion LP (the compressive strain in the longitudinal direction is smaller than that in the transverse direction). As a result of this anisotropic strain in the light-emitting portion LP, the light emission from the light-emitting portion LP in the planar direction may have a specific polarization direction.

[0147] In the example shown in Figure 24, the longitudinal direction of the semiconductor portion 8N is the m' axis direction, and in this case, the polarization direction of the light emitted from the light-emitting portion LP is the a' axis direction. Experiments have confirmed that the light emitted from the light-emitting portion LP under compressive strain has a polarization characteristic in which the intensity in the a' axis direction is greater than the intensity in the m' axis direction. Whether compressive strain or tensile strain occurs in the light-emitting portion LP is determined in accordance with the relationship between the thermal expansion coefficients, lattice constants, etc., of the respective materials of the base substrate BS, the semiconductor portion 8N, and the upper layer 9. Due to the occurrence of in-plane anisotropy strain on the c plane, light with a specific polarization direction in the plane direction can be emitted from the light-emitting portion LP.

[0148] The diagram indicated by reference numeral 2402 in Figure 24 schematically shows the first nitride semiconductor portion NS1, the second nitride semiconductor portion NS2, and the upper reflective layer RL2 of the light-emitting element 30. The second nitride semiconductor portion NS2 is bonded to the first nitride semiconductor portion NS1 such that the a-axis direction of the first nitride semiconductor portion NS1 and the a'-axis direction of the second nitride semiconductor portion NS2 are aligned.

[0149] Light with a polarization direction in the a' axis direction is emitted from the second nitride semiconductor portion NS2 toward the first nitride semiconductor portion NS1 and the upper reflective layer RL2. Because the first nitride semiconductor portion NS1 has birefringence characteristics in which the polarization reflectance in the a-axis direction is relatively higher than the polarization reflectance in other directions, the polarization ratio of the reflected light from the first surface SF1 may be higher than that of the incident light to the first nitride semiconductor portion NS1. The light-emitting element 30 may be configured such that the first surface SF1 and the second surface SF2 are joined such that the angle between the specific polarization direction of the reflected light from the first surface SF1 of the first nitride semiconductor portion NS1 and the a' axis direction of the second nitride semiconductor portion NS2 is less than 5°. This makes it easier to further increase the polarization ratio of the laser light LB emitted from the light-emitting element 30 in a specific polarization direction.

[0150] Figure 24 shows a single stripe-shaped semiconductor portion 8N and upper layer portion 9, but as described above, multiple semiconductor portions 8N and upper layer portions 9 can be formed on the template substrate TS. The set of semiconductor portion 8N and upper layer portion 9 is referred to as a strip-shaped semiconductor portion. In one embodiment of the present disclosure, the semiconductor substrate comprises a template substrate TS including a seed region SA and a growth suppression region DA, and a plurality of strip-shaped semiconductor portions located above the template substrate TS, wherein the plurality of strip-shaped semiconductor portions are aligned in a first direction, and each strip-shaped semiconductor portion has a light-emitting portion (light-emitting layer) LP containing a c-plane nitride semiconductor, the light-emitting portion LP has anisotropic strain and emits polarization with the first direction as the polarization direction. A c-plane nitride semiconductor means a nitride semiconductor formed by c-plane film deposition.

[0151] In this way, a light-emitting element that emits polarized light can be obtained from each strip-shaped semiconductor portion. This polarized light may be laser light. The first direction may be the a' axis direction of the nitride semiconductor (e.g., GaN-based semiconductor). Multiple light-emitting elements may be obtained by cleaving each strip-shaped semiconductor portion (e.g., m-plane cleavage).

[0152] (j) In an alternative configuration of Example 1, the first surface SF1 may be the a-plane or any other non-polar surface. For example, the (11-20) plane of GaN can be grown on the r-plane ((1-102) plane) of a sapphire substrate. Various non-polar GaN films can be deposited using a grooved sapphire substrate.

[0153] (k) In one configuration example of the present disclosure, the light-emitting element 30 may be an RCLED, in which case the light emitted from the light-emitting element 30 in the planar direction has a specific polarization direction, and its polarization ratio may be smaller than the polarization ratio of the laser light LB in the specific polarization direction described above. The light emitted from the light-emitting element 30, which is an RCLED, may have a polarization ratio corresponding to the difference in polarization reflectance of the first nitride semiconductor part NS1 at the emission wavelength of the light emitted from the light-emitting part LP.

[0154] [Example 2] Figure 25 is a schematic plan view showing the configuration of the laser element equipped with a light-emitting element in Example 2. Figure 26 is a schematic cross-sectional view showing the configuration of the laser element equipped with a light-emitting element in Example 2.

[0155] As shown in Figures 25 and 26, the laser element 60 in Example 2 includes the light-emitting elements 30 shown in Figures 8 to 10. In one example, the laser element 60 is obtained by mounting a plurality of light-emitting elements 30 on a circuit board CB. The laser element 60 emits laser light LB in the thickness direction of the second nitride semiconductor part NS2. In the laser element 60, the laser light LB has a specific polarization direction. The specific polarization direction is, for example, the a-axis direction in the first nitride semiconductor part NS1. In the laser element 60, as described above, the first nitride semiconductor part NS1 has birefringence characteristics with respect to light of a specific emission wavelength from the light-emitting part LP of the second nitride semiconductor part NS2. As a result, light with a specific wavelength and a specific polarization direction resonates in the laser element 60.

[0156] The specific method for mounting the light-emitting element 30 on the circuit board CB is not particularly limited, and known methods can be used. In the example shown in Figure 25, the circuit board CB may have a base portion BD and a first pad portion P1 and a second pad portion P2 located above the base portion BD. A first conductive film MF1 may be provided to electrically connect the first pad portion P1 and the anode EA. A second conductive film MF2 may also be provided to electrically connect the second pad portion P2 and the cathode EC.

[0157] The laser element 60 may have an air gap SP between the light-emitting element 30 and the base portion BD.

[0158] A pad (first pad) that contacts the anode EA may be formed, in which case the first pad and the first conductive film MF1 may be electrically connected. The first pad may be a single-layer or multi-layer structure containing, for example, at least one of Au, Ag, Pd, Pt, Ni, Ti, V, W, Cr, Al, Cu, Zn, Sn, and In.

[0159] [Example 3] Figure 27 is a schematic diagram showing the configuration of an electronic device in Embodiment 3. The electronic device 70 in Figure 27 comprises a light-emitting element 30 and a control unit 80 including a processor that controls the light-emitting element 30. Examples of electronic devices 70 include communication devices, optical devices, display devices, lighting devices, sensor devices, information processing devices, medical devices, electric vehicles (EVs), etc.

[0160] [Additional notes] The inventions described herein have been explained above based on the drawings and examples. However, the inventions described herein are not limited to the embodiments and examples described above. That is, the inventions described herein can be modified in various ways within the scope shown in this disclosure, and embodiments obtained by appropriately combining the technical means disclosed in different embodiments and examples are also included in the technical scope of the inventions described herein. In other words, it should be noted that it is easy for those skilled in the art to make various modifications or alterations based on this disclosure. Furthermore, it should be noted that these modifications or alterations are included in the scope of this disclosure.

[0161] 〔summary〕 A light-emitting element in one aspect of the present disclosure comprises a first nitride semiconductor portion having a first plane perpendicular to a first crystal orientation, and a second nitride semiconductor portion having a second plane perpendicular to a second crystal orientation different from the first crystal orientation, and a light-emitting layer located above the second plane, and located above the first plane.

[0162] In the light-emitting element of embodiment 2 of this disclosure, the first surface and the second surface are joined together in embodiment 1.

[0163] In the light-emitting element of embodiment 3 of the present disclosure, in embodiment 1 or 2, the first nitride semiconductor portion has birefringence with respect to light traveling in the first crystal orientation.

[0164] In the light-emitting element of embodiment 4 of the present disclosure, in any one embodiment of embodiments 1 to 3, the second nitride semiconductor portion does not exhibit birefringence with respect to light traveling in the second crystal orientation.

[0165] In embodiment 5 of the present disclosure, the light-emitting element, in any one embodiment of embodiments 1 to 4, has a specific polarization direction with respect to the first crystal orientation, with respect to the light traveling from the first plane to the second plane.

[0166] In the light-emitting element of embodiment 6 of the present disclosure, in any one embodiment of embodiments 1 to 5, the light traveling from the first surface to the second surface has a polarization ratio of more than 50%.

[0167] In the light-emitting element of embodiment 7 of the present disclosure, in any one embodiment of embodiments 1 to 6, the first surface is a semipolar surface or a nonpolar surface.

[0168] The light-emitting element in embodiment 8 of the present disclosure is, in any one embodiment of embodiments 1 to 7, the first surface being an m-plane or an a-plane.

[0169] In the light-emitting element of embodiment 9 of the present disclosure, in any one embodiment of embodiments 1 to 8, the light traveling from the first surface toward the second surface has a specific polarization direction with respect to the first crystal orientation, the first crystal orientation being the m-axis direction, and the specific polarization direction being the a-axis direction.

[0170] In the light-emitting element of embodiment 10 of the present disclosure, in any one embodiment of embodiments 1 to 9, the light traveling from the first surface toward the second surface has a specific polarization direction with respect to the first crystal orientation, and the first surface and the second surface are joined such that the angle between the specific polarization direction and the a-axis direction of the second nitride semiconductor portion is less than 5°.

[0171] The light-emitting element in embodiment 11 of the present disclosure is an embodiment of any one of embodiments 1 to 10, wherein the second surface is a polar surface.

[0172] The light-emitting element in embodiment 12 of this disclosure is an embodiment of any one of embodiments 1 to 11, wherein the second surface is the -c surface.

[0173] In embodiment 13 of the present disclosure, the light-emitting element is a GaN-based semiconductor layer having a c-plane parallel to the second plane, in any one embodiment of embodiments 1 to 12.

[0174] In embodiment 14 of the present disclosure, the light-emitting element is such that, in any one embodiment of embodiments 1 to 13, the first nitride semiconductor portion is a lower reflective layer.

[0175] The light-emitting element in embodiment 15 of the present disclosure comprises an upper reflective layer above the light-emitting layer in any one embodiment of embodiments 1 to 14.

[0176] The light-emitting element in embodiment 16 of the present disclosure comprises a main substrate made of silicon carbide, sapphire, or GaN, in any one embodiment of embodiments 1 to 15, wherein the first nitride semiconductor portion is located on the main substrate.

[0177] In embodiment 17 of the present disclosure, the light-emitting element is such that the first surface and the second surface are directly joined together, as in any one embodiment of embodiments 1 to 16.

[0178] The light-emitting element in embodiment 18 of the present disclosure includes a transition layer between the first and second surfaces, in any one embodiment of embodiments 1 to 17.

[0179] In the light-emitting element of embodiment 19 of the present disclosure, the first surface and the second surface are joined together via a translucent bonding material, as in any one embodiment of embodiments 1 to 18.

[0180] In embodiment 20 of the present disclosure, the light-emitting element is such that, in any one embodiment of embodiments 1 to 19, the first nitride semiconductor portion and the second nitride semiconductor portion each include a GaN-based semiconductor.

[0181] In embodiment 21 of the present disclosure, the light-emitting element is such that, in any one embodiment of embodiments 1 to 20, the first nitride semiconductor layer is a lower reflective layer, and the lower reflective layer is a DBR having birefringence properties.

[0182] In embodiment 22 of the present disclosure, the light-emitting element is such that, in any one embodiment of embodiments 1 to 21, the first nitride semiconductor layer is a lower reflective layer, and the lower reflective layer includes a plurality of nitride crystal layers with different refractive indices.

[0183] In embodiment 23 of the present disclosure, the light-emitting element, in any one embodiment of embodiments 1 to 22, comprises a c-plane GaN-based semiconductor layer in the second nitride semiconductor portion.

[0184] In the light-emitting element of embodiment 24 of this disclosure, the RMS of the first surface and the second surface are 0.5 [nm] or less, in any one embodiment of embodiments 1 to 23.

[0185] In embodiment 25 of the present disclosure, the light-emitting element is composed of the same nitride semiconductor material on the first surface and the second surface, respectively, in any one embodiment of embodiments 1 to 24.

[0186] The light-emitting element in aspect 26 of the present disclosure comprises an upper reflective layer above the light-emitting layer in any one embodiment of aspects 1 to 25, wherein the upper reflective layer is a DBR including a plurality of dielectric layers.

[0187] In an embodiment 27 of the present disclosure, the light-emitting element, in any one embodiment of embodiments 1 to 26, includes a base portion located below the light-emitting layer, the base portion having a base and a pair of wing portions extending from the base on both sides.

[0188] In the light-emitting element of embodiment 28 of this disclosure, the light-emitting layer and the wing portion overlap in a plan view in embodiment 27.

[0189] The light-emitting element in aspect 29 of the present disclosure comprises an anode in aspect 27 or 28, wherein the anode and the wing portion overlap in a plan view.

[0190] The laser element in embodiment 30 of this disclosure comprises an light-emitting element according to any one embodiment of embodiments 1 to 29.

[0191] The laser element in embodiment 31 of this disclosure emits laser light in the thickness direction of the second nitride semiconductor portion in embodiment 30.

[0192] In embodiment 32 of this disclosure, the laser element, in embodiment 31, has a specific polarization direction for the laser light.

[0193] In embodiment 33 of this disclosure, the laser element resonates with light having a specific wavelength and a specific polarization direction, as in embodiment 32.

[0194] The electronic device in aspect 34 of the present disclosure comprises a light-emitting element according to any one of aspects 1 to 29.

[0195] The semiconductor substrate in embodiment 35 of the present disclosure comprises a template substrate including a seed region and a growth inhibition region, and a plurality of strip-shaped semiconductor portions located above the template substrate, wherein the plurality of strip-shaped semiconductor portions are aligned in a first direction, and each strip-shaped semiconductor portion has an emissive layer containing a c-plane nitride semiconductor, the emissive layer has anisotropic strain, and emits polarization with the first direction as the polarization direction.

[0196] A method for manufacturing a light-emitting element according to aspect 36 of the present disclosure includes the steps of: forming a first nitride semiconductor portion having a first plane perpendicular to a first crystal orientation; forming a second nitride semiconductor portion having a second plane perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second plane; and joining the first plane and the second plane.

[0197] A method for manufacturing a light-emitting element in embodiment 37 of the present disclosure is as follows: In embodiment 36, the first nitride semiconductor portion is grown on a main substrate, the second nitride semiconductor portion grown on a template substrate including a seed region and a growth suppression region is peeled off, and the second surface of the peeled second nitride semiconductor portion is bonded to the first surface of the first nitride semiconductor portion.

[0198] In the method for manufacturing a light-emitting element in embodiment 38 of the present disclosure, the first surface and the second surface are joined by heating and pressurizing, in embodiment 37.

[0199] In the method for manufacturing a light-emitting element according to aspect 39 of the present disclosure, the first surface and the second surface are joined together via a translucent bonding material, as in aspect 37.

[0200] The light-emitting device manufacturing apparatus in aspect 40 of this disclosure performs each step included in the light-emitting device manufacturing method of any one of aspects 36 to 39. [Explanation of Symbols]

[0201] 8 Base section 9. Upper Management 30 light-emitting elements BP joint CO1 1st crystal orientation CO2 secondary crystal orientation EA Anode EC Cathode LB laser light LP light-emitting section NS1 First Nitride Semiconductor Section NS2 Second Nitride Semiconductor Section RL2 Upper reflective layer SF1 page 1 SF2 2nd page

Claims

1. A first nitride semiconductor portion having a first plane perpendicular to the first crystal orientation, A light-emitting element comprising a second plane perpendicular to a second crystal orientation different from the first crystal orientation, and a second nitride semiconductor portion located above the first plane, having a second plane perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second plane.

2. The light-emitting element according to claim 1, wherein the first surface and the second surface are joined together.

3. The light-emitting element according to claim 1, wherein the first nitride semiconductor portion has birefringence with respect to light traveling in the first crystal orientation.

4. The light-emitting element according to claim 1, wherein the second nitride semiconductor portion does not exhibit birefringence with respect to light traveling in the second crystal orientation.

5. The light-emitting element according to claim 1, wherein the light traveling from the first surface toward the second surface has a specific polarization direction with respect to the first crystal orientation.

6. The light-emitting element according to claim 1, wherein the light traveling from the first surface to the second surface has a polarization ratio of more than 50%.

7. The light-emitting element according to claim 1, wherein the first surface is a semipolar surface or a nonpolar surface.

8. The light-emitting element according to claim 1, wherein the first surface is the m-plane or the a-plane.

9. The first crystal orientation is in the m-axis direction, The light-emitting element according to claim 5, wherein the specific polarization direction is the a-axis direction.

10. The light-emitting element according to claim 5, wherein the first surface and the second surface are joined such that the angle between the specific polarization direction and the a-axis direction of the second nitride semiconductor portion is less than 5°.

11. The light-emitting element according to claim 1, wherein the second surface is a polar surface.

12. The light-emitting element according to claim 1, wherein the second surface is the -c surface.

13. The light-emitting element according to claim 1, wherein the light-emitting layer is a GaN-based semiconductor layer having a c-plane parallel to the second surface.

14. The light-emitting element according to claim 1, wherein the first nitride semiconductor portion is a lower reflective layer.

15. The light-emitting element according to claim 14, further comprising an upper reflective layer above the light-emitting layer.

16. The light-emitting element according to claim 1, comprising a transition layer between the first surface and the second surface.

17. The light-emitting element according to claim 1, wherein the first surface and the second surface are joined together via a translucent bonding material.

18. The light-emitting element according to claim 1, wherein each of the first nitride semiconductor portion and the second nitride semiconductor portion includes a GaN-based semiconductor.

19. The invention comprises a template substrate including a seed region and a growth inhibition region, and a plurality of strip-shaped semiconductor portions located above the template substrate. The plurality of strip-shaped semiconductor portions are arranged in a first direction, and each strip-shaped semiconductor portion has an emissive layer containing a c-plane nitride semiconductor. The light-emitting layer is a semiconductor substrate having anisotropic strain and emitting polarization with the first direction as the polarization direction.

20. A step of forming a first nitride semiconductor portion having a first plane perpendicular to the first crystal orientation, A step of forming a second nitride semiconductor portion having a second plane perpendicular to a second crystal orientation different from the first crystal orientation and a light-emitting layer located above the second plane, A method for manufacturing a light-emitting element, comprising the step of joining the first surface and the second surface.

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