Electret capsule

Abstract

The present invention relates generally to the field of electret capsules, and more particularly to an impedance converter circuit configuration integrated into an electret capsule for a condenser microphone or the like. The microphone electret capsule may include a gate-biased field-effect transistor (FET) to facilitate biasing of the low-noise FET. Advantageously, using a low-noise FET in the microphone electret capsule can reduce costs while reducing self-noise.

Description

Technical Field

[0001] The present invention generally relates to the field of electret capsules, and more particularly to the circuit configuration of an impedance converter integrated into an electret capsule for use in pre-polarized condenser microphones and the like.

Background Art

[0002] Electret capsules are commonly used in microphone designs and are readily available. However, with the development of microelectromechanical system (MEMS) capsules, electret capsules are beginning to lose popularity. MEMS capsules have replaced electret capsules in most applications because of their low manufacturing cost. However, MEMS capsules have the disadvantages of high noise and difficulty in easily utilizing the directional polarity response. Although they do not have a significant impact on household appliances, the signal output quality of high-end microphones used by professionals has been significantly degraded.

[0003] As the popularity of MEMS capsules increases, the supply of electronic components for creating low-noise and high-performance electret capsules is rapidly decreasing.

[0004] Therefore, there is a need for an alternative approach to electret capsule circuits that is suitable for use in high-end microphones and provides functions equivalent to or improved over those of conventional electret capsules. The present invention meets this need.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The present invention generally relates to the field of electret capsules, and more particularly to the circuit configuration of an impedance converter integrated into an electret capsule for use in pre-polarized condenser microphones and the like.

Means for Solving the Problems

[0006] As detailed below, the electrical circuit of an electret capsule may include one or more field-effect transistors (FETs), diodes (such as Zener diodes), resistors, capacitors, and inductors.

[0007] In one embodiment, the present invention provides an electret capsule for a microphone, comprising one or more field-effect transistors (FETs), bias diodes, and bias resistors arranged within an electrical circuit.

[0008] In another embodiment, the arrangement of bias diodes and bias resistors in the electrical circuit may be configured to provide a combined “hybrid bias” to the FET. Diode bias provides excellent noise reduction and signal gain but lacks temperature stability, while resistor bias provides temperature stability but offers no improvement in noise reduction. The hybrid bias configuration is thought to provide a synergistic combination of the two prior art bias forms.

[0009] In yet another embodiment, the electret capsule may further include a “capsule FET” within the electrical circuit, the arrangement of which may be configured to bias the FET. In one embodiment, the capsule FET may be added to the bias resistor. In another embodiment, the capsule FET may replace the bias resistor in the electrical circuit.

[0010] In a further embodiment, the electret capsule may include one or more capacitors and an inductor in series within the electrical circuit. The arrangement of the inductor and capacitor can facilitate improved noise suppression of the circuit with respect to the output signal.

[0011] While various modifications and alternative forms are possible for the present invention, specific exemplary embodiments are shown in the drawings as examples and described in detail herein. However, it should be understood that the invention is not intended to be limited to any specific embodiment disclosed, but rather to encompass all modifications, equivalents, and alternatives that fall within the scope of the invention as defined by the appended claims. [Brief explanation of the drawing]

[0012] Embodiments are shown illustratively, not limitingly, in the drawings of the attached drawings, and similar reference numerals indicate similar elements.

[0013] [Figure 1A] This is an exploded view of an exemplary microphone assembly, including an electret capsule. [Figure 1B] Figure 1A shows an example of the connections of the electret capsule. [Figure 2A] This is a perspective view of an exemplary electret capsule connected to an exemplary printed circuit board (PCB). [Figure 2B] Figure 2A is a perspective view of an electret capsule isolated from a PCB. [Figure 2C] Figure 2A is a side view of the electret capsule. [Figure 2D] Figure 2A is a bottom view of the electret capsule. [Figure 2E] Figure 2A is a top view of the electret capsule and PCB. [Figure 3] This is an exploded view of an exemplary electret capsule. [Figure 4] An example of an electret capsule circuit configuration is shown. [Figure 5] Another circuit configuration for an exemplary electret capsule is shown. [Modes for carrying out the invention]

[0014] This invention generally relates to the field of electret capsules, and more particularly to the circuit configuration of an impedance transducer integrated into an electret capsule for use in pre-polarized condenser microphones and the like. The electret capsule of a microphone may include a gate-biased field-effect transistor (FET) to facilitate biasing of a low-noise FET. Advantageously, by using a low-noise FET within the electret capsule of a microphone, temperature stability can be improved while reducing self-noise.

[0015] Here, similar numbers refer to drawings representing similar components. Figure 1A shows an exemplary microphone assembly 100. As shown, the microphone assembly 100 may include a front cap 102, a coarse mesh 104, a fine mesh 106, an electret condenser capsule 108, a wire assembly 110, a protective mesh 112, a body 114, an audio connector 116, and a rear cap 118. It is thought that any type of microphone or microphone element can be used, such as a unidirectional or omnidirectional microphone.

[0016] As shown in the illustration, the components of the microphone 100 may be housed within the body 114 between the front cap 102 and the rear cap 118. Although the body 114 is shown to be substantially tubular, other shapes are also possible. As shown in the illustration, the body 114 may include one or more openings 115 that allow sound waves to enter. The body 114 and the front / rear caps 102, 118 may be made of the same or different materials, such as metal or plastic.

[0017] As described above, the microphone 100 can include one or more layers of meshes 104, 106, 112. The one or more mesh layers are used to adjust the acoustic impedance characteristics of the microphone 100 and can prevent the intrusion of foreign objects and fine particles. Examples of mesh materials that can be used include non-metallic (e.g., non-conductive) materials such as woven polyester or PVC-coated polyester cloth. Generally, the mesh material can be formed of any suitable fabric material that exhibits acceptable acoustic performance, such as, for example, a sound transparency of 90% or more.

[0018] As shown in FIGS. 1A - 1B, the microphone 100 can further include an electret capsule 108 connected to an audio connector 116 via a wire 110. The electret capsule 108 can include a bias configuration of a field effect transistor to achieve low noise, as will be detailed below. Although a wire is shown, other connection types such as pin connections or terminal connections are also conceivable. As shown in FIG. 1B, the wire 110 can be soldered to a printed circuit board 120 of the electret capsule 108.

[0019] The audio connector 116 can facilitate transmitting audio signals such as analog frequencies and digital frequencies, for example, to a speaker. In one example, the audio connector 116 can be an XLR connector having three to seven pins.

[0020] FIGS. 2A - 2E show an exemplary electret capsule 200. As shown, the electret capsule 200 can include a housing 202 and a printed circuit board (PCB) 204. The housing 202 can include a top surface 206 and a bottom surface 208. As shown, the PCB 204 can be connected to the top surface 206 via, for example, a contact spring, as will be detailed below.

[0021] The electret capsule 200 is not limited to specific dimensions, but the width of the housing 202 can be in the range of about 4 mm to about 8 mm, preferably about 5 mm to about 7 mm. In one embodiment, the width of the housing 202 is about 6.3 mm. The diameter of the electret capsule 200 can be in the range of about 4 mm to about 20 mm, preferably about 12 mm to about 16 mm. In one embodiment, the diameter of the electret capsule 200 is about 14 mm.

[0022] FIG. 3 shows an exploded view of an exemplary electret capsule 300. As shown, the electret capsule 300 can include a backplate assembly 302, a diaphragm assembly 304, and a housing 306. The housing 306 can be configured to hold the components of the assemblies 302, 304.

[0023] The backplate assembly 302 can include a support member 308. The support member 308 can include an opening 310 defined by one or more inner walls 311. A conductive rod 312 can be slidably disposed within the opening 310. A contact spring 314 is disposed around the rod 312 and abuts against the inner wall of the opening 310. The spring 314 can facilitate electrical contact between the rod and a damping disk 316 that can contact the backplate 318. The damping disk 316 can be made of a non-conductive porous material such as non-woven fabric or foam.

[0024] The backplate 318 can be a conductive perforated disk coated with an electret material such as polytetrafluoroethylene (PTFE) to which a permanent polarization charge is imparted. Although not shown in FIG. 3, the backplate 318 can be electrically connected to a printed circuit board (PCB) via the spring 314.

[0025] The backplate 318 may be electrically isolated from the diaphragm 320 of the assembly 304 via a non-conductive gasket 322. The diaphragm 320 may be made of a flexible material configured to vibrate in response to sound waves. For example, the diaphragm 320 may be a flexible film that forms a vibrating diaphragm in response to sound waves passing through the mesh 324. The diaphragm 320 may be electrostatically polarized so that vibration in response to sound waves generates an alternating potential between the diaphragm 320 and the backplate 318. Furthermore, the backplate 318 may include a plurality of holes that contribute to the sound level between the diaphragm 320 and the backplate 318.

[0026] Figures 4 and 5 show exemplary circuits 400, 500 of an electret capsule, which includes one or more field-effect transistors (FETs), bias diodes, and bias resistors arranged within an electrical circuit. The capsule is thought to be a type of capsule that requires a polarization power supply.

[0027] As shown in Figures 4 and 5, the electret capsule may include a gate-biased field-effect transistor (gate-biased FET) to facilitate biasing of the low-noise FET. Advantageously, by using low-noise FETs within the electret capsule, self-noise can be reduced while lowering costs.

[0028] As shown in Figure 4, the exemplary circuit 400 may include two FETs or junction field-effect transistors (J-FETs) 404, 406, a resistor 408, an inductor 410, three capacitors 412, 414, 416, and three test points 418, 420, 422. Each FET 404, 406 includes a source electrode, a drain electrode, and a gate electrode.

[0029] As shown in Figure 4, FETs 404 and 406 can be arranged according to the bias configuration such that the first FET 404 becomes an impedance converter-low noise FET and the second FET 406 becomes a gate bias FET. Input 402 is provided to the gate electrodes of the first FET 404 and the second FET 406. The source electrode of the first FET 404 is connected to the source electrode of the second FET 406 and to ground via resistor 408. Capacitor 416 may be configured as a bypass capacitor in parallel with resistor 408.

[0030] The drain electrode of the first FET 404 can be grounded via a series inductor 410 and one or more bypass capacitors 412, 414. The arrangement of the inductor 410 and capacitors 412, 414 can facilitate improved noise rejection of the circuit with respect to the output signal 422. The drain electrode of the second FET 406 is open because it is used to bias the first FET 404.

[0031] As shown in Figure 5, the exemplary circuit 500 may include two FETs 504, 506, two voltage reference diodes (e.g., Zener diodes) 508, 510, two resistors 512, 514, three capacitors 516, 518, 520, and an inductor 522. Each FET 504, 506 (which may be J-FETs) includes a source electrode, a drain electrode, and a gate electrode.

[0032] As shown in the figure, FETs 504 and 506 can be arranged according to the bias configuration such that the first FET 504 acts as an impedance converter-low noise FET and the second FET 506 acts as a gate bias FET. An input signal 502 may be supplied to the gate electrodes of the first FET 504 and the second FET 506.

[0033] The source electrode of the first FET 504 is connected to the source electrode and ground of the second FET 506 via two Zener diodes 508 and 510, thereby establishing a positive bias potential at the source electrode. In one embodiment, the Zener diodes 508 and 510 may be Schottky diodes.

[0034] Zener diodes 508 and 510 can be connected in parallel with resistor 512 and capacitor 516. The arrangement of bias diodes and bias resistors in the electrical circuit can be configured to provide a combined “hybrid bias” to FETs 504 and 506. Resistor 512 is shown to have a resistance of 1K, but its value can be changed to compensate for changes in the characteristics of FETs 504 and 506.

[0035] The drain electrode of the first FET 504 may be grounded via a series inductor 522 and one or more bypass capacitors 518, 520. The arrangement of inductor 522 and capacitors 518, 520 can facilitate improved noise rejection of the circuit with respect to the output signal 524.

[0036] The drain electrode of the first FET 504 may be connected in series with a resistor 514, which can be configured as a current-limiting resistor. The drain electrode of the second FET 506 is open because the second FET 506 is used to bias the first FET 504.

[0037] As shown in Figures 4 and 5, a gate bias FET or J-FET can facilitate the biasing of a low-noise FET or J-FET, thereby avoiding the need for costly and size-constrained components required to achieve the bias described above. This allows for the low-cost use of a low-noise J-FET within an electret capsule microphone while reducing self-noise.

[0038] Further modifications and alternative embodiments of various aspects of the present invention will be apparent to those skilled in the art. Therefore, this specification should be interpreted as merely illustrative and is intended to teach those skilled in the art general methods of carrying out the present invention. The forms of the present invention shown and described in this application should be considered examples of embodiments. It will be apparent to those skilled in the art, after benefiting from the description of the present invention, that components can be replaced with those illustrated and described in this application, parts and processes can be reversed, and certain features of the present invention can be used independently. The elements described in this application may be modified without departing from the spirit and scope of the present invention as set forth in the claims.

Claims

1. A bias configuration of two or more field-effect transistors (FETs) including a source electrode, a drain electrode, and a gate electrode, A backplate assembly including a backplate, an acoustic housing, one or more damping discs, and a contact spring, A diaphragm assembly connected to the backplate assembly via a gasket, External housing including protective mesh and Includes, The bias configuration comprises an electret capsule in which the source electrode of at least a first FET of the two or more FETs is electrically connected to the source electrode of at least a second FET of the two or more FETs, the first FET is an impedance converter-low noise FET, and the second FET is a bias FET configured to facilitate biasing of the first FET, including an open-drain configuration.

2. The electret capsule according to claim 1, wherein the backplate is connected to a printed circuit board (PCB) via the contact spring.

3. The electret capsule according to claim 1, further comprising a connector, the connector comprising at least one of PCB pins, wire leads, and terminals.

4. First and second field-effect transistors (FETs) including a source electrode, a drain electrode, and a terminal electrode, The bias configuration of the first and second FETs is such that the first FET is an impedance converter-low noise FET, the second FET is a bias FET, and the source electrode of the first FET is electrically connected to the source electrode of the second FET, A current setting element connected to the source electrode of the first FET, A bypass capacitor in parallel with the current setting element, Includes, An electret capsule circuit in which the drain electrode of the second FET is open.

5. The electret capsule circuit according to claim 4, wherein the first FET and the second FET are junction field-effect transistors (J-FETs).

6. The electret capsule circuit according to claim 4, wherein the current setting element is at least one of a resistor and a Zener diode.

7. The electret capsule circuit according to claim 4, wherein the drain electrode of the first FET is grounded via a current-limiting resistor.

8. The electret capsule circuit according to claim 4, wherein the drain electrode of the first FET is grounded via one or more bypass capacitors in parallel and an inductor in series.

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