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Patent Information
- Application Number
- JP2025136849
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-07-25
- Filing Date
- 2025-08-20
- Publication Date
- 2026-08-21
- Estimated Expiration
- 2044-06-25
Smart Images

Figure 0007909671000001 
Figure 0007909671000002 
Figure 0007909671000003
Abstract
Description
Technical Field
[0001] The present invention relates to a chip, and more particularly to a chip capable of preventing a lead of a circuit board from contacting a metal burr or a metal cut surface of the chip.
Background Art
[0002] In the scribing process, scribing is performed along the scribing line 11 of the wafer 10 by a tool (not shown), and the wafer 10 is cut into a plurality of chips 12 (see FIGS. 1 and 2). The tool cuts a metal layer (for example, a circuit and a mark) located on the scribing line 11, and the metal layer forms a metal cut surface 14 on the side wall 13 of the chip 12. The metal layer has ductility, and the metal cut surface 14 generates a metal burr 16 that protrudes from the active surface 15. [[ID=I3]]
Summary of the Invention
Problems to be Solved by the Invention
[0003] As shown in FIG. 2, when joining the lead 21 of the circuit board to the bump 17 of the chip 12, there is a possibility that the lead 21 contacts the metal cut surface 14 or the metal burr 16, causing a short circuit or an electrical abnormality.
[0004] Therefore, the inventor of the present invention considered that the above-mentioned drawbacks could be improved, and as a result of repeated intensive studies, the present invention was proposed to effectively improve the above-mentioned problems by a reasonable design.
[0005] The present invention has been made in view of the above, and an object thereof is to provide a chip that supports a lead of a circuit board by at least one support member protruding from an active surface.
Means for Solving the Problems
[0006] To solve the above problems, a chip according to one aspect of the present invention comprises at least one bump, at least one support member, a metal layer, and a protective layer. The bump is installed on the active surface and is used to bond leads of a circuit board. The support member is installed on the active surface and is used to support the leads. The support member is located between the bump and the first side edge of the active surface, and the bump and the support member protrude from the active surface. The first height of the bump is greater than or equal to the second height of the support member. The metal layer has at least one conductive pad and a seal ring, the seal ring winds around the conductive pad, the protective layer covers the seal ring but does not cover the conductive pad, the active surface is the surface of the protective layer, the bump is electrically connected to the conductive pad, the seal ring is projected onto the active surface and a seal ring projection is formed, and the support member is installed between the seal ring projection and the first side edge.
[0007] When joining the bump to the lead, a support member protruding from the active surface is used to support the lead, and by suspending the lead above the first side edge of the active surface, problems such as short circuits or electrical abnormalities caused by the lead coming into contact with a metal cut surface or metal burr located on the first side edge are prevented. [Brief explanation of the drawing]
[0008] [Figure 1] This is a plan view of a conventional wafer. [Figure 2] This is a cross-sectional view showing a conventional chip. [Figure 3] A partial plan view showing a chip according to one embodiment of the present invention. [Figure 4] This is a cross-sectional view showing a chip according to one embodiment of the present invention. [Figure 5] A partial plan view showing a chip according to one embodiment of the present invention. [Figure 6] This is a cross-sectional view showing a chip according to one embodiment of the present invention. [Modes for carrying out the invention]
[0009] The embodiments of the present invention will be described in detail below. However, the present invention is not limited thereto, and various modifications are possible within the scope described. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included within the technical scope of the present invention. The embodiment shown in Figure 6 corresponds to an embodiment for carrying out the invention described in the claims.
[0010] Multiple chips 100 are formed on a wafer (not shown) after scribing, and each chip 100 has an active surface 110, at least one bump 120, at least one support member 130, a metal layer 140, a protective layer 150, and at least one circuit layer 160 (see Figures 3 and 4). The bump 120 and the support member 130 are placed on the active surface 110, and the bump 120 is located in the bump setting area 112 of the active surface 110 and protrudes from the active surface 110, and is used to bond leads 210 of the circuit board 200. The chips are flip-chip bonded to the circuit board.
[0011] As shown in Figures 3 and 4, the metal layer 140 has a plurality of conductive pads 141, a seal ring 142, and at least one mark 143. In this embodiment, the mark 143 is located on the scribe line (not shown) of the wafer, but the present invention is not limited thereto. The circuit layer 160 is connected to the conductive pads 141, the seal ring 142 winds around the conductive pads 141, and the protective layer 150 covers the seal ring 142 and the circuit layer 160, but does not cover the conductive pads 141. In this embodiment, the active surface 110 of the chip 100 is the surface of the protective layer 150, and the bump 120 is electrically connected to at least one conductive pad 141.
[0012] As shown in Figures 3 and 4, after the scribe process, at least one side wall 100a is formed on each of the chips 100, a circuit cut surface 161 is formed on the side wall 100a of the circuit layer 160, and a mark cut surface 143a is formed on the side wall 100a of the mark 143. Because the metal layer 140 and the circuit layer 160 are ductile, metal burrs 143b protruding onto the active surface 110 may occur on the mark cut surface 143a, and metal burrs (not shown) protruding onto the active surface 110 may also occur on the circuit cut surface 161.
[0013] As shown in Figures 3 and 4, the support member 130 protrudes from the active surface 110 and is located between the bump 120 and the first side edge 111 of the active surface 110. The material of the support member 130 is selected from a polymer material or a non-conductive material. Preferably, each tip 100 has a plurality of support members 130, and between adjacent support members 130 there is an opening 170 that communicates with the first side edge 111 of the active surface 110 and the bump setting area 112. Underfill (not shown) flows from the first side edge 111 to the bump setting area 112 through the opening 170, sealing the bump 120 and the lead 210. The bump 120 and the support member 130 protrude from the active surface 110, respectively, and the first height H1 of the bump 120 is greater than or equal to the second height H2 of the support member 130. In this embodiment, the first height H1 is higher than the second height H2, and the difference between the first height H1 and the second height H2 is 7 μm or less, preferably the second height H2 is 5 μm or more. When joining the joint end 211 of the lead 210 to the bump 120, the support member 130 is used to support the exposed portion 212 of the lead 210 so as to prevent the exposed portion 212 from coming into contact with the mark cut surface 143a, the metal burr 143b, the circuit cut surface 161, or the metal burr of the circuit cut surface 161.
[0014] As shown in Figure 4, there is a first distance S1 between the bump 120 and the support member 130, the imaginary line 111a extends along the first side edge 111 of the active surface 110, and there is a second distance S2 between the support member 130 and the imaginary line 111a, with the ratio of the first distance S1 to the second distance S2 (S1 / S2) being in the range of 0.5 to 100. By controlling the ratio of the first distance S1 to the second distance S2, the rigidity of the exposed portion 212 is increased, preventing the exposed portion 212 from bending and coming into contact with the mark cut surface 143a, the metal burr 143b, the circuit cut surface 161, or the metal burr of the circuit cut surface 161.
[0015] As shown in Figures 3 and 4, the seal ring 142 is projected onto the active surface 110, and the seal ring projection 142a is formed. In this embodiment, the support member 130 is located between the bump 120 and the seal ring projection 142a. The axis extends from the support member 130 toward the first side edge, and along the axis X direction, the support member 130 has a width W, preferably 5 μm or more, and not longer than the distance from the bump 120 to the seal ring projection 142a. The outer wall 131 of the support member 130 is adjacent to the first side edge 111 of the active surface 110, and the inner wall 132 of the support member 130 is adjacent to the bump 120. The third distance S3 between the outer wall 131 and the seal ring projection 142a is 1 μm or more and 100 μm or less. The first distance S1 between the inner wall 132 and the bump 120 is 1 μm or more and 100 μm or less.
[0016] As shown in Figures 3 and 4, the bump 120 has a first length L1 and the support member 130 has a second length L2 along a direction perpendicular to the axis X, with the second length L2 being greater than or equal to the first length L1. The bump 120 is projected onto the support member 130 along the direction of the axis X, forming a bump projection 121 on the support member 130. The bump projection 121 has a second side 121a, and the support member 130 has a third side 133 adjacent to the second side 121a. Along a direction perpendicular to the axis X, the fourth distance S4 from the second side 121a to the third side 133 is 1 μm or more and 10 μm or less. When the lead 210 is joined to the bump 120 at an angle, the support member 130 supports the exposed portion 212.
[0017] As shown in Figures 4, 5, and 6, in other embodiments, the support member 130 is installed between the seal ring projection 142a and the first side edge 111. The support member 130 is used to support the exposed portion 212 so as to prevent the exposed portion 212 from coming into contact with the mark cut surface 143a, the metal burr 143b, the circuit cut surface 161, or the metal burr of the circuit cut surface 161 when the joint end 211 is joined to the bump 120. In other embodiments, the outer wall 131 of the support member 130 is aligned with the side wall 100a of the tip 100 (not shown).
[0018] The present invention supports a lead 210 joined to a bump 120 by a support member 130 protruding from the active surface 110, suspending the exposed portion 212 of the lead 210 above the first side edge 111 of the active surface 110, thereby preventing problems such as short circuits or electrical abnormalities occurring due to the exposed portion 212 contacting a metal cut surface and / or metal burr located on the first side edge 111.
[0019] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications or improvements can be made to the above embodiments. It will be clear from the claims that such modified or improved forms may also be included in the technical scope of the present invention. [Explanation of symbols]
[0020] 10 wafers 11 scribe lines 12 chips 13 side walls 14 metal cut surfaces 15 active surfaces 16 metal burrs 17 bumps 21 leads 100 chips 100a side walls 110 active surfaces 111 first side 111a virtual line 112 bump setting area 120 bumps 121 bump projection 121a second side 130 support members 131 outer side walls 132 inner side walls 133 third side 140 metal layers 141 conductive pads 142 seal rings 142a seal ring projection 143 marks 143a mark cut surface 143b metal burrs 150 protective layers 160 circuit layers 161 circuit cut surface 170 openings<0000120>210 leads 211 bonding ends 212 exposed parts H1 first height H2 second height L1 first length L2 second length S1 first distance S2 second distance S3 third distance S4 fourth distance W width X axis line
Claims
1. At least one bump located on the active surface and used to connect the leads of the circuit board, At least one support member is installed on the active surface and is located between the bump and the first side edge of the active surface, the support member is used to support the lead, the bump and the support member protrude from the active surface, and the first height of the bump is greater than or equal to the second height of the support member and the at least one support member. It comprises a metal layer and a protective layer, The chip is characterized in that the metal layer has at least one conductive pad and a seal ring, the seal ring is wound around the conductive pad, the protective layer covers the seal ring but not the conductive pad, the active surface is the surface of the protective layer, the bump is electrically connected to the conductive pad, the seal ring is projected onto the active surface and a seal ring projection is formed, and the support member is installed between the seal ring projection and the first side edge.
2. The chip according to claim 1, characterized in that the first height is greater than the second height, and the difference between the first height and the second height is 7 μm or less.
3. The chip according to claim 2, characterized in that the second height is 5 μm or more.
4. The tip according to claim 1, characterized in that there is a first distance between the bump and the support member, the imaginary line extends along the first side of the active surface, there is a second distance between the support member and the imaginary line, and the ratio of the first distance to the second distance is in the range of 0.5 to 100.
5. The chip according to claim 4, characterized in that the axis extends from the support member toward the first side edge, and the support member has a width along the axial direction, and the width is not less than 5 μm.
6. The chip according to claim 1, comprising a plurality of support members, with an opening between adjacent support members, the bump being installed in the bump setting area of the active surface, and the opening communicating with the first side and the bump setting area.
7. The chip according to claim 1, characterized in that the outer wall of the support member is aligned with the side wall of the chip.
8. The chip according to claim 1, characterized in that the axis is from the support member toward the first side edge, the bump is projected onto the support member along the axial direction, the bump has a first length along the direction perpendicular to the axis, the support member has a second length, and the second length is greater than or equal to the first length.
9. The chip according to claim 8, characterized in that the bump forms a bump projection on the support member, the bump projection has a second side, the support member has a third side adjacent to the second side, and the fourth distance from the second side to the third side along the direction perpendicular to the axis is 1 μm or more.
Citation Information
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