Wafer shape evaluation method

Abstract

To provide a method for evaluating a shape of a wafer which can properly evaluate a shape of a wafer with a notch.SOLUTION: The method for evaluating the shape of the wafer includes the steps of: measuring the flatness of a plurality of regions in an outer peripheral part of the wafer; and evaluating a shape of the wafer on the basis of a difference between an average value or a center value of the flatnesses of regions not including notches of a plurality of regions and the flatnesses of the regions including the notches.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a method for evaluating the shape of a wafer.

Background Art

[0002] When performing a double-sided polishing process for polishing both main surfaces of a wafer with a notch formed thereon, a notch mirror polishing process for mirror-polishing the chamfer portion of the notch, an outer peripheral mirror polishing process for mirror-polishing the chamfer portion of the outer periphery, and a finish polishing process for finish-polishing one of the main surfaces, the edge roll-off of the boundary portion between the one main surface and the notch chamfer portion of the notch (hereinafter sometimes referred to as "sagging of the notch portion") is more likely to be larger than the edge roll-off of the boundary portion between the one main surface and the outer peripheral chamfer portion of the outer periphery of the wafer (hereinafter sometimes referred to as "sagging of the outer peripheral portion"). When the difference between the sagging of the notch portion and the sagging of the outer peripheral portion is large, it is likely to cause defects in subsequent processes. As a method for evaluating the occurrence situation of such sagging, Patent Document 1 discloses a method of measuring the ESFQR (Edge flatness metric, Sector based, Front surface referenced, least sQuares fit reference plane, Range of the data within sector) of a wafer, and evaluating the occurrence situation of the edge roll-off (sagging) of the notch chamfer portion based on the difference between the ESFQR of the notch site including the notch and the maximum value of the ESFQR of the site not including the notch.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, the evaluation method described in Patent Document 1 may not be able to properly evaluate the sagging of the notch portion.

[0005] The present invention aims to provide a wafer shape evaluation method that can appropriately evaluate the shape of a wafer having a notch. [Means for solving the problem]

[0006] The wafer shape evaluation method of the present invention is a wafer shape evaluation method having a notch, wherein the flatness of a plurality of regions in the outer periphery of the wafer is measured, and the shape of the wafer is evaluated based on the difference between the average or median value of the flatness of the region that does not include the notch and the flatness of the region that includes the notch.

[0007] The present invention relates to a wafer shape evaluation method for a wafer having a notch, wherein the flatness of a plurality of regions in the outer periphery of the wafer is measured, and the shape of the wafer is evaluated based on the difference between the average or median value of the flatness of the plurality of regions and the flatness of the region containing the notch among the plurality of regions.

[0008] In the wafer shape evaluation method of the present invention, it is preferable that the index representing the flatness is ESFQR. [Brief explanation of the drawing]

[0009] [Figure 1] This is a block diagram showing a wafer and a wafer shape evaluation system according to an embodiment. [Figure 2] This is a flowchart showing the wafer shape evaluation method according to the embodiment. [Figure 3] This graph shows an example of the measurement results of ESFQR according to the embodiment. [Figure 4] This is a schematic diagram showing the shape of the notch area and the average shape of the outer edge of wafers at levels A and B according to the embodiment. [Modes for carrying out the invention]

[0010] [Embodiment] <Wafer composition to be evaluated> First, the wafer configuration evaluated by the wafer shape evaluation system according to an embodiment of the present invention will be described. Figure 1 is a block diagram showing a wafer and a wafer shape evaluation system. As shown in Figure 1, the wafer W evaluated by the shape evaluation system 1 has a notch Wn formed at one location on its outer circumference. Before being evaluated by the shape evaluation system 1, the wafer W undergoes a double-sided polishing process, a notch mirror polishing process, an outer circumference mirror polishing process, and a finish polishing process. In some cases, a chamfering process is performed on the edge of the wafer W before the double-sided polishing process. In wafer W, after the above process has been performed, sagging occurs at the boundary between one main surface and the notch chamfer, and at the boundary between one main surface and the outer periphery chamfer. The sagging in the notch area is greater than the sagging in the outer periphery. The notch mirror polishing process may be performed before the double-sided polishing process. Furthermore, wafer W may be composed of materials such as silicon, germanium, gallium arsenide, gallium phosphide, and indium phosphide.

[0011] <Configuration of the shape evaluation system> Next, we will describe the wafer shape evaluation system 1 for wafer W. The wafer shape evaluation system 1 comprises a measuring device 2 and a shape evaluation device 3.

[0012] The measuring device 2 measures the ESFQR as the flatness of the outer edge of the wafer W. The ESFQR is measured for each site, which is one of 72 equal parts in the circumferential direction of the annular region (an annular region with a width of 30 mm, excluding the outermost 2 mm of the edge) between a position 2 mm inward from the outermost edge of the wafer W toward the wafer center and a position 32 mm inward. The measuring device 2 transmits the measurement result of ESFQR to the shape evaluation device 3 together with the wafer identification information for identifying the wafer W to be measured.

[0013] Based on the measurement result of ESFQR in the measuring device 2, the shape evaluation device 3 evaluates the shape of the wafer W. The shape evaluation device 3 includes an input unit 31, a display unit 32, a storage unit 33, and a control unit 34.

[0014] The input unit 31 is constituted by, for example, a touch panel or physical buttons. The input unit 31 is used for inputting various information and outputs a signal corresponding to the input to the control unit 34.

[0015] Based on the control of the control unit 34, the display unit 32 displays various information.

[0016] The storage unit 33 is constituted by a well-known storage device such as an HDD (Hard Disk Drive). The storage unit 33 stores, in a manner readable by the control unit 34, the measurement result of ESFQR and the evaluation result of the wafer W in association with the information for identifying the wafer W to be evaluated. The information for identifying the wafer W to be evaluated may be obtained from the measuring device 2 or may be input by the input unit 31.

[0017] The control unit 34 is constituted by a computer including a CPU, and realizes various functions by the CPU executing a program stored in the storage unit 33. The control unit 34 includes a measurement result acquisition unit 341 and an evaluation unit 342. The measurement result acquisition unit 341 acquires the wafer identification information and the measurement result of ESFQR transmitted from the measuring device 2. Based on the measurement result of ESFQR acquired by the measurement result acquisition unit 341, the evaluation unit 342 performs a calculation process of a sag evaluation value (hereinafter, may be referred to as "notch sag amount evaluation value") of a notch site including the notch Wn as a shape evaluation process of the wafer W.

[0018] <Shape evaluation method> Next, a method for evaluating the shape of the wafer W will be described. FIG. 2 is a flowchart showing a method for evaluating the shape of a wafer. FIG. 3 is a graph showing an example of the measurement result of ESFQR.

[0019] As shown in FIG. 1, the method for evaluating the shape of a wafer includes a wafer preparation step (step S1), an outer peripheral flatness measurement step (step S2), and an evaluation step (step S3).

[0020] In the wafer preparation step of step S1, an operator prepares a measurement target wafer W that has been subjected to a double-sided polishing step, a notch mirror polishing step, an outer peripheral mirror polishing step, and a finish polishing step, and sets it in the measuring device 2 as shown by the two-dot chain line in FIG. 1.

[0021] In the outer peripheral flatness measurement step of step S2, the measuring device 2 measures ESFQR as the flatness of the outer peripheral portion of the measurement target wafer W. The measuring device 2 obtains, for example, a measurement result as shown in FIG. 3. The measuring device 2 transmits the wafer identification information and the measurement result of ESFQR to the shape evaluation device 3. The measurement result acquisition unit 341 of the control unit 34 constituting the shape evaluation device 3 acquires the wafer identification information and the measurement result of ESFQR transmitted from the measuring device 2, and stores the acquired information in the storage unit 33 in association with each other. Note that the measurement result acquisition unit 341 may acquire the wafer identification information input by an operator's operation of the input unit 31.

[0022] In the evaluation step of step S3, the evaluation unit 342 of the control unit 34 constituting the shape evaluation device 3 evaluates the shape of the wafer W. First, the evaluation unit 342 calculates the average value of ESFQR at sites other than the notch site (hereinafter, "first outer peripheral ESFQR average value" (There are cases where this is said.) Then, the evaluation unit 342 calculates a notch sag evaluation value V based on the following formula (1-1). V = ESFQR_N - ESFQR_mean … (1-1) ESFQR_N: ESFQR at the notch site (notch site ESFQR) ESFQR_mean1: Mean value of the first outer perimeter ESFQR

[0023] The evaluation unit 342 stores the calculation result of the notch sag evaluation value V in association with the wafer identification information and ESFQR measurement results stored in the storage unit 33. The evaluation unit 342 may also display the calculation result of the notch sag evaluation value V on the display unit 32.

[0024] <Effects of the Embodiment> The shape evaluation system 1 measures the flatness of multiple sites on the outer periphery of the wafer W and evaluates the shape of the wafer W based on the difference between the average value of the flatness of the multiple sites, including the notch site, and the flatness of the notch site. For example, if the measurement results for ESFQR shown in Figure 3 are obtained, the notch darn evaluation value Vp is calculated based on the following formula (2) in the evaluation method described in Patent Document 1. Vp = ESFQR_N - ESFQR_max … (2) ESFQR_max: Maximum ESFQR value for sites other than notched sites (maximum ESFQR value for the outer perimeter) As shown in Figure 3, the notch sag evaluation value Vp obtained in this way represents the difference in ESFQR between the notch site and a specific site, and therefore cannot represent the difference between the sag in the notch area and the overall sag trend of the outer perimeter. In particular, since the notch sag evaluation value Vp represents the difference between the notch area and the area with the greatest sag in the outer perimeter, even if the difference between the sag in the notch area and the overall sag trend of the outer perimeter is large enough to cause defects, the notch sag may be evaluated as not being large enough to cause defects based on the notch sag evaluation value Vp.

[0025] On the other hand, the notch sag evaluation value V obtained based on equation (1-1) in this embodiment is obtained by subtracting the average value of the first outer peripheral ESFQR, which represents the tendency of sag across the entire outer peripheral, from the notch site ESFQR. Therefore, as shown in Figure 3, it can represent the difference between the sag at the notch and the tendency of sag across the entire outer peripheral. For example, if the notch sag evaluation value V is greater than or equal to the first threshold, it can be evaluated that the difference between the sag at the notch and the tendency of sag across the entire outer peripheral is large enough to cause defects. If it is less than the first threshold, it can be evaluated that the difference between the sag at the notch and the tendency of sag across the entire outer peripheral is small enough not to cause defects. Alternatively, if the notch sag evaluation value V is greater than or equal to the second threshold, it can be evaluated that there is a possibility of an abnormality in the polishing conditions or polishing equipment of the wafer W. If it is less than the second threshold, it can be evaluated that there is no possibility of an abnormality in the polishing conditions or polishing equipment of the wafer W. Therefore, the shape of the wafer W having a notch Wn can be appropriately evaluated based on the notch sag evaluation value V.

[0026] [Differentiation] Although embodiments of the present invention have been described in detail above with reference to the drawings, the specific configuration is not limited to these embodiments, and various improvements and design changes that do not depart from the spirit of the present invention are also included.

[0027] For example, the evaluation unit 342 may calculate the median ESFQR of sites other than the notch site (hereinafter sometimes referred to as the "first outer perimeter ESFQR median") and calculate the notch sag evaluation value V based on the following formula (1-2). V=ESFQR_N-ESFQR_median1 … (1-2) ESFQR_median1: Median of the first perimeter ESFQR The notch sag evaluation value V obtained based on equation (1-2) can represent the difference between the sag of the notch area and the sag of the entire outer circumference, as shown in Figure 3. Therefore, the shape of the wafer W having a notch Wn can be appropriately evaluated based on the notch sag evaluation value V.

[0028] Furthermore, the evaluation unit 342 may calculate the average value of the ESFQR of all sites (hereinafter sometimes referred to as the "second perimeter ESFQR average value") and calculate the notch sag evaluation value V based on the following formula (1-3). V=ESFQR_N-ESFQR_mean2 … (1-3) ESFQR_mean2: Mean value of the second outer perimeter ESFQR Furthermore, the evaluation unit 342 may calculate the median ESFQR of all sites (hereinafter sometimes referred to as the "second outer perimeter ESFQR median") and calculate the notch sag evaluation value V based on the following formula (1-4). V=ESFQR_N-ESFQR_median2 … (1-4) ESFQR_median2: Median of the second outer perimeter ESFQR

[0029] The calculation of the notch sag evaluation value based on the above formulas (1-1) to (1-4) may be performed by the operator. Instead of ESFQR, other indicators such as ESFQD (Edge Site flatness Front reference least sQuare Deviation), ZDD (Z-height Double Differentiation), ESBID (Edge Site flatness Back reference Ideal Deviation), or ESBIR (Edge Site flatness Back reference Ideal Range) may be used to represent flatness. [Examples]

[0030] Next, embodiments of the present invention will be described. However, the present invention is not limited to these embodiments.

[0031] [Example 1] First, one wafer each of level A and level B was prepared. The level A and B wafers were subjected to the following processes in that order: double-sided polishing, notch mirror polishing, outer edge mirror polishing, and finish polishing. Schematic diagrams of the notch sag shape and the average sag shape of the outer edge on the level A and B wafers W are shown in Figure 4. As shown in Figure 4, the notch sag shapes on the level A and B wafers are different from each other. Also, the average sag shapes of the outer edges on the level A and B wafers are different from each other. The ESFQR of the outer edge of wafers at levels A and B was measured using a Wafersight2 flatness analyzer (manufactured by KLA-Tencor). Table 1 shows the notch site ESFQR, the maximum outer edge ESFQR, and the average value of the first outer edge ESFQR for wafers of levels A and B.

[0032] [Table 1]

[0033] Next, the notch site ESFQR in wafers of levels A and B was used as the notch sag evaluation value for Comparative Example 1-1. Furthermore, the notch sag evaluation value for Comparative Example 1-2 was calculated based on the above formula (2). Furthermore, the notch sag evaluation value for Example 1 was calculated based on the above formula (1-1). Table 2 shows the calculation results of the notch sag evaluation values ​​for Comparative Examples 1-1, 1-2, and Example 1.

[0034] [Table 2]

[0035] Here, as shown in Table 1 and Figure 4, the notch sag was greater in the Level B wafer than in the Level A wafer, and the average sag in the outer periphery was also greater in the Level B wafer than in the Level A wafer. In this case, it is preferable to consider that the difference between the notch sag and the overall sag in the outer periphery is almost the same for the Level A wafer and the Level B wafer.

[0036] As shown in Table 2, the notch sag evaluation value for Comparative Example 1-1 was greater for the Level B wafer than for the Level A wafer. Since the notch site sag amount evaluation value for Comparative Example 1-1 is the notch site ESFQR, it is not possible to represent the difference between the sag in the notch area and the sag trend of the entire outer periphery based on the notch site sag amount evaluation value for Comparative Example 1-1. Furthermore, the notch sag evaluation value for Comparative Example 1-2 was also larger for Level B wafers than for Level A wafers, similar to the notch sag evaluation value for Comparative Example 1-1. Since the notch sag evaluation value for Comparative Example 1-2 represents the difference in ESFQR between the notch site and a specific single site, it is not possible to represent the difference between the sag at the notch area and the overall sag trend of the outer periphery based on the sag amount evaluation value of the notch site in Comparative Example 1-2. On the other hand, the notch sag evaluation value for Example 1 was the same for wafers at level A and wafers at level B. The notch sag evaluation value in Example 1 represents the difference between the average value of the ESFQR at the notch site and the ESFQR at sites other than the notch site. Therefore, based on the notch sag amount evaluation value in Example 1, it is possible to represent the difference between the sag in the notch area and the sag trend of the entire outer perimeter. From the above, we were able to confirm that the shape of a wafer having a notch can be appropriately evaluated based on the notch sagging evaluation value of the present invention.

[0037] [Example 2] First, one wafer each of level C and level D was prepared. The level C and D wafers underwent the same polishing process as the level A wafer. The ESFQR of the outer edge of wafers at levels C and D was measured using the Wafersight2 flatness measuring instrument described above. Then, the notch sag evaluation value was calculated based on the above formula (1-1). Table 3 shows the notch site ESFQR, the average value of the first outer edge ESFQR, and the notch sag evaluation value for wafers of levels C and D.

[0038] [Table 3]

[0039] As shown in Table 3, the notch deformation was the same for both the Level C and Level D wafers, but the average shape deformation of the outer periphery was greater for the Level C wafer than for the Level D wafer. In this case, it is preferable to consider that the difference between the deformation of the notch and the deformation of the entire outer periphery is greater for the Level D wafer than for the Level C wafer. The notch sag evaluation value for level D was greater than the notch sag evaluation value for level C. Therefore, based on the notch sagging evaluation value of the present invention, it is possible to evaluate whether the difference between the sagging of the notch area and the sagging of the entire outer circumference is large enough to cause defects, or whether there is a possibility of an abnormality in the wafer polishing conditions or polishing equipment, and it was confirmed that the shape of a wafer with a notch can be appropriately evaluated. [Explanation of symbols]

[0040] W...wafer, Wn...notch

Claims

1. A method for evaluating the shape of a wafer having a notch, The flatness of multiple regions in the outer periphery of the wafer is measured. A wafer shape evaluation method that evaluates the shape of the wafer based on the difference between the average or median flatness of the plurality of regions and the flatness of the region containing the notch among the plurality of regions.

2. In the wafer shape evaluation method described in claim 1, A wafer shape evaluation method in which the index representing the flatness is ESFQR.

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