Processing method for silicon substrates
By applying high-temperature treatment and controlled cooling with specific rate and temperature conditions, the method addresses defect formation in silicon (551) substrates, resulting in high-quality substrates free from minute protrusions.
Patent Information
- Application Number
- JP2024175014
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-10-04
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2044-10-04
AI Technical Summary
Silicon substrates with a (551) orientation exhibit small step bunching and haze but generate minute defects during high-temperature treatment, such as heat treatment, which affect surface quality.
A method for processing silicon substrates with a (551) orientation involves high-temperature treatment above 940°C followed by cooling at a rate of 10°C/min or more within the 840°C to 940°C range, and maintaining a temperature difference of ±10°C during cooling and storage to suppress defect formation.
This method effectively prevents the occurrence of minute protrusions during high-temperature processes like annealing and epitaxial growth, ensuring high-quality silicon substrates are produced.
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Abstract
Description
Technical Field
[0001] The present invention relates to a method for processing a silicon substrate, and particularly to a method for processing a silicon substrate having a (551) plane orientation.
Background Art
[0002] Instead of the Fin structure currently adopted in logic, for generations after the next generation, GAA and further CFETs that stack NMOS and CMOS have been proposed and are actively under research and development. At this time, as a method for improving hole mobility, it is considered to use a silicon substrate having a (110) plane orientation (hereinafter, also referred to as a silicon (110) substrate) (Non-Patent Document 1).
[0003] However, it has been pointed out that a silicon (110) substrate has problems such as large surface roughness and haze (Non-Patent Document 1). Here, haze is also referred to as the degree of cloudiness of the surface, and represents the surface roughness in terms of the degree of light scattering. The larger the haze, the rougher the surface. Therefore, it has been proposed to use a substrate having a (551) plane orientation (hereinafter, also referred to as a silicon (551) substrate) (Patent Document 1, Non-Patent Document 2). In Patent Document 1, there is no description of the plane orientation (551), but there is a description of 7.9° off the (110) plane, which corresponds to the plane orientation (551).
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Non-Patent Documents
[0005]
Non-Patent Document 1
Non-Patent Document 2
[0006] However, our own research has shown that while silicon substrates with a (551) orientation exhibit small step bunching and indeed small haze like the prior art, when the substrate is examined after high-temperature treatment such as heat treatment, minute defects may be generated.
[0007] The present invention has been made to solve the above problems and aims to provide a silicon substrate processing method that can suppress the generation of minute protrusions associated with high-temperature processing of a silicon substrate with a surface orientation of (551). [Means for solving the problem]
[0008] To achieve the above objective, the present invention provides a method for processing a silicon substrate, When a silicon substrate with a (551) orientation is subjected to high-temperature treatment at a temperature higher than 940°C in a furnace, and then cooled to a temperature below 840°C after the high-temperature treatment, The present invention provides a method for processing a silicon substrate, characterized by maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C through which the substrate passes during cooling.
[0009] In this invention, regarding the high-temperature treatment of a silicon (551) substrate, the cooling process maintains a fast cooling rate within the aforementioned temperature range. In other words, the cooling rate is maintained without dropping below 10°C / min within the aforementioned temperature range. By doing so, the occurrence of defects (micro-protrusions) can be suppressed. Therefore, a high-quality substrate can be obtained.
[0010] In this case, the high-temperature treatment can be annealing under a hydrogen atmosphere to remove the native oxide film on the surface of the silicon substrate. Furthermore, as the high-temperature treatment, epitaxial growth can be performed on the silicon substrate.
[0011] Thus, the present invention is particularly effective in suppressing defect generation during high-temperature processes such as annealing for the removal of native oxide films and epitaxial growth.
[0012] Furthermore, when storing the cooled silicon substrate in the furnace for the next processing, it can be stored at a temperature of less than 840°C, while controlling the temperature difference within the substrate surface of the silicon substrate to within ±10°C.
[0013] This method helps to suppress the occurrence of defects even during storage inside the reactor.
[0014] Furthermore, a silicon substrate with a diameter of 300 mm or more is prepared as the silicon substrate, and When cooling in the temperature range of 840°C to 940°C, the temperature difference within the substrate surface of the silicon substrate can be controlled to within ±10°C.
[0015] In this way, even with large-diameter silicon substrates exceeding 300 mm in diameter, the occurrence of defects can be suppressed more reliably. [Effects of the Invention]
[0016] The silicon substrate processing method of the present invention can suppress the occurrence of minute protrusion defects in silicon (551) substrates that have undergone high-temperature processing, thereby enabling the production of high-quality substrates. [Brief explanation of the drawing]
[0017] [Figure 1] This is a flowchart showing an example of the steps in the silicon substrate processing method of the present invention. [Figure 2] This is a TEM observation of the substrate surface when the holding temperature was changed in Investigation 1. [Figure 3] This is a TEM observation image of the substrate surface when the cooling rate in Investigation 2 was 9°C / min. [Figure 4] It is a TEM observation image of the substrate surface (without defects) in Example 1. [Figure 5] It is a TEM observation image of the substrate surface (without defects) in Example 2. [Figure 6] It is a TEM observation image of the substrate surface (with defects) in Comparative Example 1. [Figure 7] It is a TEM observation image of the substrate surface (with defects) in Comparative Example 2. [Figure 8] It is an observation image by AFM (atomic force microscope) of the defects of the micro protrusions formed on the surface of the silicon (551) substrate.
Modes for Carrying Out the Invention
[0018] Hereinafter, the present invention will be described in detail as an example of an embodiment with reference to the drawings, but the present invention is not limited thereto. When epitaxial growth is performed on a silicon substrate, in order to remove the native oxide film existing on the surface of the silicon substrate in advance before epitaxial growth, generally, an annealing treatment (hydrogen bake) is performed in a hydrogen atmosphere at a high temperature. The temperature at this time is often in a temperature range of approximately 1000 °C or higher. This is because even a thin native oxide film of 1 nm or less has an amorphous oxide film layer, which makes epitaxial growth impossible.
[0019] However, it has been found that minute protrusion-shaped defects may be formed on a silicon (551) substrate that has been taken out of the furnace and sufficiently cooled after this hydrogen bake (for example, hydrogen bake at 1080 °C for 40 seconds). FIG. 8 shows an observation image by AFM of the defects of this micro protrusion. Defects have occurred in the region surrounded by the circles in the figure.
[0020] Therefore, the inventors diligently researched the relationship between high-temperature processing, such as hydrogen baking, and the occurrence of defects in minute protrusions. They found that a silicon substrate processing method is effective in which a silicon substrate with a (551) plane orientation is subjected to high-temperature processing at a temperature higher than 940°C in a furnace, and then cooled to a temperature below 840°C after the high-temperature processing, while maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C that the substrate passes through during the cooling process. They discovered that this processing method can suppress the occurrence of defects and produce high-quality substrates, thus completing the present invention.
[0021] Here, we will describe the above survey in detail. As mentioned above, after removing the native oxide film or after silicon epitaxial growth, when the silicon (551) substrate (also simply called the substrate) is removed from the epitaxial growth furnace, minute defects like those shown in Figure 8 may be detected. To investigate the cause, the substrate was subjected to high-temperature treatment and subsequent cooling using an epitaxial growth furnace. The specific investigation conditions are as follows: The cooling rate was adjusted by controlling the output intensity of the heating lamp in the epitaxial growth furnace. Additionally, thermocouples were installed inside the furnace to measure the furnace temperature (substrate temperature) in real time.
[0022] <Survey 1> Multiple identical silicon (551) substrates were prepared, and each substrate was subjected to the following treatment at different holding temperatures. The substrates were placed in a furnace and heated, and the furnace temperature (substrate temperature) was raised to 1150°C and held for 10 minutes under a hydrogen atmosphere. After that, they were cooled to the holding temperature at a cooling rate of 15°C / min. After holding at this temperature for 10 minutes, they were cooled to 500°C at a cooling rate of 15°C / min and removed from the furnace. The substrate surface was then observed at room temperature (approximately 25°C) using a TEM (transmission electron microscope) to investigate the occurrence of defects in detail. The holding temperature was varied in 10°C increments within the range of 600°C to 1000°C.
[0023] A portion of the observation results is shown in Figure 2. Figure 2 shows the case where the holding temperature ranges from 800°C to 960°C in 20°C increments. Defects occur in the areas circled in the figure. Looking at the results from the lowest holding temperature, it was found that defects begin to form at 840°C, the density reaches its maximum around 900°C, and then the defects disappear (no defects are observed) at 960°C, which is above 940°C. In other words, it was found that in silicon (551) substrates, defects can form in the temperature range of 840°C to 940°C due to the effects of step bunching on the surface.
[0024] <Survey 2> Next, the relationship between cooling rate and defect occurrence was investigated in the range of 800°C to 980°C, including the temperature range mentioned above (840°C to 940°C). In Investigation 1, the temperature was maintained midway through the process, but in Investigation 2, this maintenance was not performed, and cooling continued from 1150°C to 500°C. In addition, a change temperature was set between 980°C and 800°C to change the cooling rate, with cooling rate A from 1150°C to the change temperature and cooling rate B from the change temperature to 500°C. The cooling rate was selected from 5°C / min, 9°C / min, 10°C / min, 15°C / min, and 200°C / min, and cooling was performed in combinations where A > B or B > A. Note that 5°C / min to 15°C / min are the cooling rates when the substrate is cooled inside the furnace, and 200°C / min is the cooling rate when the substrate is removed from the furnace, so it only corresponds to B. Then, using TEM as in Investigation 1, the substrate surface was observed to investigate the occurrence of defects in detail.
[0025] As a result, it was found that it is important to pass through the temperature range of 840°C to 940°C, where this defect occurs, as quickly as possible, and that this temperature range should be passed through while maintaining a cooling rate of 10°C / min or higher. Conversely, if there is a range within the above temperature range where the cooling rate is less than 10°C / min, the defect will occur. As an example, Figure 3 shows a TEM observation when cooled at a constant cooling rate of 9°C / min. The area circled in the figure is where the defect occurs.
[0026] As described above, our investigation has shown that in order to prevent the occurrence of minute protrusion defects related to high-temperature processing of silicon (551) substrates, it is necessary to maintain a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C during cooling.
[0027] Figure 1 shows an example of the steps for processing a silicon substrate according to the present invention. As shown in Figure 1, the process includes Step 1: high-temperature treatment of the silicon (551) substrate (higher than 940°C), and Step 2: cooling to below 840°C (maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C).
[0028] First, let's explain the high-temperature treatment in step 1. A silicon (551) substrate is prepared, and the substrate is placed in a furnace for high-temperature treatment. This high-temperature treatment can be any temperature higher than 940°C, and is not particularly limited. An example of an upper temperature limit is 1350°C. Examples of high-temperature processing include epitaxial growth (epitaxial growth temperature for silicon: approximately 1100-1200°C). Alternatively, as a high-temperature treatment, annealing under a hydrogen atmosphere to remove the native oxide film on the substrate surface, a common procedure before epitaxial growth, can also be performed (annealing temperature: approximately 1000-1200°C). These processes themselves can be carried out using the same procedures as conventional methods. Conventionally, the aforementioned micro-protrusion defects can form on silicon (551) substrates after these processes, and the present invention, which can suppress this formation, is particularly effective for these processes.
[0029] Next, we will explain the cooling process in step 2. The substrate should be cooled to a temperature below 840°C (the lower limit being, for example, room temperature (around 25°C)). Cooling of the substrate may be performed inside the furnace or removed from the furnace and cooled outside. During this time, the cooling rate should be maintained at 10°C / min or higher in the 840°C to 940°C temperature range that the substrate passes through. As long as the above cooling rate conditions are met, the cooling rate may be kept constant or changed midway through the process. Furthermore, there is no particular upper limit to the cooling rate. In particular, a high cooling rate (e.g., 200°C / min or more), such as when removing from the furnace, is also acceptable. The cooling rate varies depending on the furnace temperature at the time of removal, the temperature difference with the outside of the furnace, etc., and it is not possible to set an upper limit.
[0030] With this processing method of the present invention, as described above, even when a silicon (551) substrate is subjected to high-temperature processing, it is possible to suppress the formation of minute protrusion defects on the substrate after cooling.
[0031] Furthermore, it is preferable to ensure that there is no difference in temperature between the center and edges of the substrate during cooling. In particular, when using large-diameter substrates (e.g., substrates with a diameter of 300 mm or more) and processing temperatures are high, temperature distributions (temperature differences) tend to occur within the substrate surface. To more effectively prevent the occurrence of defect distributions due to temperature distributions within the substrate surface, it is preferable to control the temperature distribution within the substrate surface to within ±10°C. In particular, around the temperature range of 840°C to 940°C, keeping the temperature difference within the substrate surface to within ±10°C can extremely effectively suppress the occurrence of defects within the substrate surface.
[0032] Furthermore, the temperature after cooling is also important, and it is best to avoid leaving the material near the phase transition temperature for extended periods. For example, after removal from equipment that performs high-temperature processing, such as an epitaxial growth furnace, it is best to cool the material to the lowest possible temperature.
[0033] Furthermore, if a substrate has been cooled in a furnace, it may be subjected to another process in the same furnace, in which case the substrate is temporarily stored in the furnace. For example, this may involve first removing the native oxide film and then performing epitaxial growth. In this case, it is preferable to store the substrate at a temperature below 840°C and to control the temperature variation (temperature difference) within the substrate surface to within ±10°C. This makes it extremely effective to suppress the occurrence of defects within the substrate surface even during storage. Also, when processing and cooling each substrate at high temperature one by one using a single-wafer furnace and then storing them, if the same storage temperature is set for each substrate, the temperature will not vary from substrate to substrate, so it is possible to obtain multiple substrates of the same quality without defects.
[0034] Furthermore, the cooling rate and temperature distribution within the substrate during the cooling process can be controlled by adjusting the output intensity of the heating lamp, etc. Furthermore, the temperature distribution within the substrate surface during storage can be controlled by controlling a heating element. This heating element can be, for example, radiant heating using a lamp. Furthermore, the furnace temperature (substrate temperature) can be measured in real time using thermocouples or similar devices. [Examples]
[0035] The present invention will be described more specifically below with reference to examples of the present invention, but the present invention is not limited to these examples. (Example 1) A single-crystal silicon substrate with a diameter of 300 mm, a crystal orientation (551), boron doping, and a resistivity of 10 Ω·cm was prepared. Using an epitaxial growth furnace, the substrate was annealed for 600 seconds at a temperature of 1080°C in a hydrogen atmosphere. The removal temperature was set to 830°C, and the cooling rate to 830°C was 10°C / min. The cooling rate after removal was 200°C / min or higher. In other words, a cooling rate of 10°C / min or higher was maintained in the temperature range of 840-940°C during cooling. After removal, the surface of the substrate was observed using a TEM after it had cooled to room temperature (25°C). The TEM observation diagram is shown in Figure 4. No defects were observed in the TEM results.
[0036] (Example 2) Hydrogen annealing, cooling, and TEM observation were performed in the same manner as in Example 1, except that the extraction temperature was set to 940°C. Specifically, a cooling rate of 10°C / min or more was maintained in the temperature range of 840-940°C during cooling. The observation diagram is shown in Figure 5. TEM results showed no defect formation.
[0037] (Comparative Example 1) Hydrogen annealing, cooling, and TEM observation were performed in the same manner as in Example 1, except that the extraction temperature was set to 840°C and the cooling rate was set to 9°C / min. In other words, a cooling rate of 10°C / min or higher was not maintained in the temperature range of 840-940°C during cooling. The observation diagram is shown in Figure 6. TEM results showed the formation of defects.
[0038] (Comparative Example 2) Hydrogen annealing, cooling, and TEM observation were performed in the same manner as in Example 1, except that the extraction temperature was set to 930°C and the cooling rate was set to 9°C / min. In other words, a cooling rate of 10°C / min or higher was not maintained in the temperature range of 840-940°C (specifically, the range of 940-930°C) during cooling. The observation diagram is shown in Figure 7. TEM results showed the formation of defects.
[0039] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that has substantially the same technical idea as described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.
Claims
1. A method for processing a silicon substrate, When a silicon substrate with a surface orientation of (551) and a diameter of 300 mm or more is subjected to high-temperature treatment at a temperature higher than 940°C in a furnace, and then cooled to a temperature of less than 840°C after the high-temperature treatment, During the cooling process, in the temperature range of 840°C to 940°C, A method for processing a silicon substrate, characterized by controlling the temperature difference within the substrate surface of the silicon substrate to within ±10°C while maintaining a cooling rate of 10°C / min or more.
2. As the aforementioned high-temperature treatment, The method for processing a silicon substrate according to claim 1, characterized in that annealing is performed under a hydrogen atmosphere to remove the native oxide film on the surface of the silicon substrate.
3. As the aforementioned high-temperature treatment, The method for processing a silicon substrate according to claim 1, characterized in that epitaxial growth is performed on the silicon substrate.
4. The method for processing a silicon substrate according to any one of claims 1 to 3, characterized in that when the cooled silicon substrate is stored in the furnace for the next processing, it is stored at a temperature of less than 840°C and the temperature difference within the substrate surface of the silicon substrate is controlled to be within ±10°C.
5. The method for processing a silicon substrate according to any one of claims 1 to 3, characterized in that when cooling in the temperature range of 840°C to 940°C, the cooling rate is maintained at 10°C / min or more and 15°C / min or less.
6. The method for processing a silicon substrate according to claim 4, characterized in that when cooling in the temperature range of 840°C to 940°C, the cooling rate is maintained at 10°C / min or more and 15°C / min or less.
Citation Information
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