Lead frame and method for manufacturing the same
The lead frame design with thinned die pads and internal terminals, and a back-side resin portion, addresses the challenge of maintaining strength in thin semiconductor devices, achieving reduced thickness and improved connectivity.
Patent Information
- Application Number
- JP2022198244
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-05-23
- Filing Date
- 2022-12-12
- Publication Date
- 2026-08-26
- Estimated Expiration
- 2042-12-12
AI Technical Summary
The challenge of maintaining the strength of lead frames while reducing the thickness of semiconductor devices has become difficult as they are thinned.
A lead frame design comprising a die pad, lead portions, and a resin portion, where the die pad and internal terminals are thinned from both sides, and the resin portion is located on the back side, with specific thickness ratios to ensure structural integrity and reduced thickness.
This design allows for thinner semiconductor devices with improved structural strength and conductivity, enabling efficient electrical and thermal connections.
Smart Images

Figure 0007911212000001 
Figure 0007911212000002 
Figure 0007911212000003
Abstract
Description
Technical Field
[0001] The present disclosure relates to a lead frame and a method for manufacturing the same.
Background Art
[0002] In recent years, there has been a demand for miniaturization and thinning of semiconductor devices mounted on substrates. In response to such a demand, various so-called QFN (Quad Flat Non-lead) type semiconductor devices have been proposed conventionally. The QFN type semiconductor device is configured by encapsulating a semiconductor element mounted on the mounting surface of a lead frame with a sealing resin and exposing a part of the leads on the back side.
[0003] Patent Document 1 discloses a technique of providing a resin portion on the back surface of a lead frame and then removing an unnecessary portion of the resin portion.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] In recent years, there has been a demand for reducing the thickness of semiconductor devices. However, when the lead frame is thinned to reduce the thickness of the semiconductor device, it becomes difficult to maintain the strength of the lead frame.
[0006] The present disclosure provides a lead frame and a method for manufacturing the same that can make the thickness of the semiconductor device thinner.
Means for Solving the Problems
[0007] Embodiments of the present disclosure relate to the following [1] to [7].
[0008] [1] A lead frame comprising a die pad, a lead portion disposed around the die pad, and a resin portion disposed around the die pad and the lead portion, wherein the lead portion has an internal terminal located on the die pad side and an external terminal located on the opposite side of the die pad, the die pad is thinned from the surface side, the internal terminal is thinned from both the surface and back sides, and the resin portion is located on the back side of the internal terminal.
[0009] [2] The lead frame according to [1], wherein the surface of the die pad is located on the back side of the surface of the resin portion, beyond the portion located between the die pad and the lead portion.
[0010] [3] The lead frame according to [1] or [2], wherein the external terminal is not thinned from the front side, and at least a portion of the external terminal is thinned from the back side.
[0011] [4] The lead frame according to any one of [1] to [3], wherein the lead portion has a connecting portion located between the internal terminal and the external terminal, and the connecting portion is thinned from both the front and back sides.
[0012] [5] The lead frame according to any one of [1] to [4], wherein the thickness of the internal terminals is 10% or more and 45% or less of the maximum thickness of the lead frame.
[0013] [6] A lead frame according to any one of [1] to [5], wherein a metal layer is inserted between the die pad and the resin part, or between the lead part and the resin part.
[0014] [7] A method for manufacturing a lead frame, comprising the steps of: preparing a metal substrate; forming a recess on the back side by etching the metal substrate from the back side to a certain point in the thickness direction; forming a resin portion on the back side of the metal substrate and covering the recess on the back side with the resin portion; polishing the resin portion to a predetermined thickness; and forming a die pad and lead portions arranged around the die pad by etching the metal substrate from the front side to a certain point in the thickness direction, wherein the lead portions have internal terminals located on the die pad side and external terminals located on the opposite side of the die pad, and in the step of etching from the front side of the metal substrate, the resin portion located between the die pad and the lead portions is exposed on the front side, the die pad and the internal terminals are thinned from the front side, the internal terminals are thinned from the back side, and the resin portion is located on the back side of the internal terminals. [Effects of the Invention]
[0015] According to this disclosure, the thickness of semiconductor devices can be made thinner. [Brief explanation of the drawing]
[0016] [Figure 1] Figure 1 is a plan view showing a lead frame according to the first embodiment. [Figure 2] Figure 2 is a cross-sectional view showing a lead frame according to the first embodiment (cross-sectional view taken along line II-II in Figure 1). [Figure 3] Figure 3 is a plan view showing a semiconductor device according to the first embodiment. [Figure 4] Figure 4 is a cross-sectional view (cross-sectional view along line IV-IV in Figure 3) showing a semiconductor device according to the first embodiment. [Figure 5] Figures 5(a)-(c) are cross-sectional views showing the semiconductor device according to the first embodiment connected to a wiring board. [Figure 6] Figures 6(a)-(i) are cross-sectional views showing a method for manufacturing a lead frame according to the first embodiment. [Figure 7]Figs. 7(a)-(e) are cross-sectional views showing a method of manufacturing a semiconductor device according to the first embodiment. [Figure 8] Fig. 8 is a cross-sectional view showing a semiconductor device according to a modification of the first embodiment. [Figure 9] Fig. 9 is a cross-sectional view showing a state where a semiconductor device according to a modification of the first embodiment is connected to a wiring board. [Figure 10] Fig. 10 is a cross-sectional view showing a lead frame according to the second embodiment. [Figure 11] Fig. 11 is a partially enlarged cross-sectional view showing a lead frame according to the second embodiment. [Figure 12] Figs. 12(a)-(d) are cross-sectional views showing a method of manufacturing a lead frame according to the second embodiment.
Best Mode for Carrying Out the Invention
[0017] (First Embodiment) Hereinafter, the first embodiment will be described with reference to FIGS. 1 to 7. In the following figures, the same parts are denoted by the same reference numerals, and some detailed descriptions may be omitted.
[0018] In this specification, the X direction and the Y direction are two directions parallel to the sides of the lead frame 10 or the package region 10a, and the X direction and the Y direction are perpendicular to each other. The Z direction is a direction perpendicular to both the X direction and the Y direction. Also, "inside" and "inner side" refer to the side facing the center direction of each package region 10a. "Outside" and "outer side" refer to the side away from the center of each package region 10a. Further, "surface" refers to the surface on which the semiconductor element 21 is mounted (the surface on the positive Z direction side). "Back surface" refers to the surface on the opposite side (the negative Z direction side) of the "surface", which is the surface opposite to the surface on which the semiconductor element 21 is mounted.
[0019] Furthermore, in this specification, half-etching means etching the material to be etched in its thickness direction up to a certain point. The thickness of the material to be etched after half-etching may be, for example, 10% to 90%, 30% to 70%, or 40% to 60% of the thickness of the material to be etched before half-etching.
[0020] (Lead frame configuration) First, the outline of the lead frame according to this embodiment will be explained with reference to Figures 1 and 2. Figures 1 and 2 are diagrams showing the lead frame according to this embodiment.
[0021] As shown in Figure 1, the lead frame 10 includes package regions (unit lead frames) 10a. Multiple package regions 10a are arranged in multiple rows and layers (matrix-like) within the lead frame 10 in a plan view. However, it is not limited to this arrangement; one or more package regions 10a are sufficient. Each package region 10a corresponds to a semiconductor device 20 (described later) and is located inside the dotted lines in Figure 1. The dotted lines in Figure 1 correspond to the outer edge of the semiconductor device 20.
[0022] Next, the configuration of the lead frame 10 will be further explained with reference to Figures 1 and 2.
[0023] As shown in Figure 1, the lead frame 10 comprises a die pad 11, a plurality of lead portions 12, and a resin portion 18. Each of the plurality of lead portions 12 has an elongated shape and is provided around the die pad 11. Each lead portion 12 electrically connects the semiconductor element 21 to the external wiring board 80 (see Figure 5). The resin portion 18 is located around the die pad 11 and the lead portions 12, and is positioned on the back side of the lead frame 10. The plurality of package regions 10a are connected to each other via support leads (support members) 13. The support leads 13 support the die pad 11 and the lead portions 12. The support leads 13 extend along the X and Y directions, respectively.
[0024] The die pad 11 has a substantially square shape in plan view. In this case, the die pad 11 is thinned from the front side, for example by half-etching. The die pad 11 is not thinned from the back side. The planar shape of the die pad 11 is not limited to a square, but may be a polygon such as a rectangle. Suspension leads 14 are connected to the four corners of the die pad 11. The die pad 11 is connected and supported to the support lead 13 via the four suspension leads 14. In this embodiment, the suspension leads 14 are not thinned from either the front or back side and have the same thickness as the metal substrate before processing (metal substrate 31 described later). However, the suspension leads 14 are not limited to this and may be thinned from either the front or back side.
[0025] As shown in Figure 2, the die pad 11 has a die pad surface 11a located on the front side and a die pad back surface 11b located on the back side. A semiconductor element 21, which will be described later, is mounted on the die pad surface 11a. The die pad surface 11a and the die pad back surface 11b are exposed to the outside from the lead frame 10 without being covered by the resin part 18. The die pad surface 11a is located on the back side (negative Z direction) of the resin surface 18a of the resin part 18, which will be described later, than the portion located between the lead part 12 and the die pad 11. However, this is not limited to the die pad surface 11a, and the die pad surface 11a may be located on the same plane as the resin surface 18a of the resin part 18. By having the die pad surface 11a located on the back side of the resin surface 18a of the resin part 18, or on the same surface as the resin surface 18a, it is possible to prevent the die pad 11 from connecting with the internal terminal 51.
[0026] A die pad side surface 11c is formed on the side of the die pad 11 facing the lead portion 12. The die pad side surface 11c is in close contact with the resin portion 18.
[0027] Each lead portion 12 is connected to the semiconductor element 21 via a bonding wire 22, as will be described later. The lead portions 12 are positioned with a space between them and the die pad 11. Each lead portion 12 extends from a support lead 13.
[0028] Multiple lead portions 12 are arranged along the perimeter of the die pad 11. On the back surface of each lead portion 12, a first external terminal back surface 53b is formed, which is electrically connected to an external wiring board 80 (see Figure 5). Each first external terminal back surface 53b is exposed to the outside from the semiconductor device 20 (described later) after its manufacture.
[0029] The lead portion 12 has an internal terminal 51, a connecting portion 52, and an external terminal 53. The internal terminal 51 is located on the inside (die pad 11 side). The external terminal 53 is located on the outside (opposite side of the die pad 11, support lead 13 side). The connecting portion 52 is located between the internal terminal 51 and the external terminal 53. The internal terminal 51 is located at the inner end of the lead portion 12, and an internal terminal surface 15 is formed on its surface. This internal terminal surface 15 is a region that is electrically connected to the semiconductor element 21 via a bonding wire 22, as will be described later. A plating layer 25 is provided on the internal terminal surface 15 to improve adhesion with the bonding wire 22. The plating layer 25 may be made of silver plating, for example.
[0030] The internal terminal 51 is thinned from both the front and back sides, for example, by half-etching. The internal terminal 51 has the internal terminal surface 15 and the internal terminal back surface 51b described above. The internal terminal surface 15 is located on the front side of the internal terminal 51. The internal terminal back surface 51b is located on the back side of the internal terminal 51. The internal terminal surface 15 and the internal terminal back surface 51b are surfaces formed by etching. The internal terminal surface 15 is not covered by the resin part 18. The internal terminal back surface 51b is in close contact with the resin part 18. In addition, a lead side surface 51c is formed on the side of the internal terminal 51 facing the die pad 11. The lead side surface 51c is exposed to the outside without being covered by the resin part 18.
[0031] The connecting portion 52 is thinned from both the front and back sides, for example, by half-etching. The connecting portion 52 is connected to the internal terminal 51 on the inside and to the external terminal 53 on the outside. The connecting portion 52 has a connecting portion surface 52a located on the front side and a connecting portion back surface 52b located on the back side. The connecting portion surface 52a and the connecting portion back surface 52b are surfaces formed by etching. The connecting portion surface 52a is exposed to the outside without being covered by the resin portion 18. The connecting portion back surface 52b is in close contact with the resin portion 18. Furthermore, the connecting portion surface 52a is located on the same plane as the internal terminal surface 15. The connecting portion back surface 52b is located on the same plane as the internal terminal back surface 51b and the second external terminal back surface 53c.
[0032] The external terminal 53 is located on the support lead 13 side, and its outer end is connected to the support lead 13. The external terminal 53 has a roughly L-shape in cross-section. The external terminal 53 is not thinned from the front side. A portion of the external terminal 53 is thinned from the back side. The external terminal 53 has an external terminal surface 53a, the first external terminal back surface 53b described above, and a second external terminal back surface 53c. The external terminal surface 53a is located on the front side of the external terminal 53 and is exposed to the outside. The external terminal surface 53a is located on the front side (positive side in the Z direction) than the internal terminal surface 15 and the connection part surface 52a. The first external terminal back surface 53b is located on the back side of the external terminal 53 and is exposed to the outside. The first external terminal back surface 53b is not thinned from the back side. The area of the first external terminal back surface 53b may be smaller than that of the external terminal surface 53a. Furthermore, the area between the back surface 53b of the first external terminal and the support lead 13 may be thinned from the back side. The back surface 53c of the second external terminal is located on the back side of the external terminal 53 and is in close contact with the resin part 18. The back surface 53c of the second external terminal is located on the front side (positive side in the Z direction) than the back surface 53b of the first external terminal. The back surface 53c of the second external terminal is formed in the thinned portion from the back side.
[0033] Furthermore, the inner surface 53d of the first external terminal is formed at a position on the back side of the second external terminal's back surface 53c. The inner surface 53d of the first external terminal extends from the back surface 53c of the second external terminal toward the back surface 53b of the first external terminal. The resin part 18 is in close contact with the inner surface 53d of the first external terminal. Also, the inner surface 53e of the second external terminal is formed at a position on the front side of the connection part surface 52a of the external terminal 53. The inner surface 53e of the second external terminal extends from the external terminal surface 53a toward the connection part surface 52a. The inner surface 53e of the second external terminal is exposed to the outside.
[0034] The resin portion 18 is positioned around the die pad 11 and the lead portion 12. That is, as shown in Figure 1, when viewed from the front side, the resin portion 18 is located in the area surrounded by one side of the die pad 11, the multiple lead portions 12 facing that side, the support lead 13, and the two suspension leads 14. When viewed from the back side, the resin portion 18 is located in the area surrounded by one side of the die pad 11, the back surface 53b of the first external terminal of the multiple lead portions 12 facing that side, the support lead 13, and the two suspension leads 14. Note that in Figure 1, the resin portion 18 is shown in shaded areas (the same applies to Figure 3, which will be described later).
[0035] The resin part 18 is located on the back side of the lead frame 10. That is, the resin part 18 exists only on the back side (negative Z direction) of the lead frame 10 beyond the midpoint in the thickness direction. The resin part 18 does not exist on the front side (positive Z direction) beyond the midpoint in the thickness direction (Z direction). Note that the above midpoint is not limited to the center in the thickness direction of the lead frame 10, but may be located on the front or back side of the center in the thickness direction. In Figure 2, the midpoint in the thickness direction corresponds to the position where the back surface 51b of the internal terminal, the back surface 52b of the connection part, and the back surface 53c of the second external terminal exist in the thickness direction.
[0036] As shown in Figure 2, the resin part 18 is in close contact with the die pad side surface 11c of the die pad 11. The resin part 18 is also located on the back side of the lead part 12. Specifically, the resin part 18 is in close contact with the inner surface surface 53d of the first external terminal, the back surface 53c of the second external terminal, the back surface 52b of the connection part, and the back surface 51b of the internal terminal of the lead part 12.
[0037] The resin part 18 has a resin surface 18a located on the front side and a resin back surface 18b located on the back side. Of these, the resin surface 18a is exposed outward from between the die pad side surface 11c and the lead side surface 51c. The resin surface 18a, the internal terminal back surface 51b, the connection part back surface 52b, and the second external terminal back surface 53c are all located on the same plane. The resin back surface 18b is exposed outward from the back side of the lead frame 10. The die pad back surface 11b, the resin back surface 18b, and the first external terminal back surface 53b are all located on the same plane. The resin part 18 further has a resin inner surface 18c. The resin inner surface 18c faces the die pad 11 side and is exposed outward.
[0038] The resin part 18 may be a thermosetting resin such as silicone resin or epoxy resin, or a thermoplastic resin such as PPS resin. In order to improve the adhesion between the resin part 18 and the sealing resin 23 described later, it is preferable to use the same material for the resin part 18 as for the sealing resin 23.
[0039] The parts of the lead frame 10 other than the resin part 18 described above are composed of metals such as copper, copper alloy, and 42 alloy (Fe alloy with 42% Ni). The maximum thickness T1 of the lead frame 10 may be 80 μm or more and 300 μm or less, depending on the configuration of the semiconductor device 20 being manufactured. In this specification, the maximum thickness of the lead frame 10 refers to the thickness (Z-direction distance) of the thickest part of the lead frame 10, and is the thickness of the part that has not been thinned from either the front or back side. The maximum thickness of the lead frame 10 corresponds to the plate thickness of the metal substrate 31, which will be described later. In this embodiment, since the resin part 18 is provided on the back side of the lead part 12, the lead part 12 is less likely to deform due to the force applied during wire bonding. This makes it possible to reduce the maximum thickness T1 of the lead frame 10.
[0040] The thickness T2 of the internal terminals 51 and connection portion 52 may be 10% to 45% of the maximum thickness T1 of the lead frame 10, or 15% to 30%. The thickness T2 of the internal terminals 51 and connection portion 52 may be 30 μm to 135 μm, or 35 μm to 75 μm. By setting the thickness T2 of the internal terminals 51 and connection portion 52 to 10% or more of the maximum thickness T1 of the lead frame 10, conductivity between the internal terminals 51 and the external terminals 53 can be ensured. By setting the thickness T2 of the internal terminals 51 and connection portion 52 to 45% or less of the maximum thickness T1 of the lead frame 10, the thickness of the semiconductor device 20 after resin encapsulation can be reduced.
[0041] The thickness T3 of the thinned portion of the external terminal 53 may be 40% to 70% of the maximum thickness T1 of the lead frame 10, or 50% to 60%. The thickness T3 of the thinned portion of the external terminal 53 may be 32 μm to 175 μm, or 40 μm to 150 μm.
[0042] The thickness T4 of the die pad 11 may be 40% to 70% of the maximum thickness T1 of the lead frame 10, or 50% to 60%. The thickness T4 of the die pad 11 may be 32 μm to 175 μm, or 40 μm to 150 μm. By setting the thickness T4 of the die pad 11 to 40% or more of the maximum thickness T1 of the lead frame 10, adhesion between the die pad 11 and the resin part 18 can be maintained. By setting the thickness T4 of the die pad 11 to 70% or less of the maximum thickness T1 of the lead frame 10, the thickness of the semiconductor device 20 after resin encapsulation can be reduced.
[0043] The thickness T5 of the resin part 18 may be 30% to 60% of the maximum thickness T1 of the lead frame 10, or 40% to 50%. The thickness T5 of the resin part 18 may be 24 μm to 150 μm, or 32 μm to 125 μm.
[0044] (Configuration of a semiconductor device) Next, the semiconductor device according to this embodiment will be described with reference to Figures 3 and 4. Figures 3 and 4 are diagrams showing the semiconductor device according to this embodiment.
[0045] As shown in Figures 3 and 4, the semiconductor device (semiconductor package) 20 comprises a die pad 11, a plurality of lead portions 12, a semiconductor element 21, and a plurality of bonding wires (connecting members) 22. The plurality of lead portions 12 are arranged around the die pad 11. The semiconductor element 21 is mounted on the die pad 11. The bonding wires 22 electrically connect the lead portions 12 and the semiconductor element 21. Furthermore, a resin portion 18 is arranged around the die pad 11 and the lead portions 12, on the back side of the semiconductor device 20. In addition, the die pad 11, lead portions 12, semiconductor element 21, and bonding wires 22 are resin-sealed by a sealing resin 23.
[0046] The die pad 11, lead portion 12, and resin portion 18 of the semiconductor device 20 are manufactured from the lead frame 10 described above. The configuration of the die pad 11, lead portion 12, and resin portion 18 is the same as that shown in Figures 1 and 2 described above, except for areas not included in the semiconductor device 20, so a detailed explanation is omitted here.
[0047] Various conventional semiconductor elements can be used as the semiconductor element 21. For example, integrated circuits, large-scale integrated circuits, transistors, thyristors, diodes, etc., may be used as the semiconductor element 21. Each of these semiconductor elements 21 has multiple electrodes 21a to which bonding wires 22 are attached. The semiconductor element 21 is fixed to the surface of the die pad 11 by adhesive 24. For example, die bonding paste may be used as the adhesive 24.
[0048] Each bonding wire 22 is made of a highly conductive material such as gold or copper. One end of each bonding wire 22 is connected to the electrode 21a of the semiconductor element 21. The other end of each bonding wire 22 is connected to the plating layer 25 located on the internal terminal surface 15 of each lead portion 12.
[0049] The sealing resin 23 may be a thermosetting resin such as silicone resin or epoxy resin, or a thermoplastic resin such as PPS resin. The overall thickness of the sealing resin 23 may be approximately 300 μm to 1500 μm. Also, one side of the sealing resin 23 (one side of the semiconductor device 20) may be, for example, 0.2 mm to 16 mm. In the space between the die pad 11 and the lead portion 12, the sealing resin 23 is in close contact with the resin surface 18a and the inner resin surface 18c of the resin portion 18. The sealing resin 23 is also in close contact with the connection portion surface 52a and the inner surface 53e of the second external terminal of the lead portion 12.
[0050] As shown in Figure 4, the surface 23a of the encapsulating resin 23 lies on the same plane as the external terminal surface 53a. That is, the external terminal surface 53a is exposed outward from the encapsulating resin 23. This allows the external terminal surface 53a to be used as an external terminal surface for electrical connection to the outside (Figure 5(b)), or as a thermal radiation surface for radiating heat from the semiconductor element 21 (Figure 5(a)). However, the surface 23a of the encapsulating resin 23 may also be located on the back side (negative Z side) of the external terminal surface 53a. Note that the encapsulating resin 23 is not shown in Figure 3.
[0051] Figures 5(a)-(c) show the semiconductor device 20 according to this embodiment connected to the wiring board 80, respectively.
[0052] Figure 5(a) shows the semiconductor device 20 with its back side connected to the wiring board 80. In this case, the back surface 53b of the first external terminal of the lead portion 12 and the back surface 11b of the die pad 11 are connected to the wiring board 80 by solder joints 81. This allows the back surface 53b of the first external terminal of the lead portion 12 to be used as an external terminal surface for electrical connection to the external wiring board 80. Furthermore, the external terminal surface 53a of the lead portion 12 can be used as a thermal radiation surface for radiating heat from the semiconductor element 21. In addition, the back surface 11b of the die pad 11 can be used as a thermal conduction surface for conducting heat from the semiconductor element 21.
[0053] Figure 5(b) shows the semiconductor device 20 with its front surface connected to the wiring board 80. In this case, the external terminal surface 53a of the lead portion 12 is connected to the wiring board 80 by the solder portion 81. This allows the external terminal surface 53a, which has a larger area than the back surface 53b of the first external terminal, to be used as the external terminal surface for electrical connection to the outside. In addition, the back surface 11b of the die pad 11 can be used as a thermal radiation surface for radiating heat from the semiconductor element 21.
[0054] Figure 5(c) shows a state in which the back side of the semiconductor device 20 is connected to the wiring board 80 and multiple semiconductor devices 20 are stacked. In this case, the back surface 53b of the first external terminal of the lead portion 12 of the semiconductor device 20 located closest to the wiring board 80 and the back surface 11b of the die pad 11 are each connected to the wiring board 80 by solder 81. In addition, the external terminal surface 53a of the lead portion 12 of the semiconductor device 20 located on the wiring board 80 side and the back surface 53b of the first external terminal of the lead portion 12 of the other semiconductor device 20 are electrically connected to each other. This allows multiple semiconductor devices 20 to be connected in the thickness direction (Z direction).
[0055] (Manufacturing method for lead frames) Next, the manufacturing method of the lead frame 10 shown in Figures 1 and 2 will be explained using Figures 6(a)-(i).
[0056] First, a flat metal substrate 31 is prepared as shown in Figure 6(a). The metal substrate 31 may be made of a metal such as copper, a copper alloy, or a 42 alloy (a 42% Ni Fe alloy). It is preferable to use a metal substrate 31 that has been degreased and cleaned on both sides.
[0057] Next, a photosensitive resist is applied to both the front and back surfaces of the metal substrate 31 and dried. Subsequently, the photosensitive resist on the metal substrate 31 is exposed to light through a photomask and developed. This forms etching resist layers 32 and 33 having the desired openings 32b and 33b (Figure 6(b)).
[0058] Next, the metal substrate 31 is thinned from the back side to a certain point in the thickness direction by half-etching. In this case, the etching resist layer 33 on the back side is used as an corrosion-resistant film, and etching is performed on the back side of the metal substrate 31 with an etching solution (Figure 6(c)). At this time, the front side of the metal substrate 31 may be covered with a film (not shown). This forms a back-side recess 36, which is a non-penetrating recess, on the back side of the metal substrate 31. This back-side recess 36 has a shape corresponding to the resin part 18. The etching solution can be appropriately selected depending on the material of the metal substrate 31 used. For example, when copper is used as the metal substrate 31, an aqueous ferric chloride solution may be used as the etching solution. In this case, the aqueous ferric chloride solution may be spray-etched from one or both sides of the metal substrate 31.
[0059] Next, the etching resist layer 33 on the back side is peeled off, leaving the etching resist layer 32 on the front side (Figure 6(d)). Then the metal substrate 31 is washed with water and dried.
[0060] Next, a resin portion 18 is formed on the back side of the metal substrate 31, and the resin portion 18 covers the recess 36 on the back side (Figure 6(e)). At this time, a thermosetting resin or thermoplastic resin may be injection molded or transfer molded on the back side of the metal substrate 31. This fills the recess 36 on the back side with the resin portion 18. The thickness T6 of the resin portion 18 from the portion 11e corresponding to the back surface 11b of the die pad may be 25 μm or more and 200 μm or less.
[0061] Next, the metal substrate 31 is thinned from the surface side to a certain point in the thickness direction by half-etching. In this case, the etching resist layer 32 on the surface side is used as a corrosion-resistant film, and etching is performed on the surface side of the metal substrate 31 with an etching solution (Figure 6(f)). The etching solution may be the same as the one used when etching the back side of the metal substrate 31 (Figure 6(c)).
[0062] As a result, the surface side of the metal substrate 31 is etched, forming the outer shapes of the die pad 11, lead portion 12, and support lead 13. A gap is also formed between the die pad 11 and the lead portion 12, exposing the resin portion 18 to the surface side. At this time, the surface side of the die pad 11 is thinned by etching. Furthermore, the surfaces of the connection portion 52 and external terminal 53 of the lead portion 12 are thinned by etching to the extent that the resin portion 18 is not exposed. When etching the surface side of the metal substrate 31, for example, the surfaces of the connection portion 52 and the external terminal 53 may be covered with a resist (not shown). In this case, after the etching of the surface of the die pad 11 and the etching between the die pad 11 and the lead portion 12 has progressed to a certain extent, the resist is removed. After that, the surfaces of the connection portion 52 and the external terminal 53 may be thinned by etching, respectively. Alternatively, the surface side of the metal substrate 31 may be thinned by etching only once.
[0063] Next, the resin part 18 is polished to a predetermined thickness (Figure 6(g)). Specifically, the resin part 18 is polished from the back side until the metal portion constituting the metal substrate 31 is exposed, at which point the polishing of the resin part 18 is terminated. This exposes the back surface 11b of the die pad 11 and the back surface 53b of the first external terminal of the lead part 12 to the back side. One method for polishing the resin part 18 is, for example, buff polishing.
[0064] In this embodiment, the step of exposing the resin portion 18 to the surface side by etching (Figure 6(f)) is performed before the step of polishing the resin portion 18 (Figure 6(g)). As a result, when etching the surface side of the metal substrate 31, the back side of the metal substrate 31 is covered by the resin portion 18. Therefore, the surface side of the metal substrate 31 can be thinned without providing a separate step of covering the back side of the metal substrate 31 with another material. Note that the step of polishing the resin portion 18 (Figure 6(g)) may be performed before the step of etching the surface side of the metal substrate 31 (Figure 6(f)).
[0065] Next, the etching resist layer 32 on the surface side is peeled off (Figure 6(h)). Then the metal substrate 31 is washed with water and dried.
[0066] Subsequently, electroplating is performed on the internal terminals 51 of the lead portion 12. This deposits a metal (for example, silver) onto the internal terminals 51 of the lead portion 12, forming a plating layer 25. In this way, the lead frame 10 shown in Figures 1 and 2 is obtained (Figure 6(i)).
[0067] (Method of manufacturing semiconductor devices) Next, the manufacturing method of the semiconductor device 20 shown in Figures 3 and 4 will be explained using Figures 7(a)-(e).
[0068] First, the lead frame 10 is fabricated using the method shown in Figure 6(a)-(i), for example (Figure 7(a)).
[0069] Next, the semiconductor element 21 is mounted on the die pad 11 of the lead frame 10. In this case, the semiconductor element 21 is placed and fixed onto the die pad 11 using an adhesive 24 (die attach process) (Figure 7(b)). For example, die bonding paste may be used as the adhesive 24.
[0070] Next, each electrode 21a of the semiconductor element 21 and the plating layer 25 formed on each lead portion 12 are electrically connected to each other by bonding wires (connecting members) 22 (wire bonding process) (Figure 7(c)). At this time, ultrasonic waves are applied through the capillary of a wire bonding apparatus (not shown) while the electrodes 21a of the semiconductor element 21 and the internal terminals 51 of each lead portion 12 are connected by the bonding wires 22.
[0071] Next, a sealing resin 23 is formed on the lead frame 10 by injection molding or transfer molding, for example, a thermosetting resin or a thermoplastic resin (Figure 7(d)). In this way, the die pad 11, lead portion 12, semiconductor element 21, and bonding wire 22 are sealed.
[0072] Next, the sealing resin 23 and support leads 13 between each semiconductor element 21 are diced. This separates the lead frame 10 for each semiconductor device 20. At this time, for example, the sealing resin 23 and support leads 13 between each semiconductor device 20 may be cut while rotating a blade containing artificial diamond.
[0073] In this way, the semiconductor device 20 shown in Figures 3 and 4 is obtained (Figure 7(e)).
[0074] As described above, according to this embodiment, the die pad 11 is thinned from the front side, and the internal terminals 51 are thinned from both the front and back sides. This allows the semiconductor element 21 and bonding wire 22 to be positioned further towards the back side, thereby reducing the overall thickness of the semiconductor device 20.
[0075] Furthermore, according to this embodiment, the resin portion 18 is located on the back side of the internal terminal 51 and the connection portion 52. That is, the resin portion 18 supports the lead portion 12 from the back side. This makes it possible to suppress deformation of the lead portion 12 during the manufacturing process of the lead frame 10 and the semiconductor device 20. As a result, it becomes possible to reduce the thickness of the lead portion 12, and the overall thickness of the lead frame 10 and the semiconductor device 20 can also be reduced.
[0076] Furthermore, according to this embodiment, the die pad surface 11a of the die pad 11 is located on the back side of the resin surface 18a of the resin portion 18, which is located between the die pad 11 and the lead portion 12. As a result, the semiconductor element 21 and the bonding wire 22 can be positioned further back, and the overall thickness of the semiconductor device 20 can be reduced.
[0077] Furthermore, according to this embodiment, the external terminal 53 is not thinned from the surface side, but at least a portion of the external terminal 53 is thinned from the back side. This allows the external terminal surface 53a to be used as an external terminal surface for electrical connection to the outside, or as a thermal radiation surface for radiating heat from the semiconductor element 21.
[0078] Furthermore, according to this embodiment, the connecting portion 52 is thinned from both the front and back sides. This suppresses the delamination of the resin portion 18 from the back surface 52b of the connecting portion. That is, when connecting the bonding wire 22 to the internal terminal 51 of each lead portion 12 (see Figure 7(c)), a pressing force is applied to each lead portion 12 from the front side to the back side by the capillary. Then, when the pressing force by the capillary is released, a repulsive force against the above pressing force is generated in the connecting portion 52 from the back side to the front side. According to this embodiment, the connecting portion 52 is thinned from both the front and back sides, making it thin and flexible. This reduces the repulsive force generated in the connecting portion 52 when the pressing force by the capillary is released. As a result, it is possible to suppress the delamination of the resin portion 18 from the back surface 52b of the connecting portion.
[0079] Furthermore, according to this embodiment, the thickness T2 of the internal terminal 51 is 10% or more of the maximum thickness T1 of the lead frame 10. This ensures conductivity between the internal terminal 51 and the external terminal 53. Also, the thickness T2 of the internal terminal 51 is 45% or less of the maximum thickness T1 of the lead frame 10. This allows for a thinner semiconductor device 20 after resin encapsulation.
[0080] (modified version) Next, a modified example of the semiconductor device according to this embodiment will be described with reference to Figures 8 and 9. The modified example shown in Figures 8 and 9 differs in the configuration of the external terminal 53 of the lead portion 12, while the other configurations are substantially the same as those of the embodiment shown in Figures 1 to 7. In Figures 8 and 9, the same reference numerals are used for parts that are the same as those in Figures 1 to 7, and detailed descriptions are omitted.
[0081] In the semiconductor device 20A shown in Figure 8, the external terminal 53 is not thinned from the front side, but rather its entire surface is thinned from the back side. The external terminal 53 has an external terminal surface 53a, a second external terminal back surface 53c, and a second external terminal inner surface 53e. In this case, the external terminal 53 does not have a first external terminal back surface 53b or a first external terminal inner surface 53d.
[0082] This semiconductor device 20A is manufactured from the lead frame 10 shown in Figures 1 and 2 described above. Specifically, the external terminals 53 of the semiconductor device 20A are obtained by removing the portion of the external terminals 53 of the lead frame 10 shown in Figures 1 and 2 that has not been thinned from the back side (the portion shown by the dashed line in Figure 8). In the manufacturing process of the semiconductor device 20A, when dicing the sealing resin 23 and the support leads 13 (Figure 7(e)), the lead portion 12 is cut at a position inside the inner surface 53d of the first external terminal. This results in the semiconductor device 20A shown in Figure 8.
[0083] As shown in Figure 9, the semiconductor device 20A is connected to the wiring board 80 on its front side. In this case, the external terminal surface 53a of the lead portion 12 is connected to the wiring board 80 by the solder portion 81. This allows the external terminal surface 53a to be used as an external terminal surface for electrical connection to the outside. In addition, the back surface 11b of the die pad 11 can be used as a thermal radiation surface for radiating heat from the semiconductor element 21.
[0084] According to this modified example, the thickness of the semiconductor device 20A can be reduced, and the size of the semiconductor device 20A can be reduced.
[0085] (Second Embodiment) Next, a second embodiment will be described with reference to Figures 10 to 12. Figures 10 to 12 show the second embodiment. The second embodiment shown in Figures 10 to 12 differs mainly in that metal layers 27a to 27c are inserted between the die pad 11 and the resin part 18, or between the lead part 12 and the resin part 18. The other configurations are substantially the same as those of the first embodiment described above. In Figures 10 to 12, the same reference numerals are used for parts that are the same as those in the first embodiment shown in Figures 1 to 9, and detailed descriptions are omitted.
[0086] (Lead frame configuration) Figure 10 is a cross-sectional view showing the lead frame 10A according to this embodiment, and Figure 11 is a partially enlarged cross-sectional view showing the lead frame 10A according to this embodiment.
[0087] In the lead frame 10A shown in Figures 10 and 11, metal layers 27a to 27c are positioned between the die pad 11 and the resin part 18, and between the lead part 12 and the resin part 18. Parts of each of the metal layers 27a to 27c may be exposed to the outside. The metal layers 27a to 27c may be formed on both the front and back sides of the lead frame 10A. The metal layers may also be formed only on the front side of the lead frame 10A, or only on the back side of the lead frame 10A (not shown).
[0088] As shown in Figures 10 and 11, the metal layer 27a is positioned between the lead portion 12 and the resin portion 18 on the surface side. Specifically, the metal layer 27a is positioned between the back surface 51b of the internal terminal of the lead portion 12 and the resin surface 18a of the resin portion 18. The metal layer 27a may be in an inverted T shape in cross-section. The metal layer 27a extends onto the resin surface 18a of the resin portion 18. Specifically, the metal layer 27a extends on the resin surface 18a, both toward the connection portion 52 side of the lead side 51c and toward the die pad 11 side of the lead side 51c. The metal layer 27a may extend across the entire thickness of the lead side 51c. The metal layer 27a is integrated with the plating layer 25 located on the internal terminal surface 15, but it does not have to be integrated with the plating layer 25.
[0089] As shown in Figures 10 and 11, the metal layer 27b is positioned between the die pad 11 and the resin part 18 on its back side. Specifically, the metal layer 27b is positioned between the die pad side surface 11c of the die pad 11 and the resin inner surface 18c of the resin part 18. The metal layer 27b may be L-shaped in cross-section. The metal layer 27b does not reach the die pad surface 11a, but it may reach the die pad surface 11a. The metal layer 27b also extends onto the resin back surface 18b of the resin part 18.
[0090] As shown in Figures 10 and 11, the metal layer 27c is positioned between the lead portion 12 and the resin portion 18 on its back side. Specifically, the metal layer 27c is positioned between the inner surface 53d of the first external terminal of the lead portion 12 and the outer resin surface 18d of the resin portion 18. The metal layer 27c may be L-shaped in cross-section. The metal layer 27c does not reach the back surface 53c of the second external terminal, but it may reach the back surface 53c of the second external terminal. The metal layer 27c also extends onto the resin back surface 18b of the resin portion 18.
[0091] The metal layers 27a to 27c may be plating layers. The metals constituting the metal layers 27a to 27c may be, for example, silver, copper, or solder (tin alloy). The metal layers 27a to 27c may be composed of the same type of metal as the plating layer 25.
[0092] The metal layers 27a to 27c may be inserted into only one of the following spaces: between the die pad 11 and the resin part 18, or between the lead part 12 and the resin part 18.
[0093] (Configuration of a semiconductor device) The semiconductor device manufactured using the lead frame 10A according to this embodiment is substantially the same as the semiconductor devices 20 and 20A according to the first embodiment described above, except that the metal layers 27a to 27c are incorporated.
[0094] (Manufacturing method for lead frames) Next, the manufacturing method of the lead frame 10A shown in Figures 10 and 11 will be explained using Figures 12(a)-(d). In Figures 12(a)-(d), the same reference numerals are used for parts that are the same as those in Figure 6(a)-(i), and detailed explanations are omitted.
[0095] First, a metal substrate 31 having a die pad 11, lead portion 12, and support lead 13 is manufactured in substantially the same manner as the process shown in Figures 6(a)-(h) above. A resin portion 18 is placed around the die pad 11 and lead portion 12 (Figure 12(a)).
[0096] Next, plating resist layers 34 and 35 are provided on the front and back sides of the metal substrate 31, respectively (Figure 12(b)). At this time, the plating resist layer 34 on the front side covers the die pad surface 11a of the die pad 11, and the connection surface 52a, the inner surface 53e of the second external terminal, and the external terminal surface 53a of the lead portion 12. On the other hand, the internal terminal surface 15 of the lead portion 12, the lead side surface 51c, and the resin surface 18a of the resin portion 18 are not covered by the plating resist layer 34, and the metal substrate 31 is exposed. The plating resist layer 35 on the back side covers the die pad back surface 11b of the die pad 11 and the inner surface 53d of the first external terminal of the lead portion 12. On the other hand, the resin back surface 18b of the resin portion 18 is not covered by the plating resist layer 35, and the metal substrate 31 is exposed.
[0097] If the metal layer is not formed on the back side of the lead frame 10A, the entire back side of the metal substrate 31, including the resin back surface 18b of the resin part 18, may be covered with a plating resist layer 35. If the metal layer is not formed on the front side of the lead frame 10A, the entire front side of the metal substrate 31, including the internal terminal surface 15 of the lead part 12, the lead side surface 51c, and the resin surface 18a of the resin part 18, may be covered with a plating resist layer 34.
[0098] Next, electroplating is performed on the areas of the metal substrate 31 that are not covered by the plating resist layers 34 and 35 (Figure 12(c)). This deposits metal (e.g., silver) onto the internal terminal surface 15 of the lead portion 12, forming a plating layer 25. Also, on the surface side, metal (e.g., silver) is deposited in the gap between the lead portion 12 and the resin portion 18. As a result, a metal layer 27a is deposited between the lead portion 12 and the resin portion 18. Similarly, on the back side, metal (e.g., silver) is deposited in the gap between the die pad 11 and the resin portion 18, and in the gap between the lead portion 12 and the resin portion 18. As a result, metal layers 27b and 27c are deposited between the die pad 11 and the resin portion 18, and between the lead portion 12 and the resin portion 18, respectively.
[0099] Subsequently, by stripping and removing the plating resist layers 34 and 35, the lead frame 10A shown in Figures 10 and 11 is obtained (Figure 12(d)).
[0100] (Method of manufacturing semiconductor devices) The method for manufacturing the semiconductor device according to this embodiment can be carried out in substantially the same manner as the method for manufacturing the semiconductor device 20 shown in Figures 7(a)-(e).
[0101] In this embodiment, metal layers 27a to 27c are inserted between the die pad 11 and the resin part 18, and between the lead part 12 and the resin part 18. This prevents moisture from entering the semiconductor element 21 from the interface between the die pad 11 and the resin part 18, or the interface between the lead part 12 and the resin part 18. As a result, the reliability of the semiconductor device after long-term use can be improved.
[0102] It is also possible to combine the multiple components disclosed in each of the above embodiments and variations as needed. Alternatively, some components may be removed from all the components shown in each of the above embodiments and variations. [Explanation of Symbols]
[0103] 10 Lead Frames 10a Package area 11 Die Pad 12 Lead section 13. Support lead (support member) 14 Suspension Lead 15 Internal terminal surface 17 External terminal side 18 Resin part 20 Semiconductor equipment 51 Internal terminal 52 Connection part 53 External terminals
Claims
1. In a lead frame, Die pad and, Lead portions arranged around the die pad, The die pad and the resin portion arranged around the lead portion are provided. The lead portion has an internal terminal located on the die pad side and an external terminal located on the opposite side of the die pad. The die pad is thinned from the surface side, The aforementioned internal terminals are thinned from both the front and back sides. The aforementioned resin part is a lead frame located on the back side of the internal terminal.
2. The lead frame according to claim 1, wherein the surface of the die pad is located on the back side of the surface of the resin portion that is located between the die pad and the lead portion.
3. The lead frame according to claim 1, wherein the external terminal is not thinned from the front side, and at least a portion of the external terminal is thinned from the back side.
4. The lead frame according to claim 1, wherein the lead portion has a connecting portion located between the internal terminal and the external terminal, and the connecting portion is thinned from both the front and back sides.
5. The lead frame according to claim 1, wherein the thickness of the internal terminals is 10% or more and 45% or less of the maximum thickness of the lead frame.
6. The lead frame according to claim 1, wherein a metal layer is inserted between the die pad and the resin portion, or between the lead portion and the resin portion.
7. In a method for manufacturing a lead frame, The process of preparing the metal substrate, The process involves etching the metal substrate from the back side to a certain point in the thickness direction to form a recess on the back side, A step of forming a resin portion on the back side of the metal substrate and covering the recess on the back side with the resin portion, The process of polishing the resin part to a predetermined thickness, The process includes a step of forming a die pad and lead portions arranged around the die pad by etching the metal substrate from the surface side to a certain point in the thickness direction, The lead portion has an internal terminal located on the die pad side and an external terminal located on the opposite side of the die pad. In the process of etching the metal substrate from the surface side, the resin portion located between the die pad and the lead portion is exposed to the surface side, and the die pad and the internal terminals are thinned from the surface side. The aforementioned internal terminals are thinned from the back side, The resin part is located on the back side of the internal terminal, a method for manufacturing a lead frame.
Citation Information
Patent Citations
Lead frame, lead frame manufacturing method, semiconductor device and semiconductor device manufacturing method
JP2012164877A
Semiconductor element substrate, manufacturing method thereof, semiconductor device and manufacturing method thereof
JP2019057590A
Lead frame, method for manufacturing the same, and electronic component device
JP2019075496A
Lead frame, manufacturing method of the lead frame, and manufacturing method of semiconductor device
JP2021150462A
Lead frame, method for manufacturing the lead frame, and semiconductor device having the lead frame mounted thereon
WO2008075654A1