Solder mask

Abstract

To provide a method for forming a patterned solder mask layer, and a method for manufacturing a printed circuit substrate and / or an electric component.SOLUTION: A method for forming a patterned solder mask 10 on a substrate is provided; a liftoff material 21 is a water-soluble polymer; and the mask layer 10 consists of an inorganic material. An article is constituted as a printed circuit substrate including a base layer 1 having a conductor at least partially arranged, a substrate 11 formed by an atomic layer deposition process or a chemical vapor deposition process and a patterned solder mask 10 optionally deposited on the conductor, and / or an electric component including the substrate, and the substrate includes an opening and / or a non-flat surface.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention generally relates to printed circuit boards and electrical components and methods for manufacturing the same. In particular, the present invention relates to a method for forming a (one or more) patterned protective layer by chemical vapor deposition.

Background Art

[0002] The formation of a solder mask or solder resist protective layer on a printed circuit board (PCB) is generally known in the art. A typical PCB includes an epoxy substrate on which conductors are disposed and a layer is deposited to prevent wetting in the reflow of solder (e.g., tin solder) and contact with the underlying metal (e.g., copper or silver).

[0003] The solder mask protects the conductors from corrosion caused by oxidation and / or the presence of sulfur-containing contaminants in the ambient air. Crevice corrosion has been found to be a serious problem in large cities due to the presence of sulfur compounds such as hydrogen sulfide (H2S) in the ambient air. Crevice corrosion destroys thousands of circuit boards in server centers every year, causing damage and losses estimated to be, for example, millions of dollars.

[0004] In many cases, the solder mask is a polymeric compound as described in International Application Publication No. 2018 / 009171. The main drawback associated with the use of an organic polymeric solder mask is that the organic material typically becomes overly hot and begins to outgas as soon as it is soldered at about 250°C and may subsequently dissolve. The underlying conductors are then exposed to the ambient environment and thus become more susceptible to corrosion. The organic vapors released when the polymeric mask is exposed to high temperatures further contaminate the (one or more) soldering areas, and thus the (soldered) components become contaminated accordingly.

[0005] The evaporation of the aforementioned organic masking material is a major problem in space applications. For this reason, some space agencies have completely prohibited the use of organic (polymer) solder masks for PCBs and related electronic equipment in critical objects such as (space) satellites.

[0006] Polymer solder resist layers are further disclosed in U.S. Patent No. 9,899,311 (mask layer with a thickness of 58 micrometers (μm)) and U.S. Patent No. 9,972,589 (mask layer with a thickness of at least 18 μm compared to an underlying layer with a maximum thickness of 15 μm).

[0007] Since polymer solder masks are typically applied by screen printing, it is not possible to achieve high lateral patterning resolution and / or deposition of layers less than 1 micrometer thick. The resolution limit of screen-printed solder masks is approximately 50 micrometers. The protective mask layer formed by screen printing typically has the same thickness as the underlying conductive layer. The formation of a mask by screen printing is disclosed in Korean Patent No. 101507913B.

[0008] Furthermore, organic materials have poor moisture resistance. Moisture in the atmosphere, once diffused through conventional polymer solder masks, quickly causes oxidation and / or corrosion in (one or more) PCB conductor layers or other substrates, thus leading to the destruction of the PCB.

[0009] The formation of a solder mask can be achieved by other methods such as lamination, sputtering, printing, extrusion coating, or chemical vapor deposition. Figure 1 shows the deposition of a solder mask onto a substrate 11 by a conventional method. Figure 1 illustrates an exemplary manufacturing process of a printed circuit board having a base layer 1 on which a conductive layer 2 is disposed, where the solder mask 101 is applied, for example, by a conventional printing or extrusion coating process. From Figure 1, it can be observed that the mask 101 is not conformal. Areas where the mask layer 101 lacks uniformity are indicated by dashed rectangles. Consequently, the via contacts 4 completely lack the mask coating in the areas indicated by the arrows. The exposed conductive areas (copper, silver) are potentially susceptible to corrosion.

[0010] In this regard, technological advancements in the field of PCB and / or electrical component manufacturing are still desired to address the challenges associated with the application of solder mask layers. [Overview of the Initiative]

[0011] The object of the present invention is to solve or at least mitigate each of the problems arising from the limitations and shortcomings of the prior art. This object is achieved by various embodiments of a method for forming a patterned solder mask layer and related methods for manufacturing printed circuit boards and / or electrical components. Thereafter, in one aspect of the present invention, a method for forming a patterned solder mask layer on a substrate is provided in accordance with the content defined in independent claim 1.

[0012] In a preferred embodiment, a method is provided for forming a patterned solder mask layer on a substrate including openings and / or non-planar surfaces by a chemical vapor deposition process, wherein the mask patterning is carried out by lift-off patterning using a water-soluble lift-off material.

[0013] In one embodiment, the lift-off material is a water-soluble polymer. In some exemplary embodiments, the lift-off material is polyvinyl alcohol (PVA).

[0014] In one embodiment, the mask is made of an inorganic material. In some exemplary embodiments, the mask is a metal oxide.

[0015] In one embodiment, the mask is inherently light-transmitting.

[0016] In one embodiment, a substrate that has been pre-supplied with a water-soluble lift-off material is degassed until a predetermined moisture level is achieved.

[0017] In one embodiment, the mask is deposited by an atomic layer deposition process. In another embodiment, the mask is deposited by a photo-assisted atomic layer deposition process.

[0018] In one embodiment, the mask is deposited at a temperature of 150°C or lower, preferably 125°C or lower. In one embodiment, the mask is a layer having a thickness in the range of 10 to 500 nm.

[0019] In one embodiment, the substrate is a printed circuit board and / or electrical components. In one embodiment, the substrate is a printed circuit board on which several electrical components are mounted.

[0020] In another aspect of the present invention, a method for manufacturing printed circuit boards and / or electrical components is provided in accordance with the content defined in independent claim 13. In one embodiment, the method comprises depositing a patterned solder mask layer onto a lower substrate, optionally a conductor, by a chemical vapor deposition process, wherein the substrate includes openings and / or non-planar surfaces, and the patterning is carried out by lift-off patterning using a water-soluble lift-off material.

[0021] In one embodiment, the method further includes depositing a protective layer onto the surface of a printed circuit board and / or electrical component manufactured by a chemical vapor deposition process, preferably an atomic layer deposition process.

[0022] In a further aspect of the present invention, an article is provided comprising a solder mask patterned on a substrate according to the definition of independent claim 15. In one embodiment, the article is configured as an electrical component comprising a printed circuit board and / or a substrate having a base layer on which at least a conductor is disposed, and a patterned solder mask optionally deposited on the substrate by a chemical vapor deposition process, wherein the patterning is carried out by lift-off patterning using a water-soluble lift-off material, and the substrate comprises openings and / or non-flat surfaces.

[0023] The usefulness of the present invention arises for various reasons depending on each specific embodiment. First, the method enables the formation of a stable solder mask coating at high temperatures (typically 250-300°C) as needed for the soldering process. Therefore, some of the materials most frequently used for this method, such as Al2O3, are stable at temperatures above 1000°C. The method further enables the formation of a conformal mask coating, for example, to avoid the formation of gaps (unmasked areas) in the conductive layer. Thus, the mask is configured to provide conformal sealing for unmasked areas.

[0024] As a result, printed circuit boards and / or electrical components containing (one or more) mask layers deposited according to this method are less susceptible to corrosion, particularly crevice corrosion, which explains the improved reliability of the mentioned instruments into which electronic devices are incorporated. Conventional atomic layer deposition layers with thicknesses (10-500 nm) are approximately 10 -6 g / m 2 This indicates the water vapor transmission rate (WVTR) (also called water vapor transmission rate (MVTR)) at a level of / 24h.

[0025] The formation of patterns having a high pattern resolution (less than 10 μm) can be achieved using various printing methods or various known methods such as photoresist lithography. The techniques mentioned are typically used in the semiconductor industry for patterning layers deposited by chemical vapor deposition (CVD) or atomic layer deposition (ALD) having a resolution of less than 100 nm. On the other hand, the present invention utilizes a lift-off technique for patterning. Importantly, the present invention enables the creation of patterns on an essentially flat surface including openings (e.g., via contacts) for further attachment of electrical components, for example by soldering. The method further enables patterning of non-flat surfaces, such as the surface of a wire tip, by immersing the object mentioned in a liquid (lift-off) polymer or polymer solution or by spin-coating the lift-off polymer by any suitable means such as a 3D printer. By depositing a thin film patterned with high precision on a substrate, the method disclosed herein further enables mask application in regions including openings for conductor pads and / or high-precision measurement electrodes.

[0026] By creating the masked and unmasked regions as pre-designed, the horizontal flow of the liquid solder alloy into unwanted regions can be efficiently prevented. Preventing the spread of solder is a common use of solder masks, but in the present disclosure, the horizontal flow of the liquid solder is achieved with much higher precision (especially around via-openings). The method further disclosed is versatile in that it enables deposition of the present mask on a part and on the whole of a substrate, such as a printed circuit board.

[0027] In the present disclosure, a material having a layer thickness of less than 1 micrometer (μm) is referred to as a "thin film".

[0028] The expression "several" refers in the present disclosure to any positive integer starting from one (1), for example 1, 2 or 3. The expression "a plurality of" refers in the present specification to any positive integer starting from two (2), for example 2, 3 or 4.

Brief Description of the Drawings

[0029] [Figure 1] Schematically shows a substrate coated with a solder mask by a conventional process (prior art). [Figure 2] Shows a method for forming a patterned solder mask during the manufacture of a printed circuit board and / or an electrical component according to various embodiments. [Figure 3] Shows a method for forming a patterned solder mask during the manufacture of a printed circuit board and / or an electrical component according to various embodiments. [Figure 4A] Uncontrolled solder spread on the substrate in the absence of a patterned solder mask, viewed from above. [Figure 4B] Uncontrolled solder spread on the substrate in the absence of a patterned solder mask, viewed from above. [Figure 4C] Shows the spread of solder within the limits set by a precisely patterned solder mask, viewed from above and from the side, respectively. [Figure 4D] Shows the spread of solder within the limits set by a precisely patterned solder mask, viewed from above and from the side, respectively.

Best Mode for Carrying Out the Invention

[0030] Disclosed herein are detailed embodiments of the present invention with reference to the accompanying drawings.

[0031] Provides a method for forming a patterned solder mask layer 10 (hereinafter mask 10) on a substrate 11. The substrate 11 can be provided as a printed circuit board including at least one base layer 1 made of an epoxy laminate with any glass fiber reinforcement or any other suitable material, and a conductor 2 such as copper or silver is disposed at least partially on this base layer (FIGS. 2 and 3). In most cases, pure copper is utilized.

[0032] The conductor 2 can be provided as a conductive layer / coating for an essentially large surface, or as a path (as an essentially thin strip of metal), the latter typically formed by etching.

[0033] In some cases, printed circuit boards can be called hybrid electronics. In such cases, the board includes at least one ceramic base layer 1 (instead of any glass fiber reinforced organic epoxy laminate), and the base layer has conductive paths made of silver by lamination printing instead of being etched from copper.

[0034] Alternatively, the substrate 11 may be provided as an electronic or electrical component, also known as a component for constructing an electrical circuit (hereinafter referred to as "electrical component" or "component"). Thus, the substrate 11 can be configured as such an electrical component or component. Furthermore, the substrate 11 can be configured as a PCB with several electrical components mounted thereon.

[0035] The components mentioned can be configured, for example, as exposed or sealed integrated circuit elements. The methods for forming the mask disclosed herein are applicable to any electrical component, such as transistors, resistors, capacitors, and diodes, but are not limited to these. Any predetermined area of ​​such component or any part thereof, such as wires or pins, can be masked. In fact, the methods disclosed herein are applicable to any surface to which a mask pattern should be applied in order to restrict metal wetting and the resulting flow into connectors and casings, etc. Such surfaces include essentially flat and non-flat surfaces. Non-flat surfaces are surfaces that include discontinuous features (profiles) such as cavities, folds, and / or other irregularities. These features may be three-dimensional (using length, width, and height). The flat and non-flat surfaces mentioned may further include openings such as through or cut openings (via contacts). Thus, the mask pattern can be applied in the manner disclosed herein to a complex three-dimensional substrate containing at least some of the features mentioned above. Therefore, the substrate may include any one of the following: a non-flat surface (blind opening or cavity) and / or through-openings (via contacts) or a combination thereof.

[0036] An exemplary component to be soldered to the (masked) PCB substrate is indicated by reference numeral 31 in Figure 2. For clarity, the formation of the patterned solder mask 10 on component 31 is not shown, but those skilled in the art should be able to understand the implementation referred to based on the teachings in Figures 2 and 3 and related descriptions.

[0037] Figure 2 shows the formation of a patterned solder mask layer 10 on an essentially uniform substrate 11, and Figure 3 shows the formation of a patterned solder mask layer 10 on a substrate including via contacts 4. In the illustrated configuration, the substrate is a PCB.

[0038] In some embodiments, the mask 10 is deposited on the substrate 11 using lift-off patterning techniques.

[0039] The lift-off material 21 is pre-applied to the substrate surface in a predetermined area, such as an area intended to contain contacts, interconnects (Figure 2) and / or via contacts (Figure 3). In this way, the lift-off material 21 is applied to several spatially confined areas of the substrate surface to cover the base layer 1 and at least partially conductive metal layers 2 (Figures 2i and ii). Figure 3 shows a configuration in which the lift-off material 21 is applied to the location of a via contact 4 (provided as an opening in the substrate 11). The lift-off 21 penetrates the via contact 4 and fills the associated opening shown in Figures 3(i and ii). The lift-off 21 may be applied by extrusion (Figures 2 and 3) or by immersing the desired element (e.g., component wire) in the lift-off solution. Any other suitable subtractive patterning method can be utilized.

[0040] In preferred embodiments, the lift-off material 21 is water-soluble. In some cases, the lift-off 21 is a water-soluble polymer, such as polyvinyl alcohol (PVA). Non-limitingly, this should be understood to include pure PVA and various mixtures containing the soluble polymer to such an extent that a certain degree of solubility can be achieved in aqueous solution. PVA is a synthetic polymer having a hydroxyl group in its structure. PVA is synthesized by polymerization of vinyl acetate to polyvinyl acetate, followed by hydrolysis to the resulting polyvinyl alcohol.

[0041] Furthermore, natural water-soluble polymers synthesized by modifying starch and cellulose can be used. In particular, but not limited to, natural polymers with high melting temperatures (above 150°C), such as carboxymethylcellulose (CMC), ethylcellulose (EC), and hydroxyethylcellulose (HEC), can be used.

[0042] Furthermore, polylactic acid (PLA) can be provided as a mixture with a water-soluble polymer. Pure PLA is a hydrophobic polymer that neither solubilizes nor disperses in water.

[0043] In some cases, the lift-off material 21 can be selected to be solubilized in an aqueous alcohol solution. In some cases, an aqueous isopropanol solution can be used as the solvent for the PVA.

[0044] After pre-coating the lift-off material 21 onto the substrate 11, the substrate is further subjected to a chemical vapor deposition process. During chemical deposition, the entire surface area of ​​the substrate, including the lift-off material 21, is deposited with the mask layer 10 (i in Figures 2 and 3). Thus, single-sided or double-sided mask deposition can be achieved as shown in Figures 2 and 3.

[0045] In a preferred embodiment, the mask 10 is deposited by an atomic layer deposition (ALD) process.

[0046] ALD is based on alternating self-saturating surface reactions, in which different reactants (precursors), provided as compounds or chemical elements in a non-reactive (inert) gaseous support, are successively introduced into a reaction space containing a substrate. After the deposition of the reactants, the substrate is purged with an inert gas. A conventional ALD cycle proceeds in two half-reactions (introduction and purging of the first precursor and introduction and purging of the second precursor), which self-regulates (self-saturates) the formation of a layer of material typically 0.05–0.2 nm thick. This cycle is repeated as many times as necessary to obtain a film of a predetermined thickness.

[0047] The ALD process can be carried out using various reactants and subprocesses (e.g., plasma-enhanced ALD, or PEALD). Some reactants can be deposited even at room temperature (approximately 20°C), but higher deposition temperatures, such as 250-300°C, are preferred to achieve improved moisture barrier properties.

[0048] During the ALD process, certain materials used for the lift-off 21 pre-coated on the substrate may begin to soften. This softening may continue until the ALD reaction ceases to proceed on the substrate surface, resulting in incomplete film growth on the lift-off 21, or even the absence of such growth altogether.

[0049] To prevent softening, the mask formation process can be started at a lower temperature compared to the typical temperature range for chemical vapor deposition reactions. Therefore, during the formation of a mask film with a desired thickness of approximately 100 nm, some layers can be grown at 50°C (to achieve a film thickness of, for example, about 10 nm), while the remaining layers can be grown at, for example, 125°C (to about 90 nm).

[0050] Furthermore, it was found that if an incomplete coating is formed on the lift-off 21 by the deposition process, the formation of such a defective coating is advantageous in terms of the easy removal of the lift-off 21 (described below).

[0051] For example, ALD deposition of the mask layer 10 can be carried out using an ALD apparatus as described in U.S. Patent No. 8,211,235 (Lindfors) or an apparatus trademarked as the Picosun R-200 Advanced ALD system, available from Picosun Oy of Finland.

[0052] Therefore, the deposited mask 10 consists of an inorganic material (polymer-free), preferably an insulator. In some configurations, the mask consists of a metal oxide. The metal compounds for the metal oxide are selected from the group including, but are not limited to, aluminum (Al), titanium (Ti), zirconium (Zr), vanadium (V), hafnium (Hf), tantalum (Ta), niobium (Nb), molybdenum (Mb), and wolfram (W).

[0053] Using the metal compounds (in oxide form) mentioned above, laminates can be manufactured that contain several selected layers at once, such as Al2O3 layers and TiO2 layers. Furthermore, the laminates may contain several organic layers that are known to be deposited by molecular layer deposition (MLD), a subclass of ALD, as in the conventional method.

[0054] Several non-limiting examples for the formation of mask 10 based on ALD technology are shown below. All exemplary reactions were performed using the R-200 Advanced ALD system instrument available from Picosun Oy.

[0055] Example 1: A mask 10, provided as a layer of aluminum oxide (Al2O3), was formed on a substrate 11 from trimethylaluminum (TMA, Al(CH3)3) and water. The deposition temperature varied within the range of approximately 20°C (room temperature) to approximately 300°C.

[0056] Example 2: A mask 10, provided as a titanium dioxide (TiO2) layer, was deposited onto a substrate 11 using titanium tetrachloride (TiCl4) and water. The deposition temperature varied within the range of approximately 20°C (room temperature) to approximately 300°C.

[0057] Example 3: Mask 10 provided as a layer of niobium dioxide (Ni2O5) is replaced with niobium ethoxide (Nb2(OC2H5) 10 The material was deposited onto the substrate 11 using a solution and water. Deposition is possible within a temperature range of at least 90°C to 150°C.

[0058] In all examples, the layer produced by a single ALD cycle (introduction and purging of the first precursor and introduction and purging of the second precursor) was approximately 0.1 nm thick. To deposit a layer with a thickness of 10–100 nm, the described reaction (cycle) is repeated a predetermined number of times. Therefore, the deposition procedure may be completed within a range of approximately 10 minutes to approximately 20 hours, depending on the number of cycles required and the duration of each cycle.

[0059] For the purposes of the present invention, it is preferable to deposit the mask 10 as a layer having a thickness of 10 to 500 nm, preferably 20 to 200 nm, more preferably 50 to 200 nm, for example, 100 nm.

[0060] Similarly, mask 10 can be established from three or more precursors.

[0061] In some cases, mask 10 can be established from a single precursor compound. The procedure advantageously utilizes the principle of photo-assisted atomic layer deposition (hereinafter referred to as photo-ALD), where the surface film deposition reaction is triggered by photons delivered to the substrate surface by exposing the substrate to electromagnetic radiation of at least one wavelength within a given wavelength range (while the substrate is introduced together with the precursor). Ultraviolet light (100-400 nm), visible light (400-800 nm), or infrared light (over 800 nm) can be used. In such cases, the ALD reactor is advantageously equipped with a suitable radiation source. Selection of the area for photoexposure is carried out, for example, by tilting a mirror to project or orient (scan) the radiation onto a given area, thereby limiting the ALD growth to a given region.

[0062] The deposition / mask formation 10 is advantageously carried out at a temperature of 150°C or lower, preferably 125°C or lower. In some cases, the deposition process can be carried out at a temperature higher than 150°C, depending on the melting point of the lift-off material 21.

[0063] By selecting the appropriate precursor fluid for the chemical vapor deposition process, the formation of an inherently light-transmitting mask layer can be achieved. The mask 10 deposited in step i (Figures 2 and 3) is preferably light-transmitting (transparent). Such a configuration allows for easy identification of any markings (e.g., conductor 2) pre-applied to the substrate 11. The light-transmitting mask further facilitates post-processing by laser ablation, such as the high-speed laser ablation technique used in display patterning.

[0064] Various CVD processes, including ALD processes, are sensitive to moisture (e.g., moisture in the atmosphere). Examples 1-3 show that water is often used as a component (precursor) in chemical reactions. Furthermore, moisture can arise from any substance inherent in the substrate or from substances disposed on the substrate. Such moisture release (vaporization) can occur during chemical vapor deposition reactions, particularly before the heating temperature reaches 100°C. Therefore, moisture can affect the chemical vapor deposition process.

[0065] In this regard, if the substrate 11 and / or lift-off material 21 contain or consist of (one or more) moisture-containing materials, moisture must be removed from the substrate and / or lift-off material before subjecting them to chemical deposition in order to obtain a mask layer of the desired quality.

[0066] Before performing one or more chemical vapor deposition reactions, it is preferable that the substrate 11, which has been pre-supplied with water-soluble lift-off material 21, be degassed until a predetermined moisture level is achieved.

[0067] Degassing can be carried out in the reaction chamber of an exemplary ALD reactor, optionally implemented as the apparatus mentioned above. With the substrate 11 placed in the reaction chamber, degassing can be monitored with at least one external detector or sensor, for example, configured as a residual gas analyzer (RGA). Thus, the degassing process is continued until a predetermined moisture level (in the substrate) is achieved. Depending on the resulting product, the desired moisture level can be provided, for example, as degassed molecules such as water in the fluid (gas, etc.) discharged from the chamber containing the substrate at a concentration of <1 / 100, preferably <1 / 1000, more preferably <1 / 10000, even more preferably <1 ppm, most preferably <1 ppb. Insufficient degassing can lead to the formation of a low-quality ALD coating or particles (undesirable). Electronic devices containing PCBs and / or components with such low-quality (mask) coatings will experience failures unrelated to their use and lifespan. Instruments with a degassing option are available, for example, as the R-200 instrument mentioned above, equipped with any gas analyzer (Picosun Oy, Finland).

[0068] The lift-off material may allow the complete or partial growth of an ALD or CVD film on it. Therefore, this growth may be complete or incomplete. The lift-off material may be selected to prevent the initiation of the film growth. In addition or alternatively, the film growth may be partially or completely prevented by a combination of deposition chemicals, process conditions, and the mask. In this specification, this lift-off may be referred to as a conventional lift-off process in which material on its surface is removed or a process in which the growth of the deposited film is affected by the lift-off material. The described lift-off techniques are advantageous in that even the deposition of (one or more) insufficient layers on a polymer surface, optionally accompanied by polymer melting, does not result in adverse consequences for the mask formation process (due to subsequent removal of the lift-off).

[0069] In step i (Figures 2 and 3), the entire surface of the substrate 11 (the surface exposed to the precursor fluid) is covered with a (mask) layer 10.

[0070] In step ii, the lift-off material 21 is removed from the substrate after or simultaneously with the removal of layer 10 at the lift-off position 21. In most cases, layer 10 can be efficiently removed while the lift-off 21 is dissolved / solubilized in water or an aqueous solvent. The inventors note herein that the layer 10 deposited by the chemical vapor deposition process is preferably no more than 1 μm, more preferably 500 nm, in terms of thickness, and therefore can be easily removed as soon as the lift-off 21 is dissolved. In some cases, the removal of layer 10 from the lift-off position can be assisted by mechanical shock, such as a temperature difference between the substrate and the solvent used. Alternatively or in addition, the removal of layer 10 from the lift-off position can be assisted by photon absorption, such as laser ablation.

[0071] The removal of the lift-off polymer 21 is advantageously achieved by placing the substrate 11 in an aqueous solution. Experiments forming the basis of this invention led the inventors to the surprising result that, without any special action, the inorganic mask layer was destroyed in the aqueous solution, exposing the water-soluble polymer to an aqueous environment in which the lift-off polymer dissolved.

[0072] The method disclosed herein enables the formation of a mask pattern having a resolution of less than 10 μm.

[0073] After removing the lift-off 21 and then optionally washing it away, the patterned substrate 11 is obtained (Figures 2 and 3iii). The mask layer 10 provides conformal sealing for unmasked regions, which are regions occupied by the lift-off 21 during the deposition process. Such a configuration efficiently avoids the formation of gaps or unmasked regions on the conductor (Figure 1, dashed rectangles).

[0074] Step iv (Figures 2 and 3) shows the application of solder 3 to the substrate 11 (an unmasked area of ​​the substrate). Solder 3 may be a liquid tin-lead (SnPb) alloy or a Pb-free alloy now more commonly known as "SAC" (SnAgCu) (referred to herein as "tin solder"). It is clear that other solder compositions are available.

[0075] The solder 3 is advantageously applied to the conductive regions ("edges") surrounding the unmasked areas. These are the conductive (e.g., copper) regions 2 that remain exposed after the removal of the lift-off 21. The conductive regions 2 are readily wetted by the solder, in contrast to the base (epoxy or ceramic) layer 1, but the horizontal flow of the liquid solder alloy is efficiently prevented by the mask 10 (iv in Figures 2 and 3).

[0076] Furthermore, the prevention of horizontal solder flow is shown in Figures 4A to 4D. Thus, Figures 4A and 4B show a substrate having several via contacts 4, the substrate including a base layer 1 on which a conductor 2 is partially disposed, but without a solder mask 10. The dashed lines indicate the boundaries where solder 3 deposition is desired. From Figures 4A and 4B, it can be observed that in the absence of a mask 10, the solder 3 spreads uncontrolledly along the conductor 2 on the substrate.

[0077] Figures 4C and 4D show the same substrate deposited with mask 10 (approximately 100 nm thick) (top view and side view, respectively). Since mask 10 is transparent, the boundary of the masked area is indicated by a dashed line. From Figures 4C and 4D, it can be observed that mask 10 effectively prevents the solder alloy 3 from spreading outside the boundary represented by the mask. The solder droplet shown in Figure 4C is too small to spread along the entire "boundary" indicated by the dashed line, but Figure 4C clearly shows that the solder conforms to the shape of the mask deposition layer 10. Figure 4D shows the stop line between the solder 3 and mask 10 viewed from the side.

[0078] Refer again to Figures 2 and 3. In iv and v, Figure 2 shows the process of soldering component 31 (optionally having a mask 10 formed by the method described above) to the substrate. Component 31 includes a metal-coated region 31A (typically nickel or gold alloy) that forms a contact to the (unmasked) conductive region 2 by soldering. Figure 3 shows soldering wire 32 to via contact 4. Soldering is performed by annealing (in a reflow oven or by manual soldering with a soldering iron or hot air soldering) in the temperature range of 250-300°C. Reflow of the solder alloy occurs during soldering (v in Figures 2 and 3), thereby the solder 3 acquires a characteristic shape resulting from surface tension that can be used for self-alignment to help position the component correctly.

[0079] The processes described above enable the manufacture of printed circuit boards and / or electrical components. In some cases, this manufacturing method further includes the deposition of at least one protective layer onto the surface of the manufactured article, such as a printed circuit board and / or electrical component, by a chemical vapor deposition process, preferably an atomic layer deposition process.

[0080] Thus, an exemplary (PCB) substrate 11 is obtained, including one or more inorganic mask layers 10 deposited by an exemplary ALD process (Figures 2 and 3iii), and components 31 and 32 are then soldered to the substrate (Figures 2 and 3iv and v). The manufactured article (e.g., PCB) is further deposited with at least one protective layer, such as a metal oxide layer, by chemical vapor deposition, preferably by an ALD method, according to the methods described above.

[0081] Therefore, ALD technology can be used for sealing solder alloys to resist the formation of tin whiskers, and whisker formation has been shown to be a greater problem with Pb-free solders than with SnPb solders. The relevant process is described in International Patent Application Publication No. 2017 / 178690 (Pudas) relating to the deposition of ALD layers on tin substrates.

[0082] By providing an inorganic mask layer 10 beneath an additional protective inorganic layer, the adhesion and mechanical and thermal durability of the manufactured article are enhanced compared to conventional situations, especially when the solder mask is a (organic) polymer. A metal compound-based (and therefore mechanically rigid) protective layer placed on a manufactured article (e.g., a PCB) is more likely to break under mechanical stress when placed on an inherently soft material (i.e., a conventional polymer mask) rather than a rigid material (a solder mask formed according to this disclosure).

[0083] An exemplary process for mask formation and related processes for the manufacture of printed circuit boards and / or electrical components are as follows: • To obtain substrate 11, After drying as needed, a water-soluble lift-off material 21 is applied to the substrate to create a lift-off pattern. The inorganic mask layer 10 is deposited on a substrate 11 that has been pre-supplied with water-soluble lift-off 21 by chemical vapor deposition, preferably by atomic layer deposition. • Remove lift-off 21 to expose the unmasked area, • Arbitrarily soldering components to areas that are not masked, • Optionally, a protective inorganic layer may be applied to the entire structure by chemical vapor deposition, preferably by atomic layer deposition. Includes.

[0084] In some cases, it is advantageous to apply the solder mask 10 to both the PCB and the electrical components to be soldered. Such a procedure yields an unexpected benefit: the surface tension of the liquefied solder allows for self-alignment of the components (on the PCB) with even higher resolution.

[0085] It will be apparent to those skilled in the art that the patterns produced by the mask 10 can be provided in various sizes and shapes, such as square or rod shapes produced around openings (via contacts), thereby achieving a desired (solder) wetting pattern around the openings.

[0086] In other configurations, the patterning process can be carried out by laser ablation. In such cases, the provision of the lift-off element 21 can be omitted. The substrate 11 deposited with the mask layer 10 is subjected to laser ablation, thereby creating areas without the mask layer 10 with high precision. As described above, laser ablation is facilitated by the fact that the ALD deposition mask 10 is transparent. Subtractive patterning by laser ablation enables a patterning resolution higher than 10 μm. Solder spreads only on the laser-ablated surface where the mask layer 10 is absent and / or wets it. Thus, the mask is configured to provide conformal sealing for the unmasked areas. Those skilled in the art will notice that the laser ablation method can also be applied to non-planar surfaces with different shapes and / or height features by adjusting the laser focus.

[0087] The procedures described can be efficiently utilized immediately after the printed circuit board and / or electrical component is manufactured. The process for manufacturing a PCB and / or electrical component by this method, including the formation of the mask layer 10 described above, and the associated article comprising the patterned solder mask and configured as a printed circuit board and / or electrical component constitutes a further embodiment of the present invention.

[0088] It will be understood by those skilled in the art that the embodiments described herein can be adapted and combined as desired. Accordingly, this disclosure is intended to encompass all possible modifications of apparatus and deposition methods recognizable by those skilled in the art within the scope of the appended claims.

Claims

1. A method for forming a patterned solder mask layer (10) on a substrate (11) including openings and / or non-flat surfaces by a chemical vapor deposition process, wherein the patterning of the solder mask layer (10) is carried out by lift-off patterning using a water-soluble lift-off material (21).

2. The method according to claim 1, wherein the water-soluble lift-off material (21) is a water-soluble polymer.

3. The method according to any one of claims 1 to 2, wherein the water-soluble lift-off material (21) is polyvinyl alcohol (PVA).

4. The method according to any one of claims 1 to 3, wherein the solder mask layer (10) is made of an inorganic material.

5. The method according to any one of claims 1 to 4, wherein the solder mask layer (10) is made of a metal oxide.

6. The method according to any one of claims 1 to 5, wherein the solder mask layer (10) is light-transmitting.

7. The method according to any one of claims 1 to 6, wherein the substrate (11) is pre-supplied with the water-soluble lift-off material (21), and the substrate (11) is degassed until a predetermined moisture level is achieved before the solder mask layer (10) is formed by the chemical vapor deposition process.

8. The method according to any one of claims 1 to 7, wherein the solder mask layer (10) is deposited by an atomic layer deposition process.

9. The method according to any one of claims 1 to 8, wherein the solder mask layer (10) is deposited by a photo-assisted atomic layer deposition process.

10. The method according to any one of claims 1 to 9, wherein the solder mask layer (10) is deposited at a temperature of 150°C or lower.

11. The method according to any one of claims 1 to 10, wherein the solder mask layer (10) is a layer having a thickness in the range of 10 to 500 nm.

12. The method according to any one of claims 1 to 11, wherein the substrate (11) is a printed circuit board and / or an electrical component.

13. A method for manufacturing a printed circuit board and / or an electrical component, comprising forming a patterned solder mask layer (10) on a conductor (2) at least partially disposed on a lower substrate (11) by a first chemical vapor deposition process, wherein the substrate (11) includes openings and / or non-flat surfaces, and the patterning of the solder mask layer (10) is carried out by lift-off patterning using a water-soluble lift-off material (21).

14. The method according to claim 13, further comprising soldering components to the printed circuit board and / or the electrical components on which the solder mask layer (10) is formed, and depositing a protective layer on the surface of the printed circuit board and / or the electrical components on which the components are soldered by a second chemical vapor deposition process.

15. The method according to claim 14, wherein each of the first chemical vapor deposition process and the second chemical vapor deposition process is an atomic layer deposition process.

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