Substrate for electronic devices and method for manufacturing the same, Schottky barrier diode, field-effect transistor, and bipolar transistor

Abstract

This electronic device substrate (1) is provided with: a sapphire substrate (2) comprising a sapphire single crystal; a buffer layer (4) comprising a single crystal of, e.g., Ir, formed on the sapphire substrate (2) by epitaxial growth; and a diamond layer (6) formed on the buffer layer (4) by epitaxial growth and comprising an n-type or p-type diamond single crystal having a plane orientation of (001), (110), (111), or (311). The plane orientation of the sapphire substrate (2) may be (0001), the plane orientation of the buffer layer (4) may be (111), and the plane orientation of the diamond layer (6) may be (111), and the crystal axis direction < 1-120 > of the sapphire substrate (2), the crystal axis direction <-1-12 > of the buffer layer (4), and the crystal axis direction <-1-12 > of the diamond layer (6) may be parallel to each other.

Description

[Technical Field]

[0001] The present invention relates to a substrate for electronic devices having a diamond single crystal layer with a surface orientation of (110), (111), (311), or (001) tilted at a predetermined angle, a method for manufacturing the same, and a Schottky barrier diode, a field-effect transistor, and a bipolar transistor using the said substrate for electronic devices. Furthermore, the present invention relates to a manufacturing method that enables the production of an electronic device substrate having a diamond single crystal layer with a (001) orientation at a lower temperature than conventional methods. This application claims priority based on Japanese Patent Application No. 2024-077378, filed in Japan on May 10, 2024, and the contents of that application are incorporated herein by reference. [Background technology]

[0002] Non-patent document 1 discloses a substrate for an electronic device in which a 1 μm thick Ir buffer layer with a (001) plane orientation is formed on a substrate made of a sapphire single crystal whose surface has a (11-20) plane orientation, and a diamond layer with a (001) plane orientation is crystal-grown on top of it.

[0003] In Non-Patent Document 1, the Ir buffer layer was fabricated under conditions where the sapphire single crystal substrate temperature was 850°C and 1 μm of Ir was deposited over 100 minutes. That is, the deposition rate of the Ir buffer layer was 10 nm per minute. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Seong-Woo Kim, Yuki Kawamata, Ryota Takaya, Koji. Koyama, and Makoto Kasu, “Growth of high-quality one-inch freestanding heteroepitaxial (001) diamond on (11-20) sapphire substrate”, Applied Physics Letters 117, 202102 (2020). Summary of the Invention Problem to be Solved by the Invention

[0005] With the substrate for electronic devices disclosed in Non-Patent Document 1, only a diamond single crystal layer having a (001) surface plane orientation can be produced, and diamond single crystals having plane orientations of (110), (111) or (311) cannot be obtained. When a diamond single crystal layer having a plane orientation of (110), (111) or (311) is used in an electronic element, superior device characteristics can be expected compared to a diamond single crystal layer having a (001) plane orientation.

[0006] Further, in Non-Patent Document 1, an Ir buffer layer is formed at a high substrate temperature of 850°C. However, heating a substrate to such a high temperature of 850°C in an ultra-high vacuum apparatus such as a sputtering apparatus requires a special and large-scale heating apparatus, involves many technical difficulties, and cannot be said to be practical. Means for Solving the Problem

[0007] [Aspect 1] A substrate for electronic devices according to aspect 1 of the present invention includes: a sapphire substrate made of sapphire single crystal; a buffer layer made of a single crystal of a buffer metal, wherein the buffer metal is a metal selected from the group consisting of Ir, Au, Ni, and Al, or an alloy composed of two or more of the foregoing metals, the buffer layer being formed on the sapphire substrate by epitaxial growth; and a diamond layer formed on the buffer layer by epitaxial growth, the diamond layer being made of an n-type or p-type diamond single crystal having a plane orientation of (110), (111) or (311). In cases where the angle of the face orientation with respect to the perpendicular is not specifically specified, the permissible error for the individual or relative angles of the face orientation or crystal axis in the present invention is preferably ±8°, more preferably ±2°, and even more preferably ±1°. This point is common to all embodiments, examples, and models where the angle of the face orientation with respect to the perpendicular is not specifically specified. In all embodiments of the present invention, the buffer layer, which consists of a single crystal of the buffer metal, and the diamond layer, which consists of a single crystal of diamond, may each contain island-like single crystals with different plane orientations at an area ratio of 10% or less. This is because the device characteristics are not significantly affected even when single crystals with different plane orientations are included at an area ratio of 10% or less on the surface. If island-like regions with different plane orientations are formed in the buffer layer, then island-like regions with different plane orientations will also be formed in the diamond layer on those island-like regions. The area ratio of single crystals with different plane orientations is preferably 5% or less, and more preferably 1% or less.

[0008] According to this electronic device substrate, a buffer layer is formed by epitaxially growing a single crystal of the buffer metal on a sapphire substrate made of a sapphire single crystal, and a diamond layer is further formed by epitaxially growing an n-type or p-type diamond single crystal on the buffer layer. Therefore, by setting the plane orientations of the sapphire substrate and the buffer layer, diamond single crystal layers with a plane orientation of (110), (111), or (311) can be easily realized. Consequently, superior device characteristics can be obtained compared to conventional diamond single crystal layers with a plane orientation of (001). Ir is particularly preferred as the buffer metal, but other metals can also be used.

[0009] Furthermore, the reason why diamond single crystal layers with a (110), (111), or (311) plane orientation yield superior device properties compared to diamond single crystal layers with a (001) plane orientation is that the density of unbonded bonds on the diamond surface (number of bonds per unit area) is higher in the order of (110), (111), and (001) plane orientations, and therefore, diamond single crystal layers with a (110) or (111) plane orientation can have a higher concentration of hole carriers than diamond single crystal layers with a (001) plane orientation (Hisashi Sato, Makoto Kasu, Diamond and Related Materials 31 (2013) 47-49, see Figure 4 in this document).

[0010] [Aspect 2] In Aspect 2 of the present invention, the substrate for an electronic device, in Aspect 1, has a surface orientation of (0001) for the sapphire substrate, a surface orientation of (111) for the buffer layer, a surface orientation of (111) for the diamond layer, and an orientation relationship in which the crystal axis direction of the sapphire substrate <-1-120>, the crystal axis direction of the buffer layer <-1-12>, and the crystal axis direction of the diamond layer <-1-12> are parallel to each other. The permissible error of the angle of "parallel" as used herein is ±8°, more preferably ±2°, and even more preferably ±1°.

[0011] [Aspect 3] In Aspect 3 of the present invention, the substrate for an electronic device, in Aspect 1, has a surface orientation of (1-100) for the sapphire substrate, a surface orientation of (311) for the buffer layer, a surface orientation of (311) for the diamond layer, and an orientation relationship in which the crystal axis direction of the sapphire substrate <11-20>, the crystal axis direction of the buffer layer <-1-12>, and the crystal axis direction of the diamond layer <-1-12> form an angle of 45° with respect to each other.

[0012] [Aspect 4] In Aspect 4 of the present invention, the substrate for an electronic device, in Aspect 1, has a surface orientation of (1-100) for the sapphire substrate, a surface orientation of (111) for the buffer layer, a surface orientation of (111) for the diamond layer, and an orientation relationship in which the crystal axis direction of the sapphire substrate <11-20>, the crystal axis direction of the buffer layer <-1-12>, and the crystal axis direction of the diamond layer <-1-12> form an angle of 45 degrees.

[0013] [Aspect 5] In Aspect 5 of the present invention, the substrate for an electronic device, in Aspect 1, has a surface orientation of (11-20) for the sapphire substrate, a surface orientation of (111) for the buffer layer, a surface orientation of (111) for the diamond layer, and an orientation relationship in which the crystal axis direction of the sapphire substrate <1-100>, the crystal axis direction of the buffer layer <-1-12>, and the crystal axis direction of the diamond layer <-1-12> are parallel to each other.

[0014] According to the electronic device substrates of embodiments 2 to 5, a diamond single crystal layer with a surface orientation of (110), (111), or (311) can be easily realized by setting the respective surface orientations of the sapphire substrate and the buffer layer to satisfy the aforementioned orientation relationship.

[0015] [Aspect 6] As illustrated in Figure 24, the substrate for an electronic device according to aspect 6 of the present invention comprises a sapphire substrate made of a sapphire single crystal with a plane orientation (11-20) tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular to its surface; a buffer layer made of a sapphire single crystal of the buffer metal, epitaxially grown on the sapphire substrate, with a plane orientation (001) tilted by the predetermined angle with respect to the perpendicular to its surface; and a diamond layer made of an n-type or p-type sapphire single crystal, epitaxially grown on the buffer layer, with a plane orientation (001) tilted by the predetermined angle with respect to the perpendicular to its surface.

[0016] According to the substrate for electronic devices of embodiment 6, by using a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular to its surface, the buffer layer of the buffer metal can be formed more stably than when the surface orientation (11-20) is not tilted, at a lower temperature range than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, the heating device can be simple and small, and practicality can be improved. The predetermined angle may more preferably be 5.0° to 9.0°, 4.0° to 6.0°, and even more preferably 5.0° ± 0.5°.

[0017] [Aspect 7] As illustrated in Figure 26, the substrate for an electronic device according to aspect 7 of the present invention comprises a sapphire substrate made of a sapphire single crystal with a plane orientation (11-20) tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to its surface; a buffer layer made of a sapphire single crystal made of the buffer metal, epitaxially grown on the sapphire substrate, with a plane orientation (001) tilted by the predetermined angle with respect to the perpendicular to its surface; and a diamond layer made of an n-type or p-type sapphire single crystal, epitaxially grown on the buffer layer, with a plane orientation (001) tilted by the predetermined angle with respect to the perpendicular to its surface.

[0018] According to the electronic device substrate of Embodiment 7, by using a sapphire substrate made of a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to the surface, the buffer layer of the buffer metal can be formed more stably in a temperature range lower than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to high temperatures such as 850°C under ultra-high vacuum, and the heating device can be simple and small, thereby improving practicality.

[0019] [Aspect 8] In any of aspects 1 to 7, the resistivity of the buffer layer of the substrate for electronic devices according to aspect 8 of the present invention is 1.0 × 10⁻⁶. -6Ω·cm or greater and 1.0 × 10 -5 The resistivity is Ω·cm or less, and the resistivity of the diamond layer is 10Ω·cm or more and 1000Ω·cm or less.

[0020] According to the substrate for electronic devices in embodiment 8, it is possible to manufacture electronic devices that are easy to manufacture and have excellent device characteristics. The resistivity of the buffer layer is more preferably 2.0 × 10⁻⁶. -6 Ω·cm or larger and 8.0 × 10 -6 Ω·cm or less, more preferably 4.0 × 10 -6 Ω·cm or larger and 5.0 × 10 -6 It is less than or equal to Ω·cm. The resistivity of the diamond layer is more preferably 10 Ω·cm or more and 100 Ω·cm or less, and even more preferably 10 Ω·cm or more and 30 Ω·cm or less.

[0021] [Aspect 9] In any of aspects 1 to 8, the substrate for an electronic device according to aspect 9 of the present invention has the following characteristics: the thickness of the sapphire substrate is 100 μm or more and 800 μm or less; the thickness of the buffer layer is 0.1 μm or more and 5 μm or less; and the thickness of the diamond layer is 1 μm or more and 2000 μm or less.

[0022] According to the substrate for electronic devices in embodiment 9, it is possible to manufacture electronic devices that are easy to manufacture and have excellent device characteristics. The thickness of the sapphire substrate is more preferably 100 μm or more and 500 μm or less, and even more preferably 100 μm or more and 200 μm or less. The thickness of the buffer layer may more preferably be 0.1 μm or more and 1.5 μm or less, 0.5 μm or more and 1.3 μm or less, 0.1 μm or more and 1 μm or less, or 0.1 μm or more and 0.3 μm or less. The thickness of the diamond layer is more preferably 1 μm or more and 1000 μm or less, and even more preferably 1 μm or more and 100 μm or less.

[0023] In the electronic device substrates of embodiments 1 to 9, before forming the buffer layer, the sapphire substrate is preheated in air or an oxygen atmosphere at atmospheric pressure for at least 1 hour. ℃ The substrate may be heat-treated (annealed) in a temperature range of ±100°C. In this case, the buffer layer of the buffer metal will grow more orderly epitaxially on the sapphire substrate, further improving the quality of the substrate for electronic devices. The atmospheric pressure may be 1 atmosphere ± 0.2 atmospheres. The heat treatment time may be 1 to 5 hours.

[0024] [Aspect 10] The Schottky barrier diode according to aspect 10 of the present invention comprises an electronic device substrate as described in any one of aspects 1 to 9, a Schottky electrode that makes Schottky contact with a first region of the diamond layer, and an ohmic electrode that makes ohmic contact with a second region of the diamond layer. This Schottky barrier diode allows for high capacitance, fast operation speed, and excellent heat resistance, resulting in superior electrical characteristics.

[0025] [Aspect 11] A field-effect transistor according to aspect 11 of the present invention comprises an electronic device substrate as described in any one of aspects 1 to 9, a gate oxide film formed on a first region of the diamond layer, a source electrode formed on a second region of the diamond layer, a gate electrode formed on the gate oxide film, and a drain electrode formed on a third region of the diamond layer. This field-effect transistor allows for high capacitance, fast operating speed, and excellent heat resistance, resulting in superior electrical characteristics.

[0026] [Aspect 12] A bipolar transistor according to aspect 12 of the present invention comprises an electronic device substrate as described in any one of aspects 1 to 9, a gate oxide film formed on a first region of the diamond layer, an emitter electrode formed on a second region of the diamond layer, a gate electrode formed on the gate oxide film, and a collector electrode formed on a third region of the diamond layer. According to this bipolar transistor, electrical characteristics of large capacity, high operating speed, and excellent heat resistance can be obtained.

[0027] [Aspect 13] A method for manufacturing a substrate for an electronic device according to aspect 13 of the present invention comprises: a step of forming a buffer layer by epitaxially growing a single crystal of a buffer metal on a sapphire substrate made of sapphire single crystal, wherein the buffer metal is a metal selected from Ir, Au, Ni, and Al or an alloy composed of two or more of the foregoing metals; and a step of forming a diamond layer by epitaxially growing an n-type or p-type diamond single crystal having a plane orientation of (110), (111), or (311) on the buffer layer. According to this method for manufacturing a substrate for an electronic device, a buffer layer is formed by epitaxially growing the single crystal of the buffer metal on a sapphire substrate made of sapphire single crystal, and a diamond layer can be formed by epitaxially growing an n-type or p-type diamond single crystal on the buffer layer, so that a diamond single crystal layer having a plane orientation of (110), (111), or (311) can be easily realized.

[0028] In the method of aspect 13, a buffer layer made of the buffer metal having a (111) plane orientation may be formed by using a sapphire substrate made of sapphire single crystal having a (1-100) plane orientation, and performing film formation under the condition of Gr>Tg / 20-25, where Tg(°C) is the substrate temperature during deposition of the single crystal of the buffer metal, and Gr(nm / min) is the deposition rate of the single crystal of the buffer metal.

[0029] Further, in the method of aspect 13, a buffer layer made of the buffer metal having a (311) plane orientation may be formed by using a sapphire substrate made of sapphire single crystal having a (1-100) plane orientation, and performing film formation under the condition of Gr<Tg / 20-25, where Tg(°C) is the substrate temperature during deposition of the single crystal of the buffer metal, and Gr(nm / min) is the deposition rate of the single crystal of the buffer metal.

[0030] Further, in the method of aspect 13, a sapphire substrate formed of a sapphire single crystal having a plane orientation of (11-20) is used, and the substrate temperature Tg (°C) during deposition of the single crystal of the buffer metal and the deposition rate Gr (nm / min) of the single crystal of the buffer metal are set to satisfy the condition of Gr>Tg / 30-15 for film formation, whereby a buffer layer formed of the buffer metal having a (111) plane orientation may be formed.

[0031] [Aspect 14] A method for manufacturing a substrate for an electronic device according to aspect 14 of the present invention comprises the steps of: epitaxially growing, on a sapphire substrate formed of a sapphire single crystal having a plane orientation of (11-20), a single crystal of a buffer metal which is a metal selected from Ir, Au, Ni, and Al having a (001) plane orientation or an alloy composed of two or more of the above metals, thereby forming a buffer layer; and epitaxially growing, on the buffer layer, an n-type or p-type diamond single crystal having a (001) plane orientation, thereby forming a diamond layer, and in the step of forming the buffer layer, the pressure in a sputtering apparatus is set to 1×10 -4 Pa or more and 5×10 -4 Pa or less, the method is characterized in that, while heating the temperature of the sapphire substrate to 600°C or more and 750°C or less, argon is introduced as a sputtering gas, and the single crystal of the buffer metal having a (001) plane orientation is deposited on the sapphire substrate 2 by a sputtering method using a sputtering target of the buffer metal. According to this manufacturing method, since the buffer layer of the buffer metal can be formed in a temperature range of 600°C or more and 750°C or less, which is lower than that of conventional methods, there is no need to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, and the heating device can be simple and small-scale, thereby improving practicality.

[0032] In the method of aspect 14, the buffer layer may be formed under a condition where the substrate temperature Tg (°C) during deposition of the single crystal of the buffer metal and the deposition rate Gr (nm / min) of the single crystal of the buffer metal satisfy Gr<Tg / 30-15.

[0033] [Aspect 15] A method for manufacturing an electronic device substrate according to aspect 15 of the present invention, as illustrated in Figure 24, comprises the steps of forming a buffer layer by epitaxially growing a gradient single crystal of the buffer metal, whose surface orientation (001) is tilted by the predetermined angle with respect to the perpendicular to its surface, on a sapphire substrate made of a gradient sapphire single crystal, whose surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular to its surface; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type gradient diamond single crystal, whose surface orientation (001) is tilted by the predetermined angle with respect to the perpendicular to its surface, wherein in the step of forming the buffer layer, the pressure inside the sputtering apparatus is set to 1 × 10 -4 Pa or higher and 5 x 10 -4 The method is characterized by reducing the pressure to below Pa, heating the sapphire substrate to a temperature of 600°C or higher and 750°C or lower, introducing argon as the sputtering gas, and depositing the gradient single crystals on the sapphire substrate by sputtering using the buffer metal sputtering target.

[0034] According to the method for manufacturing an electronic device substrate according to Embodiment 15, by using a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular to its surface, the buffer layer of the buffer metal can be formed more stably than when the surface orientation (11-20) is not tilted, at a lower temperature range than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, the heating device can be simple and small, and practicality can be improved. The predetermined angle may more preferably be 5.0° to 9.0°, 4.0° to 6.0°, and even more preferably 5.0° ± 0.5°.

[0035] [Aspect 16] A method for manufacturing an electronic device substrate according to aspect 16 of the present invention, as illustrated in Figure 26, comprises the steps of forming a buffer layer by epitaxially growing a gradient single crystal of the buffer metal, whose surface orientation (001) is tilted by the predetermined angle with respect to the perpendicular to its surface, on a sapphire substrate made of a gradient sapphire single crystal, whose surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to its surface; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type gradient diamond single crystal, whose surface orientation (001) is tilted by the predetermined angle with respect to the perpendicular to its surface, wherein in the step of forming the buffer layer, the pressure inside the sputtering apparatus is set to 1 × 10⁻⁶ -4 Pa or higher and 5 x 10 -4 The method is characterized by reducing the pressure to below Pa, heating the sapphire substrate to a temperature of 600°C or higher and 750°C or lower, introducing argon as the sputtering gas, and depositing the gradient single crystals on the sapphire substrate by sputtering using the buffer metal sputtering target.

[0036] According to the method for manufacturing an electronic device substrate according to Embodiment 16, by using a sapphire substrate made of a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to the surface, the buffer layer of the buffer metal can be formed more stably in a temperature range lower than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, the heating device can be simpler and smaller, and practicality can be improved. The predetermined angle may more preferably be 4.0° to 11.0°, even more preferably 7.5° ± 0.5°, or 5.0° ± 0.5°.

[0037] [Aspect 17] In the method for manufacturing an electronic device substrate according to any one of aspects 13 to 16, the method may include a step of heat-treating the sapphire substrate in air or an oxygen atmosphere at atmospheric pressure for 1 hour or more at 1050°C ± 100°C before the step of forming the buffer layer. In this case, the buffer layer of the buffer metal is further epitaxially grown on the sapphire substrate in a more orderly manner, thereby achieving even higher quality for the substrate used in electronic devices. The aforementioned atmospheric pressure may be 1 atmosphere ± 0.2 atmospheres. The aforementioned heat treatment time may be 1 to 5 hours.

[0038] [Aspect 18] A method for manufacturing an electronic device substrate according to any one of aspects 1 to 9, a Schottky barrier diode according to aspect 10, a field-effect transistor according to aspect 11, a bipolar transistor according to aspect 12, or any one of aspects 13 to 16. The sapphire substrate is a tilted sapphire single crystal in which the plane orientation of the sapphire single crystal is tilted by an angle α with respect to the perpendicular to the surface of the sapphire substrate. The buffer layer is an inclined Ir single crystal in which the plane orientation of the buffer metal single crystal is inclined by an angle β with respect to the perpendicular to the surface of the buffer layer. The diamond layer consists of n-type or p-type inclined diamond single crystals in which the plane orientation of the diamond single crystal is inclined by an angle γ with respect to the perpendicular to the surface of the diamond layer. The relationship α > β and β < γ may also be satisfied. In this case, there is less disruption to epitaxial growth at the boundaries between each layer, which can lead to further improvements in the quality of substrates and devices for electronic devices. The angle difference between the tilt angles α and β and between the tilt angles β and γ is preferably 0.5 to 7°, and more preferably 1 to 4°. [Effects of the Invention]

[0039] According to the electronic device substrate of the present invention, a buffer layer is formed on a sapphire substrate made of a sapphire single crystal by epitaxial growth of a single crystal of the buffer metal, and a diamond layer is formed on the buffer layer by epitaxial growth of an n-type or p-type diamond single crystal. Therefore, by setting the plane orientation of the sapphire substrate and the buffer layer, a diamond single crystal layer with a plane orientation of (110), (111), or (311) that has excellent electrical properties can be easily realized.

[0040] Furthermore, according to the method for manufacturing an electronic device substrate according to aspect 13 of the present invention, a buffer layer can be formed by epitaxially growing a single crystal of the buffer metal on a sapphire substrate made of a sapphire single crystal, and a diamond layer can be formed by epitaxially growing an n-type or p-type diamond single crystal on the buffer layer, thereby easily realizing a diamond single crystal layer with a surface orientation of (110), (111), or (311).

[0041] Furthermore, according to the electronic device substrates according to aspects 6 and 7 of the present invention, and the manufacturing method for electronic device substrates according to aspects 14 to 16, the buffer layer of the buffer metal can be stably formed in a temperature range of 600°C or higher and 750°C or lower, which is lower than conventional methods, and the heating device can be simple and small, thereby improving practicality. [Brief explanation of the drawing]

[0042] [Figure 1] This is a cross-sectional view showing a substrate for an electronic device, which is one embodiment of the present invention. [Figure 2] A cross-sectional view showing a Schottky barrier diode, which is another embodiment of the present invention. [Figure 3] This is a cross-sectional view showing a field-effect transistor, which is another embodiment of the present invention. [Figure 4] This is a cross-sectional view showing a bipolar transistor, which is another embodiment of the present invention. [Figure 5]This graph shows the results of the diffracted X-ray intensity using the 2θ angle as a parameter in the 2θ / θ scan measurement by X-ray diffraction in Example 1 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 6] This graph shows the X-ray diffraction results of the buffer layer in Example 1. [Figure 7] This graph shows the X-ray diffraction results of the sapphire substrate from Example 1. [Figure 8] This is an explanatory diagram showing the state in Example 1 where the direction of the crystal axis of the sapphire substrate coincides with the direction of the crystal axis of the buffer layer made of Ir single crystal. [Figure 9] This graph shows the results of diffracted X-ray intensity with the 2θ angle as a parameter in 2θ / θ scan measurements by X-ray diffraction in Examples 2 and 3 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 10] This graph shows the X-ray diffraction results of the buffer layers in Examples 2 and 3. [Figure 11] This graph shows the X-ray diffraction results of the sapphire substrates in Examples 2 and 3. [Figure 12] This is an explanatory diagram showing a state in Embodiment 4 of the present invention in which the direction of the crystal axis of the sapphire substrate coincides with the direction of the crystal axis of the buffer layer made of Ir single crystal. [Figure 13] This graph shows the results of the diffracted X-ray intensity using the 2θ angle as a parameter in the 2θ / θ scan measurement by X-ray diffraction in Example 4, with the horizontal axis representing the measured value of 2θ. [Figure 14] This graph shows the X-ray diffraction results of the buffer layer in Example 4. [Figure 15] This graph shows the X-ray diffraction results of the sapphire substrate in Example 4. [Figure 16] This is an explanatory diagram showing the state in Example 4 where the direction of the crystal axis of the sapphire substrate coincides with the direction of the crystal axis of the buffer layer made of Ir single crystal. [Figure 17] This graph shows the results of the diffracted X-ray intensity using the 2θ angle as a parameter in the 2θ / θ scan measurement by X-ray diffraction in Example 5 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 18]This graph shows the X-ray diffraction results of the buffer layer in Example 5. [Figure 19] This graph shows the X-ray diffraction results of the sapphire substrate in Example 5. [Figure 20] This is an explanatory diagram showing the state in Example 5 where the direction of the crystal axis of the sapphire substrate coincides with the direction of the crystal axis of the buffer layer made of Ir single crystal. [Figure 21] This graph shows the conditions under which an Ir layer with a (311) plane orientation appeared on a sapphire substrate with a (1-100) plane orientation in Examples 2 and 3, indicated by △, and the conditions under which an Ir layer with a (111) plane orientation appeared, indicated by ×. [Figure 22] This graph shows the conditions under which an Ir layer with a (001) plane orientation appeared on a sapphire substrate with a (11-20) plane orientation in Examples 4 and 5, indicated by ○, and the conditions under which an Ir layer with a (111) plane orientation appeared, indicated by ×. [Figure 23] This is a lattice image of the interface where Ir(001) is deposited on a sapphire (11-20) surface substrate, observed from the side using a transmission electron microscope (TEM) at 10 millionx magnification. [Figure 24] This is a cross-sectional view showing an electronic device substrate having a layered structure of a tilted diamond single crystal / tilted Ir single crystal / tilted sapphire single crystal according to Embodiment 6 (Aspect 13) of the present invention, wherein the plane orientation (11-20) of the tilted sapphire single crystal is tilted 5° in the

[0001] direction with respect to the perpendicular to its surface. [Figure 25] This graph shows the measurement results of the diffracted X-ray intensity, with the 2θ angle as the parameter in the 2θ / θ scan measurement by X-ray diffraction in Example 6 (Aspect 13), and the horizontal axis represents the measured value of 2θ. [Figure 26] This is a cross-sectional view showing a substrate for an electronic device having a layered structure of a tilted diamond single crystal / tilted Ir single crystal / tilted sapphire single crystal according to Embodiment 7 (Aspect 14) of the present invention, wherein the plane orientation (11-20) of the tilted sapphire single crystal is tilted 5° in the

[0001] direction with respect to the perpendicular to its surface. [Figure 27] This graph shows the measurement results of the diffracted X-ray intensity, with the 2θ angle as the parameter in the 2θ / θ scan measurement by X-ray diffraction in Example 7 (Aspect 14), and the horizontal axis represents the measured value of 2θ. [Figure 28] This graph shows the relationship between the inclination angle of the sapphire substrate relative to the perpendicular to the surface orientation (11-20) and the Ir(002) / (111) X-ray diffraction intensity ratio in Example 5 (no inclination), Example 6 (Aspect 13), and Example 7 (Aspect 14). [Figure 29] This graph shows the relationship between the angle of inclination of the sapphire substrate relative to the perpendicular to the surface orientation (11-20) and the full width at half maximum (FWHM) of the X-ray diffraction (002) rocking curve of the Ir layer deposited thereon, in Example 5 (no inclination), Example 6 (Aspect 13), and Example 7 (Aspect 14). [Figure 30] This graph shows the results of the diffracted X-ray intensity using the 2θ angle as a parameter in the 2θ / θ scan measurement by X-ray diffraction in Example 11 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 31] This graph shows the measurement results obtained by X-ray diffraction ω-scanning the Ir buffer layer of Example 11. [Figure 32] This graph shows the measurement results obtained by X-ray diffraction Φ scan of the sapphire substrate of Example 11. [Figure 33] This graph shows the measurement results obtained by X-ray diffraction Φ scan of the Ir buffer layer in Example 11. [Figure 34] This is an explanatory diagram showing the state in Examples 11, 12, and 13 of the present invention where the direction of the crystal axis of the sapphire substrate coincides with the direction of the crystal axis of the buffer layer made of Ir single crystal. [Figure 35] This graph shows the results of 2θ / ω scan measurements by X-ray diffraction on a sapphire substrate (with a tilt angle of 7.5° in the tilt direction [1-100]) of Example 12, with the horizontal axis representing the measured value of 2θ. [Figure 36] This graph shows the measurement results of the X-ray diffraction ω scan of the Ir buffer layer when using the sapphire substrate of Example 12 (tilt angle to the tilt direction [1-100] is 7.5°). [Figure 37] This graph shows the measurement results of the X-ray diffraction Φ scan of the Ir buffer layer when using the sapphire substrate of Example 12 (tilt angle of 7.5° to the tilt direction [1-100]). The Φ angle is the same as in Figure 38. [Figure 38] This graph shows the measurement results of the X-ray diffraction Φ scan of the sapphire substrate of Example 12 (tilt angle of 7.5° in the tilt direction [1-100]). The Φ angle is the same as in Figure 37. [Figure 39] This graph shows the tilt angle of the sapphire substrate, measured by varying the Φ of the sapphire substrate and the Ir buffer layer by 15° increments using the sapphire substrate of Example 12 (tilt angle of 7.5° in the tilt direction [1-100]). [Figure 40] This graph shows the tilt angle of the Ir buffer layer, measured by varying the Φ of the sapphire substrate and the Ir buffer layer by 15° increments using the sapphire substrate of Example 12 (tilt angle of 7.5° in the tilt direction [1-100]). [Figure 41] This graph shows the results of the diffracted X-ray intensity measured by 2θ / ω scan using X-ray diffraction on a sapphire substrate (tilt angle of 5° in the tilt direction

[0001] ) of Example 13, with the 2θ angle as the parameter. The horizontal axis represents the measured value of 2θ. [Figure 42] This graph shows the measurement results obtained by X-ray diffraction ω-scanning the Ir buffer layer when using the sapphire substrate of Example 13 (tilt angle of 5° in the tilt direction

[0001] ). [Figure 43] This graph shows the measurement results of the X-ray diffraction ω scan of the sapphire substrate of Example 13 (tilt angle of 5° in the tilt direction

[0001] ). [Figure 44] This is a photograph of the surface side of a diamond field-effect transistor fabricated on a sapphire substrate / Ir buffer layer / diamond layer as described in Example 9 of the present invention. [Figure 45] This graph shows the results of diffracted X-ray intensity with the 2θ angle as a parameter, obtained by 2θ / θ scan measurement of the Au buffer layer on a sapphire substrate ((0001) plane orientation) according to Example 14 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 46]This graph shows the results of diffracted X-ray intensity with the 2θ angle as a parameter, obtained by 2θ / θ scan measurement of the Au buffer layer on a sapphire substrate ((1-100) plane orientation) according to Example 15 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 47] This graph shows the results of diffracted X-ray intensity with the 2θ angle as a parameter, obtained by 2θ / θ scan measurement of the Au buffer layer on a sapphire substrate ((11-20) plane orientation) according to Example 16 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 48] This graph shows the results of diffracted X-ray intensity with respect to the 2θ angle, measured by 2θ / θ scan of a Ni buffer layer on a sapphire substrate ((0001) orientation) according to Example 17 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 49] This graph shows the results of diffracted X-ray intensity with the 2θ angle as a parameter, obtained by 2θ / θ scan measurement of a Ni buffer layer on a sapphire substrate ((11-20) plane orientation) according to Example 18 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 50] This graph shows the results of diffracted X-ray intensity with the 2θ angle as a parameter, obtained by 2θ / θ scan measurement of the Al buffer layer on a sapphire substrate ((0001) orientation) in Example 19 of the present invention, with the horizontal axis representing the measured value of 2θ. [Figure 51] This graph shows the measurement results of the tilt angle β of the Ir buffer layer relative to the tilt angle α of the sapphire substrate in Example 20 of the present invention. [Figure 52] This graph shows the measurement results of the X-ray diffraction ω scan of the Ir buffer layer when using a sapphire substrate (with a tilt angle of 15° to the tilt direction [1-100]) according to Example 21 of the present invention. [Figure 53] This graph shows the tilt angle of the sapphire substrate, measured by varying the Φ of the sapphire substrate and the Ir buffer layer by 15° increments using the sapphire substrate of Example 21 (tilt angle of 15° in the tilt direction [1-100]). [Figure 54]This graph shows the tilt angle of the Ir buffer layer, measured by varying the Φ of the sapphire substrate and Ir buffer layer by 15° increments using the sapphire substrate of Example 21 (tilt angle of 15° in the tilt direction [1-100]). [Modes for carrying out the invention]

[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. [Substrates for electronic devices] Figure 1 shows an electronic device substrate 1 according to one embodiment of the present invention. This electronic device substrate 1 comprises a sapphire substrate 2 made of a sapphire single crystal, a buffer layer 4 made of a single crystal of a buffer metal which is a metal selected from Ir, Au, Ni, and Al or an alloy made of two or more of the above metals, formed on the sapphire substrate 2 by epitaxial growth, and a diamond layer 6 made of an n-type or p-type diamond single crystal with a face orientation of (110), (111), or (311), formed on the buffer layer 4 by epitaxial growth.

[0044] The sapphire single crystal, which is the material of the sapphire substrate 2, is a colorless, transparent crystalline body with a hexagonal crystal structure, created by artificially growing high-purity alumina (Al2O3) into a giant crystal, and possesses high insulating properties. The purity of the sapphire single crystal is preferably 6N mass% or higher, more preferably 7N mass% or higher. The sapphire substrate 2 may be a commercially available product, and its manufacturing method is not limited, but it can be manufactured by slicing a sapphire ingot grown by the CZ method, for example, or by growing it into a thin plate shape by the EFG method.

[0045] The buffer layer 4 is manufactured by epitaxially growing the buffer metal onto the surface of the sapphire substrate 2, and can be manufactured, for example, by the following method. First, the sapphire substrate 2 is set in a sputtering apparatus, and a pressure of 1 × 10⁻¹⁰ is applied. -4 ~5×10 -4The pressure is reduced to Pa, and the temperature of the sapphire substrate 2 is heated to 600-1050°C. For example, argon is introduced as the sputtering gas, and a sputtering target of the buffer metal with high purity is used. The vacuum pressure during argon introduction is set to 0.25-0.4 Pa, and a single crystal of the buffer metal, which is (110) or (111), is deposited on the sapphire substrate 2 by RF sputtering. This allows the buffer layer 4 to be formed. The most preferred of the buffer metals is Ir, but as shown in the examples described later, other metals can also be used in this invention.

[0046] The diamond layer 6 consists of n-type or p-type diamond single crystals with a crystal orientation of (110), (111), or (311). In the case of n-type diamond, one or more elements such as phosphorus (P), nitrogen (N), and arsenic (As) are added to the diamond single crystal in a quantity of 1 × 10⁻¹⁶. 18 ~5×10 19 cm -3 This can be achieved by doping with a certain concentration. In the case of p-type diamonds, one or more elements such as boron (B), aluminum (Al), and lithium (Li) are doped into the diamond single crystal in a 2 × 10⁻¹⁶ concentration. 18 ~1 × 10 20 cm -3 This can be achieved by doping with a certain concentration.

[0047] To form the diamond layer 6, the sapphire substrate 2 on which the buffer layer 4 is formed is set in, for example, a plasma CVD apparatus, and a pressure of 1 × 10⁻¹⁰ is applied. -5 ~5×10 -5 The temperature is reduced, and the substrate temperature is set to 650-900°C. A doped diamond single crystal with a crystal orientation of (110) or (311) is deposited on the buffer layer 4 to a thickness of 1-1000 μm by microwave plasma chemical vapor deposition (CVD) to form a diamond layer 6.

[0048] Furthermore, the buffer layer 4, which is made of a single crystal of the buffer metal, and the diamond layer 6, which is made of a single crystal of diamond, may each contain island-like regions of single crystals with different plane orientations at an area ratio of 10% or less. This is because the inclusion of single crystals with different plane orientations at an area ratio of 10% or less on the surface has little effect on the device characteristics. The area ratio of single crystals with different plane orientations is preferably 5% or less, and more preferably 1% or less. If regions with different plane orientations from other regions are formed in island-like regions in the buffer layer 4, regions with different plane orientations from other regions will also be formed in island-like regions in the diamond layer 6 on those island-like regions. The size of the island-like regions when viewed from above is not limited, but it is preferably about 1 μm or less in the major axis direction.

[0049] According to this electronic device substrate 1, a buffer layer 4 is formed by epitaxially growing a single crystal of the buffer metal on a sapphire substrate 2 made of a sapphire single crystal, and a diamond layer 6 is formed by epitaxially growing an n-type or p-type diamond single crystal on top of the buffer layer 4. Therefore, by setting the plane orientations of the sapphire substrate 2 and the buffer layer 4, a diamond single crystal layer 6 with a plane orientation of (110), (111), or (311) can be easily realized. Consequently, superior device characteristics can be obtained compared to a conventional diamond single crystal layer with a plane orientation of (001).

[0050] The sapphire substrate 2 and buffer layer 4 can have the following six possible surface orientations. The permissible angle for the "parallel" orientation is ±8°, more preferably ±2°, and even more preferably ±1°.

[0051] (1) The surface orientation of the sapphire substrate 2 is (0001), the surface orientation of the buffer layer 4 is (111), and the surface orientation of the diamond layer 6 is (111). In this case, it is necessary that the crystal axis direction of the sapphire substrate 2 <-1-120>, the crystal axis direction of the buffer layer 4 <-1-12>, and the crystal axis direction of the diamond layer 6 <-1-12> are parallel to each other.

[0052] (2) The surface orientation of the sapphire substrate 2 is (1-100), the surface orientation of the buffer layer 4 is (311), and the surface orientation of the diamond layer 6 is (311). In this case, it is necessary that the crystal axis direction of the sapphire substrate 2 <11-20>, the crystal axis direction of the buffer layer 4 <-1-12>, and the crystal axis direction of the diamond layer 6 <-1-12> form an orientation relationship of 45° with respect to each other.

[0053] (3) The sapphire substrate 2 has a surface orientation of (1-100), the buffer layer 4 has a surface orientation of (111), and the diamond layer 6 has a surface orientation of (111). In this case, it is necessary that the crystal axis direction of the sapphire substrate 2 <11-20>, the crystal axis direction of the buffer layer 4 <-1-12>, and the crystal axis direction of the diamond layer 6 <-1-12> have a relative orientation relationship where they form an angle of 45 degrees with each other.

[0054] (4) The sapphire substrate 2 has a surface orientation of (11-20), the buffer layer 4 has a surface orientation of (111), and the diamond layer 6 has a surface orientation of (111). In this case, it is necessary that the crystal axis direction of the sapphire substrate 2 <1-100>, the crystal axis direction of the buffer layer 4 <-1-12>, and the crystal axis direction of the diamond layer 6 <-1-12> are parallel to each other.

[0055] (5) The structure is as shown in Figure 24. The surface orientation (11-20) of the sapphire substrate 2 is tilted by a predetermined angle α in the range of 4° to 11° in the

[0001] direction with respect to the perpendicular O of the surface of the sapphire substrate 2. Similarly, the surface orientation (001) of the buffer layer 4 is tilted by a predetermined angle β in the <-110> direction with respect to the perpendicular O of the surface of the buffer layer 4. Similarly, the surface orientation (001) of the diamond layer 6 is tilted by a predetermined angle γ in the <-110> direction with respect to the perpendicular O of the surface of the diamond layer 6. The relationship α=β=γ holds, and the crystal axis direction of the sapphire substrate 2 <0001> The crystal axis direction of the buffer layer 4 and the crystal axis direction of the diamond layer 6 are parallel to each other. The predetermined angle α=β=γ may more preferably be 5.0° to 9.0°, 4.0° to 6.0°, and even more preferably 5.0° ± 0.5°.

[0056] Furthermore, the present invention can be realized not only when the predetermined angles α=β=γ are satisfied, but also when the relationship α>β and β<γ is satisfied. Figure 51 is a graph showing the relationship between the tilt angle α and the tilt angle β when an Ir buffer layer is epitaxially grown on a sapphire substrate with a tilt angle α in Example 20, which will be described later. From the graph, it can be seen that α > β is satisfied at all points. Thus, it was found that even when α > β, a high-quality Ir layer and a high-quality diamond layer can be obtained.

[0057] (6) The structure is as shown in Figure 26. The surface orientation (11-20) of the sapphire substrate 2 is tilted by a predetermined angle α in the range of 4° to 11° in the [-1100] direction with respect to the perpendicular O of the surface of the sapphire substrate 2, and similarly the surface orientation (001) of the buffer layer 4 is tilted with respect to the perpendicular O of the surface of the buffer layer 4. <110> It is tilted by a predetermined angle β in that direction. Similarly, the surface orientation (001) of the diamond layer 6 is relative to the perpendicular O of the surface of the diamond layer 6. <110> It is tilted by a predetermined angle γ in the direction. Furthermore, it has the relationship α=β=γ, and the crystal axis direction of the sapphire substrate 2 <-1100> and the crystal axis direction of the buffer layer 4 <110> And the crystal axis of diamond layer 6 <110> The two have an azimuth relationship in which they are parallel to each other. The predetermined angle α=β=γ may more preferably be 5.0° to 9.0°, 7.5° ± 0.5°, 4.0° to 6.0°, or 5.0° ± 0.5°. The present invention is also feasible when the relationship α > β and β < γ is satisfied.

[0058] As described above, by setting the respective surface orientations of the sapphire substrate 2 and the buffer layer 4, a diamond single crystal layer with a surface orientation of (110), (111), or (311) can be easily realized. Alternatively, a diamond single crystal layer with a surface orientation (001) tilted at a predetermined angle with respect to the perpendicular O can be easily realized.

[0059] In either of the above cases, the resistivity of the buffer layer 4 is not limited, but is preferably 0.010 Ω·cm or more and 0.040 Ω·cm or less. The resistivity of the diamond layer 6 is not limited, but is preferably 10 Ω·cm or more and 100 Ω·cm or less. This is to appropriately set the performance of the electronic device. The sapphire substrate 2 is a high insulator, and its resistivity is not limited, but is preferably 10 14 Ω·cm~10 16 It is approximately Ω·cm.

[0060] The resistivity of the buffer layer 4 is more preferably 0.015 Ω·cm or more and 0.030 Ω·cm or less, and even more preferably 0.020 Ω·cm or more and 0.025 Ω·cm or less. The resistivity of the diamond layer 6 is more preferably 10 Ω·cm or more and 50 Ω·cm or less, and even more preferably 10 Ω·cm or more and 30 Ω·cm or less.

[0061] The thickness of the sapphire substrate 2 is not limited, but is preferably 100 μm or more and 800 μm or less. The thickness of the buffer layer 4 is not limited, but is preferably 0.1 μm or more and 5 μm or less. The thickness of the diamond layer 6 is not limited, but is preferably 1 μm or more and 1000 μm or less. This is to appropriately set the performance of the electronic device.

[0062] The thickness of the sapphire substrate 2 is more preferably 100 μm or more and 500 μm or less, and even more preferably 100 μm or more and 200 μm or less. The thickness of the buffer layer 4 is more preferably 0.1 μm or more and 1 μm or less, and even more preferably 0.1 μm or more and 0.5 μm or less. The thickness of the diamond layer 6 is more preferably 1 μm or more and 1000 μm or less, and even more preferably 1 μm or more and 10 μm or less.

[0063] [Schottky barrier diode] Figure 2 is a cross-sectional view of a Schottky barrier diode 12 according to another embodiment of the present invention, which is characterized by having the aforementioned electronic device substrate 1, a Schottky electrode 8 that makes Schottky contact with a first region of the diamond layer 6, and an ohmic electrode 10 that makes ohmic contact with a second region of the diamond layer 6. With this Schottky barrier diode 12, it is possible to obtain electrical characteristics that are high capacitance, fast operating speed, and excellent heat resistance. In this embodiment, both the first and second regions are located in close proximity to each other on the surface of the diamond layer 6, and their planar shapes are appropriately set according to the usage conditions of the device.

[0064] The Schottky electrode 8 is formed by depositing, for example, Pt / Au, Au, Pt or the like on the diamond layer 6 by vapor deposition or sputtering. The thickness thereof is not limited, and may be, for example, 10 to 500 nm. More preferably, the thickness of the Schottky electrode 8 may be 10 to 200 nm or 10 to 50 nm. To form a Schottky contact, a potential barrier is required to be formed between the Schottky electrode 8 and the diamond layer 6. Assuming that the work function of the Schottky electrode 8 is qΦm and the work function of the semiconductor diamond layer 6 is qΦs, the condition for forming a Schottky contact is qΦs < qΦm. The work function is the difference between a vacuum level and a Fermi level.

[0065] The ohmic electrode 10 is formed by depositing, for example, Ti / Au / Al / Au, Ti / Au, Al / Au or the like sequentially from the lower layer on the diamond layer 6 by vapor deposition or sputtering. The thickness thereof is not limited, and may be, for example, 10 to 500 nm. More preferably, the thickness of the ohmic electrode 10 may be 10 to 400 nm or 10 to 300 nm. The necessary condition for forming the ohmic electrode 10 is that no potential barrier is formed between the ohmic electrode 10 and the diamond layer 6. Assuming that the work function of the ohmic electrode 10 is qΦm and the work function of the diamond layer 6 is qΦs, the condition for forming a Schottky contact is qΦs > qΦm.

[0066] [Field effect transistor] Figure 3 is a cross-sectional view showing a field effect transistor 22 as another embodiment of the present invention. The field effect transistor 22 comprises the aforementioned substrate 1 for an electronic device, a gate oxide film 14 formed on a first region of the diamond layer 6, a source electrode 16 formed on a second region of the diamond layer 6, a gate electrode 20 formed on the gate oxide film 14, and a drain electrode 18 formed on a third region of the diamond layer 6. According to the field effect transistor 22, electrical characteristics of large capacity, high operation speed and excellent heat resistance can be obtained.

[0067] The gate oxide film 14 is formed by depositing an insulator such as Al2O3, TiO, or HfO2 onto the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate oxide film 14 may be 10 to 40 nm or 100 to 500 nm.

[0068] The source electrode 16 is formed by depositing a metal such as Pt / Au, Au, or Pt onto the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the source electrode 16 may be 10 to 40 nm or 100 to 500 nm.

[0069] The drain electrode 18 is formed by depositing, for example, Pt / Au, Au, Pt, etc., onto the sapphire substrate 2 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the drain electrode 18 may be 10 to 500 nm or 10 to 400 nm.

[0070] The gate electrode 20 is formed by depositing, for example, Pt / Au, Au, or Pt onto the gate oxide film 14 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate electrode 20 may be 10 to 400 nm or 10 to 300 nm.

[0071] [Bipolar transistor] Figure 4 is a cross-sectional view showing a bipolar transistor as another embodiment of the present invention, the bipolar transistor 32 comprising the aforementioned electronic device substrate 1, a gate oxide film 24 formed on a first region of the diamond layer 6, an emitter electrode 26 formed on a second region of the diamond layer 6, a gate electrode 30 formed on the gate oxide film 24, and a collector electrode 28 formed on a third region of the diamond layer 6. With this bipolar transistor 32, it is possible to obtain electrical characteristics that are high capacitance, fast operating speed, and excellent heat resistance.

[0072] The gate oxide film 24 is formed by depositing an insulator such as Al2O3, TiO, or HfO2 on the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate oxide film 24 may be 10 to 40 nm or 100 to 400 nm. The gate oxide film 24 can be manufactured by, for example, the following method. First, in an atomic layer deposition (ALD) apparatus, an electronic device substrate 1 is placed in a vacuum layer, the substrate temperature is set to 350°C, trimethylaluminum (TMA) is used as the Al raw material and H2O is used as the O raw material, high-purity nitrogen gas (purity 6N) is flowed through both, and the mixture is bubbled in a cylinder, and TMA and H2O diluted with N2 gas are repeatedly and alternately supplied to the sample in the vacuum layer to deposit Al2O3.

[0073] The emitter electrode 26 is formed by depositing a metal such as Pt / Au, Au, or Pt onto the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the emitter electrode 26 may be 10 to 400 nm or 10 to 300 nm. The emitter electrode 26 can be manufactured, for example, by the following method: Set two tungsten (W) boards in a resistance heating vapor deposition apparatus, cut and place a 1 mm diameter Pt wire on the first W board, cut and place an Au wire on the second W board, and apply a pressure of 5 × 10 -4 The vacuum is drawn to Pa. Next, a DC current is passed through the first W board to heat it, and Pt is deposited onto the sample surface. Then, a DC current is passed through the second W board to heat it, and Au is deposited onto the sample surface.

[0074] The collector electrode 28 is formed by depositing, for example, Au, Pt / Au, or Pt onto the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the collector electrode 28 may be 10 to 50 nm or 10 to 400 nm.

[0075] The gate electrode 30 is formed by depositing, for example, Pt / Au, Au, or Pt onto the gate oxide film 24 by vapor deposition or sputtering, and its thickness is not limited but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate electrode 30 may be 10 to 400 nm or 10 to 300 nm. The gate electrode 30 can be manufactured, for example, by the following method: Set two tungsten (W) boards in a resistance heating vapor deposition apparatus, cut and place a 1 mm diameter Pt wire on the first W board, and cut and place an Au wire on the second W board. Pressure 5 × 10 -4 The vacuum is reduced to Pa, and first, a DC current is passed through the first W board to heat it, causing Pt to be deposited onto the sample surface. Then, a DC current is passed through the second W board to heat it, causing Au to be deposited onto the sample surface.

[0076] [Method for manufacturing an electronic device substrate equipped with a diamond single crystal layer with a crystal orientation (001)] The method of this embodiment is a method for manufacturing a substrate for an electronic device having a diamond single crystal layer with a (001) plane orientation. The method comprises the steps of forming a buffer layer 4 by epitaxially growing a single crystal of the buffer metal on a sapphire substrate 2 made of a sapphire single crystal, and forming a diamond layer 6 by epitaxially growing an n-type or p-type diamond single crystal with a (001) plane orientation on the buffer layer 4.

[0077] In the process of forming the buffer layer 4, the pressure inside the sputtering apparatus is set to 1 × 10 -4 Pa or more 5×10 -4 The pressure is reduced to below Pa, and the temperature of the sapphire substrate 2 is heated to 600°C to 750°C. Argon is introduced as the sputtering gas, and a single crystal of the buffer metal having a surface orientation (001) is deposited on the sapphire substrate 2 by sputtering using the buffer metal sputtering target. The thickness of each layer may be the same as in the embodiment described above. The pressure inside the sputtering apparatus during film formation is more preferably 4 × 10⁻¹⁰ -4 Pa or more 5×10 -4The temperature is less than or equal to Pa. The temperature of the sapphire substrate 2 during film formation is more preferably 700°C to 750°C.

[0078] According to this manufacturing method, unlike the method described in Non-Patent Document 1, the buffer layer of the buffer metal can be formed at a lower temperature range than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, and the heating equipment can be simple and small, thus improving practicality.

[0079] [Method for manufacturing an electronic device substrate having a diamond single crystal layer with an inclined surface orientation (001) 1] In this method for manufacturing an electronic device substrate, as shown in Figure 24, a sapphire substrate 2 made of a tilted sapphire single crystal is used, in which the surface orientation (11-20) is tilted by a predetermined angle α within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular O of its surface. Next, a buffer layer 4 is formed on the sapphire substrate 2 by epitaxially growing a single crystal of the buffer metal, in which the surface orientation (001) is tilted by the predetermined angle with respect to the perpendicular to its surface.

[0080] In the process of forming buffer layer 4, the pressure inside the sputtering apparatus is set to 1 × 10⁻⁶ -4 Pa or higher and 5 x 10 -4 The pressure is reduced to below Pa, and the temperature of the sapphire substrate 2 is heated to 600°C or higher and 750°C or lower. Argon is introduced as the sputtering gas, and a gradient single crystal of the buffer metal is deposited on the sapphire substrate 2 by sputtering using the buffer metal sputtering target to form a buffer layer 4.

[0081] Next, a diamond layer 6 is formed on the buffer layer 4 by epitaxially growing an n-type or p-type diamond single crystal, the n-type or p-type inclined diamond single crystal having a surface orientation (001) tilted by a predetermined angle γ with respect to the perpendicular to its surface. Other conditions not specifically mentioned may be the same as in the previous embodiment. According to this method, as shown in Figure 24, the relationship α=β=γ exists, and the crystal axis of the sapphire substrate 2 <0001> This allows for an orientation relationship in which the crystal axis direction of the buffer layer 4 and the crystal axis direction of the diamond layer 6 are parallel to each other. The present invention is also feasible when the relationship α > β and β < γ is satisfied.

[0082] According to this method for manufacturing an electronic device substrate, by using a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular to its surface, the buffer layer of the buffer metal can be formed more stably than when the surface orientation (11-20) is not tilted, at a lower temperature range than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to high temperatures such as 850°C under ultra-high vacuum, and the heating device can be simple and small, thereby improving practicality.

[0083] The reason is not clear, but the inventors speculate as follows: The buffer metal single crystal layer and the diamond single crystal layer are subjected to large strains from the underlying sapphire substrate 2 due to differences in lattice constants and thermal expansion coefficients. When the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction with respect to the perpendicular to its surface, the strain can be released in the tilted direction, i.e., the transverse direction, reducing the strain on the buffer metal single crystal and diamond single crystal during film formation, and allowing for more stable crystal growth even at low temperatures of 600°C to 750°C compared to when the surface orientation is not tilted. The predetermined angle is more preferably 4.0° to 6.0°, and even more preferably 5.0° ± 0.5°.

[0084] [Method for manufacturing an electronic device substrate having a diamond single crystal layer with an inclined surface orientation (001) 2] In this method for manufacturing an electronic device substrate, as shown in Figure 26, a sapphire substrate 2 made of a tilted sapphire single crystal is used, in which the surface orientation (11-20) is tilted by a predetermined angle α within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to its surface. Next, a buffer layer 4 is formed on the sapphire substrate 2 by epitaxially growing a single crystal of the buffer metal, thereby forming a buffer layer 4 consisting of a tilted single crystal of the buffer metal in which the surface orientation (001) is tilted by a predetermined angle β with respect to the perpendicular to its surface.

[0085] In the process of forming buffer layer 4, the pressure inside the sputtering apparatus is set to 1 × 10⁻⁶ -4 Pa or higher and 5 x 10 -4 The pressure is reduced to below Pa, and the temperature of the sapphire substrate 2 is heated to 600°C or higher and 750°C or lower. Argon is introduced as the sputtering gas, and a gradient single crystal of the buffer metal is deposited on the sapphire substrate 2 by sputtering using the buffer metal sputtering target to form a buffer layer 4.

[0086] Next, a diamond layer 6 is formed on the buffer layer 4 by epitaxially growing an n-type or p-type diamond single crystal, the n-type or p-type inclined diamond single crystal having a surface orientation (001) tilted by a predetermined angle γ with respect to the perpendicular to its surface. Other conditions not specifically mentioned may be the same as in the previous embodiment. According to this method, as shown in Figure 26, there is a relationship α=β=γ, and the crystal axis direction of the sapphire substrate 2 is <-1100> and the crystal axis direction of the buffer layer 4. <110> And the crystal axis of diamond layer 6 <110> An orientation relationship in which the two are parallel to each other can be realized. The present invention is also feasible when the relationship α > β and β < γ is satisfied.

[0087] According to this method for manufacturing an electronic device substrate, by using a sapphire substrate 2 made of a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to its surface, the buffer layer 4 of the buffer metal can be deposited more stably at a lower temperature range than conventional methods, between 600°C and 750°C. Therefore, it is not necessary to heat the substrate to high temperatures such as 850°C under ultra-high vacuum, and the heating device can be simpler and smaller, thus improving practicality.

[0088] Although the reason is not clear, the inventors speculate as follows, similar to the method described above. The buffer metal single crystal layer and the diamond single crystal layer are subjected to significant strain from the underlying sapphire substrate 2 due to differences in lattice constants and thermal expansion coefficients. When the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to its surface, the strain can be released in the tilted direction, i.e., the transverse direction. This reduces the strain experienced by the buffer metal single crystal and the diamond single crystal during film formation, and it is thought that crystal growth proceeds more stably even at low temperatures of 600°C to 750°C compared to when the surface orientation is not tilted. The predetermined angle is more preferably 4.0° to 6.0°, and even more preferably 5.0° ± 0.5°.

[0089] Although several examples of embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and other well-known configurations may be added, or configurations combining embodiments may be created. Furthermore, the substrate for electronic devices of the present invention can be used for electronic devices other than those exemplified, and can be used, for example, for the formation of integrated circuits. [Examples]

[0090] The present invention will be described in detail below with reference to examples and in comparison to the figures, but the present invention is not limited to these examples.

[0091] [Example 1] (corresponding to Embodiment 2 / sapphire substrate with surface orientation (0001) / Ir single crystal with surface orientation (111) / diamond single crystal with surface orientation (111)) A commercially available sapphire substrate 2 having a surface orientation (0001) was prepared. The dimensions of the sapphire substrate 2 were an outer diameter of 50.8 mm and a thickness of 430 μm. The purity of the sapphire substrate 2 was 6N, and its resistivity was 1 × 10⁻¹⁶. 16 It was Ω·cm.

[0092] The sapphire substrate 2 is placed in the sputtering machine (product name 4341, manufactured by ULVAC, Inc.) and pressure is applied at 5 × 10 -4The substrate temperature was reduced to Pa, and while heating the substrate to 450°C, argon was introduced as the sputtering gas. Using a high-purity Ir sputtering target and an applied power of 60W, an Ir single crystal with a (111) orientation was deposited on the sapphire substrate 2 by RF sputtering, forming a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystal was set to 6 nm / min.

[0093] The sapphire substrate 2 on which the buffer layer 4 is formed is placed in a plasma CVD apparatus (product name 5200, manufactured by Seki Technotron Co., Ltd.) and subjected to a pressure of 1.35 × 10⁻¹⁰ -6 Under reduced pressure to Pa, a 1 μm thick n-type diamond single crystal with a (111) orientation and 100 ppm phosphorus (P) doping was deposited on the buffer layer 4 by microwave plasma chemical vapor deposition (CVD) at a substrate temperature of 700°C, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω·cm.

[0094] A sample was cut from the electronic device substrate 1 obtained in this manner using an excimer laser, set in an X-ray diffractometer (product name SmartLab, manufactured by Rigaku Corporation), and a 2θ / θ scan measurement was performed by X-ray diffraction, yielding the results shown in Figure 5. From the graph in Figure 5, it was confirmed that an Ir single crystal with a (111) plane orientation was deposited as a buffer layer 4 on a sapphire single crystal with a (0001) plane orientation as the sapphire substrate 2. Sapphire (0001) was identified by the sapphire (0006) peak and the sapphire (0,0,0,12) peak. Ir (111) was identified by the Ir (222) peak. No island-like single crystals with different plane orientations were formed within the buffer layer 4.

[0095] Furthermore, the substrate 1 for electronic devices was subjected to Φ scan measurement by X-ray diffraction using the aforementioned X-ray diffractometer to investigate whether the thin film was oriented in the in-plane direction, and the results shown in Figures 6 and 7 were obtained. Comparing the graphs in Figures 6 and 7, the angle Φ of the Ir{002} plane orientation in Figure 6 and the sapphire{3-300} plane orientation in Figure 7 match, confirming that the sapphire[11-20] direction of the sapphire substrate 2 and the Ir[-1-12] direction of the buffer layer 4 are coincident. The sapphire[11-20] direction was confirmed by the sapphire(33-60) peak. The Ir[-1-12] direction was confirmed by the Ir(002) peak.

[0096] Figure 8 schematically illustrates the relationship between the crystal orientations described above. In Figure 8, the outer hexagons indicate the crystal orientation of the sapphire single crystal forming the sapphire substrate 2, and the inner triangles indicate the crystal orientation of the Ir single crystal forming the buffer layer 4. In this way, by constructing the sapphire substrate 2 with a sapphire single crystal having a (0001) plane orientation, it was possible to epitaxially grow the Ir single crystal of the buffer layer 4 to have a (111) plane orientation.

[0097] Furthermore, it was confirmed that a diamond single crystal layer 6 with a (111) plane orientation can be epitaxially grown on a buffer layer 4 consisting of Ir single crystals with a (111) plane orientation. No island-like single crystals with different plane orientations were formed within the diamond single crystal layer 6.

[0098] In Example 1, an n-type diamond single crystal was formed as the diamond layer 6, but it is also possible to create a p-type diamond single crystal by doping the diamond with boron (B) instead of phosphorus (P).

[0099] [Example 2] (corresponding to Embodiment 3 / sapphire substrate with surface orientation (1-100) / Ir single crystal with surface orientation (311) / diamond single crystal with surface orientation (311)) A commercially available sapphire substrate 2 with a surface orientation (1-100) was prepared. The dimensions of the sapphire substrate 2 were an outer diameter of 50.8 mm and a thickness of 430 μm. The purity of the sapphire substrate 2 was 6 N mass%, and the resistivity was 1 × 10⁻⁶.6 It was Ω·cm.

[0100] The sapphire substrate 2 is placed in the sputtering machine (product name 4341, manufactured by ULVAC, Inc.) and pressure is applied at 5 × 10 -4 The substrate temperature of the sapphire substrate 2 was reduced to Pa, and while heating the substrate temperature to 700°C, argon was introduced as the sputtering gas. Using a high-purity Ir sputtering target and an applied power of 60W, Ir single crystals with a (311) orientation were deposited on the sapphire substrate 2 by RF sputtering, forming a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystals was set to 6 nm / min. When the substrate temperature was heated to 700°C, Ir single crystals with a (311) orientation were predominantly formed, but Ir(111) single crystals were also observed scattered as small islands within the Ir(311) single crystals. The size of these island-like regions was less than 1 μm in the major axis direction when viewed in plan. The area ratio of these island-like regions was 1% of the total area of ​​the buffer layer 4.

[0101] The sapphire substrate 2 on which the buffer layer 4 is formed is placed in a plasma CVD apparatus (product name 5200, manufactured by Seki Technotron Co., Ltd.) and subjected to a pressure of 1.35 × 10⁻¹⁰ -6 Under reduced pressure to Pa, a 1.0 μm thick n-type diamond single crystal with a (311) plane and doped with 1000 ppm of phosphorus (P) was deposited on a buffer layer 4 by microwave plasma chemical vapor deposition (CVD) at a substrate temperature of 700°C, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω·cm. Within the diamond layer 6, n-type diamond single crystals with a (111) plane were scattered in island-like regions corresponding to island-like regions of Ir(111) single crystals. The size of these island-like regions was less than 1 μm in the major axis direction when viewed in plan, and the area ratio of the island-like regions was 1% of the total area of ​​the diamond layer 6. However, it was confirmed that there were no problems in terms of performance as a device substrate. This yielded the electronic device substrate 1 of Example 2.

[0102] [Example 3] (corresponding to Embodiment 4 / sapphire substrate with surface orientation (1-100) / Ir single crystal with surface orientation (111) / diamond single crystal with surface orientation (111)) Prepare the same sapphire substrate 2 as in Example 2, set the sapphire substrate 2 in the same sputtering apparatus as in Example 2, and apply a pressure of 5 × 10⁻¹⁰ -4 A buffer layer 4 with a thickness of 1.0 μm was formed on a sapphire substrate 2 by RF sputtering using a high-purity Ir sputtering target and an applied power of 60 W, while the substrate temperature was reduced to Pa and argon was introduced as the sputtering gas. An Ir single crystal with a (111) plane orientation was deposited on the sapphire substrate 2. The deposition rate Gr of the Ir single crystal was set to 6 nm / min. By depositing the Ir single crystal at a lower temperature than in Example 2, a buffer layer 4, which is an Ir single crystal with a (111) plane orientation, was formed.

[0103] Specifically, when the substrate temperature was heated to 450°C, Ir single crystals with a (111) orientation were predominantly formed, but Ir(311) single crystals were scattered as small islands within the Ir(111) single crystals. The size of these island-like regions was less than 1 μm in the major axis direction when viewed in plan. The area ratio of these island-like regions was 1% of the total area of ​​the buffer layer 4.

[0104] The phenomenon in which Ir(311) single crystals or Ir(111) are predominantly formed depending on the heating temperature of the sapphire substrate 2 will be explained with reference to Figure 21.

[0105] Figure 21 is a graph showing the conditions under which a buffer layer 4 was formed on a sapphire substrate 2 with a (1-100) plane orientation, where only the substrate temperature Tg (°C) and the deposition rate Gr (nm / min) of the Ir single crystal were varied, while other conditions were the same as in Examples 2 and 3. The conditions under which an Ir layer with a (311) plane orientation appeared are indicated by △, and the conditions under which an Ir layer with a (111) plane orientation appeared are indicated by ×.

[0106] As shown in Figure 21, it was found that a boundary line, indicated by a dotted line in the figure, exists between the condition △ under which the Ir layer with the (311) orientation appears and the condition × under which the Ir layer with the (111) orientation appears. This boundary line can be expressed by the following equation. Gr = Tg / 20 - 25 Therefore, it was found that an Ir layer with (111) plane orientation can be formed when film formation is performed under the condition of Gr>Tg / 20-25, and an Ir layer with (311) plane orientation can be formed when film formation is performed under the condition of Gr<Tg / 20-25. A preferable substrate temperature is approximately 700° C. or lower, since high-temperature heating in high vacuum imposes strict requirements on heating equipment. In addition, since the realistically preferable deposition rate Gr of Ir single crystal is 3 to 7 (nm / min), it was found that by selecting preferable conditions within a range satisfying these, an Ir layer with (111) plane orientation or an Ir layer with (311) plane orientation can be selectively and effectively formed.

[0107] Next, the sapphire substrate 2 on which the buffer layer 4 has been formed is set in a plasma CVD apparatus (trade name 5200 manufactured by Techno Tron Co., Ltd.), and the pressure is 1.35×10 -6 Pa, the pressure was reduced to Pa, and an n-type diamond single crystal with (111) plane orientation doped with 1000 ppm of phosphorus (P) was deposited to a thickness of 1.0 μm on the buffer layer 4 by microwave plasma chemical vapor deposition (CVD) at a substrate temperature of 700° C., thereby forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω·cm. Thus, the substrate 1 for an electronic device of Example 3 was obtained. In the diamond layer 6, n-type diamond single crystals with (311) plane orientation are scattered in an island shape corresponding to the island-shaped regions of Ir (311) single crystal, the size of the island-shaped regions is 1 μm or less in the major axis direction in a plan view, and the area ratio of the island-shaped regions was 1% of the total area of the diamond layer 6. However, it was confirmed that there was no problem in performance as a device substrate.

[0108] Samples were cut from the electronic device substrate 1 of Example 2 using an excimer laser, set in an X-ray diffractometer (SmartLab, manufactured by Rigaku Corporation), and 2θ / θ scan measurements were performed by X-ray diffraction, yielding the results shown in Figure 9. From the graph in Figure 9, it was confirmed that sapphire (1-100), Ir(311), and Ir(111) were deposited. The peak intensity ratio indicates that Ir(311) single crystals and Ir(111) single crystals are mixed in the plane at a ratio of approximately 10:1 (approximately 8%). Sapphire (1-100) was identified by the sapphire (3-300) peak. Ir(311) was identified by the Ir(311) peak, and Ir(111) was identified by the Ir(111) peak. In this case, most of the X-rays are diffracted by the buffer layer 4 on the surface, but some of the X-rays reach the underlying sapphire substrate 2, where they diffract again, pass through the buffer layer 4, and emerge on the surface side. Therefore, the diffraction of the underlying sapphire substrate 2 is also recorded.

[0109] X-ray diffraction Φ scan measurements were performed on the above structure, yielding the results shown in Figures 10 and 11. It was confirmed that the sapphire <11-20> direction and the Ir <-1-12> direction were shifted by 45 degrees. The sapphire <11-20> direction was identified by the sapphire (33-60) peak. The Ir <-1-12> direction was identified by the Ir (002) peak.

[0110] Figure 12 schematically shows the relationship of crystal orientations in Example 2. In Figure 12, the outer rectangle shows the crystal orientation of the sapphire single crystal forming the sapphire substrate 2, and the inner rectangle shows the crystal orientation of the Ir single crystal forming the buffer layer 4. In this way, by constructing the sapphire substrate 2 with a sapphire single crystal with a (11-20) plane orientation, it was possible to epitaxially grow the Ir single crystal of the buffer layer 4 so that it had a (311) or (111) plane orientation.

[0111] Furthermore, from Example 2, it was confirmed that a diamond single crystal with a (311) plane orientation can be epitaxially grown on a buffer layer 4 made of an Ir single crystal with a (311) plane orientation, and from Example 3, it was confirmed that a diamond single crystal with a (111) plane orientation can be epitaxially grown on a buffer layer 4 made of an Ir single crystal with a (111) plane orientation.

[0112] In Examples 2 and 3, n-type diamond single crystals were formed as the diamond layer 6. However, it is also possible to form p-type diamond single crystals by doping the diamond with boron (B) instead of phosphorus (P).

[0113] [Example 4] (corresponding to Embodiment 5 / sapphire substrate with surface orientation (11-20) / Ir single crystal with surface orientation (111) / diamond single crystal with surface orientation (111)) A commercially available sapphire substrate 2 with a surface orientation (11-20) was prepared. The dimensions of the sapphire substrate 2 were an outer diameter of 50.8 mm and a thickness of 430 μm. The purity of the sapphire substrate 2 was 6 N mass%, and the resistivity was 1 × 10⁻¹⁶. 14 It was Ω·cm.

[0114] The sapphire substrate 2 is placed in the sputtering machine (product name 4341, manufactured by ULVAC, Inc.) and pressure is applied at 5 × 10 -4 A buffer layer 4 with a thickness of 1.0 μm was formed on a sapphire substrate 2 by RF sputtering using a high-purity Ir sputtering target and an applied power of 60 W. This was done by reducing the pressure to Pa, introducing argon as the sputtering gas, and depositing Ir single crystals with a (111) plane orientation onto the sapphire substrate 2. The deposition rate Gr of the Ir single crystals was set to 6 nm / min. No island-like single crystals with different plane orientations were formed within the buffer layer 4.

[0115] The sapphire substrate 2 on which the buffer layer 4 is formed is placed in a plasma CVD apparatus (product name 5200, manufactured by Seki Technotron Co., Ltd.) and subjected to a pressure of 1.35 × 10⁻¹⁰ -6Under reduced pressure to Pa, a 1.0 μm thick n-type diamond single crystal with a (111) plane orientation and doped with 1000 ppm of phosphorus (P) was deposited on a buffer layer 4 by microwave plasma chemical vapor deposition (CVD) at a substrate temperature of 700°C, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω·cm. No island-like single crystals with different plane orientations were formed within the diamond single crystal layer 6. This yielded the electronic device substrate 1 of Example 4.

[0116] [Example 5] (corresponding to Embodiment 13 / sapphire substrate with surface orientation (11-20) / Ir single crystal with surface orientation (001) / method for manufacturing a diamond single crystal with surface orientation (001)) Prepare the same sapphire substrate 2 as in Example 4, set the sapphire substrate 2 in the same sputtering apparatus as in Example 4, and apply a pressure of 5 × 10 -4 The substrate temperature was reduced to Pa, and while heating the substrate to 700°C, argon was introduced as the sputtering gas. Using a high-purity Ir sputtering target and an applied power of 60W, an Ir single crystal with a plane orientation (001) was deposited on the sapphire substrate 2 by RF sputtering, forming a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystal was set to 6 nm / min.

[0117] In Example 4, a buffer layer 4, which is an Ir single crystal with a (111) orientation, was formed by depositing Ir single crystals at a lower temperature than in Example 5. This point will be explained with reference to Figure 22.

[0118] Figure 22 is a graph showing the conditions under which an Ir layer with a (111) plane orientation appeared (×) and the conditions under which an Ir layer with a (001) plane orientation appeared (○) when a buffer layer 4 was formed on a sapphire substrate 2 with a (11-20) plane orientation, by varying only the substrate temperature Tg (°C) and the deposition rate Gr (nm / min) of the Ir single crystal during deposition, while keeping all other conditions the same as in Examples 4 and 5.

[0119] As shown in Fig. 22, it was found that there is a boundary line indicated by the dotted line in the figure between the condition × where an Ir layer having (111) plane orientation appeared and the condition ○ where an Ir layer having (001) plane orientation appeared, and it was found that this boundary line can be represented by the following formula. Gr=Tg / 30-15 Therefore, it was found that an Ir layer having (111) plane orientation can be formed by performing film formation under the condition of Gr>Tg / 30-15, and an Ir layer having (001) plane orientation can be formed by performing film formation under the condition of Gr<Tg / 30-15. The preferable substrate temperature is about 700° C. or lower, since high-temperature heating under high vacuum imposes severe requirements on heating equipment. In addition, since the practically preferable deposition rate Gr of Ir single crystal is 3 to 7 (nm / min), it was found that by selecting preferable conditions within a range satisfying these, an Ir layer having (111) plane orientation or an Ir layer having (001) plane orientation can be selected and effectively formed.

[0120] The sapphire substrate 2 on which the buffer layer 4 had been formed was set in a plasma CVD apparatus (trade name 5200, manufactured by Techno Tron Co., Ltd., pressure 1.35 × 10 -6 Pa, and an n-type diamond single crystal having (001) plane orientation doped with 1000 ppm of phosphorus (P) was deposited to a thickness of 1.0 µm on the buffer layer 4 by a microwave plasma chemical vapor deposition (CVD) method at a substrate temperature of 700°C, thereby forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000Ω·cm. Thus, the electronic device substrate 1 of Example 5 was obtained.

[0121] A sample was cut from the electronic device substrate 1 of Example 5 using an excimer laser, set in an X-ray diffractometer (product name SmartLab, manufactured by Rigaku Corporation), and 2θ / θ scan measurements were performed by X-ray diffraction, yielding the results shown in Figure 17. From the graph in Figure 17, it was confirmed that sapphire (11-20), Ir(111), and Ir(001) were deposited. From the ratio of peak intensities, it was found that Ir(111) single crystals and Ir(001) single crystals were mixed in the plane in a ratio of 1:1755. Sapphire (11-20) was identified by the sapphire (11-20) peak. Ir(111) was identified by the Ir(111) peak. Ir(001) was identified by the Ir(002) peak and Ir(004) peak.

[0122] X-ray diffraction Φ scan measurements were performed on the sample from Example 5, yielding the results shown in Figures 18 and 19. It was confirmed that the sapphire <1-100> direction and the Ir <-1-12> direction coincided. The sapphire <-1-100> direction was identified by the sapphire (3-300) peak. The Ir <-1-12> direction was identified by the Ir (002) peak.

[0123] Figure 20 schematically shows the relationship between the crystal orientations in Examples 4 and 5. In Figure 20, the outer rectangles indicate the crystal orientation of the sapphire single crystal forming the sapphire substrate 2, and the inner triangles indicate the crystal orientation of the Ir single crystal forming the buffer layer 4. In this way, by constructing the sapphire substrate 2 with a sapphire single crystal having a (11-20) plane orientation, it was possible to epitaxially grow the Ir single crystal of the buffer layer 4 so that it had a (111) or (001) plane orientation.

[0124] Figure 23 shows a lattice image of the boundary cross-section between the sapphire substrate 2 and the buffer layer 4, which was cut from the electronic device substrate 1 of Example 5 using an excimer laser, and observed with a 10 millionx transmission electron microscope (TEM). As shown, there was almost no disorder in the crystal orientation at the boundary surface.

[0125] In Examples 4 and 5, n-type diamond single crystals were formed as the diamond layer 6, but it is also possible to form p-type diamond single crystals by doping the diamond with boron (B) instead of phosphorus (P).

[0126] [Example 6] (Corresponding to aspects 6 and 15. Method 1 for manufacturing a sapphire substrate with a plane orientation of (11-20), a sapphire single crystal with a plane orientation of (001), and a diamond single crystal with a plane orientation of (001)) A sapphire substrate 2 was prepared, consisting of a tilted sapphire single crystal with its surface orientation (11-20) tilted 5.0° in the

[0001] direction with respect to the perpendicular to its surface. The sapphire substrate 2 was set in the same sputtering apparatus as in Example 4, and a pressure of 5 × 10⁻¹⁰ was applied. -4 A buffer layer 4 with a thickness of 1.0 μm was formed on a sapphire substrate 2 by RF sputtering using a high-purity Ir sputtering target and an applied power of 60 W, while the substrate temperature was reduced to Pa and argon was introduced as the sputtering gas. The deposition rate Gr of the Ir single crystal was set to 6 nm / min. The resulting buffer layer 4 had a surface orientation (001) tilted at 5.0° in the [-110] direction with respect to the perpendicular to the surface.

[0127] The sapphire substrate 2 on which the buffer layer 4 is formed is placed in a plasma CVD apparatus (product name 5200, manufactured by Seki Technotron Co., Ltd.) and subjected to a pressure of 1.35 × 10⁻¹⁰ -6 Under reduced pressure to Pa, a single n-type diamond doped with 1000 ppm of phosphorus (P) was deposited to a thickness of 1.0 μm on the buffer layer 4 by microwave plasma chemical vapor deposition (CVD) at a substrate temperature of 700°C, forming a diamond layer 6. The resistivity of the obtained diamond layer 6 was 1000 Ω·cm. The surface orientation (001) of the diamond layer 6 was tilted 5.0° in the [-110] direction with respect to the perpendicular O of the surface. This yielded the electronic device substrate 1 of Example 6.

[0128] A sample was cut from the electronic device substrate 1 of Example 6 using an excimer laser and set in an X-ray diffractometer (product name SmartLab, manufactured by Rigaku Corporation). A 2θ / θ scan measurement was performed by X-ray diffraction, and the results shown in Figure 25 were obtained. From the graph in Figure 25, it was confirmed that Ir(111) and Ir(001) were deposited on the sapphire (11-20). From the ratio of peak intensities, it was found that the Ir(111) single crystals and Ir(001) single crystals were mixed in the plane in a ratio of 1:4109. Sapphire (11-20) was identified in the sapphire (11-20), (22-40), and (33-60) peaks. Ir(111) was identified in the Ir(111) peak. Ir(001) was identified in the Ir(002) and Ir(004) peaks. The crystal ratio of Ir(001) to Ir(111) corresponds to the ratio of the Ir(002) intensity to the Ir(111) intensity in the X-ray diffraction results.

[0129] [Example 7] (Corresponding to aspects 7 and 16. Method 2 for manufacturing a sapphire substrate with a plane orientation of (11-20), a sapphire single crystal with a plane orientation of (001), and a diamond single crystal with a plane orientation of (001)) A sapphire substrate 2 was prepared, consisting of a tilted sapphire single crystal with its surface orientation (11-20) tilted 5.0° in the [-1100] direction relative to the perpendicular to its surface. The sapphire substrate 2 was set in the same sputtering apparatus as in Example 4, and a pressure of 5 × 10⁻¹⁰ was applied. -4 A buffer layer 4 with a thickness of 1.0 μm was formed on a sapphire substrate 2 by RF sputtering using a high-purity Ir sputtering target and an applied power of 60 W, while the substrate temperature was reduced to Pa and argon was introduced as the sputtering gas. The deposition rate Gr of the Ir single crystal was set to 6 nm / min. The resulting buffer layer 4 had a surface orientation (001) tilted 5.0° in the

[0110] direction with respect to the perpendicular to the surface.

[0130] The sapphire substrate 2 on which the buffer layer 4 is formed is placed in a plasma CVD apparatus (product name 5200, manufactured by Seki Technotron Co., Ltd.) and subjected to a pressure of 1.35 × 10⁻¹⁰ -6Under reduced pressure to Pa, a single n-type diamond doped with 1000 ppm of phosphorus (P) was deposited to a thickness of 1.0 μm on the buffer layer 4 by microwave plasma chemical vapor deposition (CVD) at a substrate temperature of 700°C, forming a diamond layer 6. The resistivity of the obtained diamond layer 6 was 1000 Ω·cm. The surface orientation (001) of the diamond layer 6 was tilted 5.0° in the

[0110] direction with respect to the perpendicular O of the surface. This yielded the electronic device substrate 1 of Example 7.

[0131] A sample was cut from the electronic device substrate 1 of Example 7 using an excimer laser and set in an X-ray diffractometer (product name SmartLab, manufactured by Rigaku Corporation). A 2θ / θ scan measurement was performed by X-ray diffraction, and the results shown in Figure 27 were obtained. From the graph in Figure 27, it was confirmed that Ir(111) and Ir(001) were deposited on the sapphire (11-20). From the ratio of peak intensities, it was found that the Ir(111) single crystals and Ir(001) single crystals were mixed in the plane in a ratio of 1:10558. Sapphire (11-20) was identified in the sapphire (11-20), (22-40), and (33-60) peaks. Ir(111) was identified in the Ir(111) peak. Ir(001) was identified in the Ir(002) and Ir(004) peaks. The crystal ratio of Ir(001) to Ir(111) corresponds to the ratio of the Ir(002) intensity to the Ir(111) intensity in the X-ray diffraction results.

[0132] From the results in Figures 17, 25, and 27, the tilt angle of the surface orientation of the sapphire substrate 2 is 5 oIt was found that as the angle increases, the Ir(002) intensity becomes very strong. Therefore, Figure 28 shows a graph plotting the dependence of the Ir(002) / Ir(111) X-ray diffraction intensity ratio on the tilt angle. Figure 28 is a graph showing the relationship between the tilt angle with respect to the perpendicular of the (11-20) plane orientation of the sapphire substrate and the Ir(002) / (111) X-ray diffraction intensity ratio in Example 5 (no tilt), Example 6 (Aspect 13), and Example 7 (Aspect 14) of the present invention. The Ir(002) / (111) X-ray diffraction intensity ratio corresponds to the ratio of the area occupied by crystals with the (001) plane orientation to the area occupied by crystals with the (111) plane orientation on the surface of the Ir layer. The direction of the tilt is the [1-100] direction in Example 6 (Aspect 13) and the

[0001] direction in Example 7 (Aspect 14), both tilted at 5.0°. It was found that the Ir(002) / (111) intensity ratio increased as the inclination angle increased in both the [1-100] direction and the

[0001] direction. When comparing the two inclination directions, it was found that inclining in the [1-100] direction was more effective than inclining in the

[0001] direction.

[0133] In Examples 4 to 7, n-type diamond single crystals were formed as diamond layer 6, but it is also possible to form p-type diamond single crystals by doping diamond with boron (B) instead of phosphorus (P).

[0134] Figure 29 is a graph showing the relationship between the tilt angle of the sapphire substrate's plane orientation (11-20) relative to the perpendicular and the full width at half maximum (FWHM) of the X-ray diffraction (002) rocking curve of the Ir layer deposited thereon, in Example 5 (no tilt), Example 6 (Aspect 13), and Example 7 (Aspect 14) of the present invention. A small FWHM of the X-ray diffraction (002) rocking curve of the Ir layer indicates that the crystals of the Ir layer are aligned to the (001) plane orientation, indicating good crystal quality. A large FWHM of the X-ray diffraction (002) rocking curve of the Ir layer indicates that the crystals of the Ir layer are not aligned to the (001) plane orientation, indicating large variation and thus poor crystal quality. Since the quality of the diamond crystal deposited on the Ir layer follows the crystal quality of this Ir film, the crystal quality of the diamond film also showed the same trend as this graph.

[0135] [Example 8] (corresponding to Embodiment 10 / Schottky barrier diode) Using an electronic device substrate (sapphire substrate with a (1-100) plane orientation / Ir single crystal with a (311) plane orientation / diamond single crystal with a (311) plane orientation) prepared by the method of Example 2, a Ti / Au electrode layer was deposited on the surface of the first region of the diamond layer 6 in a circular shape with a diameter of 400 μm and a thickness of 50 nm, forming a Schottky electrode 8 that makes Schottky contact with the diamond layer 6. On the other hand, an Al electrode layer was deposited on the surface of the second region of the diamond layer 6 in a circular shape with a diameter of 400 μm and a thickness of 50 nm as an ohmic electrode 10 that makes ohmic contact. As a result, a Schottky barrier diode 12 having the structure shown in Figure 2 was fabricated. The second region was formed with a 200 μm gap on both sides of the first region.

[0136] The Ti / Au electrode layer was deposited as follows: Two tungsten (W) boards were set in a resistance heating deposition apparatus. A 1 mm diameter Ti wire was cut and placed on the first W board, and an Au wire was cut and placed on the second W board. Next, a pressure of 5 × 10⁻¹⁰ was applied. -4The vacuum was reduced to Pa, and first, a DC current was passed through the first W board to heat it, causing Ti to be deposited onto the sample surface. Next, a DC current was passed through the second W board to heat it, causing Au to be deposited onto the sample surface. Furthermore, the Al / Au electrode layer was deposited as follows: Two tungsten (W) boards were set in a resistance heating deposition apparatus. A 1 mm diameter Al wire was cut and placed on the first W board, and an Au wire was cut and placed on the second W board. Next, a pressure of 5 × 10⁻¹⁰ was applied. -4 The vacuum was reduced to Pa, and first, a DC current was passed through the first W board to heat it, causing Pt to be deposited onto the sample surface. Next, a DC current was passed through the second W board to heat it, causing Au to be deposited onto the sample surface.

[0137] The characteristics of the obtained Schottky barrier diode 12 were examined, and it was found that it possessed the required rectifying effect and thus had the performance of a Schottky barrier diode.

[0138] [Example 9] (corresponding to aspect 11 / field-effect transistor) Using the electronic device substrate 1 (sapphire substrate with (1-100) plane orientation / Ir single crystal with (311) plane orientation / diamond single crystal with (311) plane orientation) prepared by the method of Example 2, a 10 nm thick Al2O3 oxide film was deposited over the entire surface of the diamond layer 6. The Al2O3 oxide film was deposited as follows: In an atomic layer deposition (ALD) apparatus, the sample was placed in a vacuum layer and the substrate temperature was 350°C. ℃ The setup was as follows: Trimethylaluminum (TMA) was used as the Al raw material and H2O as the O raw material. High-purity nitrogen gas (purity 6N) was flowed through both, causing them to bubble in a cylinder, and the TMA and H2O diluted with N2 gas were repeatedly and alternately supplied to the sample in the vacuum chamber.

[0139] The outer periphery of the Al2O3 oxide film was etched and removed with developer CD26, and the remaining Al2O3 oxide film in the second region was used as the gate oxide film 14. A tungsten (W) board was set in a resistance heating deposition apparatus, and a tungsten (W) board was cut and placed on the W board. The Au wire was then placed on the W board and deposited under a pressure of 5 × 10⁻¹⁰⁻¹ -4 The vacuum was reduced to Pa, and first, a DC current was passed through the W board to heat it, causing the Au to be deposited onto the sample surface. Furthermore, a gate electrode 20 was formed by depositing Au to a thickness of 50 μm on the gate oxide film 14 using the (resistance heating) method. The deposition of the Au electrode layer was carried out under the same conditions as described above.

[0140] The characteristics of the obtained field-effect transistor 22 were investigated, and it was found that it possessed the predetermined field-effect action and thus had the performance required of a field-effect transistor.

[0141] Figure 44 is a plan view of the diamond field-effect transistor fabricated according to Example 9, with an actual size of 6 mm x 8 mm. The glossy areas in the photograph (actually gold-colored) are the Au electrode layers of the diamond field-effect transistor.

[0142] [Example 10] (corresponding to Embodiment 12 / bipolar transistor) Using the electronic device substrate 1 (sapphire substrate with (1-100) plane orientation / Ir single crystal with (311) plane orientation / diamond single crystal with (311) plane orientation) prepared by the method of Example 2, a 10 nm thick Al2O3 oxide film was deposited over the entire surface of the diamond layer 6. The Al2O3 oxide film was deposited as follows: In an atomic layer deposition (ALD) apparatus, the sample was placed in a vacuum layer and the substrate temperature was 350°C. ℃ The setup involved using trimethylaluminum (TMA) as the Al raw material and H2O as the O raw material. High-purity nitrogen gas (purity 6N) was flowed through both, causing them to bubble in the cylinder, and the TMA and H2O diluted with N2 gas were repeatedly and alternately supplied to the sample in the vacuum chamber.

[0143] The outer periphery of the Al2O3 oxide film was etched and removed with developer CD26, and the remaining Al2O3 oxide film (a circular shape with a diameter of 450 μm) was used as the gate oxide film 24. In the first and third regions of the etched and exposed areas, Au electrode layers were deposited to a thickness of 50 μm in a circular shape with a diameter of 450 μm, respectively, to form the emitter electrode 26 and collector electrode 28. The Au electrode layers were deposited as follows: Two tungsten (W) boards were set in a resistance heating deposition apparatus. A 1 mm diameter Ti wire was cut and placed on the first W board, and an Au wire was cut and placed on the second W board. Next, a pressure of 5 × 10⁻¹⁰ was applied. -4 The vacuum was reduced to Pa, and first, a DC current was passed through the first W board to heat it, causing Ti to be deposited onto the sample surface. Next, a DC current was passed through the second W board to heat it, causing Au to be deposited onto the sample surface. Furthermore, a gate electrode 30 was formed by depositing Au to a thickness of 50 μm onto the gate oxide film 24 using resistance heating. The deposition of the Au electrode layer was carried out under the same conditions as described above.

[0144] The characteristics of the obtained bipolar transistor 32 were examined, and it was found that it possessed the predetermined field effect and exhibited the performance of a bipolar transistor 32.

[0145] [Example 11] (Effect of annealing on a sapphire substrate) As the sapphire substrate, a (11-20) plane orientation just substrate (a substrate without tilt relative to the crystal orientation plane (0° substrate)) was prepared. Other parameters of the sapphire substrate were the same as in Example 4. The sapphire substrate was annealed at 1050°C in air at atmospheric pressure for 1 hour. After annealing, an Ir single crystal was deposited on the sapphire substrate under the same conditions as in Example 4.

[0146] Figure 30 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 11. It was found that the (001) plane orientation of the Ir buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire substrate. Figure 31 is a graph showing the results of the X-ray diffraction ω scan of the Ir buffer layer for Example 11. The full width at half maximum (FWHM) of the graph was 538.8 seconds, which is narrower than in the case without annealing, indicating that the crystal quality of the Ir buffer layer is of higher quality.

[0147] Figures 32 and 33 are graphs showing the results of X-ray diffraction Φ scans of the sapphire substrate and Ir buffer layer of Example 11. The Φ angles of both were the same. That is, sapphire(11-20) / / Ir(001) and sapphire

[0001] / / Ir

[0001] . Figure 34 is an explanatory diagram showing the state in which the crystal axis direction of the sapphire substrate and the crystal axis direction of the buffer layer made of Ir single crystal coincide within the plane of the sample of Example 11.

[0148] [Example 12] (Effect of annealing on a sapphire substrate with a 7.5° tilt) A sapphire substrate was prepared with a (11-20) plane orientation and an inclination angle α = 7.5° to the inclination direction [1-100]. Other parameters of the sapphire substrate were the same as in Example 4. The sapphire substrate was annealed at 1050°C in air at atmospheric pressure for 1 hour. After annealing, an Ir single crystal was deposited on the sapphire substrate under the same conditions as in Example 4.

[0149] Figure 35 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 12. It was found that the (001) plane orientation of the Ir buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire substrate. Figure 36 is a graph showing the results of the X-ray diffraction ω scan of the Ir buffer layer for Example 12. The full width at half maximum in the X-ray diffraction ω scan of the Ir buffer layer was 402.9 arcsec, which is even narrower than that of Example 11, which used a just substrate. Therefore, it was found that the quality of the Ir buffer layer can be further improved by combining annealing at 1050°C for 1 hour in air and atmospheric pressure with tilting the crystal orientation of the sapphire substrate by 7.5°.

[0150] Figures 37 and 38 show the results of X-ray diffraction measurements of the Ir buffer layer and sapphire substrate in Example 12. It was found that in Example 12, the structure is sapphire(11-20) / / Ir(001) and sapphire

[0001] / / Ir

[0110] .

[0151] Figures 39 and 40 are graphs comparing the tilt angles of the crystal orientations of the sapphire substrate and the Ir buffer layer in Example 12, where the ω scan of the sapphire substrate (tilt angle to the tilt direction [1-100] of 7.5°) and the Ir buffer layer was measured while varying Φ by 15°. In principle, the value obtained by subtracting the angle of the lowest peak from the angle of the highest peak is twice the tilt angle. The tilt angle of the sapphire shown in Figure 39 was α = 7.550°, while the tilt angle of the Ir buffer layer shown in Figure 40 was β = 6.050°, indicating that the relationship α > β was observed.

[0152] [Example 13] (Effect of annealing on a sapphire substrate with a 5° tilt) A sapphire substrate was prepared with a (11-20) plane orientation and an inclination angle α = 5.0° to the inclination direction

[0001] . Other parameters of the sapphire substrate were the same as in Example 4. The sapphire substrate was annealed at 1050°C in air at atmospheric pressure for 1 hour. After annealing, an Ir single crystal was deposited on the sapphire substrate under the same conditions as in Example 4.

[0153] Figure 41 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 13. It was found that the Ir buffer layer (001) plane orientation was epitaxially grown along the sapphire (11-20) plane orientation. Figures 42 and 43 are graphs showing the X-ray diffraction Φ scan results for the Ir buffer layer and sapphire substrate of Example 13, respectively. Within the plane of the sample, the direction of the crystal axis of the sapphire substrate and the direction of the crystal axis of the buffer layer made of Ir single crystal coincided. That is, it was sapphire(11-20) / / Ir(001) and sapphire

[0001] / / Ir

[0001] .

[0154] [Example 14] (Combination of sapphire substrate (0001) and Au buffer layer) A sapphire substrate with the same (0001) plane orientation as in Example 1 was prepared, and the sapphire substrate was set in a sputtering apparatus (product name 4341, manufactured by ULVAC, Inc.) and subjected to a pressure of 5 × 10 -4 Under reduced pressure to Pa and while heating the substrate to 450°C, argon was introduced as the sputtering gas. Using a high-purity Au sputtering target and an applied power of 60W, an Au single crystal with a (111) orientation was deposited on a sapphire substrate by RF sputtering, forming an Au buffer layer with a thickness of 1.0 μm. The deposition rate Gr of the Au single crystal was set to 6 nm / min.

[0155] Figure 45 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 14. It was found that the (111) plane orientation of the Au buffer layer was epitaxially grown along the (0001) plane orientation of the sapphire substrate. This demonstrates that the Au buffer layer can be used in place of the Ir buffer layer in a sapphire substrate (0001).

[0156] [Example 15] (Combination of sapphire substrate (1-100) and Au buffer layer) A sapphire substrate with the same (1-100) plane orientation as in Example 2 was prepared, and Au was deposited under the same conditions as in Example 14. Figure 46 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 15. It was found that the (111) plane orientation of the Au buffer layer was epitaxially grown along the (1-100) plane orientation of the sapphire substrate. This demonstrates that the Au buffer layer can be used in place of the Ir buffer layer in a sapphire substrate (1-100).

[0157] [Example 16] (Combination of sapphire substrate (11-20) and Au buffer layer) A sapphire substrate with the same (11-20) plane orientation as in Example 4 was prepared, and Au was deposited under the same conditions as in Example 14. Figure 47 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 16. It was found that the (111) plane orientation of the Au buffer layer was epitaxially grown along the (11-20) plane orientation of the sapphire substrate. This demonstrates that the Au buffer layer can be used in place of the Ir buffer layer in a sapphire substrate (11-20).

[0158] [Example 17] (Combination of sapphire substrate (0001) and Ni buffer layer) A sapphire substrate with the same (0001) plane orientation as in Example 1 was prepared, and the sapphire substrate was set in a sputtering apparatus (product name 4341, manufactured by ULVAC, Inc.) and subjected to a pressure of 5 × 10 -4 By reducing the pressure to Pa, heating the substrate to 450°C, introducing argon as the sputtering gas, and using a high-purity Ni sputtering target, Ni single crystals with a (111) orientation were deposited on a sapphire substrate using RF sputtering with an applied power of 60 W, forming a 1.0 μm thick Ni buffer layer. The Ni single crystal deposition rate Gr was set to 6 nm / min.

[0159] Figure 48 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 17. It was found that the (111) plane orientation of the Ni buffer layer was epitaxially grown along the (0001) plane orientation of the sapphire substrate. This demonstrates that the Ni buffer layer can be used in place of the Ir buffer layer in a sapphire substrate (0001).

[0160] [Example 18] (Combination of sapphire substrate (11-20) and Ni buffer layer) A sapphire substrate with the same (11-20) plane orientation as in Example 4 was prepared, and Ni was deposited under the same conditions as in Example 17. Figure 49 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 18. It was found that the (111) plane orientation of the Ni buffer layer was epitaxially grown along the (11-20) plane orientation of the sapphire substrate. This demonstrates that the Ni buffer layer can be used in place of the Ir buffer layer on a sapphire substrate (11-20).

[0161] [Example 19] (Combination of sapphire substrate (0001) and Al buffer layer) A sapphire substrate with the same (0001) plane orientation as in Example 1 was prepared, and the sapphire substrate was set in a sputtering apparatus (product name 4341, manufactured by ULVAC, Inc.) and subjected to a pressure of 5 × 10 -4 By reducing the pressure to Pa, heating the substrate to 450°C, introducing argon as the sputtering gas, and using a high-purity Al sputtering target, an Al single crystal with a (111) orientation was deposited on a sapphire substrate using RF sputtering with an applied power of 60 W, forming an Al buffer layer with a thickness of 1.0 μm. The Al single crystal deposition rate Gr was set to 6 nm / min.

[0162] Figure 50 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 19. It was found that the (111) plane orientation of the Al buffer layer was epitaxially grown along the (0001) plane orientation of the sapphire substrate. This demonstrates that the Al buffer layer can be used in place of the Ir buffer layer in a sapphire substrate (0001).

[0163] [Example 20] Several sapphire substrates with the same (11-20) plane orientation as in Example 4 were prepared, each with a different tilt angle, and Ir was deposited on each sapphire substrate under the same conditions as in Example 4. Figure 51 is a graph showing the relationship between the tilt angle α of the sapphire substrate and the tilt angle β of the epitaxially grown Ir buffer layer on it in Example 20. From the graph in Figure 51, α > β was satisfied at all points, and the maximum difference between α and β was 1.82°. Thus, it was found that even when α > β, a high-quality Ir layer and a high-quality diamond layer can be obtained.

[0164] [Example 21] (Effect of annealing on a sapphire substrate with a 15° tilt) A sapphire substrate was prepared with a (11-20) plane orientation and an inclination angle α = 15° to the inclination direction [1-100]. Other parameters of the sapphire substrate were the same as in Example 4. The sapphire substrate was annealed at 1050°C in air at atmospheric pressure for 1 hour. After annealing, an Ir single crystal was deposited on the sapphire substrate under the same conditions as in Example 4.

[0165] Figure 52 is a graph showing the results of the X-ray diffraction ω scan of the Ir buffer layer in Example 21. The full width at half maximum in the X-ray diffraction ω scan of the Ir buffer layer was 364.5 arcsec, and 7.5 o The arcsec was even narrower than that of Example 12 (Figure 36) using a tilted substrate, which was 402.9 arcsec. Therefore, it was found that the Ir buffer layer could be further improved in quality by combining annealing at 1050°C for 1 hour in air and at atmospheric pressure with tilting the crystal orientation of the sapphire substrate by 15°.

[0166] Figures 53 and 54 are graphs comparing the tilt angles of the crystal orientations of the sapphire substrate and the Ir buffer layer in Example 21, where the ω scan of the sapphire substrate (tilt angle of 15° to the tilt direction [1-100]) and the Ir buffer layer was measured while varying Φ by 15°. In principle, the value obtained by subtracting the angle of the lowest peak from the angle of the highest peak is twice the tilt angle. The tilt angle of the sapphire shown in Figure 53 was α = 15.050°, while the tilt angle of the Ir buffer layer shown in Figure 54 was β = 13.235°, indicating that the relationship α > β was observed. [Industrial applicability]

[0167] According to the present invention, a buffer layer is formed on a sapphire substrate made of a sapphire single crystal by epitaxial growth of a buffer metal single crystal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy made of two or more of these metals. Furthermore, a diamond layer is formed on the buffer layer by epitaxial growth of an n-type or p-type diamond single crystal. Therefore, by setting the plane orientations of the sapphire substrate and the buffer layer, a diamond single crystal layer with a plane orientation of (110), (111), or (311) with excellent electrical properties can be easily realized. Thus, the present invention is industrially applicable. Furthermore, according to another aspect of the present invention, since the buffer layer of the buffer metal can be formed at a lower temperature range than conventional methods, between 600°C and 750°C, it is not necessary to heat the substrate to a high temperature such as 850°C under ultra-high vacuum. This allows for a simpler and smaller heating device, thereby improving practicality. [Explanation of Symbols]

[0168] 1. Substrate for electronic devices 2. Sapphire substrate 4 Buffer layer 6 Diamond layer 8 Schottky electrodes 10 Ohmic electrodes 12 Schottky barrier diode 14 Gate oxide film 16 Source electrode 18 Drain electrode 20 Grid gate 22 Field-effect transistor 24 Gate oxide film 26 Emitter electrode 28 Collector electrode 30 Trigger electrode 32 Bipolar transistor O Perpendicular α, β, γ Tilt angle

Claims

1. A sapphire substrate made of a sapphire single crystal, A buffer layer consisting of a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy of two or more of the aforementioned metals, formed on the sapphire substrate by epitaxial growth, A substrate for an electronic device comprising a buffer layer and a diamond layer made of an n-type or p-type diamond single crystal formed by epitaxial growth, The surface orientation of the sapphire substrate is (11-20), The surface orientation of the buffer layer is (111), The surface orientation of the diamond layer is (111), A substrate for an electronic device, characterized in that the crystal axis direction of the sapphire substrate <1-100>, the crystal axis direction of the buffer layer <-1-12>, and the crystal axis direction of the diamond layer <-1-12> are parallel to each other.

2. A sapphire substrate made of a sapphire single crystal, A buffer layer consisting of a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy of two or more of the aforementioned metals, formed on the sapphire substrate by epitaxial growth, A substrate for an electronic device comprising a buffer layer and a diamond layer made of an n-type or p-type diamond single crystal formed by epitaxial growth, The main surface orientation of the sapphire substrate is (11-20), and this surface orientation (11-20) is inclined at a predetermined angle within the range of 4° to 11° in the [0001] direction with respect to the perpendicular to the surface of the sapphire substrate. The surface orientation of the buffer layer is (001), The surface orientation of the diamond layer is (001), A substrate for an electronic device, characterized in that the crystal axis direction of the sapphire substrate <0001>, the crystal axis direction of the buffer layer <110>, and the crystal axis direction of the diamond layer <110> are parallel to each other.

3. A sapphire substrate made of a sapphire single crystal, A buffer layer consisting of a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy of two or more of the aforementioned metals, formed on the sapphire substrate by epitaxial growth, A substrate for an electronic device comprising a buffer layer and a diamond layer made of an n-type or p-type diamond single crystal formed by epitaxial growth, The main surface orientation of the sapphire substrate is (11-20), and this surface orientation (11-20) is inclined at a predetermined angle within the range of 4° to 15° in the [-1100] direction with respect to the perpendicular to the surface of the sapphire substrate. The main surface orientation of the buffer layer is (001), The main surface orientation of the diamond layer is (001), A substrate for an electronic device, characterized in that the crystal axis direction of the sapphire substrate <-1100>, the crystal axis direction of the buffer layer <-110>, and the crystal axis direction of the diamond layer <-110> are parallel to each other.

4. The resistivity of the buffer layer is 1.0 × 10⁻⁶. －６ Ω·cm or greater and 1.0 × 10⁻⁶ －５ The substrate for electronic devices according to any one of claims 1 to 3, characterized in that the resistivity is Ω·cm or less, and the resistivity of the diamond layer is 10 Ω·cm or more and 1000 Ω·cm or less.

5. The substrate for an electronic device according to any one of claims 1 to 3, characterized in that the thickness of the sapphire substrate is 100 μm or more and 800 μm or less, the thickness of the buffer layer is 0.1 μm or more and 5 μm or less, and the thickness of the diamond layer is 1 μm or more and 2000 μm or less.

6. A substrate for an electronic device according to any one of claims 1 to 3, A Schottky electrode that makes Schottky contact with the first region of the diamond layer, A Schottky barrier diode characterized by having an ohmic electrode that makes ohmic contact with a second region of the diamond layer.

7. A substrate for an electronic device according to any one of claims 1 to 3, A gate oxide film formed on the first region of the diamond layer, A source electrode formed on the second region of the diamond layer, A gate electrode formed on the gate oxide film, A field-effect transistor characterized by comprising a drain electrode formed on a third region of the diamond layer.

8. A substrate for an electronic device according to any one of claims 1 to 3, A gate oxide film formed on the first region of the diamond layer, An emitter electrode formed on the second region of the diamond layer, A gate electrode formed on the gate oxide film, A bipolar transistor characterized by comprising a collector electrode formed on a third region of the diamond layer.

9. A step of forming a buffer layer on a sapphire substrate made of a sapphire single crystal with a plane orientation of (11-20) by epitaxially growing a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy made of two or more of the said metals, with a plane orientation of (001); The method comprises the step of forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type diamond single crystal having a (001) surface orientation, In the process of forming the buffer layer, the pressure inside the sputtering apparatus is set to 4 × 10 －４ Pa or more 5×10 －４ A method for manufacturing a substrate for an electronic device, comprising reducing the pressure to below Pa, heating the sapphire substrate to a temperature of 600°C to 750°C, and depositing a single crystal of the buffer metal having a surface orientation (001) on the sapphire substrate by sputtering using a sputtering target for the buffer metal.

10. A step of forming a buffer layer on a sapphire substrate made of a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the [0001] direction with respect to the perpendicular to the surface, by epitaxially growing a tilted single crystal of a buffer metal which is a metal selected from Ir, Au, Ni, and Al or an alloy of two or more of the above metals, with the surface orientation (001) tilted by the predetermined angle with respect to the perpendicular to the surface; The method comprises the step of forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type inclined diamond single crystal, whose surface orientation (001) is inclined by a predetermined angle with respect to the perpendicular to its surface, In the process of forming the buffer layer, the pressure inside the sputtering apparatus is set to 1 × 10 －４ Pa or higher and 5 × 10 －４ A method for manufacturing a substrate for an electronic device, characterized by reducing the pressure to below Pa, heating the sapphire substrate to a temperature of 600°C or higher and 750°C or lower, introducing argon as a sputtering gas, and depositing the gradient single crystals of the buffer metal onto the sapphire substrate by sputtering using a sputtering target of the buffer metal.

11. A step of forming a buffer layer on a sapphire substrate made of a tilted sapphire single crystal in which the surface orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction with respect to the perpendicular to the surface, by epitaxially growing a tilted single crystal of a buffer metal which is a metal selected from Ir, Au, Ni, and Al or an alloy of two or more of the above metals, with the surface orientation (001) tilted by the predetermined angle with respect to the perpendicular to the surface; The method comprises the step of forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type inclined diamond single crystal, whose surface orientation (001) is inclined by a predetermined angle with respect to the perpendicular to its surface, In the process of forming the buffer layer, the pressure inside the sputtering apparatus is set to 1 × 10 －４ Pa or higher and 5 × 10 －４ A method for manufacturing a substrate for an electronic device, characterized by reducing the pressure to below Pa, heating the sapphire substrate to a temperature of 600°C or higher and 750°C or lower, introducing argon as a sputtering gas, and depositing the gradient single crystals of the buffer metal onto the sapphire substrate by sputtering using a sputtering target of the buffer metal.

12. A method for manufacturing a substrate for an electronic device according to any one of claims 9 to 11, characterized in that, prior to the step of forming the buffer layer, the sapphire substrate is heat-treated in air or an oxygen atmosphere at atmospheric pressure for one hour or more at 1050°C ± 100°C.

13. The sapphire substrate is a tilted sapphire single crystal in which the plane orientation of the sapphire single crystal is tilted by an angle α with respect to the perpendicular to the surface of the sapphire substrate. The buffer layer is a single crystal of the buffer metal in which the plane orientation of the single crystal of the buffer metal is tilted by an angle β with respect to the perpendicular to the surface of the buffer layer. The diamond layer consists of n-type or p-type gradient diamond single crystals in which the plane orientation of the diamond single crystal is tilted by an angle γ with respect to the perpendicular to the surface of the diamond layer. The relationship α > β and β < γ is satisfied, The substrate for an electronic device according to any one of claims 1 to 3, characterized in that the angle difference between the inclination angles α and β and the angle difference between the inclination angles β and γ are both 0.5 to 7°.

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