Packaging substrate and semiconductor package including the same

Abstract

To provide a packaging substrate that has excellent electrical reliability and suppresses misalignment of an electrically conductive layer pattern when forming a redistribution layer, a semiconductor package including the packaging substrate, and a method for manufacturing the packaging substrate.SOLUTION: In a packaging substrate 100 including a silica-based core, a silica-based core 10 includes a through-via portion penetrating in the thickness direction of the silica-based core. The through-via portion includes a via space, which is a space in which an electrode is disposed, and a via inner diameter surface surrounding the via space, and a through electrode 20 is disposed in the via space. The through electrode includes metal crystal particles having a preferred orientation in the thickness direction of the silica-based core. In this case, a packaging substrate having excellent electrical reliability and suppressing misalignment of an electrically conductive layer pattern when forming a rewiring layer can be provided.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] Embodiments relate to a packaging substrate and a semiconductor package including the same, etc. [Background Art]

[0002] In the manufacturing of electronic components, forming circuits on a semiconductor wafer is referred to as the front-end process (FE: Front-End), while assembling the wafer into a state usable for actual products is referred to as the back-end process (BE: Back-End), and the packaging process is included in this back-end process.

[0003] The four core technologies of the semiconductor industry that have enabled the rapid development of recent electronic products include semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology has developed into various forms such as nano-level line widths smaller than micrometers, more than 10 million cells, high-speed operation, and large heat dissipation, but technology for perfectly packaging semiconductors has not been correspondingly supported. Therefore, the electrical performance of a semiconductor may be determined by packaging technology and the resulting electrical connections, rather than by the performance of the semiconductor technology itself.

[0004] Recently, research applying ceramic materials to high-end packaging substrates has been progressing. By forming through holes in a substrate made of ceramic material and applying a conductive material into the through holes, the wiring length between the element and the motherboard can be shortened, thereby achieving excellent electrical characteristics. [Prior Art Documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Registered Patent No. 4803964 [Patent Document 2] Japanese Registered Patent No. 5258735 [Summary of the Invention] [Problem to be Solved by the Invention]

[0006] The objective of this embodiment is to provide a packaging substrate with excellent electrical reliability and in which misalignment of the electrical conduction layer pattern is suppressed when forming the redistribution layer. [Means for solving the problem]

[0007] A packaging substrate according to one embodiment of this specification includes a silica-based core.

[0008] The silica-based core includes through vias that penetrate in the thickness direction of the silica-based core.

[0009] The through-via portion includes a via space, which is the space in which electrodes are arranged, and the inner diameter surface of the via surrounding the via space.

[0010] The packaging substrate includes through electrodes placed in the via space.

[0011] The through electrode contains metal crystal particles having a preferred growth orientation in the thickness direction of the silica-based core.

[0012] The silica-based core may include a surface.

[0013] The contact angle of the surface of the silica core with respect to pure water may be 40° or less.

[0014] When observed in cross-section in the thickness direction of the packaging substrate, the cross-sectional area of ​​the through-electrode may be 95% or more of the cross-sectional area of ​​the via space.

[0015] The silica-based core may include an upper surface and a lower surface facing the upper surface.

[0016] The via space may include a first opening in contact with the upper surface of the silica core, a second opening in contact with the lower surface of the silica core, and a minimum inner diameter portion which is the part with the smallest inner diameter.

[0017] The minimum inner diameter portion may be disposed between the first opening and the second opening.

[0018] The thickness of the silica-based core may be 200 μm to 1,000 μm.

[0019] The diameter of the through electrode may be 40 μm to 200 μm.

[0020] The packaging substrate may include a first redistribution layer disposed on the silica-based core.

[0021] The first redistribution layer may include one electrically conductive layer and another electrically conductive layer disposed on said one electrically conductive layer.

[0022] The width of said another electrically conductive layer may be narrower than or equal to the width of said one electrically conductive layer.

[0023] A method for manufacturing a packaging substrate according to another embodiment of the present specification includes: a preparation step of preparing a silica-based core including a through via portion penetrating in the thickness direction; a through electrode forming step of forming a through electrode in the through via portion to provide a through electrode silica-based core; and a manufacturing step of manufacturing the packaging substrate from the through electrode silica-based core.

[0024] The through via portion includes a via space which is a space where an electrode is disposed, and a via inner diameter surface surrounding the via space.

[0025] In the through electrode forming step, the through electrode is formed by depositing metal ions in one thickness direction of the silica-based core within the via space.

[0026] The silica-based core may include one surface in the in-plane direction of the silica-based core.

[0027] The through-electrode formation step may include an electrode seed layer arrangement step of arranging the electrode seed layer alongside one plane of the silica-based core in the in-plane direction, and a plating step of depositing the metal ions from the electrode seed layer in one thickness direction of the silica-based core to form the through-electrode.

[0028] The silica-based core may include a surface.

[0029] The contact angle of the surface of the silica core with respect to pure water may be 40° or less.

[0030] The thickness of the silica-based core may be 200 μm to 1,000 μm.

[0031] The diameter of the through electrode may be 50 μm to 150 μm. [Effects of the Invention]

[0032] The packaging substrates in the concrete examples have excellent electrical reliability, and misalignment of the electrical conductive layer pattern can be suppressed when forming a redistribution layer on the packaging substrate. [Brief explanation of the drawing]

[0033] [Figure 1A] This is a cross-sectional view illustrating a packaging substrate according to one embodiment of the actual product. [Figure 1B] Figure 1A is a cross-sectional view illustrating the silica-based core. [Figure 2] This is a cross-sectional view illustrating a packaging substrate according to another embodiment of the concrete example. [Figure 3] This is a cross-sectional view illustrating a packaging substrate according to another embodiment of the concrete example. [Figure 4] This is a conceptual diagram illustrating the electrode seed layer arrangement process in a method for manufacturing a packaging substrate according to another embodiment of this specification. [Figure 5A] This is a side view of the packaging substrate of Comparative Example 1. [Figure 5B]This is a side view of the packaging substrate of Comparative Example 2. [Best Mode for Carrying Out the Invention]

[0034] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. However, the present invention can be realized in a variety of different forms and is not limited to the embodiments described herein. Similar parts are denoted by the same reference numerals throughout the specification.

[0035] Throughout this specification, the term “these combinations” as used in any expression in Markush form means one or more mixtures or combinations selected from the group of components described in the Markush form, and includes one or more of those components.

[0036] Throughout this specification, terms such as “First,” “Second,” or “A,” “B” are used to distinguish identical terms from one another. Furthermore, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0037] In this specification, the term "~" may mean that the compound contains a compound corresponding to "~" or a derivative of "~".

[0038] In this specification, the meaning of B being located on A means either B being in direct contact with A, or B being located on A with other layers located between them, and is not limited to B being in contact with the surface of A.

[0039] In this specification, the meaning of B being connected to A means either that A and B are directly connected, or that A and B are connected through other components between them, and is not limited to the direct connection of A and B unless otherwise specified.

[0040] In this specification, unless otherwise specified, singular expressions are interpreted to include singular or plural, as interpreted in the context.

[0041] In this specification, the form, relative size, angles, etc., of each component in the drawings are illustrative and may be exaggerated for illustrative purposes, and the rights shall not be construed as being limited to the drawings.

[0042] In this specification, "adjacent to A and B" means that A and B are located touching each other, or that A and B are not touching but are located close to each other. In this specification, the expression "adjacent to A and B" is not construed to mean that A and B are located touching each other unless otherwise specified.

[0043] In this specification, unless otherwise specified, a fine line means a line with a width of 5 μm or less, and more specifically, a line with a width of 1 to 4 μm or less.

[0044] To achieve high integration of packaging substrates and optimize signal transmission paths, through-holes can be formed within a silica-based core, and an electrically conductive layer can be formed within these through-holes. However, the smaller the inner diameter of the through-hole, the more difficult it becomes to form a stable and reliable electrically conductive layer within it.

[0045] When a simple via-filling process is performed to fill through-holes with metal, a problem can occur where the metal being filled blocks both openings of the through-hole before the process is complete, preventing further via-filling.

[0046] Another method involves forming a metal coating on the inner diameter surface of the through-hole and filling the inside of the through-hole with an insulating resin. However, when forming a redistribution layer on a silica-based core having such a structure, it may become difficult for the insulating resin to stably support the redistribution layer. This can lead to a dimple phenomenon where the redistribution layer formed on the through-hole is indented downwards, and an undulation phenomenon where the surface of the redistribution layer becomes wavy and wrinkled. Such phenomena can induce misalignment of the redistribution layer.

[0047] The inventors of the embodiment applied through electrodes containing metal crystal particles with adjusted preferred growth orientation to the through vias of the silica-based core. Through this, the inventors confirmed that they could provide a packaging substrate with excellent electrical reliability and the ability to suppress misalignment of the redistribution layer formed on the silica-based core, and thus completed the embodiment.

[0048] The following provides a detailed explanation of specific examples.

[0049] Figure 1A is a cross-sectional view illustrating a packaging substrate according to one embodiment of the actual example. Figure 1B is a cross-sectional view illustrating the silica-based core of Figure 1A. The actual example will be described with reference to Figures 1A and 1B.

[0050] The packaging substrate 100 in this example may include a silica-based core 10.

[0051] The silica-based core 10 may have the shape of a substrate. The silica-based core 10 is not limited to any substrate made of silica-based material that can be used as an electronic component.

[0052] The silica-based core 10 may also be a glass core. Examples of silica-based cores 10 include alkali borosilicate glass plates, alkali-free borosilicate glass plates, and alkali-free alkaline earth borosilicate glass plates. Electronic device glass substrates can be used for the silica-based core 10, and examples include those manufactured by Schott, AGC, Corning, etc., but are not limited to these.

[0053] The silica-based core 10 may, if necessary, be coated with a hydrophilic polymer whose surface energy is adjusted to a range predetermined in the embodiment, in order to control the surface energy. The silica-based core 10 may, if necessary, be laminated with a film whose surface energy is adjusted to a range predetermined in the embodiment, in order to control the surface energy.

[0054] The surface of the silica-based core 10 may include an upper surface (not shown) and side surfaces (not shown) connected to the upper surface and formed in the thickness direction of the silica-based core 10. The surface of the silica-based core 10 may also include a lower surface facing the upper surface.

[0055] The statement that the side surface is formed in the thickness direction of the silica-based core 10 is interpreted to mean not only that the side surface is perpendicular to the upper surface of the silica-based core 10, but also that at least a portion of the side surface forms an angle (inclination angle) other than 90° with the upper surface.

[0056] The aforementioned side surface may be flat or curved.

[0057] The silica-based core 10 may include a cavity (not shown), which is a space formed by a recess inside.

[0058] The cavity may be formed by a recess in a portion of the upper / lower surface of the silica-based core 10 in the thickness direction of the silica-based core 10, or it may penetrate through the silica-based core 10 in the thickness direction.

[0059] The element is mounted in the cavity, and the packaging substrate 100 and the element can be electrically connected. The element may be a semiconductor element such as a CPU, GPU, or memory chip, as well as a capacitor element, a transistor element, an impedance element, or other modules. In other words, any semiconductor element that can be mounted on a semiconductor device can be used as the element without limitation.

[0060] The silica-based core 10 may include through via portions 101 that penetrate in the thickness direction of the silica-based core 10.

[0061] The through via portion 101 includes a via space 102, which is the space where electrodes are arranged, and an inner via surface 103 that surrounds the via space 102.

[0062] The via space 102 may have an inner diameter that is substantially uniform in the thickness direction of the silica core 10. The via space 102 may have an inner diameter that changes in the thickness direction of the silica core 10.

[0063] The cross-section of the via space 102 may be rectangular. In addition to a rectangular shape, the cross-section of the via space 102 may also be hourglass-shaped, triangular, trapezoidal, or other shapes. The cross-section of the via space 102 refers to the cross-section in the thickness direction of the silica core 10.

[0064] The via inner diameter surface 103 refers to the surface of the silica-based core 10 formed inside the through via portion 101.

[0065] The packaging substrate 100 includes through electrodes 20 placed in via spaces 102. The through electrodes 20 may be columnar electrically conductive layers. The through electrodes 20 may have a diameter that varies in the thickness direction of the silica core 10. The through electrodes 20 may have a substantially uniform inner diameter in the thickness direction of the silica core 10.

[0066] The cross-section of the through electrode 20 may be rectangular. In addition to a rectangular shape, the cross-section of the through electrode 20 may also be hourglass-shaped, triangular, trapezoidal, or other shapes. The cross-section of the through electrode 20 refers to the cross-section in the thickness direction of the silica core 10.

[0067] The diameter and cross-section of the through electrode 20 may be substantially the same as the diameter and cross-section of the via space 102.

[0068] The through-electrode 20 is positioned in the via space 102 and can transmit electrical signals in the thickness direction of the silica core 10, enabling the element to be electrically connected to the main board, redistribution layer, etc.

[0069] Physical properties of silica-based cores and through electrodes The through electrode 20 may include metal crystal particles having a preferred growth orientation in the thickness direction of the silica-based core 10.

[0070] A metal crystal having a preferred growth orientation in the thickness direction of the silica-based core 10 means that the crystal size in the thickness direction of the silica-based core 10 is larger than the crystal size in the in-plane direction of the silica-based core 10. In other words, a metal crystal having a preferred growth orientation in the thickness direction of the silica-based core 10 means that the number of grain boundaries per unit length in the thickness direction of the silica-based core 10 is smaller than the number of grain boundaries per unit length in the in-plane direction of the silica-based core 10.

[0071] If the through electrode 20 has the characteristics described above, the through electrode 20 may be formed to occupy most of the via space 102. Through this, the occurrence of voids inside the through electrode 20 and cracks on the surface of the through electrode 20 can be effectively suppressed.

[0072] Furthermore, in this case, the number of grain boundaries of the metal crystal per unit length in the thickness direction of the silica core 10 can be adjusted to a certain level or less. Through this, the resistance characteristics of the through electrode 20 can be stably adjusted, which can contribute to reducing the heat generated by the packaging substrate 100 during the device driving process.

[0073] The via space 102 may include a first opening (not shown) in contact with the upper surface of the silica core 10, and a second opening (not shown) in contact with the lower surface of the silica core 10.

[0074] The through-electrode 20 may include one end positioned on the first opening side and the other end positioned on the second opening side. The metal crystal positioned on one end of the through-electrode 20 may have a preferred growth orientation that is in the thickness direction of the silica-based core 10. The metal crystal positioned on the other end of the through-electrode 20 may also have a preferred growth orientation that is in the thickness direction of the silica-based core 10. In such a case, the resistive characteristics of the through-electrode 20 can be reduced to adjust the heat generation characteristics of the packaging substrate, and the occurrence of defects such as voids during the formation of the through-electrode 20 can be stably suppressed.

[0075] The preferred growth orientation of the metal crystals contained in the through electrode 20 can be measured as follows: The silica core is cracked or the through electrode is detached from the silica core so that the surface of the through electrode is exposed. Then, the surface of the through electrode is photographed using a Scanning Electron Microscope (SEM) to capture images of the metal crystal grain boundaries contained in the through electrode and measure the preferred growth orientation.

[0076] Furthermore, the preferred growth orientation of the metal crystals contained in the through-electrode 20 can be measured by XRD (X-ray Diffraction).

[0077] The material of the through electrode 20 is not limited as long as it is conductive. The material of the through electrode 20 may be any one selected from the group consisting of copper, nickel, aluminum, gold, silver, and combinations thereof. The material of the through electrode 20 may be copper.

[0078] The silica-based core 10 may include a surface. The contact angle of the surface of the silica-based core 10 with respect to pure water may be 40° or less.

[0079] One concrete example is the ability to control the hydrophilicity of the silica-based core 10 surface by controlling the contact angle of the silica-based core 10 surface with respect to pure water. In this case, when forming the through-electrode 20 through wet electroplating or the like, the affinity between the electroplating solution containing metal ions and the inner diameter surface 103 of the via is improved, and the electroplating solution can be uniformly distributed throughout the via space 102. This can help to form a through-electrode 20 that has a more uniform density in the thickness direction of the silica-based core 10 and in which void formation is suppressed.

[0080] The contact angle of the silica core 10 surface with respect to pure water is measured using a surface analyzer via the goniometer method. Specifically, a droplet of 100 μL of pure water, which is the probe liquid, is placed on the surface of the silica core 10, the placed droplet is captured, and the contact angle is calculated from the captured image.

[0081] The contact angle of the surface of the silica core 10 with respect to pure water may be 40° or less. The contact angle may be 35° or less. The contact angle may be 30° or less. The contact angle may be 25° or less. The contact angle may be 20° or less. The contact angle may be 17° or less. The contact angle may be 1° or more. In such cases, defects can be suppressed, which may help in forming a through electrode 20 with excellent electrical properties.

[0082] When observed in cross-section in the thickness direction of the packaging substrate 100, the cross-sectional area of ​​the through-electrode 20 may be 95% or more of the cross-sectional area of ​​the via space 102. When observed in cross-section in the thickness direction of the packaging substrate 100, the cross-sectional area of ​​the through-electrode 20 may be 98% or more of the cross-sectional area of ​​the via space 102. When observed in cross-section in the thickness direction of the packaging substrate 100, the cross-sectional area of ​​the through-electrode 20 may be 99% or more of the cross-sectional area of ​​the via space 102. When observed in cross-section in the thickness direction of the packaging substrate 100, the cross-sectional area of ​​the through-electrode 20 may be 100% or less of the cross-sectional area of ​​the via space 102. In such cases, when a redistribution layer is formed on the upper or lower side of the packaging substrate 100, the through-electrode 20 can stably support the redistribution layer and suppress the occurrence of the dimple phenomenon. In addition, the through-electrode 20 can stably transmit electrical signals between the element and the redistribution layer, etc.

[0083] When observed in cross-section in the thickness direction of the packaging substrate 100, the area of ​​the cross-section of the through-electrode 20 relative to the area of ​​the cross-section of the via space 102 can be measured using a TEM (Transmission Electron Microscope).

[0084] Structure of silica core and through-electrode Figure 2 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the concrete example. The concrete example will be described below with reference to Figure 2.

[0085] The packaging substrate includes a silica-based core. The specific configuration of the packaging substrate is the same as that described in Figures 1A and 1B above. The differences will be explained below.

[0086] The silica-based core 10 may include an upper surface 104 and a lower surface 105 facing the upper surface 104. The via space 102 may include a first opening 106 in contact with the upper surface 104 of the silica-based core 10, a second opening 107 in contact with the lower surface 105 of the ceramic core, and a minimum inner diameter portion 108 which is the part with the smallest inner diameter. The minimum inner diameter portion 108 may be located between the first opening 106 and the second opening 107.

[0087] The via space 102 can have an inner diameter that varies in the thickness direction of the silica core 10. In one embodiment, by positioning the minimum inner diameter portion 108 between the first opening 106 and the second opening 107, the through electrode 20 that is filled and formed in the via space 102 can be prevented from falling out of the silica core 10.

[0088] The inner diameter of the first opening 106 may be 40 μm to 200 μm. The inner diameter may be 60 μm or more. The inner diameter may be 80 μm or more. The inner diameter may be 100 μm or more. The inner diameter may be 180 μm or less. The inner diameter may be 160 μm or less. The inner diameter may be 140 μm or less. The inner diameter may be 120 μm or less.

[0089] The diameter of the through electrode 20 at the first opening 106 may be 40 μm to 200 μm. The diameter may be 60 μm or more. The diameter may be 80 μm or more. The diameter may be 100 μm or more. The diameter may be 180 μm or less. The diameter may be 160 μm or less. The diameter may be 140 μm or less. The diameter may be 120 μm or less.

[0090] The inner diameter of the second opening 107 may be 40 μm to 200 μm. The inner diameter may be 60 μm or more. The inner diameter may be 80 μm or more. The inner diameter may be 100 μm or more. The inner diameter may be 180 μm or less. The inner diameter may be 160 μm or less. The inner diameter may be 140 μm or less. The inner diameter may be 120 μm or less.

[0091] The diameter of the through electrode 20 at the second opening 107 may be 40 μm to 200 μm. The diameter may be 60 μm or more. The diameter may be 80 μm or more. The diameter may be 100 μm or more. The diameter may be 180 μm or less. The diameter may be 160 μm or less. The diameter may be 140 μm or less. The diameter may be 120 μm or less.

[0092] In such cases, both the high integration density and electrical reliability of the packaging substrate 100 can be stably controlled.

[0093] The inner diameter of the smallest inner diameter portion 108 may be 50% to 99% of the smaller of the inner diameters of the first opening 106 and the second opening 107. The inner diameter of the smallest inner diameter portion 108 may be 60% or more of the smaller of the inner diameters of the first opening 106 and the second opening 107. The inner diameter of the smallest inner diameter portion 108 may be 70% or more of the smaller of the inner diameters of the first opening 106 and the second opening 107. The inner diameter of the smallest inner diameter portion 108 may be 90% or less of the smaller of the inner diameters of the first opening 106 and the second opening 107. The inner diameter of the smallest inner diameter portion 108 may be 80% or less of the smaller of the inner diameters of the first opening 106 and the second opening 107. In such cases, the through-electrode 20 can be stably formed in the thickness direction of the silica-based core 10 without interruption, and the through-electrode 20 can be prevented from easily detaching from the silica-based core 10.

[0094] In practice, by controlling both the diameter of the silica core 10 and the through-electrode 20, a packaging substrate 100 with high integration density and stable electrical reliability can be provided. The diameter of the through-electrode 20 refers to the average diameter of the through-electrode 20.

[0095] The thickness of the silica core 10 may be 200 μm or more. The thickness may be 250 μm or more. The thickness may be 400 μm or more. The thickness may be 500 μm or more. The thickness may be 1,000 μm or less.

[0096] The diameter of the through electrode 20 may be 40 μm to 200 μm. The diameter may be 60 μm or more. The diameter may be 80 μm or more. The diameter may be 100 μm or more. The diameter may be 180 μm or less. The diameter may be 160 μm or less. The diameter may be 140 μm or less. The diameter may be 120 μm or less.

[0097] In such cases, it is possible to form through electrodes 20 without disconnection and to provide a highly integrated packaging substrate 100.

[0098] Other components of the packaging substrate Figure 3 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the concrete example. The concrete example will be described below with reference to Figure 3.

[0099] The packaging substrate includes a silica-based core. The specific configuration of the packaging substrate is the same as that described in Figures 1A, 1B, and 2 above. The differences will be explained below.

[0100] The packaging substrate 100 may include a first redistribution layer 40 placed on the silica core 10.

[0101] The first redistribution layer 40 may include an electrical conductive layer 41 and an insulating layer 42 surrounding the electrical conductive layer 41.

[0102] In the first redistribution layer 40, an insulating layer 42 and an electrically conductive layer 41 may be arranged in a mixed manner. The first redistribution layer 40 may be formed in a manner in which an electrically conductive layer 41 having a predetermined position and shape is embedded within the insulating layer 42. At least a portion of the first redistribution layer 40 may be formed of the electrically conductive layer 41 as fine wires. The first redistribution layer 40 may be electrically connected to the upper terminals, elements, etc. of the packaging substrate 100.

[0103] The first redistribution layer 40 can be formed by a process of repeatedly forming and removing an insulating layer 42 and an electrically conductive layer 41.

[0104] The electrical conductive layer 41 corresponds to a conductor that transmits electrical signals. The electrical conductive layer 41 may contain an electrical conductive material. For example, the electrical conductive layer 41 may contain at least one of copper, nickel, aluminum, gold, and silver. Copper or the like may be used as the material for the electrical conductive layer 41. The material for the electrical conductive layer 41 can be the same as the material for the through electrode 20.

[0105] The insulating layer 42 is not limited as long as it can be applied as an insulating layer to semiconductor devices or packaging substrates. For example, the insulating layer 42 may be composed of an epoxy resin containing a filler. For example, the insulating layer 42 may be formed through a build-up layer material such as Ajinomoto's ABF (Ajinomoto Build-up Film), an undercoat material, etc., but is not limited thereto.

[0106] The first redistribution layer 40 may include two or more conductive layers 41. The first redistribution layer 40 may include one conductive layer (not shown) and other conductive layers (not shown) disposed on the one conductive layer.

[0107] The width of the other electrical conductive layer may be narrower than or the same as the width of the first electrical conductive layer.

[0108] The thickness of the other electrical conductive layer may be thinner than or the same as the thickness of the first electrical conductive layer.

[0109] The pitch of the other electrical conductive layer may be smaller than or the same as the pitch of the first electrical conductive layer.

[0110] In the multilayer first redistribution layer 40, electrical conductive layers with decreasing width can be arranged towards the top. In the multilayer first redistribution layer 40, electrical conductive layers with decreasing thickness can be arranged towards the top. Through this, the packaging substrate 100 can form a stable electrical connection with semiconductor elements having fine patterns.

[0111] The packaging substrate 100 may include a second redistribution layer (not shown) placed beneath the silica-based core 10.

[0112] The second redistribution layer may include an electrical conductive layer and an insulating layer surrounding the electrical conductive layer. The materials and formation methods for the electrical conductive layer and insulating layer of the second redistribution layer may be the same as those for the electrical conductive layer and insulating layer of the first redistribution layer. A description of the electrical conductive layer and insulating layer of the second redistribution layer will be omitted as it will overlap with the content described above.

[0113] The second redistribution layer may include two or more conductive layers. The second redistribution layer may include one conductive layer and other conductive layers located beneath the first conductive layer.

[0114] The width of the other electrical conductive layer may be wider than or the same as the width of the first electrical conductive layer.

[0115] The thickness of the other electrical conductive layer may be greater than or equal to the thickness of the first electrical conductive layer.

[0116] The pitch of the other electrical conductive layer may be greater than or the same as the pitch of the first electrical conductive layer.

[0117] In the multilayer second redistribution layer, wider electrical conductive layers may be arranged towards the bottom. In the multilayer second redistribution layer, thicker electrical conductive layers may be arranged towards the bottom. Through this, the packaging substrate 100 can form a stable electrical connection with the main board on which wide or thick electrical conductive layers are formed.

[0118] The packaging substrate 100 may further include bumps (not shown) located beneath the second redistribution layer.

[0119] The bumps may be positioned in a predetermined configuration beneath the redistribution layer. For example, the bumps may be positioned on a portion of the underside of the packaging substrate 100 so as to be in contact with the main board or the like.

[0120] Semiconductor packages A semiconductor package according to yet another embodiment of the embodiment includes a packaging substrate and an element electrically connected to the packaging substrate.

[0121] The packaging board can be mounted on the main board and electrically connected to the main board.

[0122] The explanation of the packaging substrate and components will be omitted as it will overlap with what was previously described.

[0123] Manufacturing method for packaging substrates A method for manufacturing a packaging substrate according to yet another embodiment of the embodiment includes a preparation step of preparing a silica-based core including through-via portions that penetrate in the thickness direction, a through-electrode formation step of forming through electrodes in the through-via portions to provide a through-electrode silica-based core, and a manufacturing step of manufacturing a packaging substrate from the through-electrode silica-based core.

[0124] In the preparation step, the silica core can be prepared by either using a silica core with through-vias already formed, or by forming through-vias on a silica substrate.

[0125] The silica substrate may also be a glass substrate. Examples of silica substrates include alkali borosilicate glass plates, alkali-free borosilicate glass plates, and alkali-free alkaline earth borosilicate glass plates. Electronic device glass substrates are applicable to the silica substrate; examples include, but are not limited to, those manufactured by Schott, AGC, Corning, etc.

[0126] In the preparation step, a glass substrate can be used as the silica substrate, and the glass substrate can be etched to form a silica core. Specifically, defects can be formed at predetermined positions on the surface of the glass substrate. Methods such as mechanical etching and laser irradiation may be used to form the defects.

[0127] After the formation of a defect, through-vias can be formed through physical or chemical etching. When chemical etching is applied, wet etching using an etching solution can be performed. The etching solution is not limited as long as it is generally applicable to etching glass substrates. For example, sulfuric acid solution, nitric acid solution, hydrofluoric acid solution, etc., may be applied as etching solutions.

[0128] During the etching process, the remaining surface of the glass substrate, excluding the area where the defect is formed, may be masked, or etching may be performed without masking.

[0129] A silica-based core can be provided in which a through via portion is formed by creating a defect at one point on the upper surface of a glass substrate, creating a defect at another point on the lower surface of the glass substrate opposite to the aforementioned point, and then performing etching.

[0130] The through-via portion includes a via space, which is the space in which electrodes are arranged, and the inner diameter surface of the via surrounding the via space.

[0131] The description of the silica-based core and the materials, properties, and structure of the components contained in the silica-based core will be omitted as it will overlap with the content described above.

[0132] To adjust the surface energy of the silica-based core to a range predetermined in the embodiment, a hydrophilic polymer can be applied to at least a portion of the surface of the silica-based core, or a hydrophilic film can be laminated onto the surface of the silica-based core.

[0133] In the through-electrode formation step, metal ions can be deposited in one thickness direction of the silica core within the via space to form the through-electrode.

[0134] In practice, metal ions can be deposited in the via space from the bottom to the top, or from the top to the bottom. In this case, during the growth process of the metal crystals constituting the through-electrode, it is possible to suppress the deposited metal crystals from simultaneously blocking both openings of the through-electrode. Through this, the plating solution can be stably supplied to the metal crystal growth surface, thereby substantially filling the via space and forming a through-electrode with suppressed void formation.

[0135] Figure 4 is a conceptual diagram illustrating the electrode seed layer arrangement process in a packaging substrate manufacturing method according to another embodiment of this specification. Specific examples will be described below with reference to Figure 4.

[0136] The silica-based core 10 prepared in the preparation step may include one surface 109 in the in-plane direction of the silica-based core. The surface 109 may be the upper surface of the silica-based core 10 or the lower surface of the silica-based core 10.

[0137] The through-electrode formation step may include an electrode seed layer placement step of arranging the electrode seed layer 50 alongside one surface 109 in the in-plane direction of the silica core, and a plating step of depositing the metal ions from the electrode seed layer 50 in one thickness direction Dt of the silica core to form the through-electrode.

[0138] In the electrode seed layer placement process, the electrode seed layer 50 can be placed alongside the upper or lower surface of the silica core 10. The electrode seed layer 50 may be placed in contact with the one surface 109 of the silica core. The electrode seed layer 50 may be placed alongside the one surface 109 of the silica core with other components in between.

[0139] A photoresist layer (not shown) may be placed between the surface of the electrode seed layer 50 and the one surface 109 of the silica-based core. This prevents the one surface 109 of the silica-based core from coming into contact with the electrode seed layer 50 and being damaged.

[0140] The photoresist layer may be patterned such that the via space 102 can be exposed to the electrode seed layer 50. That is, a photoresist layer may be applied that is patterned such that the region in contact with the via space 102 within the photoresist layer is removed. In such a case, it is possible to prevent the growth of metal crystals in the through electrode from being hindered by the photoresist layer, and to suppress the formation of a copper film on one surface 109 in the in-plane direction of the silica core during the through electrode formation step.

[0141] The electrode seed layer 50 may be a metal plate containing the metal elements that constitute the through electrode. The electrode seed layer 50 may be a thin metal film containing the metal elements that constitute the through electrode. The electrode seed layer 50 may be a metal tape plated with the metal elements that constitute the through electrode.

[0142] The through-electrode formation step may include a plating process in which metal ions are deposited from the electrode seed layer 50 in one thickness direction Dt of the silica core to form a through-electrode.

[0143] During the plating process, metal ions can be deposited through electrolytic metal plating. The metal ions may be copper ions, nickel ions, aluminum ions, gold ions, or silver ions. The metal ions may also be copper ions.

[0144] The plating process can be carried out by immersing the silica-based core 10 in an electroplating solution such that the surface of the electrode seed layer 50 and the inner diameter surface 103 of the vias are in contact with the electroplating solution, and applying an electric current to the electroplating solution through the electrodes. At this time, metal ions begin to deposit onto the electrode seed layer 50 and form metal crystals, and these metal crystals grow in one thickness direction Dt of the silica-based core to produce a through electrode.

[0145] In the through-electrode formation step, the silica-based core 10 may include a surface. The contact angle of the surface of the silica-based core 10 with respect to pure water may be 40° or less.

[0146] In the through-electrode formation step, the hydrophilicity of the silica-based core 10 surface can be adjusted by controlling the contact angle of the silica-based core 10 surface with respect to pure water. Through this, the affinity between the via inner diameter surface 103 and the electroplating solution is improved, and the through-electrode can be stably formed while substantially completely filling the via space.

[0147] The measurement method related to the contact angle of the silica-based core 10 surface with respect to pure water, and the explanation of the specific range of the contact angle of the silica-based core 10 surface, will be omitted as they will be redundant with the content described above.

[0148] The electroplating solution may contain water-soluble copper salts, sulfuric acid, chloride ions, accelerators, inhibitors, levelers, wetting agents, brighteners, and the like.

[0149] The leveler may, by example, contain polyvinylimidazole-containing compounds, polyvinylpyrrolidone-containing compounds, polyethyleneimine and imidazole compounds, 3-diethylamino-7-(4-dimethylaminophenylazo)-5-phenylphenadinium chloride, and its concentration may be 0.01 g / L to 3 g / L or 0.02 g / L to 0.8 g / L based on the entire plating solution.

[0150] The brightener may, for example, include sodium 3-mercapto-1-propanesulfonate and bipyridine, and its concentration may be 0.01 g / L to 3 g / L or 0.02 g / L to 0.5 g / L based on the entire plating solution.

[0151] By appropriately adjusting the concentrations of brighteners, accelerators, inhibitors, levelers, etc., the plating speed can be controlled through mechanisms such as physically blocking the plating solution or hindering chemical bonding during the plating process.

[0152] During the plating process, the current density for electrolytic copper plating is 3 mA / cm². 2 ~50mA / cm 2 This may be the case, and the processing time may be between 500 and 2000 seconds.

[0153] Through this process, through electrodes can be formed that suppress the occurrence of voids and cracks and prevent the dimple phenomenon in the redistribution layer.

[0154] The through-electrode may have a preferred growth orientation in the thickness direction of the silica-based core 10. The explanation of the preferred growth orientation of the through-electrode is omitted as it overlaps with what has been described above.

[0155] After the formation of the through-electrode is complete, the electrode seed layer 50 and the photoresist layer can be removed to provide a silica-based through-electrode core.

[0156] In the manufacturing step, a through-electrode silica core can be provided as a packaging substrate. In the manufacturing step, a redistribution layer can be formed above and / or below the through-electrode silica core to provide a packaging substrate. The redistribution layer may be a first redistribution layer formed on the silica core. The redistribution layer may be a second redistribution layer formed below the silica core.

[0157] The redistribution layer may include an electrical conductive layer and an insulating layer surrounding the electrical conductive layer. The explanation of the electrical conductive layer and the insulating layer will be omitted as it will overlap with what has been described above.

[0158] The electrical conductive layer may be formed using a dry or wet method.

[0159] The dry method involves sputtering in the region where the electrical conductive layer will be placed to form a seed layer, and then plating the region where the seed layer has been formed to form the electrical conductive layer. When forming the seed layer, metals such as titanium, chromium, and nickel may be sputtered, or the aforementioned metals and copper may be applied together during sputtering. Through sputtering, an anchoring effect occurs in which the surface of the glass core, crack prevention layer, or insulating layer interacts with the metal particles, thereby improving the adhesion of the electrical conductive layer.

[0160] The wet method involves applying a primer to the area where an electrical conductive layer needs to be formed, followed by metal plating. The primer may contain compounds with functional groups such as amines. Depending on the desired degree of adhesion, the primer may contain both a compound with functional groups such as amines and a silane coupling agent. When using a silane coupling agent, the surface to be primed can be pre-treated with the silane coupling agent, and then a compound with amine groups can be applied to the pre-treated area to form the primer layer.

[0161] After forming a seed layer or primer layer, a metal can be plated to form an electrically conductive layer. Copper plating may be applied during the formation of the electrically conductive layer, but is not limited to this. Before metal plating, parts of the seed layer or primer layer where the formation of the electrically conductive layer is unnecessary can be deactivated, or parts where the formation of the electrically conductive layer is necessary can be activated before plating. The activation or deactivation treatment method may include light irradiation treatment using a laser of a specific wavelength, chemical treatment, etc. However, after metal plating without applying activation or deactivation treatment, the electrically conductive layer can be etched and patterned according to a pre-designed shape.

[0162] After forming the electrically conductive layer, an insulating layer can be formed surrounding it. The insulating layer can be manufactured in film form. Specifically, an insulating layer can be formed by vacuum laminating a film-like insulating layer. In this case, the insulating layer is formed to surround the electrically conductive layer without voids, ensuring that the packaging substrate has excellent electrical reliability.

[0163] If necessary, further steps can be taken to form connection terminals, bumps, cover layers, etc., on the upper and / or lower surfaces of the packaging substrate, or to mount elements onto the substrate.

[0164] The following examples will provide a more detailed explanation of the implementation through specific embodiments. These embodiments are merely illustrative to aid in understanding the implementation, and the scope of implementation is not limited to them.

[0165] Manufacturing example: Manufacturing of packaging substrates Example 1: A silica core was manufactured by forming multiple through-vias on the surface of a Corning SG7.8 glass plate through laser irradiation, followed by wet etching. The inner diameter of the via space within the through-vias was adjusted to 100 μm.

[0166] A photoresist layer was applied and cured on the underside of a silica-based core, and the photoresist layer was patterned to prevent the via spaces from being blocked by the photoresist layer. A copper metal tape, which serves as the electrode seed layer, was then attached to the surface of the patterned photoresist layer.

[0167] Subsequently, the silica-based core with the metal tape attached was immersed in an electroplating solution, and then electroplated with copper to form through electrodes within the via space.

[0168] After forming the through-electrodes, the metal tape and photoresist layer were removed to complete the packaging substrate.

[0169] Comparative Example 1: A silica-based core was prepared using the method applied in Example 1. A metal seed layer was formed on the inner diameter surface of the via of the silica-based core by metal sputtering. Specifically, a nickel target was applied to the inner diameter surface of the via to form a nickel layer, and a copper target was applied on the nickel layer to form a copper layer, completing the metal seed layer. After immersing the silica-based core with the completed metal seed layer in an electroplating solution, electroplating was performed using the same method as in Example 1 to form through electrodes in the via space, completing the packaging substrate.

[0170] Comparative Example 2: A metal seed layer was completed on the inner diameter surface of a silica core under the same conditions as in Comparative Example 1. After immersing the silica core with the completed metal seed layer in an electroplating solution, electroplating was performed to form a 1 μm thick through-electrode, and the packaging substrate was completed.

[0171] Evaluation example: Measurement of the contact angle of a silica core with respect to pure water. The contact angles of the silica core surfaces in the examples and comparative examples with respect to pure water were measured using a surface analyzer via the goniometer method. Specifically, a droplet of 100 μL of pure water, which is the probe liquid, was introduced onto the surface of the silica core, and after capturing the introduced droplet, the contact angle was calculated from the captured image.

[0172] The measured values ​​for the examples and comparative examples are shown in Table 1 below.

[0173] Evaluation example: Evaluation of whether or not dimples occur. Redistribution layers were formed on packaging substrates for each example and comparative example. Specifically, a nickel target was applied to the packaging substrate to form a nickel layer, and a copper target was applied on the nickel layer to form a copper layer, completing the metal seed layer. Subsequently, electrolytic copper plating was performed on the metal seed layer to form an electrically conductive layer with a thickness of 1 μm. Ajinomoto's build-up film, ABF, was placed on the patterned electrically conductive layer, and a first redistribution layer was formed by vacuum lamination.

[0174] Subsequently, the surface of the first redistribution layer located on the through-electrode was observed with an optical microscope to evaluate whether or not the dimple phenomenon occurred. If the surface was recessed by 1 μm or more compared to the surrounding area, it was evaluated as Fail; if the surface was recessed by less than 1 μm compared to the surrounding area, or if it was smooth, it was evaluated as Pass.

[0175] The evaluation results for each example and comparative example are shown in Table 1 below.

[0176] Evaluation example: Evaluation of the shape of the through electrode The side surfaces of the packaging substrates of Comparative Examples 1 and 2 were observed using an optical microscope. The side view of the packaging substrate of Comparative Example 1 is shown in Figure 5A below, and the side view of the packaging substrate of Comparative Example 2 is shown in Figure 5B below.

[0177] [Table 1]

[0178] In Table 1 above, in the evaluation of whether or not dimples occurred, Example 1 and Comparative Example 1 were evaluated as "Pass," while Comparative Example 2 was evaluated as "Fail." This means that when forming through electrodes that do not completely fill the via space, the dimple phenomenon may occur when forming the redistribution layer.

[0179] In Figures 5A and 5B, it can be seen that the through electrodes of Comparative Example 1 and Comparative Example 2 were formed only in a portion of the via space. This means that when the preferred growth orientation of the metal crystals contained in the through electrode is in the thickness direction of the silica-based core, voids are not formed, and a through electrode with excellent electrical reliability can be provided.

[0180] Although preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto. Various modifications and improvements by those skilled in the art, utilizing the basic concepts of the present invention as defined in the appended claims, also fall within the scope of the present invention. [Explanation of symbols]

[0181] 100 Packaging substrates 10 Silica-based cores 101 Through-beam section 102 Beer Space 103 Via inner diameter surface 104 Top surface of silica-based core 105 Lower surface of silica-based core 106 First opening 107 Second opening 108 Minimum inner diameter section 109 One surface of silica-based core in the in-plane direction 20 Through electrode 40 1st redistribution layer 41 Electrical Conductive Layer 42 Insulating layer 50 Electrode seed layer Dt silica core, one thickness direction

Claims

1. A packaging substrate, Contains a silica-based core, The silica-based core includes through via portions that penetrate in the thickness direction of the silica-based core, The through via portion includes a via space which is the space in which electrodes are arranged, and the inner diameter surface of the via surrounding the via space. Includes through electrodes arranged in the via space, The through electrode contains metal crystal particles having a preferred growth orientation in the thickness direction of the silica-based core. The silica-based core includes a surface, and the contact angle of the surface of the silica-based core with respect to pure water is 40° or less. A packaging substrate in which, when observed in cross-section in the thickness direction of the packaging substrate, the area of ​​the cross-section of the through-electrode is 95% or more of the area of ​​the cross-section of the via space.

2. The silica-based core includes an upper surface and a lower surface facing the upper surface. The via space includes a first opening in contact with the upper surface of the silica core, a second opening in contact with the lower surface of the silica core, and a minimum inner diameter portion which is the part with the smallest inner diameter. The packaging substrate according to claim 1, wherein the minimum inner diameter portion is arranged between the first opening and the second opening.

3. The thickness of the silica-based core is 200 μm to 1,000 μm. The packaging substrate according to claim 1, wherein the diameter of the through-electrode is 40 μm to 200 μm.

4. It includes a first redistribution layer disposed on the silica-based core, The packaging substrate according to claim 1, wherein the first redistribution layer includes one conductive layer and another conductive layer disposed on the one conductive layer, the width of the other conductive layer being narrower than or the same as the width of the one conductive layer.

5. The process includes a preparation step of preparing a silica-based core including through vias that penetrate in the thickness direction, a through electrode formation step of forming through electrodes within the through vias to provide a through electrode silica-based core, and a manufacturing step of manufacturing a packaging substrate from the through electrode silica-based core. The through via portion includes a via space which is the space in which electrodes are arranged, and the inner diameter surface of the via surrounding the via space. The silica-based core includes a surface, and the contact angle of the surface of the silica-based core with respect to pure water is 40° or less. The silica-based core includes one surface in the in-plane direction of the silica-based core, A method for manufacturing a packaging substrate, wherein the through-electrode formation step includes an electrode seed layer arrangement step of arranging an electrode seed layer alongside one surface of the silica core in the in-plane direction, and a plating step of depositing metal ions from the electrode seed layer in one thickness direction of the silica core to form the through-electrode.

6. The thickness of the silica-based core is 200 μm to 1,000 μm. The method for manufacturing a packaging substrate according to claim 5, wherein the diameter of the through electrode is 50 μm to 150 μm.

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