Low-loss silicon nitride and waveguides containing low-loss silicon nitride

Abstract

A low-loss silicon nitride film is formed by depositing a silicon nitride film on a substrate and annealing the silicon nitride film at a temperature of at least 400° C. for at least 10 hours to cause the silicon nitride film to become a low-loss silicon nitride film. The low-loss silicon nitride film has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

Description

[Technical Field]

[0001] Cross-Reference to Related Applications This application claims priority to U.S. Patent Application No. 18 / 456,872, filed August 28, 2023, which claims priority to U.S. Provisional Patent Application No. 63 / 374,412, filed September 2, 2022, the entire contents of which are incorporated herein by reference.

[0002] Various embodiments relate to silicon nitride that exhibits low optical loss, including low optical loss at ultraviolet wavelengths. For example, various embodiments relate to low optical loss waveguides comprising a low-loss silicon nitride waveguide core, configured to guide visible and / or ultraviolet light. [Background Art]

[0003] Waveguides are used to direct optical signals from a light source (e.g., a laser) to a target location. However, optical power loss as the optical signal propagates through the waveguide can reduce the ability of the waveguide to deliver the optical signal. Through ongoing efforts, ingenuity, and new ideas, many deficiencies of such conventional waveguides have been addressed by developing solutions constructed in accordance with embodiments of the present invention, many examples of which are described in detail herein. [Summary of Invention] [Means for Solving the Problems]

[0004] Exemplary embodiments provide silicon nitride films and waveguide cores having low optical loss even at visible and ultraviolet wavelengths. For example, various embodiments provide integrated photonic circuits comprising low-loss silicon nitride films, low-loss silicon nitride waveguide cores, waveguides comprising low-loss silicon nitride waveguide cores, and / or waveguides comprising low-loss silicon nitride waveguide cores, where the low-loss silicon nitride exhibits an optical loss of less than 1 dB / cm at 488 nm. Various embodiments also provide methods for manufacturing integrated photonic circuits comprising such low-loss silicon nitride films, low-loss silicon nitride waveguide cores, waveguides comprising low-loss silicon nitride waveguide cores, and / or waveguides comprising low-loss silicon nitride waveguide cores.

[0005] According to one aspect of the present disclosure, a method is provided for forming a low-loss silicon nitride film and / or a component comprising low-loss silicon nitride. In an exemplary embodiment, the method includes the steps of depositing a silicon nitride film on a substrate and annealing the silicon nitride film at a temperature of at least 400°C for at least 10 hours to make the silicon nitride film a low-loss silicon nitride film. The low-loss silicon nitride film has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

[0006] In an exemplary embodiment, the silicon nitride film is formed using chemical vapor deposition.

[0007] In an exemplary embodiment, the chemical vapor deposition is plasma-assisted chemical vapor deposition (PECVD).

[0008] In exemplary embodiments, the PECVD is low-frequency (LF) PECVD.

[0009] In an exemplary embodiment, annealing is performed for at least 24 hours.

[0010] In an exemplary embodiment, annealing is performed for at least 90 hours.

[0011] In an exemplary embodiment, the method further includes the step of forming (i) one or more electrical circuit components or (ii) at least one optical circuit component on a substrate, either (a) before the step of depositing a silicon nitride film or (b) after the step of depositing a silicon nitride film.

[0012] In an exemplary embodiment, the method further includes the step of patterning a low-loss silicon nitride film onto a waveguide core.

[0013] In an exemplary embodiment, the method further includes the step of depositing a cladding on a low-loss silicon nitride film.

[0014] In an exemplary embodiment, the waveguide core is the core of a waveguide configured to guide at least one of visible light or ultraviolet light.

[0015] In another embodiment, a waveguide for guiding visible light and / or ultraviolet light is provided. In an exemplary embodiment, the waveguide comprises a low-loss silicon nitride waveguide core. The low-loss silicon nitride waveguide core has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

[0016] In an exemplary embodiment, the low-loss silicon nitride waveguide core is formed by annealing a silicon nitride film at a temperature of at least 400°C for at least 10 hours.

[0017] In an exemplary embodiment, the silicon nitride film was formed by depositing a silicon nitride film on a substrate using chemical vapor deposition.

[0018] In an exemplary embodiment, the chemical vapor deposition is plasma-assisted chemical vapor deposition (PECVD).

[0019] In exemplary embodiments, the PECVD is low-frequency (LF) PECVD.

[0020] In an exemplary embodiment, annealing is performed for at least 24 hours.

[0021] In an exemplary embodiment, annealing is performed for at least 90 hours.

[0022] In an exemplary embodiment, the waveguide further comprises a cladding deposited on the low-loss silicon nitride film.

[0023] In an exemplary embodiment, the waveguide is formed on a substrate, and the substrate further comprises at least one of (a) one or more electrical circuit components or (b) one or more optical circuit components.

[0024] In an exemplary embodiment, at least one of (a) one or more electrical circuit components or (b) one or more optical circuit components is formed on the substrate prior to at least one of (i) depositing a silicon nitride film on the substrate or (ii) annealing the silicon nitride film to form a low-loss silicon nitride film.

[0025] Having thus described the invention in general terms, reference is now made to the accompanying drawings, which are not necessarily drawn to scale. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] [Figure 1] FIG. 1 is a block diagram of an exemplary ion trap quantum computer comprising a waveguide with a low-loss silicon nitride waveguide core in accordance with an exemplary embodiment. [Figure 2A] FIG. 2A is a diagram illustrating an exemplary waveguide comprising a low-loss silicon nitride waveguide core in accordance with an exemplary embodiment. [Figure 2B] FIG. 2B is a diagram illustrating an exemplary waveguide comprising a low-loss silicon nitride waveguide core in accordance with an exemplary embodiment. [Figure 2C] FIG. 2C is a cross-sectional view of the exemplary waveguide shown in FIG. 2A, taken along line CC, in accordance with an exemplary embodiment. [Figure 3A]This flowchart illustrates various processes, procedures, and / or operations for manufacturing a low-loss silicon nitride film and / or a waveguide core containing low-loss silicon nitride, according to exemplary embodiments. [Figure 3B] This flowchart illustrates various processes, procedures, and / or operations for manufacturing a photonic integrated circuit comprising a waveguide core containing low-loss silicon nitride and / or a waveguide core containing low-loss silicon nitride, according to exemplary embodiments. [Figure 4] This is a schematic diagram of an exemplary controller for a quantum computer equipped with an ion trap device, according to an exemplary embodiment. [Figure 5] This is a schematic diagram of an exemplary computational entity of a quantum computer system that can be used according to an exemplary embodiment. [Modes for carrying out the invention]

[0027] The present invention will be described more fully hereafter with reference to the accompanying drawings, which illustrate embodiments of the invention that are part of but not all of it. In fact, the present invention can be embodied in many different forms and should not be considered limited to the embodiments described herein, but rather these embodiments are provided so as to satisfy the applicable legal requirements of this disclosure. The term "or" (also indicated as " / ") is used herein in both an alternative and a combined sense unless otherwise specified. The terms "illustrative" and "exemplary" are used to mean examples that do not indicate any level of quality. The terms "generally," "substantially," and "approximately" mean, unless otherwise specified, within engineering and / or manufacturing limits, and / or within the user's ability to measure. Throughout, similar numbers refer to similar elements.

[0028] In various scenarios, optical signals are delivered through waveguides. Generally, the optical loss of a waveguide increases as the wavelength decreases. For example, ultraviolet light tends to suffer greater losses when traveling through a waveguide than visible or infrared light. However, in various scenarios, it is desirable to deliver high-power ultraviolet and visible light to a target location where the light source cannot directly deliver light to the target location. In such scenarios, waveguides can be used to deliver light generated by the light source to the target location (and possibly to one or more optical elements such as modulators, filters, etc., configured to adjust the light). Due to the greater optical loss of waveguides exhibited at shorter wavelengths, the optical power of the initial ray delivered by the light source must be considerably greater than the optical power required at the target location. This results in very large energy consumption and waveguide damage. Therefore, there is a technical problem regarding how to deliver short-wavelength rays (e.g., ultraviolet, light from the blue half of the visible spectrum, etc.) to the target location.

[0029] Various embodiments provide technical solutions to such technical problems. For example, various embodiments provide low-loss silicon nitride films (e.g., low-photonic-loss silicon nitride films) exhibiting optical loss of 1 dB / cm or less. Various embodiments provide waveguide cores comprising low-loss silicon nitride films, waveguides comprising waveguide cores comprising low-loss silicon nitride films, integrated photonic circuits comprising waveguide cores comprising low-loss silicon nitride films, and the like. The low optical loss exhibited by low-loss silicon nitride films reduces the initial power requirements for light rays delivered to a target location through the low-loss silicon nitride film (e.g., as part of a waveguide core). Thus, various embodiments realize technical improvements to the art of waveguides for guiding ultraviolet and / or visible light, for example. In various embodiments, low-loss silicon nitride is used to form improved gratings and / or other optical components. These improvements include reduced optical power loss, reduced power consumption, and reduced waveguide damage.

[0030] An exemplary quantum computer with a waveguide having a low-loss silicon nitride waveguide core. Waveguides are used in a variety of situations and / or scenarios. For example, there are numerous and diverse situations and / or scenarios in which it may be desirable to guide light from one place to another. Various embodiments can be used to provide optical guidance tools (e.g., waveguides) that reduce optical power loss in a wide range of such situations and / or scenarios.

[0031] One exemplary scenario is various quantum computing systems. One such exemplary quantum computing system comprises a quantum charge-coupled device (QCCD) based quantum computer. Figure 1 provides a schematic diagram of an exemplary quantum computer system 100 comprising at least one optical path 166 (166A, 166B, 166C) at least partially defined by a waveguide 200 having a waveguide core containing low-loss silicon nitride. In various embodiments, the quantum computer system 100 comprises a computing entity 110 and a quantum computer 150. In various embodiments, the quantum computer 150 comprises a controller 130, a cryogenic and / or vacuum chamber 140 enclosing an ion trap 145, and one or more operation sources 164 (e.g., 164A, 164B, 164C). In exemplary embodiments, one or more operation sources 164 may comprise one or more lasers (e.g., UV lasers, visible light lasers, microwave lasers, etc.). In various embodiments, one or more manipulation sources 164 are configured to manipulate and / or bring about the generation of a controlled quantum state of one or more ions in the ion trap 145. For example, in an exemplary embodiment in which one or more manipulation sources 164 comprises one or more lasers, the lasers can provide one or more laser beams to the ion trap 145 in a low-temperature and / or vacuum chamber 140. Each of the one or more manipulation sources 164 provides a laser beam, etc., to the ion trap 145 via a corresponding optical path 166 (e.g., 166A, 166B, 166C). In various embodiments, at least one optical path 166 comprises a waveguide 200 having a waveguide core formed from / containing low-loss silicon nitride. Through the waveguide 200, the manipulation sources 164 can provide a modulated beam to the ion trap 145 via the optical path 166.

[0032] In various embodiments, the computing entity 110 is configured to allow a user to provide input to the quantum computer 150 (for example, through the user interface of the computing entity 110) and to receive and view output from the quantum computer 150. The computing entity 110 can communicate with the controller 130 of the quantum computer 150 via one or more wired or wireless networks 120 and / or direct wired and / or wireless communication. In exemplary embodiments, the computing entity 110 can convert, configure, and format information / data, quantum computing algorithms, etc., into a computing language, executable instructions, command set, etc., that the controller 130 can understand and / or execute.

[0033] In various embodiments, the controller 130 is configured to control an electrical signal source and / or driver, a cryogenic system and / or vacuum system that controls the temperature and pressure within the cryogenic and / or vacuum chamber 140, an operation source 164, and / or other systems that control environmental conditions within the cryogenic and / or vacuum chamber 140 (e.g., temperature, humidity, pressure, etc.) and / or other systems configured to operate and / or bring about the generation of controlled quantum states of one or more ions within the ion trap 145. In various embodiments, the ions trapped within the ion trap 145 are used as qubits in the quantum computer 150.

[0034] Exemplary low-loss silicon nitride film and components comprising the same Low-loss silicon nitride is provided in various embodiments. Low-loss silicon nitride is used to form waveguide cores in various embodiments. For example, in various embodiments, low-loss silicon nitride is used to form the waveguide core of a waveguide. In various embodiments, low-loss silicon nitride is used to form the waveguide core of at least a portion of a waveguide that is formed on a substrate which is part of an integrated photonic circuit and / or other electrical and / or optical elements (e.g., conductive traces, resistors, capacitors, inductors, transistors, diodes, optical and / or electrical modulators, mirrors, lenses, prisms, gratings, etc.).

[0035] In various embodiments, low-loss silicon nitride is formed by depositing a silicon nitride film, for example, using chemical vapor deposition. In various embodiments, low-loss silicon nitride is formed by depositing a silicon nitride film using plasma-accelerated chemical vapor deposition (PECVD). For example, chemical vapor deposition can be carried out at temperatures below 400°C. In various embodiments, low-loss silicon nitride is formed by depositing a silicon nitride film using a PECVD process that includes at least some low-frequency (LF) power.

[0036] In various embodiments, the thickness of the silicon nitride film is 10 to 1000 nanometers. In exemplary embodiments, the thickness of the silicon nitride film is 10 to 500 nanometers.

[0037] In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for at least 10 hours. In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for at least 24 hours. In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for at least 90 hours. In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for a period ranging from 10 to 200 hours. In exemplary embodiments, the annealing temperature is in the range of 400°C to 1100°C.

[0038] In exemplary embodiments, the annealing process is carried out in the presence of one or more active gases. For example, the silicon nitride film may be in the presence of hydrogen, NH3, and / or one or more other gases during the annealing process. In various embodiments, the annealing process is carried out in the presence of one or more inert gases (instead of and / or in addition to one or more active gases).

[0039] Figure 2A illustrates an exemplary waveguide 200A comprising a waveguide core 205 containing low-loss silicon nitride 215. The exemplary waveguide 200A comprises a straight portion 202 and a curved portion 204. The curved portion 204 of the waveguide core is formed from and / or contains low-loss silicon nitride 215. The straight portion 210 of the waveguide core contains another waveguide core material (e.g., alumina). In the illustrated embodiment, the waveguide core 205 of waveguide 200A is formed on a substrate 225 and at least partially surrounded by a cladding 220. One or more optical and / or electrical elements 230 are also formed on the substrate. In various embodiments, one or more optical and / or electrical elements 230 are formed on the substrate before and / or after the silicon nitride film used to produce the low-loss silicon nitride 215 is deposited on the substrate 225. In various embodiments, the substrate 225 is a silicon substrate or another substrate / wafer suitable for the application.

[0040] Figure 2B illustrates another exemplary waveguide 200 comprising a waveguide core 205 containing low-loss silicon nitride 215. The exemplary waveguide 200B comprises a straight portion 202 and a curved portion 204. Both the straight portion 202 and the curved portion 204 of the waveguide core 205 comprise and / or are formed from low-loss silicon nitride 215. The waveguide core is at least partially surrounded by cladding 220. Although not shown, waveguide 200B can be formed on a substrate 225. One or more optical and / or electrical elements 230 can also be formed on the substrate 225. For example, one or more optical and / or electrical elements 230 can be formed on the substrate 225 before and / or after the silicon nitride film used to manufacture the low-loss silicon nitride 215 is deposited on the substrate 225. In various embodiments, the substrate 225 may be a silicon substrate or other substrate / wafer suitable for the application.

[0041] Figure 2C illustrates a cross-sectional view of a waveguide 200A, taken along line CC shown in Figure 2A, which includes a waveguide core 205 containing low-loss silicon nitride 215. A first cladding 260A is formed on the substrate 225, and the waveguide core 205 containing low-loss silicon nitride 215 is embedded between the first cladding 260A and the second cladding 260B. In various embodiments, the first cladding 260A and / or the second cladding 260B include tetraethyl orthosilicate (TEOS) and / or another material configured to optically and / or electrically isolate the waveguide core 205 from its surroundings. In various embodiments, the first cladding 260A and / or the second cladding 260B extend tens to several hundred microns away from the waveguide core 205 in the plane of Figure 2C.

[0042] Exemplary methods for manufacturing low-loss silicon nitride films and components comprising the same. Figure 3A provides a flowchart illustrating various processes, procedures, etc., for manufacturing low-loss silicon nitride (e.g., low-loss silicon nitride films) and / or waveguide cores containing low-loss silicon nitride.

[0043] Starting in step / operation 302, silicon nitride is deposited on a substrate, wafer, etc. For example, a silicon nitride film is deposited on a substrate. In various embodiments, silicon nitride is deposited on a substrate using chemical vapor deposition. In various embodiments, silicon nitride is deposited on a substrate using PECVD. For example, chemical vapor deposition can be carried out at temperatures below 400°C. In various embodiments, silicon nitride is deposited on a substrate using a PECVD process that includes using at least some LF power. In exemplary embodiments, silicon nitride is deposited on a substrate using a PECVD process that includes using a combination of LF power and high frequency power. In exemplary embodiments, silicon nitride is deposited on a substrate using an LF PECVD process.

[0044] In an exemplary embodiment where a waveguide core is formed in an optional step / operation 304, silicon nitride is patterned to form a desired waveguide core. For example, a waveguide core suitable for an application can be patterned from deposited silicon nitride.

[0045] In step / operation 306, a long annealing process is performed to convert and / or transform silicon nitride into low-loss silicon nitride. For example, a long annealing process causes silicon nitride to become low-loss silicon nitride. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for at least 10 hours. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for at least 24 hours. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for at least 90 hours. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for a time ranging from 10 to 200 hours. In exemplary embodiments, the annealing temperature is in the range of 400°C to 1100°C.

[0046] In exemplary embodiments, the annealing process is carried out in the presence of one or more active gases. For example, the silicon nitride film may be in the presence of hydrogen, NH3, and / or one or more other gases during the annealing process. In various embodiments, the annealing process is carried out in the presence of one or more inert gases (instead of and / or in addition to one or more active gases).

[0047] In exemplary embodiments, a low-loss silicon nitride film is formed as a waveguide portion (e.g., a waveguide core) of a waveguide and / or photonic integrated circuit (PIC). For example, silicon nitride can be deposited on a substrate (and / or a first cladding formed on a first substrate) and a waveguide and / or PIC containing silicon nitride is formed on the first substrate. In exemplary embodiments, a low-loss film is prepared on a first substrate and then bonded and / or transferred onto a second substrate (e.g., onto a first cladding formed on a second substrate).

[0048] Figure 3B provides a flowchart illustrating various processes and procedures for manufacturing a waveguide having a waveguide core containing low-loss silicon nitride (e.g., a low-loss silicon nitride film), and / or an optical integrated circuit / PIC having a low-loss silicon nitride film and / or a waveguide core.

[0049] Starting with an optional step / operation 322, one or more electrical and / or optical elements are formed on the substrate. For example, one or more conductive traces, resistors, capacitors, inductors, transistors, diodes, optical and / or electrical modulators, mirrors, lenses, prisms, grids, and / or other electrical and / or optical elements can be formed on the substrate as appropriate for the application.

[0050] In step 324, a first cladding deposition is carried out. For example, a first cladding 260A is deposited on the substrate 225. In various embodiments, the first cladding 260A and / or the second cladding 260B include another material configured to optically and / or electrically isolate the TEOS and / or waveguide core 205 from its surroundings. In an exemplary embodiment, the first cladding is deposited using PECVD.

[0051] In an optional step 326, a polishing step is performed to smooth and / or clean the exposed surface 262 of the first cladding 260A. For example, a chemical mechanical polishing process can be performed on the exposed surface 262 of the first cladding 260A.

[0052] In step / operation 328, silicon nitride is deposited on a substrate, wafer, etc. For example, a silicon nitride film is deposited on a substrate. In various embodiments, silicon nitride is deposited on a substrate using chemical vapor deposition. In various embodiments, silicon nitride is deposited on a substrate using PECVD. For example, chemical vapor deposition can be carried out at a temperature of less than 400°C. In various embodiments, silicon nitride is deposited on a substrate using a PECVD process that includes using at least some LF power. In exemplary embodiments, silicon nitride is deposited on a substrate using a PECVD process that includes using a combination of LF power and high frequency power. In exemplary embodiments, silicon nitride is deposited on a substrate using an LF PECVD process. In exemplary embodiments, for example, the first surface 272 of silicon nitride can be formed on the exposed surface 262 of the first cladding 260A.

[0053] In an exemplary embodiment where the waveguide core is formed in step / operation 330, silicon nitride is patterned to form the desired waveguide core. For example, a waveguide core suitable for an application can be patterned from deposited silicon nitride.

[0054] In step / operation 332, a long annealing process is performed to convert and / or transform silicon nitride into low-loss silicon nitride. For example, a long annealing process causes silicon nitride to become low-loss silicon nitride. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for at least 10 hours. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for at least 24 hours. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for at least 90 hours. In various embodiments, the long annealing process includes the step of annealing silicon nitride (e.g., a substrate and any elements formed on the substrate) at a temperature of at least 400°C for a time ranging from 10 to 200 hours. In exemplary embodiments, the annealing temperature is in the range of 400°C to 1100°C.

[0055] In exemplary embodiments, the annealing process is carried out in the presence of one or more active gases. For example, the silicon nitride film may be in the presence of hydrogen, NH3, and / or one or more other gases during the annealing process. In various embodiments, the annealing process is carried out in the presence of one or more inert gases (instead of and / or in addition to one or more active gases).

[0056] In an optional step 334, the exposed surface 274 of the waveguide core 205 and / or the side surface 276 of the waveguide core 206 are smoothed, polished, and / or cleaned. For example, a chemical mechanical polishing process and / or other process configured to reduce the roughness of the exposed surface 274 of the waveguide core 205 and / or the side surface 276 of the waveguide core 206 may be performed on the exposed surface 274 of the waveguide core 205 and / or the side surface 276 of the waveguide core 206.

[0057] In an optional step / operation 336, a second cladding is performed. For example, the second cladding 260B is deposited on the exposed surface 274 of the waveguide core 205 and on the exposed surface 262 of the first cladding 260A that is not covered by the waveguide core 205. In various embodiments, the first cladding 260A and / or the second cladding 260B include TEOS and / or another material configured to optically and / or electrically isolate the waveguide core 205 from its surroundings. In an exemplary embodiment, the first cladding is deposited using a PECVD process. In various embodiments, the second cladding is deposited such that the first and second claddings surround a waveguide core patterned from low-loss silicon nitride and / or silicon nitride / low-loss silicon nitride.

[0058] In an optional step / operation 338, one or more additional electrical and / or optical elements are formed on the substrate. For example, one or more additional conductive traces, resistors, capacitors, inductors, transistors, diodes, optical and / or electrical modulators, mirrors, lenses, prisms, grids, and / or other electrical and / or optical elements may be formed on the substrate as appropriate for the application.

[0059] As can be understood, various steps / operations can be performed in a different order than those described in the various embodiments. For example, in the exemplary embodiment, the waveguide core is patterned after a long annealing process is performed. In another example, in the exemplary embodiment, the cladding is formed before the long annealing process is performed. Various other steps / operations can be added to those illustrated in Figures 3A and / or 3B, and / or modified to produce desired components including low-loss silicon nitride.

[0060] Example Controller In various embodiments, a waveguide 200 having a waveguide core containing low-loss silicon nitride is incorporated into a quantum computer 150. In various embodiments, the quantum computer 150 further comprises a controller 130 configured to control various elements of the quantum computer 150. For example, the controller 130 may be configured to control a voltage source and / or driver configured to provide electrical signals that control the modulation of one or more beams via corresponding modulators, a cryogenic system and / or vacuum system that controls the temperature and pressure in a cryogenic and / or vacuum chamber 140, an operation source 164, and / or other systems that control environmental conditions (e.g., temperature, humidity, pressure, etc.) in the cryogenic and / or vacuum chamber 140, and / or other systems configured to operate and / or bring about the generation of controlled quantum states of one or more ions in an ion trap 145.

[0061] As shown in Figure 4, in various embodiments, the controller 130 may comprise various controller elements, including a processing device 405, memory 410, driver controller element 415, communication interface 420, analog-to-digital converter element 425, and so on. For example, the processing device 405 may comprise processing elements, programmable logic devices (CPLDs), microprocessors, coprocess entities, application-specific instruction set processors (ASIPs), integrated circuits, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic arrays (PLAs), hardware accelerators, other processing devices and / or circuits, and / or controllers. The term "circuit" can refer to an entire hardware embodiment or a combination of hardware and computer program products. In an exemplary embodiment, the processing device 405 of the controller 130 comprises and / or communicates with a clock.

[0062] For example, memory 410 may include non-temporary memory such as volatile and / or non-volatile memory storage devices, such as one or more of the following: hard disk, ROM, PROM, EPROM, EEPROM, flash memory, MMC, SD memory card, memory stick, CBRAM, PRAM, FeRAM, RRAM, SONOS, racetrack memory, RAM, DRAM, SRAM, FPM DRAM, EDO DRAM, SDRAM, DDR SDRAM, DDR2 SDRAM, DDR3 SDRAM, RDRAM, RIMM, DIMM, SIMM, VRAM, cache memory, register memory, etc. In various embodiments, memory 410 may store qubit records (e.g., in a qubit record data store, qubit record database, qubit record table, etc.) corresponding to the qubits of a quantum computer, calibration tables, executable queues, computer program code (e.g., in one or more computer languages, dedicated controller languages, etc.). In exemplary embodiments, the controller 130 is caused to perform one or more steps, operations, processes, procedures, etc. described herein to track the phases of atomic objects in an atomic system and thereby adjust the phases of one or more operation sources and / or signals generated by the computer program code stored in memory 410 (for example, by processing device 405).

[0063] In various embodiments, the driver controller element 415 may include one or more driver and / or controller elements, each configured to control one or more drivers. In various embodiments, the driver controller element 415 may comprise drivers and / or driver controllers. For example, the driver controller may be configured to cause one or more corresponding drivers to operate according to executable instructions, commands, etc., scheduled and executed by the controller 130 (e.g., the processing device 405). In various embodiments, the driver controller element 415 may be capable of causing the controller 130 to operate the operation source 164. In various embodiments, the drivers may be laser drivers, vacuum component drivers, drivers for controlling the flow of current and / or voltage of electrical signals applied to the electrodes of the ion trap 145, cryogenic and / or vacuum system component drivers, etc. In various embodiments, the controller 130 comprises means for communicating and / or receiving signals from one or more photoreceiving components, such as cameras, MEMS cameras, CCD cameras, photodiodes, photomultiplier tubes, etc. For example, the controller 130 may include one or more analog-to-digital converter elements 425 configured to receive signals from one or more light-receiving components, calibration sensors, and the like.

[0064] In various embodiments, the controller 130 may include a communication interface 420 for interfaceing with and / or communicating with the computational entity 110. For example, the controller 130 may include a communication interface 420 for receiving executable instructions, command sets, etc., from the computational entity 110 and for providing the results of processing outputs received from the quantum computer 150 (e.g., from an optical collection system) and / or outputs to the computational entity 110. In various embodiments, the computational entity 110 and the controller 130 may communicate via direct wired and / or wireless communication, and / or via one or more wired and / or wireless networks 120.

[0065] Exemplary computational entities Figure 5 provides a schematic diagram representing an exemplary computational entity 110 that can be used in conjunction with embodiments of the present invention. In various embodiments, the computational entity 110 is configured to allow a user to provide input to the quantum computer 150 (for example, through the user interface of the computational entity 110), and to receive, display, analyze, and so on outputs from the quantum computer 150.

[0066] As shown in Figure 5, the computational entity 110 may include an antenna 512, a transmitter 504 (e.g., a wireless transmitter), a receiver 506 (e.g., a wireless receiver), and a processing device 508, each providing a signal to the transmitter 504 and receiving a signal from the receiver 506. The signals provided to the transmitter 504 and received from the receiver 506 may each include signal transmission information / data in accordance with the radio interface standards of an applicable wireless system that communicates with various entities, such as the controller 130 and other computational entities 110. In this regard, the computational entity 110 may be capable of operating with one or more radio interface standards, communication protocols, modulation types, and access types. For example, the computing entity 110 may be configured to receive and / or provide communications using wired data transmission protocols such as Fiber Optic Distributed Data Interface (FDDI), Digital Subscriber Line (DSL), Ethernet, Asynchronous Transfer Mode (ATM), Frame Relay, DOCSIS (Data Over Cable Service Interface Specification), or any other wired transmission protocol.Similarly, computation entity 110 is involved in General-Purpose Packet Radio Service (GPRS), Universal Mobile Communications System (UMTS), Code Division Multiple Access 2000 (CDMA2000), CDMA2000 1X (1xRTT), Wideband Code Division Multiple Access (WCDMA®), Global System for Mobile Communications (GSM), GSM Evolution High-Speed ​​Data Rate (EDGE), Time Division Synchronous Code Division Multiple Access (TD-SCDMA), Long-Term Evolution (LTE), E-UTRAN (Evolved Universal Terrestrial Radio Access Network), EVDO (Evolution-Data Optimized), High-Speed ​​Packet Access (HSPA), High-Speed ​​Downlink Packet Access (HSDPA), and IEEE It can be configured to communicate via a wireless external communication network using any of the following protocols: 802.11 (Wi-Fi), Wi-Fi Direct, 802.16 (WiMAX), Ultra Wideband (UWB), Infrared (IR) protocol, Near Field Communication (NFC) protocol, Wibree, Bluetooth protocol, Wireless Universal Serial Bus (USB) protocol, and / or any other wireless protocol.Computational entity 110 may use such protocols and standards to communicate, including Border Gateway Protocol (BGP), Dynamic Host Configuration Protocol (DHCP), Domain Name System (DNS), File Transfer Protocol (FTP), Hypertext Transfer Protocol (HTTP), HTTP over TLS / SSL / Secure, Internet Message Access Protocol (IMAP), Network Time Protocol (NTP), Simple Mail Sending Protocol (SMTP), Telnet, Transport Layer Security (TLS), Secure Sockets Layer (SSL), Internet Protocol (IP), Transport Control Protocol (TCP), User Datagram Protocol (UDP), Datagram Congestion Control Protocol (DCCP), Stream Controlled Transfer Protocol (SCTP), and Hypertext Markup Language (HTML).

[0067] Through these communication standards and protocols, the computing entity 110 can communicate with various other entities using concepts such as unstructured additional service information / data (USSD), short message service (SMS), multimedia message service (MMS), dual-tone multi-frequency signaling (DTMF), and / or subscriber identification module dialer (SIM dialer). The computing entity 110 can also download changes, add-ons, and updates to its firmware, software (including, for example, executable instructions, applications, and program modules), and operating system.

[0068] The computational entity 110 may also include a user interface device having one or more user input / output interfaces (for example, a display 516 and / or speaker / speaker driver coupled to the processing device 508, and a touchscreen, keyboard, mouse, and / or microphone coupled to the processing device 508). For example, a user output interface may be configured to run interchangeably on the computational entity 110, and / or be accessible via the computational entity 110, to display or audibly present information / data, and to interact with them via one or more user input interfaces. A user input interface may include any of several devices that enable the computational entity 110 to receive data, such as a keypad 518 (hard or soft), a touch display, a voice / speech or motion interface, a scanner, a reader, or other input device. In embodiments including a keypad 518, the keypad 518 may include (or display) regular numerals (0-9) and related keys (#, *), as well as other keys used to operate the computational entity 110, and may include a set of alphabetic keys or a set of keys that can be utilized to realize a set of alphabetic keys. In addition to providing input, the user input interface may be used to activate or deactivate certain functions, such as a screen saver and / or sleep mode. Through such input, the computational entity 110 may collect information / data, user interaction / input, etc.

[0069] The computing entity 110 may also include a volatile memory or memory 522 and / or a non-volatile memory or memory 524, which may be embedded and / or removable. For example, non-volatile memory may be ROM, PROM, EPROM, EEPROM, flash memory, MMC, SD memory card, memory stick, CBRAM, PRAM, FeRAM, RRAM, SONOS, racetrack memory, etc. Volatile memory may be RAM, DRAM, SRAM, FPM DRAM, EDO DRAM, SDRAM, DDR SDRAM, DDR2 SDRAM, DDR3 SDRAM, RDRAM, RIMM, DIMM, SIMM, VRAM, cache memory, register memory, etc. The volatile and non-volatile memory or memory can store databases, database instances, database management system entities, data, applications, programs, program modules, scripts, source code, object code, byte code, compiled code, interpreter code, machine code, executable instructions, etc., and perform the functions of the computing entity 110.

[0070] conclusion Many modifications and other embodiments of the invention described herein will be conceivable to those skilled in the art, but the invention is not relevant to them and the teachings presented in the above description and the accompanying drawings are of interest. It should be understood that the invention should not be limited to any particular embodiment disclosed, and that modifications and other embodiments are intended to be included within the scope of the appended claims. Certain terms are used herein, but they are used only for general descriptive purposes and not for limiting purposes. [Explanation of Symbols]

[0071] 166 Light path 166A optical path 166B Optical path 166C optical path 200 waveguides 200A waveguide 200B waveguide 202 Straight section 204 Curved section 205 Waveguide Core 210 Straight section 215 Low-loss silicon nitride 220 Clad 225 circuit boards 230 Optical and / or Electrical Elements 260A First cladding 260B Second Clad 262 Exposed surface 272 First side 274 Exposed surface 276 Side view 405 Processing Devices 410 memory 415 Driver Controller Elements 420 Communication Interfaces 425 A / D Converter 504 Transmitter 506 Receiver 508 Processing Devices 516 displays 518 Keypad 520 Network Interfaces 522 volatile memory 524 Non-volatile memory

Claims

1. A method for forming a low-loss silicon nitride film, A step of depositing a silicon nitride film on a substrate using plasma-accelerated chemical vapor deposition (PECVD) with low frequency (LF) power, To make the silicon nitride film a low-loss silicon nitride film characterized by an optical loss of less than 1 dB / cm at a wavelength of 488 nm, the silicon nitride film is annealed at a temperature in the range of 400°C to 1100°C for at least 10 hours. Methods that include...

2. The steps include: forming a pattern of the low-loss silicon nitride film onto the waveguide core, and depositing a cladding on the waveguide core, or (i) forming one or more electrical circuit components or (ii) at least one optical circuit component on the substrate. The method according to claim 1, further comprising at least one of the following.

Images