Detection device

Abstract

This detection device comprises: a substrate; a plurality of photodiodes in which a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode are stacked in order on the substrate; and an insulating film that is provided between the plurality of adjacent lower electrodes. The lower buffer layer includes an electrode-overlapping portion that overlaps with the lower electrode and an insulating-film-overlapping portion that overlaps at least a portion of the insulating film, the thickness of the insulating-film-overlapping portion of the lower buffer layer being less than the thickness of the electrode-overlapping portion of the lower buffer layer.

Description

Technical Field

[0001] The present invention relates to a detection device. Background Art

[0002] An optical sensor capable of detecting fingerprint patterns and vein patterns is known (e.g., Patent Document 1). Such an optical sensor has a plurality of photodiodes (OPD: Organic Photodiode) using an organic semiconductor material as an active layer. As described in Patent Document 2, a photodiode is laminated, for example, in the order of a lower electrode, an electron transport layer, an active layer, a hole transport layer, and an upper electrode. The electron transport layer or the hole transport layer is also called a buffer layer. Prior Art Documents Patent Documents

[0003] Patent Document 1 Japanese Unexamined Patent Publication No. 2009-32005 Patent Document 2 International Publication No. 2020 / 188959 Summary of the Invention Problem to be Solved by the Invention

[0004] When the buffer layer and the active layer are provided across a plurality of photodiodes, more specifically, when the buffer layer is provided across a plurality of adjacent lower electrodes, leak current may occur between adjacent lower electrodes.

[0005] An object of the present invention is to provide a detection device capable of suppressing leak current between electrodes. Means for Solving the Problem

[0006] A detection device according to one aspect of the present invention comprises a substrate, a plurality of photodiodes stacked on the substrate in the order of a lower electrode, a lower buffer layer, an active layer, an upper buffer layer, and an upper electrode, and an insulating film provided between a plurality of adjacent lower electrodes, wherein the lower buffer layer includes an electrode overlap portion that overlaps the lower electrode and an insulating film overlap portion that overlaps at least a part of the insulating film, and the thickness of the insulating film overlap portion of the lower buffer layer is thinner than the thickness of the electrode overlap portion of the lower buffer layer. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a schematic plan view showing a detection device according to the first embodiment. [Figure 2] Figure 2 is a block diagram showing an example configuration of the detection device according to the first embodiment. [Figure 3] Figure 3 is a circuit diagram showing a detection device according to the first embodiment. [Figure 4] Figure 4 is an enlarged schematic diagram of the sensor unit. [Figure 5] Figure 5 is a cross-sectional view taken along line V-V' in Figure 4. [Figure 6] Figure 6 is a schematic plan view showing the arrangement of the lower electrode and the insulating film. [Figure 7] Figure 7 is a cross-sectional view of Figure 6, taken along the line VII-VII'. [Figure 8] Figure 8 is a schematic plan view showing the arrangement relationship between the lower electrode and the insulating film of the detection device according to the second embodiment. [Figure 9] Figure 9 is a cross-sectional view taken along the line IX-IX' in Figure 8. [Figure 10] Figure 10 is a schematic plan view showing the arrangement relationship between the lower electrode and the insulating film of the detection device according to the third embodiment. [Figure 11] Figure 11 is a cross-sectional view of Figure 10 taken along the line XI-XI'. [Figure 12] Figure 12 is a schematic cross-sectional view showing a detection device according to the fourth embodiment. [Figure 13] Figure 13 is a schematic cross-sectional view showing a detection device according to a modified example of the fourth embodiment. [Modes for carrying out the invention]

[0008] Embodiments for carrying out the present invention will be described in detail with reference to the drawings. The present disclosure is not limited by the contents described in the following embodiments. Furthermore, the components described below include those that can be easily conceived by a person skilled in the art, and those that are substantially the same. In addition, the components described below can be combined as appropriate. The disclosure is merely an example, and any modifications that a person skilled in the art can easily conceive while maintaining the spirit of the disclosure are naturally included within the scope of the disclosure. Furthermore, in order to make the explanation clearer, the drawings may schematically represent the width, thickness, shape, etc. of each part compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the disclosure. Furthermore, in the present disclosure and each drawing, elements that are the same as those described above with respect to previously shown drawings are denoted by the same reference numerals, and detailed explanations may be omitted as appropriate.

[0009] In this specification and the claims, when describing a configuration in which one structure is placed on top of another structure, unless otherwise specified, the term "on top of" includes both cases: one in which the other structure is placed directly on top of the other structure so as to be in contact with it, and another in which the other structure is placed above the other structure via yet another structure.

[0010] (First Embodiment) Figure 1 is a plan view showing a detection device according to the first embodiment. As shown in Figure 1, the detection device 1 includes a sensor substrate 21 (substrate), a sensor unit 10, a gate line drive circuit 15, a signal line selection circuit 16, a detection circuit 48, a control circuit 122, a power supply circuit 123, a first light source substrate 51, a second light source substrate 52, and light sources 53 and 54. The first light source substrate 51 is provided with a plurality of light sources 53. The second light source substrate 52 is provided with a plurality of light sources 54.

[0011] A control substrate 121 is electrically connected to the sensor base material 21 via a wiring substrate 71. The wiring substrate 71 is, for example, a flexible printed circuit board or a rigid substrate. A detection circuit 48 is provided on the wiring substrate 71. A control circuit 122 and a power supply circuit 123 are provided on the control substrate 121. The control circuit 122 is, for example, an FPGA (Field Programmable Gate Array). The control circuit 122 supplies control signals to the sensor unit 10, the gate line driving circuit 15, and the signal line selection circuit 16 to control the detection operation of the sensor unit 10. Furthermore, the control circuit 122 supplies control signals to the light sources 53 and 54 to control turning on or off of the light sources 53 and 54. The power supply circuit 123 outputs a sensor power supply signal (Sensor power supply voltage) VDDSNS (see FIG. 3) and other voltage signals to the sensor unit 10, the gate line driving circuit 15, and the signal line selection circuit 16. Furthermore, the power supply circuit 123 supplies power supply voltage to the light sources 53 and 54.

[0012] The sensor base material 21 has a detection area AA and a peripheral area GA. The detection area AA is an area where a plurality of photodiodes PD (see FIG. 4) included in the sensor unit 10 are provided. The peripheral area GA is an area between the outer periphery of the detection area AA and the outer edge of the sensor base material 21, and is an area where the plurality of photodiodes PD are not provided.

[0013] The gate line driving circuit 15 and the signal line selection circuit 16 are provided in the peripheral area GA. Specifically, the gate line driving circuit 15 is provided in an area extending along the second direction Dy in the peripheral area GA. The signal line selection circuit 16 is provided in an area extending along the first direction Dx in the peripheral area GA, and is provided between the sensor unit 10 and the detection circuit 48.

[0014] In the following description, the first direction Dx is one direction within a plane parallel to the sensor base material 21. The second direction Dy is one direction within the plane parallel to the sensor base material 21, and is a direction orthogonal to the first direction Dx. Note that the second direction Dy may intersect the first direction Dx without being orthogonal thereto. The third direction Dz is a direction orthogonal to both the first direction Dx and the second direction Dy, and is the normal direction of the main surface of the sensor base material 21. Furthermore, the term "plan view" refers to the positional relationship when viewed from a direction perpendicular to the sensor base material 21.

[0015] The plurality of light sources 53 are provided on the first light source base material 51 and arranged along the second direction Dy. The plurality of light sources 54 are provided on the second light source base material 52 and arranged along the second direction Dy. The first light source base material 51 and the second light source base material 52 are each electrically connected to a control circuit 122 and a power supply circuit 123 via terminal portions 124 and 125 provided on a control substrate 121, respectively.

[0016] For the plurality of light sources 53 and the plurality of light sources 54, for example, inorganic LEDs (Light Emitting Diodes), organic EL (OLED: Organic Light Emitting Diodes), or the like are used. The plurality of light sources 53 and the plurality of light sources 54 each emit light having different wavelengths.

[0017] First light emitted from the light sources 53 is mainly reflected on the surface of a detection target such as a finger, and then enters the sensor unit 10. Accordingly, the sensor unit 10 can detect a fingerprint by detecting the uneven shape of the surface of a finger or the like. Second light emitted from the light sources 54 is mainly reflected inside a finger or the like, or transmits through the finger or the like, before entering the sensor unit 10. Accordingly, the sensor unit 10 can detect biological information from inside a finger or the like. Examples of the biological information include pulse waves of fingers or palms, pulses, and blood vessel images. That is, the detection device 1 may be configured as a fingerprint detection device that detects fingerprints or a vein detection device that detects blood vessel patterns such as veins.

[0018] Note that the arrangement of light sources 53 and 54 shown in Figure 1 is merely an example and can be changed as appropriate. The detection device 1 is provided with multiple types of light sources 53 and 54. However, it is not limited to this, and there may be only one type of light source. For example, multiple light sources 53 and multiple light sources 54 may be arranged on each of the first light source substrate 51 and the second light source substrate 52. Also, there may be one or more light source substrates on which light sources 53 and light sources 54 are provided. Alternatively, it is sufficient to have at least one light source.

[0019] Figure 2 is a block diagram showing an example configuration of a detection device according to the first embodiment. As shown in Figure 2, the detection device 1 further comprises a detection control circuit 11 and a detection unit (Detection signal processing circuit) 40 and, of It has. Some or all of the functions of the detection control circuit 11 are included in the control circuit 122. Also, some or all of the functions of the detection unit 40 other than the detection circuit 48 are included in the control circuit 122.

[0020] The sensor unit 10 has multiple photodiodes PD. The photodiodes PD of the sensor unit 10 output an electrical signal corresponding to the irradiated light as a detection signal Vdet to the signal line selection circuit 16. The sensor unit 10 also performs detection according to the gate drive signal VGL supplied from the gate line drive circuit 15.

[0021] The detection control circuit 11 is a circuit that supplies control signals to the gate line drive circuit 15, the signal line selection circuit 16, and the detection unit 40, respectively, and controls their operation. The detection control circuit 11 supplies various control signals such as the start signal STV and the clock signal CK to the gate line drive circuit 15. The detection control circuit 11 also supplies various control signals such as the selection signal ASW to the signal line selection circuit 16. Furthermore, the detection control circuit 11 supplies various control signals to the light sources 53 and 54 to control their illumination and de-illumination.

[0022] The gate line drive circuit 15 is a circuit that drives multiple gate lines GL (see Figure 3) based on various control signals. The gate line drive circuit 15 sequentially or simultaneously selects multiple gate lines GL and supplies a gate drive signal VGL to the selected gate lines GL. As a result, the gate line drive circuit 15 selects multiple photodiodes PD connected to the gate lines GL.

[0023] The signal line selection circuit 16 is a switch circuit that sequentially or simultaneously selects multiple signal lines SL (see Figure 3). The signal line selection circuit 16 is, for example, a multiplexer. Based on the selection signal ASW supplied from the detection control circuit 11, the signal line selection circuit 16 connects the selected signal line SL to the detection circuit 48. As a result, the signal line selection circuit 16 outputs the detection signal Vdet of the photodiode PD to the detection unit 40.

[0024] The detection unit 40 includes a detection circuit 48, a signal processing circuit 44, a coordinate extraction circuit 45, a storage circuit 46, and a detection timing control circuit 47. The detection timing control circuit 47 controls the detection circuit 48, the signal processing circuit 44, and the coordinate extraction circuit 45 to operate synchronously based on a control signal supplied from the detection control circuit 11.

[0025] The detection circuit 48 is, for example, an analog front-end circuit (AFE). The detection circuit 48 is a signal processing circuit that has at least the functions of a detection signal amplification circuit 42 and an A / D conversion circuit 43. The detection signal amplification circuit 42 amplifies the detection signal Vdet. The A / D conversion circuit 43 converts the analog signal output from the detection signal amplification circuit 42 into a digital signal.

[0026] The signal processing circuit 44 is a logic circuit that detects a predetermined physical quantity input to the sensor unit 10 based on the output signal of the detection circuit 48. When a finger touches or comes into close proximity to the detection surface, the signal processing circuit 44 can detect irregularities on the surface of the finger or palm based on the signal from the detection circuit 48. The signal processing circuit 44 can also detect biological information based on the signal from the detection circuit 48. This biological information includes, for example, vascular images of the finger or palm, pulse waves, pulse rate, blood oxygen concentration, etc.

[0027] The memory circuit 46 temporarily stores the signals calculated by the signal processing circuit 44. The memory circuit 46 may be, for example, a RAM (Random Access Memory), a register circuit, or the like.

[0028] The coordinate extraction circuit 45 is a logic circuit that determines the detection coordinates of surface irregularities of fingers, etc., when finger contact or proximity is detected in the signal processing circuit 44. The coordinate extraction circuit 45 is also a logic circuit that determines the detection coordinates of blood vessels in fingers and palms. The coordinate extraction circuit 45 combines the detection signals Vdet output from each photodiode PD of the sensor unit 10 to generate two-dimensional information indicating the shape of surface irregularities of fingers, etc., and two-dimensional information indicating the shape of blood vessels in fingers and palms. The coordinate extraction circuit 45 may also output the detection signal Vdet as the sensor output voltage Vo without calculating the detection coordinates.

[0029] Figure 3 is a circuit diagram showing a detection device according to the first embodiment. Figure 3 also shows the circuit configuration of the detection circuit 48. As shown in Figure 3, the sensor pixel PX includes a photodiode PD, a capacitive element Ca, and a drive transistor Tr. The capacitive element Ca is the capacitance (sensor capacitance) formed on the photodiode PD and is equivalently connected in parallel with the photodiode PD.

[0030] Figure 3 shows two gate lines GL(m) and GL(m+1) aligned in the second direction Dy, among multiple gate lines GL. It also shows two signal lines SL(n) and SL(n+1) aligned in the first direction Dx, among multiple signal lines SL. The sensor pixel PX is the region enclosed by the gate lines GL and the signal lines SL.

[0031] A drive transistor Tr is provided corresponding to each of the multiple photodiodes PD. The drive transistor Tr is composed of a thin-film transistor, and in this example, it is composed of an n-channel MOS (Metal Oxide Semiconductor) type TFT (Thin Film Transistor).

[0032] Each of the multiple gate lines GL is connected to the gate of a plurality of drive transistors Tr arranged in the first direction Dx. Each of the multiple signal lines SL is connected to either the source or the drain of a plurality of drive transistors Tr arranged in the second direction Dy. The other source or drain of the plurality of drive transistors Tr is connected to the anode and capacitive element Ca of the photodiode PD.

[0033] The photodiode PD is supplied with a sensor power supply signal VDDSNS from the power supply circuit 123 (see Figure 1). Additionally, the signal line SL and the capacitive element Ca are supplied with a sensor reference voltage COM, which is the initial potential of the signal line SL and the capacitive element Ca, via the reset transistor TrR from the power supply circuit 123.

[0034] During the exposure period, when light is shone onto the sensor pixel PX, a current flows through the photodiode PD in proportion to the amount of light, causing charge to accumulate in the capacitive element Ca. During the readout period, when the drive transistor Tr is turned on, a current flows through the signal line SL in proportion to the charge accumulated in the capacitive element Ca. The signal line SL is connected to the detection circuit 48 via the output transistor TrS of the signal line selection circuit 16. As a result, the detection device 1 can detect a signal corresponding to the amount of light shone onto the photodiode PD for each sensor pixel PX.

[0035] The detection circuit 48 is connected to the signal line SL when the switch SSW is turned on during the readout period. The detection signal amplification circuit 42 of the detection circuit 48 receives power supplied from the signal line SL. The flow according to the value of the current electric under pressureThe signal is converted and amplified. A reference potential (Vref) with a fixed potential is input to the non-inverting input (+) of the detection signal amplification circuit 42, and the signal line SL is connected to the inverting input (-). In this embodiment, the same signal as the sensor reference voltage COM is input as the reference potential (Vref) voltage. The control circuit 122 (see Figure 1) calculates the difference between the detection signal Vdet when light is irradiated and the detection signal Vdet when light is not irradiated as the sensor output voltage Vo. The detection signal amplification circuit 42 also has a capacitive element Cb and a reset switch RSW. During the reset period, the reset switch RSW is turned on, and the charge of the capacitive element Cb is reset.

[0036] Furthermore, the driving transistor Tr is not limited to an n-type TFT, but may be composed of a p-type TFT. Also, the pixel circuit of the sensor pixel PX shown in Figure 3 is merely an example, and the sensor pixel PX may be provided with multiple transistors corresponding to one photodiode PD.

[0037] Next, the configuration of the photodiode PD will be described. Figure 4 is an enlarged schematic diagram of the sensor section. As shown in Figure 4, the detection device 1 has a plurality of photodiodes PD provided on the sensor substrate 21 and an insulating film 35. The plurality of gate lines GL each extend in the first direction Dx and are arranged with spacing in the second direction Dy. The plurality of signal lines SL each extend in the second direction Dy and are arranged with spacing in the first direction Dx. The plurality of photodiodes PD are provided in the region enclosed by two gate lines GL and two signal lines SL, and are arranged in a matrix on the sensor substrate 21.

[0038] Furthermore, the lower electrodes 23 of the photodiode PD are arranged in a matrix on the sensor substrate 21, corresponding to each of the multiple photodiode PDs. In the example shown in Figure 4, the right and bottom edges of the lower electrodes 23 overlap with a portion of the signal line SL and the gate line GL, respectively. The left and top edges of the lower electrodes 23 are spaced apart from the signal line SL and the gate line GL, respectively. This allows for a larger area of ​​the lower electrodes 23 in the region enclosed by the two gate lines GL and the two signal lines SL, thereby improving the detection sensitivity of the photodiode PD.

[0039] The drive transistor Tr is provided in a region that overlaps with the lower electrode 23 of the photodiode PD. Specifically, the drive transistor Tr has a semiconductor layer 61, a source electrode 62, a drain electrode 63, and a gate electrode 64. The semiconductor layer 61 extends along the gate line GL and is provided intersecting the gate electrode 64 in a plan view. The gate electrode 64 is connected to the gate line GL and extends in a direction perpendicular to the gate line GL (second direction Dy).

[0040] One end of the semiconductor layer 61 is connected to the source electrode 62 via a contact hole CH2. The source electrode 62 is connected to a connection wire 65 and a connection pad 66, and is led out to the center of the photodiode PD (lower electrode 23). The lower electrode 23 is connected to the connection pad 66 via a contact hole CH1 in the center. With this configuration, the source electrode 62 of the drive transistor Tr is electrically connected to the photodiode PD. The other end of the semiconductor layer 61 is connected to the drain electrode 63 via a contact hole CH3. The drain electrode 63 is connected to the signal line SL.

[0041] The insulating film 35 is provided between the lower electrodes 23 adjacent to the first direction Dx and the second direction Dy, and covers the peripheral edges of the lower electrodes 23. More specifically, the insulating film 35 is formed in a grid pattern by the intersection of a first extending portion 35a and a second extending portion 35b. The first extending portion 35a extends in the second direction Dy. The first extending portion 35a is provided overlapping with the signal line SL and extends along the signal line SL. The second extending portion 35b extends in the first direction Dx. The second extending portion 35b is provided overlapping with the gate line GL and extends along the gate line GL.

[0042] In other words, an opening OP is formed in the insulating film 35 in a region that overlaps with each of the multiple lower electrodes 23. The opening OP is a region enclosed by two first extending portions 35a and two second extending portions 35b. The island-shaped portion 35c is provided at a distance from the first extending portions 35a and the second extending portions 35b, and is located in the region that overlaps with the contact hole CH1 in the central part of the photodiode PD (lower electrode 23).

[0043] Note that the shape and arrangement pitch of the lower electrode 23 and insulating film 35 shown in Figure 4 are merely examples and can be appropriately modified according to the characteristics and detection accuracy required for the detection device 1.

[0044] Figure 5 is a cross-sectional view taken along line V-V' in Figure 4. As shown in Figure 5, the detection device 1 is constructed by laminating a circuit forming layer 29, an insulating film 27, a photodiode PD, and a sealing film 90 on a sensor substrate 21 in that order. The sensor substrate 21 is an insulating substrate, and for example, a glass substrate such as quartz or alkali-free glass can be used. The sensor substrate 21 is not limited to a flat plate shape and may have a curved surface. In this case, the sensor substrate 21 may be a film-like resin material.

[0045] The circuit formation layer 29 is provided on the sensor substrate 21 and is a layer on which various transistors such as the drive transistor Tr shown in Figures 3 and 4, and various wirings such as gate lines GL and signal lines SL are formed. Figure 5 illustrates the signal line SL connected to the drive transistor Tr. The insulating film 27 covers the signal line SL and is provided on the circuit formation layer 29 including the drive transistor Tr. The insulating film 27 is an organic planarization film formed of an organic insulating material.

[0046] The insulating film 28 is provided on top of the insulating film 27. The insulating film 28 is a barrier film formed of an inorganic insulating material such as silicon nitride (SiN).

[0047] The photodiode PD and insulating film 35 are provided on the insulating film 28. More specifically, the photodiode PD has a lower electrode 23, a lower buffer layer 32, an active layer 31, an upper buffer layer 33, and an upper electrode 24. The photodiode PD is stacked in the order of lower electrode 23, lower buffer layer 32 (hole transport layer), active layer 31, upper buffer layer 33 (electron transport layer), and upper electrode 24 in a direction perpendicular to the sensor substrate 21. The photodiode PD of this embodiment is an OPD (Organic Photodiode) in which an organic semiconductor is used as the active layer 31.

[0048] The lower electrode 23 is the anode electrode of the photodiode PD and is formed of a light-transmitting conductive material such as ITO (Indium Tin Oxide). The lower electrode 23 is provided spaced apart from each photodiode PD. The lower buffer layer 32, active layer 31, upper buffer layer 33, and upper electrode 24 are provided continuously across multiple photodiodes PD. Specifically, the lower buffer layer 32, active layer 31, upper buffer layer 33, and upper electrode 24 are provided overlapping the lower electrode 23 of adjacent photodiodes PD-1 and PD-2, and also overlapping the insulating film 35 between photodiodes PD-1 and PD-2.

[0049] The insulating film 35 (first extended portion 35a) is provided on the insulating film 28 between adjacent lower electrodes 23 and covers the peripheral edge of the lower electrodes 23. In this embodiment, the insulating film 35 is formed of an inorganic insulating material such as silicon nitride (SiN) or silicon oxide (SiO2). The insulating film 35 (first extended portion 35a) insulates the lower electrodes 23 of adjacent photodiodes PD. The detailed configuration of the insulating film 35 will be described later in Figures 6 and 7.

[0050] Furthermore, the contact hole CH1 is provided in the central part of the lower electrode 23, penetrating the insulating film 27 in the thickness direction (third direction Dz). The lower electrode 23 is connected to the connection pad 66 at the bottom of the contact hole CH1. The island-shaped portion 35c is provided covering the contact hole CH1 and covers the lower electrode 23 inside the contact hole CH1. In a plan view, the island-shaped portion 35c overlaps with the connection pad 66. With this configuration, even if a step break occurs in the lower buffer layer 32 (hole transport layer) inside the contact hole CH1, the presence of the island-shaped portion 35c can suppress the occurrence of a short circuit between the active layer 31 and the lower electrode 23.

[0051] The active layer 31 changes its properties (e.g., voltage-current characteristics and resistance) depending on the light it is irradiated with. Organic materials are used as the material for the active layer 31. Specifically, the active layer 31 is a bulk heterostructure in which a p-type organic semiconductor and an n-type organic semiconductor, an n-type fullerene derivative (PCBM), are mixed. Examples of low molecular weight organic materials that can be used for the active layer 31 include C60 (fullerene), PCBM (phenyl C61-butyric acid methyl ester), CuPc (copper phthalocyanine), F16CuPc (fluorinated copper phthalocyanine), rubrene (5,6,11,12-tetraphenyltetracene), and PDI (derivative of perylene).

[0052] The active layer 31 can be formed by vapor deposition (Dry Process) using these low-molecular-weight organic materials. In this case, the active layer 31 may be, for example, a laminated film of CuPc and F16CuPc, or a laminated film of rubrene and C60. The active layer 31 can also be formed by coating (Wet Process). In this case, the active layer 31 uses a material that combines the low-molecular-weight organic material and the polymeric organic material described above. As the polymeric organic material, for example, P3HT (poly(3-hexylthiophene)), F8BT (F8-alt-benzothiadiazole), etc. can be used. The active layer 31 can be a film in which P3HT and PCBM are mixed, or a film in which F8BT and PDI are mixed.

[0053] The lower buffer layer 32 is a hole transport layer, and the upper buffer layer 33 is an electron transport layer. The lower buffer layer 32 and the upper buffer layer 33 are provided to facilitate the arrival of holes and electrons generated in the active layer 31 at the lower electrode 23 or the upper electrode 24. The lower buffer layer 32 (hole transport layer) is in direct contact with the lower electrode 23 and is also provided in the insulating film 35 between adjacent lower electrodes 23. The active layer 31 is in direct contact with the lower buffer layer 32. The material of the hole transport layer is a metal oxide layer. Examples of metal oxide layers used include tungsten oxide (WO3) and molybdenum oxide.

[0054] The upper buffer layer 33 (electron transport layer) is in direct contact with the active layer 31, and the upper electrode 24 is in direct contact with the upper buffer layer 33. The electron transport layer is made of ethoxylated polyethyleneimine (PEIE).

[0055] The materials and manufacturing methods for the lower buffer layer 32, the active layer 31, and the upper buffer layer 33 are merely examples, and other materials and manufacturing methods may be used. For example, the lower buffer layer 32 and the upper buffer layer 33 are not limited to single layers, but may be formed as laminated films including an electron blocking layer and a hole blocking layer.

[0056] The upper electrode 24 is provided on the upper buffer layer 33. The upper electrode 24 is the cathode electrode of the photodiode PD and is formed continuously over the entire detection region AA. In other words, the upper electrode 24 is provided continuously on multiple photodiodes PD. The upper electrode 24 faces multiple lower electrodes 23, with the lower buffer layer 32, the active layer 31, and the upper buffer layer 33 in between. The upper electrode 24 is formed of a translucent conductive material such as ITO or IZO. The upper electrode 24 may also be a laminated film of multiple translucent conductive materials.

[0057] The sealing film 90 is provided on the upper electrode 24. The sealing film 90 can be an inorganic film such as a silicon nitride film or an aluminum oxide film, or a resin film such as acrylic. The sealing film 90 is not limited to a single layer, but may be a laminated film of two or more layers combining the above-mentioned inorganic films and resin films. The photodiode PD is well sealed by the sealing film 90, and the intrusion of moisture from the upper side can be suppressed.

[0058] Note that the configuration of the photodiode PD shown in Figures 4 and 5 is merely an example and can be modified as appropriate. For example, the upper electrode 24 may be the anode electrode of the photodiode PD and the lower electrode 23 may be the cathode electrode of the photodiode PD.

[0059] Next, the detailed configuration of the insulating film 35, the lower electrode 23, and the lower buffer layer 32 will be described. Figure 6 is a schematic plan view showing the arrangement of the lower electrode and the insulating film. Figure 7 is a cross-sectional view taken along line VII-VII' in Figure 6. In Figure 6, the insulating film 35 is hatched to improve visibility. Figure 7 is also a cross-sectional view showing an enlarged view of region A, indicated by the dashed line in Figure 5.

[0060] As shown in Figure 6, the insulating film 35 is provided in a grid pattern covering the periphery of the lower electrode 23. The first extending portion 35a is provided between adjacent lower electrodes 23 in the first direction Dx and extends in the second direction Dy along the edge of the lower electrode 23. The second extending portion 35b is provided between adjacent lower electrodes 23 in the second direction Dy and extends in the first direction Dx along the edge of the lower electrode 23.

[0061] The insulating film 35 (first extended portion 35a and second extended portion 35b) has a plurality of grooves 35G that extend along the sides of the lower electrodes 23 between a plurality of adjacent lower electrodes 23. The grooves 35G are located between adjacent lower electrodes 23 and are provided surrounding the lower electrodes 23 in a plan view.

[0062] As shown in Figures 6 and 7, in this embodiment, two grooves 35G are provided between adjacent lower electrodes 23. The two grooves 35G extend along the respective extension directions of the first extension portion 35a and the second extension portion 35b, and are provided adjacent to each other in the respective width directions of the first extension portion 35a and the second extension portion 35b. In other words, between adjacent lower electrodes 23, the insulating film 35 (first extension portion 35a and second extension portion 35b) is separated into three parts by the two grooves 35G.

[0063] Specifically, in photodiodes PD-1 and PD-2 adjacent to each other in the first direction Dx, the insulating film 35 has electrode edge overlapping portions 35e and 35g separated by two groove portions 35G, and a protrusion 35f. The electrode edge overlapping portion 35e is provided superimposed on the edge of the lower electrode 23 of photodiode PD-1 and extends along the edge of the lower electrode 23 (right edge in Figure 6). The electrode edge overlapping portion 35g is provided superimposed on the edge of the lower electrode 23 of photodiode PD-2 (left edge in Figure 6) and extends along the edge of the lower electrode 23. The protrusion 35f is located between the two groove portions 35G and extends along the electrode edge overlapping portions 35e and 35g.

[0064] The electrode edge overlapping portions 35e and 35g each overlap with the four sides of the lower electrode 23, forming a frame-like structure that surrounds the lower electrode 23. The protrusions 35f are positioned between the lower electrodes 23 at locations where they do not overlap with the lower electrodes 23. The protrusions 35f are arranged in a grid pattern, surrounding each of the lower electrodes 23 which are arranged in a matrix.

[0065] The width of the protrusion 35f (width in the first direction Dx) is smaller than the width of the multiple grooves 35G (width in the first direction Dx), and also smaller than the spacing between the multiple adjacent lower electrodes 23. Furthermore, the thickness of the insulating film 35 (electrode edge overlapping portions 35e, 35g and protrusion 35f) provided between the multiple adjacent lower electrodes 23 is, for example, 20 nm to 200 nm. Also, the film thickness of the lower electrode 23 is, for example, 20 nm to 100 nm.

[0066] As shown in Figure 7, the lower buffer layer 32 covers at least a portion of the lower electrode 23 of photodiode PD-1, the lower electrode 23 of photodiode PD-2, and the insulating film 35 adjacent in the first direction Dx, and is also provided inside the two grooves 35G. More specifically, the lower buffer layer 32 includes an electrode overlap portion 32a that overlaps the lower electrode 23, insulating film overlap portions 32b, 32c, and 32d that overlap at least a portion of the insulating film 35, and a groove overlap portion 32e provided on the insulating film 28 inside the groove 35G.

[0067] The electrode superposition portion 32a is provided in the region of the lower electrode 23 where the insulating film 35 is not provided (opening OP (see Figure 4)). The insulating film superposition portion 32b is provided on the electrode edge superposition portion 35e of the insulating film 35. The insulating film superposition portion 32c is provided on the convex portion 35f of the insulating film 35. The insulating film superposition portion 32d is provided on the electrode edge superposition portion 35g of the insulating film 35.

[0068] In this embodiment, the lower buffer layer 32 is formed by covering the lower electrode 23 and the insulating film 35, for example, by a coating method. As a result, the lower buffer layer 32 tends to accumulate in the recesses formed by the groove 35G, the protrusion 35f, and the electrode edge overlapping portions 35e and 35g, and also in the recesses formed by the lower electrode 23 and the electrode edge overlapping portions 35e and 35g of the insulating film 35 (i.e., the region overlapping with the opening OP (see Figure 4)). On the other hand, the lower buffer layer 32 coated on the insulating film 35 is formed thinly by flowing from above the insulating film 35 towards the groove 35G side or towards the lower electrode 23 side.

[0069] As a result, in this embodiment, the thicknesses t2, t3, and t4 of the insulating film superimposed portions 32b, 32c, and 32d of the lower buffer layer 32 are thinner than the thickness t1 of the electrode superimposed portion 32a of the lower buffer layer 32. Also, the thicknesses t2, t3, and t4 of the insulating film superimposed portions 32b, 32c, and 32d of the lower buffer layer 32 are thinner than the thickness t5 of the groove superimposed portion 32e of the lower buffer layer 32.

[0070] With this configuration, the insulating film superimposed portions 32b, 32c, and 32d of the lower buffer layer 32 located between adjacent lower electrodes 23 have a higher resistance value than the electrode superimposed portion 32a. Therefore, the lower buffer layer 32 (insulating film superimposed portions 32b, 32c, and 32d) in the region overlapping with the insulating film 35 functions as a potential barrier between adjacent lower electrodes 23. Consequently, in this embodiment, leakage current flowing between adjacent lower electrodes 23 can be suppressed compared to the case where the lower buffer layer 32 is continuously provided with a constant thickness across a plurality of adjacent photodiodes PD.

[0071] Furthermore, the lower buffer layer 32 provided on the insulating film 35 has a step-like discontinuity formed by the grooves 35G and protrusions 35f, etc. Specifically, the lower buffer layer 32 (insulating film superimposed portion 32c) provided on the protrusions 35f of the insulating film 35 is provided at a distance from the lower buffer layer 32 (groove superimposed portion 32e) provided on the grooves 35G. The lower buffer layer 32 (insulating film superimposed portions 32b, 32d) provided on the electrode edge superimposed portion 35e of the insulating film 35 is provided at a distance from the lower buffer layer 32 (groove superimposed portion 32e) provided on the grooves 35G. As described above, the width of the protrusions 35f of the insulating film 35 (width in the first direction Dx) is formed to be smaller than the width of the multiple grooves 35G (width in the first direction Dx), so a good step-like discontinuity can be created between the insulating film superimposed portion 32c and the groove superimposed portion 32e.

[0072] As a result, in adjacent photodiodes PD (for example, photodiodes PD-1 and PD-2), a separated and discontinuous portion is formed between the lower buffer layer 32 provided on photodiode PD-1 and the lower buffer layer 32 provided on photodiode PD-2. This allows the detection device 1 to effectively suppress leakage current flowing between adjacent lower electrodes 23.

[0073] Furthermore, because the insulating film 35 forms the insulating film superposition portions 32b, 32c, and 32d of the lower buffer layer 32 as high-resistance regions, the spacing between the lower electrodes 23 (or the width of the insulating film 35) can be reduced compared to the case where the thickness of the electrode superposition portion 32a and the thickness of the insulating film superposition portions 32b, 32c, and 32d of the lower buffer layer 32 are formed with a constant thickness. This allows the effective detection area AA of the detection device 1 to be increased, thereby improving the detection sensitivity. Alternatively, the area of ​​the lower electrodes 23 can be reduced, allowing the detection device 1 to achieve higher resolution.

[0074] Furthermore, in this embodiment, the spacing of the lower electrodes 23 (or the width of the insulating film 35) can be reduced, thereby suppressing the occurrence of delays in the arrival time of carriers (holes and electrons) generated in the active layer 31 between the portion overlapping with the insulating film 35 of the photodiode PD and the portion not overlapping with the insulating film 35 of the photodiode PD.

[0075] Note that the configurations of the insulating film 35 and the lower buffer layer 32 shown in Figures 6 and 7 are merely examples and can be modified as appropriate. For example, the insulating film 35 has two grooves 35G between adjacent lower electrodes 23, but is not limited to this. One or more grooves 35G may be provided between adjacent lower electrodes 23. Also, the insulating film 35 does not need to have grooves 35G. Even in this case, the thicknesses t2 and t4 of the insulating film superimposed portions 32b and 32d of the lower buffer layer 32 are formed to be thinner than the thickness t1 of the electrode superimposed portion 32a of the lower buffer layer 32. Therefore, the detection device 1 can suppress leakage current flowing between adjacent lower electrodes 23 even when grooves 35G are not provided in the insulating film 35.

[0076] Furthermore, as shown in Figure 6, the electrode edge overlapping portions 35e and 35g of the insulating film 35 are provided continuously surrounding the lower electrode 23. The convex portion 35f of the insulating film 35 is provided continuously across multiple lower electrodes 23. However, it is not limited to this, and the electrode edge overlapping portions 35e and 35g and the convex portion 35f may each be formed separately in multiple parts.

[0077] As shown in Figure 7, the lower buffer layer 32 is provided superimposed on the electrode edge overlap portions 35e, 35g, and protrusions 35f of the insulating film 35. However, it is not limited to this, and the lower buffer layer 32 does not have to be provided on a part of the insulating film 35. For example, the lower buffer layer 32 may be provided on the electrode edge overlap portions 35e, 35g of the insulating film 35, but not on the protrusions 35f (i.e., thickness t3 = 0 nm).

[0078] (Second Embodiment) Figure 8 is a schematic plan view showing the arrangement of the lower electrode and the insulating film in the detection device according to the second embodiment. Figure 9 is a cross-sectional view taken along line IX-IX' in Figure 8. In Figure 8, hatching is used to indicate the insulating film 35 and the wall portion 26 for clarity. In the following description, the same reference numerals are used for components that were described in the above-described embodiment, and redundant explanations are omitted.

[0079] As shown in Figure 8, in the detection device 1A according to the second embodiment, the insulating film 35 is provided continuously between adjacent lower electrodes 23 without having grooves 35G. The detection device 1A also has wall portions 26 provided between multiple adjacent lower electrodes 23, spaced apart from the multiple lower electrodes 23. The wall portions 26 extend along the sides of the lower electrodes 23 and surround the lower electrodes 23 in a plan view. The wall portions 26 also overlap with the insulating film 35 and extend along the direction of extension of the insulating film 35. In the example shown in Figure 8, two wall portions 26 are provided between multiple adjacent lower electrodes 23.

[0080] As shown in Figure 9, the two wall portions 26 are provided on the insulating film 28 in the same layer as the multiple lower electrodes 23 and are formed of the same material as the multiple lower electrodes 23. The two wall portions 26 are formed of a translucent conductive material such as ITO. The thickness of each wall portion 26 is, for example, 20 nm to 100 nm.

[0081] The insulating film 35 is provided between a plurality of adjacent lower electrodes 23, covering the two wall portions 26. The insulating film 35 is provided along the irregularities formed by the plurality of lower electrodes 23 and the two wall portions 26, and is formed having a plurality of irregularities. Specifically, in photodiodes PD-1 and PD-2 adjacent in the first direction Dx, the insulating film 35 has electrode edge overlap portions 35e and 35g and two protrusions 35h.

[0082] The electrode edge overlap portion 35e is provided superimposed on the edge of the lower electrode 23 of photodiode PD-1 (the right edge in Figure 8) and extends along the edge of the lower electrode 23. The electrode edge overlap portion 35g is provided superimposed on the edge of the lower electrode 23 of photodiode PD-2 (the left edge in Figure 8) and extends along the edge of the lower electrode 23. The protrusions 35h are provided superimposed on the two wall portions 26 and extend along the electrode edge overlap portions 35e and 35g.

[0083] Electrode edge overlap portion 35 of insulating film 35 e Recesses 35i of the insulating film 35 are formed between the protrusion 35h and the protrusion 35h, between two adjacent protrusions 35h, and between the protrusion 35h and the electrode edge overlapping portion 35g.

[0084] The lower buffer layer 32 is provided so as to cover at least a portion of the lower electrode 23 of photodiode PD-1, the lower electrode 23 of photodiode PD-2, and the insulating film 35 adjacent in the first direction Dx. More specifically, the lower buffer layer 32 includes an electrode overlap portion 32a that overlaps the lower electrode 23, insulating film overlap portions 32b and 32d that overlap the electrode edge overlap portions 35e and 35g of the insulating film 35, respectively, and a recess overlap portion 32f provided inside the recess 35i.

[0085] In Figure 9, the lower buffer layer 32 is not provided on the two protrusions 35h. However, similar to the insulating film superimposed portion 32c shown in Figure 7, the lower buffer layer 32 may be provided on the two protrusions 35h.

[0086] In this embodiment as well, the thicknesses t2 and t4 of the insulating film superimposed portions 32b and 32d of the lower buffer layer 32 are thinner than the thickness t1 of the electrode superimposed portion 32a of the lower buffer layer 32. Furthermore, the thicknesses t2 and t4 of the insulating film superimposed portions 32b and 32d of the lower buffer layer 32 are thinner than the thickness t5 of the recessed superimposed portion 32f of the lower buffer layer 32.

[0087] Furthermore, since the lower buffer layer 32 is not provided on the two protrusions 35h of the insulating film 35, the recessed superimposed portions 32f provided on each of the two recesses 35i are separated by the protrusions 35h. Note that, similar to the insulating film superimposed portion 32c shown in Figure 7, even when the lower buffer layer 32 is provided on the two protrusions 35h, the lower buffer layer 32 provided on the protrusions 35h and the recessed superimposed portion 32f of the recesses 35i are separated. In other words, the lower buffer layer 32 is stepped at the protrusions 35h and the recesses 35i.

[0088] With this configuration, in the second embodiment as well, the insulating film superimposed portions 32b and 32d of the lower buffer layer 32 located between adjacent lower electrodes 23 have a higher resistance value than the electrode superimposed portion 32a. Furthermore, the lower buffer layer 32 provided on the insulating film 35 has stepped sections formed by protrusions 35h and recesses 35i, etc. As a result, leakage current flowing between adjacent lower electrodes 23 can be suppressed in this embodiment as well.

[0089] (Third embodiment) Figure 10 is a schematic plan view showing the arrangement relationship between the lower electrode and the insulating film of the detection device according to the third embodiment. Figure 11 is a cross-sectional view taken along line XI-XI' in Figure 10.

[0090] As shown in Figures 10 and 11, the detection device 1B according to the third embodiment has an organic insulating film 36 instead of an insulating film 35 made of an inorganic insulating material. The organic insulating film 36 may be made of the same organic insulating material as the insulating film 27, for example. The organic insulating film 36 is provided between the lower electrodes 23 adjacent to the first direction Dx and the second direction Dy, and covers the peripheral edge of the lower electrodes 23.

[0091] More specifically, the organic insulating film 36 is formed in a grid pattern by the intersection of a first extending portion 36a and a second extending portion 36b. The first extending portion 36a is provided between adjacent lower electrodes 23 in the first direction Dx and extends in the second direction Dy along the edges of the lower electrodes 23. The second extending portion 36b is provided between adjacent lower electrodes 23 in the second direction Dy and extends in the first direction Dx along the edges of the lower electrodes 23.

[0092] Furthermore, the organic insulating film 36 includes island-shaped portions 36c provided at a distance from the first extended portion 36a and the second extended portion 36b. The island-shaped portions 36c are provided in the central part of the photodiode PD (lower electrode 23) in the region overlapping with the contact hole CH1 (see Figure 5). Note that the island-shaped portions 36c are not limited to organic insulating films and may be formed of inorganic insulating films.

[0093] As shown in Figure 11, the height (thickness) of the organic insulating film 36 is greater than the height (film thickness) of the insulating film 35 formed from the inorganic insulating material described above. As a result, the lower buffer layers 32 of adjacent photodiodes PD-1 and PD-2 are separated by the organic insulating film 36. More specifically, the outer edge 32g of the lower buffer layer 32 of photodiode PD-1 is positioned to overlap the inclined surface of the organic insulating film 36. The outer edge 32h of the lower buffer layer 32 of photodiode PD-2 is positioned to overlap the inclined surface of the organic insulating film 36 on the opposite side from the outer edge 32g. The lower buffer layer 32 is not provided at least at the top of the organic insulating film 36. In other words, the lower buffer layer 32 is provided within the region enclosed by the first extended portion 36a and the second extended portion 36b of the organic insulating film 36.

[0094] With this configuration, in the third embodiment, the lower buffer layer 32 is provided separated from each of the multiple photodiodes PD (lower electrodes 23) by an organic insulating film 36. As a result, in this embodiment as well, leakage current flowing between adjacent lower electrodes 23 can be suppressed compared to the case where the lower buffer layer 32 is provided continuously across multiple adjacent photodiodes PD.

[0095] (Fourth embodiment) Figure 12 is a schematic cross-sectional view showing a detection device according to the fourth embodiment. As shown in Figure 12, in the detection device 1C according to the fourth embodiment, the insulating film 35 is a laminated film in which a first insulating film 37 and a second insulating film 38 are laminated. The second insulating film 38 is laminated on top of the first insulating film 37. The first insulating film 37 is formed of, for example, a silicon oxide film, and the second insulating film 38 is formed of a different material from the first insulating film 37, for example, a silicon nitride film.

[0096] The insulating film 35 has grooves 35G that penetrate the first insulating film 37 and the second insulating film 38 in the thickness direction (third direction Dz). The configuration of the insulating film 35 and the grooves 35G in plan view is the same as in the first embodiment described above (see Figure 6), so a repeated explanation will be omitted.

[0097] In this embodiment, the ends of the insulating film 35 (the ends in the first direction Dx of the electrode edge overlap portions 35e and 35g that overlap with the edges of the lower electrode 23) each have an inverse tapered shape. More specifically, the end 38a of the second insulating film 38 is provided to protrude in the first direction Dx more than the end 37a of the first insulating film 37. The end 38a of the second insulating film 38 is provided in a canopy shape relative to the end 37a of the first insulating film 37.

[0098] Furthermore, the inner walls of the grooves 35G also have an inverse tapered shape. In the grooves 35G, the end portion 38b of the second insulating film 38 protrudes more than the end portion 37b of the first insulating film 37. In other words, in the grooves 35G, the distance between the inner walls of the second insulating film 38 facing each other in the first direction Dx is smaller than the distance between the inner walls of the first insulating film 37 facing each other in the first direction Dx.

[0099] The inverse tapered shape of the insulating film 35 can be formed by taking advantage of the difference in etching rates between the first insulating film 37 and the second insulating film 38 when patterning the first insulating film 37 and the second insulating film 38 by photolithography and etching. For example, in the example shown in Figure 12, the etching rate of the first insulating film 37 is greater than that of the second insulating film 38.

[0100] In this embodiment, at the end of the insulating film 35 (electrode edge overlapping portions 35e, 35g), a space is formed surrounded by the overhanging end portion 38a of the second insulating film 38, the end portion 37a of the first insulating film 37, and the lower electrode 23. The electrode overlapping portion 32a of the lower buffer layer 32 is also provided extending into the space surrounded by the end portion 37a of the first insulating film 37, the end portion 38a of the second insulating film 38, and the lower electrode 23. This makes it easier for the electrode overlapping portion 32a and the insulating film overlapping portion 32b of the lower buffer layer 32 to be stepped.

[0101] Furthermore, in the groove 35G, a space is formed surrounded by the end portion 38b of the second insulating film 38, the end portion 37b of the first insulating film 37, and the insulating film 28. The groove overlap portion 32e of the lower buffer layer 32 is also provided inside the space surrounded by the end portion 38b of the second insulating film 38, the end portion 37b of the first insulating film 37, and the insulating film 28.

[0102] As a result, the groove portion 35G is formed in a straight shape, and the space of the groove portion 35G is larger compared to a configuration in which it is not formed in a reverse tapered shape (see Figure 7). As a result, the groove portion overlapping portion 32e and the insulating film overlapping portion 32b of the lower buffer layer 32 are more prone to step breakage. In this embodiment as well, the thicknesses t2 and t4 of the insulating film overlapping portions 32b and 32d of the lower buffer layer 32 are thinner than the thickness t1 of the electrode overlapping portion 32a of the lower buffer layer 32. Also, the thicknesses t2 and t4 of the insulating film overlapping portions 32b and 32d of the lower buffer layer 32 are thinner than the thickness t5 of the groove portion overlapping portion 32e of the lower buffer layer 32.

[0103] In this embodiment, the lower buffer layer 32 is not provided on the second insulating film 38 of the protrusion 35f. However, similar to the insulating film superposition portion 32c shown in Figure 7, the lower buffer layer 32 may be provided on the second insulating film 38 of the protrusion 35f. Even in this case, since the groove portion 35G is formed in an inverse tapered shape, the lower buffer layer 32 provided on the protrusion 35f and the groove portion superposition portion 32e of the groove portion 35G are provided at a distance from each other. That is, the lower buffer layer 32 is stepped at the protrusion 35f and the groove portion 35G.

[0104] (modified version) Figure 13 is a schematic cross-sectional view showing a modified detection device according to the fourth embodiment. As shown in Figure 13, the detection device 1D according to the modified fourth embodiment differs from the detection device 1C according to the fourth embodiment (see Figure 12) described above in that it does not have a groove 35G.

[0105] As shown in Figure 13, in the detection device 1D according to a modified example of the fourth embodiment, the insulating film 35 (first insulating film 37 and second insulating film 38) is provided continuously between adjacent lower electrodes 23. Furthermore, the ends of the insulating film 35 (electrode edge overlapping portions 35e and 35g) are each formed in an inverse tapered shape. More specifically, the end portion 38a of the second insulating film 38 is formed in an inverse tapered shape, protruding in the first direction Dx more than the end portion 37a of the first insulating film 37.

[0106] As a result, at least the electrode superimposed portion 32a and the insulating film superimposed portions 32b and 32d of the lower buffer layer 32 are more easily separated and provided at a distance from each other. Furthermore, in this modified example as well, the thicknesses t2 and t4 of the insulating film superimposed portions 32b and 32d of the lower buffer layer 32 are thinner than the thickness t1 of the electrode superimposed portion 32a of the lower buffer layer 32. Therefore, even in this modified example where the groove portion 35G is not provided, the leakage current flowing between adjacent lower electrodes 23 can be suppressed.

[0107] Although preferred embodiments of the present invention have been described above, the present invention is not limited to these embodiments. The contents disclosed in the embodiments are merely examples, and various modifications are possible without departing from the spirit of the present invention. Appropriate modifications made without departing from the spirit of the present invention naturally fall within the technical scope of the present invention. At least one of various omissions, substitutions, and modifications of components can be made without departing from the gist of each of the embodiments and modifications described above. [Explanation of Symbols]

[0108] 1, 1A, 1B, 1C, 1D detection devices 10 Sensor section 21 Sensor substrate 23 Lower electrode 24 Upper electrode 26 Wall 27, 28 Insulating film 31 Active layer 32 Lower buffer layer 32a Electrode superposition area 32b, 32c, 32d Insulating film superposition 33 Upper buffer layer 35 Insulating film 35a, 36a 1st extension part 35b, 36b 2nd extension part 35c, 36c islands 35e, 35g electrode edge overlapping area 35f, 35h convex part 35i recess 36 Organic insulating film 37 First insulating film 38. Second insulating film 37a, 38a end 90 Sealing film PD, PD-1, PD-2 photodiodes AA detection area GA related fields

Claims

1. circuit board and A plurality of photodiodes are stacked on the substrate in the order of lower electrode, lower buffer layer, active layer, upper buffer layer, and upper electrode, It has an insulating film provided between a plurality of adjacent lower electrodes, The lower buffer layer includes an electrode superimposed portion that overlaps the lower electrode and an insulating film superimposed portion that overlaps at least a part of the insulating film, The thickness of the insulating film superimposed portion of the lower buffer layer is thinner than the thickness of the electrode superimposed portion of the lower buffer layer. The insulating film has grooves that extend along the sides of the multiple lower electrodes between adjacent lower electrodes. Detection device.

2. A substrate and A plurality of photodiodes are stacked on the substrate in the order of lower electrode, lower buffer layer, active layer, upper buffer layer, and upper electrode, It has an insulating film provided between a plurality of adjacent lower electrodes, The lower buffer layer includes an electrode superimposed portion that overlaps the lower electrode and an insulating film superimposed portion that overlaps at least a part of the insulating film. The thickness of the insulating film superimposed portion of the lower buffer layer is thinner than the thickness of the electrode superimposed portion of the lower buffer layer. The insulating film has a plurality of grooves extending along the sides of the plurality of lower electrodes between adjacent lower electrodes, and a protrusion located between the plurality of grooves. The lower buffer layer provided on the protrusion is provided at a distance from the lower buffer layer provided in the groove. Detection device.

3. A substrate and A plurality of photodiodes are stacked on the substrate in the order of lower electrode, lower buffer layer, active layer, upper buffer layer, and upper electrode, It has an insulating film provided between a plurality of adjacent lower electrodes, The lower buffer layer includes an electrode superimposed portion that overlaps the lower electrode and an insulating film superimposed portion that overlaps at least a part of the insulating film. The thickness of the insulating film superimposed portion of the lower buffer layer is thinner than the thickness of the electrode superimposed portion of the lower buffer layer. The insulating film comprises a first insulating film and a second insulating film provided on the first insulating film. The end of the second insulating film is provided to protrude more than the end of the first insulating film. Detection device.

4. The ends of the insulating film have an inverse tapered shape. The detection device according to claim 3.

5. The first insulating film is a silicon oxide film. The second insulating film is a silicon nitride film. The detection device according to claim 3.

6. The thickness of the insulating film superimposed portion of the lower buffer layer is thinner than the thickness of the lower buffer layer provided in the groove. The detection device according to claim 2.

7. The thickness of the insulating film provided between a plurality of adjacent lower electrodes is 20 nm or more and 200 nm or less. The detection device according to claim 1.

8. The width of the protrusion is smaller than the width of the multiple grooves and smaller than the distance between adjacent multiple lower electrodes. The detection device according to claim 2.

9. The aforementioned photodiode is an OPD (Organic Photodiode). A detection device according to any one of claims 1 to 8.

Images