Method for manufacturing an optoelectronic device comprising an LED and a photodiode.

Abstract

The present disclosure provides a method for manufacturing an optoelectronic device comprising an LED and a photodiode. The present disclosure relates to a method for manufacturing an optoelectronic device comprising at least one LED (L) and at least one photodiode (P). The method comprises the following successive steps: a) epitaxially forming an active semiconductor light-emitting / receiving stack (103) common to the LED and the photodiode; and b) forming trenches (120) extending vertically through the active stack (103) and laterally defining the LED (L) and the photodiode (P), the trenches being arranged such that the lateral dimensions of the LED (L) are smaller than the lateral dimensions of the photodiode (P).

Description

[Technical Field]

[0001] The present disclosure generally relates to the field of optoelectronic devices. More specifically, the present disclosure relates to the implementation of an optoelectronic device including at least one light-emitting diode (LED) and at least one photodiode. In particular, the present disclosure relates to the simultaneous implementation, by a common epitaxy step, of an active light-emitting stack of an LED and an active light-receiving stack of a photodiode, which are intended to operate in the same wavelength range. [Background Art]

[0002] For example, in the field of optical communication systems, devices have already been proposed that comprise one or more LEDs configured to emit optical signals and one or more photodiodes configured to receive and measure the signals emitted by the LEDs.

[0003] It is desirable to be able to at least partially improve several aspects of these systems.

[0004] In particular, it is desirable that the active light-emitting stack of an LED and the active light-receiving stack of a photodiode can be simultaneously implemented by a common epitaxy step. [Summary of the Invention]

[0005] For this purpose, one embodiment provides a method for manufacturing an optoelectronic device including at least one LED and at least one photodiode. The method comprises the following consecutive steps, namely: a) epitaxially forming an active semiconductor light-emitting and light-receiving stack common to the LED and the photodiode; b) forming a trench extending vertically through the active stack and laterally defining the LED and the photodiode wherein the trench is arranged such that the lateral dimension of the LED is smaller than the lateral dimension of the photodiode.

[0006] According to one embodiment, the trench is positioned such that the lateral dimension of the LED is at least half the lateral dimension of the photodiode.

[0007] According to one embodiment, the trench is arranged such that the lateral dimension of the LED is at least one-quarter the size of the lateral dimension of the photodiode.

[0008] According to one embodiment, the trenches are arranged such that the lateral dimension of the LED is less than 4 μm.

[0009] According to one embodiment, the method includes, between step a) and step b), the step of transferring and mounting the active stack to the semiconductor substrate and to the surface of a control integrated circuit that has been pre-formed on the semiconductor substrate.

[0010] According to one embodiment, during the transfer and mounting step, the active stack is attached to the surface of the control integrated circuit by molecular junctions.

[0011] According to one embodiment, at the end of the transfer and mounting step, the active stack extends continuously across the entire surface of the control integrated circuit.

[0012] According to one embodiment, the active semiconductor stack comprises one or more III-V or II-VI group semiconductor alloys.

[0013] Another embodiment provides an optoelectronic device comprising at least one LED and at least one photodiode, wherein the LED and photodiode each comprise an active semiconductor light-emitting and light-receiving stack of the same properties and composition, and the lateral dimension of the LED is smaller than the lateral dimension of the photodiode.

[0014] According to one embodiment, the device further comprises a control integrated circuit on which an LED and a photodiode are mounted on one side, and the control integrated circuit is adapted to drive the LED at a current density higher than the current density of the photodiode.

[0015] According to one embodiment, the control integrated circuit is adapted to drive the LED at a current density at least 10 times higher than the current density of the photodiode.

[0016] Another embodiment provides a method for manufacturing an optoelectronic device comprising at least one LED and at least one photodiode. The method comprises the following steps, namely: a) The step of forming a semiconductor support stack comprising at least one doped semiconductor layer, b) A common epitaxy step in which the active semiconductor light-emitting stack of the LED and the active semiconductor light-receiving stack of the photodiode are formed simultaneously, c) A step of forming a trench that extends vertically through the support stack and laterally defines at least one first support pad and at least one second support pad. Includes, At the end of steps b) and c), the LED active semiconductor light-emitting stack covers the first support pad, and the photodiode active light-receiving stack covers the second support pad. The method further includes, after step c), step d) making the doped semiconductor layer in the first support pad porous without making the doped semiconductor layer in the second support pad porous, or step d) making the doped semiconductor layer in the second support pad porous without making the doped semiconductor layer in the first support pad porous.

[0017] According to one embodiment, step c) forming trenches through the support stack and step d) making the doped semiconductor layer porous are performed before step b) epitaxially growing the active light-emitting semiconductor stack of the LED and the active photodetector semiconductor stack of the photodiode, and in step d), the doped semiconductor layer is made porous within the second support pad but not within the first support pad.

[0018] According to one embodiment, step c) of forming a trench through the support stack is performed after step b) of epitaxially growing the light-emitting semiconductor active stack of the LED and the light-receiving semiconductor active stack of the photodiode, and in step d), the doped semiconductor layer is made porous in the first support pad instead of in the second support pad.

[0019] According to one embodiment, in step d), the side surface of the doped semiconductor layer in the second pad is in contact with the electrolyte, while the side surface of the doped semiconductor layer in the first pad is protected from contact with the electrolyte by a protective layer.

[0020] According to one embodiment, in step d), the side surface of the doped semiconductor layer in the first pad is in contact with the electrolyte, and the side surface of the doped semiconductor layer in the second pad is protected from contact with the electrolyte by a protective layer.

[0021] According to one embodiment, in step d), a bias current is applied through the doped semiconductor layer.

[0022] According to one embodiment, the method comprises, after step b) and step d), the step of transferring and mounting the LED and the photodiode onto one surface of a control integrated circuit preformed in and on a semiconductor substrate.

[0023] According to one embodiment, during the transferring and mounting step, the LED and the photodiode are mounted to the surface of the control integrated circuit by molecular bonding.

[0024] According to one embodiment, the trench is arranged such that the lateral dimension of the LED is smaller than the lateral dimension of the photodiode.

[0025] According to one embodiment, the active semiconductor light-emitting stack of the LED and the active semiconductor light-receiving stack of the photodiode comprise one or more group III-V or group II-VI semiconductor alloys.

[0026] Another embodiment provides an optoelectronic device comprising at least one LED having an active semiconductor light-emitting stack and at least one photodiode having an active semiconductor light-receiving stack. The optoelectronic device further comprises a doped semiconductor layer on the opposite side of the LED and the photodiode, wherein the doped semiconductor layer is porous on the opposite side of the LED and non-porous on the opposite side of the photodiode, or the doped semiconductor layer is porous on the opposite side of the photodiode and non-porous on the opposite side of the LED.

[0027] According to one embodiment, the device further comprises a control integrated circuit on which an LED and a photodiode are mounted on one side, and the control integrated circuit is adapted to drive the LED at a current density higher than the current density of the photodiode.

[0028] According to one embodiment, the control integrated circuit is adapted to drive the LED at a current density at least 10 times higher than the current density of the photodiode. [Brief explanation of the drawing]

[0029] The aforementioned features and advantages, as well as other features and advantages, will be described in detail in the following description of specific embodiments given as examples rather than limitations with reference to the attached drawings.

[0030] [Figure 1A] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 1B] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 1C] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 1D] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 2A]This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2B] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2C] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2D] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2E] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2F] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 3A] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3B] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3C] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3D] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3E] This is a cross-sectional view showing steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 4] This figure shows the response between the active light-emitting stack of an LED and the active light-receiving stack of a photodiode, created by a common epitaxy step. [Modes for carrying out the invention]

[0031] Similar features are designated by the same reference numerals in various figures. In particular, structural and / or functional features common to various embodiments may have the same reference numerals and may have the same structural, dimensional, and material properties.

[0032] For clarity, only the operations and elements useful for understanding the embodiments described herein are illustrated and described in detail. In particular, the electrical connections of the described devices and the implementation of the LED and photodiode control circuits are not described in detail, and the described embodiments are compatible with the usual implementations of these elements, or the implementation of these elements is within the scope of those skilled in the art from the instructions herein. Furthermore, applications that are likely to benefit from the described embodiments are not described in detail, as the described embodiments can be advantageously used in any application involving one or more LEDs and one or more photodiodes intended to operate in the same wavelength range, for example, visible light, ultraviolet light, or near-infrared light.

[0033] Unless otherwise specified, when referring to two elements connected to each other, this means a direct connection with no intermediate elements other than conductors; when referring to two elements joined to each other, this means that these two elements can be connected, or that these two elements can be joined through one or more other elements.

[0034] In the following disclosures, unless otherwise specified, when referring to absolute position modifiers such as “front,” “back,” “up,” “down,” “left,” and “right,” relative position modifiers such as “above,” “downward,” “higher,” and “lower,” or orientation modifiers such as “horizontal” and “vertical,” the orientation shown in the illustration is being referred to.

[0035] Unless otherwise specified, the expressions “approximately,” “about,” “substantially,” and “of the order of” mean within 10%, preferably within 5%.

[0036] According to one embodiment of the described features, a method is provided for manufacturing an optoelectronic device in which an active light-emitting stack of LEDs and an active photosensitive stack of photodiodes are mounted simultaneously in a single epitaxy step.

[0037] One advantage is that it reduces costs compared to methods that involve separate, specific epitaxy steps to continuously produce the active light-emitting stack of the LED and the active light-receiving stack of the photodiode.

[0038] LEDs and photodiodes can be monolithically integrated onto a single optoelectronic chip, or they can be separated by cutting at the end of the integration process and integrated onto separate chips to be assembled into the same optoelectronic device.

[0039] The active light-emitting stacks of LEDs and the active light-receiving stacks of photodiodes are, for example, based on inorganic semiconductor stacks, such as those based on Group III-V semiconductor materials, such as Group III nitrides, such as gallium, aluminum, indium, or alloys based on one or more of these materials. Alternatively, the active light-emitting stacks of LEDs and the active light-receiving stacks of photodiodes are based on Group II-VI semiconductor materials, such as ZnCdSe (zinc-cadmium-selenium).

[0040] The same gallium nitride-based active stack can be used, for example, as an active stack for an LED during light emission or as an active stack for a photodiode during light reception. Therefore, the photodiode can have very low dark current and a narrow optical bandwidth during light reception, enabling a very good signal-to-noise ratio.

[0041] However, one challenge is that the optimal emission wavelength (emission peak) of an LED is shifted upward by tens of nanometers, typically about 20 nm, compared to the optimal light-receiving wavelength (absorption peak) of a photodiode, for example, in gallium nitride (GaN) based active stacks. This is known as the Stokes shift and is caused in particular by the binding energy of electron-hole pairs. This affects the sensitivity of the photodiode in the LED emission wavelength range, and consequently, the efficiency of the LED photodiode system.

[0042] This phenomenon is particularly illustrated in Figure 4.

[0043] Figure 4 shows the evolution of the quantum efficiency Q as a function of wavelength W (x-axis) in the light-receiving (curve 401) and light-emitting (curve 403) of an active stack of a gallium nitride (GaN) based diode, for example, an indium gallium nitride (InGaN) based diode.

[0044] According to one aspect of the first embodiment, an active semiconductor stack common to the LED and photodiode is formed by epitaxy, and then a trench is formed that extends vertically through the active stack and defines the LED and photodiode laterally. According to the first embodiment, the lateral dimension of the LED is smaller than the lateral dimension of the photodiode. This allows the mechanical stress in the LED's active stack to be significantly reduced compared to that in the photodiode's active stack. As a result, the internal electric field in the LED's active stack is reduced compared to the internal electric field in the photodiode's active stack. This reduction in the internal electric field in the LED's active stack results in a downward shift of the LED's emission peak (so-called blue shift). This can at least partially compensate for the Stokes shift between the emission peak and absorption peak of the active stack. Thus, the LED's emission peak approaches the photodiode's absorption peak, improving system efficiency.

[0045] Figures 1A to 1D are schematic cross-sectional views illustrating the steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a first embodiment.

[0046] Figure 1A shows a structure including an active semiconductor light-emitting / receiving stack 103 located on the upper surface of the support substrate 101.

[0047] The active stack 103 comprises, for example, a semiconductor layer 103a doped with a first conductivity type, such as N-type, which covers the upper surface of the substrate 101; an active layer 103b which covers the surface of layer 103a opposite to the substrate 101, i.e., the upper surface of layer 103a in the orientation shown in Figure 1A; and a semiconductor layer 103c doped with a second conductivity type, such as P-type, which covers the surface of layer 103b opposite to layer 103a, i.e., the upper surface of layer 103b in the orientation shown in Figure 1A. For example, layer 103b is in contact with the upper surface of layer 103a via its bottom surface, and is in contact with the lower surface of layer 103c via its upper surface.

[0048] For example, layers 103a, 103b, and 103c of the active stack 103 each extend continuously and substantially uniformly across the entire surface of the substrate 101.

[0049] Layers 103a, 103b, and 103c are formed continuously on the upper surface of the support substrate 101 by epitaxy, for example.

[0050] For example, the support substrate 101 is made of sapphire or silicon. The semiconductor layers 103a and 103c of the active stack 103 are made of, for example, gallium nitride. For example, the active layer 103b comprises a stack of layers each forming a quantum well based on, for example, indium gallium nitride (InGaN).

[0051] A buffer layer (not shown) can form an interface between the upper surface of the substrate 101 and the bottom surface of the lower layer 103a.

[0052] Figure 1A further illustrates the step of depositing a metal layer 105 on the upper surface of the active stack 103. In the illustrated example, layer 105 extends continuously and substantially uniformly in thickness across the entire upper surface of the active stack 103. For example, layer 105 contacts the upper surface of the top layer 103c of the active stack via its bottom surface.

[0053] Figure 1B schematically shows an integrated control circuit 110 pre-formed in and on a semiconductor substrate 111, such as a silicon substrate. In this example, the control circuit 110 includes a metal connection pad 113L on its upper side, intended to be connected to one of the LED electrodes (anode or cathode) for each of the LEDs of the device, so as to control the current flowing through the LED and / or apply a voltage between the terminals of the LED. In this example, the control circuit 110 further includes a metal connection pad 113P on its upper side, intended to be connected to one of the photodiode electrodes (anode or cathode) for each of the photodiodes of the device, so as to be able to read an electrical signal representing the intensity of the light emission received by the photodiode within its sensitivity wavelength range.

[0054] The control circuit includes, for example, a basic control cell including one or more transistors that enables the control of the current flowing through an LED and / or the voltage applied between the terminals of an LED for each LED connected to a metal pad 113L dedicated to LEDs, and a basic sensing cell including one or more transistors that enables the reading of an electrical signal representing the intensity of light radiation received by a photodiode within its sensitivity wavelength range for each photodiode connected to a metal pad 113P dedicated to photodiodes. The reading circuit includes, for example, a transimpedance amplifier used to amplify the photodiode current.

[0055] The control circuit 110 is based, for example, on CMOS technology. The metal pads 113L, 113P can be laterally surrounded by an insulating material 114, such as silicon oxide, such that the control circuit 110 has a substantially flat top surface comprising alternating metal regions 113 and insulating regions 114. Contact to the electrodes of LEDs or photodiodes not connected to pads 113L, 113P can be made collectively, for example, in the peripheral region of the control circuit 110, via one or more connection pads of the control circuit 110 (not shown in the figure). For example, the control circuit 110 has a stack of insulating and conductive levels on the upper side of the substrate 111, in particular comprising an interconnection network 112 comprising connection pads 113L, 113P, the upper surface of the interconnection network 112 defining the upper surface of the circuit 110.

[0056] Figure 1B further illustrates the step of depositing a metal layer 115 onto the upper surface of the control integrated circuit 110. In the illustrated example, the layer 115 extends continuously across the entire upper surface of the circuit 110 with a substantially uniform thickness. For example, the layer 115 contacts the upper surface of the interconnect network 112 of the control circuit 110 through its bottom surface.

[0057] For example, layer 115 is made of the same material as layer 105. For example, layers 105 and 115 each include an uppermost layer called a bonding layer. The bonding layers of layers 105 and 115 are preferably made of the same material, for example, titanium.

[0058] Figure 1C shows the structure obtained at the end of the step of transferring the active stack 103 of the LED and photodiode to the top surface of the control circuit 110. For this purpose, the structure shown in Figure 1A can be inverted and then transferred to the structure shown in Figure 1B so that the surface of the metal layer 105 opposite to the substrate 101 (i.e., its bottom surface in the orientation shown in Figure 1C, corresponding to its top surface in the orientation shown in Figure 1A) is in contact with the surface of the metal layer 115 opposite to the substrate 111 (i.e., its top surface in the orientation shown in Figures 1B and 1C). During this step, the active stack 103 is bonded to the control circuit 110. For example, the attachment of the active stack 103 to the control circuit 110 can be achieved by molecular bonding between the two contacting surfaces. Alternatively, the attachment of the two surfaces can be achieved by thermocompression bonding, eutectic bonding, or any other suitable bonding method.

[0059] Once bonding is complete, the support substrate 101 is removed so as to expose the upper surface (in the orientation shown in Figure 1C) of the semiconductor layer 103c of the active stack 103. The substrate 101 is removed, for example, by grinding and / or etching from the side of the substrate 101 opposite to the active stack 103. Alternatively, in the case of a transparent substrate 101, such as a sapphire substrate, the substrate 101 can also be removed from the active stack 103 by a laser beam projected through the substrate 101 from the side of the substrate 101 opposite to the active stack 103 (laser lift-off method). More generally, any other method that allows the substrate 101 to be removed can be used. After the substrate has been removed, an additional etching step can be performed to remove the buffer layer remaining on the upper side of the semiconductor layer 103c. Furthermore, a portion of the thickness of layer 103c can be removed, for example, by etching. At the end of this step, the active stack 103 covers substantially the entire surface of the control circuit 110 without discontinuity. For example, at the end of the steps shown in Figure 1D, the thickness of the active stack 103 is 0.5–2 μm.

[0060] At the end of this step, the mechanical stress of the epitaxially grown active stack 103 is partially transferred to the substrate 111 of the control circuit 110.

[0061] Figure 1D shows a step following the step shown in Figure 1C, in which trenches 120 are formed in the active stack 103 from its upper surface, for example by lithography and subsequent etching, to define one or more LEDs L and one or more photodiodes P corresponding to island-like or mesa-like portions of the active stack 103. In the illustrated example, the trenches 120 extend vertically across the entire height of the active stack 103 and open to the upper surface of the metal layer 105. The trenches 120 can be aligned with pre-formed marks on the control circuit 110. In the illustrated example, each LED L is located opposite the single metal pad 113L on the control circuit 110 in a vertical projection, and each photodiode P is located opposite the single metal pad 113P on the control circuit 110 in a vertical projection. For example, each LED L and each photodiode P have a roughly square or rectangular shape in a plan view. For example, when viewed from above, the trench 120 forms a grid or grid pattern that separates the LED L and photodiode P of the device from each other in the lateral direction.

[0062] Next, trenches can be extended through the metal layers 105 and 115 to individualize the electrical connections on the lower semiconductor layer 103c of the active stack 103 of each LED L and each photodiode P. Subsequently, the individual or common electrical contacts on the upper semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P can be restored by performing the following steps. These steps are not described in detail and are within the scope of those skilled in the art from the instructions herein. For example, these steps are similar to those described in the previously filed International Publication No. 2017194845 or International Publication No. 2019092357 of the present applicant.

[0063] During the etching step of the active stack 103 shown in Figure 1D, further relaxation of the mechanical stress present in the epitaxially grown active stack 103 occurs via the edges of the etched islands or mesas. This relaxation depends on the size of the islands or mesas. In particular, islands or mesas with smaller dimensions exhibit high stress relaxation, while islands or mesas with larger dimensions retain relatively high mechanical stress. The relaxation may further depend on the properties of the substrate, which may include, for example, a stack of gallium nitride layers on a silicon layer, a stack of gallium nitride layers on a sapphire layer, or a stack of porous gallium nitride layers on a silicon layer.

[0064] According to one aspect of the first embodiment, the following is defined: - Significant relaxation of mechanical stress within the active stack 103, resulting in a relatively large downward shift of the emission peak, and an LED L having a relatively small lateral dimension, - A photodiode P having a relatively large lateral dimension to reduce the relaxation of mechanical stress within the active stack 103, thereby achieving a relatively low downward shift of the absorption peak.

[0065] This makes it possible to at least partially compensate for the Stokes shift that inevitably exists between the emission peak and absorption peak of the active stack 103.

[0066] For example, the islands or mesa forming the LED L have a lateral dimension of 5 μm or less, for example, 4 μm or less, for example, 2 μm or less. This allows the active stack to be almost completely relaxed during etching of the LED. With respect to these, the islands or mesa forming the photodiode P have a lateral dimension larger than the lateral dimension of the LED, for example, at least twice the lateral dimension of the LED, for example, at least four times the lateral dimension of the LED, in order to maintain relatively high mechanical stress within the active stack 103 of the photodiode P.

[0067] As a non-limiting example, alignment of the emission peak of LED L and the absorption peak of photodiode P has been observed in a GaN-based active stack, a square LED L with sides of approximately 1 μm, and a photodiode P with sides of 8-10 μm.

[0068] The embodiments described are not limited to the arrangement of LEDs L and photodiodes P shown in Figure 1D. For example, the device may comprise a plurality of LEDs L arranged in a matrix, for example, according to rows and columns, with identical (excluding manufacturing variations) LEDs L and a constant pitch between them, for example, on a first portion of the surface of the integrated control circuit 110. The device may further comprise a plurality of photodiodes P arranged in a matrix, for example, according to rows and columns, with identical (excluding manufacturing variations) photodiodes P and a constant pitch between them, for example, on a second portion of the surface of the integrated control circuit 110. The LED pitch in the first region is, for example, the same as the photodiode pitch in the second region. On the other hand, the lateral dimension of the LEDs in the first region is smaller than the lateral dimension of the photodiodes in the second region.

[0069] In addition to the different sizes of the LED L and the photodiode P, another parameter that allows for a reduction in the wavelength shift between the LED's emission peak and the photodiode's absorption peak is the charge carrier density within the active stack, particularly within the quantum well of the active layer 103b. More specifically, a high carrier density shields the electric field present within the active stack, resulting in a downward shift of the optimal operating wavelength of the active stack.

[0070] Therefore, advantageously, the control circuit 110 is configured to drive the LED L at a higher voltage than the photodiode P. This results in a higher carrier density in the LED L than in the photodiode P, and as a result, the shift between the emission peak of the LED L and the absorption peak of the photodiode P can be reduced. For example, the driving voltage is selected such that the carrier density in the LED L is at least twice, for example, at least five times, or about ten times, the carrier density of the photodiode P.

[0071] The wavelength shift associated with an increase in current density within an LED depends on the structure of the active stack, particularly the width of the quantum well in the active layer 103b. Specifically, wider wells result in greater field shielding associated with increased carrier density, and consequently, a greater downward shift of the LED's optimal emission wavelength associated with increased carrier density. On the other hand, increasing the well width implies a longer radiative recombination time, which can be disadvantageous for communication applications requiring short recombination times. Those skilled in the art can select an appropriate compromise depending on the application's needs. As an exemplary, non-limiting example, consider an LED containing a 4nm thick InGaN quantum well with a 14.3% indium content, with a current of 100 A / cm². 2 When driving an LED with a current density of approximately 10 A / cm², the current density is 10 A / cm². 2 Compared to driving the same LED with a similar current density, this results in a blue shift of approximately 6 nm in the emission peak.

[0072] To fully compensate for the Stokes shift, for example, the mechanical mitigation effect described above, achieved by using LEDs smaller than photodiodes, can be combined with the effect of electric field shielding by carriers, achieved by using LEDs with higher current densities than photodiodes. As an illustrative and non-limiting example, in the case of gallium nitride-based LEDs including InGaN quantum wells, 200 A / cm² is used. 2 A 4μm wide LED driven at a current density of approximately 10A / cm² 2 A wavelength shift of approximately 30 nm exists in the emission peak between two identical 25 μm wide LEDs driven at a similar current density. Of this 30 nm shift, about 20 nm is due to the size difference, and the remainder (about 10 nm) is due to the difference in current density. This shift is typically comparable to the Stokes shift between light emission and light reception within an active stack.

[0073] It should be noted that compensation due to the difference in carrier density between the LED and the photodiode can be achieved in devices having an LED L with the same lateral dimensions as the photodiode P, or even in devices having an LED L with lateral dimensions greater than those of the photodiode P.

[0074] According to one second embodiment, prior to the common epitaxy step on which the active photo-emitting and photo-receiving stacks are simultaneously formed, the support layer of the semiconductor material is locally porous on the side opposite to the photodiode of the device (on which the active stack is epitaxially grown). This results in relaxation of mechanical stress within the photodiode's active stack during epitaxy, particularly during the formation of the active layer 103b of the stack. This relaxation leads to a difference in the proportion of semiconductor alloy species forming the active layer 103b between the photodiode and the LED. In particular, if the active layer comprises an InGaN quantum well, the indium uptake of the photodiode quantum well is greater than that of the LED quantum well. This leads to a redshift, i.e., an upshift, of the photodiode's absorption peak, thus at least partially compensating for the Stokes shift between the emission and absorption peaks of the active stack.

[0075] Figures 2A to 2F are schematic cross-sectional views illustrating the steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a second embodiment.

[0076] Figure 2A shows a structure including a semiconductor support stack 210 on one surface of a support substrate 101. The support substrate 101 is, for example, the same as or similar to that described above. The semiconductor support stack 210 is made of a III-V semiconductor material, such as gallium nitride. The semiconductor support stack 210 comprises at least one doped semiconductor layer 210b having a doping level selected to allow the layer 210b to become porous during a subsequent electroporous porosity step. For example, layer 210b is N-type doped. For example, layer 210b is 10 19 ~1.5×10 19 atoms / cm3 It is made of N-type doped gallium nitride with the doping level.

[0077] In the illustrated example, the support stack 210 further comprises a semiconductor layer 210a on the bottom surface of layer 210b, for example, in contact with the bottom surface of layer 210b. Layer 210a is made of the same material as layer 210b, for example, but has a lower doping level than layer 210b, for example, a doping level at least 10 times lower than layer 210b. Alternatively, layer 210a is made of a different material than layer 210b.

[0078] In the illustrated example, the support stack 210 further comprises a semiconductor layer 210c on the upper surface of layer 210b, for example, in contact with the upper surface of layer 210b. Layer 210c is made of the same material as layer 210b, but has a lower doping level than layer 210b, for example, at least 10 times lower, preferably at least 100 times lower. Alternatively, layer 210c is made of a different material than layer 210b.

[0079] The layers 210a, 210b, and 210c of the support stack 210 each extend continuously and substantially uniformly across the entire surface of the substrate 101, for example.

[0080] Layers 210a, 210b, and 210c are formed continuously on the upper surface of the support substrate 101 by epitaxy, for example.

[0081] For example, the support substrate 101 is made of sapphire or silicon. A buffer layer (not shown) may optionally form an interface between the upper surface of the substrate 101 and the bottom surface of the lower layer 210a of the support stack 210.

[0082] Figure 2B shows the step of forming trenches 220 within the support stack 210 from its upper surface, for example by lithography and subsequent etching, to define multiple island-like or mesa-like support pads SL and SP within the stack 210. Each support pad SL is intended to receive the device's LED L on its upper surface, and each support pad SP is intended to receive the device's photodiode P on its upper surface.

[0083] In the illustrated example, the trench 220 extends vertically from the top surface of the stack, completely penetrating layers 210c and 210b, and opening into layer 210a without completely penetrating it. Alternatively, the trench 220 completely penetrates layer 210.

[0084] For example, when viewed from above, the trench 220 forms a grid or grid pattern that laterally separates the support pads SL and SP, which are intended to receive the device's LED L and photodiode P.

[0085] For example, support pads SP and SL all have the same lateral dimensions, e.g., 1 μm to 25 μm, e.g., 2 μm to 8 μm. For example, when viewed from above, support pads SP and SL have a square or rectangular shape.

[0086] At this point, the side surface of the doped semiconductor layer 210b of the support stack is exposed in each support pad SL and SP.

[0087] Figure 2C shows the structure obtained at the end of the step of selectively porousizing layer 210b located only within the support pad SP of the device's photodiode P. During this step, layer 210b of the support pad SP is made porous by electrolytic etching or electrolytic porosification. Meanwhile, layer 210b of the support pad SL remains non-porous.

[0088] For this purpose, the sides of the support pads can be pre-coated with a protective layer (not visible in the figure) made of an insulating material such as silicon oxide or silicon nitride. The protective layer is first deposited over the entire top surface and then locally removed, for example, by photolithography and etching, so as to expose the sides of the support pad SP without exposing the sides of the support pad SL.

[0089] Next, the structure can be immersed in an electrolytic bath (not visible in the diagram), such as an oxalic acid-based solution like an aqueous oxalic acid solution.

[0090] Next, a bias voltage is applied so that current flows through the doped semiconductor layer 210b. For example, the voltage is applied between a first electrode connected to layer 210a (not visible in the diagram) and an electrolyte connected to layer 210c by the wafer (not visible in the diagram).

[0091] Under the influence of the bias current, the portion of layer 210b that comes into contact with the electrolyte through its sides, i.e., the portion of layer 210b included in the support pad SP of the device's photodiode P, becomes porous. On the other hand, the portion of layer 210b protected from contact with the electrolyte, i.e., the portion of layer 210b included in the support pad SL of the device's LED L, remains intact (non-porous).

[0092] Note that in this example, the doping levels of layers 210a, 210b, and 210c of the support stack are selected so that only layer 210b becomes porous during the electroporation step.

[0093] At the end of this step, the protective layer covering the sides of the support pad SL can be removed.

[0094] Figure 2D shows the structure obtained at the end of a common epitaxy step in which the active semiconductor stack 103 is formed on each support pad SL and each support pad SP. The epitaxy is located, for example, at openings pre-etched in a dielectric layer (not shown).

[0095] On each support pad SL and SP, for example, the active stack 103 covers the entire upper surface of the pad. The portion of the active stack 103 covering each SL pad defines the LED of the device. The portion of the active stack 103 covering each SP defines the photodiode of the device.

[0096] On each support pad SP and SL, the active stack 103 comprises, in order from the top surface of the pad, semiconductor layers 103a, 103b, and 103c, which are the same or similar as those described above in relation to Figures 1A to 1D. Layers 103a, 103b, and 103c are formed continuously, for example, by epitaxy from the top surface of the pads SP and SL. For example, on each pad SP and SL, the lower semiconductor layer 103a of the active stack 103 is in contact with the top surface of layer 210c via its bottom surface.

[0097] The presence of the porous layer 210b within the support pad SP results in greater mechanical relaxation in the active stack of the photodiode P than in the active stack of the LED L. This leads to the incorporation of different species into the active layer 103b of the LED L's active stack and the active layer 103b of the photodiode P's active stack during epitaxy. In particular, in the case of the InGaN-based active layer 103b, this results in greater indium incorporation in the active layer 103b of the photodiode P than in the active layer 103b of the LED L. Therefore, the presence of the porous layer 210b within the support pad SP of the photodiode P causes the wavelength of the photodiode P's absorption peak to shift upward (towards the red side), thus approaching the emission peak of the LED L.

[0098] Figure 2E shows the structure obtained at the end of the step of forming a contact metallization 232L on the upper surface of the top semiconductor layer 103c of the LED active stack 103 on each LED L, and a contact metallization 232P on the upper surface of the top semiconductor layer 103c of the photodiode active stack 103 on each photodiode P.

[0099] Figure 2E further illustrates the step of filling the trench 220 and the space between the LED L and the photodiode P with an electrical insulating material 234, such as silicon oxide.

[0100] After filling, a planarization step, such as chemical mechanical polishing (CMP), can be performed so that the contact metallizations 232L and 232P become coplanar with the upper surface of the filling material 234.

[0101] Figure 2F shows the steps for transferring and mounting the structure shown in Figure 2E to the control integrated circuit 110, similar to, for example, Figure 1B.

[0102] During this step, the contact metallizations 232L and 232P of the structure shown in Figure 2E come into contact with the contact metallizations 113L and 113P of the control circuit 110 on the opposite side of the substrate 111, by their surfaces opposite to the support substrate 101.

[0103] For example, the structure shown in Figure 2E is attached to the control integrated circuit 110 by molecular junctions, such as hybrid metal-metal / oxide-oxide junctions, and electrically connected.

[0104] Once the two structures are assembled, the support substrate 101 of the structure shown in Figure 2E can be removed. Furthermore, all or part of the semiconductor support stack 210 can be removed, for example, by grinding or etching.

[0105] In the illustrated example, layer 210a of the support stack 210 is completely removed, while layers 210b and 210c are retained. However, the embodiments described are not limited to this example.

[0106] Next, subsequent steps can be performed to make individual or common electrical contacts on the uppermost semiconductor layer 103a of the active stack 103 for each LED L and each photodiode P. For example, a layer of transparent conductive material, such as a transparent conductive oxide, e.g., indium tin oxide (ITO), is deposited on the upper surface of the structure shown in Figure 2F in contact with the upper surface. These steps are not described in detail and are within the scope of those skilled in the art from the instructions herein.

[0107] Similar to those described above, the control circuit can optionally be configured to drive the LED and photodiode at a carrier density suitable for reducing the shift between the LED's emission peak and the photodiode's absorption peak.

[0108] According to one aspect of the third embodiment, support pads SP and SL are formed in a similar manner to that described above in relation to Figures 2A to 2F, except that layer 210b of the support pad is selectively porous only after a common epitaxy step in which the active stack 103 of the LED L and photodiode P is formed simultaneously. In this third embodiment, layer 210b is porous near the LED L and remains intact (non-porous) near the photodiode P. This results in at least partial relaxation of the mechanical stress in the active stack of the LED L without applying this relaxation to the photodiode P. This reduces the internal electric field in the active stack of the LED compared to the active stack of the photodiode. This reduction in the internal electric field in the active stack of the LED leads to a downward shift of the LED's emission peak. In this case as well, this can at least partially compensate for the Stokes shift between the emission and absorption peaks of the active stack. Thus, the LED's emission peak approaches the photodiode's absorption peak, improving system efficiency.

[0109] Figures 3A to 3E are schematic cross-sectional views illustrating the steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a third embodiment.

[0110] Figure 3A shows a structure including a semiconductor support stack 210 on one surface of a support substrate 101. The support stack 210 and the support substrate 101 are the same as or similar to those described above, for example, in relation to Figure 2A.

[0111] Figure 3A further illustrates the step of forming an active stack 103 for LEDs and photodiodes on the upper surface of the semiconductor support stack 210. The active stack 103 is, for example, identical or similar to those described above, particularly in relation to Figure 1A. Layers 103a, 103b, and 103c are formed, for example, continuously by epitaxy from the upper surface of the support stack 210. For example, the lower semiconductor layer 103a of the active stack 103 is in contact with the upper surface of layer 210c via its bottom surface.

[0112] At this point, the layers of the support stack 210 and the active stack 103 extend continuously and uniformly across the entire surface of the support substrate 101.

[0113] Figure 3B shows the step of forming trenches 320 within the active stack 103 and the support stack 210 from the top surface of the active stack 103, for example by lithography and etching, to define a plurality of island-like or mesa-like support pads SL and SP within the stack 210, where each support pad SL is covered on its upper surface by a portion of the active stack 103 defining the LED L of the device, and each support pad SP is covered on its upper surface by a portion of the active stack 103 defining the photodiode P of the device.

[0114] In the illustrated example, the trench 320 extends vertically from the top surface of the active stack 103, completely penetrating layers 103c, 103b, 103a, 210c, and 210b, and opening into layer 210a without completely penetrating it. Alternatively, the trench 220 completely penetrates layer 210.

[0115] For example, when viewed from above, the trench 320 forms a grid or grid pattern that laterally separates the LED L and photodiode P from the support pads SL and SP.

[0116] The LED L and photodiode P, as well as the underlying support pads SP and SL, all have, for example, the same lateral dimensions, e.g., 1 μm to 25 μm, or 2 μm to 8 μm. For example, the LED L and photodiode P, as well as the support pads SP and SL, have a square or rectangular shape in plan view. More generally, the LED L and photodiode P can have any shape, e.g., circular or hexagonal.

[0117] At this point, the side surface of the doped semiconductor layer 210b of the support stack is exposed in each support pad SL and SP.

[0118] Figure 3C shows the structure obtained at the end of the step of selectively porousizing layer 210b, which is located only within the support pad SL of the device's LED L. This step is similar to that described above in relation to Figure 2C, but differs from Figure 2C in that, in the example of Figure 3C, layer 210b of the support pad SL is porous, while layer 210b of the support pad SP remains intact (non-porous).

[0119] For this purpose, during the electroporation step, the sides of the support pad SP can be protected from contact with the electrolyte by a protective layer (not visible in the figure), while the sides of the support pad SL are in contact with the electrolyte.

[0120] In the example shown in Figure 3C, the bias voltage used to force current through layer 210b is applied, for example, between a first electrode (not shown in the figure) connected to layer 210a and an electrolyte (not shown in the figure) connected to layer 103c by its edge.

[0121] As a result of the porous nature of layer 210b within the support pad SL, mechanical relaxation is greater in the active stack of LED L than in the active stack of photodiode P. This causes the emission peak of the LED to shift downward, thus approaching the absorption peak of photodiode P.

[0122] Figure 3D shows a structure obtained at the end of steps similar to those described above in relation to Figure 2E, in which a contact metallization 232L is formed on the upper surface of the top semiconductor layer 103c of the LED active stack 103 on each LED L, and a contact metallization 232P is formed on the upper surface of the top semiconductor layer 103c of the photodiode active stack 103 on each photodiode P, in contact with the upper surface.

[0123] Figure 2E further illustrates the step of filling the trench 320 and the space between the LED L and the photodiode P with an electrical insulating material 234, such as silicon oxide.

[0124] After filling, a planarization step, such as chemical mechanical polishing (CMP), can be performed so that the contact metallizations 232L and 232P become coplanar with the upper surface of the filling material 234.

[0125] Figure 3E shows steps similar to those described above in relation to Figure 2F, in which the structure of Figure 3D is transferred and mounted onto the control integrated circuit 110, the support substrate 101 is removed, and optionally all or part of the semiconductor support stack 210 is removed.

[0126] Similarly to the above, the following steps can then be performed to make individual or common electrical contacts on the uppermost semiconductor layer 103a of the active stack 103 for each LED L and each photodiode P.

[0127] Similar to those described above, the control circuit can optionally be configured to drive the LED and photodiode at a carrier density suitable for reducing the shift between the LED's emission peak and the photodiode's absorption peak.

[0128] Various embodiments and variations are described. Those skilled in the art will understand that specific features of these embodiments can be combined, and other variations will be readily conceivable to those skilled in the art. In particular, the embodiments described are not limited to the exemplary materials and dimensions mentioned herein.

[0129] Furthermore, while examples of embodiments in which the active stack 103 of LEDs and photodiodes is mounted to the control integrated circuit by direct full-plate metal-to-metal junctions or direct hybrid metal-to-metal / dielectric-to-electric junctions have been described above, the embodiments described are not limited to these specific examples. More generally, the active stack 103 of LEDs and photodiodes can be mounted to the control integrated circuit by any other means, for example, by full-plate direct oxide-to-oxide junctions.

[0130] Furthermore, it should be noted that the first and third embodiments can be combined.

[0131] Finally, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art based on the functional descriptions provided above.

[0132] This application claims priority to French Patent Application No. 2212871, filed on December 7, 2022, entitled "Procede de fabrication d'un dispositif optoelectronique comprenant une LED et une photodiode," which is deemed to be an integral part of this specification to the extent permitted by law.

Claims

1. A method for manufacturing an optoelectronic device comprising at least one LED and at least one photodiode, comprising the following sequential steps, namely: a) The step of epitaxially forming an active semiconductor light-emitting and light-receiving stack common to the LED and the photodiode, b) The step of forming a trench that extends vertically through the active semiconductor light-emitting and light-receiving stack and defines the LED and the photodiode laterally. Includes, The trench is arranged such that the lateral dimension of the LED is smaller than the lateral dimension of the photodiode. The method includes the step of transferring and attaching the active semiconductor light-emitting and light-receiving stack to the semiconductor substrate and to the surface of a control integrated circuit that has been pre-formed on the semiconductor substrate. The control integrated circuit comprises, for each LED, a basic control cell including one or more transistors that enables control of the current flowing through the LED and / or the voltage applied between the terminals of the LED, and for each photodiode, a basic sensing cell including one or more transistors that enables reading of an electrical signal representing the intensity of the light radiation received by the photodiode. In step b), the trench extends vertically through the entire thickness of the active semiconductor photodetector stack, The control integrated circuit is configured to drive the LED with a current density higher than the current density of the photodiode. A method wherein the lateral dimensions of the LED, the lateral dimensions of the photodiode, the current density within the LED, and the current density within the photodiode are set such that the Stokes shift between the emission peak and the absorption peak of the active semiconductor photodetector stack is compensated.

2. The method according to claim 1, wherein the trench is arranged such that the lateral dimension of the LED is at least half the lateral dimension of the photodiode.

3. The method according to claim 1, wherein the trench is arranged such that the lateral dimension of the LED is at least one-quarter the size of the lateral dimension of the photodiode.

4. The method according to claim 1, wherein the trench is arranged such that the lateral dimension of the LED is less than 4 μm.

5. The method according to claim 4, wherein during the transfer and mounting step, the active semiconductor photodetector stack is attached to the surface of the control integrated circuit by molecular junction.

6. The method according to claim 4, wherein at the end of the transfer and mounting step, the active semiconductor photodetector stack extends continuously across the entire surface of the control integrated circuit.

7. The method according to any one of claims 1 to 6, wherein the active semiconductor photodetector stack comprises one or more Group III-V or Group II-VI semiconductor alloys.

8. An optoelectronic device comprising at least one LED and at least one photodiode, each having an active semiconductor light-emitting / receiving stack having the same properties and composition, The lateral dimension of the LED is smaller than the lateral dimension of the photodiode. The optoelectronic device further comprises a control integrated circuit formed in and on a semiconductor substrate, The control integrated circuit comprises, for each LED, a basic control cell including one or more transistors that enables control of the current flowing through the LED and / or the voltage applied between the terminals of the LED, and for each photodiode, a basic sensing cell including one or more transistors that enables reading of an electrical signal representing the intensity of the light radiation received by the photodiode. The LED and the photodiode are defined laterally by trenches that extend vertically through the entire thickness of the active semiconductor light-emitting and light-receiving stack. The control integrated circuit is configured to drive the LED with a current density higher than the current density of the photodiode. An optoelectronic device in which the lateral dimensions of the LED, the lateral dimensions of the photodiode, the current density within the LED, and the current density within the photodiode are set to compensate for the Stokes shift between the emission peak and the absorption peak of the active semiconductor photodetector stack.

9. The device according to claim 8, wherein the LED and the photodiode are mounted on one side of the control integrated circuit.

10. The device according to claim 9, wherein the control integrated circuit is adapted to drive the LED at a current density at least 10 times higher than the current density of the photodiode.

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