Substrate liquid treatment method and substrate liquid treatment apparatus
Patent Information
- Application Number
- JP2024530687
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-06-28
- Filing Date
- 2023-06-15
- Publication Date
- 2026-09-09
- Estimated Expiration
- 2043-06-15
Smart Images

Figure 0007918265000001 
Figure 0007918265000002 
Figure 0007918265000003
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a substrate liquid processing method and a substrate liquid processing apparatus. [Background Art]
[0002] Electroless plating can be used to form fine wiring on a semiconductor wafer (also simply referred to as a "wafer"). Patent Document 1 discloses an apparatus that uses electroless plating to fill vias (recesses) in a wafer with metal wiring. [Prior Art Documents] [Patent Documents]
[0003] [Patent Document 1] International Publication No. 2019 / 163531 [Summary of Invention]
[0004] The present disclosure provides a technique advantageous for depositing plated metal in a favorable state on a substrate.
[0005] One aspect of the present disclosure relates to a substrate liquid processing method comprising: a step of preparing a substrate including wiring and an insulating film provided on the wiring, the insulating film having a recess penetrating to the wiring to expose the wiring; a step of cleaning a surface of the insulating film including a partitioning surface that partitions the recess using a cleaning liquid that does not contain a reducing agent and contains first metal ions; and a step of depositing plated metal in the recess of the cleaned substrate using an electroless plating solution containing the first metal ions.
[0006] According to the present disclosure, it is advantageous for depositing plated metal in a favorable state on a substrate. [Brief Description of Drawings]
[0007] [Figure 1] FIG. 1 is a diagram showing an example of a schematic configuration of a multilayer wiring forming system. [Figure 2] FIG. 2 is a diagram showing an example of a configuration of an electroless plating processing unit. [Figure 3] Figure 3 shows an example of a magnified cross-section of a wafer (particularly near one of the recesses). [Figure 4A] Figure 4A is a diagram illustrating an example of a substrate liquid treatment method according to the first modified example, and shows an enlarged cross-section of a wafer (particularly the area near one of the recesses). [Figure 4B] Figure 4B is a diagram illustrating an example of a substrate liquid treatment method according to the first modified example, and shows an enlarged cross-section of a wafer (particularly near one of the recesses). [Figure 4C] Figure 4C is a diagram illustrating an example of a substrate liquid treatment method according to the first modified example, and shows an enlarged cross-section of a wafer (particularly near one of the recesses). [Figure 4D] Figure 4D is a diagram illustrating an example of a substrate liquid treatment method according to the first modified example, and shows an enlarged cross-section of the wafer (particularly the area near one of the recesses). [Figure 4E] Figure 4E is a diagram illustrating an example of a substrate liquid treatment method according to the first modified example, and shows an enlarged cross-section of a wafer (particularly near one of the recesses). [Modes for carrying out the invention]
[0008] Specific embodiments of this disclosure will be described with reference to the attached drawings. The following embodiments are merely examples of substrate liquid treatment methods and substrate liquid treatment apparatus that embody the technical concept of this disclosure, and do not limit the technical concept of this disclosure. The elements shown in each drawing are simplified. The dimensions, shapes, and inter-elemental ratios of each element in each drawing do not necessarily match the corresponding elements of an actual apparatus, nor do they necessarily match between drawings.
[0009] Figure 1 shows a schematic example of the multilayer wiring formation system 1. In Figure 1, the X, Y, and Z axes are orthogonal to each other, the X and Y axes extend horizontally, and the positive direction of the Z axis is vertically upward.
[0010] The multilayer wiring formation system (substrate liquid treatment system) 1 shown in Figure 1 comprises an input / output station 2, a processing station 3, and a control device 4.
[0011] The loading / unloading station 2 includes a carrier mounting section 11 and a first transport section 12. Multiple carriers C are mounted on the carrier mounting section 11, and each carrier C supports one or more wafers W in a horizontal position. The first transport section 12 is provided adjacent to the carrier mounting section 11 and includes a first substrate transport device 13 and a transfer section 14.
[0012] The first substrate transport device 13 transports wafers W between each carrier C and the transfer unit 14. In this example, the first substrate transport device 13 can hold the wafers W and move them in the horizontal and vertical directions, and rotate (swivel) the wafers W around the vertical axis. The transfer unit 14 temporarily supports wafers W received from the first substrate transport device 13, or temporarily supports wafers W that are scheduled to be transferred to the first substrate transport device 13. Wafers W transferred from the transfer unit 14 to the first substrate transport device 13 are returned from the first substrate transport device 13 to the corresponding carrier C.
[0013] The processing station 3 is located adjacent to the loading / unloading station 2 (particularly the first transport unit 12) in the X direction and includes a second transport unit 15 and a plurality of processing units 16.
[0014] The second transport unit 15 is equipped with a second substrate transport device 20 that is movable along the transport path. The second substrate transport device 20 is capable of moving the wafer W horizontally and vertically, and rotating (swiveling) the wafer W around a vertical axis. The second transport unit 15 transports the wafer W received from the transfer unit 14 to a desired processing unit 16, transports the wafer W between processing units 16, and transports the wafer W from the processing unit 16 to the transfer unit 14.
[0015] The multiple processing units 16 included in the processing station 3 are arranged on both sides of the transport path of the second substrate transport device 20 (in the example shown in Figure 1, the transport path extends in the X direction). The arrangement and number of these processing units 16 are not limited to the example shown in Figure 1, and any number of processing units 16 can be arranged in any configuration.
[0016] The processing performed by each processing unit 16 is not limited in principle, but at least one processing unit 16 is provided as an electroless plating processing unit (substrate liquid processing device) 17. The electroless plating processing unit 17 performs electroless plating on the wafer W as described later. At least one processing unit 16 may also be provided as a reverse sputtering unit 18 used in the first modified example (Figures 4A to 4E) described later.
[0017] As an example, the processing units 16 included in the processing station 3 may include multiple electroless plating units 17, multiple CMP processing units, multiple heat treatment units, and multiple cleaning processing units. The CMP (Chemical Mechanical Polishing) processing unit performs CMP processing on the wafer W. The heat treatment unit performs a predetermined heat treatment on the wafer W. The cleaning processing unit performs cleaning on the wafer W and may include, for example, a spin cleaning cleaning device.
[0018] The control device 4 is, for example, a computer and comprises a control unit 21 and a memory unit 22. The control unit 21 includes a microcomputer having a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), and input / output ports, as well as various circuits. The CPU of the microcomputer controls the first transport unit 12, the second transport unit 15, and each processing unit 16 (including the electroless plating unit 17) by reading and executing programs stored in the ROM.
[0019] A program stored in the storage unit 22 of the control device 4 may be recorded on a computer-readable storage medium and installed into the storage unit 22 from the storage medium. Examples of computer-readable storage media include hard disks (HD), flexible disks (FD), compact disks (CD), magneto-optical disks (MO), and memory cards. The storage unit 22 can be realized by, for example, semiconductor memory elements such as RAM and flash memory, and storage devices such as hard disks and optical disks.
[0020] [Electroless Plating Processing Unit] Figure 2 is a diagram showing a configuration example of the electroless plating processing unit 17. Figure 2 perspectively shows the configuration inside the housing 30.
[0021] The electroless plating processing unit 17 shown in Figure 2 is configured as a single-wafer processing unit 16 that processes wafers W one by one, and includes a housing 30, and a substrate rotation holding mechanism 31, a processing liquid supply mechanism 32, and a cup 33 that are at least partially provided inside the housing 30.
[0022] The housing 30 has an opening / closing type loading / unloading unit (not shown). A wafer W transported by the second substrate transport device 20 (see FIG. 1) is loaded into the housing 30 through the loading / unloading unit in an open state, and is unloaded from the inside of the housing 30 through the loading / unloading unit in the open state. On the other hand, while the wafer W is undergoing various processes including electroless plating processing inside the housing 30 and while no process is performed inside the housing 30, the loading / unloading unit is kept in a closed state, and the inflow of outside air into the inside of the housing 30 is restricted.
[0023] The substrate rotation holding mechanism 31 holds the wafer W and is rotatably mounted together with the wafer W. The substrate rotation holding mechanism 31 has a hollow cylindrical rotating shaft 31a, a turntable 31b, a wafer chuck 31c, and a first rotation drive unit (not shown). The vertical length of the rotating shaft 31a inside the housing 30 is changed by a second lifting mechanism (not shown) driven under the control of a control device 4 (see Figure 1). The turntable 31b is attached to the upper end of the rotating shaft 31a. The wafer chuck 31c is provided on the outer periphery of the upper surface of the turntable 31b and supports the wafer W. As the vertical length of the rotating shaft 31a changes, the height position (vertical position) of the turntable 31b and the wafer chuck 31c changes integrally. The first rotation drive unit transmits rotational power from a drive source such as a motor to the rotating shaft 31a, causing the rotating shaft 31a, the turntable 31b, and the wafer chuck 31c to rotate integrally.
[0024] The substrate rotation holding mechanism 31 is driven under the control of the control device 4 (see Figure 1), and the rotational power transmitted from the first rotation drive unit rotates the rotation shaft 31a, the turntable 31b, and the wafer chuck 31c, thereby rotating the wafer W supported by the wafer chuck 31c.
[0025] The processing liquid supply mechanism 32 is driven under the control of the control device 4 (see Figure 1) and supplies a processing liquid (e.g., electroless plating solution) to the surface of the wafer W held by the substrate rotation holding mechanism 31. The processing liquid supply mechanism 32 in this example includes a processing liquid supply section 32a, a discharge head 32b, a discharge nozzle 32c, an arm 32d, a support shaft 32e, and a processing liquid supply path 32f.
[0026] The processing liquid supply unit 32a supplies processing liquid to the discharge head 32b via the processing liquid supply passage 32f. The processing liquid supplied to the discharge head 32b is discharged from a discharge nozzle 32c attached to the discharge head 32b and applied, for example, to the processing surface (top surface) of the wafer W. The discharge head 32b and the discharge nozzle 32c are attached to the tip of the arm 32d and move integrally with the arm 32d. The arm 32d is supported by a support shaft 32e so as to be able to move up and down, and is provided to be movable in the vertical direction inside the housing 30. The arm 32d is also provided to be able to rotate (swivel) integrally with the support shaft 32e and move in the horizontal direction. The support shaft 32e is rotated around a central axis extending in the vertical direction by a second rotational drive unit (not shown).
[0027] The processing liquid supply mechanism 32 having the above configuration can discharge the processing liquid from a discharge nozzle 32c positioned at a desired height towards any point on the processing surface (top surface) of the wafer W.
[0028] The cup 33 has two outlets 33a and 33b positioned at different locations in the vertical direction to receive the processing liquid scattered from the wafer W. The cup 33 is provided to be movable in the vertical direction by a second lifting mechanism (not shown) driven under the control of a control device 4 (see Figure 1), and the height positions of the two outlets 33a and 33b are variable. The two outlets 33a and 33b are connected to liquid discharge mechanisms 34 and 35, respectively.
[0029] The liquid discharge mechanisms 34 and 35 discharge the processed liquid collected at the two outlets 33a and 33b to the outside of the housing 30.
[0030] The liquid discharge mechanism 34 has a recovery channel 34b and a waste channel 34c connected to the outlet 33a via a flow path switch 34a. The flow path switch 34a switches the flow path into which the processed liquid from one of the outlets 33a can flow between the recovery channel 34b and the waste channel 34c. The recovery channel 34b is a channel for reusing the processed liquid recovered from one of the outlets 33a, and is provided with a cooling buffer 34d for cooling the processed liquid. The waste channel 34c is a channel for disposing of the processed liquid recovered from one of the outlets 33a.
[0031] The liquid discharge mechanism 35 has a waste channel 35a connected to the other outlet 33b. The waste channel 35a is a channel for disposing of the treated liquid recovered from the other outlet 33b.
[0032] The processing liquid supply unit 32a is provided to supply electroless plating solution and other processing liquids (e.g., cleaning solution and rinsing solution) as processing liquids to the discharge head 32b and discharge nozzle 32c. This allows the processing liquid supply mechanism 32 to perform a cleaning process using a cleaning solution, a rinsing process using a rinsing solution, or other liquid treatment on the wafer W before or after applying the electroless plating solution to the wafer W.
[0033] Figure 2 shows a simplified representation of the processing liquid supply mechanism 32, with one processing liquid supply unit 32a, one processing liquid supply passage 32f, one discharge head 32b, and one discharge nozzle 32c shown. However, the number and configuration of the processing liquid supply unit 32a, processing liquid supply passage 32f, discharge head 32b, and discharge nozzle 32c are not limited.
[0034] For example, multiple processing liquid supply units 32a, processing liquid supply channels 32f, discharge heads 32b, and / or discharge nozzles 32c may be provided. In this case, for example, a dedicated processing liquid supply unit 32a, processing liquid supply channel 32f, discharge head 32b, and / or discharge nozzle 32c may be provided for each of the multiple types of processing liquid supplied from the processing liquid supply mechanism 32 to the wafer W. Alternatively, a dedicated processing liquid supply unit 32a, processing liquid supply channel 32f, discharge head 32b, and / or discharge nozzle 32c may be provided only for one or more specific types of processing liquid. In this case, the processing liquid supply unit 32a, processing liquid supply channel 32f, discharge head 32b, and / or discharge nozzle 32c are shared for other types of processing liquid.
[0035] [Electroless plating process] As a result of diligent research, the inventors have newly discovered that using a cleaning solution that does not contain a reducing agent but contains primary metal ions during the cleaning of the wafer W before applying the electroless plating solution improves the quality of the plated metal deposited during the subsequent electroless plating process. The "primary metal ions" referred to here are metal ions also contained in the electroless plating solution, such as metal ions derived from Co (cobalt), W (tungsten), or Ru (ruthenium).
[0036] Generally, the electroless plating reaction (especially the deposition and growth of the plating metal) is affected by the wiring pattern layout on the wafer W (especially the wiring pattern density). That is, the higher the density of multiple recesses (e.g., vias and trenches) where the plating metal is to be deposited by electroless plating, the easier it is for the plating metal to deposit with good quality, and the lower the density of multiple recesses, the more difficult it is for the plating metal to deposit.
[0037] Therefore, when electroless plating is performed under certain conditions, the plating metal may be properly deposited in multiple recesses that are densely packed, but may not be properly deposited in multiple recesses that are densely packed. Consequently, when wiring of various pattern densities is created on a single wafer W by electroless plating, the wiring in areas with high pattern density may be properly formed, but the wiring in areas with low pattern density may not be properly formed.
[0038] The inventors actually performed electroless plating on a wafer W to form "high-pattern density wiring" and "low-pattern density wiring." Specifically, a wafer W was prepared that had a plurality of recesses (vias) at the bottom where Cu (copper) wiring was exposed, and electroless plating was performed to deposit Co plating in these recesses.
[0039] As a result, in recesses with high pattern density, the growth (deposition) of Co plating from the underlying Cu wiring surface was observed, but in recesses with low pattern density, the growth (deposition) of Co plating did not occur.
[0040] Through repeated trial and error, the inventors of this case discovered that one reason for these differences in electroless plating reactions depending on the wiring pattern density is that organic component residues, such as etching residues, tend to accumulate more easily in areas of the wafer W with lower pattern density than in areas with higher pattern density.
[0041] In other words, the inventors have found that, due to the treatment of the wafer W performed prior to electroless plating (e.g., etching), residue tends to accumulate more easily in areas of the wafer W with lower pattern density than in areas with higher pattern density. Since residue on the wafer W is a factor that inhibits the growth of the plated metal, it is thought that the growth of the plated metal tends to be slowed down or inhibited in areas of the wafer W with lower pattern density than in areas with higher pattern density.
[0042] The inventors of this case have confirmed that it is difficult to remove such etching residues (e.g., organic component residues) deposited on wafer W using pre-cleaning treatments or conventional alkaline cleaning treatments to remove oxides from wafer W.
[0043] After further trial and error, the inventors discovered that such etching residues could be effectively removed by cleaning the wafer W with a cleaning solution containing the same metal ions as those present in the electroless plating solution.
[0044] The inventors of this case confirmed that by cleaning a wafer W with a cleaning solution containing such metal ions and then performing electroless plating, wiring can be appropriately formed in recesses (vias) in both areas with high and low pattern density on the wafer W.
[0045] Specifically, the processing surface of wafer W, which has multiple recesses at the bottom where Cu wiring is exposed, was cleaned using a cleaning solution mainly composed of Co and W, and then electroless plating was performed to deposit CoWB plating in the recesses. As a result, appropriate growth (deposition) of CoWB plating from the underlying Cu wiring surface was confirmed regardless of the wiring pattern density (i.e., both in areas with high and low pattern density on wafer W).
[0046] It was confirmed that by using a cleaning solution mainly composed of Co and W, etching residues (such as CF (fluorocarbon)) on the wafer W can be washed away and properly removed from the wafer W.
[0047] The inventors also conducted other tests, including cleaning the treated surface of a wafer W with a cleaning solution that did not contain Co and W, followed by electroless plating to deposit CoWB plating in the recesses of the treated surface. The cleaning solution used in these other tests had the same pH and TMAH (tetramethylammonium hydroxide) concentration as the "cleaning solution mainly composed of Co and W" used in the above tests.
[0048] In other tests using a cleaning solution that did not contain Co and W to clean wafer W, etching residue on wafer W could not be properly removed, and CoWB plating did not grow (deposit) in the depressions where the pattern density on wafer W was low. The results of these other tests also indicate that using a cleaning solution containing the metal ion components (specifically Co and W) contained in the electroless plating solution when cleaning wafer W prior to electroless plating is effective in achieving good electroless plating.
[0049] The inventor of this case conducted the following verification to confirm the above findings.
[0050] In other words, the inventors confirmed the state of the treated surface of the wafer W after etching and the state of the growth of the plating metal on the treated surface of the wafer W after etching. Specifically, an etching process (SiCN etching process) was performed on the treated surface of a Cu blanket wafer, followed by an electroless plating process to deposit CoWB plating metal on the treated surface. In addition, under the same conditions, an electroless plating process was performed on the treated surface of a Cu blanket wafer without performing the SiCN etching process.
[0051] Here, the exposed surface of the Cu wiring exposed at the bottom of each recess formed in the insulating film of wafer W, which has been etched, is simulated using the "Cu blanket wafer that has undergone SiCN etching." On the other hand, the exposed surface of the Cu wiring that has not undergone SiCN etching is simulated using the "Cu blanket wafer that has not undergone SiCN etching."
[0052] As a result, scanning electron microscope (SEM) images revealed an abnormal layer on the wafer surface (Cu surface) that had undergone SiCN etching, but no such abnormal layer was observed on the wafer surface (Cu surface) that had not undergone SiCN etching.
[0053] The abnormal layer was caused by residue from the etching process and was observed in SEM images as an area with an irregular surface shape (surface state). On the other hand, the wafer surface that had not undergone SiCN etching (i.e., the Cu surface without the abnormal layer) was observed in SEM images as an area with a flat surface shape.
[0054] Furthermore, SEM images confirmed that the layer thickness of the CoWB plating metal deposited on the wafer surface that underwent SiCN etching was approximately 60% of the layer thickness of the CoWB plating metal deposited on the wafer surface that did not undergo SiCN etching.
[0055] These results indicate that etching (more specifically, the abnormal layer introduced to the wafer surface by etching) inhibits the growth of the plated metal in electroless plating.
[0056] Furthermore, the inventors sequentially performed SiCN etching, DIW cleaning, IPA cleaning, DIW cleaning, pre-cleaning, DIW cleaning, and IPA cleaning on the treated surface of the wafer W.
[0057] Here, the DIW cleaning process involves supplying DIW (Deionized Water) to the wafer processing surface to wash it off. The IPA cleaning process involves supplying IPA (Isopropyl Alcohol) to the wafer processing surface to wash it off. The pre-cleaning process involves supplying a pre-cleaning solution to the wafer processing surface to remove oxides and wash it off. Each of the DIW cleaning, IPA cleaning, and pre-cleaning processes was performed for approximately one minute.
[0058] As a result, SEM images showed that no abnormal layers were detected in areas with high wiring pattern density on the wafer processing surface, but abnormal layers were detected in areas with low wiring pattern density on the wafer processing surface.
[0059] These results indicate that removing etching residue that causes abnormal layers on the wafer surface is difficult with conventional cleaning processes (i.e., DIW cleaning, IPA cleaning, and pre-cleaning).
[0060] Furthermore, the inventors sequentially performed SiCN etching, DIW cleaning, IPA cleaning, DIW cleaning, pre-cleaning, pre-cleaning, DIW cleaning, and IPA cleaning on the treated surface of the wafer W. As described later, after these cleaning treatments, electroless plating was performed to deposit the CoWB plating metal.
[0061] Here, the pre-cleaning process involves supplying a pre-cleaning solution to the wafer processing surface to wash it clean.
[0062] The inventors of this case prepared four types of pre-cleaning solutions (pre-cleaning solutions 1 to 4) with different ingredient compositions and conducted tests using these pre-cleaning solutions in different ways.
[0063] The first pre-washing solution contained cobalt sulfate heptahydrate, tungstic acid, citric acid monohydrate, and TMAH, and did not contain a reducing agent. The second pre-washing solution contained cobalt sulfate heptahydrate, citric acid monohydrate, and TMAH, but did not contain tungstic acid or a reducing agent. The third pre-washing solution contained citric acid monohydrate and TMAH, but did not contain cobalt sulfate heptahydrate, tungstic acid, or a reducing agent. The fourth pre-washing solution contained TMAH, but did not contain cobalt sulfate heptahydrate, tungstic acid, citric acid monohydrate, or a reducing agent.
[0064] Each of the DIW cleaning, IPA cleaning, and pre-cleaning treatments took approximately 1 minute. The pre-cleaning treatment, on the other hand, took about 10 minutes.
[0065] As a result, no abnormal layer was observed on the wafer surface that had undergone pre-cleaning treatment with the first pre-cleaning solution, as seen in the SEM images.
[0066] On the other hand, slight abnormal layers were observed on the wafer surfaces that underwent pre-cleaning treatment with the second pre-cleaning solution and the wafer surfaces that underwent pre-cleaning treatment with the third pre-cleaning solution. In particular, the degree of abnormal layer on the wafer surface that underwent pre-cleaning treatment with the third pre-cleaning solution was slightly greater than the degree of abnormal layer on the wafer surface that underwent pre-cleaning treatment with the second pre-cleaning solution.
[0067] Furthermore, a considerable amount of abnormal layers were observed on the wafer surface that had undergone pre-cleaning treatment with the fourth pre-cleaning solution.
[0068] These results show that by cleaning wafer W with a cleaning solution containing the same metal ions (specifically Co ions and / or W ions) as those contained in the electroless plating solution, etching residue can be removed and the occurrence of abnormal layers can be effectively suppressed.
[0069] The inventor then performed SiCN etching, DIW cleaning, IPA cleaning, DIW cleaning, pre-cleaning, pre-cleaning, DIW cleaning, and IPA cleaning on the treated surface of the wafer W as described above, and then performed electroless plating.
[0070] The inventors of this case conducted verification tests using pre-washing solutions with different component compositions (the first to fourth pre-washing solutions described above). In particular, with respect to the second pre-washing solution containing cobalt sulfate heptahydrate, citric acid monohydrate, and TMAH, verification tests were conducted using multiple second pre-washing solutions with different concentrations of cobalt sulfate heptahydrate.
[0071] However, all pre-cleaning solutions used (pre-cleaning solutions 1 through 4) had almost the same pH (alkaline). Also, all pre-cleaning solutions used contained approximately the same concentration of TMAH. Furthermore, all pre-cleaning solutions 1 through 3 contained approximately the same concentration of citric acid.
[0072] Figure 3 shows an example of an enlarged cross-section of wafer W (particularly near one of the recesses 43).
[0073] Specifically, the inventor of this case performed a substrate liquid treatment method including pre-cleaning and electroless plating in the following sequence.
[0074] First, a wafer W (substrate) comprising wiring (wiring containing Cu) 41 and an insulating film (SiCN film) 42 provided on the wiring 41 was prepared, and the wafer W was supported by the substrate rotation holding mechanism (substrate support part) 31 of the electroless plating unit 17 (see Figure 2). The insulating film 42 has a plurality of recesses 43. Each recess 43 penetrates to the wiring 41, exposing the wiring 41 at its bottom.
[0075] Subsequently, the pre-cleaning solution described above was supplied to the wafer W from the processing solution supply mechanism (substrate cleaning section) 32 of the electroless plating processing unit 17 (see Figure 2), and the processing surface of the wafer W was cleaned (pre-cleaning treatment) using the pre-cleaning solution. The processing surface of the wafer W that receives this pre-cleaning treatment includes the surface 50 of the insulating film 42 (particularly the section 51 that demarcates each recess 43). This pre-cleaning treatment was performed using a heated pre-cleaning solution, specifically using a pre-cleaning solution heated to 55°C or higher (for example, about 80°C).
[0076] Subsequently, electroless plating solution was supplied from the processing solution supply mechanism (electroless plating section) 32 of the electroless plating unit 17 (see Figure 2) to the wafer W after the pre-cleaning treatment described above, and electroless plating treatment was performed to deposit plating metal in each recess 43.
[0077] The electroless plating solution actually used contained cobalt sulfate heptahydrate, tungstic acid, citric acid monohydrate, TMAH, and DMAB (dimethylamine borane; reducing agent) to deposit the CoWB plating metal. The electroless plating process was carried out using the heated electroless plating solution, specifically using a solution heated to 40°C or higher (for example, around 65°C).
[0078] The inventor of this case measured the film thickness of the plated metal (CoWB) deposited on the wafer surface that had undergone the above-described pre-cleaning and electroless plating processes.
[0079] As a result, on wafer surfaces that underwent pre-cleaning treatment using the third and fourth pre-cleaning solutions, which did not contain metal ions derived from Co and W, the plating metal film thickness was very small, and almost no plating metal was deposited, both in areas with high and low pattern density.
[0080] On the other hand, wafer surfaces that underwent pre-cleaning treatment using the first and second pre-cleaning solutions containing metal ions derived from Co and / or W showed a greater deposition of plating metal film than wafer surfaces that underwent pre-cleaning treatment using the third and fourth pre-cleaning solutions. In particular, wafer surfaces that underwent pre-cleaning treatment using the first pre-cleaning solution containing metal ions derived from Co and W showed deposition of plating metal of approximately the same and sufficient thickness in both areas with high and low pattern density.
[0081] On wafer surfaces that underwent pre-cleaning treatment using the second pre-cleaning solution, when the concentration of cobalt sulfate in the second pre-cleaning solution was low (specifically, lower than the concentration of cobalt sulfate in the first pre-cleaning solution), the plating metal film thickness was small. On the other hand, when the concentration of cobalt sulfate in the second pre-cleaning solution was high (specifically, higher than the concentration of cobalt sulfate in the first pre-cleaning solution), a sufficient thickness of plating metal was deposited on wafer surfaces that underwent pre-cleaning treatment using the second pre-cleaning solution. However, when the concentration of cobalt sulfate in the second pre-cleaning solution was high, the thickness of the plating metal deposited on the wafer surface was slightly greater in areas with high pattern density than in areas with low pattern density.
[0082] The inventors of this case conducted verification tests by varying the immersion time (pre-cleaning time) of the wafer processing surface in the pre-cleaning solution in the pre-cleaning treatment using the first and second pre-cleaning solutions described above. As a result, for all wafer processing surfaces that underwent pre-cleaning treatment using the first and second pre-cleaning solutions, the longer the pre-cleaning time, the thicker the plating metal film deposited on the wafer processing surface became.
[0083] These results indicate that pre-cleaning with a pre-cleaning solution containing metal ions common to the electroless plating solution (specifically Co and W) but without reducing agents improves the quality of the subsequent electroless plating process. In particular, setting a sufficiently long pre-cleaning time ensures that organic component residues (such as CF residue) on the wafer surface are sufficiently removed, significantly improving the quality of the subsequent electroless plating process.
[0084] As explained above, by performing a pre-cleaning treatment using a pre-treatment solution that does not contain a reducing agent and contains metal ions (e.g., ions derived from Co and / or W) that are also present in the electroless plating solution, etching residue can be effectively removed from the wafer processing surface. As a result, in the subsequent electroless plating process, the plating metal (CoWB plating metal) can be deposited onto the wafer processing surface with good quality and efficiency.
[0085] In particular, it is preferable that the plating metal deposited on the wafer processing surface by electroless plating includes a metal obtained by the reduction of metal ions (first metal ions) contained in the pretreatment solution. In this case, the electroless plating reaction is expected to be accelerated, and the deposition rate of the plating metal and the rate of film thickness increase on the wafer processing surface can be improved.
[0086] The pre-cleaning solution and electroless plating solution described above are merely examples, and their compositions are not limited. The metal ions (first metal ions) commonly contained in both the pre-cleaning solution and the electroless plating solution are also not limited. Therefore, the plating metal deposited on the wafer surface by the electroless plating process is not limited; for example, at least one of cobalt, nickel, and ruthenium may be included in the plating metal.
[0087] Furthermore, the plated metal and the wiring 41 may contain a common metal component. For example, copper plating may be deposited on copper wiring 41 exposed at the bottom of the recess 43 of the wafer W by applying an electroless plating solution containing copper-derived ions. Alternatively, as described later, ruthenium plating may be deposited on ruthenium wiring 41 exposed at the bottom of the recess 43 of the wafer W by applying an electroless plating solution containing ruthenium-derived ions.
[0088] Furthermore, the wiring 41 may contain a metal that exhibits a greater ionization tendency than the metal obtained by the reduction of metal ions (first metal ions) commonly contained in the pre-cleaning solution and the electroless plating solution. In this case, during the pre-cleaning process, the portion of the wiring 41 exposed in the recess 43 is more likely to dissolve in the pre-cleaning solution, and it is expected that the exposed surface of the wiring 41 will become fresher.
[0089] In the example described above, the pre-cleaning treatment and the electroless plating treatment are performed in the same processing unit 16 (i.e., the electroless plating treatment unit 17), but they may be performed in separate processing units 16. Furthermore, the pre-cleaning treatment and the electroless plating treatment may be performed in the same substrate liquid treatment system (multilayer wiring formation system 1), or they may be performed in separate substrate liquid treatment systems.
[0090] From the viewpoint of performing electroless plating with good quality, it is preferable to shorten the elapsed time between the pre-cleaning treatment and the electroless plating treatment, shorten the travel distance of the wafer W, and minimize the exposure of the wafer W to the outside air which may contain foreign matter such as dust. Therefore, it is preferable that the pre-cleaning treatment and the electroless plating treatment be performed in the same processing unit 16, and in particular, that the opening and closing loading / unloading section of the processing unit 16 be kept closed during the treatment.
[0091] Furthermore, performing the pre-cleaning and electroless plating processes in the same substrate solution treatment system, rather than in separate systems, is expected to result in higher quality plating metal deposited on the wafer W by electroless plating.
[0092] The substrate liquid processing system referred to herein may refer to any system that includes, for example, an loading / unloading station 2 and a processing station 3 as shown in Figure 1. In a certain substrate liquid processing system, after a wafer W is sent from the loading / unloading station 2 to the processing station 3, it may not be returned to the loading / unloading station 2, but instead undergo pre-cleaning and electroless plating in one or more processing units 16 of the processing station 3. In this case, the wafer W may be returned to the loading / unloading station 2 after the pre-cleaning and electroless plating processes have been performed.
[0093] [First variation] The substrate liquid treatment method of the above-described embodiment may include a step of removing the wiring 41 exposed in the recesses 43 of the wafer W before the pre-cleaning treatment is performed. Any method can be used to remove the wiring 41 exposed in the recesses 43 of the wafer W, and may be performed, for example, by reverse sputtering.
[0094] Figures 4A to 4E are diagrams illustrating an example of a substrate liquid treatment method according to the first modified example, and show an enlarged cross-section of the wafer W (particularly the area near one of the recesses 43).
[0095] First, a wafer W comprising wiring 41 and an insulating film 42 provided on the wiring 41 is placed in a reverse sputtering unit 18 (processing unit 16 (see Figure 1)) (see Figure 4A). The insulating film 42 has a plurality of recesses 43, each recess 43 penetrating to the wiring 41, and the wiring 41 is exposed at the bottom of the recess 43.
[0096] Subsequently, the wafer W undergoes reverse sputtering in the reverse sputtering unit 18. Specifically, the reverse sputtering unit 18 uses the wafer W as a target and applies a high voltage to the wafer W to generate a glow discharge, thereby ionizing the reverse sputtering gas G that has filled the area around the wafer W and causing it to collide with the wiring 41 exposed in the recesses 43 (see Figure 4B).
[0097] As a result, as shown in Figure 4C, the portion of the wiring 41 near the exposed surface in the recess 43 is ejected by the reverse sputtering gas G, and a fresh surface (new surface) of the wiring 41 is exposed at the bottom of the recess 43. On the other hand, the portion of the wiring 41 that has been ejected by the reverse sputtering gas G (i.e., the reverse sputtered metal 45) adheres to the surface 50 of the insulating film 42 (including the partition surface 51 that defines the recess 43).
[0098] The specific apparatus of the reverse sputtering unit 18 is not limited. For example, the reverse sputtering unit 18 can perform the above-mentioned reverse sputtering process using an apparatus that is an application of a known sputtering apparatus equipped with a voltage application device and a reverse sputtering gas supply device. The specific composition of the reverse sputtering gas G is also not limited; for example, argon can be used as the reverse sputtering gas G, but any other gas (for example, a noble gas element other than argon or nitrogen) may be used.
[0099] Subsequently, the wafer W is placed inside the electroless plating unit 17 (processing unit 16 (see Figure 1)).
[0100] The wafer W then undergoes the above-described pre-cleaning treatment in the electroless plating unit 17, where the reverse sputtered metal 45 adhering to the surface 50 of the insulating film 42 is removed (Figure 4D). In other words, the reverse sputtered metal 45 is removed from the wafer W by a pre-cleaning treatment using a pre-treatment solution that does not contain a reducing agent and contains metal ions (for example, ions derived from Co and / or W (first metal ions)) that are also contained in the electroless plating solution.
[0101] The wiring 41 may also contain a metal that exhibits a greater ionization tendency than the metal obtained by the reduction of metal ions (first metal ions) contained in both the pre-cleaning solution and the electroless plating solution. In this case, the pre-cleaning treatment may cause the exposed surface of the wiring 41 at the bottom of the recess 43 to dissolve into the pre-cleaning solution, exposing a fresher surface of the wiring 41 at the bottom of the recess 43.
[0102] Subsequently, the wafer W undergoes the electroless plating process described above in the electroless plating unit 17, and plating metal 47 is deposited in each recess 43. The plating metal 47 may have the same composition as the wiring 41 (e.g., ruthenium), or it may have a different composition from the wiring 41.
[0103] According to this modified example, before the pre-cleaning treatment is performed, the wiring 41 exposed in the recess 43 of the wafer W is removed, and the fresh surface of the wiring 41 is exposed at the bottom of the recess 43. This improves the reactivity of the subsequent electroless plating treatment.
[0104] In particular, by using a pre-treatment solution that does not contain a reducing agent and contains metal ions (first metal ions) that are also contained in the electroless plating solution during the pre-cleaning process, the reverse sputtered metal 45 adhering to the surface 50 of the insulating film 42 can be effectively removed. Therefore, in the subsequent electroless plating process, it is possible to suppress the growth of the plating metal from the surface 50 of the insulating film 42 (for example, the area 51) to which the reverse sputtered metal 45 has adhered, while allowing the plating metal to grow from the bottom of the recess 43.
[0105] As a result, the plating metal can be deposited in each recess 43 in a bottom-up manner, preventing defects such as void formation and enabling the formation of high-quality wiring (plated metal 47) in each recess 43.
[0106] The inventors of this case verified the effects described above that are brought about by this modified example.
[0107] In other words, multiple wafers W that had undergone the reverse sputtering process described above (see Figures 4A to 4C) were prepared. Then, some of these wafers W were subjected to the pre-cleaning process described above (Figure 4D), followed by electroless plating (see Figure 4E). On the other hand, the electroless plating was performed on the other wafers W without the pre-cleaning process described above (Figure 4D) (see Figure 4E).
[0108] As a result, SEM images confirmed that the plating metal 47 was uniformly filled into each recess 43 of the wafer W that underwent electroless plating after the pre-cleaning treatment.
[0109] On the other hand, in wafers W that underwent electroless plating without prior cleaning, the plating metal 47 was found to be unevenly filled into each recess 43, and it was also confirmed that the plating metal 47 was irregularly deposited on the surface 50 of the insulating film 42 surrounding each recess 43.
[0110] These results indicate that performing the above-described pre-cleaning treatment after reverse sputtering is advantageous for uniformly and selectively depositing the plating metal 47 into each recess 43 of the wafer W by the subsequent electroless plating treatment.
[0111] [Other variations] It should be noted that the embodiments and modifications disclosed herein are illustrative in all respects and should not be construed restrictively. The embodiments and modifications described above may be omitted, substituted, and modified in various ways without departing from the scope and spirit of the appended claims. For example, the embodiments and modifications described above may be combined in part or in whole, and other embodiments may be combined in part or in whole with the embodiments or modifications described above.
[0112] Furthermore, the technical categories that embody the above-described technical concept are not limited. For example, the above-described apparatus may be applied to other apparatuses. The above-described technical concept may also be embodied by a computer program that causes a computer to execute one or more steps included in the above-described method. The above-described technical concept may also be embodied by a computer-readable, non-transitory recording medium on which such a computer program is recorded.
Claims
1. A step of preparing a substrate comprising wiring and an insulating film provided on the wiring, wherein the insulating film has a recess that penetrates to the wiring and exposes the wiring, A step of performing a pre-cleaning treatment, which involves cleaning the surface of the insulating film, including the partition screen that demarcates the recesses, using a pre-cleaning solution that does not contain a reducing agent but contains a first metal ion, A step of performing an electroless plating treatment using an electroless plating solution containing the first metal ions to deposit plating metal in the recesses of the substrate after the pre-cleaning treatment, Includes, The wiring contains a metal that exhibits a greater ionization tendency than the metal obtained by the reduction of the first metal ion. Substrate liquid treatment method.
2. The substrate liquid treatment method according to claim 1, wherein the pre-cleaning treatment is performed using the heated pre-cleaning liquid.
3. The substrate liquid treatment method according to claim 1 or 2, wherein the pre-cleaning treatment is performed using the pre-cleaning liquid at a temperature of 55°C or higher.
4. The substrate liquid treatment method according to claim 1 or 2, wherein the plating metal includes a metal obtained by the reduction of the first metal ion.
5. The substrate liquid treatment method according to claim 1 or 2, wherein the plating metal comprises at least one of cobalt, nickel, and ruthenium.
6. The substrate liquid treatment method according to claim 1 or 2, wherein the plated metal and the wiring contain a common metal component.
7. The substrate liquid treatment method according to claim 1 or 2, wherein the wiring comprises copper.
8. The substrate liquid treatment method according to claim 1 or 2, further comprising the step of removing the wiring exposed in the recess before the aforementioned pre-cleaning treatment is performed.
9. The substrate liquid treatment method according to claim 8, wherein the removal of the wiring exposed in the recess is performed by reverse sputtering.
10. The substrate liquid treatment system includes an input / output station and a treatment station. The aforementioned substrate is After being sent from the loading / unloading station to the processing station, the pre-cleaning process and the electroless plating process are performed at the processing station without being returned to the loading / unloading station. The substrate liquid treatment method according to claim 1 or 2, wherein after the pre-cleaning treatment and the electroless plating treatment are performed, the substrate is returned to the loading / unloading station.
11. The substrate liquid treatment method according to claim 1 or 2, wherein the pre-cleaning treatment and the electroless plating treatment are performed in the same treatment unit.
12. A substrate support portion for supporting a substrate comprising wiring and an insulating film provided on the wiring, wherein the insulating film has a recess that penetrates to the wiring and exposes the wiring, A substrate cleaning unit that supplies a pre-cleaning solution that does not contain a reducing agent but contains a first metal ion to the substrate and performs a pre-cleaning treatment to clean the surface of the insulating film including the partition screen that demarcates the recesses, An electroless plating treatment unit that supplies the electroless plating solution containing the first metal ions to the substrate to deposit the plating metal in the recesses of the substrate after the pre-cleaning treatment, Equipped with, The wiring contains a metal that exhibits a greater ionization tendency than the metal obtained by the reduction of the first metal ion. Substrate liquid treatment device.
Citation Information
Patent Citations
Method of prolonging effective life of acidic chloride aqueous solution and device therefor
JP1984208078A
Method and apparatus for substrate treatment
JP2004300576A
Wiring board and manufacturing method thereof
JP2021072443A
Electroless copper plating
US3694250A
Multilayer wiring forming method and storage medium
WO2019163531A1