Semiconductor equipment

Abstract

An object is to suppress deterioration in characteristics of a transistor in a driver circuit.SOLUTION: The semiconductor device includes a first switch which is turned on or off in accordance with a first input signal to control whether or not a potential state of an output signal is set, and a second switch which is turned on or off in accordance with a second input signal to control whether or not the potential state of the output signal is set, and the first wiring and the second wiring are brought into a conduction state or a non-conduction state by turning on or off the first switch or the second switch.SELECTED DRAWING: Figure 1

Description

[[Technical Field]]

[0001] The present invention relates to a semiconductor device, a display device, a liquid crystal display device, a driving method thereof, or a method for manufacturing the same . In particular, the present invention relates to a semiconductor device having a driver circuit formed on the same substrate as a pixel portion, a display device, a liquid crystal display device, or a driving method thereof. The present invention also relates to an electronic device including the semiconductor device, the display device, or the liquid crystal display device. [[Background Art]]

[0002] In recent years, display devices have been actively developed along with the increase in the size of large display devices such as liquid crystal televisions . In particular, a technology for forming a driver circuit such as a gate driver on the same substrate as a pixel portion using a transistor formed of a non-single-crystal semiconductor greatly contributes to cost reduction and improvement in reliability, and thus has been actively developed.

[0003] A transistor formed of a non-single-crystal semiconductor causes deterioration such as variation in threshold voltage or decrease in mobility . As the deterioration of the transistor progresses, the driver circuit becomes difficult to operate, which causes a problem that an image cannot be displayed. Therefore, Patent Document 1, Patent Document 2, and Non- Patent Document 1 disclose that deterioration of a transistor having a function of lowering an output signal of a flip-flop to L level (also referred to as low level) (hereinafter also referred to as a pull-down transistor) can be suppressed , and a shift register capable of suppressing such deterioration is disclosed. In these documents, two pull-down transistors are used. The two pull-down transistors are connected between an output terminal of a flip-flop and a wiring to which VSS (hereinafter referred to as a negative power supply) is supplied. And one pull-down transistor and the other pull-down transistor are alternately turned on (in an on state​ (Also known as) This will turn on each pull-down transistor. Since the time required is shortened, the degradation of the pull-down transistor's characteristics can be suppressed. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2005-50502 [Patent Document 2] Japanese Patent Publication No. 2006-24350 [Non-patent literature]

[0005] [Non-Patent Document 1] Yong Ho Jang, et al., “Integrated Gate Driver Circuit Using a-Si TFT with Dual Pull-down Structure”, Proceedings of The 11th International Display Workshops 2004, pp.333-336 [Overview of the project] [Problems that the invention aims to solve]

[0006] In the configuration of conventional technology, a transistor (hereinafter) is used to control the output signal to a high level. The gate potential of a pull-up transistor (also called a pull-up transistor) is the positive power supply voltage or the clock signal. The potential may become higher than the high level. For this reason, a pull-up transistor is used. A large voltage may be applied. Or, it may be connected to the gate of a pull-up transistor. A large voltage may be applied to the transistor being subjected to this process. Or, the transistor may be inferior. Even if modified, the transistors that make up the shift register will still function. The channel width may be large. Or, if the channel width of the transistor is large, the transistor A short circuit may occur between the gate of the starter and the source or drain. Or, As the channel width of the transistor increases, each transistor that makes up the shift register In some cases, the parasitic capacity may increase.

[0007] One aspect of the present invention aims to suppress the degradation of transistor characteristics. Alternatively, the present invention One embodiment of the present invention aims to reduce the channel width of the transistor. One embodiment involves suppressing the degradation of the pull-up transistor's characteristics or reducing the channel width. The problem is to increase the amplitude of the output signal. Alternatively, one aspect of the present invention aims to increase the amplitude of the output signal. Alternatively, one aspect of the present invention aims to increase the on-time of the transistors in a pixel. Alternatively, one aspect of the present invention aims to improve insufficient writing to pixels. Alternatively, one aspect of the present invention aims to shorten the fall time of the output signal. One aspect of the present invention aims to shorten the rise time of the output signal. One aspect of the invention involves writing a video signal to a pixel belonging to another row to a pixel belonging to a certain row. The objective is to prevent this from happening. Alternatively, the fall time of the output signal of the drive circuit may be affected. The challenge is to reduce glitches, or to make the feedthrough effect on each pixel constant. The objective is to reduce crosstalk. One embodiment aims to reduce the layout area. Alternatively, one embodiment of the present invention aims to reduce the layout area. The objective is to narrow the frame of the display device. Alternatively, one aspect of the present invention relates to a display device that provides high resolution. An object of the present invention is to achieve the above. Alternatively, according to one embodiment of the present invention, an object is to increase yield . Alternatively, according to one embodiment of the present invention, an object is to reduce manufacturing costs. Alternatively, according to one embodiment of the present invention, an object is to reduce blunting of an output signal. Alternatively, according to one embodiment of the present invention, an object is to reduce out put signal delay. Alternatively, according to one embodiment of the present invention, an object is to reduce power consumptio n. Alternatively, according to one embodiment of the present invention, an object is to reduce the current supply capability of an external circui t. Alternatively, according to one embodiment of the present invention, an object is to reduce the size of an external circuit or the size of a display device includ ing the external circuit. Note that the description of these objects does not preclude the existence of other o bjects. Note that one embodiment of the present invention does not need to solve all of these obje cts. Means for Solving the Problems

[0008] One embodiment of the present invention receives a first input signal, a second input signal, and a third input signal, and includes: a driver circuit that outputs an output signal; and a pixel that includes a liquid crystal element and in which a voltage to be applie d to the liquid crystal element is set in accordance with the output signal. The driver circuit includes: a first switch and a second switch which are turned on or o ff in accordance with the third input signal; a third switch whether the first input signal is input to which is controlled by turning on or off of the first switch, and which controls whether a potential state of the output signal is set by being turned on or off in accorda nce with the first input signal; and a fourth switc h whether the second input signal is input to which is controlled by turning on or off of the second switch, and which controls whether the potential state of the output signal is set by being turned on or off in accordance with the second input signal. This is the liquid crystal disp lay device . ​

[0009] One aspect of the present invention is a system in which a first input signal, a second input signal, and a third input signal are input, It has a drive circuit that outputs an output signal and a liquid crystal element, and the output signal is applied to the liquid crystal element according to the output signal. A pixel has a voltage set, and the drive circuit has a gate, source, and drain. A third input signal is input to the gate, and a first input signal is input to either the source or the drain. A first transistor is powered, and a third transistor has a gate, source, and drain, with the gate being... A second input signal is input to one of the source and drain terminals. A transistor having a gate, source, and drain, the gate being the source of the first transistor The other end of the drain and the other end of the circuit are electrically connected, and the output signal is generated when the circuit is turned on or off. A third transistor that controls whether or not to set the potential state, and gate, source, and do It has a rain, and its gate is electrically connected to the source and drain of the second transistor. This controls whether or not to set the potential state of the output signal by switching it on or off. A liquid crystal display device having a fourth transistor.

[0010] One aspect of the present invention relates to a first input signal, a second input signal, a third input signal, and a fourth input It has a drive circuit that receives a signal and outputs an output signal, and a liquid crystal element that reacts to the output signal by liquid crystal The device has a pixel on which a voltage is set applied to the crystal element, and the drive circuit receives a first input signal. The first wiring to be powered, the second wiring to which the second input signal is input, and the third input signal A third wire to be powered, a fourth wire to which the fourth input signal is input, gate, source, and It has a drain, the gate is electrically connected to a third wiring, and one of the source and drain A first transistor electrically connected to the first wiring, and gate, source, and slave It has a gate that is electrically connected to a third wiring, and one of the source and drain is a second A second transistor electrically connected to the wiring has a gate, source, and drain. The gate is electrically connected to the source and the other drain of the first transistor, and the source and a third transistor with one of its drains electrically connected to a fourth wire, and a gate, Having a source and a drain, the gate is the other of the source and drain of the second transistor. The fourth is electrically connected to the fourth wiring, with one of the source and drain being electrically connected to the fourth wiring. The transistor, the source and drain of the third transistor, and the fourth transistor The source and drain of the zista are electrically connected, and the potential given is the power of the output signal. This is a liquid crystal display device having a fifth wiring that is in the position of [position].

[0011] One aspect of the present invention relates to a first input signal, a second input signal, a third input signal, and a fourth input It has a drive circuit that receives a signal and outputs an output signal, and a liquid crystal element that moves according to the output signal. The device has a pixel on which a voltage is set applied to the crystal element, and the drive circuit receives a first input signal. The first wiring to be powered, the second wiring to which the second input signal is input, and the third input signal A third wire to be powered, a fourth wire to which the fourth input signal is input, gate, source, and It has a gate and a drain, and one of the source and drain is electrically connected to the first wiring. A first transistor having a gate, source, and drain, with the gate and source A second transistor in which one of the drains and the other is electrically connected to a second wire, and a gate It has a source and a drain, and the gate is the same as the source and drain of the first transistor. The third is electrically connected to the third wiring, with one of the source and drain being electrically connected to the third wiring. It has three transistors, a gate, a source, and a drain, and the gate is a second transistor The source and drain of the other are electrically connected, and one of the source and drain is the fourth A fourth transistor electrically connected to the wiring, and the source and drain of the third transistor. It is electrically connected to the other side of the input and to the other side of the source and drain of the fourth transistor. A liquid crystal display device having a fifth wiring whose applied potential becomes the potential of the output signal.

[0012] One aspect of the present invention is a system in which a first input signal and a second input signal are input, and an output signal is output. The system includes a drive circuit and liquid crystal elements, and the voltage applied to the liquid crystal elements is set according to the output signal. The device has pixels, and the drive circuit has a first wiring to which a first input signal is input, and a second input signal A second wire into which a signal is input has gate, source, and drain, with gate and source A first transistor in which one of the drains and the gate is electrically connected to the first wiring, and It has a source and a drain, and the gate and one of the source and drain are connected to a second wiring. A second transistor is electrically connected, and has a gate, source, and drain. The source and drain of the first transistor are connected to the other source and drain of the first transistor. A third transistor is electrically connected, and has a gate, source, and drain. The source and drain of the second transistor are connected to the other source and drain of the second transistor. An electrically connected fourth transistor and the source and drain of the third transistor The other side is electrically connected to the other side of the source and drain of the fourth transistor, given A liquid crystal display device having a third wiring whose potential becomes the potential of the output signal.

[0013] In one embodiment of the present invention, the channel width of the third transistor is set to the channel width of the fourth transistor. It can also be made equal to the channel width.

[0014] Furthermore, in one embodiment of the present invention, the channel width of the first transistor is set to the channel width of the third transistor The channel width of the second transistor is made smaller than that of the fourth transistor. It can also be made smaller than the channel width.

[0015] One aspect of the present invention is a system in which a first input signal and a second input signal are input, and an output signal is output. The system includes a drive circuit and liquid crystal elements, and the voltage applied to the liquid crystal elements is set according to the output signal. The device has pixels, and the drive circuit has a first wiring to which a first input signal is input, and a second input signal A second wire into which a signal is input has gate, source, and drain, with gate and source A first transistor in which one of the drains and the gate is electrically connected to the first wiring, and It has a source and a drain, and the gate and one of the source and drain are connected to a second wiring. It has an electrically connected second transistor and a positive and a negative electrode, the positive electrode being the first A first diode electrically connected to the source and the other drain of the transistor, and It has a positive terminal and a negative terminal, with the positive terminal electrically connected to the other of the source and drain of the second transistor. The second diode is connected to the negative terminal of the first diode and the negative terminal of the second diode. A liquid crystal having a third wire that is electrically connected and whose applied potential becomes the potential of the output signal. It is a display device.

[0016] In one embodiment of the present invention, the channel width of the first transistor is set to the second transistor It can also be made equal to the channel width.

[0017] One aspect of the present invention is a liquid crystal display device as described above, and a device for controlling the operation of the liquid crystal display device. It is an electronic device having at least an operating switch.

[0018] Furthermore, various types of switches can be used. As an example of a switch... For this purpose, an electrical switch or a mechanical switch can be used. The "chi" can be anything that can control electric current, and is not limited to any specific type.

[0019] One example of a switch is a transistor (for example, a bipolar transistor, a MOS transistor). (e.g., transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes) - Diode, MIM (Metal Insulator Metal) diode, M IS (Metal Insulator Semiconductor) diode, Examples include diode-connected transistors, or logic circuits combining these. One example of a mechanical switch is a digital micromirror device (DMD), There are switches that use MEMS (Micro-Electro-Mechanical Systems) technology. A switch has electrodes that can be moved mechanically, and when these electrodes move, a conductor is generated. It operates by controlling the flow between conductive and non-conductive states.

[0020] Furthermore, both N-channel transistors and P-channel transistors can be used as switches. A CMOS type switch may also be used.

[0021] Furthermore, a display element, a display device having a display element, a light-emitting element, and a device having a light-emitting element Light-emitting devices, which are devices that emit light, can use various forms or have various elements. Examples of display elements, display devices, light-emitting elements, or light-emitting devices include EL (electroluminescent). Nessence) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors (current Transistors that emit light in response to light emission, electron emission elements, liquid crystal elements, electronic inks, electrophoretic elements Grating light bulbs (GLVs), digital micromirror devices (DMDs) Carbon nanotubes, etc., exert electromagnetic effects that affect contrast, brightness, reflectivity, Some display media have varying transmittance and other properties. Furthermore, some display devices use plasma displays. It can also be a ray or piezoelectric ceramic display. Display device using EL elements One example is an EL display. Therefore, a Field Emission Display (FED) or SED (Surface-C) (onduction Electron-emitter Display) type flat type Examples include displays. One example of a display device using liquid crystal elements is a liquid crystal display. (Transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct viewing) Examples include liquid crystal displays (LCDs) and projection liquid crystal displays. Electronic ink or electrophoretic elements are also used. An example of a display device that uses this technology is electronic paper.

[0022] One example of a liquid crystal element is one that controls the transmission or non-transmission of light through the optical modulation effect of liquid crystals. There is an element. This element can be composed of a pair of electrodes and a liquid crystal layer. The optical modulation effect of liquid crystals is due to the electric field acting on the liquid crystal (horizontal electric field, vertical electric field, or diagonal electric field). It is controlled by (including the electric field). Specifically, an example of a liquid crystal element is Nema Titic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, discotic liquid crystal, thermotronic PDL (Polymer Liquid Crystal), lyotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PDL) C) Ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain polymer liquid crystal, plasma address liquid PALC (Passive LCD), Banana-shaped LCD, TN (Twisted Nematic) mode, ST N (Super Twisted Nematic) mode, IPS (In-Plane) -Switching) mode, FFS (Fringe Field Switchin) g) Mode, MVA (Multi-domain Vertical Alignmen) t) Mode, PVA (Patterned Vertical Alignment), ASV (Advanced Super View) mode, ASM (Axially Symmetric Micro-cell) mode, OCB (Opt ECB (Electronic Compensated Birefringence) mode, ECB (E Controlled Birefringence) mode FLC (Ferroelectric Liquid Crystal) mode, AF LC (AntiFerroelectric Liquid Crystal) mode, PDLC (Polymer Dispersed Liquid Crystal) mode This includes modes such as guest host mode and blue phase mode. Yes, it is possible. However, it is not limited to this, and various materials can be used as liquid crystal elements.

[0023] Furthermore, transistors with various structures can be used as transistors. Therefore, There are no limitations on the type of transistor. Examples of transistors include amorphous silicon and multi-phase transistors. Crystalline silicon, also known as microcrystals, nanocrystals, or semi-amorphous silicon. ) Thin-film transistors (TFTs) having non-single-crystal semiconductor films such as silicon, etc. You can use it.

[0024] Examples of transistors include ZnO, α-InGaZnO, SiGe, and GaAs. IZO (indium zinc oxide), ITO (indium tin oxide), SnO, TiO, Transistors having compound semiconductors or oxide semiconductors such as AlZnSnO(AZTO) or using thin-film transistors made by thinning these compound semiconductors or oxide semiconductors It is possible.

[0025] Another example of a transistor is a transistor formed using an inkjet method or printing method. You can use a generator, etc.

[0026] Another example of a transistor is one that contains organic semiconductors or carbon nanotubes. A device such as a ZISTA can be used.

[0027] Furthermore, various other transistor structures can be used. For example, transistors include MOS transistors, junction transistors, and bipolar transistors. Transistors and the like can be used.

[0028] Another example of a transistor is a multi-gate transistor with two or more gate electrodes. A ZISTA can be used.

[0029] Another example of a transistor is a structure in which gate electrodes are arranged above and below the channel. A transistor can be applied.

[0030] Another example of a transistor is a configuration in which the gate electrode is located above the channel region. Structure, a structure in which the gate electrode is located below the channel region, a positive staggered structure, an inverse staggered structure , a structure in which the channel region is divided into multiple regions, a structure in which the channel regions are connected in parallel, or Transistors with a structure in which the channel regions are connected in series can be used.

[0031] Another example of a transistor is one in which the channel region (or part thereof) contains a source electrode or A transistor with a structure in which the drain electrodes overlap can be used.

[0032] Another example of a transistor is an LDD (Lightly Doped Drain). A transistor with a structure that includes a region can be applied.

[0033] Furthermore, the type of substrate used to form the transistor is not limited to a specific type, but can vary. A semiconductor substrate can be used to form a transistor. One example of such a substrate is a semiconductor substrate. Body substrates, single crystal substrates (e.g., silicon substrates), SOI substrates, glass substrates, quartz substrates, plastic It has a plastic substrate, a metal substrate, a stainless steel substrate, and stainless steel foil. Substrates, tungsten substrates, substrates having tungsten foil, flexible substrates, laminated Examples include glass films, paper containing fibrous materials, or base films. For example, barium borosilicate glass, aluminoborosilicate glass, or soda-lime glass. Examples include polyethylene terephthalate (PET) and polypropylene. Polyethylene naphthalate (PEN) and polyethersulfone (PES) are representative examples of polyethylene naphthalate. Examples include plastic or flexible synthetic resins such as acrylic. Laminated film Examples include polypropylene, polyester, vinyl, polyvinyl fluoride, or chloride Examples include vinyl. Examples of base films include polyester, polyamide, and polyimi. These include inorganic vapor-deposited films, or paper products. In particular, semiconductor substrates, single crystal substrates, or SO By manufacturing transistors using substrates such as I-boards, characteristics, size, or shape can be improved. It is possible to manufacture transistors with less variation, high current capacity, and small size. It is possible. When a circuit is constructed using such transistors, the power consumption of the circuit can be reduced, or the rotation This allows for a higher concentration of roads.

[0034] Furthermore, a transistor is formed using one substrate, and then the transistor is transferred to another substrate. Alternatively, the transistor may be placed on a different substrate. An example of a substrate on which the transistor is relocated. In addition to the substrates on which the aforementioned transistors can be formed, paper substrates, cellophane Substrates: stone substrates, wood substrates, fabric substrates (natural fibers (silk, cotton, linen), synthetic fibers (nylon, Polyurethane, polyester) or regenerated fibers (acetate, cupro, rayon, recycled) These include raw polyester, leather substrates, or rubber substrates. This improves the electrical characteristics of the transistor or reduces its power consumption. Furthermore, it is possible to improve the reliability and heat resistance of devices using transistors, and light It can be made smaller or thinner.

[0035] Furthermore, all the circuits necessary to achieve the specified function are placed on the same substrate (for example, glass It can be formed on substrates, plastic substrates, single crystal substrates, or SOI substrates, etc. This reduces costs by reducing the number of components, or by reducing the number of connections to circuit components. This can lead to improved reliability.

[0036] Furthermore, it is not necessary to form all the circuits required to achieve a given function on the same circuit board. It is possible. In other words, some of the circuits necessary to realize a predetermined function are formed on a certain substrate. Furthermore, another part of the circuit necessary to achieve the predetermined function is formed on a separate substrate. It is possible to do so. For example, a part of the circuit necessary to realize a certain function is made of glass. Formed on a substrate, another part of the circuit necessary to realize a predetermined function is a single crystal. It can be formed on a substrate (or SOI substrate). And it can realize a predetermined function. A single crystal substrate on which another part of the circuit necessary for this purpose has been formed is called COG (Chip On G A circuit is provided on a glass substrate by connecting it to a glass substrate. It is possible to place objects (also called IC chips). Alternatively, the IC chip can be placed in a TAB (Tape Automated Bonding), COF (Chip On Fil) m), SMT (Surface Mount Technology), or printed circuit board It is possible to connect to a glass substrate using a plate or similar. In this way, part of the circuit is a pixel. Because it is formed on the same substrate as the part, cost reduction is achieved by reducing the number of components, or the number of parts Reliability can be improved by reducing the number of connection points with road components. In particular, when the drive voltage is high Circuits in high-frequency or high-drive-frequency areas consume more power. In many cases, such circuits are placed on a separate substrate (for example, a single-crystal substrate) from the pixel section. Form and configure an IC chip. By using this IC chip, the power consumption increases It can prevent damage.

[0037] Furthermore, a transistor must include, for example, a gate, a drain, and a source, and at least three components. An element having terminals can be used. The element has between the drain region and the source region. It has a channel region, and current flows through the drain region, the channel region and the source region. It can be used to allow current to flow. Here, source and drain refer to the structure or operating conditions of the transistor, etc. Because it varies depending on the circumstances, it is difficult to determine which is the source and which is the drain. Therefore, the region that functions as a source and the region that functions as a drain are defined as source or It's not always called a drain. In that case, for example, it might be either a source or a drain. One side is referred to as the first terminal, first electrode, or first region, and the other side is referred to as the second terminal, second electrode, or This is sometimes referred to as the second region. Also, the gate may be referred to as the third terminal or third electrode. There is.

[0038] A transistor has at least three terminals, including a base, emitter, and collector. It may also be an element that does the same. Similarly in this case, as an example, one of the emitter and collector This is referred to as the first terminal, first electrode, or first region, and the other side of the emitter and collector is referred to as the second It may be referred to as a terminal, second electrode, or second region. Note that a transistor is a bipod. When a transistor is used, the term "gate" can be replaced with "base." That is the case.

[0039] Furthermore, if it is explicitly stated that A and B are connected, it means that A and B are electrically connected. When A and B are functionally connected, and when A and B are directly connected This includes cases where... Here, A and B are the objects (e.g., devices, elements, circuits). (Wiring, electrodes, terminals, conductive film, layer, etc.) Therefore, a predetermined connection relationship, For example, not limited to the connection relationships shown in the diagram or text, but including the connection relationships shown in the diagram or text. This includes items outside of this category.

[0040] An example of a case where A and B are electrically connected is when it is possible to make an electrical connection between A and B. Elements such as switches, transistors, capacitive elements, inductors, resistive elements, and dies. It is possible for one or more (such as an Od) to be connected between A and B.

[0041] One example of a functional connection between A and B is enabling a functional connection between A and B. Circuits that perform this function (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal transformers) Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (electric Power source circuits (boost circuits, buck circuits, etc.), level shifters that change the potential level of a signal, etc.), Voltage source, current source, switching circuit, amplification circuit (a circuit that can increase signal amplitude or current amount, etc.) Operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation circuits, It is possible to connect one or more memory circuits, control circuits, etc., between A and B. For example, even if there is another circuit between A and B, the signal output from A will still reach B. If communication is to occur, A and B are assumed to be functionally connected.

[0042] Furthermore, if it is explicitly stated that A and B are electrically connected, then A and B are electrically connected. When they are directly connected (that is, when A and B are connected with another element or circuit in between) (when they are separated) and when A and B are functionally connected (that is, when there is no separate connection between A and B) (When they are functionally connected with a circuit in between) and when A and B are directly connected ( This includes cases where A and B are connected without another element or circuit in between. It shall be considered as follows: In other words, when explicitly stating that they are electrically connected, simply means connected. This is equivalent to the case where it is explicitly stated that it is done.

[0043] Furthermore, it is not explicitly stated that B is formed on top of A, or that B is formed on top of A. When describing it, it is not limited to the case that B is formed in direct contact with A. This also includes cases where this does not apply, i.e., when another object is interposed between A and B. So, A and B are the objects (for example, devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.) Let's assume that it is the case.

[0044] Therefore, for example, explicitly stating that layer B is formed on top of layer A (or on top of layer A) If present, this could mean that layer B is formed directly on top of layer A, or that layer B is directly on top of layer A Another layer (for example, layer C or layer D) is formed in contact with it, and layer B is directly in contact with it. This includes cases where a layer has been formed. Note that other layers (e.g., layer C or layer D) are single It can be a single layer or multiple layers.

[0045] Furthermore, the same applies when it is explicitly stated that B is formed above A. This is not limited to B being in direct contact with A, but also includes cases where another object is interposed between A and B. This includes cases where layer A is present. Therefore, for example, if layer B is formed above layer A, In this case, there are two situations: when layer B is formed in direct contact with layer A, and when layer B is formed in direct contact with layer A. Another layer (for example, layer C or layer D) is formed, and layer B is formed directly in contact with it. This includes cases where... Note that other layers (e.g., layer C or layer D) may be single layers. Stone, or even multiple layers, is acceptable.

[0046] Furthermore, B is formed on top of A, B is formed on top of A, or B is formed above A. When explicitly stating that something has been done, this includes cases where B is formed diagonally upwards. Also, in cases where B is formed below A, or where B is formed below A. The same applies to combinations.

[0047] Furthermore, it is preferable that terms explicitly stated as singular remain singular. However, this is not limited to this, and there can be multiple. Similarly, explicitly as plural It is preferable that there be multiple items listed. However, this is not limited to this. It can also be singular.

[0048] Note that in the diagram, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0049] Note that the figure is a schematic representation of an ideal example and is not limited to the shapes or values ​​shown in the figure. It cannot be done. For example, the diagram shows variations in shape due to manufacturing technology, variations in shape due to errors, and Variations in signals, voltages, or currents due to noise, or signals due to timing discrepancies. This can include variations in voltage or current.

[0050] Note that technical terms may be used to describe specific embodiments or examples. There are many. However, one aspect of the invention is not to be interpreted in a way that is limited by technical terms.

[0051] Furthermore, terms that are not defined (including scientific and technical terms such as specialized or academic terms) are generally... It can be used with the same meaning as the general meaning understood by those who are normally skilled in the art. (Dictionaries, etc.) The terminology defined therein should be interpreted in a way that is consistent with the context of the related technology. It is preferable.

[0052] Note that terms such as "1st," "2nd," and "3rd" refer to various elements, components, areas, layers, and regions that are separate from each other. It is used to distinguish and describe things. Therefore, terms such as "first," "second," and "third" refer to elements and parts. It does not limit the number of materials, areas, layers, zones, etc. Furthermore, for example, "the first" It can be replaced with "second" or "third," etc.

[0053] Also, "upwards," "upwards," "downwards," "sideways," "to the right," "to the left," Spatial arrangements such as "diagonally," "backward," "forward," "inside," "outside," or "inside." The phrase indicating placement shows the relationship between one element or feature and another element or feature in a simple diagram. It is often used to indicate, however, not limited to this, but also to indicate their spatial arrangement. The phrase can include directions other than those depicted in the diagram. For example, "on top of A" When explicitly indicated as B, B is not limited to being on top of A. Devices in the diagram Since it can be inverted or rotated 180°, it is possible that B is below A. It is a Noh play. Thus, the phrase "upwards" has the direction of "upwards" as well as the direction of "downwards". It is possible to include, however, the devices in the figure can rotate in various directions. Since it is possible to rotate, the phrase "upwards" can mean not only "upwards" and "downwards" in terms of direction. "To the side", "to the right", "to the left", "diagonally", "to the back", "to the front", "inside", "outside" It can also include other directions such as "in" or "inside". In other words, it can be appropriate depending on the situation. It is possible to interpret it as follows.

[0054] One aspect of the present invention is a first switch connected between a first wire and a second wire, and a first A second switch is connected between the wiring and the second wiring, and in the first period The first switch turns on, the second switch turns off, and during the second period, Switch 1 is turned off, Switch 2 is turned off, and during the third period, Switch 1 The first switch turns off, the second switch turns on, and during the fourth period, the first switch The first switch turns off, and the second switch also turns off.

[0055] One aspect of the present invention is a wiring system having a first path and a second path between a first wiring system and a second wiring system. During the first period, the first wiring and the second wiring become electrically connected via the first path. During the second period, the first and second wirings become non-conductive, and during the third period... Then, the first wiring and the second wiring become electrically connected via the second path, and during the fourth period... As a result, the first and second wires become non-conductive.

[0056] One aspect of the present invention comprises a first transistor and a second transistor, the first transistor The first terminal of the transistor is connected to the first wiring, and the second terminal of the first transistor is connected to the second wiring. The first transistor's gate is connected to the third wire, and the second transistor's gate is connected to the third wire. The first terminal of the second transistor is connected to the first wiring, and the second terminal of the second transistor is connected to the second wiring. The gate of the second transistor is connected to the fourth wire.

[0057] One aspect of the present invention comprises a first transistor and a second transistor, and during a first period And the first transistor turns on and the second transistor turns off, and the second During this period, the first transistor is turned off, and the second transistor is turned on. In the third period, the first transistor is turned off, and the second transistor is turned on. In the fourth period, the first transistor turns off, and the second transistor The st is something that is turned on.

[0058] One aspect of the present invention is a first transistor, a second transistor and a third transistor The first transistor has a first terminal which is connected to the first wiring, and the first transistor The second terminal is connected to the second wire, and the gate of the first transistor is connected to the third wire. The first terminal of the second transistor is connected to the first wiring, and the second terminal of the second transistor Terminal 2 is connected to the second wire, and the gate of the second transistor is connected to the fourth wire. The first terminal of the third transistor is connected to the fifth wire, and the third terminal of the third transistor Terminal 2 is connected to the second wire, and the gate of the third transistor is connected to the sixth wire. It is something that is done. [Effects of the Invention]

[0059] One aspect of the present invention can suppress the degradation of transistor characteristics. Or, one aspect of the present invention This configuration allows for a reduction in the channel width of the transistor. In particular, pull-up transistors This can suppress the degradation of the characteristics of the DISTA or reduce the channel width. Alternatively, one aspect of the present invention In one embodiment, the layout area can be reduced. Alternatively, in one embodiment of the present invention, a display device The frame can be made narrower. Alternatively, one aspect of the present invention is to make the display device high-resolution. This is possible. Alternatively, one aspect of the present invention can increase the yield. Alternatively, the present invention One embodiment of the present invention can reduce manufacturing costs. Alternatively, one embodiment of the present invention can reduce power consumption. It can be reduced. Alternatively, one aspect of the present invention reduces the current supply capacity of the external circuit. This is possible. Alternatively, one aspect of the present invention relates to the size of an external circuit, or a table having said external circuit. The size of the display device can be reduced. [Brief explanation of the drawing]

[0060] [Figure 1] An example of a circuit diagram of a semiconductor device in Embodiment 1, and an example of a schematic diagram for explaining its operation. [Figure 2] An example of a circuit diagram of the semiconductor device in Embodiment 1, an example of a schematic diagram for explaining the operation of the semiconductor device in Embodiment 1, and an example of a timing chart for explaining the operation of the semiconductor device in Embodiment 1. [Figure 3] An example of a timing chart for illustrating the operation of the semiconductor device in Embodiment 1. [Figure 4] An example of a circuit diagram of a semiconductor device in Embodiment 2, and an example of a timing chart for explaining its operation. [Figure 5] An example of a schematic diagram illustrating the operation of the semiconductor device in Embodiment 2, and an example of a circuit diagram of the semiconductor device in Embodiment 2. [Figure 6] An example of a schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 7] An example of a timing chart for illustrating the operation of the semiconductor device in Embodiment 2. [Figure 8] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 9] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 10] An example of a schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 11] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 12] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 13] An example of a circuit diagram of a semiconductor device in Embodiment 2, and an example of a timing chart for explaining its operation. [Figure 14] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 15] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 16] An example of a schematic diagram illustrating the operation of the semiconductor device in Embodiment 3. [Figure 17] An example of a schematic diagram illustrating the operation of the semiconductor device in Embodiment 3. [Figure 18] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 19] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 20] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 21]An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 22] Circuit diagram of the semiconductor device in Embodiment 3. [Figure 23] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 24] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 25] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 26] An example of a circuit diagram for a shift register in Embodiment 4. [Figure 27] An example of a timing chart for illustrating the operation of the shift register in Embodiment 4. [Figure 28] An example of a timing chart for illustrating the operation of the shift register in Embodiment 4. [Figure 29] An example of a circuit diagram for a shift register in Embodiment 4. [Figure 30] An example of a block diagram of the display device in Embodiment 5. [Figure 31] An example of a block diagram of the display device in Embodiment 5. [Figure 32] An example of a circuit diagram of the signal line drive circuit in Embodiment 6, and an example of a timing chart for explaining its operation. [Figure 33] An example of a pixel circuit diagram in Embodiment 7, and an example of a timing chart to explain its operation. [Figure 34] An example of a pixel circuit diagram in Embodiment 7. [Figure 35] An example of a top view and a cross-sectional view of the display device in Embodiment 8. [Figure 36] An example of a cross-sectional view of a transistor in Embodiment 9. [Figure 37] An example of a cross-sectional view illustrating the transistor fabrication process in Embodiment 10. [Figure 38] An example of a layout diagram of a semiconductor device in Embodiment 11. [Figure 39]An example of a diagram illustrating the electronic device in Embodiment 12. [Figure 40] An example of a diagram illustrating the electronic device in Embodiment 12. [Figure 41] An example of a circuit diagram of a semiconductor device in Embodiment 3. [Figure 42] This figure shows the verification results of the semiconductor device in Embodiment 3. [Modes for carrying out the invention]

[0061] The embodiments will be described below with reference to the drawings. However, the embodiments may differ in many ways. It is possible to implement it in any manner, and without deviating from its purpose and scope, its form and Those skilled in the art will readily understand that the details can be modified in various ways. It should not be interpreted as being limited to the contents described herein. Furthermore, in the configuration described below, Symbols indicating similar parts or functions are shown using common symbols across different drawings. A detailed explanation of the part containing this will be omitted.

[0062] Furthermore, the content described in one embodiment (even a part of it) may vary depending on the form of its implementation. Other content (even partial content) described in the tone, and / or one or more other implementations To apply, combine, or replace the content described in the form (even if only a part of it is acceptable), It is possible to do things like this.

[0063] Furthermore, the content described in each embodiment refers to the use of various figures in each embodiment. This refers to the content stated, or the content stated using the text described in the specification.

[0064] Furthermore, a diagram (even a partial one) described in one embodiment may refer to another part of that diagram. Further figures (even partial ones) described in that embodiment, and / or one or more figures. In another embodiment, the diagram (or even just a part of it) described above can be combined by And it is possible to construct even more diagrams.

[0065] Furthermore, in the diagrams or text described in one embodiment, a portion thereof may be extracted. Therefore, it is possible to constitute one aspect of the invention. Thus, a diagram or text describing a part of the invention is possible. If a chapter is included, the content of a portion of the figures or text extracted from that chapter may also be considered an embodiment of the invention. The information disclosed is such that it can constitute one aspect of the invention. Therefore, for example, active elements (transistors, diodes, etc.), wiring, passive elements (capacitors) Elements, resistive elements, etc.), conductive layers, insulating layers, semiconductor layers, organic materials, inorganic materials, components, substrates, Modules, devices, solids, liquids, gases, operating methods, manufacturing methods, etc., are described one or more times. Drawings (section view, plan view, circuit diagram, block diagram, flowchart, process diagram, perspective view, elevation view) Diagrams, layout diagrams, timing charts, structural diagrams, schematic diagrams, graphs, tables, optical path diagrams, vector diagrams, In a phase diagram, waveform diagram, photograph, chemical formula, etc., or in writing, a part thereof is taken and used as the invention. It is possible to constitute one aspect of this.

[0066] (Embodiment 1) This embodiment describes an example of a semiconductor device. The semiconductor device of this embodiment is As an example, various drive cycles such as shift registers, gate drivers, or source drivers It can be used in a road. Furthermore, the semiconductor device of this embodiment can be used as a drive circuit or a circuit. It is possible to demonstrate this.

[0067] First, the semiconductor device of this embodiment will be described with reference to Figure 1(A). Figure 1(A) The semiconductor device has multiple switches, namely switches 11_1 to 11_2. 11_1~11_2 are connected between wire 111 and wire 112. However, this is not limited to It is not specified, and the semiconductor device may have three or more switches.

[0068] Next, we will explain the signals or voltages that are input to or output to each wire.

[0069] As an example, let's assume that signal OUT is output from wiring 111. For example, it can be a signal having a first potential state and a second potential state. For example, signal O UT is a digital signal with two states: H level (also called high level) and L level. It is often a number and can function as an output signal. Therefore, wiring 111 is It can function as a signal line. In particular, the wiring 111 is extended and arranged in the pixel area. It is possible to do so. And wiring 111 can be connected to a pixel. For example, in the case of a liquid crystal display device, wiring 111 is connected to a pixel having a liquid crystal element, and wiring 111 The configuration can be such that the voltage applied to the liquid crystal element is set according to the potential. Alternatively, the distribution Line 111 is a transistor (e.g., a selection transistor or a switching transistor) that the pixel has. It can be connected to the gate of a transistor. In such a case, the signal OUT is , as a selection signal, transfer signal, start signal, reset signal, gate signal, or scan signal It is possible for it to function. Therefore, wiring 111 is a gate signal line (gate line), or running It can function as a survey line.

[0070] As an example, the signal CK1 is input to wiring 112. The signal can have a first potential state and a second potential state. For example, the signal CK 1 is often a digital signal that alternates between two states, H level and L level. It can function as a lock signal. Therefore, wiring 112 is a signal line, or crossover. It can function as a signal line. However, it is not limited to this, wiring 111, Alternatively, various other signals, voltages, or currents can be input to wiring 112. It is possible. For example, voltage is supplied to wiring 111 or wiring 112, and these wirings are electrically powered It can function as a source line.

[0071] For example, let V1 be the potential of the first potential state, i.e., the potential of the L-level signal, and the second Let V2 be the potential state, i.e., the potential of the H-level signal. And let V2 > V1. Furthermore, and not limited to this, the potential of an L-level signal can be lower than V1. Furthermore, it is possible to make it higher than V1. Alternatively, the potential of a high-level signal can be higher than V2. It is possible to have a value lower than V2, and it is also possible to have a value higher than V2. For example, depending on the circuit configuration... Therefore, even when a signal is described as being at an H level, its potential may be lower than V2, and V It may be higher than 2. Or, depending on the circuit configuration, it may be described as an L-level signal. However, that potential may be lower than V1, or it may be higher than V1.

[0072] Note that "approximately" refers to errors due to noise, errors due to process variations, and manufacturing errors of the element. This includes errors due to variations in degree and / or various other errors such as measurement errors.

[0073] Generally speaking, voltage refers to the difference in electric potential between two points (also called potential difference). A position is the electrostatic energy (electrical position) possessed by a unit charge in an electrostatic field at a given point. This refers to the energy (at a given point). However, in electronic circuits, even if it is only at one point, for example, Sometimes, the potential difference between the potential at a point and a reference potential (also called the reference potential) is used as the value. Furthermore, voltage and potential values ​​are both expressed in volts (V) in circuit diagrams, etc. Therefore, it is difficult to distinguish between them. For this reason, in the documents of this application (specification and claims) Unless otherwise specified, voltage may be used as the value even if it is only at a single point.

[0074] Furthermore, the signal CK1 can be balanced or unbalanced (also called unbalanced). This is possible. Equilibrium is the period in one cycle when the temperature is at the H level and the period when it is at the L level. This refers to a state where the two levels are roughly equal. Non-equilibrium refers to the period of time when the temperature is at level H and the period when it is at level L. This refers to the difference between the two. Note that "different" here does not include the case where they are roughly equal. It shall not be rare.

[0075] Next, we will explain the functions of switches 11_1 to 11_2. 2 has the function of controlling the conductivity state between wiring 111 and wiring 112. Therefore, Figure 1(B As shown in the diagram, there is a double path between wiring 111 and wiring 112 called paths 21_1 to 21_2. There are several paths. Alternatively, switches 11_1 and 11_2 are powered by the signal OUT. It has a function to control whether or not to set a position state. However, it is not limited to this, a switch 11_1~11_2 can also have various other functions.

[0076] Note that this refers to the path between wiring A (e.g., wiring 111) and wiring B (e.g., wiring 112). In this case, a switch can be connected between wiring A and wiring B. However, This is not limited to this; in addition to switches, various other elements (for example) can be placed between wiring A and wiring B. Transistors, diodes, resistors, or capacitive elements, or various circuits (for example, It is possible to connect circuits such as inverter circuits, shift register circuits, etc. It is possible. Therefore, for example, a resistor or a switch 11_1 can be connected in series or in parallel. It is possible to connect elements such as transistors.

[0077] Next, regarding the operation of the semiconductor device in Figure 1(A), an example of the timing chart in Figure 2(A) is shown. See the following for explanation. However, the semiconductor device in Figure 1(A) is not limited to this, and various types It can be controlled by timing.

[0078] The timing chart in Figure 2(A) shows the state of signal CK1 and switch 11_1 (on or The waveforms of the OFF state, the state of switch 11_2 (ON or OFF), and the OUT signal are shown, respectively. The timing chart in Figure 2(A) has multiple periods, and each period has multiple sub-periods. It has. For example, the timing chart in Figure 2(A) has periods T1 and T2. It has multiple periods (hereinafter, these periods will also be called frame periods). Period T1 is Period A 1. Multiple sub-periods such as period B1, period C1, period D1, and period E1 (hereinafter referred to as sub-periods) This is also called the 1-gate selection period), and period T2 is period A2, period B2, period C2 It has multiple sub-periods, such as period D2 and period E2. However, it is not limited to this, as shown in Figure 2. The timing chart in (A) may have periods other than periods T1 and T2. It is possible to omit either period T1 or period T2. It is possible to have various periods in addition to the period A1-E1, and the period A1-E1 Either one can be omitted. Alternatively, period T2 can be various other than periods A2 to E2. It is possible to have such a period, and it is possible to omit any of the periods A2 to E2. be.

[0079] Note that the semiconductor device in Figure 1(A) is, as an example, a device that alternates between operating during periods T1 and T2. This shall be done in the following order. However, it is not limited to this, and the semiconductor device in Figure 1(A) may be used in various order. This allows for the execution of operations during periods T1 and T2.

[0080] For example, during period T1, the semiconductor device in Figure 1(A) has switch 11_1 The operation in period D1 and the operation in period E1 will be repeated until the device is turned on. Then, in the semiconductor device shown in Figure 1(A), when switch 11_1 is turned on, during period A1... The actions in period B1 and period C1 shall be performed in that order. After that, the semiconductor device in Figure 1(A) remains in operation for a period of D1 until switch 11_1 is turned on again. The operation in period E1 and the operation in period E1 shall be repeated. However, this is not limited to the above. The semiconductor device in Figure 1(A) can perform operations in various sequences during periods A1 to E1. It is Noh.

[0081] Furthermore, during period T2, as an example, in the semiconductor device shown in Figure 1(A), switch 11_2 The operation in period D2 and the operation in period E2 will be repeated until it turns on. And, in the semiconductor device shown in Figure 1(A), when switch 11_2 is turned on, during period A2... The actions in period B2 and period C2 shall be performed in that order. Subsequently, the semiconductor device shown in Figure 1(A) remains in operation for a period D2 until switch 11_2 is turned on again. The operation in period E2 and the operation in period E2 shall be repeated. However, it shall not be limited to this. Furthermore, the semiconductor device in Figure 1(A) can perform the operations in periods A2 to E2 in various sequences. It is possible.

[0082] The operation during period T1 will be described. During period T1, switch 11_1 will be either on or off. Switch 11_2 will then be turned off.

[0083] During period A1 of period T1, as shown in Figure 2(D), switch 11_1 turns ON. Switch 11_2 is turned off. Therefore, as shown in Figure 2(E), path 21_1 leads The circuit becomes conductive, and path 21_2 becomes non-conductive. Then the signal input to wiring 112 (For example, a low-level signal CK1) is supplied to wiring 111 via switch 11_1. Therefore, the signal OUT becomes low.

[0084] During period B1 of period T1, switch 11_1 remains ON, as shown in Figure 2(D). As a result, switch 11_2 remains off. Therefore, as shown in Figure 2(E), the path Path 21_1 remains conductive, while path 21_2 remains non-conductive. The signal input to line 112 (for example, a high-level signal CK1) is transmitted via switch 11_1. This is then supplied to wiring 111. Therefore, the signal OUT becomes high level.

[0085] During period C1 of period T1, switch 11_1 is turned off, as shown in Figure 2(B). Therefore, switch 11_2 remains off. Thus, as shown in Figure 2(C), path 21_ 1 becomes non-conductive, and path 21_2 remains non-conductive. Then wiring 111 and Wiring 112 will be in a non-conductive state, so the signal input to wiring 112 (for example, L level) will not be able to conduct electricity. The signal CK1) will no longer be supplied to wiring 111.

[0086] Note that during period C1 of period T1, the timing at which switch 11_1 turns off is determined by the signal This often happens later than when CK1 reaches the L level. Therefore, switch 11_1 Before it turns off, the signal input to wiring 112 (for example, a low-level signal CK1) is switched It is often supplied to wiring 111 via switch 11_1. Therefore, signal OUT is L It becomes a bell. However, it is not limited to this, if an L-level signal or voltage V1 is supplied to wiring 111 It is possible to be provided.

[0087] During periods D1 and E1 of period T1, as shown in Figure 2(B), switch 11_1 And switch 11_2 remains off. Therefore, as shown in Figure 2(C), path 2 1_1 and path 21_2 remain in a non-conductive state. Therefore, wiring 111 and wiring 11 Since it becomes a non-conductive state with respect to 2, the signal input to wiring 112 is not supplied to wiring 111. This remains the case. Therefore, the signal OUT remains at a low level.

[0088] Next, we will explain the operation during period T2. During period T2, switch 11_1 is turned off. Switch 11_2 is either on or off.

[0089] During period A2 of period T2, switch 11_1 is turned off, as shown in Figure 2(F). Switch 11_2 turns on. Therefore, as shown in Figure 2(G), path 21_1 is non The circuit becomes conductive, and path 21_2 becomes conductive. Then the signal input to wiring 112 (For example, a low-level signal CK1) is supplied to wiring 111 via switch 11_2. Therefore, the signal OUT becomes low.

[0090] During period B2 of period T2, switch 11_1 remains off, as shown in Figure 2(F). As a result, switch 11_2 remains on. Therefore, as shown in Figure 2(G), the path Path 21_1 remains in a non-conductive state, while path 21_2 remains in a conductive state. Then, The signal input to line 112 (for example, a high-level signal CK1) is transmitted via switch 11_2. This is then supplied to wiring 111. Therefore, the signal OUT becomes high level.

[0091] During period C2 of period T2, switch 11_1 remains off, as shown in Figure 2(B). As a result, switch 11_2 turns off. Therefore, as shown in Figure 2(C), path 21_ 1 remains in a non-conductive state, and path 21_2 also becomes non-conductive. Then wiring 111 and Wiring 112 will be in a non-conductive state, so the signal input to wiring 112 (for example, L level) will not be able to conduct electricity. The signal CK1) will no longer be supplied to wiring 111.

[0092] Furthermore, during period C2 of period T2, the timing at which switch 11_2 turns off is determined by the signal This often happens later than when CK1 reaches the L level. Therefore, switch 11_2 Before it turns off, the signal input to wiring 112 (for example, a low-level signal CK1) is switched is often supplied to the wiring 111 via the switch 11_2. Therefore, the signal OUT becomes an L- level. However, the present invention is not limited thereto, and an L-level signal or a voltage V1 can be supplied to the wiring 111.

[0093] In the period D2 and period E2 of the period T2, as shown in FIG. 2(B), the switch 11_1 and the switch 11_2 remain off. Therefore, as shown in FIG. 2(C), the path 2 1_1 and the path 21_2 remain in a non-conductive state. Therefore, the wiring 111 and the wiring 11 2 are in a non-conductive state, so the signal input to the wiring 112 is not supplied to the wiring 111 and remains in that state. Therefore, the signal OUT remains at the L level.

[0094] As described above, by switching the period during which each switch is turned on, the number of times the switch is turned on can be reduced, or the time for which the switch is turned on can be shortened. Therefore , characteristic deterioration of elements or circuits used as switches can be suppressed.

[0095] Alternatively, by suppressing characteristic deterioration of elements or circuits used as switches, various advantages can be obtained. For example, when the wiring 111 functions as a gate signal line or a scanning line, or when the wiring 111 is connected to a pixel, the video signal held by the pixel may be affected by the waveform of the signal OUT. For example, when the potential of the signal OUT does not rise to V2, the time for which a transistor included in the pixel (e.g., a selection transistor or a switching transistor) is turned on becomes shorter. As a result, insufficient writing of the video signal into the pixel occurs, which may lead to degradation of display quality. Alternatively, when the signal OU When the fall time and rise time of T become longer, the pixels belonging to the selected row may have video signals written that are intended for pixels belonging to another row. As a result, display quality degrades. Alternatively, when the fall time of the signal OUT varies, the effect of feedthrough on the video signal held by the pixel may vary. As a result, display unevenness occurs.

[0096] However, the semiconductor device according to the present embodiment can suppress characteristic degradation of elements or circuits used as switches. Therefore, the potential of the signal OUT can be raised to V2 , so the on-time of the transistor included in the pixel can be lengthened . As a result, a video signal can be written to the pixel with sufficient time, so improvement of display quality can be achieved. Alternatively, since the fall time and rise time of the signal OUT can be shortened , it is possible to prevent video signals intended for pixels belonging to another row from being written to pixels belonging to a selected row. As a result, improvement of display quality can be achieved. Alternatively, variation in the fall time of the signal OUT can be suppressed, so variation in the effect of feedthrough on the video signal held by the pixel can be suppressed . Therefore, display unevenness can be suppressed.

[0097] Note that in the period T1, the period B1 is referred to as a selection period, and the periods A1, C1, D1, and E1 can be referred to as non-selection periods. Similarly, in the period T2, the period B 2 is referred to as a selection period, and the periods A2, C2, D2, and E2 are referred to as non-selection periods , which is permissible.

[0098] Note that during period T1, the period during which switch 11_1 is ON is (periods A1 and A2). This is called the first period, and the period during which switch 11_1 is off (period C1, period D1, and period C1, and period D D1, and D1, and D1, respectively). It is possible to call period E1) the second period. Similarly, in period T2, period A2 and Period B2 is called the third period, and periods C2, D2, and E2 are called the fourth period. It is possible.

[0099] Periods T1 and T2 are called frame periods, and periods A1 to E1 and A2 to E2 can be referred to as a sub-period or a 1-gate selection period.

[0100] Note that periods or sub-periods can be replaced with steps, processes, or actions. That is the case.

[0101] Furthermore, in period T1, periods D1 and E1 are arranged in sequence before period A1. It is possible to do so. Similarly, in period T2, before period A2, period D2 and period It is possible to arrange E2 and others in a repeating sequence. In such a case, the start of period T1 From the time, the time from the start time of period A1, and from the start time of period T2 to the start time of period A2 The time until the hour is preferably approximately equal, but not limited to this.

[0102] As shown in Figure 1(C), switches 11_1 and 11_2 operate during the same period. It is possible to turn it on. In this case, as shown in Figure 1(D), path 21_1, and The path 21_2 will be in a conductive state during the same period. Therefore, the signal input to wiring 112 is , is supplied to wiring 111 via switch 11_1 and switch 11_2. However, This is not limited to this.

[0103] Note that, as shown in FIG. 1(E), the semiconductor device includes switches 11_1 to 11_N (N is 2 or great er natural number), and can have a plurality of such switches. The switches 11_1 to 11 _N are connected between a wiring 111 and a wiring 112. The switches 11_1 to 11_N have functions identical to those of the switch 11_1 or the switch 11_2. Therefore, as shown in FI G. 1(F), paths 21_1 to 21_N exist between the wiring 111 and the wiring 112 .

[0104] Note that, in a case where the semiconductor device has N switches, as shown in FIG. 3, the sem iconductor device can have a plurality of periods T1 to TN. For example, in the timing chart of FIG. 3, the periods T1 to TN are arranged in order. However, the present invention is not limited thereto, and in the present embodiment, the periods T1 to TN can be arranged in various orders. Alt ernatively, any one of the periods T1 to TN can be omitted. Each of the periods T1 to TN can have a plurality of sub-periods. For example, a period Ti (i is any one of 1 to N) can have a plurali ty of sub-periods of periods Ai to Ei. Similarly to the periods A1 to E1 or the periods A2 to E2, in each of the periods Ai to Ei, switches 11_1 to 11_N other than a switch 11_i (for exa mple, the switches 11_1 to 11_i-1 and the switches 11_i+1 to 11_N) are turned off. Then, in the period Ai and the period Bi of the period Ti, the switch 11_i is turned on , and in the period Ci, the period Di, and the period Ei of the period Ti, the switch 11_i is turned off.

[0105] Note that, when N is large, the number of times each switch is turned on, or each This can reduce the time the switch is on. However, if N is too large, the switch The number of elements becomes too large, resulting in a larger circuit size. Therefore, N must be 6 or less. Preferably, it is 4 or less. Even more preferably, 3 or It is preferable that it is 2, but it is not limited to this.

[0106] As shown in Figure 1(G), wiring 112 is divided into multiple wirings called wiring 112A to 112B. It is possible to divide it into these. Then, switch 11_1 connects wiring 111 and wiring 112A It is connected between them, and switch 11_2 is connected between wiring 111 and wiring 112B. This is possible. Wiring 112A~112B can be connected to various other wires or various components. It is possible to do so.

[0107] In addition, similar to Figure 1(G), in Figure 1(E), wiring 112 is divided into multiple wires. It is possible.

[0108] (Embodiment 2) This embodiment shows an example of a semiconductor device. The semiconductor device of this embodiment is an embodiment It is possible to have the semiconductor device described in 1. In particular, the semiconductor device described in Embodiment 1 This section describes the configuration when a transistor, for example, is used as the switch in the device. However, this is not limited to this, and various elements or various circuits can be used as switches. It is possible to do so. Note that the details described in Embodiment 1 will not be explained further. The contents of this embodiment can be appropriately combined with the contents described in Embodiment 1. ru.

[0109] First, the semiconductor device of this embodiment will be described with reference to Figure 4(A). Figure 4(A) The semiconductor device has a circuit 100. The circuit 100 has the configuration described in Embodiment 1. This configuration is similar to that when a transistor is used as a switch. In Figure 4(A), Transistor 101_1 is used as switch 11_1 of 1(A), and switch 11_ The configuration when transistor 101_2 is used as 2 is shown. Therefore, transistor 101_1 has the same function as switch 11_1, and transistor 101_2 is a switch It has the same function as the 11_2. However, it is not limited to this, as described in Embodiment 1. In the configuration, a transistor can be used as a switch. For example, CMOS switches can be used.

[0110] Note that transistors 101_1 and 101_2 are N-channel type. Let's assume that the potential difference (Vgs) between the gate and source of an N-channel transistor is It shall turn on when the threshold voltage (Vth) is exceeded. However, it shall not be limited to this. Transistor 101_1 and / or transistor 101_2 are P-channel type. This is possible. A P-channel transistor has a potential difference (Vg) between the gate and source. The device is to turn on when s) falls below the threshold voltage (Vth).

[0111] Next, we will explain the connection relationships of the semiconductor device in Figure 4(A). Transistor 101_1 The first terminal is connected to wiring 112, and the second terminal of transistor 101_1 is connected to wiring 111 The first terminal of transistor 101_2 is connected to wiring 112, and the transistor The second terminal of station 101_2 is connected to wiring 111.

[0112] Note that the connection point between the gate of transistor 101_1 and circuit 10 is indicated as node n1, The connection point between the gate of transistor 101_2 and circuit 10 is indicated as node n2. Node n1 and node n2 can be referred to as wiring.

[0113] Next, we will explain the functions of transistors 101_1 and 101_2. do.

[0114] Transistor 101_1 controls the potential of wiring 112 according to the potential of node n1. It has a function to control the timing of supplying voltage to the wiring 112. When voltage V1 or V2 is supplied, transistor 101_1 is at the potential of node n1. Accordingly, a function to control the timing of supplying the voltage supplied to wiring 112 to wiring 111. It has. As another example, when a signal (e.g., signal CK1) is input to wiring 112, The transistor 101_1 distributes the signal input to wiring 112 according to the potential of node n1. It has a function to control the timing of supply to line 111. In such a case, signal CK1 When set to an L level, transistor 101_1 supplies an L-level signal CK1 to wiring 111. It has a function to control the timing of supply. Alternatively, transistor 101_1 controls the signal OU It has a function to control the timing when T becomes L level. Alternatively, when signal CK1 becomes H level Then, transistor 101_1 supplies a high-level signal CK1 to wiring 111. It has a function to control the ming. Alternatively, transistor 101_1 controls the signal OUT to a high level. It has a function to control the timing of when it becomes a node. At this time, node n1 is in a floating state. It is possible that in this case, transistor 101_1 is above the potential of wiring 111. It has the function of raising the potential of node n1 in response to the rise. Or, transistor 101_ 1 has the function of performing bootstrap operation. Or, transistor 101_1 is The potential state of the signal OUT is set by turning on or off depending on the signal input to the terminal. It has a function to control whether or not to set a value.

[0115] Transistor 101_2 controls the potential of wiring 112 according to the potential of node n2. It has a function to control the timing of supplying voltage to the wiring 112. When voltage V1 or V2 is supplied, transistor 101_2 is at the potential of node n2. Accordingly, a function to control the timing of supplying the voltage supplied to wiring 112 to wiring 111. It has. As another example, when a signal (e.g., signal CK1) is input to wiring 112, The transistor 101_2 distributes the signal input to wiring 112 according to the potential of node n2. It has a function to control the timing of supply to line 111. In such a case, signal CK1 When set to an L level, transistor 101_2 supplies the L level signal CK1 to wiring 111. It has a function to control the timing of supply. Alternatively, transistor 101_2 has a function to control the signal OU It has a function to control the timing when T becomes L level. Alternatively, when signal CK1 becomes H level Then, transistor 101_2 supplies a high-level signal CK1 to wiring 111. It has a function to control the ming. Alternatively, transistor 101_2 controls the signal OUT to a high level. It has a function to control the timing of when it becomes a node. At this time, node n2 is in a floating state. It is possible that in this case, transistor 101_2 is above the potential of wiring 111. It has the function of raising the potential of node n2 in response to the rise. Or, transistor 101_ 2 has the function of performing bootstrap operation. Alternatively, transistor 101_1 is The potential state of the signal OUT is set by turning on or off depending on the signal input to the terminal. It has a function to control whether or not to set a value.

[0116] Furthermore, as shown in Figure 4(B), the semiconductor device of this embodiment has a circuit 10. It is possible. For example, circuit 10 has wiring 113, wiring 114, wiring 115_1, wiring 11 5_2, Wiring 116, Wiring 117, Gate of transistor 101_1, Transistor 10 It is connected to gate 1_2 and / or wiring 111, but is not limited to this. Depending on the configuration of path 10, circuit 10 can be connected to other wiring or other nodes. Alternatively, circuit 10 consists of wiring 113, wiring 114, wiring 115_1, and wiring 115_2. Wiring 116, Wiring 117, Gate of transistor 101_1, Transistor 101_2 It is possible that the gate and / or wiring 111 are not connected.

[0117] Circuit 10 often has one or more transistors. The polarity of the transistors is often the same as that of transistors 101_1 to 101_2, and it is an N-channel system. It is often of this type. However, it is not limited to this, and circuit 10 is a P-channel type transistor It is possible to have a transistor. Alternatively, circuit 10 has an N-channel transistor and a P-channel transistor. It is possible to have channel-type transistors. In other words, circuit 10 is a CMOS circuit It is possible for it to be a road.

[0118] As in Embodiment 1, a signal OUT will be output from wiring 111. Wiring 1 In the same manner as in Embodiment 1, signal CK1 is input to 12. When written as 2, signal CK2 is the inverted signal of signal CK1, or has a phase difference of 1 from signal CK1. The signals are often shifted by 80°. It is assumed that voltage V2 is supplied to wiring 113. Voltage V2 can function as a power supply voltage, reference voltage, or positive power supply voltage. Therefore, wiring 113 can function as a power line. Wiring 114 is a signal line. It is assumed that SP is input. Signal SP can function as a start signal. Therefore, wiring 114 can function as a signal line. For example, multiple semiconductors The device has a configuration in which the wiring 114 is the wiring 11 of another stage (for example, the previous stage) semiconductor device. When connected to 1, signal SP is a selection signal, a transfer signal, a start signal, a reset signal, It can function as a gate signal or a scanning signal. In this case, wiring 114 is It can function as a gate signal line or a scan line. Wiring 115_1 is a signal line. Assume that SEL1 is input. Signal SEL1 is transmitted at regular intervals (for example, every frame). ) repeatedly switches between high and low levels as a clock signal, selection signal, or control signal. It is possible for it to function. Therefore, wiring 115_1 can function as a signal line. It is possible. The signal SEL2 is assumed to be input to wiring 115_2. Signal SEL2 is , if it is the inverted signal of signal SEL1, or a signal whose phase is shifted by 180° from signal SEL1. There are many. Therefore, wiring 115_2 can function as a signal line. Wiring 11 It is assumed that signal RE is input to 6. Signal RE functions as a reset signal. This is possible. Therefore, wiring 116 can function as a signal line. In particular Let's assume that multiple semiconductor devices are connected. In this case, the wiring 116 is in another stage (for example, the next stage) If it is connected to the wiring 111 of the semiconductor device, then the signal RE is a selection signal, a transfer signal, It can function as a start signal, reset signal, gate signal, or scan signal. In this case, wiring 116 can function as a gate signal line or a scan line. The wiring 117 shall be supplied with voltage V1. Voltage V1 is the power supply voltage, reference voltage. It can function as a voltage, ground voltage, or negative power supply voltage. Therefore, wiring 11 7 can function as a power line. However, it is not limited to this, wiring 111 Wiring 112, Wiring 113, Wiring 114, Wiring 115_1, Wiring 115_2, Wiring 116 And wiring 117 can be supplied with various signals, various voltages, or various currents. That is the case.

[0119] Furthermore, signal CK1 or signal CK2 can be balanced, or unbalanced. It is possible that (also known as) the signal SEL1 or signal SEL2 is balanced. It is possible for it to be in equilibrium, and it is also possible for it to be non-equilibrium (also called disequilibrium).

[0120] Circuit 10 has voltage V1, signal CK2, signal SP, signal SEL1, signal SEL2, and signal RE. , the potential of node n1, the potential of node n2, and / or, in response to signal OUT, node n1 , control the timing of supplying signals or voltages to node n2 and / or wiring 111. It has the function of: or, circuit 10 has voltage V1, signal CK2, signal SP, signal SEL1 , signal SEL2, signal RE, voltage V1, potential of node n1, potential of node n2, and / or In response to the signal OUT, the potential of node n1, the potential of node n2, and / or wiring 11 It has the function of controlling the potential of 1. For example, circuit 10 controls a high-level signal or voltage V2. It has the function of supplying to node n1 and / or node n2. Alternatively, circuit 10 has the function of supplying L The bell signal or voltage V1 is supplied to node n1, node n2, and / or wiring 111. It has a function. Alternatively, circuit 10 has a signal or voltage etc. at node n1 and / or node It has the function of not supplying to n2. Alternatively, circuit 10 controls the potential of node n1, and / or It has the function of raising the potential of node n2. Alternatively, circuit 10 raises the potential of node n1, It has the function of reducing or maintaining the potential of do n2 and / or the potential of wiring 111. Or, Circuit 10 has the function of putting node n1 and / or node n2 into a floating state. Furthermore, the circuit 10 is not limited to this and can have various other functions. Circuit 10 does not need to have all of the above functions.

[0121] Next, an example of the operation of this embodiment will be described. Here, as an example, Figure 4(B) Regarding the operation of the semiconductor device, see the timing chart in Figure 4(C), and Figures 5(A) to 5( E), and Figures 6(A) to 6(E) will be explained with reference. The timing channel in Figure 4(C) The node contains signals CK1, CK2, SP, RE, and the potential (Va1) of node n1. The potential (Va2) at node n2 and the signal OUT are shown. Note that the timing in Figure 2(A) The parts that are common to the chart will be omitted from the explanation. Note that the movement of the semiconductor device in Figure 4(B) This can be applied to the contents described in this embodiment or the contents described in other embodiments. It is Noh.

[0122] First, during period A1, as shown in Figure 5(A), signal SP becomes high, and signal S EL1 becomes high level, and signal SEL2 becomes low level. Therefore, circuit 10 is high level. The signal SP or voltage V2 is supplied to node n1. Then, the circuit 10 is The potential is increased. After that, the potential of node n1 is V1 + Vth101_1(Vth10 When the threshold voltage of transistor 101_1 becomes (1_1: the threshold voltage of transistor 101_1) + Vx, transistor 1 01_1 turns on. At this time, Vx is a value greater than 0. Therefore, wiring 112 and Since line 111 becomes conductive via transistor 101_1, it generates an L-level signal C. K1 is supplied from wiring 112 to wiring 111 via transistor 101_1. As a result, the signal OUT becomes L level. Subsequently, the potential of node n1 rises further. However, the supply of voltage or signal from circuit 10 to node n1 stops, so circuit 10 and node n1 becomes non-conductive. As a result, node n1 becomes floating, and the power of node n1 The position is maintained as V1 + Vth101_1 + Vx.

[0123] During period A1, circuit 10 supplies node n2 with an L-level signal or voltage V2. It is possible to supply it.

[0124] During period A1, circuit 10 supplies an L-level signal or voltage V2 to wiring 111. It is possible to supply it.

[0125] Next, during period B1, as shown in Figure 5(B), signal SP becomes L level, and signal S EL1 remains at a high level, and signal SEL2 remains at a low level. Therefore, circuit 1 0 means that no voltage or signal is supplied to node n1. Therefore, node n1 is It remains in a floating state, and the potential of node n1 remains V1 + Vth101_1 + Vx. Therefore, transistor 101_1 remains on, so wire 112 and wire 111 This remains in a conductive state via transistor 101_1. At this time, signal CK1 is L As the voltage rises from level to H level, the potential of wiring 111 begins to rise. Then, the node Since n1 remains in a floating state, the potential of node n1 is the same as the gate of transistor 101_1. It rises due to parasitic capacitance between the second terminal and the first terminal. This is known as bootstrap behavior. Thus, the potential of node n1 rises to V2 + Vth101_1 + Vx This makes it possible to raise the potential of wiring 111 to V2. In this way, signal OU T will be at the H level.

[0126] During period B1, circuit 10 supplies node n2 with an L-level signal or voltage V2. It is possible to supply it.

[0127] Furthermore, during period B1, circuit 10 does not supply signals or voltages to wiring 111. This is possible.

[0128] Next, during period C1, the signal RE becomes high, as shown in Figure 5(C). Circuit 10 distributes an L-level signal or voltage V1 to nodes n1, n2, and / or It supplies power to line 111. Then the potential of node n1, the potential of node n2, and / or the wiring The potential of 111 becomes V1. Therefore, transistor 101_1 and transistor 10 Since 1_2 is turned off, wires 112 and 111 become non-conductive. And the signal OUT will be at L level.

[0129] Furthermore, during period C1, the timing at which the potential of node n1 decreases to the L level is more reliable than the timing at which the potential of node n1 decreases. It is possible to set it so that the timing of when CK1 decreases to L level is faster. Then, as shown in Figure 5(E), the L-level signal CK1 is transmitted from wiring 112 through the transistor. It is possible to supply power to wiring 111 via transistor 101_1. The channel width of 1_1 is such that, for example, there are other transistors besides transistor 101_1. In some cases, the channel width is larger than that of other transistors, so the potential of wiring 111 is increased quickly. It can be reduced. In other words, the falling edge time of the signal OUT can be shortened. Therefore, in order to reduce the potential of wiring 111, circuit 10 must receive an L-level signal or electric current. When voltage V1 is supplied to wiring 111, and when an L-level signal CK1 transitions from wiring 112 When supplied to wiring 111 via station 101_1, and when circuit 10 receives an L-level signal or Voltage V1 is supplied to wiring 111, and an L-level signal CK1 is transmitted from wiring 112 via the transistor There are three patterns, including when it is supplied to wiring 111 via ta 101_1.

[0130] Next, during periods D1 and E1, as shown in Figure 5(D), the circuit 10 has a voltage V A signal of level 1 or L is supplied to node n1, node n2, and / or wiring 111. Then, the potential of node n1, the potential of node n2, and / or the potential of wiring 111 are V1 It remains in this state. Therefore, transistors 101_1 and 101_2 are off. As a result, wiring 112 and wiring 111 remain in a non-conductive state. And signal O UT will remain at the L level.

[0131] Next, during period A2, as shown in Figure 6(A), signal SP becomes H level, and signal S EL1 becomes low, and signal SEL2 becomes high. Therefore, circuit 10 is high level. The signal SP or voltage V2 is supplied to node n2. Then, the circuit 10 is The potential is increased. After that, the potential of node n2 is V1 + Vth101_2(Vth10 When the threshold voltage of transistor 101_2 (1_2) becomes + Vx, transistor 1 01_2 turns on. At this time, Vx is a value greater than 0. Therefore, wiring 112 and Since line 111 becomes conductive via transistor 101_2, it generates an L-level signal C. K1 is supplied from wiring 112 to wiring 111 via transistor 101_2. As a result, the signal OUT becomes L level. Subsequently, the potential of node n2 rises further. However, the supply of voltage or signal from circuit 10 to node n2 stops, so circuit 10 and node n2 becomes non-conductive. As a result, node n2 becomes floating, and the power of node n2 The position is maintained as V1 + Vth101_2 + Vx.

[0132] During period A2, circuit 10 supplies node n1 with an L-level signal or voltage V2. It is possible to supply it.

[0133] During period A2, circuit 10 supplies an L-level signal or voltage V2 to wiring 111. It is possible to supply it.

[0134] Next, during period B2, as shown in Figure 6(B), signal SP becomes L level, and signal S EL1 remains at a low level, and signal SEL2 remains at a high level. Therefore, circuit 1 0 means that no voltage or signal is supplied to node n2. Therefore, node n2 is It remains in a floating state, and the potential of node n2 remains V1 + Vth101_2 + Vx. Therefore, transistor 101_2 remains on, so wire 112 and wire 111 This remains in a conductive state via transistor 101_2. At this time, signal CK1 is L As the voltage rises from level to H level, the potential of wiring 111 begins to rise. Then, the node Since n2 remains in a floating state, the potential of node n2 is the same as the gate of transistor 101_2. It rises due to parasitic capacitance between the second terminal and the first terminal. This is known as bootstrap behavior. Thus, the potential at node n2 rises to V2 + Vth101_2 + Vx. This allows the potential of wiring 111 to rise to V2. In this way, signal OU T will be at the H level.

[0135] During period B2, circuit 10 supplies node n1 with an L-level signal or voltage V2. It is possible to supply it.

[0136] Furthermore, during period B2, circuit 10 does not supply signals or voltages to wiring 111. This is possible.

[0137] Next, during period C2, the signal RE becomes high, as shown in Figure 6(C). Circuit 10 distributes an L-level signal or voltage V2 to node n1, node n2, and / or It supplies power to line 111. Then the potential of node n1, the potential of node n2, and / or the wiring The potential of 111 becomes V1. Therefore, transistor 101_1 and transistor 10 Since 1_2 is turned off, wires 112 and 111 become non-conductive. And the signal OUT will be at L level.

[0138] Furthermore, during period C2, the signal CK1 occurs earlier than the timing when the potential of node n2 decreases. It is possible to set it so that the timing of the decrease to L level happens earlier. As shown in Figure 6(E), the L-level signal CK1 is transmitted from wiring 112 to transistor 10 It is possible to supply power to wiring 111 via 1_2. Transistor 101_2 The channel width is, for example, greater than the channel width of other transistors when other transistors are present. Because it is often large, the potential of wiring 111 can be reduced quickly. In other words, the signal The fall time of OUT can be shortened. Therefore, the potential of wiring 111 can be reduced. For example, when circuit 10 supplies an L-level signal or voltage V1 to wiring 111. A low-level signal CK1 is transmitted from wiring 112 through transistor 101_2 to wiring 111. If supplied, or if circuit 10 supplies an L-level signal or voltage V1 to wiring 111, Furthermore, an L-level signal CK1 is transmitted from wiring 112 through transistor 101_2 to wiring 111 In some cases, it may be supplied to [location].

[0139] Next, during periods D2 and E2, as shown in Figure 6(D), the circuit 10 has a voltage V A signal of level 1 or L is supplied to node n1, node n2, and / or wiring 111. Then, the potential of node n1, the potential of node n2, and / or the potential of wiring 111 are V1 It remains in this state. Therefore, transistors 101_1 and 101_2 are off. As a result, wiring 112 and wiring 111 remain in a non-conductive state. And signal O UT will remain at the L level.

[0140] As described above, during period T1, transistor 101_2 is turned off, and during period T2... And so, transistor 101_1 is turned off, so transistor 101_1 and transistor The number of times each of the transistors 101_2 is turned on, or the number of times transistor 101_1 and the transistors The time each of transistors 101_2 is on is reduced. Therefore, transistor 1 This can suppress the characteristic degradation of transistor 01_1 and transistor 101_2.

[0141] As described above, the semiconductor device of this embodiment suppresses the degradation of transistor characteristics. Yes, it is possible. Also, the potential of the H level of the signal OUT can be raised to V2, so the image This allows the on-time of the transistors in the element to be increased. As a result, the pixel can be filled with Since video signals can be written within a short time, it is possible to improve display quality. It is possible to shorten the falling and rising times of the signal OUT. Therefore, the video signal to pixels belonging to another row is written to the pixels belonging to the selected row. This prevents items from being stored away. As a result, the quality of the display can be improved. This can suppress variations in the falling edge time of the signal OUT, so the pixels can retain This can suppress variations in the effect of feedthrough on the video signal. It can suppress unevenness.

[0142] Alternatively, in the semiconductor device of this embodiment, the polarity of all transistors is set to N-channel type or P It is possible to use a channel type. Therefore, compared to CMOS circuits, the number of manufacturing steps can be reduced. This can lead to a reduction in the number of pixels, improved yield, increased reliability, or cost reduction. If all transistors, including the parts, are N-channel type, then the semiconductor layer of the transistor and For example, amorphous semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors can be used. This becomes possible. However, transistors using these semiconductors can be prone to degradation. There are many. However, the semiconductor device of this embodiment can suppress transistor degradation. .

[0143] Alternatively, to ensure that the semiconductor device continues to operate even if the characteristics of the transistor deteriorate, There is no need to increase the channel width of the transistor. Therefore, the channel width of the transistor can be reduced. This is possible because, in the semiconductor device of this embodiment, transistor degradation is suppressed. Because it can be controlled.

[0144] Note that circuit 10 has periods C1, D1, E1, A2, B2, C2, and During period D2 and / or period E2, an L-level signal or voltage V1 is supplied to node n1. It is possible to supply power, and it is also possible not to supply voltage or signals to node n1. However, this is not limited to this.

[0145] Note that circuit 10 has periods A1, B1, C1, D1, E1, C2, and During period D2 and / or period E2, an L-level signal or voltage V1 is supplied to node n2. It is possible to supply power, and it is also possible not to supply voltage or signals to node n2. However, this is not limited to this.

[0146] Note that circuit 10 has periods A1, C1, D1, E1, A2, C2, and During interval D2 and / or period E2, an L-level signal or voltage V1 is supplied to wiring 111. It is possible to supply power, and it is also possible not to supply voltage or signals to wiring 111. However, this is not limited to this.

[0147] Furthermore, signals CK1 and CK2 can be unbalanced. Figure 7(A) shows For example, in one cycle, the period during which the temperature is at the H level is shorter than the period during which it is at the L level. The timing chart is shown. This allows us to determine the timing in period C1 or period C2. Since an L-level signal CK1 is supplied to wiring 111, the falling time of signal OUT is... It can be shortened. Alternatively, if the wiring 111 is extended and arranged in the pixel area, to the pixel This can prevent the writing of unauthorized video signals. However, it is not limited to this, and can also prevent the writing of unauthorized video signals over a full cycle. It is possible for the period during which the patient is at level H to be longer than the period during which they are at level L.

[0148] Furthermore, the semiconductor device of this embodiment can use a multiphase clock signal. For example, when we denote it as n (where n is a natural number), an n+1 phase clock signal is one in each phase. This refers to n+1 clock signals that are shifted by n+1 periods each. Alternatively, it refers to a multiphase clock signal. Any two of the numbers can be input to wiring 112 and wiring 113, respectively. 7(B) provides an example of timing when using a three-phase clock signal in a semiconductor device. A chart is shown. However, it is not limited to this.

[0149] Furthermore, the larger n is, the lower the clock frequency becomes, thus reducing power consumption. Yes, it's possible. However, if n is too large, the number of signals increases, so the layout area will be larger. This can result in the external circuit becoming larger in size. Therefore, n < 8 Preferred. More preferably, n < 6. Even more preferably, n = 4. Alternatively, n=3 is preferable, but it is not limited to this.

[0150] Note that transistors 101_1 and 101_2 have similar functions, The channel width of transistor 101_1 and the channel width of transistor 101_2 are... It is preferable that the transistor sizes be roughly equal. This allows the current supply capabilities of the transistors to be made roughly equal. Alternatively, The degree of degradation of the transistors can be made roughly equal. Therefore, multiple transistors Even when switching between the two, the waveform of the signal OUT can be made to be roughly the same. However, , but not limited to this, the channel width of transistor 101_1 and transistor 101_2 The channel width can be different from that.

[0151] Note that when referring to the channel width of a transistor, this should be written as the W / L (W: channel width) of the transistor. This can be rephrased as the channel width (L: channel length) ratio.

[0152] Note that transistors 101_1 and 101_2 are turned on during the same period. It is possible that this can happen. For example, in period B1 or period B2, transistor 101_ When transistor 1 and transistor 101_2 are turned on, only one of the transistors turns on. This allows the potential of wiring 111 to rise faster than in the case of . Therefore, signal OU The rise time of T can be shortened.

[0153] As shown in Figure 8(A), wiring 112 is divided into multiple wirings called wiring 112A to 112B. It is possible to divide it into these. Then, the first terminal of transistor 101_1 is wired 112 It is possible to connect it to A and connect the first terminal of transistor 101_2 to wiring 112B. It is possible. Also, wiring 112A~112B can be connected to other wiring or nodes, etc. This is possible.

[0154] Note that, similar to Figure 8(A), in Figures 4(A)-(B), wiring 112 is also made into multiple wirings ( For example, it is possible to divide the wiring into sections 112A and 112B.

[0155] As shown in Figure 8(B), there is a gap between the gate and the second terminal of transistor 101_1. A capacitance element 121_1 is connected, and a capacitance is placed between it and the second terminal of the gate of transistor 101_2. It is possible to connect element 121_2. By doing so, bootstrap During operation, the potential of node n1 or node n2 tends to rise. Therefore, The Vgs of transistors 101_1 and 101_2 can be increased. Therefore, the channel width of these transistors can be reduced. Or, the signal OUT The fall time or rise time can be shortened. However, this is not limited to this. Furthermore, it is possible to omit either the capacitive element 121_1 or the capacitive element 121_2. This involves connecting the capacitive element to the gate of the transistor (nodes n1 and n2) and to the second terminal (wiring 1). It is possible to connect between (12) and (2). Alternatively, as a capacitive element, for example, an MIS capacitor can be used. It is possible to use it.

[0156] The material of one electrode of capacitive element 121_1 and capacitive element 121_2 is, for example, tra It is preferable that the gate material be similar to that of transistor 101_1 and transistor 101_2. It seems. The material of the other electrode of the capacitive element 121_1 and the capacitive element 121_2 is transient. The material is the same as the source or drain of transistor 101_1 and transistor 101_2. This is preferable. By doing so, the layout area can be reduced. This allows for an increase in capacitance value. However, it is not limited to this, and the capacitance element 121_1 And as the material for one electrode and the material for the other electrode of the capacitive element 121_2, various It is possible to use the materials.

[0157] Note that the capacitance value of capacitance element 121_1 and the capacitance value of capacitance element 121_2 are approximately equal. This is preferable. Alternatively, the area where one electrode and the other electrode of the capacitive element 121_1 overlap and The area where one electrode and the other electrode of the capacitive element 121_2 overlap is approximately equal to the area where they overlap. This is preferable. By doing so, even when switching between transistors, the transistors The goal is to make the Vgs of transistor 101_1 and the Vgs of transistor 101_2 approximately equal. Since this is possible, the waveform of the signal OUT can be made roughly equal. However, this is not limited to this. Therefore, the capacitance value of capacitance element 121_1 and the capacitance value of capacitance element 121_2 are different. This is possible. Alternatively, the area where one electrode and the other electrode of the capacitive element 121_1 overlap, The area where one electrode and the other electrode of the capacitive element 121_2 overlap can be different. be.

[0158] Furthermore, similar to Figure 8(B), in Figures 4(A)-(B) and Figure 8(A), the transitions are also shown. It is possible to connect the capacitive element 121_1 between the gate and the second terminal of the sta 101_1. Yes. Alternatively, a capacitive element 121_2 can be placed between the gate and the second terminal of transistor 101_2. It is possible to connect.

[0159] Furthermore, as shown in Figure 8(C), circuit 100 is connected to transistors 101_1 to 101_N It is possible to have multiple transistors. Transistors 101_1~101_ The first terminal of N is connected to wiring 112, and the second terminal of transistors 101_1 to 101_N The child is connected to wiring 111. And the gate of transistors 101_1~101_N Let these be nodes n1 to nN, respectively. The configuration in Figure 8(C) is as follows in Embodiment 1: This corresponds to the configuration when a transistor is used as a switch. Therefore, transistor 10 Switches 1_1 to 101_N perform the same function as switches 11_1 to 11_N.

[0160] Note that the larger N is, the more times each transistor turns on, or each transistor Since the time the transistor is on is shortened, the degradation of the transistor's characteristics can be suppressed. Yes, it is possible. However, if N is too large, the number of transistors will increase, and the circuit size will become larger. Therefore, it is preferable that N < 6. More preferably, it is preferable that N < 4. Furthermore, it is preferable that N=3 or N=2.

[0161] Furthermore, similar to Figure 8(C), in Figures 4(A)-(B) and 8(A)-(B), Circuit 100 has multiple transistors, namely transistors 101_1 to 101_N. This is possible. In particular, in Figure 8(A), the circuit 100 is transistor 101_1~ If there are multiple transistors named 101_N, the wiring 112 is divided into N wirings. This is possible. In particular, in Figure 8(B), the circuit 100 is transistor 101_1~ If there are multiple transistors called 101_N, then transistors 101_1~101_ Between the gate of N and the second terminal of transistors 101_1 to 101_N, respectively, there are capacitive elements. It is possible to connect them.

[0162] Furthermore, as shown in Figure 8(D), transistor 101_1 is connected to one terminal (hereinafter referred to as the positive terminal and One terminal (also called the negative terminal) is connected to node n1, and the other terminal (also called the negative terminal) is connected to wiring 111. It can be replaced with the following diode 101a_1. Similarly, the transistor 101_2 is connected to node n2 on one terminal (hereinafter also called the positive terminal) and the other terminal (Hereafter also referred to as the negative terminal) replaces the diode 101a_2 connected to wiring 111. This is possible. However, it is not limited to this, as shown in Figure 8(E), a transistor By connecting the first terminal of 101_1 to node n1, transistor 101_1 It is possible to make a diode-connected configuration. Similarly, transistor 101_2 By connecting the first terminal to node n2, transistor 101_2 is connected to the diode. It is possible to create a continuous configuration.

[0163] Furthermore, similar to Figures 8(D)-(E), Figures 4(A)-(B) and 8(A)-(C) are also shown. Even if transistors exist, it is possible to replace them with diodes. Or, transistors It is possible to configure it in a diode-connected configuration.

[0164] Furthermore, as shown in Figure 8(F), it is possible to split the output signal into two. Furthermore, the semiconductor device may have circuit 120. Circuit 120 is a transistor It has multiple transistors, numbered 122_1 to 122_2. Circuit 120 is circuit 100 It has a similar function to transistor 1. Transistors 122_1 to 122_2 each have the same function as transistor 1. It has the same function as 01_1~101_2. The first terminal of transistor 122_1 is The second terminal of transistor 122_1 is connected to wire 112 and wire 211. The gate of transistor 122_1 is connected to node n1. The first terminal is connected to wiring 112, and the second terminal of transistor 122_2 is connected to wiring 211 The gate of transistor 122_2 is connected to node n2. Thus, Transistors 101_1 and 122_1 are controlled at the same timing, Transistor 101_2 and transistor 122_2 are controlled at the same time. Therefore, the signal output from wiring 211 is approximately equal to signal OUT. The timing will result in either an H level or an L level.

[0165] Furthermore, if the signal output from wiring 111 functions as a gate signal or a selection signal, The signals output from wiring 211 include a transfer signal, a reset signal, or a gate signal, etc. It is possible for it to function in this way. In such a case, the load of wiring 111 is the negative load of wiring 211. Since it is often larger than the load, the channel width of transistor 101_1 is It is preferable that it is larger than the channel width of transistor 122_1. Similarly, transistor 102 The channel width of _2 is preferably greater than the channel width of transistor 122_2. However, this is not the only example.

[0166] Furthermore, similar to Figure 8(F), in Figures 4(A)-(B) and 8(A)-(E), The semiconductor device, by having circuit 120, is capable of splitting the output signal into two. And circuit 120 has multiple transistors 122_1 to 122_2. It is possible to have a transistor. In particular, in Figure 8(C), the circuit 100 is a transistor If there are multiple transistors named 101_1 to 101_N, then circuit 120 is N It is possible to have a number of transistors.

[0167] Next, we will explain a specific example of circuit 10. First, referring to Figure 9(A), circuit 10 rotates The configuration when a path 200 is included will be described. Circuit 200 is a part of circuit 10. Circuit 200 includes wiring 114, wiring 115_1, wiring 115_2, node n1, and / or , and is connected to node n2. However, it is not limited to this, and circuit 200 may be connected to other wiring, or It can be connected to other nodes.

[0168] Circuit 200 often has one or more transistors. The polarity of the transistor is often the same as that of transistors 101_1 to 101_2, and N channels It is often a P-channel type. However, it is not limited to this, and circuit 200 is a P-channel type trace. It is possible to have a transistor. Alternatively, circuit 200 may have an N-channel type transistor. It is possible to have a P-channel type transistor. In other words, circuit 200 is C It is possible to use a MOS circuit.

[0169] Circuit 200 controls signal SP, signal SEL1, signal SEL2, the potential of node n1, and / or Depending on the potential of node n2, a signal or voltage is supplied to node n1 and / or node n2. It has a function to control the timing of supply. In this way, the circuit 200 controls the potential of node n1. , and / or, it has the function of controlling the potential of node n2. For example, circuit 200 has H It has the function of supplying a bell signal or voltage V2 to node n1 and / or node n2. Alternatively, circuit 200 transmits an L-level signal or voltage V1 to node n1, and / or node It has the function of supplying to n2. Alternatively, circuit 200 supplies signals or voltages etc to node n1 and And / or, it has the function of not supplying power to node n2. Or, circuit 200 has the power to node n1. It has the function of raising the potential of node n2. Alternatively, circuit 200 has the function of raising the potential of node n2. It has the function of decreasing or maintaining the potential of node n1 and / or node n2. Circuit 200 has the function of putting node n1 and / or node n2 into a floating state.

[0170] Here, an example of circuit 200 will be explained with reference to Figure 9(B). Circuit 200 is... It has multiple transistors, namely transistors 201_1 to 201_2. Transistor 2 The first terminal of 01_1 is connected to wiring 115_1, and the second terminal of transistor 201_1 is connected to It is connected to the gate of transistor 101_1, and the gate of transistor 201_1 is It is connected to wiring 114. The first terminal of transistor 201_2 is connected to wiring 115_2. The second terminal of transistor 201_2 is connected to the gate of transistor 101_2. The gate of transistor 201_2 is connected to wiring 114. However, this is not limited to this. Therefore, various configurations can be used for circuit 200.

[0171] Transistor 201_1 and transistor 201_2 are transistors 101_1 and It is preferable that it has the same polarity as transistor 101_2, and that it be an N-channel type. And, not limited to, transistor 201_1 and / or transistor 201_2 It can be a P-channel type.

[0172] Transistor 201_1, depending on the potential of wiring 114, interacts with wiring 115_1 and node n1. It has the function of controlling the conduction state of the circuit. Alternatively, transistor 201_1 controls the power of wiring 114. Depending on the position, it has the function of supplying the potential of wiring 115_1 to node n1. Or, Zista 201_1 has a function that turns on or off depending on the signal SP, or Trans The zista 201_1 controls whether or not the signal SEL1 is input to transistor 101_1. It has the function of turning on or off to receive a signal. Transistor 201_1 turns on or off to receive a signal. It has a function to control whether or not to set the potential state of OUT. Transistor 201_2 A function that controls the conductivity state between wiring 115_2 and node n2 according to the potential of wiring 114. It has. Or, transistor 201_2, depending on the potential of wiring 114, wiring 115_ It has the function of supplying potential 2 to node n2. Alternatively, transistor 201_2 is a signal It has a function that turns on or off depending on SP, or transistor 201_2 is a transistor It has a function to control whether or not the signal SEL2 is input to the signaler 101_2. The transistor 201_2 sets the potential state of the signal OUT by being turned on or off. It has a function to control whether or not it does.

[0173] The operation of the semiconductor device shown in Figure 9(A) will be explained. Here, as an example, the operation of circuit 200 will be described. Let's explain the case where the path configuration is the circuit configuration shown in Figure 9(B). During period A1, Figure As shown in 10(A), the signal SP becomes high level, so transistor 201_1, and Transistor 201_2 turns on. Therefore, the H level signal SEL1 is connected to wiring 11 A low-level signal SE is supplied from 5_1 to node n1 via transistor 201_1. L2 is supplied to node n2 via transistor 201_2 from wiring 115_2. Thus, the potential at node n1 begins to rise, and the potential at node n1 becomes V2. After that, The potential of n1 is the threshold voltage (V2) of transistor 201_1 from the potential of wiring 114. When it rises to the value obtained by subtracting (th201_1) (V2-Vth201_1), the truncated Zistar 201_1 is turned off. Therefore, node n1 sets the potential to V2 - Vth201_1 It maintains this state while floating.

[0174] During the period B1 to E1, the signal SP becomes L level, so transistor 201_1, and Transistor 201_2 is turned off. Therefore, wiring 115_1 and node n1 are not conductive. The circuit becomes conductive, and wiring 115_2 and node n2 become non-conductive. Note that during period B1... A schematic diagram of the semiconductor device is shown in Figure 10(B), and the schematic diagram of the semiconductor device during period C1 is Figure 10(C) shows the schematic diagram of the semiconductor device during periods D1 and E1, and Figure 10(D) shows the schematic diagram of the semiconductor device during periods D1 and E1. This will be shown.

[0175] Next, during period A2, as shown in Figure 10(E), the signal SP becomes high level, Transistors 201_1 and 201_2 are turned on. Therefore, the signal level is low. The signal SEL1 is supplied to node n1 via transistor 201_1 from wiring 115_1. The H-level signal SEL2 is supplied and transmitted from wiring 115_2 through transistor 201_2. This is then supplied to node n2. Thus, the potential at node n1 becomes V1, and the power at node n2 is supplied. The position begins to rise. Subsequently, the potential of node n2 transitions from the potential of wiring 114 (V2) The value obtained by subtracting the threshold voltage of STA201_2 (Vth201_2) (V2-Vth201_2) Once it rises to this point, transistor 201_2 turns off. Therefore, node n2 is The potential remains at V2-Vth201_2 while the element enters a floating state.

[0176] During the period B2 to E2, the signal SP becomes L level, so transistor 201_1, and Transistor 201_2 is turned off. Therefore, wiring 115_1 and node n1 are not conductive. The circuit becomes conductive, and wiring 115_2 and node n2 become non-conductive. Note that during period B2... A schematic diagram of the semiconductor device is shown in Figure 10(F), and the schematic diagram of the semiconductor device during period C2 is Figure 10(G) shows a schematic diagram of the semiconductor device during periods D2 and E2, and Figure 10(H) shows a schematic diagram of the semiconductor device during those periods. This will be shown.

[0177] As described above, by configuring circuit 10, any transistor in circuit 100 can be It can be selectively turned on or off. Also, the transistor of circuit 100 can be turned off. Even when this is done, a potential is applied to the gate of the transistor that is turned off from circuit 10, so floating It is possible to suppress the entry into a idle state.

[0178] Note that transistors 201_1 and 201_2 have the same function, The channel width of transistor 201_1 and the channel width of transistor 201_2 are... It is preferable that the transistor sizes be roughly equal. This allows the current supply capability to be made roughly equal. Alternatively, the inferiority of the transistor The degree of transformation can be made roughly equal. Therefore, by switching between transistors... Also, the potential of node n1 and the potential of node n2 can be made approximately equal, so The waveform of the OUT signal can be made roughly equal. However, this is not limited to the transistor. The channel width of transistor 201_1 and the channel width of transistor 201_2 are different. This is possible.

[0179] Note that the load of transistor 201_1 (for example, node n1) is transistor 101_1 Since it is often smaller than the load (e.g., wiring 111), the transistor 201_1 The channel width is preferably smaller than the channel width of transistor 101_1. The load of transistor 201_2 (e.g., node n2) is the negative load of transistor 101_2. Since it is often smaller than the load (for example, wiring 111), the channel of transistor 201_2 The channel width is preferably smaller than the channel width of transistor 101_2. However, However, the channel width of transistor 201_1 is less than the channel width of transistor 101_1. It is possible to have a value greater than the channel width. Or, the channel width of transistor 201_2 is This can be greater than the channel width of transistor 101_2.

[0180] Furthermore, as shown in Figure 9(C), the circuit 100 is connected to transistor 101_ If there are multiple transistors numbered 1 to 10¹N, then circuit 200 is configured with transistor 2 It is possible to have multiple transistors, numbered 01_1 to 201_N. The first terminals of terminals 201_1 to 201_N are connected to wirings 115_1 to 115_N, respectively. The second terminals of transistors 201_1 to 201_N are connected to nodes n1 to nN. The gates of transistors 201_1 to 201_N are connected to wiring 114.

[0181] As shown in Figure 9(D), wiring 114 is divided into multiple wirings called wiring 114A to 114B. It is possible to divide it into these. Therefore, wiring 114A to 114B is the same as wiring 114. It is possible to have the function. The gate of transistor 201_1 is in contact with wiring 114A. The gate of transistor 201_2 is connected to wiring 114B. The lines 114A and 114B are each supplied with signals having approximately the same waveform. This is possible, and separate signals can be input.

[0182] In addition, similar to Figure 9(D), in Figure 9(C), wiring 114 is divided into multiple wires. It is possible.

[0183] As shown in Figure 9(E), the first terminal of transistor 201_1 and transistor 2 The first terminal of 01_2 can be connected to the same wiring. See the example in Figure 9(E). The first terminals of transistors 201_1 to 201_2 are connected to wiring 115_1. However, this is not limited to the first terminal of transistors 201_1 to 201_2, and also the first terminal of transistors 201_1 to 201_2. It can be connected to various wires. For example, transistors 201_1~201_ The first terminal of 2 is connected to wiring 113, or to wiring to which signal CK2 is input. It is possible.

[0184] Furthermore, similar to Figure 9(E), in Figures 9(C) to (D), transistor 201_1~ The first terminal of 201_2 can be connected to the same wiring. In particular, in the case of Figure 9(C) In this case, the first terminals of transistors 201_1 to 201_N are connected to the same wiring. This is possible.

[0185] As shown in Figure 9(F), the first terminal of transistor 201_1 is connected to wiring 114. Then, the second terminal of transistor 201_1 is connected to node n1, and transistor 201 The gate of _1 can be connected to wiring 115_1. Transistor 201_2 The first terminal of transistor 201_2 is connected to wiring 114, and the second terminal of transistor 201_2 is connected to node n2. The connection allows the gate of transistor 201_2 to be connected to wiring 115_2. Yes. In this case, during period T1, signal SEL1 is at a high level and signal SEL2 is at a low level. If it is at a certain level, transistor 201_1 will turn on, and transistor 201_2 It turns off. Therefore, during period A1, the H-level signal SP is transmitted from wiring 114 to the tracer. Since it is supplied to node n1 via inverter 201_1, the potential of node n1 rises. On the other hand, during period T2, signal SEL1 is at a low level and signal SEL2 is at a high level. If that is the case, transistor 201_1 will be off and transistor 201_2 will be on. Therefore, during period A2, the H-level signal SP is transmitted from wiring 114 to the transistor. Since it is supplied to node n2 via TA201_2, the potential of node n2 increases.

[0186] As shown in Figure 11(A), the second terminal of transistor 201_1 and node n1 A diode-connected transistor 202_1 can be connected in between. There is a diode between the second terminal of transistor 201_2 and node n2. It is possible to connect transistor 202_2 in the connected configuration. The first terminal of 202_1 is connected to the second terminal of transistor 201_1, and the transistor The second terminal of 202_1 is connected to node n1, and the gate of transistor 202_1 is It is connected to the second terminal of transistor 201_1. The first terminal of transistor 202_2 is , is connected to the second terminal of transistor 201_2, and the second terminal of transistor 202_2 is , connected to node n2, the gate of transistor 202_2 is connected to transistor 201_2 It is connected to the second terminal. Transistors 201_1 and 201_2 are connected to the second terminal. It can function as an oxide. Transistor 201_1 is in a non-conductive state. This has the function of preventing a decrease in the potential of node n1. Similarly, transistor 2 01_2 has the function of preventing a decrease in the potential of node n2 by becoming non-conductive. However, this is not limited to the second terminal of transistor 201_1 and node n1. , and / or, between the second terminal of transistor 201_2 and node n2, various elements Alternatively, it is possible to connect the circuit to the first terminal of transistor 201_1. Between wire 115_1 and / or between the first terminal of transistor 201_2 and wiring 115_2 Various elements or circuits can be connected between them. For example, Figure 11(B) As shown, transistor 202_1 is connected to the first terminal of transistor 201_1 and wiring 1 It is possible to connect it to 15_1. Alternatively, transistor 202_2 is a transistor It is possible to connect the first terminal of the converter 201_2 to the wiring 115_2.

[0187] Furthermore, similar to Figures 11(A)-(B), in Figures 9(C)-(F), transistor 2 Between the second terminal of 01_1 and node n1, and between the second terminal of transistor 201_2 and node n Between 2, between the first terminal of transistor 201_1 and wiring 115_1, and / or Between the first terminal of transistor 201_2 and wiring 115_2, various elements or circuits are connected. It is possible to connect. As an example, Figure 11(C) shows that in Figure 9(F), A diode-connected transistor is connected between the second terminal of the transistor 201_1 and node n1. Transistor 202_1 is connected, and between the second terminal of transistor 201_2 and node n2 This shows the configuration when transistor 202_2 is connected in a diode-connected configuration. Figure 11(D) shows, as an example, the first of transistor 201_1 in Figure 9(F). A diode-connected transistor 202_1 is connected between the terminal and the wiring 114. A diode is connected between the first terminal of transistor 201_2 and wiring 114. The configuration shows the case when transistor 202_1 is connected.

[0188] As shown in Figure 11(E), circuit 200 is connected to transistors 203_1 to 203_2 It is possible to have multiple transistors, such as transistors 203_1 to 203. _2 preferably has the same polarity as transistors 201_1~201_2, and N-channel It is assumed to be a Nell type. However, it is not limited to this, and transistors 203_1 to 203 _2 can be a P-channel type. The first terminal of transistor 203_1 is The second terminal of transistor 203_1 is connected to node n1, and is connected to wiring 117. The gate of transistor 203_1 is connected to wiring 115_2. Transistor 203 The first terminal of _2 is connected to wiring 117, and the second terminal of transistor 203_2 is connected to NO It is connected to do n2, and the gate of transistor 203_2 is connected to wiring 115_1. However, this is not limited to this. For example, the second terminal of transistor 203_1 is node n It is possible to connect to 2. Alternatively, the second terminal of transistor 203_2 is the node It is possible to connect to n1.

[0189] Furthermore, transistor 203_1, in response to the signal SEL2, connects wiring 117 and node n1. By controlling the conduction state, the timing of the supply of voltage V1 to node n1 can be controlled. It has the function of being able to function as a switch. Transistor 203_2 is By controlling the conduction state between wiring 117 and node n2 in accordance with signal SEL1, It has the function of controlling the timing at which voltage V1 is supplied to node n2, and acts as a switch. It is possible for it to function. Thus, during period T1, transistor 203_2 Then, voltage V1 is supplied to node n2. Therefore, transistor 201_2 is off. However, the potential of node n2 can be fixed. Similarly, during period T2, The transistor 203_1 supplies voltage V1 to node n1. Even when 201_1 is off, the potential of node n1 can be fixed. As a result, This allows us to obtain semiconductor devices that are highly resistant to noise.

[0190] As shown in Figure 11(F), wiring 117 is connected to multiple wirings 117A to 117B. It is possible to divide it into lines. The first terminal of transistor 203_1, and transistor The first terminal of 203_2 can be connected to wires 117A and 117B, respectively. Yes. Wiring 117A~117B is connected to various wires, various elements, or various nodes. It is possible to do so.

[0191] As shown in Figure 12(A), the second terminal of transistor 203_1 is connected to wiring 115_ The second terminal of transistor 203_2 is connected to wire 115_2. This is possible. By doing this, the period during which transistor 203_1 is off (for example) During period T1), a high-level signal is input to the first terminal of transistor 203_1. Therefore, a reverse bias is applied to transistor 203_1, thus suppressing degradation. Similarly, the period during which transistor 203_2 is turned off (e.g., period T2) In this case, a high-level signal is input to the first terminal of transistor 203_2. Therefore, A reverse bias is applied to transistor 203_2, which helps to suppress degradation. .

[0192] Furthermore, as shown in Figure 12(B), transistor 203_1 and transistor 203_ 2 can be in a diode-connected configuration. For example, transistor 203 The first terminal of _1 is connected to wiring 115_1, and the second terminal of transistor 203_1 is The gate of transistor 203_1 is connected to node n1. Similarly, the first terminal of transistor 203_2 is connected to wiring 115_2, and the transistor The second terminal of transistor 203_2 is connected to node n2, and the gate of transistor 203_2 is , and is connected to node n2. In this case, during period T1, signal SEL2 is at L level. Then, the L-level signal SEL2 is transmitted from wiring 115_2 through transistor 203_2. It is supplied to node n2. Therefore, the potential of node n2 is fixed so that it is approximately V1. This is possible. On the other hand, during period T2, when the signal SEL1 reaches the L level, The signal SEL1 is sent from wiring 115_1 to node n1 via transistor 203_1. It is supplied. Therefore, the potential of node n1 can be fixed to be approximately V1. However, it is not limited to this. For example, the gate of transistor 203_1 is wired 1 It is possible to connect to 15_1. Alternatively, the gate of transistor 203_2 is It is possible to connect to line 115_2.

[0193] Furthermore, similar to Figures 11(E)-(F) and 12(A)-(B), Figures 9(C)-(F) In Figures 11(A) to (D), the circuit 200 is connected to transistors 203_1 to 20 It is possible to have 3_2. For example, in Figure 12(C), in Figure 9(F), The configuration when path 200 has transistors 203_1 to 203_2 is shown. Figure 12(D )~(E) shows that in Figure 11(A), circuit 200 is connected to transistors 203_1~203 The configuration when _2 is present is shown. Figure 12(F) shows the circuit 200 in Figure 11(D) The configuration shown is for when transistors 203_1 to 203_2 are present.

[0194] Furthermore, the second terminal of transistor 203_1 and the second terminal of transistor 203_2 are It can be connected to various wiring or nodes. For example, as shown in Figure 12(E) Furthermore, the second terminal of transistor 203_1 is connected to the second terminal of transistor 201_1. It is possible to do so. Similarly, the second terminal of transistor 203_2 is the same as transistor 2 It can be connected to the second terminal of 01_2. Alternatively, as shown in Figure 12(F), The second terminal of transistor 203_1 is connected to the first terminal of transistor 201_1. This is possible. Similarly, the second terminal of transistor 203_2 is connected to transistor 201 It can be connected to the first terminal of _2.

[0195] Furthermore, as shown in Figure 5(F), circuit 200 is connected to transistors 201_1 to 201_2. In addition, it is possible to have multiple transistors, namely transistors 203_1 to 203_2. It is possible. Transistors 203_1~203_2 are transistors 201_1~201_ It is preferable that it has the same polarity as 2 and is of the N-channel type. However, it is not limited to this. It is not specified, and transistors 203_1~203_2 can be P-channel type. The first terminal of transistor 203_1 is connected to wiring 114, and transistor 203 The second terminal of _1 is connected to node n1, and the gate of transistor 203_1 is connected to wire 1. It is connected to 18. The first terminal of transistor 203_2 is connected to wire 114, and the transistor The second terminal of transistor 203_2 is connected to node n2, and the gate of transistor 203_2 The wire is connected to wiring 118. The signal CK2 is assumed to be input to wiring 118. Therefore, wiring 118 can function as a signal line or a clock signal line. However, this is not limited to the wiring 118, which may carry various signals, voltages, or currents. It is possible to input. Transistor 203_1 distributes according to the potential of wiring 118. It has the function of controlling the conductivity state between line 114 and node n1. Or, transistor 203 _1 has the function of supplying the potential of wiring 114 to node n1 according to the potential of wiring 118. Transistor 203_2 reacts to the potential of wiring 118, and to wiring 114 and node n2. It has a function to control the conductivity state with respect to the wiring 118. Alternatively, transistor 203_2 has a function to control the conductivity state with respect to the wiring 118. It has the function of supplying the potential of wiring 114 to node n2 according to the potential. However, this Not limited to these functions, transistors 203_1 to 203_2 may also have various other functions. It is possible.

[0196] Note that the first terminal of transistor 203_1 and the first terminal of transistor 203_2 are separate. It is possible to connect to various wires. Note that the gate and transistor 203_1 The gate of the 203_2 can be connected to separate wiring.

[0197] Furthermore, similar to Figure 5(F), Figures 9(C)-(F), Figures 11(A)-(F), and Figure 12( In A) to (F), transistors 203_1 to 203_2 have the same function. It is possible to add a new Rangista.

[0198] Furthermore, as shown in Figure 13(A), transistors 101_1 to 101_2, transistor P-channel transistors can be used as 201_1 to 201_2. Transistors 101p_1 to 101p_2 are related to transistors 101_1 to 101_2. Accordingly, it is a P-channel type. Transistors 102p_1 to 102p_2 are transistors It corresponds to 102_1 to 102_2 and is a P-channel type. And as shown in Figure 13(B)... Therefore, if the transistor's polarity is P-channel type, voltage V1 is supplied to wiring 113, Voltage V2 is supplied to line 117, and the potentials of signals CK1, SP, RE, and node n1 are affected. The potential of node n2 and signal OUT are compared to the timing chart in Figure 4(B). It should be noted that it is being rotated.

[0199] Furthermore, similar to Figure 13(A), Figures 9(C)-(F), 11(A)-(F), and 12 In (A) to (F), a P-channel transistor is used as the transistor. This is possible.

[0200] (Embodiment 3) This embodiment describes an example of a configuration different from the circuit 10 described in Embodiment 2. The contents described in Embodiments 1 and 2 will not be explained here. The contents described in the embodiments will be combined as appropriate with the contents described in Embodiments 1 and 2. It is possible.

[0201] First, a specific example of the circuit 10, which differs from that of Embodiment 2, will be described with reference to Figure 14. Circuit 10 in Figure 14 has circuit 300 in addition to circuit 200. Circuit 300 is connected to circuit 10 It is part of the circuit. Furthermore, a portion of circuit 300 can be shared with circuit 200, and circuit 20 Some of the 0s can be shared with circuit 300. Circuit 300 is wiring 113, wiring It is connected to wiring 117, node n1, node n2, and / or wiring 111. However, without limitation, circuit 200 may be connected to other wiring or other nodes. This is possible.

[0202] Circuit 300 often has one or more transistors. The polarity of the transistor is often the same as that of transistors 101_1 to 101_2, and N channels It is often a P-channel type. However, it is not limited to this, and circuit 300 is a P-channel type trace. It is possible to have an N-channel transistor. Alternatively, circuit 300 may have an N-channel transistor. It is possible to have a P-channel type transistor. In other words, circuit 300 is C It is possible to use a MOS circuit.

[0203] Circuit 300 controls signal RE, the potential of node n1, the potential of node n2, and / or signal OU. Depending on the fall time of T, a signal is sent to node n1, node n2, and / or wiring 111. Alternatively, it has a function to control the timing of supplying voltage. Thus, circuit 200 has a function to control the timing of supplying voltage. It has the function of controlling the potential of node n1, the potential of node n2, and / or the potential of wiring 111. For example, circuit 200 receives an L-level signal or voltage V1 at node n1, node n2, and It has the function of supplying power to wiring 111.

[0204] Next, an example of circuit 300 will be explained with reference to Figure 15(A). In the example, circuit 300 consists of multiple transistors, namely transistors 301_1 to 301_2. Multiple transistors, including transistor 302 and transistors 303_1 to 303_2. , transistor 304, multiple circuits 310_1~310_2, and circuit 320 It has.

[0205] Note that transistors 301_1~301_2, transistor 302, and transistor 303 _1~303_2, and transistor 304 are assumed to be N-channel type as an example. However, this is not limited to transistors 301_1~301_2, transistor 3 02, transistors 303_1~303_2 and / or transistor 304 are P-type It is possible for it to be a channel type.

[0206] For example, as shown in Figure 15(B), circuits 310_1 to 310_2, and circuit For the 320, an inverter circuit can be used. However, it is not limited to this. In addition, various other circuits can be used for circuits 310_1~310_2 and circuit 320. This is possible.

[0207] Next, the connection relationships of circuit 300 in Figure 15(A) will be explained. Transistor 301_1 The first terminal of the transistor 301_1 is connected to wiring 117, and the second terminal of transistor 301_1 is connected to node n It is connected to 1. The first terminal of transistor 301_2 is connected to wiring 117, The second terminal of transistor 301_2 is connected to node n2. The first terminal of transistor 302 The child is connected to wiring 117, and the second terminal of transistor 302 is connected to wiring 111. The first terminal of transistor 303_1 is connected to wiring 117, and transistor 303 The second terminal of _1 is connected to node n1, and the gate of transistor 303_1 is connected to wire 1. It is connected to 16. The first terminal of transistor 303_2 is connected to wiring 117, and the transistor The second terminal of transistor 303_2 is connected to node n2, and the gate of transistor 303_2 The terminal is connected to wiring 116. The first terminal of transistor 304 is connected to wiring 117. The second terminal of transistor 304 is connected to wiring 111, and the transistor 304 The gate is connected to wiring 116. Circuit 310_1 is connected to wiring 113, node n1, wiring 117 is connected to the gate of transistor 301_1. Circuit 310_2 is connected to wiring 1 13, node n2, wiring 117, and the gate of transistor 301_2 are connected. The path 320 is connected to wiring 113, wiring 111, wiring 117, and the gate of transistor 302. Connected.

[0208] Next, the functions of circuits 310_1 to 310_2 and circuit 320 will be explained. The path 310_1 controls the gate potential of transistor 301_1 according to the potential of node n1. By controlling it, it has the function of controlling the conduction state of transistor 301_1, and control It can function as a circuit. Circuit 310_2, depending on the potential of node n2, By controlling the gate potential of transistor 301_2, transistor 301_ It has the function of controlling the conduction state of 2 and can function as a control circuit. Circuit 3 20 controls the gate potential of transistor 302 according to the potential of wiring 111. This has the function of controlling the conduction state of transistor 302 and functions as a control circuit. It is possible to do so. However, it is not limited to this, and circuits 310_1 to 310_2, and Route 320 can also have various other functions.

[0209] Next, transistors 301_1~301_2, transistor 302, transistor 303 The functions of transistors 1-303 and 304 will be explained. 301_1 is connected to the wiring 117 and node n1 in accordance with the output signal of circuit 310_1. A device that controls the timing of supplying voltage V1 to node n1 by controlling its state. It has the ability to function as a switch. Transistor 301_2 is in the circuit The continuity state between wiring 117 and node n2 is controlled according to the output signal of 310_2. Therefore, it has a function to control the timing of supplying voltage V1 to node n2, and the switch and It is possible for it to function in this way. Transistor 302 responds to the output signal of circuit 320. By controlling the conductivity between wiring 117 and wiring 111, the voltage V1 is controlled in wiring 111 It has a function to control the timing of supply and can function as a switch. Transistor 303_1 controls the conduction state between wiring 117 and node n1 according to the signal RE. By controlling this, the function controls the timing of supplying voltage V1 to node n1. It has the capability to function as a switch. Transistor 303_2 receives the signal RE Accordingly, the conduction state between wiring 117 and node n2 is controlled, thereby controlling the voltage V1. It has a function to control the timing of supply to n2 and can function as a switch. It is possible. Transistor 304 controls the conduction between wiring 117 and wiring 111 in response to signal RE. A device that controls the timing of supplying voltage V1 to wiring 111 by controlling the state. It has the capability to function as a switch. However, it is not limited to this, and can also function as a switch. Transistors 301_1~301_2, Transistor 302, Transistors 303_1~30 Transistors 3_2 and 304 can also have various other functions.

[0210] Next, an example of the operation of circuit 300 in Figure 15(A) will be explained. The operation of the semiconductor device has some commonalities with the operation of the semiconductor device in Figure 4(A), therefore Figure 4( The explanation will be given with reference to the timing chart in C). Note that this applies to Embodiments 1 and 2 as well. Where necessary, the explanation will be omitted.

[0211] First, during period A1, as shown in Figure 16(A), the signal RE becomes L level, Transistors 303_1 to 303_2 and transistor 304 are turned off. Circuit 31 The output signal of 0_1 is such that the potential of node n1 becomes, for example, V2 + Vth101_1 + Vx. Then it becomes L level. Therefore, transistor 301_1 turns off. Circuit 310_2 The output signal becomes high level because the potential at node n2 is approximately V1. Therefore, The transistor 301_2 turns on. The output signal of circuit 320 is when the potential of wiring 111 is large. The voltage becomes V1, which is high. Therefore, transistor 302 turns on. As a result, wiring 117 and node n1 become non-conductive, and wiring 117 and node n2 become non-conductive. Conduction occurs via transistor 301_2, and wiring 117 and wiring 111 are connected to the transistor. Conduction occurs via 302. Therefore, the voltage V1 is transmitted from wiring 117 to transistor 30. It is supplied to node n2 via 1_2. Voltage V1 is supplied from wiring 117 to transistor 30 It is supplied to wiring 111 via 2.

[0212] On the other hand, during period A2, as shown in Figure 16(B), the output signal of circuit 310_1 is NO Since the potential of n1 is approximately V1, it becomes H level, and the output signal of circuit 310_2 is Therefore, the potential at node n2 becomes, for example, V2 + Vth101_2 + Vx, which is L level. However, this is different from period A1. Therefore, transistor 301_1 turns on, Zistor 301_2 is turned off. As a result, wiring 117 and node n1 are connected to transistor 3 Conduction occurs via 01_1, and wiring 117 and node n2 become non-conductive. Then, voltage V1 is supplied to node n1 via wiring 117.

[0213] Next, in period B1, as shown in Figure 16(C), the signal RE remains at the L level. Transistors 303_1 to 303_2, and transistor 304 remain off. The output signal of circuit 310_1 is such that the potential at node n1 is, for example, V2 + Vth101_1 + Vx Since it remains at the L level, transistor 301_1 remains off. Yes. The output signal of circuit 310_2 is H because the potential at node n2 remains roughly V1. The level remains the same. Therefore, transistor 301_2 remains on. Circuit 320 The output signal will be at an L level because the potential of wiring 111 will be approximately V2. Therefore, Transistor 302 turns off. As a result, wiring 117 and node n1 become non-conductive. As a result, wiring 117 and node n2 remain in a conductive state via transistor 301_2. As a result, wiring 117 and wiring 111 become non-conductive. Therefore, voltage V1 is transmitted to wiring 1 It is supplied from 17 to node n2 via transistor 301_2.

[0214] On the other hand, during period B2, as shown in Figure 17(A), the output signal of circuit 310_1 is NO Since the potential of n1 remains roughly at V1, it remains at an L level, and the output of circuit 310_2 The force signal is obtained when the potential at node n2 remains, for example, approximately V2 + Vth101_2 + Vx. Therefore, the point where it remains at the L level is different from period B1. Thus, transistor 301 _1 remains on, and transistor 301_2 remains off. As a result, the wiring 117 and node n1 remain in a conductive state via transistor 301_1, wiring 1 Node 17 and node n2 remain non-conductive. Therefore, voltage V1 is transmitted through wiring 117. It is then supplied to node n1.

[0215] Next, in periods C1 and C2, as shown in Figure 17(B), the signal RE reaches the H level. As this occurs, transistors 303_1~303_2 and transistor 304 are turned on. Yes. The output signal of circuit 310_1 is such that the potential at node n1 is approximately V1, so H It becomes a bell. Therefore, transistor 301_1 turns on. Output signal of circuit 310_2 Therefore, the potential at node n2 becomes approximately V1, and thus reaches an H level. T301_2 turns on. The output signal of circuit 320 is when the potential of wiring 111 is approximately V1 Therefore, it becomes H level. Thus, transistor 302 turns on. As a result, Line 117 and node n1 are connected via transistors 301_1 and 303_1. When a conductive state is established, the wiring 117 and node n2 are connected to transistor 301_2 and transistor Conduction occurs via 303_2, and wiring 117 and wiring 111 are connected to transistor 302 and And it becomes conductive through transistor 304. Therefore, the voltage V1 is from wiring 117 to Power is supplied to node n1 via transistor 301_1 and transistor 303_1. Voltage V1 is transmitted from wiring 117 through transistors 301_2 and 303_2. The voltage V1 is supplied to node n2. The voltage V1 is supplied from wiring 117 to transistor 302 and transistor It is supplied to wiring 111 via sta 304.

[0216] Next, in periods D1, D2, E1, and E2, as shown in Figure 17(C), Since the signal RE will be at a low level, transistors 303_1~303_2 and the transistor 304 is turned off. The output signal of circuit 310_1 is such that the potential at node n1 is approximately V1 Since it remains at the H level, transistor 301_1 remains ON. Yes. The output signal of circuit 310_2 is H because the potential at node n2 remains roughly V1. The level remains the same. Therefore, transistor 301_2 remains on. Circuit 320 The output signal remains at a high level because the potential of wiring 111 remains approximately V1. Therefore, transistor 302 remains on. As a result, wiring 117 and node n1 The transistor 301_1 remains in a conductive state, and the wiring 117 and node n2 are The transistor 301_2 remains in a conductive state, and the wires 117 and 111 are connected. The transistor 302 remains in a conductive state. Therefore, the voltage V1 is from wiring 117. Voltage V1 is supplied to node n1 via transistor 301_1. Voltage V1 is supplied from wiring 117. The voltage V1 is supplied to node n2 via transistor 301_2. The voltage V1 is supplied from wiring 117. It is supplied to wiring 111 via transistor 302.

[0217] Note that transistors 301_1 to 301_2 have similar functions, The channel widths of the transistors are preferably roughly equal. Similarly, transistors 303_1~30 Since 3_2 has a similar function, it is preferable that these channel widths are roughly equal. However, without limitation, transistors 301_1 to 301_2 are channeled to each other. It is possible to have structures with different widths. Alternatively, transistors 303_1~303_2 It is possible to have a structure in which the channel widths differ from one another.

[0218] Transistors 301_1 to 301_2 supply voltage V1 to nodes n1 to n2. Transistor 302 has a timing control function and supplies voltage V1 to wiring 111. It has a function to control the timing of the operation. The load of nodes n1 to n2 is the load of wiring 111. Since it is often smaller than, the channel width of transistors 301_1~301_2 is It is preferable that it be smaller than the channel width of the transistor 302. For the same reason, The channel width of transistors 303_1 to 303_2 is smaller than the channel width of transistor 304. It is preferable that transistors 301_1 to 301_2 The channel width is greater than or approximately equal to the channel width of transistor 302. This is possible. Alternatively, the channel width of transistors 303_1 to 303_2 is the transistor It is possible for the channel width to be larger than or approximately equal to that of the Ta304.

[0219] Furthermore, as shown in Figure 18(A), the wiring 117 is the same as in Embodiments 1 and 2. It is possible to divide the wiring into multiple wires, 117C to 117K. Wiring 117C, Wiring 117D, Wiring 117E, Wiring 117F, Wiring 117G, Wiring 117H, Wiring 117 Wirings I, 117J, and 117K are connected to the first terminal of transistor 303_1, respectively. First terminal of transistor 303_2, first terminal of transistor 304, circuit 310_1, First terminal of transistor 301_1, circuit 310_2, first terminal of transistor 301_2 It can be connected to the first terminal of the circuit 320 and transistor 302. Wiring 11 7C~117K are wires 111, 112, 113, 114, and 115_1. ~115_2, wiring 116, wiring 118, or wiring 211, and various other wirings, or It is possible to connect to various nodes such as n1~n2. However, it is not limited to this. Similarly, wiring 113 can also be divided into multiple wires.

[0220] As shown in Figure 18(B), the first terminal of transistor 303_1, transistor 3 The first terminal of 03_2 and the first terminal of transistor 304 are connected to wiring 118. This is possible.

[0221] Furthermore, as shown in Figure 18(C), transistor 304 can be omitted. Furthermore, not limited to this, transistor 303_1 and / or transistor 303_ The number 2 can be omitted.

[0222] Furthermore, similar to Figure 18(C), in Figures 18(A) and (B), transistor 303_ 1. Transistor 303_2 and / or transistor 304 can be omitted. be.

[0223] Note that, as shown in Figure 19(A), circuit 320 and transistor 302 are omitted. This is possible. However, it is not limited to this, and includes circuit 310_1 and transistor 301_ It is possible to omit 1, and circuit 310_1 and transistor 301_2 can be omitted. It is possible to do so.

[0224] Furthermore, similar to Figure 19(A), in Figures 18(A) to (C), circuit 310_1 and Transistor 301_1 can be omitted, and circuit 310_1 and transistor It is possible to omit sta 301_2, and circuit 320 and transistor 302 It can be omitted.

[0225] As shown in Figure 19(B), transistor 301_1 is connected to one terminal (hereinafter referred to as the positive terminal). (Also known as) is connected to node n1, and the other terminal (hereinafter also known as the negative terminal) is connected to circuit 310_ It can be replaced with diode 301a_1 connected to output terminal 1. Transistor 301_2 is connected to node n2, with one terminal (hereinafter also called the positive terminal) connected to node n2. The other terminal (hereinafter also referred to as the negative terminal) is connected to the output terminal of circuit 310_2. It is possible to replace it with transistor 301a_2. Alternatively, one of the transistors 302 can be replaced with One terminal (hereinafter also referred to as the positive terminal) is connected to the wiring 111, and the other terminal (hereinafter also referred to as the negative terminal) ) can be replaced with diode 302a connected to the output terminal of circuit 320. Alternatively, the transistor 303_1 has one terminal (hereinafter also called the positive terminal) at node n1. Diode 3 is connected to the other terminal (hereinafter also referred to as the negative terminal) and the other terminal is connected to the wiring 116. It is possible to replace 03a_1. Alternatively, transistor 303_2 can be replaced at one end. The child (hereinafter also referred to as the positive terminal) is connected to node n2, and the other terminal (hereinafter also referred to as the negative terminal) This can be replaced with diode 303a_2 connected to wiring 116. Transistor 304 is connected to wiring 111 with one terminal (hereinafter also referred to as the positive terminal) connected to the positive terminal. The other terminal (hereinafter also referred to as the negative terminal) is connected to the diode 304a which is connected to the wiring 116. It is possible to replace them. However, this is not limited to the gate of each transistor and the second By connecting to the terminals, it is possible to create a configuration in which transistors are connected in a diode configuration. It is possible. Alternatively, by connecting the gate of each transistor to the first terminal, It is possible to configure the zistas by connecting them with diodes.

[0226] Furthermore, similar to Figure 19(B), in Figures 18(A) to (C), and Figure 19(A), Transistors 301_1~301_2, Transistor 302, Transistors 303_1~3 03_2, and / or, transistor 304 can be replaced with a diode. Alternatively, these transistors can be configured in a diode-connected configuration.

[0227] Furthermore, as shown in Figure 19(C), transistors 301_1 to 301_2, and transistor The circuit for controlling the conduction state of transistor 302 is composed of transistors 301_1 to 301_2, and It can be shared by transistor 302. Circuit 330 is for nodes n1 to n2 Depending on the potential, the gates of transistors 301_1 to 301_2 and transistor 302 By controlling the potential of transistors 301_1~301_2, and transistors It has the function of controlling the conductivity state of TA302 and can function as a control circuit. In periods A1, A2, B1, and B2 shown in Figure 4(C), the output of circuit 330 is The signal is at an L level because the potential at node n1 or node n2 is higher than V1. Therefore, transistors 301_1~301_2 and transistor 302 are turned off. This is the case. During periods C1, C2, D1, D2, E1, and E2, the circuit The output signal of 330 is H because the potential at node n1 or node n2 is approximately V1. This corresponds to the level. Therefore, transistors 301_1~301_2 and transistor 302 It turns on.

[0228] Furthermore, similar to Figure 19(C), Figures 18(A)-(C) and 19(A)-(B) show odors. However, the conduction state of transistors 301_1~301_2 and transistor 302 is controlled. It is possible to share the circuit for doing so.

[0229] Furthermore, as shown in Figure 20(A), the circuit 100 is connected to transistor 10 as shown in Figure 10(C). When there are multiple transistors numbered 1_1 to 101_N, the circuit 300 is a transistor Multiple transistors, namely 301_1~301_N, and transistors 303_1~303 It has multiple transistors named _N, and multiple circuits named 310_1 to 310_N. It is possible to do so. Transistors 301_1~301_N are transistors 301_ Transistor 303_1 corresponds to transistor 301_2 and has the same function. ~303_N corresponds to transistor 303_1 or transistor 303_2, and similarly It has a function. Circuits 310_1 to 310_N are connected to either circuit 310_1 or circuit 310_2. Accordingly, it has a similar function. The first terminal of transistors 301_1 to 301_N is connected to wiring 1. It is connected to 17. The second terminals of transistors 301_1 to 301_N are connected to node n, respectively. It is connected to transistors 1 to nN. The gates of transistors 301_1 to 301_N are, respectively, connected to circuit 3. It is connected to the output terminals of transistors 10_1~310_N. The first terminal is connected to wiring 117. The second terminal of transistors 303_1 to 303_N. These are connected to nodes n1 to nN, respectively. The gates of transistors 303_1 to 303_N The wire is connected to wiring 116.

[0230] Furthermore, similar to Figure 20(A), Figures 18(A)-(C) and 19(A)-(C) show odors. However, circuit 300 consists of multiple transistors, namely transistors 301_1 to 301_N. Multiple transistors, namely transistors 303_1 to 303_N, and / or circuit 31 It is possible to have multiple circuits ranging from 0_1 to 310_N.

[0231] Furthermore, if the semiconductor device has circuit 120 as shown in Figure 8(F), then as shown in Figure 20(B)... In addition, circuit 300 may have transistors 342 and 344. Transistor 342 corresponds to transistor 302 and has a similar function. Transistor 344 corresponds to transistor 304 and has similar functionality. The first terminal of transistor 342 is connected to wire 117, and the second terminal of transistor 342 is connected to wire 2 The gate of transistor 342 is connected to the gate of transistor 302. The first terminal of transistor 344 is connected to wiring 117, and the transistor 344 The second terminal is connected to wire 211, and the gate of transistor 344 is connected to wire 116. It will be done.

[0232] Furthermore, similar to Figure 20(B), Figures 18(A)-(C), 19(A)-(C), and Figure 2 In 0(A), circuit 300 also has transistor 342 and / or transistor 3 It is possible to have 44.

[0233] As shown in Figure 21, transistors 301_1 to 301_2 and transistor 302 Transistors 303_1~303_2 and transistor 304 are P-channel type It is possible to use transistors. Transistors 301p_1~301p_2, Transistor 302p, transistors 303p_1~303p_2, and transistor 30 4p are transistors 301_1~301_2, transistor 302, and transistor It corresponds to transistors 303_1 to 303_2 and transistor 304, and is a P-channel type. Oh, if the transistor's polarity is P-channel type, voltage V1 is supplied to wiring 113, wiring Voltage V2 is supplied to 117, and the output signals of circuit 310_1 and circuit 310_2 are transmitted. The output signal of circuit 320, the potential of node n1, the potential of node n2, and signal OUT are all connected to It should be noted that the polarity of the transistor is reversed compared to the N-channel type.

[0234] Also, similar to Figure 21, see Figures 18(A)-(C), Figures 19(A)-(C), and Figure 20(A In (B) as well, a P-channel transistor can be used as the transistor. It is possible.

[0235] Next, specific examples of circuits 310_1 to 310_2 and circuit 320 will be described.

[0236] First, Figure 22(A) shows an example of circuit 310_1. Circuit 310_1 is a transistor It has a 311_1 and a 312_1 transistor. The first terminal of transistor 311_1 The child is connected to wiring 113, and the second terminal of transistor 311_1 is connected to transistor 30 The gate of transistor 311_1 is connected to wire 113. The first terminal of transistor 312_1 is connected to wiring 117, and transistor 312 The second terminal of _2 is connected to the gate of transistor 301_1, and transistor 312_ The gate of transistor 2 is connected to node n1. Transistor 311_1 and transistor 3 12_1 is assumed to be an N-channel type. However, it is not limited to this, a transistor Transistors 311_1 and / or 312_1 can be P-channel type. Yes. Transistor 311_1 has a gate potential of approximately V. When it becomes 1, it has the function of raising the gate potential of transistor 301_1, It can function as an oxide. Transistor 312_1 is at the potential of node n1. Accordingly, by controlling the conductivity state between wiring 117 and transistor 301_1, It has a function to control the timing of supplying voltage V1 to the gate of transistor 301_1. It can function as a switch.

[0237] The operation of circuit 310_1 shown in Figure 22(A) will be explained. During periods A1 and B1... Therefore, the potential of node n1 will be higher than the threshold voltage of transistor 312_1. Transistor 312_1 turns on. Therefore, the channel width of transistor 312_1 is By making it larger than the channel width of transistor 311_1, transistor 30 The gate potential of transistor 1_1 is approximately V1. For example, the gate of transistor 301_1. The potential is the potential of wiring 117 (V1) and the threshold voltage of transistor 301_1 (Vth30) The value will be smaller than the sum of (1_1). Period A2, Period B2, Period C1, Period C2, Period During periods D1, D2, E1, and E2, the potential of node n1 is approximately V1. Therefore, transistor 312_1 turns off. Thus, the gate of transistor 301_1 The potential of the terminal is the threshold voltage (Vt) of transistor 311_1, calculated from the potential of wiring 113 (V2). The value obtained by subtracting (h311_1) is (V2-Vth311_1).

[0238] Note that the channel width of transistor 312_1 is equal to the channel width of transistor 311_1. It is preferable that it is twice or more. More preferably, it is preferable that it is four times or more. Preferably, it is 8 times or more. However, it is not limited to this.

[0239] The gate and first terminal of transistor 311_1 are connected to various wires. It is possible. For example, the gate and first terminal of transistor 311_1 are connected to wiring 112 or It can be connected to wiring 118, but is not limited to this.

[0240] Furthermore, the first terminal of transistor 312_1 can be connected to various wires. For example, the first wiring of transistor 312_1 is connected to wiring 115_2. It is possible. However, it is not limited to this.

[0241] As shown in Figure 22(B), circuit 310_1 includes transistor 311_1 and In addition to transistor 312_1, it also has transistors 313_1 and 314_1. It is possible to do so. The first terminal of transistor 313_1 is connected to wiring 113, The second terminal of transistor 313_1 is connected to the gate of transistor 301_1, The gate of transistor 313_1 is connected to the second terminal of transistor 311_1 and the transistor It is connected to the second terminal of 312_1. Transistors 311_1 and 312 _1 is assumed to be an N-channel type. However, it is not limited to this, transistor 31 Transistor 1_1 and / or transistor 312_1 can be of the P-channel type. Transistor 313_1 supplies the voltage supplied to wiring 113 to transistor 301_1. It has a function to control the timing of supply, and a bootstrap transistor or switch It can function as a pin. The first terminal of transistor 314_1 is connected to wiring 117 The second terminal of transistor 314_1 is connected to the second terminal of transistor 313_1. The gate of transistor 314_1 is connected to node n1. Transistor 314_1, depending on the potential of node n1, has a connection between wiring 117 and transistor 301_1. By controlling the conduction state, voltage V1 is supplied to the gate of transistor 301_1. It has a function to control the timing and can function as a switch.

[0242] Furthermore, the first terminal of transistor 313_1 can be connected to various wires. For example, the first terminal of transistor 313_1 is connected to wire 112 or wire 118. It is possible to do so. However, it is not limited to this.

[0243] Furthermore, the first terminal of transistor 314_1 can be connected to various wires. For example, the first wiring of transistor 314_1 is connected to wiring 115_2. It is possible. However, it is not limited to this.

[0244] Furthermore, in Figure 22(B), as shown in Figure 22(C), the gate of transistor 313_1 It is possible to connect the capacitive element 315_1 between the terminal and the second terminal.

[0245] Furthermore, as shown in Figure 22(D), the circuit 300 has a transistor 316_1. This is possible. The first terminal of transistor 316_1 is connected to wiring 117, and the transistor The second terminal of transistor 316_1 is connected to the gate of transistor 301_1, and the transistor The gate of transistor 316_1 is connected to wiring 114. Transistor 316_1 is an N-channel transistor. It is assumed to be a P-type transistor. However, it is not limited to this, and transistor 316_1 is a P-type transistor. It can be a channel type. Transistor 316_1 is wired according to the signal SP. By controlling the conduction state between 117 and the gate of transistor 301_1, It has the function of controlling the timing at which voltage V1 is supplied to transistor 301_1.

[0246] In addition, similar to Figure 22(D), in Figures 22(B) to (C), the first terminal is wired 117. It is connected to the second terminal, and the gate is connected to the gate of transistor 301_1, and the gate is connected to wiring 11 It is possible to add a transistor 316_1 connected to 4.

[0247] Next, Figure 23(A) shows an example of circuit 310_2. Circuit 310_2 has transistor 3 It has transistor 11_2 and transistor 312_2. The first terminal of transistor 311_2 is , connected to wiring 113, the second terminal of transistor 311_2 is connected to transistor 301_ The gate of transistor 311_2 is connected to wire 113. The first terminal of transistor 312_2 is connected to wire 117, and transistor 312_2 The second terminal is connected to the gate of transistor 301_2, and the second terminal of transistor 312_2 The gate is connected to node n2. Transistors 311_2 and 312 _2 is assumed to be an N-channel type. However, it is not limited to this, transistor 31 1_2, and / or transistor 312_2 can be P-channel type. Transistor 311_2 has a gate potential of approximately V1 compared to transistor 301_2. In this case, it has the function of raising the gate potential of transistor 301_2, and diode It can function as a node. Transistor 312_2 responds to the potential of node n2. Then, by controlling the conduction state between wiring 117 and transistor 301_2, the voltage It has a function to control the timing of supplying V1 to the gate of transistor 301_2, It can function as a switch.

[0248] The operation of circuit 310_2 shown in Figure 23(A) will be explained. During periods A1 and B1... Therefore, the potential of node n2 will be higher than the threshold voltage of transistor 312_2, Transistor 312_2 turns on. Therefore, the channel width of transistor 312_2 is set to By making it larger than the channel width of transistor 311_2, transistor 301 The gate potential of transistor _2 is approximately V1. For example, the gate of transistor 301_2 The potential is the potential of wiring 117 (V1) and the threshold voltage of transistor 301_2 (Vth301 The value will be smaller than the sum of (2). Period A2, Period B2, Period C1, Period C2, Period D 1. During periods D2, E1, and E2, the potential of node n2 is approximately V1. Therefore, transistor 312_2 turns off. Thus, the gate of transistor 301_2 The potential of the terminal is the threshold voltage (Vth) of transistor 311_2, which is calculated from the potential of wiring 113 (V2). The value obtained by subtracting (311_2) is (V2-Vth311_2).

[0249] Note that the channel width of transistor 312_2 is equal to the channel width of transistor 311_2. It is preferable that it is twice or more. More preferably, it is preferable that it is four times or more. Preferably, it is 8 times or more. However, it is not limited to this.

[0250] The gate and first terminal of transistor 311_2 are connected to various wires. It is possible. For example, the gate and first terminal of transistor 311_2 are connected to wiring 112 or It can be connected to wiring 118, but is not limited to this.

[0251] Furthermore, the first terminal of transistor 312_2 can be connected to various wires. For example, the first terminal of transistor 312_2 is connected to wiring 115_1. It is possible. However, it is not limited to this.

[0252] Furthermore, as shown in Figure 23(B), circuit 310_2 includes transistor 311_2 and In addition to transistor 312_2, it also has transistors 313_2 and 314_2. It is possible to do so. The first terminal of transistor 313_2 is connected to wiring 113, The second terminal of transistor 313_2 is connected to the gate of transistor 301_2, The gate of transistor 313_2 is connected to the second terminal of transistor 311_2 and the transistor It is connected to the second terminal of 312_2. Transistors 311_2 and 312 _2 is assumed to be an N-channel type. However, it is not limited to this, transistor 31 Transistors 1_2 and / or 312_2 can be P-channel type. Transistor 313_2 supplies the voltage supplied to wiring 113 to transistor 301_2. It has a function to control the timing of supply, and a bootstrap transistor or switch It can function as a transistor. Transistor 314_2 responds to the potential of node n2. Then, by controlling the conduction state between wiring 117 and transistor 301_2, the voltage It has a function to control the timing of supplying V1 to the gate of transistor 301_2, It can function as a switch.

[0253] Furthermore, the first terminal of transistor 313_2 can be connected to various wires. For example, the first terminal of transistor 313_2 is connected to wire 112 or wire 118. It is possible to do so. However, it is not limited to this.

[0254] Furthermore, the first terminal of transistor 314_2 can be connected to various wires. For example, the first wiring of transistor 314_2 is connected to wiring 115_1. It is possible. However, it is not limited to this.

[0255] Furthermore, as shown in Figure 23(C), between the gate and the second terminal of transistor 313_2 It is possible to connect the capacitive element 315_2.

[0256] Furthermore, as shown in Figure 23(D), the circuit 300 has a transistor 316_2. This is possible. The first terminal of transistor 316_2 is connected to wiring 117, and the transistor The second terminal of transistor 316_2 is connected to the gate of transistor 301_2, and the transistor The gate of transistor 316_2 is connected to wiring 114. Transistor 316_2 is an N-channel transistor. It is assumed to be a P-type transistor. However, it is not limited to this, and transistor 316_2 is a P-type transistor. It can be a channel type. Transistor 316_2 is wired according to the signal SP. By controlling the conduction state between 117 and the gate of transistor 301_2, It has the function of controlling the timing at which voltage V1 is supplied to transistor 301_2.

[0257] In addition, similar to Figure 23(D), in Figures 23(B) to (C), the first terminal is wired 117. It is connected to the second terminal, and the gate is connected to the gate of transistor 301_2, and the gate is connected to wiring 11 It is possible to add a transistor 316_2 connected to 4.

[0258] Next, Figure 24(A) shows an example of circuit 320. Circuit 320 includes transistor 321, and It has transistor 322. The first terminal of transistor 321 is connected to wiring 113. The second terminal of transistor 321 is connected to the gate of transistor 302, The gate of transistor 321 is connected to wiring 113. The first terminal of transistor 322 is Connected to wiring 117, the second terminal of transistor 322 is connected to the gate of transistor 302. The gate of transistor 322 is connected to wiring 111. Transistor 3 21 and transistor 322 are assumed to be N-channel type. However, they are not limited to this. Transistor 321 and / or transistor 322 are P-channel type. This is possible. Transistor 321 is such that the gate potential of transistor 302 is approximately When the voltage becomes V1, it has the function of raising the gate potential of transistor 302, It can function as an oscillator. Transistor 322 responds to the potential of wiring 111. Then, by controlling the conductivity state between wiring 117 and transistor 302, the voltage V1 It has a function to control the timing of supplying to the gate of transistor 302, and a switch and It is possible for it to function in this way.

[0259] The operation of circuit 320 shown in Figure 24(A) will be explained. Period B1 and During period B2, the potential of wiring 111 becomes higher than the threshold voltage of transistor 322. Therefore, transistor 322 turns on. Thus, the channel width of transistor 322 is By making it larger than the channel width of transistor 321, transistor 302 The gate potential is approximately V1. For example, the gate potential of transistor 302 is distributed The sum of the potential of line 117 (V1) and the threshold voltage of transistor 302 (Vth302) is greater than The value will be small. Period A1, Period A2, Period C1, Period C2, Period D1, Period D2, Period During periods E1 and E2, the potential of wiring 111 is approximately V1, so the transient Transistor 322 turns off. Therefore, the gate potential of transistor 302 is the voltage of wiring 113. The value obtained by subtracting the threshold voltage of transistor 321 (Vth321) from the position (V2) is (V2-Vt321). It will become h321).

[0260] Furthermore, the channel width of transistor 322 is more than twice the channel width of transistor 321. Preferably, it is 4 times or more. Even more preferably It is preferable that the ratio is 8 times or more. However, it is not limited to this.

[0261] Furthermore, the gate and first terminal of transistor 321 can be connected to various wires. For example, the gate and first terminal of transistor 321 are connected to wiring 112 or wiring 11 It can be connected to 8, but is not limited to this.

[0262] Furthermore, the first terminal of transistor 322 can be connected to various wires. Example For example, the first wiring of transistor 322 can be connected to wiring 112. However, this is not the only option.

[0263] Furthermore, as shown in Figure 24(B), the circuit 320 includes transistor 321 and transistor In addition to transistor 322, it is possible to have transistors 323 and 324. The first terminal of transistor 323 is connected to wiring 113, and the second terminal of transistor 323 is connected to wiring 113. The terminal is connected to the gate of transistor 302, and the gate of transistor 323 is connected to the terminal. It is connected to the second terminal of transistor 321 and the second terminal of transistor 322. The first terminal of transistor 324 is connected to the second terminal of transistor 323, and transistor 324 The second terminal is connected to wiring 117, and the gate of transistor 324 is connected to wiring 111. It continues. Transistors 323 and 324 are N-channel type. However, this is not limited to transistor 323 and / or transistor 324. It can be a P-channel type. Transistor 323 is supplied to wiring 113. It has a function to control the timing of supplying the voltage to transistor 302, and the bootst It can function as a wrap transistor or a switch. Transistor 3 24 is the conduction between wiring 117 and the gate of transistor 302, depending on the potential of wiring 111. By controlling the state, the timing of supplying voltage V1 to the gate of transistor 302 is controlled. It has the function of controlling the 'sing' and can function as a switch.

[0264] Furthermore, the first terminal of transistor 323 can be connected to various wires. Example For example, the first wiring of transistor 323 is connected to wiring 112 and wiring 118. It is possible. However, it is not limited to this.

[0265] Furthermore, the first terminal of transistor 324 can be connected to various wires. Example For example, the first terminal of transistor 324 can be connected to wiring 118.

[0266] Furthermore, as shown in Figure 24(C), in addition to the configuration shown in Figure 24(B), transistor 323 A capacitive element 325 can be connected between the gate and the second terminal.

[0267] As shown in Figure 24(D), the circuit 320 may have a transistor 326. It is possible. The first terminal of transistor 326 is connected to wiring 117, and transistor 32 The second terminal of 6 is connected to the gate of transistor 302 and the gate of transistor 326. This is connected to wiring 114. Transistor 326 is assumed to be an N-channel type. However, it is not limited to this, and transistor 326 can also be a P-channel type. Transistor 326 controls the signal SP, and the gate of wiring 117 and transistor 302. By controlling the conduction state between the transistor and the terminal, voltage V1 is supplied to transistor 302. It has a function to control the timing.

[0268] In addition, similar to Figure 24(D), in Figures 24(B) to (C), the first terminal is wired 117. The second terminal is connected to the gate of transistor 302, and the gate is connected to wiring 114. It is possible to add a new transistor 326 to be connected.

[0269] Next, Figure 25(A) shows an example of circuit 330. Circuit 330 is a transistor 331 It has transistors 332 and 333. The first terminal of transistor 331 is The wiring 113 is connected, and the second terminal of transistor 331 is connected to transistor 301_1. The gate is connected to the gate of transistor 301_2 and the gate of transistor 302. The gate of transistor 331 is connected to wiring 113. The first gate of transistor 332 The terminal is connected to wiring 117, and the second terminal of transistor 332 is connected to transistor 331 The second terminal of transistor 332 is connected to node n1, and the gate of transistor 332 is connected to node n1. The first terminal of transistor 333 is connected to wiring 117, and the second terminal of transistor 333 is The second terminal of transistor 331 is connected, and the gate of transistor 333 is at node n. It is connected to 2. Transistors 331, 332, and 333 are It is assumed to be an N-channel type. However, it is not limited to this, transistor 331, The transistor 332 and transistor 333 can be P-channel type.

[0270] The operation of the circuit 330 shown in Figure 25(A) will be explained. Period A1 and period shown in Figure 4(C) During interval A2, period B1, and period B2, the potential of node n1 or the potential of node n2 is, Since it becomes a value higher than the threshold voltage of transistor 332 or transistor 333, Transistor 332 or transistor 333 turns on. At this time, transistor 332 or Make the channel width of transistor 333 larger than the channel width of transistor 331. This causes the gate of transistor 301_1, the gate of transistor 301_2, and The gate potential of the transistor 302 is approximately V1. Periods C1, C2, and D1. During periods D2, E1, and E2, the potentials of node n1 and node n2 Since this is roughly V1, transistors 332 and 333 are turned off. Therefore, the gate of transistor 301_1, the gate of transistor 301_2, and The gate potential of transistor 302 is obtained from the potential of wiring 113 (V2) to transistor 331 The value (V2 - Vth331 + Vx) is greater than the value obtained by subtracting the threshold voltage (Vth331). In this case, Vx is a value greater than 0.

[0271] Note that the channel width of transistor 332 or the channel width of transistor 333 is... It is preferable that the channel width is at least twice the channel width of the radiator 331. More preferably, it is at least four times the channel width. It is preferable that it is above. More preferably, it is preferable that it is 8 times or more. However, This is not limited to this.

[0272] Furthermore, the gate and first terminal of transistor 331 can be connected to various wires. For example, the gate and first terminal of transistor 331 are connected to wiring 112 or wiring 11 It can be connected to 8, but is not limited to this.

[0273] Furthermore, the gates of transistor 332 and transistor 333 are connected by various wirings. It is possible to connect them. For example, the gate of transistor 332 is connected to wire 114. Therefore, the gate of transistor 333 can be connected to wiring 111. However, This is not limited to this.

[0274] Note that the first terminal of transistor 332 and the first terminal of transistor 333 are connected to separate terminals. It is possible to connect it to a wire. For example, the first terminal of transistor 332 is connected to wire 11 The first terminal of transistor 333 is connected to wire 115_1, and is connected to 5_2. This is possible, but not limited to this.

[0275] As shown in Figure 25(B), circuit 330 consists of transistor 331 and transistor 3 In addition to transistors 32 and 333, transistors 334, 335, and It is possible to have transistor 336. The first terminal of transistor 334 is wired Connected to 113, the second terminal of transistor 334 is connected to the gate of transistor 301_1. It is connected to the gate of transistor 301_2 and the gate of transistor 302, The gate of transistor 334 is connected to the second terminal of transistor 331. The first terminal of 335 is connected to wiring 117, and the second terminal of transistor 335 is connected to the The second terminal of transistor 334 is connected, and the gate of transistor 335 is connected to node n1. The first terminal of transistor 336 is connected to wiring 117, and transistor 336 The second terminal of is connected to the second terminal of transistor 334, and the gate of transistor 336 It is connected to node n2. Transistors 334, 335, and The STA336 is assumed to be an N-channel type. However, it is not limited to this, and the transistor Transistors 334, 335, and 336 are P-channel type. It is possible.

[0276] Furthermore, it is possible to connect a capacitive element between the gate and the second terminal of transistor 334. That is the case.

[0277] Furthermore, the first terminal of transistor 334 can be connected to various wires. Example For example, the first terminal of transistor 334 is connected to wiring 112 or wiring 118. It is possible. However, it is not limited to this.

[0278] Furthermore, the gates of transistor 335 and transistor 336 are connected by various wirings. It is possible to connect them. For example, the gate of transistor 335 is connected to wiring 114. The gate of transistor 336 can be connected to wiring 111. And it's not limited to this.

[0279] Note that the first terminal of transistor 335 and the first terminal of transistor 336 are connected to separate terminals. It is possible to connect it to a wire. For example, the first terminal of transistor 335 is connected to wire 11 The first terminal of transistor 336 is connected to wire 115_1, and is connected to 5_2. This is possible, but not limited to this.

[0280] Here is an example of a semiconductor device that appropriately combines the contents described in Embodiments 1 to 3. As shown in 41. However, it is not limited to this, and other examples are described in Embodiments 1 to 3. By combining components, it is possible to create semiconductor devices in various configurations.

[0281] The semiconductor device in Figure 41 has circuit 100 and circuit 10, and circuit 10 is connected to circuit 200 and It has circuit 300, and circuit 300 has circuit 330. In the semiconductor device of Figure 41, circuit For circuit 100, the configuration shown in Figure 4(A) is used, and for circuit 200, the configuration shown in Figure 11(E) is used. The configuration shown in Figure 19(C) is used as circuit 300, and circuit 330 The configuration shown in Figure 25(B) is used.

[0282] Furthermore, the operation of the semiconductor device shown in Figure 41 was verified. The verification results are shown in Figure 42. Figure 42 shows the verification results of the semiconductor device of this embodiment. The verification was performed using SPIC. The E simulator was used. Additionally, as a comparative example, the transient of the semiconductor device shown in Figure 41... Transistor 101_2, Transistor 201_2, Transistor 203_1, Transistor 20 3_2, transistor 301_2, transistor 303_2, transistor 333, and We also performed operational verification on semiconductor devices with a circuit configuration that does not include transistor 336. The verification was performed with Vdd=30V, Vss=0V, and clock frequency=25kHz (1 period=20 (μsec), mobility of each transistor = 1cm 2 / VS, threshold voltage of each transistor = 5 The test was performed with V and output capacitance = 50pF.

[0283] Figure 42(A) is a timing chart showing the verification results for the comparative semiconductor device. As shown in 42(A), in the comparative example semiconductor device, both period T1 and period T2 are at node n Transistor 101_1 turns on according to the potential of 1, and wires 112 and 111 are connected. The transistor 101_1 becomes conductive, and the signal CK1 is transmitted from wiring 112 through the transistor. It is supplied to wiring 111 via sta 101_1.

[0284] Figure 42(B) is a timing chart showing the verification results for the semiconductor device shown in Figure 41. As shown in Figure 42(B), in the semiconductor device shown in Figure 41, during period T1, node n1 Transistor 101_1 turns on according to the potential, and wiring 112 and wiring 111 are connected. Conduction occurs via transistor 101_1, and signal CK1 is transmitted from wiring 112 through the transistor. It is supplied to wiring 111 via terminal 101_1, and during period T2, according to the potential of node n2 When transistor 101_1 is turned on, wire 112 and wire 111 are connected to transistor 10 Conduction occurs via 1_1, and signal CK1 is transmitted from wiring 112 to transistor 101_1. It is supplied to wiring 111 via this. Thus, as shown in Figure 42, the semiconductor device of this embodiment So, by turning on different transistors in each period, each transistor will It can be seen that the number of times the device is turned on and the duration of time it is turned on can be reduced.

[0285] (Embodiment 4) This embodiment describes an example of a shift register. The shift register of this embodiment The stator can have semiconductor devices according to Embodiments 1 to 3. The foot register can represent a semiconductor device or a gate driver. The contents described in Embodiments 1 to 3 will not be explained further. The contents described in Embodiment 3 can be appropriately combined with the contents described in this embodiment. .

[0286] First, an example of a shift register will be explained with reference to Figure 26. Shift register 50 0 has multiple flip-flops, namely flip-flops 501_1 to 501_N. .

[0287] Note that the flip-flops 501_1 to 501_N correspond to Embodiments 1 to 3, respectively. This corresponds to the semiconductor device described below. An example in Figure 26 is the flip-flops 501_1~50 Let 1_N be used for each case where the semiconductor device shown in Figure 4(A) is used. However, This is not limited to this; other flip-flops such as 501_1 to 501_N can also be, for example, real It is possible to use semiconductor devices or circuits described in Embodiments 1 to 3.

[0288] Next, we will explain the connection of the shift register. Shift register 500 is connected to wiring 51 1_1~511_N, Wiring 512, Wiring 513, Wiring 514, Wiring 515_1~515_ 2. It is connected to wiring 516, wiring 517, and wiring 518. And then, a flip-flop In 501_i (where i is one of 2 to N), wiring 111, wiring 112, wiring 113 Wiring 114, wiring 115_1, wiring 115_2, wiring 116, and wiring 117 are, respectively , wiring 511_i, wiring 512, wiring 514, wiring 511_i-1, wiring 515_1, wiring It is connected to wire 515_2, wiring 511_i+1, and wiring 516. Note that the odd-numbered flips The destination of wire 112 often differs between a flop and an even-numbered flip-flop. For example, in the i-th stage flip-flop, if wire 112 is connected to wire 512 In addition, in the i+1 stage flip-flop or the i-1 stage flip-flop, Line 112 is connected to wiring 513.

[0289] In the case of flip-flop 501_1, wiring 114 is connected to wiring 517. There are many matches. And in flip-flop 501_N, wiring 116 is connected to wiring 518. In most cases, a connection is made. However, this is not the only option.

[0290] Next, we will describe an example of a signal or voltage that is input to or output to each wire. Wiring 511_ From 1 to 511_N, for example, signals GOUT_1 to GOUT_N are output respectively. It shall be assumed that signals GOUT_1 to GOUT_N are, respectively, flip-flop 501_1 This is the output signal of ~501_N. And signals GOUT_1~GOUT_N are signals OU Corresponding to T, output signal, selection signal, transfer signal, start signal, reset signal, gate signal It can function as a scanning signal. Signal GCK1 is input to wiring 512. It shall be assumed that this is the case. Signal GCK1 corresponds to signal CK1 and functions as a clock signal. This is possible. For example, the signal GCK2 is input to wiring 513. The signal GCK2 corresponds to the signal CK2 and can function as an inverting clock signal. Yes. As an example, voltage V2 is supplied to wiring 514. Wiring 515_1 For example, the signals SEL1 and SEL2 are input to ~515_2. As an example, voltage V1 is supplied to wiring 516. As an example, let's assume that signal GSP is input. Signal GSP corresponds to signal SP, and It can function as a sync signal or a vertical synchronization signal. Wiring 518 shows, for example, Then, the signal GRE is input. The signal GRE corresponds to the signal RE, which is a reset signal. It can function as a signal. However, it is not limited to this; these wires can also function as signals. It is also possible to input various other signals, voltages, or currents.

[0291] Note that wiring 511_1 to 511_N functions as a signal line, gate signal line, or scan line. It is possible to do so. Wiring 512 and wiring 513 can be used as signal lines or clock signal lines. It is possible for it to function. Wiring 514 can function as a power line. Wires 515_1 to 515_2 can function as signal lines. Wire 516 is It can function as a power line or a ground line. Wiring 517 is a signal line. It is possible for it to function. Wiring 518 can function as a signal line. However, this is not the only way; these wires can also function as various other types of wiring. This is possible.

[0292] Note that wiring 512, wiring 513, wiring 514, wiring 515_1~515_2, and wiring 516 Wiring 517 and wiring 518 receive signals or voltages from circuit 520. Circuit 520 supplies a signal or voltage to the shift register, thereby enabling the shift It has the function of controlling a resistor and functions as a control circuit or controller. This is possible.

[0293] For example, circuit 520 may include circuits 521 and 522. Circuit 521 generates power supply voltages such as positive power supply voltage, negative power supply voltage, ground voltage, and reference voltage. It has the function of being able to function as a power supply circuit or a regulator. Circuit 52 2 is the clock signal, inverted clock signal, start signal, reset signal, and / or, It has the function of generating various signals, such as audio signals, and functions as a timing generator. It is possible to do so. However, it is not limited to this, and circuit 520 can be used with circuit 521 and circuit 5 In addition to 22, it is possible to have various other circuits or elements. For example, circuit 52 0 is an oscillator, level shifter circuit, inverter circuit, buffer circuit, DA conversion circuit, AD conversion circuit, operational amplifier, shift register, lookup table, coil, transistor It may include elements such as capacitors, capacitive elements, resistive elements, and / or frequency dividers.

[0294] Next, the operation of the shift register in Figure 26 will be explained with reference to Figure 27. Figure 27 is This is an example of a timing chart used to explain the operation of a shift register. Figure 27 shows: Signal GSP, Signal GRE, Signal GCK1, Signal GCK2, Signal SEL1, Signal SEL2, Signal GOUT_1, Signal GOUT_i-1, Signal GOUT_i, Signal GOUT_i+1, And an example of the signal GOUT_N is shown. Note that the semiconductor devices of Embodiments 1 to 3 We will omit explanations for aspects that are common to the actions.

[0295] This explains the operation of the flip-flop 501_i in the k (where k is a natural number)th frame. First, the signal GOUT_i-1 becomes high. Then, flip-flop 501_ i starts operation in period A1, and signal GOUT_i becomes low. After that, The signals GCK1 and GCK2 are inverted. Then, flip-flop 501_ i starts operation during period B1, and signal GOUT_i becomes high. Signal GOUT _i is input to the flip-flop 501_i-1 as a reset signal, and flip The signal is input to flop 501_i+1 as a start signal. Therefore, flip-flop 5 01_i-1 starts operation in period C1, and flip-flop 501_i+1, The operation in period A1 begins. After that, signals GCK1 and GCK2 are reversed again. Then, flip-flop 501_i+1 starts operating during period B1, and the signal GOUT_i+1 becomes high level. The signal GOUT_i+1 is flip-flop 501 It is input to _i as a reset signal. Therefore, flip-flop 501_i is in a period of As operation at C1 begins, the signal GOUT_i becomes low. After that, the signal Until signal GOUT_i-1 reaches a high level, flip-flop 501_i controls the GC signal. Each time K1 and signal GCK2 are inverted, the operation in period D1 and the operation in period E1 Repeat the process.

[0296] Let's explain the operation of flip-flop 501_i in the k+1th frame. First, The signal GOUT_i-1 becomes high. Then, the flip-flop 501_i becomes high for a period of time. Operation at A2 begins, and the signal GOUT_i becomes low. Subsequently, the signal GCK1 , and the signal GCK2 is inverted. Then, flip-flop 501_i in period B2 The operation begins, and the signal GOUT_i becomes high. The signal GOUT_i is flipped The reset signal is input to the flip-flop 501_i-1, and the flip-flop 501_i It is input as a start signal to +1. Therefore, flip-flop 501_i-1 is The operation in period C2 begins, and the flip-flop 501_i+1 operates in period A2. The process begins. After that, signals GCK1 and GCK2 are inverted again. Then, the flow The flop 501_i+1 starts operating during period B1, and the signal GOUT_i+1 The signal becomes H level. The signal GOUT_i+1 is a reset signal to flip-flop 501_i. It is input as follows. Therefore, the flip-flop 501_i operates during period C2. As it starts, signal GOUT_i becomes low. Then, signal GOUT_i-1 again. Until it reaches the H level, the flip-flop 501_i controls the signals GCK1 and GCK Each time 2 is reversed, the actions in period D2 and period E2 are repeated.

[0297] Note that flip-flop 501_1 replaces the output signal of the previous flip-flop. The signal GSP is input from circuit 520 via wiring 517. Therefore, the signal GSP is When it reaches the H level, flip-flop 501_1 performs the operation in period A1 or A2. Start.

[0298] Note that in flip-flop 501_N, instead of the output signal of the next stage flip-flop... The signal GRE is input from circuit 520 via wiring 518. Therefore, the signal GRE is When it reaches the H level, the flip-flop 501_N operates during period C1 or C2. Start.

[0299] As described above, the shift register of this embodiment is a semiconductor of Embodiments 1 to 3. By using this device, it is possible to obtain the same advantages as those of the semiconductor device in question.

[0300] Furthermore, it is possible to make the relationship between signals GCK1 and GCK2 unbalanced. For example, As shown in the timing chart in Figure 28(A), when signals GCK1 and GCK2 are Therefore, it is possible to make the period of time spent at H level shorter than the period of time spent at L level. As a result, even if delays or distortions occur in signals GOUT_1 to GOUT_N, This prevents periods during which these signals are at a high level. Therefore, this embodiment When the shift register is used in a display device, it prevents multiple rows from being selected simultaneously. This is possible, however, not limited to this, and also applies to signals GCK1 and / or GCK2. In this scenario, the period of being at level H can be longer than the period of being at level L.

[0301] Furthermore, it is possible to input a multiphase clock signal to the shift register. For example, see Figure 2. As shown in the timing chart 8(B), the M phase clock signal (where M is a natural number greater than or equal to 3) It is possible to use a number. In this case, in signals GOUT_1 to GOUT_N, The period during which the signal reaches level H in a given stage overlaps with the periods during which the signal reaches level H in the preceding and following stages. This makes it possible. Therefore, when this embodiment is used in a display device, multiple rows can be displayed. They will be selected simultaneously. This will precharge the video signal to the pixels of the other rows. It can then be used as a voltage.

[0302] In Figure 28(B), it is preferable that M ≤ 8. More preferably, M ≤ 6. It is preferable that there be a condition. More preferably, it is preferable that M ≤ 4. This is because Shift When a tracer is used in the scan line driving circuit of a display device, if M is too large, multiple pixels will be affected. This is because several types of video signals are written to the pixel. This is because the period during which data is entered becomes longer, which may lead to a decrease in display quality.

[0303] Furthermore, similar to Figure 28(B), the timing chart in Figure 28(A) also shows multiphase It is possible to use a lock signal.

[0304] Note that wiring 518 and other wiring (for example, wiring 512, wiring 513, wiring 515_1, wiring 515_2, wiring 516, or wiring 517) are connected by a single common wiring, and wiring 518 This can be omitted. In this case, in flip-flop 501_N, wiring 116 Wiring 512, Wiring 513, Wiring 515_1, Wiring 515_2, Wiring 516, or Wiring 5 It is preferable to connect to 17. Alternatively, wiring 518 may be omitted depending on the configuration. It is possible. In this case, in flip-flop 501_N, transistor 303_1~ It is also possible to omit transistors 303_2 and 304.

[0305] Furthermore, as shown in Figure 29, it is possible to split the output signal. In one example shown in Figure 29, The semiconductor devices shown in Figure 10(E) are used as flip-flops 501_1 to 501_N, respectively. It can be there. And in the flip-flop 501_i (where i is one of 2 to N), Wiring 111, Wiring 112, Wiring 113, Wiring 114, Wiring 115_1, Wiring 115_2, Wiring 116 and wiring 117 are, respectively, wiring 511_i, wiring 512, wiring 514, and wiring 518_i-1, wiring 515_1, wiring 515_2, wiring 511_i+1, wiring 516 and This connects the pixels or gate signals to the wiring 511_1~511_N. Even when loads such as power lines are connected, the transfer to drive the next stage flip-flops No signal distortion or delay occurs. Therefore, the effect of shift register delay is eliminated. It can be reduced. However, it is not limited to this, and wiring 114 is wiring 511_i-1 It is possible to connect to this. Alternatively, wiring 116 can be connected to wiring 517_i+1. It is possible.

[0306] (Embodiment 5) This embodiment describes an example of a display device.

[0307] First, with reference to Figure 30(A), an example of a liquid crystal display system block will be described. The liquid crystal display device consists of circuits 5361, 5362, 5363_1, and 5363_ 2. It has a pixel section 5364 having pixels, a circuit 5365, and an illumination device 5366. In section 5364, multiple wires 5371 are arranged extending from circuit 5362, and multiple wires Circuit 5372 is arranged as an extension from circuits 5363_1 and 5363_2. And in the intersection regions of multiple wires 5371 and multiple wires 5372, there are liquid crystal elements and the like. Pixels 5367, each having a display element, are arranged in a matrix.

[0308] Circuit 5361, in response to the video signal 5360, circuits 5362, 5363_1, and circuit 5363_2 and circuit 5365 have the function of supplying signals, voltage, or current, Controllers, control circuits, timing generators, power supply circuits, or regulators, etc. It is possible to function in this way. In this embodiment, as an example, circuit 5361 is a circuit 5362 contains the start signal (SSP) for the signal line drive circuit and the clock signal for the signal line drive circuit. (SCK), inverting clock signal for signal line drive circuit (SCKB), data for video signal (D ATA) and a latch signal (LAT) shall be supplied. Alternatively, circuit 5361 is an example. Then, the start signal (G) for the scan line drive circuit is sent to circuits 5363_1 and 5363_2. SP), clock signal for scan line drive circuit (GCK), and clock for inverted scan line drive circuit The signal (GCKB) shall be supplied. Alternatively, circuit 5361 shall supply the battery to circuit 5365. The circuit shall supply a Krite control signal (BLC). However, it shall not be limited to this, circuit 5 361 also handles various signals, various voltages, or various currents, etc., in circuit 5362, circuit It is possible to supply power to circuits 5363_1, 5363_2, and 5365.

[0309] Circuit 5362 receives signals supplied from circuit 5361 (e.g., SSP, SCK, SCKB). It has the function of outputting video signals to multiple wires 5371 according to DATA and LAT. It can function as a signal line driving circuit. Circuit 5363_1 and Circuit 536 3_2 operates according to the signals (GSP, GCK, GCKB) supplied from circuit 5361. It has the function of outputting scan signals to multiple wires 5372 and functions as a scan line drive circuit. This is possible. Circuit 5365 responds to the signal (BLC) supplied from circuit 5361. By controlling the amount of power or the time supplied to the lighting device 5366, the lighting device It has the function of controlling the brightness (or average brightness) of 5366 and can function as a power supply circuit. It is possible.

[0310] Furthermore, if video signals are input to multiple wires 5371, the multiple wires 5371 will receive the signal. It can function as a wire, video signal line, or source signal line, etc. Multiple wiring When a scan signal is input to 5372, multiple wires 5372 are signal lines, scan lines, or gates. It can function as a signal line, etc., but is not limited to this.

[0311] Note that the same signal is applied to both circuit 5363_1 and circuit 5363_2, respectively, to circuit 5361 When input is received from, the circuit 5363_1 outputs a scan signal to multiple wires 5372, and The scanning signals that path 5363_2 outputs to multiple wirings 5372 are approximately equal in timing. In many cases, this occurs. Therefore, circuits 5363_1 and 5363_2 are driven. The load can be reduced. Therefore, the display device can be made larger. Or, The display device can be made high-resolution. Alternatively, circuits 5363_1 and 5363_2 Since the channel width of the transistors can be reduced, it is possible to create display devices with narrow bezels. It can be obtained. However, it is not limited to this, and circuit 5361 can be used with circuit 5363_1. It is possible to supply separate signals to path 5363_2.

[0312] Note that it is possible to omit either circuit 5363_1 or circuit 5363_2. ru.

[0313] Furthermore, new wiring such as capacitance lines, power lines, and scanning lines can be added to the pixel section 5364. It is possible. And circuit 5361 outputs signals or voltages to these wires. This is possible. Alternatively, a new circuit similar to circuit 5363_1 or circuit 5363_2 can be added. This newly added circuit can transmit signals such as scan signals to the newly added wiring. It is possible to output this.

[0314] Furthermore, pixel 5367 can have a light-emitting element such as an EL element as a display element. In this case, as shown in Figure 30(B), the display element can emit light, so circuit 5 365 and the lighting device 5366 can be omitted. And power to the display element To supply power, multiple wires 5373 capable of functioning as power lines are provided in the pixel section 53 It can be arranged in 64. Circuit 5361 controls the power supply voltage (also called voltage ANO). It is possible to supply power to wiring 5373. This wiring 5373 is connected according to the color element of the pixel. It is possible to do so, and it is possible to connect it to all pixels in common.

[0315] Note that in Figure 30(B), as an example, circuit 5361 is connected to circuit 5363_1 and circuit 536 An example of supplying separate signals to 3_2 is shown. Circuit 5361 is for the scan line drive circuit. Start signal (GSP1), clock signal for scan line drive circuit (GCK1), and inverted scan The clock signal (GCKB1) for the line drive circuit and other signals are supplied to circuit 5363_1. Circuit 5361 then provides a start signal (GSP2) for the scan line drive circuit, and for the scan line drive circuit Clock signal (GCK2), and clock signal for inverted scan line drive circuit (GCKB2), etc. The signal is supplied to circuit 5363_2. In this case, circuit 5363_1 has multiple wires 53 Scanning only the odd-numbered rows of wiring 72, circuit 5363_2 is a multiple wiring 5372 This makes it possible to scan only the wiring in even-numbered rows. Therefore, circuit 5363_1, and Since the driving frequency of track 5363_2 can be reduced, power consumption can be reduced. Alternatively, increasing the area available for laying out one stage of flip-flops would be a good approach. Yes, it is possible. Therefore, the display device can be made high-resolution. Alternatively, the display device can be made larger. This is possible. However, it is not limited to this, and, similar to Figure 30(A), circuit 5361 is a circuit It is possible to output the same signal to both circuit 5363_1 and circuit 5363_2.

[0316] Note that, similar to Figure 30(B), in Figure 30(A), circuit 5361 is also circuit 5363 It is possible to supply separate signals to _1 and circuit 5363_2.

[0317] The above is a description of an example of a system block for a display device.

[0318] Next, an example of the configuration of the display device is shown in Figures 31(A), (B), (C), (D), and ( See E) for further explanation.

[0319] Figure 31(A) shows a circuit that has the function of outputting a signal to the pixel unit 5364 (for example, circuit 5 Circuits 362, 5363_1, and 5363_2, etc., are on the same substrate as the pixel unit 5364. It is formed at 5380. The circuit 5361 is formed on a separate substrate from the pixel section 5364. This reduces the number of external parts, thus lowering costs. Alternatively, Since the number of signals or voltages input to board 5380 decreases, the connection between board 5380 and external components The number of successors can be reduced. Therefore, reliability can be improved, or yield can be improved. Cut.

[0320] Furthermore, if the circuit is formed on a substrate separate from the pixel section 5364, the substrate is TAB(Ta FPC (Flexible Printed Circuit) is a method of Automated Bonding. It can be mounted on a Printed Circuit. Alternatively, the board can be used as follows: The COG (Chip on Glass) method uses the same substrate 5380 as the pixel unit 5364. It is possible to implement this.

[0321] Furthermore, if the circuit is formed on a substrate separate from the pixel section 5364, the substrate may contain a single-crystal semiconductor. It is possible to form a transistor using the substrate. Therefore, the substrate is formed The circuit allows the drive frequency to be set over a wide range. For example, by increasing the drive frequency... This allows us to increase the number of pixels placed in the pixel section 5364 (increasing the resolution). (This is possible). By reducing the drive voltage, power consumption can be reduced. The circuit formed on the substrate can increase the driving voltage, so it can be used as a display element. This allows the use of display elements with a high drive voltage. Furthermore, the circuit formed on the substrate is This can reduce variations in the output signal.

[0322] Furthermore, signals, voltages, or currents are input from external circuits via input terminal 5381. In many cases, this is the case.

[0323] In Figure 31(B), the driving frequencies of circuits 5363_1 and 5363_2 are as follows: 1 is often lower than the drive frequency of circuit 5362, and the transistor formed in the pixel area Transistors formed in the same process as the transistors are used in circuits 5363_1 and 5363_2. Since it is possible, circuits 5363_1 and 5363_2 are connected to the pixel section 5364. They are formed on the same substrate 5380. And circuits 5361 and 5362 are in the pixel section 5 It is formed on a different substrate than 364. In this way, the substrate is formed by transistors with low mobility. It becomes possible to construct the circuit formed on board 5380. Therefore, the semiconductor of the transistor The body layer can be an amorphous semiconductor, a microcrystalline semiconductor, an organic semiconductor, or an oxide semiconductor. This makes it possible to increase the size of the display device, reduce the number of processes, reduce costs, or This can lead to improvements in yield, among other things.

[0324] Furthermore, as shown in Figure 31(C), a part of circuit 5362 (circuit 5362a) is the pixel section 53 Formed on the same substrate 5380 as 64, the remaining part of circuit 5362 (circuit 5362b) is drawn It is possible to form it on a substrate separate from the element 5364. Circuit 5362a has mobility Circuits that can be constructed using low-transistor components (e.g., shift registers, selectors) It often has switches, etc. And circuit 5362b has high mobility and It is preferable to construct a circuit using transistors with small characteristic variations (for example, (Includes a fast register, latch circuit, buffer circuit, DA conversion circuit, AD conversion circuit, etc.) In many cases, this is achieved by doing so, similar to Figure 31(B), with respect to the semiconductor layer of the transistor. For example, amorphous semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors are used. This makes it possible to further reduce the number of external parts.

[0325] Figure 31(D) shows a circuit that has the function of outputting a signal to the pixel unit 5364 (for example, circuit 5 Circuits 362, 5363_1, and 5363_2, etc., and the control of these circuits The functional circuit (for example, circuit 5361) is formed on a separate substrate from the pixel section 5364. This makes it possible to form the pixel section and its peripheral circuits on separate substrates. This can lead to an improvement in yield.

[0326] Furthermore, similar to Figure 31(D), in Figures 31(A) to (C), circuit 5363_1, and The circuit 5363_2 can be formed on a separate substrate from the pixel section 5364.

[0327] In Figure 31(E), a portion of circuit 5361 (circuit 5361a) is on the same substrate as the pixel unit 5364. 5380 is formed, and the remaining circuit 5361 (circuit 5361b) is separate from the pixel section 5364. It is formed on the substrate. Circuit 5361a is composed of transistors with low mobility. Often, it has a circuit that allows for this (e.g., a switch, selector, level shifter, etc.). Furthermore, circuit 5361b is constructed using transistors with high mobility and low variability. A circuit that is preferable to have (for example, a shift register, timing generator, oscillator) They often have a data regulator, regulator, or analog buffer.

[0328] In addition, in Figures 31(A) to (D), the circuit 5361a is on the same substrate as the pixel unit 5364. It is possible to form the circuit 5361b on a separate substrate from the pixel section 5364.

[0329] Here, circuits 5363_1 and 5363_2 are referred to as Embodiments 1 to 4. It is possible to use the semiconductor device or shift register. In this case, circuit 5363_ 1. The circuit 5363_2 and the pixel section are formed on the same substrate, It is possible to set the polarity of all transistors formed to either N-channel or P-channel type. Therefore, it is possible to reduce the number of processes, improve yield, improve reliability, or reduce costs. This can be achieved. In particular, when the polarity of all transistors is N-channel type, The semiconductor layer of the transistor can be an amorphous semiconductor, a microcrystalline semiconductor, an organic semiconductor, or an oxide. It becomes possible to use semiconductors, etc. Therefore, it becomes possible to enlarge the display device, reduce costs, or This can lead to improvements in yield, among other things.

[0330] Alternatively, the semiconductor device or shift register of Embodiments 1 to 4 is a transistor The channel width can be reduced. Therefore, the layout area can be reduced. This allows you to make the picture frame smaller. Alternatively, you can reduce the layout area. This allows for higher resolution.

[0331] Alternatively, the semiconductor device or shift register of Embodiments 1 to 4 reduces parasitic capacitance. It can be cut. Therefore, power consumption can be reduced. Alternatively, the power of the external circuit The flow capacity can be reduced. Alternatively, the size of the external circuit, or having said external circuit The size of the display device can be reduced.

[0332] Furthermore, amorphous semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors are used as semiconductor layers. The transistors used may experience characteristic degradation such as an increase in threshold voltage or a decrease in mobility. There are many cases. However, the semiconductor device or shift register of Embodiments 1 to 4 is This can suppress the degradation of the transistor's characteristics, thus extending the lifespan of the display device. Cut.

[0333] Furthermore, as part of circuit 5362, the semiconductor device of Embodiments 1 to 4, or the Shift A tracer can be used. For example, circuit 5362a is implemented in Embodiment 1. It is possible to have a semiconductor device of form 4, or a shift register.

[0334] (Embodiment 6) In this embodiment, an example of a signal line driving circuit will be described. Note that the signal line driving circuit will be half It can be described as a conductor device or a signal generating circuit.

[0335] An example of a signal line driving circuit will be explained with reference to Figure 32(A). The signal line driving circuit is: It has multiple circuits, numbered 602_1 to 602_N, as well as circuit 600 and circuit 601. And circuits 602_1~602_N are, respectively, transistors 603_1~603_k It has multiple transistors (where k is a natural number greater than or equal to 2). Transistor 603_1~ 603_k is assumed to be an N-channel type. However, it is not limited to this, and the transistor The 603_1~603_k can be P-channel type, and CMOS type... It is possible to switch it.

[0336] The connection relationships of the signal line drive circuit will be explained using circuit 602_1 as an example. Transistor The first terminals of 603_1 to 603_k are connected to wiring 605_1. Transistor 60 The second terminals of 3_1~603_k are connected to wiring S1~Sk, respectively. Transistor 6 The gates 03_1 to 603_k are connected to wiring 604_1 to 604_k, respectively. Example For example, the first terminal of transistor 603_1 is connected to wiring 605_1, and the transistor The second terminal of 603_1 is connected to wiring S1, and the gate of transistor 603_1 is connected to wiring It is connected to line 604_1.

[0337] Circuit 600 transmits signals to circuits 602_1~602_ via wiring 604_1~604_k. It has the function of supplying N and can function as a shift register or decoder, etc. This signal is often a digital signal and can function as a selection signal. It is possible. And wiring 604_1~604_k can function as signal lines. be.

[0338] Circuit 601 has the function of outputting signals to circuits 602_1 to 602_N, and the video signal is generated It can function as a circuit, etc. For example, circuit 601 has wiring 605_1 The signal is supplied to circuit 602_1 via wiring 605_2. At the same time, the signal is supplied to circuit 6 It is supplied to 02_2. This signal is often an analog signal and is used as a video signal. It is possible to do so. And wiring 605_1~605_N functions as a signal line. It is possible to do so.

[0339] Circuits 602_1 to 602_N select which wire to output the output signal of circuit 601 to. It has a selection function and can function as a selector circuit. For example, circuit 602 _1 specifies which of the wirings S1 to Sk outputs the signal that circuit 601 outputs to wiring 605_1. It has a function to select whether to output to a specific location.

[0340] Transistors 603_1 to 603_N are connected to wiring 6, respectively, according to the output signal of circuit 600. It has the function of controlling the conductivity state between 05_1 and wiring S1~Sk, and functions as a switch. ru.

[0341] Next, regarding the operation of the signal line drive circuit in Figure 32(A), see the timing chart in Figure 32(B). Refer to Figure 32(B) for explanation. The signal 614_1 input to wiring 604_1 is shown in Figure 32(B). , Signal 614_2 input to wiring 604_2, Signal 614 input to wiring 604_k _k, signal 615_1 input to wiring 605_1, and signal input to wiring 605_2 An example of item 615_2 is shown.

[0342] Furthermore, one operating period of the signal line drive circuit corresponds to one gate selection period in the display device. The gate selection period is when a pixel belonging to a certain row is selected and a video signal is written to that pixel. This refers to the period during which it is possible to do something.

[0343] The gate selection period is divided into period T0 and periods T1 to Tk. This is the period for simultaneously applying a pre-charge voltage to the pixels belonging to the selected row. It can function as a pre-charge period. Periods T1 to Tk can each be selected. This is the period for writing a video signal to the pixels belonging to the row, and is defined as the writing period. It is possible to do so.

[0344] For convenience, the operation of the signal line drive circuit will be explained using the operation of circuit 602_1 as an example.

[0345] First, during period T0, circuit 600 sends an H-level signal to wiring 604_1~604_k. This outputs the following: Transistors 603_1~603_k turn on, so wire 605 _1 and wiring S1~Sk become conductive. At this time, circuit 601 is connected to wiring 605_1 Since a precharge voltage Vp is supplied to it, the precharge voltage Vp is, Outputs are sent to wiring S1 to Sk via 03_1 to 603_k. Then, the preset The charge voltage Vp is written to the pixels belonging to the selected row, so the pixels belonging to the selected row The pixels are pre-charged.

[0346] Next, during period T1, circuit 600 outputs a high-level signal to wiring 604_1. Then, transistor 603_1 turns on, and wiring 605_1 and wiring S1 become electrically connected. This state occurs. Then, wiring 605_1 and wiring S2~Sk become non-conductive. At this time, If circuit 601 outputs signal Data(S1) to wiring 605_1, then signal D ata(S1) is output to wiring S1 via transistor 603_1. The signal Data(S1) is the pixel belonging to the selected row among the pixels connected to wiring S1. It will be written directly.

[0347] Next, during period T2, circuit 600 outputs a high-level signal to wiring 604_2. Then, transistor 603_2 turns on, and wiring 605_2 and wiring S2 become conductive. This is the state in which the wiring 605_1 and wiring S1 become non-conductive, and the wiring 605_1 and Wiring S3 to Sk remains in a non-conductive state. At this time, circuit 601 receives the signal Data( If S2) is output to wiring 605_1, then the signal Data(S2) is a transistor The signal Data(S1) is output to wiring S2 via TA603_2. The pixels connected to line S1 that belong to the selected row are written to.

[0348] Subsequently, until period Tk, circuit 600 sends a high-level signal to wiring 604_1~604_k. Since the output is generated sequentially, the same applies to periods T1 and T2, and also to periods T3 through Tk, as shown in circuit 6. 00 outputs high-level signals sequentially to wiring 604_3~604_k. Therefore, the transistor Since the ziters 603_3 to 603_k are turned on in sequence, the signal output from circuit 601 is: The signals are output sequentially to wiring S3 to Sk. In this way, the signals are sequentially sent to the pixels belonging to the selected row. It becomes possible to write to it.

[0349] The above describes an example of a signal line drive circuit. The signal line drive circuit of this embodiment is a selector Because it has a circuit that functions as a connector, the number of signals or wires can be reduced. Alternatively, a voltage for precharging may be applied before writing the video signal to the pixels (period T0). Because it writes to the pixels, the video signal writing time can be shortened. Therefore, This allows for larger and higher-resolution display devices. However, it is not limited to this. It is possible to omit period T0 and not precharge the pixels.

[0350] Furthermore, if k is too large, the writing time to the pixels will be shortened, so the video signal to the pixels The writing process may not complete within the allotted time. Therefore, it is preferable that k ≤ 6. It is more preferable that k ≤ 3. Even more preferable that k = 2. It's nice.

[0351] In particular, when the color elements of a pixel are divided into n parts, it is possible to set k=n. For example, When the color elements of a pixel are divided into three parts: red (R), green (G), and blue (B), then k=3. This is possible. In this case, the gate selection period is period T0, period T1, period T2, period It is divided into periods T1, T2, and T3. Then, in each of the periods T1, T2, and T3, the red (R) image It is possible to write video signals to the green (G) pixels and blue (B) pixels. However, However, this is not limited to this; the order of periods T1, T2, and T3 can be set arbitrarily. That is the case.

[0352] In particular, a pixel has n (where n is a natural number) subpixels (hereinafter also called subpixels or secondary pixels). When a pixel is divided into subpixels, it is possible to set k=n. For example, if a pixel is divided into two subpixels If divided, k=2 is possible. In this case, the 1-gate selection period is period T. It is divided into periods 0, T1, and T2. Then, in period T1, one of the two subpixels The video signal is written, and during period T2, the video signal is written to the other of the two subpixels. This is possible.

[0353] Note that the drive frequencies of circuits 600 and 602_1~602_N are compared with those of circuit 601. Since the values ​​are often low, circuits 600 and 602_1~602_N are the same as the pixel section. It is possible to form them on the same substrate. Thus, the substrate on which the pixel portion is formed and the external circuit This can reduce the number of connections, thereby improving yield or reliability. This is possible. Furthermore, as shown in Figures 31(A) to (E), the scan line driving circuit is also based on the same base as the pixel section. By forming it on a board, the number of connections to external circuits can be further reduced.

[0354] The circuit 600 is a semiconductor device or shift register of Embodiments 1 to 4. It is possible to use this. In this case, the polarity of all transistors in circuit 600 is It can be an N-channel type or a P-channel type. Therefore, the number of processes can be reduced. This can lead to improved yield or reduced costs.

[0355] Furthermore, this applies not only to circuit 600, but also to all transistors in circuits 602_1 to 602_N. The polarity can also be N-channel or P-channel. Therefore, circuit 6 When circuits 00 and 602_1 to 602_N are formed on the same substrate as the pixel section, the number of steps This can lead to reductions in transients, improved yield, or cost reductions. In particular, all transients By making the polarity of the transistor an N-channel type, the semiconductor layer of the transistor can be, for example, Amorphous semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors can be used. .

[0356] (Embodiment 7) In this embodiment, the pixel configuration and pixel operation applicable to the liquid crystal display device are described below. explain.

[0357] Figure 33(A) shows an example of a pixel. Pixel 3020 is composed of a transistor 3021 and a liquid crystal element. It has 3022 and a capacitive element 3023. And the first terminal of transistor 3021 is The wiring 3031 is connected to the second terminal of transistor 3021, and the second terminal of the liquid crystal element 3022 is connected to one of the liquid crystal elements 3022. One electrode and one electrode of the capacitive element 3023 are connected to the gate of transistor 3021. It is connected to wiring 3032. The other electrode of liquid crystal element 3022 is connected to electrode 3034. The other electrode of the capacitive element 3023 is connected to the wiring 3033.

[0358] Wiring 3031 can, for example, receive a video signal. Wiring 303 For example, a scan signal, selection signal, or gate signal can be input to 2. For example, a constant voltage can be supplied to wiring 3033. Electrode 3 For example, a constant voltage can be supplied to 034. However, this is not limited to this. The video signal is not specified, and a precharge voltage is supplied to wiring 3031. It is possible to shorten the writing time. Alternatively, a signal can be input to wiring 3033. This makes it possible to control the voltage applied to the liquid crystal element 3022. Alternatively, By inputting a signal to pole 3034, it is possible to achieve frame inversion drive. be.

[0359] Note that wiring 3031 can function as a signal line, video signal line, or source signal line. Yes, wiring 3032 can function as a signal line, scan line, or gate signal line. Yes, it is possible. Wiring 3033 can function as a power line or a capacitance line. Electrode 3034 can function as a common electrode or a counter electrode. However, this Not limited to, if voltage is supplied to wiring 3031 and wiring 3032, these wirings It can function as a power line. Or, if a signal is input to wiring 3033 Wiring 3033 can function as a signal line.

[0360] Transistor 3021 determines the conductivity between wiring 3031 and one electrode of liquid crystal element 3022. By controlling it, it has the function of controlling the timing of writing the video signal to the pixel. It can function as a switch. Capacitive element 3023 is one of the liquid crystal elements 3022. Maintaining the potential difference between the electrode and the wiring 3033, the voltage applied to the liquid crystal element 3022 It has the function of maintaining a constant value and functions as a holding capacity. However, it is not limited to this.

[0361] Figure 33(B) shows a timing chart to explain the operation of the pixels in Figure 33(A). An example is shown. Figure 33(B) shows the signal 3042_j (where j is a natural number) and the signal 3042_j+1 This shows signal 3041_i, signal 3041_i+1, and voltage 3043. And Figure 33 (B) shows the kth frame (where k is a natural number) and the k+1th frame. Note that signal 30 42_j, ​​signal 3042_j+1, signal 3041_i, signal 3041_i+1, and voltage 3043 is the signal input to wiring 3032 in row j, and wiring 3032 in row j+1. The signal input to the i-th row wiring 3031, the signal input to the i+1-th row wiring 3031 This is an example of a signal input to the circuit and a voltage supplied to wiring 3033.

[0362] The operation of pixel 3020, located at row j and column i, is described below. The signal 3042_j is at the H level. When this happens, transistor 3021 turns on. Therefore, the i-th row wiring 3031 and the liquid crystal element Since one electrode of 3022 becomes conductive, the signal 3041_j is transmitted to transistor 302 It is input to one electrode of the liquid crystal element 3022 via 1. Then, the capacitive element 3023, At this time, maintain the potential difference between the potential of one electrode of the liquid crystal element 3022 and the potential of the wiring 3033. Therefore, until the signal 3042_j reaches a high level again, the liquid crystal element 302 The voltage applied to 2 remains constant. Then, the liquid crystal element 3022 responds to the applied voltage. It expresses gradations of tone.

[0363] In Figure 33(B), positive and negative polarity signals are alternately distributed for each row selection period. An example of what happens when input to line 3031 is shown. A positive polarity signal is one in which the potential is equal to the reference value (for example). A signal higher than the potential of electrode 3034 is a negative polarity signal, where the potential is higher than the reference value. This refers to a signal lower than (for example, the potential of electrode 3034). However, it is not limited to this. The signal input to wiring 3031 can have the same polarity for the duration of one frame. ru.

[0364] Note that Figure 33(B) shows the polarity of signal 3041_i and the polarity of signal 3041_i+1. An example of a case where they are different is shown. However, it is not limited to this, and the polarity of signal 3041_i and The polarity of signal 3041_i+1 can be the same.

[0365] Figure 33(B) shows the period during which signal 3042_j is at the H level, and the signal 3042_j This example shows a case where the period when +1 is at the H level does not overlap. However, this is not the only example. Furthermore, as shown in Figure 33(C), the period during which signal 3042_j is at an H level, and signal 30 The period during which 42_j+1 is at an H level can overlap. In this case, wiring 303 It is preferable that the same polarity signal is supplied to 1 for the duration of one frame. The signal 3041_j, which is written to the j-th row pixel, is used to write the j+1-th row pixel. It can be pre-charged. This shortens the time it takes to write the video signal to the pixels. This is possible. Therefore, the display device can be made high-resolution. Or, the display of the display device The section can be enlarged. Alternatively, the same polarity can be used for wiring 3031 during a single frame period. Since this signal is input, power consumption can be reduced.

[0366] Furthermore, the pixel configuration in Figure 34(A) and the timing chart in Figure 33(C) are combined. This enables dot inversion driving. In the pixel configuration shown in Figure 34(A), Pixel 3020(i, j) is connected to wiring 3031_i. On the other hand, pixel 3020(i, j+1) is connected to wiring 3031_i+1. In other words, the pixels belonging to the i-th column are in row 1. The wires are connected alternately, one at a time, to wire 3031_i and the other to wire 3031_i+1. In this way, the i-th row The pixels belonging to the eye are written with alternating positive and negative polarity signals, one row at a time. This enables dot inversion driving. However, it is not limited to this, and also applies to the i-th column. The pixels are arranged alternately in multiple rows (for example, 2 or 3 rows), with wiring 3031_i and wiring 3031 It is possible to connect it to _i+1.

[0367] Furthermore, a subpixel structure can be used as the pixel configuration. Figure 34(B) Figure 34( B) uses 1S+2G (for example, one signal line and two scan lines per subpixel). Figure 34(C) shows a subpixel structure called (for example, 2S + 1G). A subpixel structure that uses two signal lines and one scan line per pixel. This indicates that subpixels 3020A and 3020B correspond to pixel 3020. Transistors 3021A and 3021B correspond to transistor 3021. Liquid crystal elements 3022A and 3022B correspond to liquid crystal element 3022. Capacitive element 3023A and capacitive element 3023B correspond to capacitive element 3023. Wiring 3031A and Wiring 3031B corresponds to wiring 3031. Wiring 3032A and wiring 3032B are Corresponds to wiring 3032.

[0368] Here, the pixels of this embodiment, the semiconductor devices of Embodiments 1 to 6, and the shift register By combining it with a station, display device, or signal line drive circuit, various advantages can be obtained. It can be obtained. For example, when using a subpixel structure as pixels, the display device can be driven The number of signals required to operate increases. Therefore, the number of gate signal lines, or source The number of signal lines increases. As a result, the number of connections between the substrate on which the pixel is formed and the external circuitry increases. In some cases, the number of gate signal lines may increase significantly. However, even if the number of gate signal lines increases, Embodiment 7 As shown, it is possible to form the scan line driving circuit on the same substrate as the pixel section. Therefore, without significantly increasing the number of connections between the substrate on which the pixel portion is formed and the external circuit, sub-pixel Pixels with a cell structure can be used. Alternatively, even if the number of source signal lines increases, the embodiment By using a signal line drive circuit of type 6, the number of source signal lines can be reduced. Therefore, without significantly increasing the number of connections between the substrate on which the pixel portion is formed and the external circuit, Pixels with a 3D pixel structure can be used.

[0369] Alternatively, when inputting a signal to a capacitance line, the number of connections between the substrate on which the pixel unit is formed and the external circuit is... In some cases, the capacitance can increase significantly. Therefore, the capacitance line is connected to the semiconductor of Embodiments 1 to 5. It is possible to supply signals using a body device or a shift register. And, in practice The semiconductor device or shift register of Embodiments 1 to 5 is formed on the same substrate as the pixel portion. This is possible. Therefore, the number of connections between the substrate on which the pixel section is formed and the external circuit can be significantly reduced. The signal can be input to the capacitance line without increasing its capacity.

[0370] Alternatively, when using AC drive, the time required to write the video signal to the pixels becomes shorter. As a result, there may be insufficient time to write the video signal to the pixels. Furthermore, when using pixels with a subpixel structure, the time required to write the video signal to the pixels is shortened. As a result, there may be insufficient time to write the video signal to the pixels. Therefore, it is possible to write a video signal to a pixel using the signal line driving circuit of Embodiment 6. It is possible. In this case, before writing the video signal to the pixel, a pre-charge voltage is applied to the pixel. Because it is written, the video signal can be written to the pixels in a short amount of time. Alternatively, see Figure 28(B As shown in ), the period during which one row is selected overlaps with the period during which another row is selected. Therefore, it is possible to use the video signal from another line as the voltage for precharging.

[0371] (Embodiment 8) In this embodiment, an example of a display device is shown in Figures 35(A), (B), and (C). I will explain this further. For the purposes of this explanation, I will describe a liquid crystal display (LCD) as an example.

[0372] Figure 35(A) is an example of a top view of a display device. A drive circuit 5392 and A pixel section 5393 is formed. An example of a drive circuit 5392 is a scan line drive circuit , or there is a signal line driving circuit, etc. For example, in the case of a liquid crystal display device, the pixel unit 5393 drives the pixels The pixels have a set voltage applied to the liquid crystal element according to the output signal of the drive circuit 5392. It can be done.

[0373] Figure 35(B) shows an example of the AB section of Figure 35(A). And in Figure 35(B) , a substrate 5400, a conductive layer 5401 formed on the substrate 5400, and the conductive layer 5401 An insulating layer 5402 is formed to cover the conductive layer 5401 and the insulating layer 5402. A semiconductor layer 5403a is formed, and a semiconductor layer 5403b is formed on top of the semiconductor layer 5403a. Furthermore, a conductive layer 5404 is formed on the semiconductor layer 5403b and the insulating layer 5402, and An insulating layer 5405 having an opening is formed on the edge layer 5402 and the conductive layer 5404. , a conductive layer 5406 formed on the insulating layer 5405 and in the openings of the insulating layer 5405, and insulation An insulating layer 5408 is placed on top of layer 5405 and on top of the conductive layer 5406, and insulating layer 5405 A liquid crystal layer 5407 formed on top of the liquid crystal layer 5407 and an insulating layer 5408 formed on top of the liquid crystal layer 5407 The conductive layer 5409 and the substrate 5410 formed on the conductive layer 5409 are shown.

[0374] The conductive layer 5401 can function as a gate electrode. The insulating layer 5402 is a gate electrode. It can function as a conductive insulating film. The conductive layer 5404 is used for wiring and transistors. It can function as an electrode, or an electrode of a capacitive element. The insulating layer 5405 is a layer It can function as an interlayer or planarization layer. The conductive layer 5406 is used for wiring, pixel electricity It can function as a pole or a reflector electrode. The insulating layer 5408 is a sealing material. It is possible for it to function. The conductive layer 5409 can function as a counter electrode or a common electrode. It is possible.

[0375] In this case, parasitic capacitance may occur between the drive circuit 5392 and the conductive layer 5409. As a result, the output signal of the drive circuit 5392 or the potential of each node may have a smudge or delay. This can occur, or power consumption can increase. However, as shown in Figure 35(B) An insulating layer 5408 capable of functioning as a sealant is formed on top of the drive circuit 5392. By doing so, the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409 is reduced. It can be reduced. This is because the dielectric constant of the sealing material is lower than that of the liquid crystal layer. Because there are many. Therefore, the output signal of the drive circuit 5392 or the potential of each node is reduced. Alternatively, delay can be reduced. Alternatively, the power consumption of the drive circuit 5392 can be reduced. can.

[0376] Furthermore, as shown in Figure 35(C), a portion of the drive circuit 5392 is placed on top of it, functioning as a sealing material. It is possible to form an insulating layer 5408 that allows for this. This makes it possible to reduce the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409. Therefore, the output signal of the drive circuit 5392 or the potential of each node can be reduced. Yes, it is possible. However, it is not limited to this, and on the drive circuit 5392, a material that functions as a sealant can be used. It is possible that an insulating layer 5408 is not formed.

[0377] Furthermore, the display element is not limited to liquid crystal elements, but can include various other elements such as EL elements or electrophoretic elements. It is possible to use indicative elements.

[0378] In this embodiment, an example of the cross-sectional structure of the display device has been described. This involves combining the semiconductor device or shift register of Embodiments 1 to 4. This is possible. For example, amorphous semiconductors, microcrystalline semiconductors, as semiconductor layers of transistors. When using organic semiconductors or oxide semiconductors, the channel width of the transistor becomes larger. This is often the case. However, as in this embodiment, if the parasitic capacitance of the drive circuit can be reduced, The channel width of the transistor can be reduced. Therefore, the layout area can be reduced. Since this can be measured, the bezel of the display device can be made narrower. Alternatively, the display device can be made high-resolution. It can be made finer.

[0379] (Embodiment 9) In this embodiment, an example of the transistor structure is shown in Figures 36(A), (B), and (C). (See the references below for further explanation.)

[0380] Figure 36(A) is a diagram showing an example of the structure of a display device, and also a top-gate type transistor. This figure shows an example of the structure of a zista. Figure 36(B) shows an example of the structure of a display device. Yes, and also, an example of the structure of a bottom-gate transistor, or an example of the structure of a display device. The figure shown is an example. Figure 36(C) shows one of the structures of a transistor fabricated using a semiconductor substrate. An example is shown in the figure.

[0381] An example of a transistor shown in Figure 36(A) is formed on the substrate 5260 with an insulating layer 5261 in between. And, regions 5262a, 5262b, 5262c, 5262d, and 526 A semiconductor layer 5262 having 2e, and an insulating layer 52 formed to cover the semiconductor layer 5262. 63, a conductive layer 5264 formed on the semiconductor layer 5262 and the insulating layer 5263, and an insulating layer 5264. An insulating layer 5265 having an opening is formed on layer 5263 and conductive layer 5264, and It comprises a conductive layer 5266 formed on top of layer 5265 and in the openings of the insulating layer 5265.

[0382] An example of a transistor in Figure 36(B) is formed on a substrate 5300 with a conductive layer 5301 and , an insulating layer 5302 formed to cover the conductive layer 5301, and the conductive layer 5301 and the insulating layer A semiconductor layer 5303a formed on 5302, and a semiconductor layer 5303a formed on 5302 A semiconductor layer 5303b and a conductive layer formed on the semiconductor layer 5303b and on the insulating layer 5302 A dielectric layer 5304 and a conductive layer 5302 formed on top of the conductive layer 5304 and having an opening An insulating layer 5305 and conductive material formed on the insulating layer 5305 and in the openings of the insulating layer 5305. It has layer 5306.

[0383] An example of a transistor in Figure 36(C) is a semiconductor substrate having regions 5353 and 5355. A plate 5352, an insulating layer 5356 formed on the semiconductor substrate 5352, and a semiconductor substrate 53 An insulating layer 5354 formed on 52, and a conductive layer 535 formed on the insulating layer 5356 7 and are formed on insulating layer 5354, insulating layer 5356, and conductive layer 5357, and the opening is An insulating layer 5358 is provided, and is formed on the insulating layer 5358 and in the openings of the insulating layer 5358. It has a conductive layer 5359. Thus, region 5350 and region 5351 are each made of Zista is created.

[0384] Furthermore, when a display device is configured using the transistors in this embodiment, for example, see Figure 3 As shown in 6(A), the conductive layer 5266 and the insulating layer 5265 are formed on top of the opening An insulating layer 5267 having and formed on the insulating layer 5267 and in the openings of the insulating layer 5267 A conductive layer 5268 is formed on the insulating layer 5267 and on the conductive layer 5268, and the opening is An insulating layer 5269 having and formed on the insulating layer 5269 and in the opening of the insulating layer 5269 A light-emitting layer 5270 and a conductive layer 52 formed on the insulating layer 5269 and on the light-emitting layer 5270. It is possible to form 71 and .

[0385] Furthermore, as shown in Figure 36(B), the insulating layer 5305 and the conductive layer 5306 are arranged on top of each other. A liquid crystal layer 5307 and a conductive layer 5308 formed on the liquid crystal layer 5307 are formed It is possible.

[0386] The insulating layer 5261 can function as an undercoat. The insulating layer 5354 is between elements. It functions as a separation layer (e.g., a field oxide film). Insulating layer 5263, insulating layer 5302, The insulating layer 5356 can function as a gate insulating film. The conductive layer 5264, The electrode layer 5301 and the conductive layer 5357 can function as gate electrodes. Insulating layer 5265, insulating layer 5267, insulating layer 5305, and insulating layer 5358 are interlayer films or flat It can function as a film. Conductive layer 5266, conductive layer 5304, and conductive layer 5 359 can function as wiring, a transistor electrode, or a capacitive element electrode, etc. It is possible. The conductive layer 5268 and the conductive layer 5306 are used as pixel electrodes or reflective electrodes, etc. It is possible for it to function. The insulating layer 5269 can function as a partition. The conductive layer 5271 and the conductive layer 5308 function as counter electrodes or common electrodes, etc. This is possible.

[0387] Examples of substrates 5260 and 5300 include glass substrates, quartz substrates, and semiconductor substrates. For example, single crystal substrates (e.g., silicon substrates, or single crystal substrates), SOI substrates, plastic Substrates, metal substrates, stainless steel substrates, substrates with stainless steel foil, tang Examples include stainless steel substrates, substrates with tungsten foil, or flexible substrates. Glass substrates. Examples include barium borosilicate glass and aluminobosilicate glass. Examples of flexible substrates include polyethylene terephthalate (PET) and polyethylene naphtha. Plastics such as phosphate (PEN) and polyethersulfone (PES), or Examples include flexible synthetic resins such as acrylic. Other examples include laminated films (polypropylene). Polypropylene, polyester, vinyl, polyvinyl fluoride, polyvinyl chloride, etc., fibrous materials Paper containing, base film (polyester, polyamide, polyimide, inorganic vapor-deposited film, Examples include paper products, etc.

[0388] As an example of the semiconductor substrate 5352, a single crystal Si group having n-type or p-type conductivity A plate can be used. Region 5353 is, for example, an impurity in the semiconductor substrate 5352. This is a region where a substance is added, and it functions as a well. For example, if the semiconductor substrate 5352 is p-type If it has a conductivity type, region 5353 has an n-type conductivity and functions as an n-well. On the other hand, if the semiconductor substrate 5352 has an n-type conductivity, then region 5353 has a p-type conductivity. It has an electrochemical type and functions as a p-well. Region 5355 is, for example, a semiconductor group where impurities are present. This is an area added to plate 5352 and functions as either a source area or a drain area. Therefore, it is possible to form an LDD region on the semiconductor substrate 5352.

[0389] Examples of insulating layer 5261 include silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxide. Silicon oxide (SiOxNy) (x>y>0), silicon nitride oxide (SiNxOy) (x>y>0) These include films containing oxygen or nitrogen, or laminated structures thereof. Insulating layer 5261 One example of a case where it is provided in a two-layer structure is to provide a silicon nitride film as the first insulating layer. A silicon oxide film can be provided as the second insulating layer. The insulating layer 5261 has a three-layer structure. One example of how it can be provided is to provide a silicon oxide film as the first insulating layer, and the second insulating layer It is possible to provide a silicon nitride film as the edge layer and a silicon oxide film as the third insulating layer. ru.

[0390] Examples of semiconductor layers 5262, 5303a, and 5303b include non-single Crystalline semiconductors (e.g., amorphous silicon, polycrystalline silicon, microcrystalline silicon) (e.g., ZnO, InG), single-crystal semiconductors, compound semiconductors, or oxide semiconductors (e.g., ZnO, InG) aZnO, SiGe, GaAs, IZO, ITO, SnO, AZTO, organic semiconductors, or Examples include carbon nanotubes.

[0391] For example, region 5262a is an intrinsic region where no impurities are added to the semiconductor layer 5262. This state functions as a channel region. However, an impurity is added to region 5262a. It is possible that the impurities added to region 5262a are region 5262b, region 526 The concentration of impurities added to region 2c, region 5262d, or region 5262e is lower than that of the impurities added to region 5262e. Preferred. Regions 5262b and 5262d are region 5262c or region 5262e. This region has a lower concentration of impurities added and functions as an LDD region. However, Regions 5262b and 5262d can be omitted. Regions 5262c and Region 5262e is a region in which impurities are added to semiconductor layer 5262 at a high concentration, source It functions as a region or drain region.

[0392] Furthermore, semiconductor layer 5303b is a semiconductor layer to which phosphorus and other impurity elements are added. It has an n-type conductivity.

[0393] Furthermore, when an oxide semiconductor or a compound semiconductor is used as the semiconductor layer 5303a, The semiconductor layer 5303b can be omitted.

[0394] Examples of insulating layers 5263, 5302, and 5356 include silicon dioxide (Si Ox), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x>y>0), nitriding acid A film containing oxygen or nitrogen, such as silicon dioxide (SiNxOy) (x>y>0), or these This includes layered structures, etc.

[0395] Conductive layer 5264, conductive layer 5266, conductive layer 5268, conductive layer 5271, conductive layer 5301, Conductive layer 5304, conductive layer 5306, conductive layer 5308, conductive layer 5357, and conductive layer 535 9 can be a single-layer structure or a multi-layer structure, and is formed using a conductive film. Examples include aluminum (Al), tantalum (Ta), titanium (Ti), and molybdenum. Chromium (Mo), Tungsten (W), Neodymium (Nd), Chromium (Cr), Nickel (Ni ), platinum (Pt), gold (Au), silver (Ag), copper (Cu), manganese (Mn), cobalt (Co), niobium (Nb), silicon (Si), iron (Fe), palladium (Pd), carbon (C), scandium (Sc), zinc (Zn), gallium (Ga), indium (In) Selected from the group composed of tin (Sn), zirconium (Zr), and cerium (Ce). A single elemental film, or a compound containing one or more elements selected from a group, etc. Yes. Furthermore, the individual membranes or compounds in question are phosphorus (P), boron (B), arsenic (As), and Alternatively, it may contain oxygen (O), etc. An example of such a compound is the one mentioned above. Alloys containing one or more elements selected from multiple elements (for example, ITO, IZO, Silicon oxide-containing indium tin oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO) ), tin cadmium oxide (CTO), aluminum neodymium (Al-Nd), aluminum Tungsten (Al-W), aluminum zirconium (Al-Zr), aluminum Tun (Al-Ti), Aluminum Cerium (Al-Ce), Magnesium Silver (Mg-A g) Molybdenum niobium (Mo-Nb), molybdenum tungsten (Mo-W), molybdenum (Dentantalum (Mo-Ta) and other alloy materials), one selected from the aforementioned multiple elements or compounds of multiple elements and nitrogen (for example, titanium nitride, tantalum nitride, molybdenum nitride) Nitride films such as nitride, or one or more elements selected from the aforementioned elements and nitride Compounds with licone (e.g., tungsten silicide, titanium silicide, nickel silicide) Examples include silicide films (such as aluminum silicon and molybdenum silicon). Other examples include carbon nanotubes, organic nanotubes, inorganic nanotubes, or gold. There are nanotube materials such as genus nanotubes.

[0396] Insulating layer 5265, insulating layer 5267, insulating layer 5269, insulating layer 5305, and insulating layer 535 Examples of 8 include a single-layer insulating layer, or a laminated structure thereof. For example, silicon dioxide (SiOx), silicon nitride (SiNx), or silicon oxide nitride ( Oxygen such as SiOxNy (x>y>0), silicon nitride (SiNxOy) (x>y>0) Alternatively, a film containing nitrogen, a film containing carbon such as DLC (diamond-like carbon), or Siloxane resin, epoxy, polyimide, polyamide, polyvinylphenol, benzo Examples include cyclobutene or organic materials such as acrylic.

[0397] Examples of the light-emitting layer 5270 include organic EL elements and inorganic EL elements. Examples of elements include a hole injection layer made of hole injection material and a hole transport layer made of hole transport material. A layer consisting of a light-emitting layer made of a light-emitting material, an electron transport layer made of an electron transport material, and an electron injection material An electron injection layer, or a single-layer structure of a layer made by mixing multiple of these materials, or These include layered structures.

[0398] An example of liquid crystal layer 5307, an example of a liquid crystal material applicable to liquid crystal layer 5307, or liquid crystal layer 530 Examples of liquid crystal modes applicable to liquid crystal elements including 7 include nematic liquid crystals and cholesterol liquid crystals. Smetic LCD, disco-tic LCD, thermotropic LCD, liotropic Low molecular weight liquid crystals, low molecular weight liquid crystals, high molecular weight liquid crystals, high molecular weight dispersed liquid crystals (PDLCs), Ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain polymer liquid crystal, plasma address liquid crystal (P ALC), banana-shaped LCD, TN (Twisted Nematic) mode, STN (S (Super Twisted Nematic) mode, IPS (In-Plane-Switch) itching mode, FFS (Fringe Field Switching) mode MVA (Multi-domain Vertical Alignment) code, PVA (Patterned Vertical Alignment), ASV (Advanced Super View) mode, ASM (Axially Sym metric aligned Micro-cell) mode, OCB (Optica) (Compensated Birefringence) mode, ECB (Elec) (Trially Controlled Birefringence) Mode, FL C (Ferroelectric Liquid Crystal) mode, AFLC ( AntiFerroelectric Liquid Crystal) mode, PDL C (Polymer Dispersed Liquid Crystal) mode, There are modes such as Stohst mode and Blue Phase mode.

[0399] Furthermore, an insulating layer that functions as an alignment film is placed on top of the insulating layer 5305 and on top of the conductive layer 5306. It is possible to form insulating layers and other structures that function as protrusions.

[0400] Furthermore, on top of the conductive layer 5308, there are color filters, black matrices, or protrusions. It is possible to form insulating layers and the like that which function as conductive layers. Below the conductive layer 5308, there is an alignment film and It is possible to form an insulating layer that functions in this way.

[0401] The transistor of this embodiment can be applied to embodiments 1 to 8. In particular, in Figure 36(B), the semiconductor layer is an amorphous semiconductor, a microcrystalline semiconductor, and an organic When using semiconductors or oxide semiconductors, transistors may degrade. Therefore, the transistor of this embodiment can be used in a semiconductor device, a shift register, or a display device. Using them shortens their lifespan. However, half of Embodiments 1 to 8 In conductive devices, shift registers, or display devices, transistor degradation can be suppressed. Therefore, the transistor of this embodiment is the semiconductor of Embodiments 1 to 8. By applying it to devices, shift registers, or display devices, their lifespan is extended. It is possible.

[0402] (Embodiment 10) This embodiment shows an example of the manufacturing process for transistors and capacitive elements. In particular, semiconductors The fabrication process when using an oxide semiconductor as the layer will be described below.

[0403] Refer to Figures 37(A) to (C) for an example of the manufacturing process for transistors and capacitive elements. Let me explain. Figures 37(A) to (C) show transistor 5441 and capacitive element 5442. This is an example of the manufacturing process. Transistor 5441 is an example of an inverse staggered thin-film transistor. Wiring is provided on the oxide semiconductor layer via a source electrode or drain electrode. This is an example of a transistor.

[0404] First, a first conductive layer is formed over the entire surface of the substrate 5420 by sputtering. Next, Using a resist mask formed by a photolithography process using a first photomask Then, the first conductive layer is selectively etched to form conductive layer 5421 and conductive layer 5422. The conductive layer 5421 can function as a gate electrode, and the conductive layer 542 Element 2 can function as one electrode of a capacitive element. However, it is not limited to this. Furthermore, the conductive layer 5421 and the conductive layer 5422 are connected to the electrodes of wiring, gate electrodes, or capacitive elements. It is possible to have a part that functions in this way. After this, the resist mask is removed.

[0405] Next, the insulating layer 5423 is formed over the entire surface using plasma CVD or sputtering. The insulating layer 5423 can function as a gate insulating layer, and the conductive layer 5421, It is formed to cover the conductive layer 5422. The thickness of the insulating layer 5423 is 50 nm. It is often around 250nm.

[0406] Next, a resist mask formed by a photolithography process using a second photomask. Using this method, the insulating layer 5423 is selectively etched to reach the conductive layer 5421. Hole 5424 is formed. After this, the resist mask is removed. However, this is not limited to this. Alternatively, the contact hole 5424 can be omitted. After formation, it is possible to form the contact hole 5424. The cross-sectional view corresponds to Figure 37(A).

[0407] Next, an oxide semiconductor layer is formed over the entire surface by sputtering. However, this is not limited to this method. Furthermore, an oxide semiconductor layer is formed by sputtering, and a buffer layer is then placed on top of it (e.g. eba n + It is possible to form a layer. The thickness of the oxide semiconductor layer can be 5 nm to 2 nm. It is often 00nm.

[0408] Next, a resist mask formed by a photolithography process using a third photomask. This is used to selectively etch the oxide semiconductor layer. After this, the resist mask is removed. do.

[0409] Next, a second conductive layer is formed over the entire surface by sputtering. Then, a fourth photomask is formed. The resist mask formed by the photolithography process used is selectively used to create a second conductive material. The layers are etched to form conductive layers 5429, 5430, and 5431. The conductive layer 5429 is connected to the conductive layer 5421 via the contact hole 5424. The conductive layers 5429 and 5430 function as source electrodes or drain electrodes. This is possible, and the conductive layer 5431 can function as the other electrode of the capacitive element. However, this is not limited to conductive layer 5429, conductive layer 5430, and conductive layer 54 31 is a part that functions as a wiring, source or drain electrode, or electrode of a capacitive element. It is possible to include it.

[0410] Furthermore, if heat treatment (for example, at 200°C to 600°C) is performed afterward, the material must be able to withstand this heat treatment. It is preferable to give the second conductive layer heat resistance. Therefore, the second conductive layer is made of Al and heat-resistant Highly thermally conductive materials (e.g., Ti, Ta, W, Mo, Cr, Nd, Sc, Zr, Ce) Elements such as these, alloys of these elements, or nitrides containing these elements. It is preferable that the material is a combination of the following: By creating a laminated structure for the conductive layers, the second conductive layer can be given high heat resistance. For example, a highly heat-resistant conductive material such as Ti or Mo can be placed above or below the Al. It is Noh.

[0411] Furthermore, during the etching of the second conductive layer, a portion of the oxide semiconductor layer is also etched. Then, an oxide semiconductor layer 5425 is formed. This etching process overlaps with the conductive layer 5421. The oxide semiconductor layer 5425 in the portion where the second conductive layer is not formed above it The oxide semiconductor layer 5425 is often thinned because it is worn away. However, this is not limited to this. Therefore, the oxide semiconductor layer 5425 can not be etched. However, acid n + If a layer is formed, the oxide semiconductor layer 5425 is This is often done. After this, the resist mask is removed. At this stage, transistor 5441 and capacitive element 5442 are completed. The top view corresponds to Figure 37(B).

[0412] Next, a heat treatment is performed at 200°C to 600°C under an atmospheric or nitrogen atmosphere. This process causes atomic-level rearrangement of the oxide semiconductor layer 5425. This heating process (including photo-annealing) releases the strain that inhibits carrier movement. The timing of the processing is not limited; it can be performed at various timings after the formation of the oxide semiconductor layer. It can be done using the G app.

[0413] Next, an insulating layer 5432 is formed over the entire surface. The insulating layer 5432 can be a single-layer structure. Furthermore, a laminated structure is possible. For example, an organic insulating layer can be used as the insulating layer 5432. When using this method, apply the composition which is the material for the organic insulating layer, and then in an atmospheric or nitrogen atmosphere. Then, a heat treatment is performed at 200°C to 600°C to form an organic insulating layer. In this way, oxide By forming an organic insulating layer in contact with the semiconductor layer 5425, a highly reliable thin film transient is achieved. A sta can be made. Note that when an organic insulating layer is used as the insulating layer 5432, A silicon nitride film or a silicon oxide film can be provided beneath the insulating layer.

[0414] In Figure 37(C), a configuration in which an insulating layer 5432 is formed using a non-photosensitive resin is shown. To illustrate, in a cross-section of the region where the contact hole is formed, the end of the insulating layer 5432 is It is angular. However, when an insulating layer 5432 is formed using a photosensitive resin, the contour In the cross-section of the region where a hole is formed, the end of the insulating layer 5432 is curved. This becomes possible. As a result, the coverage of the third conductive layer or pixel electrode that is formed later is improved.

[0415] Alternatively, instead of applying the composition, depending on the material, you can use a dipping method, a spray application method, or Inkjet method, printing method, doctor knife, roll coater, curtain coater, or It is possible to use an IF Coater or similar device.

[0416] Furthermore, without heat treatment after forming the oxide semiconductor layer, the composition which is the material for the organic insulating layer During the heat treatment process, it is possible to simultaneously perform the heat treatment on the oxide semiconductor layer 5425.

[0417] The thickness of the insulating layer 5432 is 200 nm to 5 μm, preferably 300 nm to 1 μm. It is possible to do so.

[0418] Next, a third conductive layer is formed over the entire surface. Then, a photolithograph is performed using a fifth photomask. The third conductive layer is selectively etched using the resist mask formed by the process, The electrolytic layer 5433 and the conductive layer 5434 are formed. A cross-sectional view at this stage is shown in Figure 37(C). ) corresponds to the conductive layer 5433 and conductive layer 5434, wiring, pixel electrodes, reflective electrodes, transparent It can function as a photoelectrode or an electrode for a capacitive element. In particular, conductive layer 5434 Since it is connected to the conductive layer 5422, it can function as an electrode of the capacitive element 5442. It is possible. However, it is not limited to this, and a conductive layer formed using the first conductive layer and the second conductive layer It is possible to have the function of connecting with a conductive layer formed using a layer. For example, conductive By connecting layer 5433 and conductive layer 5434, conductive layer 5422 and conductive layer 543 It is possible to connect 0 via a third conductive layer (conductive layer 5433 and conductive layer 5434). It will become.

[0419] Furthermore, the capacitive element 5442 is connected to the conductive layer 5422 and the conductive layer 5434 by the conductive layer 543 Because the structure involves sandwiching element 1, the capacitance value of the capacitive element 5442 can be increased. Furthermore, it is not limited to this, and one of the conductive layers 5422 and 5434 may be omitted. It is Noh.

[0420] After removing the resist mask by wet etching, the process is carried out under an atmospheric or nitrogen atmosphere. It is possible to perform heat treatment at temperatures between 200°C and 600°C below.

[0421] Through the above process, the transistor 5441 and the capacitive element 5442 can be manufactured. .

[0422] Furthermore, as shown in Figure 37(D), an insulating layer 5435 is formed on the oxide semiconductor layer 5425. It is possible to do so. The insulating layer 5435 is acid when the second conductive layer is patterned. It has the function of preventing the crystalline semiconductor layer 5425 from being eroded and functions as a stop film. Therefore, the thickness of the oxide semiconductor layer 5425 can be reduced, so the transistor Reduced drive voltage, reduced off-current, improved drain current on / off ratio, or improved S value. This can be achieved. Furthermore, the insulating layer 5435 is made continuous with the oxide semiconductor layer and the insulating layer. The entire surface is formed, and then the resin is formed by a photolithography process using a photomask. By selectively patterning the insulating layer using a dystomask, This can be done. Subsequently, a second conductive layer is formed over the entire surface, and simultaneously with the second conductive layer, an oxide semiconductor layer is formed. Patterning is performed. In other words, using the same mask (reticle), the oxide semiconductor layer and the second It becomes possible to pattern the conductive layer. In this case, an acid must be placed beneath the second conductive layer. This results in the formation of a synthetic semiconductor. In this way, without increasing the number of steps, the insulating layer 543 5 can be formed. In such a manufacturing process, an oxide semiconductor is formed beneath the second conductive layer. In many cases, a body layer is formed. However, this is not limited to this, and an oxide semiconductor layer is patterned After that, an insulating layer is formed over the entire surface, and the insulating layer is patterned to provide insulation. It is possible to form layer 5435.

[0423] In Figure 37(D), the capacitive element 5442 is composed of conductive layer 5422 and conductive layer 5431. This structure sandwiches the insulating layer 5423 and the oxide semiconductor layer 5436. However, The oxide semiconductor layer 5436 can be omitted. And the conductive layer 5430 and the conductive layer 5431 is connected via a conductive layer 5437 formed by patterning the third conductive layer. Such a structure can be used, for example, in the pixels of a liquid crystal display device. For example, transistor 5441 functions as a switching transistor and has capacitance. Element 5442 can function as a retaining capacitance. And the conductive layer 5421, The electrolytic layer 5422, conductive layer 5429, and conductive layer 5437 are the gate wire, capacitance wire, and source wire, respectively. It can function as a pixel electrode. However, it is not limited to this. See Figure 3. Similar to 7(D), in Figure 37(C), the conductive layer 5430 and the conductive layer 5431 are also connected to the third It is possible to connect them via a conductive layer.

[0424] Furthermore, as shown in Figure 37(E), after patterning the second conductive layer, the oxide semiconductor layer It is possible to form 5425. By doing so, the second conductive layer becomes patterned If this occurs, the oxide semiconductor layer 5425 is not formed, so the oxide semiconductor layer 542 5 is not removed. Therefore, the thickness of the oxide semiconductor layer 5425 can be reduced. Therefore, the transistor's drive voltage is reduced, the off-current is reduced, and the on-off ratio of the drain current is reduced. Improvements, or improvements in the S value, can be achieved. Note that the oxide semiconductor layer 5425 is the second After the conductive layer is patterned, an oxide semiconductor layer 5425 is formed over the entire surface, and then F Selection is performed using a resist mask formed by a photolithography process using an automask. It can be formed by patterning an oxide semiconductor layer 5425.

[0425] In Figure 37(E), the capacitive element 5442 is composed of a conductive layer 5422 and a third conductive layer. The insulating layer 5423 and insulating layer 5432 are formed by turning and the conductive layer 5439. The structure is such that the two are sandwiched together. And the conductive layer 5422 and the conductive layer 5430 are connected to the third conductive layer It is connected via a conductive layer 5438 formed by patterning. Furthermore, conductive layer 543 9 is connected to the conductive layer 5440 formed by patterning the second conductive layer. Similar to 37(E), in Figures 37(C) and (D), conductive layer 5430 and conductive layer 54 22 can be connected via the conductive layer 5438.

[0426] Furthermore, the thickness of the oxide semiconductor layer (or channel layer) is the depletion layer when the transistor is off. By reducing the thickness to below a certain level, it becomes possible to create a state of complete depletion. This allows for a reduction in off-current. To achieve this, the oxide semiconductor layer 5425 The film thickness is preferably 20 nm or less. More preferably 10 nm or less. Preferably, the wavelength is 6 nm or less.

[0427] Furthermore, the operating voltage of the transistor is reduced, the off-current is reduced, and the on-off ratio of the drain current is improved. In order to improve the S value and other aspects, the thickness of the oxide semiconductor layer is the thickness of the layer that makes up the transistor. Among them, the thinnest is preferable. For example, the film thickness of the oxide semiconductor layer is less than that of the insulating layer 5423. It is preferable that it be as thin as possible. More preferably, the thickness of the oxide semiconductor layer is equal to that of the insulating layer 5423. It is preferable that it be 1 / 2 or less. More preferably, it is preferable that it be 1 / 5 or less. More preferably, it is preferable that it be 1 / 10 or less. However, it is not limited to this, To improve reliability, the thickness of the oxide semiconductor layer can be thicker than that of the insulating layer 5423. It is possible. In particular, when the oxide semiconductor layer is removed, as shown in Figure 37(C), the oxide semiconductor layer Since a thicker conductive layer is preferable, the thickness of the oxide semiconductor layer is greater than that of the insulating layer 5423. It is also possible to make it thicker.

[0428] Furthermore, in order to increase the dielectric strength of the transistor, the thickness of the insulating layer 5423 is the same as that of the first conductive layer. It is preferable that the thickness of the insulating layer 5423 is greater than the thickness of the first conductive layer. It is preferable that the layer is 5 / 4 or more. More preferably, it is preferable that it is 4 / 3 or more. However, this is not the only way to increase the mobility of the transistor, insulating layer 54 The film thickness of layer 23 can be thinner than that of the first conductive layer.

[0429] Note that the substrate, insulating layer, conductive layer, and semiconductor layer in this embodiment are different from those in other embodiments. The materials described herein, or similar materials, may be used.

[0430] The transistor of this embodiment is used in the semiconductor devices of Embodiments 1 to 8, and the shift resistor Alternatively, by using it in a display device, the display area can be enlarged. The image can be rendered in high definition.

[0431] (Embodiment 11) In this embodiment, the layout diagram of the shift register (hereinafter also referred to as the top view) will be described. To clarify, in this embodiment, as an example, the shift register layer described in Embodiment 4 The diagram will now be explained. Note that the contents described in this embodiment are described in Embodiment 4. In addition to the shift register described, the semiconductor devices and shift registers of Embodiments 1 to 7 are also mentioned. It can be applied to a station or display device. The layout diagram of this embodiment is This is just one example, and not an exhaustive list.

[0432] The layout diagram of this embodiment will be described with reference to Figure 38. Figure 38 shows an example and Next, the layout diagram is shown in Figure 5(A). Note that the hatching pattern is shown on the right side of Figure 38. This is the hatching pattern of the constituent elements of the code attached to each hatching pattern. This indicates that.

[0433] The transistor or wiring shown in Figure 38 consists of a conductive layer 701, a semiconductor layer 702, and a conductive layer 7 It is composed of 03, a conductive layer 704, and a contact hole 705. However, this It is possible to form other conductive layers, insulating films, or other contact holes, without limitation. For example, a contact hole is added to connect conductive layer 701 and conductive layer 703. It is possible to do so.

[0434] The conductive layer 701 may include portions that function as gate electrodes or wiring. The conductive layer 702 may include a portion that functions as a semiconductor layer of the transistor. The conductive layer 703 may include portions that function as wiring, source electrodes, or drain electrodes. It is possible. The conductive layer 704 functions as a light-transmitting electrode, pixel electrode, or wiring. It is possible to include a portion. The contact hole 705 is connected to the conductive layer 701 and the conductive layer 704 It has the function of connecting the two, or the function of connecting the conductive layer 703 and the conductive layer 704.

[0435] In this embodiment, transistor 101_1, transistor 101_2, transistor 2 01_1, and / or transistor 202_2, which has the function of a second terminal The area where conductive layer 703 and conductive layer 701 overlap is a conductive layer that functions as a first terminal. It is preferable that the overlapping area of ​​layer 703 and the conductive layer 701 is smaller than the overlapping area. Therefore, the concentration of the electric field at the second terminal can be suppressed, thus preventing transistor degradation, and This can suppress transistor breakdown. However, it is not limited to this, and the second terminal can also be used. The area where the conductive layer 703, which has the function of the first terminal, and the conductive layer 701 overlap is the area where the first terminal has the function of the first terminal. It is possible to have a larger overlapping area than the conductive layer 703 and the conductive layer 701. .

[0436] Furthermore, a semiconductor layer 702 is formed in the portion where the conductive layer 701 and the conductive layer 703 overlap. This is possible. By doing so, the parasitic capacitance between the conductive layer 701 and the conductive layer 703 can be reduced. Because it can be made smaller, noise can be reduced. For the same reason, conductive layer A semiconductor layer 702 can be formed in the area where 703 and the conductive layer 704 overlap. .

[0437] Furthermore, a conductive layer 704 is formed on a part of the conductive layer 701, and the conductive layer 701 is contact It is possible to connect to the conductive layer 704 via the tohole 705. This can reduce the wiring resistance. Alternatively, a conductive layer 703 can be placed on top of a part of the conductive layer 701. and a conductive layer 704 is formed, and the conductive layer 701 is through the contact hole 705 The conductive layer 704 is connected to the conductive layer 703 via another contact hole 705. It is possible to connect to the conductive layer 704. By doing so, the wiring resistance is reduced. It is possible.

[0438] Furthermore, a conductive layer 704 is formed on a part of the conductive layer 703, and the conductive layer 703 is contact It is possible to connect to the conductive layer 704 via the tohole 705. This can reduce wiring resistance.

[0439] Furthermore, a conductive layer 701 or a conductive layer 703 is formed beneath a portion of the conductive layer 704, and the conductive layer 704, through the contact hole 705, connects to the conductive layer 701 or the conductive layer 703 It is possible to connect them in this way. By doing so, the wiring resistance can be reduced. .

[0440] As already mentioned, the parasitic capsule between the gate and the first terminal of transistor 101_1 Rather than quantity, increase the parasitic capacitance between the gate and the second terminal of transistor 101_1. This is possible. As shown in Figure 38, it functions as the first terminal of transistor 101_1. The width of the conductive layer 703 that can be used is shown as width 731, and the second terminal of transistor 101_1 The width of the conductive layer 703 capable of functioning as such is indicated as width 732. And the width 731 is, It is possible to have a width greater than 732. By doing so, transistor 101_ The parasitic capacitance between the gate and the first terminal of transistor 1 is greater than the parasitic capacitance between the gate and the second terminal of transistor 101_1. It is possible to increase the parasitic capacitance between the terminal and the circuit. However, this is not limited to this.

[0441] As already mentioned, the parasitic capsule between the gate and the first terminal of transistor 101_2 Rather than focusing on quantity, increase the parasitic capacitance between the gate and the second terminal of transistor 101_2. This is possible. As shown in Figure 38, it functions as the first terminal of transistor 101_2. The width of the conductive layer 703 that can be used is shown as width 741, and the second terminal of transistor 101_2 The width of the conductive layer 703 capable of functioning as such is indicated as width 742. And width 741 is, It is possible to have a width greater than 742. By doing so, transistor 101_ The parasitic capacitance between the gate and the first terminal of transistor 101_2 is greater than the parasitic capacitance between the gate and the second terminal of transistor 101_2. It is possible to increase the parasitic capacitance between the terminal and the circuit. However, this is not limited to this.

[0442] (Embodiment 12) In this embodiment, an example of an electronic device will be described.

[0443] Figures 39(A) to 39(H) and 40(A) to 40(D) ​​are diagrams showing electronic devices. Yes, these electronic devices consist of a casing 5000, a display unit 5001, a speaker 5003, and an LED. Lamp 5004, operation key 5005 (operation switch or power switch that controls the operation of the display device) (Including switches), connection terminal 5006, sensor 5007 (force, displacement, position, velocity, acceleration) Angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, electric Functions to measure flow, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation. It may include (and other) a microphone 5008, etc.

[0444] Figure 39(A) shows a mobile computer, and in addition to the above, it includes switch 5009, It may have an infrared port 5010, etc. Figure 39(B) shows a portable device equipped with a recording medium. This is a type of image playback device (for example, a DVD player), and in addition to the above, a second display It may have a section 5002, a recording medium reading section 5011, etc. Figure 39(C) is a goggle. It is a type display, and in addition to the above, it has a second display unit 5002, a support unit 5012, It may have earphones 5013, etc. Figure 39(D) is a portable gaming machine, as described above. In addition to the above, it may also have a recording medium reading unit 5011, etc. Figure 39(E) is It is a projector and, in addition to the above-mentioned components, includes a light source 5033, a projection lens 5034, etc. This is possible. Figure 39(F) is a portable gaming machine, and in addition to the above, a second display unit It may have 5002, a recording medium reading unit 5011, etc. Figure 39(G) is a television receiver. It is an image device, and in addition to the above-mentioned components, it may also have a tuner, an image processing unit, etc. (Figure) 39(H) is a portable television receiver, and in addition to the above, it is capable of transmitting and receiving signals. It may have a charger 5017, etc. Figure 40(A) is a display, and the above In addition to the above, it may have a support base 5018, etc. Figure 40(B) is a camera. In addition to the above, there is an external connection port 5019, a shutter button 5015, and an image receiving unit. 5016, etc. may be included. Figure 40(C) is a computer, as described above. In addition, there is a pointing device 5020, an external connection port 5019, and a reader / writer 5 021, etc. may be included. Figure 40(D) ​​is a mobile phone, and in addition to the above, Antenna 5014, for 1-segment partial reception service for mobile phones and mobile terminals. It may have, etc.

[0445] The electronic devices shown in Figures 39(A) to 39(H) and Figures 40(A) to 40(D) ​​are various It can have various functions. For example, various types of information (still images, videos, text images, etc.) Functions that display information on the display unit, touch panel function, calendar, date or time display, etc. Functions, functions that control processing through various software (programs), wireless communication functions, The ability to connect to various computer networks using wireless communication functions, and wireless communication functions Functions that use to transmit or receive various data, programs recorded on recording media, or It can have functions such as reading data and displaying it on the display unit. Furthermore, multiple In electronic devices having a display unit, one display unit is primarily used to display image information, and another... A function that primarily displays text information on one display unit, or displays images that take parallax into account on multiple display units. It can have functions such as displaying a three-dimensional image by displaying an image. Furthermore, it can receive Electronic devices having an image unit include functions for capturing still images, functions for capturing videos, and capturing Functions to automatically or manually correct the captured image, and the recording medium (external or built into the camera) for the captured image. It can have functions such as saving to a (device), displaying the captured image on the display unit, etc. Oh, the electronic equipment shown in Figures 39(A) to 39(H) and 40(A) to 40(D) The functions that can be performed are not limited to these, and it can have a variety of functions.

[0446] The electronic device described in this embodiment has a display unit for displaying some kind of information. This embodiment is characterized by the electronic device of this embodiment and the semiconductor device of Embodiments 1 to 9. By combining it with a shift register or display device, reliability and yield can be improved. This allows for improvements in performance, cost reduction, larger display area, and higher resolution display area. .

[0447] Next, we will explain some application examples of semiconductor devices.

[0448] Figure 40(E) shows an example of a semiconductor device being installed as an integral part of a building. ) consists of a housing 5022, a display unit 5023, a remote control device 5024 which is the operating unit, and a speaker 5 Includes 025, etc. The semiconductor equipment is wall-mounted and integrated with the building, and the installation space It can be installed without requiring a large space.

[0449] Figure 40(F) shows another example in which semiconductor equipment is installed within a building and integrated with the building itself. The display panel 5026 is installed together with the unit bath 5027, and the bather This allows viewing of the display panel 5026.

[0450] In this embodiment, walls and a unit bathroom were used as examples of buildings, but the actual form The configuration is not limited to this, and semiconductor devices can be installed in various types of buildings.

[0451] Next, we will show an example in which a semiconductor device is integrated with a mobile device.

[0452] Figure 40(G) shows an example of a semiconductor device installed in an automobile. (Display panel) 5028 is attached to the vehicle body 5029 and is controlled by the movement of the vehicle body or from inside or outside the vehicle body The system can display the entered information on demand. It also includes a navigation function. It's okay to do so.

[0453] Figure 40(H) shows an example of a semiconductor device being integrated with a passenger aircraft. Yes. Figure 40(H) shows a display panel 5031 on the ceiling 5030 above the seats of a passenger airplane. This diagram shows the shape of the unit when installed and in use. The display panel 5031 is located on the ceiling 50 30 is attached integrally with the hinge portion 5032, and the extension and retraction of the hinge portion 5032 Passengers will be able to view the display panel 5031. The display panel 5031 can be operated by passengers. It has the function of displaying information by doing so.

[0454] In this embodiment, examples of mobile bodies include automobile bodies and aircraft fuselages. However, this is not limited to motorcycles, four-wheeled vehicles (including automobiles, buses, etc.), and trains (monorails). It can be installed on various things, including railroads, railways, ships, etc. [Explanation of Symbols]

[0455] 10 circuits 11_1 Switch 11_2 Switch 11 switches 21 routes 100 circuits 101 Transistors 101pF transistor 101a diode 102 transistors 102pF transistor 111 Wiring 112 Wiring 111A Wiring 112A wiring 112B Wiring 114A Wiring 114B Wiring 117A wiring 117B Wiring 117C Wiring 117D Wiring 117E Wiring 117F Wiring 117G wiring 117H Wiring 117I Wiring 117J Wiring 117K wiring 301a diode 301pF transistor 3020 pixels 3021 Transistor 3022 liquid crystal element 3023 Capacitive element 302a diode 302pF transistor 111 Wiring 112 Wiring 113 Wiring 114 Wiring 115 Wiring 116 Wiring 117 Wiring 118 Wiring 120 circuits 121 Capacitive elements 122 transistors 200 circuits 201 Transistors 202 transistors 203 Transistors 211 Wiring 300 circuits 301 Transistors 302 Transistors 303 Transistors 303a diode 303pF transistor 304 transistors 304a diode 304pF transistor 310 circuits 311 transistors 312 transistors 313 Transistors 314 transistors 315 Capacitive element 316 transistors 320 circuits 321 Transistors 322 transistors 323 Transistors 324 transistors 325 Capacitive elements 326 transistors 330 circuits 331 transistors 332 transistors 333 transistors 334 transistors 335 transistors 336 transistors 342 transistors 344 transistors 500 Shift Registers 501 Flip-Flops 511 Wiring 512 Wiring 513 Wiring 514 Wiring 515 Wiring 516 Wiring 517 Wiring 518 Wiring 520 circuits 521 Circuits 522 circuits 600 circuits 601 Circuit 602 Circuit 603 Transistor 604 Wiring 605 Wiring 614 signal 615 Signal 701 Conductive layer 702 Semiconductor layer 703 Conductive layer 704 Conductive layer 705 Contact Hole 731 width 732 width 741 width 742 width 3031 Wiring 3032 Wiring 3033 Wiring 3034 Electrode 3041 Signal 3042 signal 3043 Voltage 5000 cabinets 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation Keys 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared Port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Support stand 5019 External connection port 5020 Pointing Device 5021 Leader / Writer 5022 enclosure 5023 Display section 5024 Remote control device 5025 Speaker 5026 Display Panel 5027 Unit Bathroom 5028 Display Panel 5029 Car body 5030 Ceiling 5031 Display Panel 5032 Hinge section 5033 Light source 5034 Projection Lens 5260 circuit board 5261 Insulating layer 5262 Semiconductor layer 5263 Insulating layer 5264 Conductive layer 5265 Insulating layer 5266 Conductive layer 5267 Insulating layer 5268 Conductive layer 5269 Insulating layer 5270 Emitting layer 5271 Conductive layer 5273 Insulating layer 5300 circuit boards 5301 Conductive layer 5302 Insulating layer 5304 Conductive layer 5305 Insulating layer 5306 Conductive layer 5307 Liquid crystal layer 5308 Conductive layer 5350 area 5351 area 5352 Semiconductor substrate 5353 area 5354 Insulating layer 5355 area 5356 Insulating layer 5357 Conductive layer 5358 Insulating layer 5359 Conductive layer 5360 Video signal 5361 Circuit 5362 Circuit 5363 Circuit 5364 pixel section 5365 Circuit 5366 Lighting device 5367 pixels 5371 Wiring 5372 Wiring 5373 Wiring 5380 circuit board 5381 Input terminal 5391 circuit board 5392 Drive Circuit 5393 pixel section 5400 circuit boards 5401 Conductive layer 5402 Insulating layer 5404 Conductive layer 5405 Insulating layer 5406 Conductive layer 5407 Liquid crystal layer 5408 Insulating layer 5409 Conductive layer 5410 circuit board 5420 circuit board 5421 Conductive layer 5422 Conductive layer 5423 Insulating layer 5424 Contact Hole 5425 Oxide semiconductor layer 5429 Conductive layer 5430 Conductive layer 5431 Conductive layer 5432 Insulating layer 5433 Conductive layer 5434 Conductive layer 5435 Insulating layer 5436 Oxide semiconductor layer 5437 Conductive layer 5438 Conductive layer 5439 Conductive layer 5440 Conductive layer 5441 Transistor 5442 Capacitive element 3020A subpixel 3020B subpixels 3021A Transistor 3021B Transistor 3022A Liquid Crystal Element 3022B Liquid Crystal Element 3023A Capacitive element 3023B Capacitive element 3031A Wiring 3031B Wiring 3032A Wiring 3032B Wiring 5262a area 5262b area 5262c area 5262d area 5262e area 5303a Semiconductor layer 5303b Semiconductor layer 5361a Circuit 5361b circuit 5362a Circuit 5362b circuit 5403a Semiconductor layer 5403b Semiconductor layer

Claims

1. A gate driver comprising a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. Semiconductor equipment.

2. The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. Semiconductor equipment.

3. The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, also functions as the gate electrode of the fourth transistor. Semiconductor equipment.

4. The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. The third conductive film functions as the gate electrode of the fourth transistor. Semiconductor equipment.

5. A gate driver comprising a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. Semiconductor equipment.

6. A gate driver comprising a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, also functions as the gate electrode of the fourth transistor. Semiconductor equipment.

7. A gate driver comprising a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. Semiconductor equipment.

8. A gate driver comprising a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. The third conductive film functions as the gate electrode of the fourth transistor. Semiconductor equipment.

9. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The fifth transistor has an oxide semiconductor film, Display device.

10. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. The fifth transistor has an oxide semiconductor film, Display device.

11. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, also functions as the gate electrode of the fourth transistor. The fifth transistor has an oxide semiconductor film, Display device.

12. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, also functions as either the source electrode or the drain electrode of the second transistor. The first conductive film has a region that overlaps with the second conductive film which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. The third conductive film functions as the gate electrode of the fourth transistor. The fifth transistor has an oxide semiconductor film, Display device.

13. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The fifth transistor has an oxide semiconductor film, Display device.

14. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, also functions as the gate electrode of the fourth transistor. The fifth transistor has an oxide semiconductor film, Display device.

15. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. The fifth transistor has an oxide semiconductor film, Display device.

16. Having a pixel and a gate driver, The gate driver comprises a first transistor to a fourth transistor, a first wiring to a fourth wiring, a first signal line and a second signal line. The aforementioned pixel has a fifth transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the first transistor is electrically connected to the first signal line. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or the other drain electrode of the second transistor is electrically connected to the second signal line. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the second wiring. The gate electrode of the third transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the third wiring. The gate electrode of the fourth transistor is electrically connected to the fourth wiring. The first conductive film, which functions as either the source electrode or the drain electrode of the first transistor, has a region that overlaps with the second conductive film, which functions as the gate electrode of the second transistor. The third conductive film, which functions as the gate electrode of the third transistor, has a region that overlaps with the fourth conductive film, which functions as the other of the source electrode or drain electrode of the third transistor. The third conductive film functions as the gate electrode of the fourth transistor. The fifth transistor has an oxide semiconductor film, Display device.

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