Photoelectric conversion devices and equipment

Abstract

To provide a technique capable of achieving both a reduction in power consumption of pixel read circuits and a high saturation charge amount of photoelectric conversion units.SOLUTION: A photoelectric conversion apparatus includes: a first component including a first semiconductor substrate having a first surface and a second surface opposite the first surface, a photoelectric conversion unit configured to receive light from the second surface, a first semiconductor region, and a transfer transistor including a transfer gate disposed on a side of the first surface and configured to transfer a signal charge from the photoelectric conversion unit to the first semiconductor region; and a second component stacked on the first component and including a second semiconductor substrate having a third surface and a fourth surface opposite the third surface, an amplifier transistor including a gate connected to the first semiconductor region and disposed on a side of the third surface, and a reset transistor configured to reset the gate. A difference between a voltage to be applied to the transfer gate during a period of the transfer of the signal charge from the photoelectric conversion unit to the first semiconductor region and a reference voltage is greater than a difference between a power supply voltage to be applied to a main node of the reset transistor and the reference voltage.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a photoelectric conversion device and an apparatus. Background Art

[0002] In order to achieve further higher density of pixels included in a photoelectric conversion device, Patent Document 1 discloses disposing a photoelectric conversion unit included in a pixel on a first semiconductor substrate, and disposing a pixel circuit included in the pixel on a second semiconductor substrate. Patent Document 1 describes stacking the first semiconductor substrate and the second semiconductor substrate. Patent Document 1 also describes that the film thickness of a gate insulating film of a transfer transistor provided on the first semiconductor substrate is made different from the film thickness of a gate insulating film of an amplification transistor provided on the second semiconductor substrate. Prior Art Documents Patent Documents

[0003] Patent Document 1 International Publication No. 2019 / 130702 Pamphlet Summary of the Invention Problems to be Solved by the Invention

[0004] In the technology described in Patent Document 1, there is room for study on achieving both reduction in power consumption of a pixel readout circuit and a large saturation charge amount of a photoelectric conversion unit.

[0005] The present disclosure relates to a technology that achieves both reduction in power consumption of a pixel readout circuit and a large saturation charge amount of a photoelectric conversion unit. Means for Solving the Problems

[0006] One aspect of the present disclosure is a photoelectric conversion device comprising: a first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first component having a first semiconductor region and a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; and a second component stacked on the first component, having a second semiconductor substrate having a third surface and a fourth surface facing the third surface, an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface, and a reset transistor for resetting the gate, wherein the difference between the voltage applied to the transfer gate during the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region and the reference voltage is greater than the difference between the power supply voltage applied to the main node of the reset transistor and the reference voltage.

[0007] Another embodiment is a photoelectric conversion device comprising: a first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first component having a first semiconductor region and a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; and a second component stacked on the first component, having a second semiconductor substrate having a third surface and a fourth surface facing the third surface; an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface; and a reset transistor for resetting the gate, wherein a first power supply voltage is applied to the main node of the reset transistor and a second power supply voltage is applied to the main node of the amplifying transistor, and the difference between the voltage applied to the transfer gate and a reference voltage during the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region is greater in amplitude than at least one of the difference between the first power supply voltage and the reference voltage and the difference between the second power supply voltage and the reference voltage. [Effects of the Invention]

[0008] This disclosure provides a technology that achieves both reduced power consumption in the pixel readout circuit and a saturation charge amount in the photoelectric conversion section. [Brief explanation of the drawing]

[0009] [Figure 1] Diagram showing the configuration of a photoelectric converter. [Figure 2] Diagram showing the configuration of the sensor unit and the readout circuit. [Figure 3] Cross-sectional view of a photoelectric converter [Figure 4] Plan view of a photoelectric converter [Figure 5] Cross-sectional view of a photoelectric converter [Figure 6] Potential diagram of a photoelectric converter [Figure 7] Potential diagram of a photoelectric converter [Figure 8] Cross-sectional view of a photoelectric converter [Figure 9] Plan view of a photoelectric converter [Figure 10] Cross-sectional view of a photoelectric converter [Figure 11] Diagram showing the configuration of the equipment [Modes for carrying out the invention]

[0010] The embodiments will be described below with reference to the drawings.

[0011] In the embodiments described below, the imaging device will be the primary focus as an example of a photoelectric conversion device. However, each embodiment is not limited to an imaging device and can be applied to other examples of photoelectric conversion devices. Examples include distance measuring devices (devices for distance measurement using focus detection or TOF (Time of Flight)) and photometric devices (devices for measuring the amount of incident light).

[0012] Furthermore, the semiconductor regions, conductivity types of wells, and implanted dopants described in the embodiments set forth below are merely examples, and are not limited to only the conductivity types and dopants described in the embodiments. The conductivity types and dopants described in the embodiments can be modified as appropriate, and the potentials of the semiconductor regions and wells are accordingly modified as appropriate in accordance with such modifications.

[0013] Note that the conductivity types of transistors described in the embodiments set forth below are merely examples, and are not limited to only the conductivity types described in the examples. The conductivity type can be modified as appropriate with respect to the conductivity type described in the embodiments, and the potentials of the gate, source, and drain of the transistor are accordingly modified as appropriate in accordance with such modification.

[0014] For example, in the case of a transistor operated as a switch, the low level and high level of the potential supplied to the gate may be reversed relative to the description in the examples in accordance with a change in conductivity type. Furthermore, the conductivity types of semiconductor regions described in the examples set forth below are also merely examples, and are not limited to only the conductivity types described in the examples. The conductivity type can be modified as appropriate with respect to the conductivity type described in the examples, and the potential of the semiconductor region is accordingly modified as appropriate in accordance with such modification.

[0015] Furthermore, in the following embodiments, connections between circuit elements may be described. In such cases, even when another element is interposed between the elements of interest, unless specifically stated otherwise, the elements of interest are treated as being connected. For example, assume that element A is connected to one node of capacitive element C having a plurality of nodes, and element B is connected to the other node. Even in such a case, unless specifically stated otherwise, elements A and B are treated as being connected.

[0016] Metal members such as wiring and pads described in the present specification may be formed of a single metal of one element, or may be a mixture (alloy). For example, the wiring described as copper wiring may be formed of a single copper body, or may be configured to mainly contain copper and further contain other components. Further, for example, a pad connected to an external terminal may be formed of a single aluminum body, or may be configured to mainly contain aluminum and further contain other components. The copper wiring and aluminum pads shown here are merely examples, and can be changed to various metals.

[0017] Further, the wiring and pads shown here are examples of metal members used in a photoelectric conversion device, and can also be applied to other metal members.

[0018] <First Embodiment> Hereinafter, embodiments will be described with reference to the drawings.

[0019] FIG. 1 shows an example of a schematic configuration of an imaging device 1 (an example of the above-described photoelectric conversion device) according to an embodiment of the present disclosure. The imaging device 1 includes three substrates (a first component 10, a second component 20, and a third component 30). The imaging device 1 is an imaging device having a three-dimensional structure configured by bonding three components (the first component 10, the second component 20, and the third component 30) together. The first component 10, the second component 20, and the third component 30 are stacked in this order.

[0020] The first component 10 has a plurality of sensor units 12 that perform photoelectric conversion. The semiconductor substrate 14 corresponds to one specific example of the "first semiconductor substrate" of this disclosure. The plurality of sensor units 12 are arranged in a matrix within the pixel region 13 of the first component 10. The second component 20 has a semiconductor substrate 21, with one readout circuit 22 for every four sensor units 12 that outputs a pixel signal based on the charge output from the sensor units 12. The semiconductor substrate 21 corresponds to one specific example of the "second semiconductor substrate" of this disclosure. The second component 20 has a plurality of pixel drive lines 24 extending in the row direction and a plurality of pixel output lines 25 extending in the column direction. The third component 30 has a semiconductor substrate 31, with a logic circuit 32 that processes the pixel signal. The semiconductor substrate 31 corresponds to one specific example of the "third semiconductor substrate" of this disclosure. The logic circuit 32 includes, for example, a vertical scanning circuit 42, a column signal processing circuit 34, a horizontal scanning circuit 35, and a control circuit 36. The logic circuit 32 (specifically the horizontal scanning circuit 35) outputs the output voltage Vout for each sensor unit 12 to the outside. In the logic circuit 32, for example, a low-resistance region made of silicide formed using a salicide (Self Aligned Silicide) process such as CoSi2 or NiSi may be formed on the surface of the impurity diffusion region that is in contact with the source electrode and the drain electrode.

[0021] The vertical scanning circuit 42, for example, sequentially selects a plurality of sensor units 12 row by row. The column signal processing circuit 34, for example, applies correlated double sampling (CDS) processing to the pixel signals output from each sensor unit 12 in the row selected by the vertical scanning circuit 42. The column signal processing circuit 34, for example, extracts the signal level of the pixel signals by applying CDS processing and holds pixel data corresponding to the amount of light received by each sensor unit 12. The horizontal scanning circuit 35, for example, sequentially outputs the pixel data held by the column signal processing circuit 34 to the outside. The control circuit 36, for example, controls the driving of each block in the logic circuit 32 (vertical scanning circuit 42, column signal processing circuit 34, and horizontal scanning circuit 35).

[0022] The vertical scanning circuit 42 sequentially selects, for example, multiple sensor units 12 row by row. The column signal processing circuit 34 performs, for example, correlated double sampling (CDS) on the pixel signals output from each sensor unit 12 in the row selected by the vertical scanning circuit 42. The column signal processing circuit 34 extracts the signal level of the pixel signals by performing CDS processing and holds pixel data corresponding to the amount of light received by each sensor unit 12. The column signal processing circuit 34 may also have an AD conversion unit that converts the signal (analog signal) output by the amplification transistor AMP into a digital signal. The horizontal scanning circuit 35 sequentially outputs the pixel data held by the column signal processing circuit 34 to the outside. The control circuit 36 ​​controls the driving of each block in the logic circuit 32 (vertical scanning circuit 42, column signal processing circuit 34, and horizontal scanning circuit 35).

[0023] Figure 2 shows an example of the configuration of the sensor unit 12. It represents an example of the sensor unit 12 and the readout circuit 22. Below, we will explain the case where four sensor units 12_a to d share one readout circuit 22, as shown in Figure 2. Here, "sharing" means that the outputs of the four sensor units 12_a to d are input to a common readout circuit 22. In the following, when describing common matters for sensor units 12_a to d, they will be collectively referred to as sensor unit 12.

[0024] Each sensor unit 12 has common components with respect to the others.

[0025] Each sensor unit 12 includes, for example, a photodiode PD, a transfer transistor TR electrically connected to the photodiode PD, and a first FD node FD1 which is part of a floating diffusion (FD). The photodiode and transfer gate components in each sensor unit 12 are denoted by a to d at the end of their respective symbols. The readout circuit 22 has a second FD node FD2 which is another part of the floating diffusion FD that temporarily holds the charge output from the photodiode PD via the transfer transistor TR. The four first FD nodes FD1_a to d are connected to one second FD node FD2. The second FD node FD2 is the input node of the amplification transistor AMP. The photodiode PD corresponds to one specific example of the "photoelectric conversion element" of this disclosure. The photodiode PD performs photoelectric conversion to generate a charge corresponding to the amount of light received. The cathode of the photodiode PD is electrically connected to the source of the transfer transistor TR, and the anode of the photodiode PD is given a potential that is given to the well region. That is, it is electrically connected to a power line (e.g., ground potential). Furthermore, the photodiode PD is located inside the well region connected to this power line. The drain of the transfer transistor TR is electrically connected to the floating diffusion FD, and the gate of the transfer transistor TR is electrically connected to the pixel drive line 24. The transfer transistor TR is, for example, a CMOS (Complementary Metal Oxide Semiconductor) transistor.

[0026] The floating diffusion FDs of each sensor unit 12 that share a single readout circuit 22 are electrically connected to each other and are also electrically connected to the input terminal of the common readout circuit 22. The readout circuit 22 includes, for example, a reset transistor RES, a selection transistor SEL, and an amplification transistor AMP. The selection transistor SEL may be omitted if necessary. The source of the reset transistor RES (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion FD. Alternatively, the source of the reset transistor RES (the input terminal of the readout circuit 22) is electrically connected to the gate of the amplification transistor AMP. The drain of the reset transistor RES is electrically connected to the power line (SVDD) and the drain of the amplification transistor AMP. The gate of the reset transistor RES is electrically connected to the pixel drive line 24 (see Figure 1). The source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RES. The source of the selection transistor SEL (the output terminal of the readout circuit 22) is electrically connected to the pixel output line 25, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 24 (see Figure 1).

[0027] When the transfer transistor TR is turned ON, it transfers the charge from the photodiode PD to the floating diffusion FD. The reset transistor RES resets the potential of the floating diffusion FD to a predetermined potential. When the reset transistor RES is turned ON, it resets the potential of the floating diffusion FD to the potential of the power line (SVDD). Alternatively, the reset transistor RES can be said to reset the gate potential of the amplification transistor AMP to a predetermined potential. This predetermined potential is typically the voltage obtained by subtracting the threshold voltage of the reset transistor RES from the power supply voltage SVDD. The selection transistor SEL controls the output timing of the pixel signal from the readout circuit 22. The amplification transistor AMP generates a signal with a voltage corresponding to the level of charge held in the floating diffusion FD as the pixel signal. The amplification transistor AMP constitutes a source follower type amplifier and outputs a pixel signal with a voltage corresponding to the level of charge generated in the photodiode PD. When the selection transistor SEL is turned on, the amplification transistor AMP amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to that potential to the column signal processing circuit 34 via the pixel output line 25. The reset transistor RES, amplification transistor AMP, and selection transistor SEL are, for example, CMOS transistors.

[0028] Each transfer transistor TR_a~d is supplied with control signals VTX_a~d from the vertical scanning circuit 42. The control signals VTX_a~d have at least two voltage levels. Here, the transfer transistors TR are assumed to be N-type MOS transistors. When a relatively high voltage control signal VTX is input, the transfer transistor TR turns on. This transfers the signal charge from the photodiode PD to the first FD node FD1. On the other hand, when a relatively low voltage control signal VTX is input, the transfer transistor TR turns off. This makes the photodiode PD and the first FD node FD1 non-conductive. Note that non-conductivity is not limited to the complete absence of current flow; for example, leakage current flow is included in the scope of non-conductivity. The amplitude of the control signal VTX can be considered as the difference between the voltage applied to the well region of the photodiode PD (typically the ground potential) and a reference voltage. In other words, the amplitude of the control signal VTX when the transfer transistor TR is turned on is expressed as the difference between the well potential of the photodiode PD and the relatively high voltage of the control signal VTX. On the other hand, the amplitude of the control signal VTX that turns off the transfer transistor TR is expressed as the difference between the well potential of the photodiode PD and the relatively low voltage of the control signal VTX. While the well potential of the photodiode PD was used as the reference voltage for this amplitude, another approach is possible. That is, the voltage of the control signal VTX that turns off the transfer transistor TR can also be considered as the reference voltage. In this case, the amplitude of the control signal VTX that turns on the transfer transistor TR is the difference between the voltage of the control signal VTX that turns on the transfer transistor TR and the voltage of the control signal VTX that turns off the transfer transistor TR.

[0029] In this explanation, the transfer transistor TR is assumed to be an N-type MOS transistor. As mentioned above, the conductivity type of the transistor can be changed as appropriate in this specification. Naturally, the transfer transistor TR can also be a P-type MOS transistor. When the transfer transistor TR is a P-type MOS transistor, the transfer transistor TR turns on when the control signal VTX is a relatively low voltage. On the other hand, the transfer transistor TR turns off when the control signal VTX is a relatively high voltage. In this case as well, when viewed as amplitude from the reference voltage, the relationship is the same as described above. That is, when the well potential of the photodiode PD (typically a positive voltage of about 3V) is viewed as the reference voltage, the amplitude of the control signal VTX that turns on the transfer transistor TR is larger than the amplitude of the control signal VTX that turns off the transfer transistor TR (difference from the reference voltage). The same is true when the reference voltage is the potential of the control signal TR when the transfer transistor TR is turned off. That is, the amplitude of the control signal VTX when the transfer transistor TR is turned on (difference from the reference voltage) is larger than the amplitude of the control signal VTX when the transfer transistor TR is turned off (difference from the reference voltage). Unless otherwise specified, amplitude will be described as the difference from the reference voltage.

[0030] In this embodiment, the amplitude of the control signal VTX used to turn on the transfer transistor TR is set to be greater than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. Assuming the transfer transistor TR is an N-type MOS transistor, the control signal VTX is set to 5V when the transfer transistor TR is turned on. On the other hand, the power supply voltage SVDD is set to 3V. In other words, when the well potential (ground potential) of the photodiode PD is used as the reference voltage, the amplitude of the control signal VTX used to turn on the transfer transistor TR is greater than that of the power supply voltage SVDD. Next, let's consider the case where the reference voltage is the voltage of the control signal VTX used to turn off the transfer transistor. The voltage of the control signal VTX used to turn off the transfer transistor is set to -1V. Even when this voltage is used as the reference voltage, the amplitude of the control signal VTX used to turn on the transfer transistor TR is greater than that of the power supply voltage SVDD. Note that while the voltage of the control signal VTX used to turn off the transfer transistor is set to -1V, other voltages such as ground potential may also be used. Furthermore, as mentioned above, even when the transfer transistor TR is a P-type MOS transistor, the control signal VTX used to turn on the transfer transistor TR has a larger amplitude than the power supply voltage SVDD.

[0031] Although the control signal VTX has been described here assuming it can take only two values, it is possible to allow it to take on a wider range of voltage values. For example, during the period when the photodiode PD is accumulating signal charge, it is possible to overflow the signal charge from the photodiode PD to the first FD node FD1. In this case, the control signal VTX may be adjusted between the on-level and off-level of the transfer transistor TR during that period.

[0032] Furthermore, it may be provided between the power line (SVDD) and the amplification transistor AMP. In this case, the drain of the reset transistor RES is electrically connected to the power line (SVDD) and the drain of the selection transistor SEL. The source of the selection transistor SEL is electrically connected to the drain of the amplification transistor AMP, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 24 (see Figure 1). The source of the amplification transistor AMP (the output terminal of the readout circuit 22) is electrically connected to the pixel output line 25, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RES. In addition, a transistor for changing the capacitance value of FD may be further provided in the electrical path between the reset transistor RES and the second FD node FD2.

[0033] Figure 3 is a cross-sectional view of the photoelectric converter of this embodiment. This cross-sectional view shows the cross-section of the line passing through the gates of the photodiode PD and transfer transistor TR in the first component 10, the second component 20, and the third component 30. The semiconductor region 101 is the photodiode PD. In other words, the semiconductor region 101 is a photoelectric conversion region that generates and stores signal charge (electrons in this embodiment) in response to incident light. The semiconductor region 101 is also an N-type impurity region. Figure 2 shows a configuration in which four sensor units 12 are connected to one amplification transistor AMP. In the cross-sectional view of Figure 3, two of the four sensor units 12 appear in one cross-section.

[0034] The transfer gate 111 of the transfer transistor TR controls the conduction between the semiconductor region 101 and the semiconductor region 121 (first semiconductor region), which is the region of the first FD node FD1. The semiconductor region 121 is an N-type semiconductor region. The pixel isolation section 201 is provided between the multiple semiconductor regions 101 and electrically isolates the multiple semiconductor regions 101. The pixel isolation section 201 may be composed of an insulating part such as silicon oxide, or it may be a semiconductor region that forms a potential barrier. Typically, it is a semiconductor region whose main carriers are charges of opposite polarity to the signal charge accumulated by the photodiode PD. A pixel isolation layer 211 is provided between the pixel isolation section 201 and the semiconductor region 101. The pixel isolation layer 211 plays a role in reducing dark current, especially when the pixel isolation section 201 is provided with an insulating part. The semiconductor region 121, which is the first FD node FD1, and the gate 141 of the amplification transistor AMP are connected via a conductor 205. The conductor 205 is mainly composed of metals such as tungsten and copper. The conductor 205 is formed by penetrating the insulator 251 that separates the semiconductor substrate 21. The insulator 251 electrically isolates the multiple readout circuits 22 from each other. The insulator 251 is also provided penetrating from the third surface to the fourth surface of the semiconductor substrate 21.

[0035] The semiconductor substrate 14 has a first surface F1 on the incident surface side and a second surface F2 opposite the first surface. The semiconductor region 221 is a P-type semiconductor region provided in the region of the semiconductor region 101 on the side of the first surface F1 (incident surface side). The fixed charge film 231 is provided on the first surface F1 of the semiconductor substrate 14. The semiconductor region 221 and the fixed charge film 231 reduce the dark current entering the semiconductor region 101.

[0036] The microlens ML guides light to the semiconductor region 101. A planarization layer 241 is provided between the microlens ML and the fixed charge film 231. Alternatively, a color filter may be provided in each of the multiple sensor units 12 to perform color separation.

[0037] The first component 100, the second component 200, and the third component 300 are stacked. The second component 200 is located between the first component 100 and the third component 300. A transistor 301 is provided on the semiconductor substrate 31 of the third component 300. The second component 20 and the third component 30 are electrically connected via a connector 311. The connector 311 is made of metal. Typically, the connector 311 mainly contains copper. In addition, the connector 311 is formed to further contain a barrier metal (titanium, nickel, etc.) to suppress the diffusion of copper.

[0038] Figure 4 is a diagram showing, in the photoelectric conversion device shown in Figures 2 and 3, a plan view of the second surface F2 of the first component 10 shown in Figure 3, as seen from the side of the second component 21, and a plan view of the second component 20 as seen from the side of the third component 30.

[0039] In Figure 4, components having the same function as those shown in Figures 2 and 3 are indicated by the same reference numerals as those shown in Figures 2 and 3. Each of the four semiconductor regions 101, which are photodiodes PD, is provided with one transfer gate 111_a to d. Two transfer gates 111_a and 111_c are provided opposite each other. Also, two transfer gates 111_b and 111_d are provided opposite each other. A semiconductor region 121, which is the first FD node FD1, is provided corresponding to each of the transfer gates 111_a to d.

[0040] Furthermore, a well contact 261 is provided in the well region of the semiconductor substrate 14 of the first component 10, which applies a predetermined potential (typically ground potential). The voltage applied to this well region is the voltage applied to the well region of the photodiode PD. The photodiode PD is located inside this well region.

[0041] The semiconductor substrate 21 of the second component 20 is provided with the gate 141 of an amplification transistor AMP and the gate 151 of a selection transistor SEL. It is also provided with the gate 131 of a reset transistor RES. Furthermore, a well contact is provided in the well region of the semiconductor substrate 21 of the second component 20 to apply a predetermined potential (typically ground potential).

[0042] Figure 5 is a cross-sectional view of the semiconductor substrate 14 of the first component 10 and the semiconductor substrate 21 of the second component 20. A gate insulating film G1 (first gate insulating film) is provided between the second surface F2 of the semiconductor substrate 14 and the transfer gate 111. The semiconductor substrate 21 also has a third surface F3 and a fourth surface F4 facing the third surface F3. A gate insulating film G2 (second gate insulating film) is provided between the third surface F3 of the semiconductor substrate 21 and the gate 141 of the amplification transistor AMP. Similarly, a gate insulating film G2 (second gate insulating film) is provided between the third surface F3 of the semiconductor substrate 21 and the gate of the reset transistor RES. Similarly, a gate insulating film G2 (second gate insulating film) is provided between the third surface F3 of the semiconductor substrate 21 and the gate of the selection transistor SEL.

[0043] Each of the gate insulating films G1 and G2 is typically a film mainly composed of silicon and oxygen, or a film mainly composed of silicon and nitrogen. In other words, each of the gate insulating films G1 and G2 can be a silicon oxide film, a silicon oxynitride film, or a silicon nitride film.

[0044] In this embodiment, the film thicknesses of gate insulating films G1 and G2 are made approximately equal to each other. The meaning of "approximately equal" is that variations in film thickness due to manufacturing variations are tolerated. The film thicknesses of these gate insulating films G1 and G2 are determined based on the gate breakdown voltage required for the transfer transistor TR.

[0045] In this embodiment, the amplitude of the control signal VTX used to turn on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. The effect of this will be explained.

[0046] Figure 6 shows the potential for the signal charge (electrons in this case) accumulated by the photodiode PD, with the horizontal axis representing the distance from the semiconductor region 121 and the vertical axis representing the potential.

[0047] Potential curve E1 is the curve when the power supply voltage SVDD is 5V. That is, the floating diffusion FD is reset at a voltage obtained by subtracting the threshold value of the reset transistor RES from 5V. The photodiode PD is also reset to a voltage corresponding to this reset voltage of the floating diffusion FD. On the other hand, potential curve E2 is the curve when the power supply voltage SVDD is 3V. That is, the floating diffusion FD is reset at a voltage obtained by subtracting the threshold value of the reset transistor RES from 3V. The photodiode PD is also reset to a voltage corresponding to this reset voltage of the floating diffusion FD. If the power supply voltage SVDD is lowered, the potential of the photodiode PD increases, and the potential curve becomes like E2. In addition, as the power supply voltage SVDD is lowered, the transfer characteristics of the transfer transistor TR deteriorate. For this reason, it is conceivable to further reduce the impurity concentration of the photodiode PD. In this case, the potential curve of the semiconductor region 101 increases further, becoming like curve E3.

[0048] As a result, lowering the power supply voltage SVDD reduces the saturation charge of the photodiode PD from the amount in the potential region P1 to the amount in the potential region P2. Therefore, the challenge lies in achieving both a lower power supply voltage and a sufficient saturation charge for the photodiode PD.

[0049] In this embodiment, the amplitude of the control signal VTX used to turn on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. The potential curve for this configuration is shown in Figure 7.

[0050] The potential region P1 is the same as in Figure 6. The potential curve according to this embodiment is shown as curve E4. The amplitude of the control signal VTX when turning on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the reset transistor RES. This ensures that the potential barrier below the transfer gate 111 is sufficient even when the power supply voltage SVDD is reduced. Therefore, even in the case of curve E4, there is a sufficient saturation charge amount as the potential region P3. In the configuration of Figure 7, the saturation charge amounts of potential region P1 and potential region P3 are at approximately the same level. As a result, the photoelectric converter of this embodiment can achieve both a low power supply voltage and a high saturation charge amount for the photodiode PD.

[0051] In this embodiment, the thickness of the gate insulating films G1 and G2 is set to be the same based on the gate breakdown voltage required for the transfer transistor TR. In other words, the thickness of the gate insulating film G1 of the transfer transistor TR and the thickness of the gate insulating film G2 of the transistors in the second component 20, namely the amplification transistor AMP, the reset transistor RES, and the selection transistor SEL, are set to be the same. This makes it possible to obtain sufficient gate breakdown voltage for the transistors in the second component 20 as well.

[0052] Furthermore, it is possible to have different thicknesses for the gate insulating films G1 and G2. The gate breakdown voltage of the amplification transistor AMP, reset transistor RES, and selection transistor SEL can be lower than that of the transfer transistor TX, which is supplied with a control signal VTX that has a larger amplitude than the power supply voltage SVDD. Therefore, the gate insulating film G2 of the transistor of the second component 20 can be made thinner than the gate insulating film G1 of the transfer transistor TR.

[0053] In this embodiment, a configuration in which four photodiodes PD share one second FD node FD2 has been described, but the system is not limited to this configuration. In other words, even more photodiodes PD may share one second FD node FD2.

[0054] Alternatively, as shown in Figure 8, one photodiode PD may be connected to one second FD node FD2. In the configuration shown in Figure 8, one photodiode PD is connected to the gate 141 of an amplifying transistor AMP, which is one second FD node FD2. In Figure 8, the same reference numerals are used for components having the same functions as those shown in Figure 3, and their explanations are omitted.

[0055] Figure 9 is a plan view of the configuration shown in Figure 8, in which one photodiode PD is connected to one second FD node FD2. This plan view, like Figure 4, combines a plan view of the second surface F2 of the first component 10 as seen from the side of the second component 21, and a plan view of the second component 20 as seen from the side of the third component 30.

[0056] In Figure 9, components having the same function as those shown in Figure 4 are indicated by the same reference numerals as those shown in Figure 4. A transfer gate 111 is provided in one semiconductor region 101, which is a photodiode PD. The gate 141 of the amplification transistor AMP of one readout circuit 22 is connected to one semiconductor region 101 and one semiconductor region 121, which is a first FD node FD1.

[0057] In this configuration as well, the method described in this embodiment can be applied, in which the amplitude of the control signal VTX used to turn on the transfer transistor TR is made larger than the amplitude of the power supply voltage SVDD, which is the voltage applied to the main node of the amplification transistor AMP. This allows the same effects described in this embodiment to be obtained.

[0058] Furthermore, in this embodiment, the voltage supplied to the main node of the amplification transistor AMP and the main node of the reset transistor RES were both the same power supply voltage SVDD, but this example is not limited to this. In other words, the main nodes of the amplification transistor AMP and the main node of the reset transistor RES may be supplied with different power supply voltages. In this case, it is sufficient that a control signal VTX with an amplitude greater than at least one of the first power supply voltage of the main node of the reset transistor RES and the second power supply voltage of the main node of the amplification transistor AMP is supplied when the transfer transistor TR is turned on. Among these, it is particularly preferable to supply a control signal VTX with an amplitude greater than the first power supply voltage supplied to the main node of the reset transistor RES when the transfer transistor TR is turned on, as this can suppress the decrease in the saturation charge amount of the photodiode PD.

[0059] <Second Embodiment> In this embodiment, the dielectric constants of the gate insulating film G1 and the gate insulating film G2 are made to be different from each other.

[0060] The configuration of the photoelectric converter in this embodiment can be the same as in the first embodiment.

[0061] The following explanation will be based on Figure 5, which was described in the first embodiment.

[0062] Figure 5 is a cross-sectional view of the semiconductor substrate 14 of the first component 10 and the semiconductor substrate 21 of the second component 20. A gate insulating film G1 (first gate insulating film) is provided between the second surface F2 of the semiconductor substrate 14 and the transfer gate 111. The semiconductor substrate 21 also has a third surface F3 and a fourth surface F4 facing the third surface F3. A gate insulating film G2 (second gate insulating film) is provided between the third surface F3 of the semiconductor substrate 21 and the gate 141 of the amplification transistor AMP. As in the first embodiment, a gate insulating film G2 is also provided between the gate of the selection transistor SEL and the gate of the reset transistor RES and the third surface F3 of the semiconductor substrate 21. The gate insulating films G1 and G2 are typically films mainly containing silicon and oxygen, or films mainly containing silicon and nitrogen. In other words, the gate insulating films G1 and G2 can be silicon oxide films, silicon oxynitride films, or silicon nitride films, respectively.

[0063] In this embodiment, the relative permittivity of the gate insulating films G1 and G2 are made different from each other. On the other hand, the film thicknesses of the gate insulating films G1 and G2 are made approximately equal to each other. The meaning of "approximately equal" is that variations in film thickness due to errors caused by manufacturing variations are tolerated. In addition, in this embodiment, the relative permittivity of the gate insulating film G2 is made higher than that of the gate insulating film G1. This makes it possible to improve the driving force of the amplification transistor AMP. On the other hand, by making the relative permittivity of the gate insulating film G1 lower than that of the gate insulating film G2, the formation of a strong electric field in the semiconductor region below the transfer gate is suppressed. This makes it possible to reduce leakage current generated near the transfer gate, and thus reduce noise. This makes it possible to improve the transfer efficiency by the transfer gate 111. The relative permittivity of the gate insulating films G1 and G2 can be made different, for example, by making the nitrogen concentration different. That is, in order to make the relative permittivity of the gate insulating film higher, the nitrogen concentration is increased. Therefore, in this embodiment, the gate insulating film G 2 The nitrogen concentration contained in the gate insulating film G 1 By increasing the nitrogen concentration to a level higher than that contained in the material, the relative permittivity of the gate insulating film can be varied. In this example, the gate insulating film G2 The silicon oxynitride film and the silicon nitride film are used, and the gate insulating film G 1 This can also be a silicon oxide film.

[0064] Alternatively, the relative permittivity of the gate insulating films may be varied by a method other than varying the nitrogen concentration. For example, the elements contained in gate insulating films G1 and G2 may be the same, but their film densities may be different. By reducing the film density of the gate insulating films, the relative permittivity decreases. Therefore, the film density of gate insulating film G1 is made smaller than that of gate insulating film G2. This makes the relative permittivity of gate insulating film G2 higher than that of gate insulating film G1. Alternatively, the film densities of gate insulating films G1 and G2 may be varied, and the nitrogen concentrations may also be varied. By varying the film density and nitrogen concentration, the relative permittivity of gate insulating film G2 may be made larger than that of gate insulating film G1. In this case, the film density of gate insulating film G2 is made smaller than that of gate insulating film G1, but the nitrogen concentration in gate insulating film G2 is made higher than that in gate insulating film G1. This makes the relative permittivity of gate insulating film G2 larger than that of gate insulating film G1. Furthermore, although the nitrogen concentration in gate insulating film G1 is higher than that in gate insulating film G2, the film density of gate insulating film G2 is made higher than that of gate insulating film G1. This makes the relative permittivity of gate insulating film G2 greater than that of gate insulating film G1.

[0065] In this embodiment, the transfer transistor TR and the amplification transistor AMP are provided on separate semiconductor substrates. This allows the relative permittivity of the gate insulating films G1 and G2 to be different. In this embodiment, the relative permittivity of the gate insulating film G1 is made lower than that of the gate insulating film G2. This makes it possible to achieve both an increase in the driving force of the amplification transistor AMP and a reduction in the noise of the transfer gate 111.

[0066] In this embodiment, a configuration in which four photodiodes PD share one second FD node FD2 has been described, but the system is not limited to this configuration. In other words, even more photodiodes PD may share one second FD node FD2.

[0067] Furthermore, as shown in Figures 8 and 9, a single photodiode PD may be connected to a single second FD node FD2. The same effects as in this embodiment can be obtained with this configuration as well.

[0068] <Third Embodiment> This description will focus on the differences between the photoelectric conversion device of this embodiment and the second embodiment.

[0069] Figure 10 shows a cross-sectional view of the photoelectric converter of this embodiment. The photoelectric converter of this embodiment can be configured in the same way as shown in Figures 2 to 4. It can also be applied to the configuration of the photoelectric converters shown in Figures 8 and 9.

[0070] In Figure 10, components having the same function as those shown in Figure 5 are given the same reference numerals as those used in Figure 5.

[0071] In this embodiment, the photoelectric converter has different film thicknesses for the protective film covering the transfer gate 111 (first protective film) and the protective film covering the gate 141 of the amplification transistor AMP (second protective film). The film thickness T1a of the protective film 411 (first protective film) covering the transfer gate 111 is greater than the film thickness T2a of the protective film 412 (second protective film) covering the gate 141 of the amplification transistor AMP. Each of the protective films 411 and 412 is typically a film mainly containing silicon and nitrogen. Typically, it is a silicon nitride film. The protective film 411 functions as an etching stop film when penetrating the conductor 205. The conductor 205 requires a process of penetrating the insulating film L1 of the second component 20, the insulator 251 provided between the semiconductor substrate 21 and the conductor 10, and the insulating film L2 of the first component 10. Therefore, by making the protective film 411 thicker than the protective film 412, it is possible to reduce the likelihood of damage to the semiconductor region 121.

[0072] In this embodiment, as in the first embodiment, the relative permittivity of the gate insulating films G1 and G2 is made different. This allows the effects obtained in the first embodiment to be obtained in this embodiment as well.

[0073] <Fourth Embodiment> This embodiment is applicable to any of the first to third embodiments. Figure 11(a) is a schematic diagram illustrating a device 9191 equipped with the semiconductor device 930 of this embodiment. The photoelectric converter (imaging device) of each embodiment described above can be used for the semiconductor device 930. The device 9191 equipped with the semiconductor device 930 will be described in detail. As described above, the semiconductor device 930 may include a semiconductor device 910 having a semiconductor layer 10, as well as a package 920 that houses the semiconductor device 910. The package 920 may include a substrate to which the semiconductor device 910 is fixed, and a lid such as glass facing the semiconductor device 910. The package 920 may further include bonding members such as bonding wires and bumps that connect terminals provided on the substrate and terminals provided on the semiconductor device 910.

[0074] The device 9191 may include at least one of the following: an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, shutter, or mirror. The control device 950 controls the semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0075] The processing unit 960 processes the signals output from the semiconductor device 930. The processing unit 960 is a semiconductor device such as a CPU or ASIC that constitutes an AFE (analog front end) or DFE (digital front end). The display device 970 is an EL display device or liquid crystal display device that displays the information (image) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or semiconductor device that stores the information (image) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as flash memory or a hard disk drive.

[0076] The mechanical device 990 has movable parts or propulsion parts such as motors and engines. The device 9191 displays signals output from the semiconductor device 930 on the display device 970 or transmits them to the outside using a communication device (not shown) provided in the device 9191. For this purpose, it is preferable that the device 9191 further includes a storage device 980 and a processing device 960, separate from the memory circuits and arithmetic circuits of the semiconductor device 930. The mechanical device 990 may be controlled based on signals output from the semiconductor device 930.

[0077] Furthermore, the device 9191 is suitable for electronic devices such as information terminals with shooting capabilities (e.g., smartphones and wearable devices) and cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). In a camera, the mechanical device 990 can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in a camera can move the semiconductor device 930 for vibration damping.

[0078] Furthermore, the device 9191 may be a transport device such as a vehicle, ship, or aircraft. The mechanical device 990 in the transport device may be used as a mobile device. The device 9191 as a transport device is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (piloting) through its imaging function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing to operate the mechanical device 990 as a mobile device based on information obtained from the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring instrument such as a distance sensor, an analytical instrument such as an electron microscope, office equipment such as a copier, or industrial equipment such as a robot.

[0079] According to the embodiments described above, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. Increasing value here means at least one of the following: addition of functions, improvement of performance, improvement of characteristics, improvement of reliability, improvement of manufacturing yield, reduction of environmental impact, cost reduction, miniaturization, and weight reduction.

[0080] Therefore, by using the semiconductor device 930 according to this embodiment in the device 9191, the value of the device can also be improved. For example, by mounting the semiconductor device 930 on a transport device, excellent performance can be obtained when taking external images of the transport device or measuring the external environment. Therefore, when manufacturing and selling transport devices, deciding to mount the semiconductor device according to this embodiment on the transport device is advantageous in improving the performance of the transport device itself. In particular, the semiconductor device 930 is suitable for transport devices that use information obtained from the semiconductor device to assist in driving and / or perform automated driving.

[0081] Furthermore, the photoelectric conversion system and mobile body of this embodiment will be explained with reference to Figures 11(b) and (c).

[0082] Figure 11(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 8 has a photoelectric conversion device 80. The photoelectric conversion device 80 is a photoelectric conversion device (imaging device) as described in any of the embodiments above. The photoelectric conversion system 8 has an image processing unit 801 that performs image processing on a plurality of image data acquired by the photoelectric conversion device 80, and a parallax acquisition unit 802 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the photoelectric conversion system 8. The photoelectric conversion system 8 also has a distance acquisition unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information is information related to parallax, defocus amount, distance to an object, etc. The collision determination unit 804 may use any of this distance information to determine the possibility of collision. The means for acquiring distance information may be implemented by specially designed hardware, or by a software module. It may also be implemented by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or a combination thereof.

[0083] The photoelectric conversion system 8 is connected to the vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 8 is also connected to the control ECU 820, which is a control device that outputs a control signal to generate braking force on the vehicle based on the judgment result of the collision judgment unit 804. The photoelectric conversion system 8 is also connected to the warning device 830, which issues a warning to the driver based on the judgment result of the collision judgment unit 804. For example, if the collision judgment result of the collision judgment unit 804 indicates a high probability of collision, the control ECU 820 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 830 warns the user by sounding an alarm, displaying warning information on a screen such as a car navigation system, or vibrating the seat belt or steering wheel.

[0084] In this embodiment, the photoelectric conversion system 8 images the area around the vehicle, for example, in front of or behind it. Figure 11(c) shows the photoelectric conversion system when imaging the area in front of the vehicle (imaging range 850). The vehicle information acquisition device 810 sends instructions to the photoelectric conversion system 8 or the photoelectric conversion device 80. This configuration can further improve the accuracy of distance measurement.

[0085] The above example illustrates control to prevent collisions with other vehicles, but it can also be applied to control systems that automatically follow other vehicles or automatically drive to prevent vehicles from straying from their lanes. Furthermore, the photoelectric conversion system can be applied not only to vehicles such as the vehicle itself, but also to mobile objects (mobile devices) such as ships, aircraft, or industrial robots. In addition, it can be applied not only to mobile objects but also to a wide range of devices that utilize object recognition, such as intelligent transportation systems (ITS).

[0086] [Modified Embodiment] The present invention is not limited to the embodiments described above and can be modified in various ways.

[0087] For example, examples in which some configurations of one embodiment are added to other embodiments, or in which some configurations of other embodiments are replaced, are also included as embodiments of the present invention.

[0088] Furthermore, the equipment (photoelectric conversion system) shown in the fourth embodiment above is merely an example of a photoelectric conversion system to which the photoelectric conversion device can be applied, and the photoelectric conversion system to which the photoelectric conversion device of the present invention can be applied is not limited to the configuration shown in Figure 11.

[0089] It should be noted that the above embodiments are merely examples of how the present invention can be implemented, and the technical scope of the present invention should not be interpreted as being limited by them. In other words, the present invention can be implemented in various forms without departing from its technical concept or its main features.

[0090] The embodiments described above can be modified as appropriate without departing from the technical concept. Furthermore, the disclosures in this specification include not only what is described herein, but also all matters that can be understood from this specification and the drawings attached thereto. The disclosures in this specification also include the complement of the concepts described herein. That is, if this specification states, for example, "A is greater than B," then even if the statement "A is not greater than B" is omitted, this specification can be said to disclose that "A is not greater than B." This is because the statement "A is greater than B" presupposes that the case where "A is not greater than B" is being considered.

[0091] Furthermore, this disclosure comprises the following configuration.

[0092] (Composition 1) A first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first semiconductor region; and a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; A component stacked on the first component, comprising a second semiconductor substrate having a third surface and a fourth surface facing the third surface, an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface, and a reset transistor for resetting the gate, A photoelectric converter characterized in that the difference between the voltage applied to the transfer gate during the period in which the signal charge is transferred from the photoelectric converter to the first semiconductor region and the reference voltage is greater than the difference between the power supply voltage applied to the main node of the reset transistor and the reference voltage.

[0093] (Configuration 2) A first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first semiconductor region; and a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; A component stacked on the first component, comprising a second semiconductor substrate having a third surface and a fourth surface facing the third surface, an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface, and a reset transistor for resetting the gate, A first power supply voltage is supplied to the main node of the reset transistor, and a second power supply voltage is supplied to the main node of the amplification transistor. A photoelectric conversion device characterized in that the difference between the voltage applied to the transfer gate and the reference voltage during the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region is greater than at least one of the difference between the first power supply voltage and the reference voltage and the difference between the second power supply voltage and the reference voltage.

[0094] (Composition 3) The aforementioned photoelectric conversion unit is formed inside the well region. The photoelectric conversion device according to configuration 1 or configuration 2, characterized in that the reference voltage is the voltage applied to the well region.

[0095] (Composition 4) The photoelectric conversion device according to configuration 1 or configuration 2, characterized in that the reference voltage is the voltage applied to the transfer gate during the period when the transfer transistor is turned off.

[0096] (Composition 5) A first gate insulating film is provided between the first surface and the transfer gate. A second gate insulating film is provided between the gate and the gate. A photoelectric conversion device according to any one of configurations 1 to 4, characterized in that the thickness of the first gate insulating film is greater than the thickness of the second gate insulating film.

[0097] (Composition 6) A first gate insulating film is provided between the first surface and the transfer gate. A second gate insulating film is provided between the gate and the gate. A photoelectric converter according to any one of configurations 1 to 4, characterized in that the thickness of the first gate insulating film and the thickness of the second gate insulating film are approximately equal.

[0098] (Composition 7) The photoelectric conversion device according to configuration 6 or configuration 7, characterized in that the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different.

[0099] (Composition 8) The photoelectric conversion apparatus according to configuration 7, characterized in that the first gate insulating film is a film mainly containing silicon and oxygen, and the second gate insulating film is a film mainly containing silicon and nitrogen.

[0100] (Composition 9) The photoelectric converter according to any one of configurations 1 to 8, further comprising a third component having an AD conversion unit that converts the signal output by the amplification transistor into a digital signal, wherein the first component, the second component, and the third component are stacked.

[0101] (Composition 10) A device comprising a photoelectric converter described in any one of items 1 to 9, Optical device corresponding to the aforementioned photoelectric converter, A control device for controlling the aforementioned photoelectric converter, A processing device that processes the signal output from the aforementioned photoelectric converter, A display device that displays information obtained by the aforementioned photoelectric converter. A storage device for storing information obtained by the photoelectric converter, and The apparatus is characterized by further comprising at least one of the following: a mechanical device that operates based on information obtained from the photoelectric converter. [Explanation of Symbols]

[0102] 10. Part 1 14. First Semiconductor Substrate 20 Part 2 21. Second Semiconductor Substrate 30 Part 3 31 Third Semiconductor Substrate 101 Semiconductor area (photoelectric conversion section) 111 Transfer Gate 121 Semiconductor Domain (First Semiconductor Domain) 141 Gate of an Amplifying Transistor 205 Conductors F1 front page F2 2nd side F3 3rd page F4 4th side G1 First gate insulating film G2 Second gate insulating film

Claims

1. A first component comprising: a first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first semiconductor region; a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; and a first gate insulating film provided between the first surface and the transfer gate; A component stacked on the first component, comprising: a second semiconductor substrate having a third surface and a fourth surface facing the third surface; an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface; a reset transistor for resetting the gate; and a second gate insulating film provided between the third surface and the gate, The difference between the power supply voltage and the reference voltage applied to the main node of the reset transistor is greater than the difference between the power supply voltage and the reference voltage applied to the transfer gate during the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region. A photoelectric conversion device characterized in that the first gate insulating film is a film mainly containing silicon and oxygen, and the second gate insulating film is a film mainly containing silicon and nitrogen.

2. A first component comprising: a first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first semiconductor region; a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; and a first gate insulating film provided between the first surface and the transfer gate; A component stacked on the first component, comprising: a second semiconductor substrate having a third surface and a fourth surface facing the third surface; an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface; a reset transistor for resetting the gate; and a second gate insulating film provided between the third surface and the gate, A first power supply voltage is applied to the main node of the reset transistor, and a second power supply voltage is applied to the main node of the amplification transistor. During the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region, the difference between the voltage applied to the transfer gate and the reference voltage is greater than at least one of the difference between the first power supply voltage and the reference voltage and the difference between the second power supply voltage and the reference voltage. A photoelectric conversion device characterized in that the first gate insulating film is a film mainly containing silicon and oxygen, and the second gate insulating film is a film mainly containing silicon and nitrogen.

3. The aforementioned photoelectric conversion unit is formed inside the well region. The photoelectric conversion device according to claim 1, characterized in that the reference voltage is the voltage applied to the well region.

4. The aforementioned photoelectric conversion unit is formed inside the well region. The photoelectric conversion device according to claim 2, characterized in that the reference voltage is the voltage applied to the well region.

5. The photoelectric conversion device according to claim 1, characterized in that the reference voltage is a voltage applied to the transfer gate during the period when the transfer transistor is turned off.

6. The photoelectric conversion device according to claim 2, characterized in that the reference voltage is the voltage applied to the transfer gate during the period when the transfer transistor is off.

7. The photoelectric conversion apparatus according to claim 1, characterized in that the thickness of the first gate insulating film is greater than the thickness of the second gate insulating film.

8. The photoelectric conversion apparatus according to claim 2, characterized in that the thickness of the first gate insulating film is greater than the thickness of the second gate insulating film.

9. The photoelectric conversion apparatus according to claim 1, characterized in that the thickness of the first gate insulating film and the thickness of the second gate insulating film are substantially equal.

10. The photoelectric conversion apparatus according to claim 2, characterized in that the thickness of the first gate insulating film and the thickness of the second gate insulating film are substantially equal.

11. The photoelectric conversion device according to claim 7, characterized in that the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different.

12. The photoelectric conversion device according to claim 8, characterized in that the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different.

13. The photoelectric conversion device according to claim 9, characterized in that the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different.

14. The photoelectric conversion device according to claim 10, characterized in that the relative permittivity of the first gate insulating film and the relative permittivity of the second gate insulating film are different.

15. The photoelectric converter according to claim 1, further comprising a third component having an AD conversion unit that converts the signal output by the amplification transistor into a digital signal, wherein the first component, the second component, and the third component are stacked.

16. The photoelectric converter according to claim 2, further comprising a third component having an AD conversion unit that converts the signal output by the amplification transistor into a digital signal, wherein the first component, the second component, and the third component are stacked.

17. The first component further comprises a first protective film covering the transfer gate, The second component further comprises a second protective film covering the gate, The photoelectric conversion apparatus according to claim 1, characterized in that the thickness of the first protective film is greater than the thickness of the second protective film.

18. The first component further comprises a first protective film covering the transfer gate, The second component further comprises a second protective film covering the gate, The photoelectric conversion apparatus according to claim 2, characterized in that the thickness of the first protective film is greater than the thickness of the second protective film.

19. A first component comprising: a first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first semiconductor region; a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; and a first protective film covering the transfer gate. A component stacked on the first component, comprising: a second semiconductor substrate having a third surface and a fourth surface facing the third surface; an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface; a reset transistor for resetting the gate; and a second protective film covering the gate. A first power supply voltage is applied to the main node of the reset transistor, and a second power supply voltage is applied to the main node of the amplification transistor. During the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region, the difference between the voltage applied to the transfer gate and the reference voltage is greater than at least one of the difference between the first power supply voltage and the reference voltage and the difference between the second power supply voltage and the reference voltage. A photoelectric conversion device characterized in that the thickness of the first protective film is greater than the thickness of the second protective film.

20. A first component comprising: a first semiconductor substrate having a first surface and a second surface facing the first surface; a photoelectric conversion unit that receives light from the second surface; a first semiconductor region; a transfer transistor having a transfer gate provided on the side of the first surface for transferring the signal charge of the photoelectric conversion unit to the first semiconductor region; and a first gate insulating film provided between the first surface and the transfer gate, A component stacked on the first component, comprising: a second semiconductor substrate having a third surface and a fourth surface facing the third surface; an amplifying transistor connected to the first semiconductor region and having a gate provided on the side of the third surface; a reset transistor for resetting the gate; and a second gate insulating film provided between the third surface and the gate, A first power supply voltage is applied to the main node of the reset transistor, and a second power supply voltage is applied to the main node of the amplification transistor. During the period in which the signal charge is transferred from the photoelectric conversion unit to the first semiconductor region, the difference between the voltage applied to the transfer gate and the reference voltage is greater than at least one of the difference between the first power supply voltage and the reference voltage and the difference between the second power supply voltage and the reference voltage. A photoelectric converter characterized in that the first gate insulating film is a silicon oxide film and the second gate insulating film is a silicon nitride film.

21. A device comprising a photoelectric converter according to any one of claims 1 to 20, Optical device corresponding to the aforementioned photoelectric converter, A control device for controlling the aforementioned photoelectric converter, A processing device that processes the signal output from the aforementioned photoelectric converter, A display device that displays information obtained by the aforementioned photoelectric converter. A storage device for storing information obtained by the photoelectric converter, and The apparatus is characterized by further comprising at least one of the following: a mechanical device that operates based on information obtained from the photoelectric converter.

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