Isolator

Abstract

To suppress the increase in size and the deterioration of properties.SOLUTION: An isolator according to an embodiment includes an isolator module 40 including a first coil C1 and a second coil C2, each having a helical shape and a central axis along the Z direction, and a first insulator 41 that seals the first coil C1 and the second coil C2, and the first coil and the second coil are spaced apart from each other, and when viewed from the first direction, the first coil is disposed inside the second coil.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] Embodiments of the present invention relate to an isolator. Background Art

[0002] An isolator that transmits a signal from a transmission-side circuit to a reception-side circuit while insulating between the transmission-side circuit and the reception-side circuit is known. Prior Art Documents Patent Documents

[0003] Patent Document 1 Japanese Unexamined Patent Publication No. Hei 7-220950 Patent Document 2 Japanese Unexamined Patent Publication No. 2013-021902 Patent Document 3 Japanese Unexamined Patent Publication No. 2007-149872 Summary of the Invention Problems to be Solved by the Invention

[0004] Suppresses an increase in size and a decrease in characteristics. Means for Solving the Problem

[0005] The isolator according to an embodiment comprises an isolator module including a first coil and a second coil each having a helical shape and a central axis along a first direction, and a first insulator encapsulating the first coil and the second coil, wherein the first coil and the second coil are spaced apart from each other, and the first coil is provided inside the second coil when viewed from the first direction. Brief Description of the Drawings

[0006] [Figure 1] A plan view illustrating an example of a planar layout of an isolator package according to an embodiment. [Figure 2]A cross-sectional view along line II-II in Figure 1, showing an example of the cross-sectional structure of the isolator package according to the embodiment. [Figure 3] A perspective view showing an example of the structure of an isolator module according to the embodiment. [Figure 4] A perspective view showing an example of the structure of the primary circuit of an isolator module according to the embodiment. [Figure 5] A perspective view showing an example of the structure of the secondary circuit of an isolator module according to the embodiment. [Figure 6] A cross-sectional view along the line VI-VI in Figure 3, showing an example of the cross-sectional structure of the isolator module and wiring according to the embodiment. [Figure 7] A plan view showing an example of a planar layout of an isolator module and wiring according to an embodiment. [Figure 8] A plan view showing an example of a planar layout of an isolator module and wiring according to the first modified example. [Figure 9] A plan view showing an example of the planar layout of an isolator package according to the second modified example. [Figure 10] A cross-sectional view along line XX in Figure 9, showing an example of the cross-sectional structure of the isolator package according to the second modified example. [Figure 11] A plan view showing an example of the planar layout of an isolator package according to the third modified example. [Figure 12] A cross-sectional view along line XII-XII in Figure 11, showing an example of the cross-sectional structure of an isolator package according to the third modified example. [Figure 13] A plan view showing an example of the planar layout of an isolator package according to the fourth modified example. [Figure 14] A cross-sectional view along line XIV-XIV in Figure 13 shows an example of the cross-sectional structure of the isolator package according to the fourth modified example. [Figure 15] A perspective view showing an example of the structure of an isolator module according to the fourth modified example. [Figure 16] A cross-sectional view along line XVI-XVI in Figure 15 shows an example of the cross-sectional structure of the isolator module and wiring according to the fourth modified example. [Figure 17] Cross-sectional view showing an example of a cross-sectional structure of an isolator module and a wiring according to another example. MODE FOR CARRYING OUT THE INVENTION

[0007] Hereinafter, embodiments will be described with reference to the drawings. Dimensions and ratios in the drawings are not necessarily the same as actual ones.

[0008] In the following description, constituent elements having substantially the same function and configuration are denoted by the same reference numerals. When elements having similar configurations are particularly distinguished, different letters or numbers may be added to the end of the same reference numeral.

[0009] 1 Embodiment An isolator according to an embodiment will be described.

[0010] FIG. 1 is a plan view showing an example of a planar layout of an isolator package according to an embodiment. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1, showing an example of a cross-sectional structure of the isolator package according to the embodiment. As shown in FIG. 1 and FIG. 2, the isolator package 1 is a package including a digital isolator. The isolator package 1 includes a frame 10, semiconductor chips 20 and 30, an isolator module 40, and an insulating member 50. In FIG. 1, the insulating member 50 is omitted.

[0011] The frame 10 is, for example, a plate-shaped metal member. Semiconductor chips 20 and 30 are provided on the upper surface of the frame 10 via insulating adhesive members 11 and 12, respectively. The frame 10 functions as a substrate that supports the semiconductor chips 20 and 30.

[0012] Hereinafter, a plane parallel to the plane of the frame 10 is defined as an XY plane. Directions perpendicular to each other in the XY plane are defined as an X direction and a Y direction. A direction intersecting the XY plane is defined as a Z direction. In the Z direction, the direction from the frame 10 toward the semiconductor chips 20 and 30 is also referred to as the upward direction.

[0013] The isolator module 40 is provided on the top surface of the semiconductor chip 20 with the insulating adhesive member 13 interposed therebetween. Accordingly, the isolator module 40 is provided at a position overlapping the semiconductor chip 20, for example, when viewed in the Z direction.

[0014] The semiconductor chip 20 is provided with a circuit 21. The circuit 21 includes a signal transmitting / receiving circuit and a modulation / demodulation circuit. The isolator module 40 is provided above the semiconductor chip 20 by, for example, flip-chip bonding. The circuit 21 is electrically connected to the isolator module 40 via a bonding wire W1. Further, although not illustrated in FIGS. 1 and 2, the circuit 21 is electrically connected to the bottom surface of the isolator module 40 via, for example, a conductor portion between the top surface of the semiconductor chip 20 and the bottom surface of the isolator module 40, and a wiring provided on the semiconductor chip 20. The conductor portion is provided using, for example, bumps or soldering. Further, the semiconductor chip 20 and the isolator module 40 may be electrically connected using, for example, Anisotropic Conductive Paste (ACP). Further, the semiconductor chip 20 is electrically connected to the pin 23 via a bonding wire W2.

[0015] The semiconductor chip 30 is aligned with the semiconductor chip 20 in the X direction. The semiconductor chip 30 is provided with a circuit 31. The circuit 31 includes a signal transmission / reception circuit and a modulation / demodulation circuit. The circuit 31 is electrically connected to the isolator module 40 via bonding wires W3 and W4. More specifically, the circuit 31 is electrically connected to the upper surface of the isolator module 40, for example, via bonding wire W3. In addition to bonding wire W4, the circuit 31 is also electrically connected to the lower surface of the isolator module 40 via a conductive portion between the upper surface of the semiconductor chip 20 and the lower surface of the isolator module 40, and via wiring provided on the semiconductor chips 20 and 30, for example, not shown in Figures 1 and 2. This conductive portion can be similar to the conductive portion that electrically connects the circuit 21 of the semiconductor chip 20 and the lower surface of the isolator module 40 as described above. The semiconductor chip 30 is also electrically connected to pins 33 via bonding wire W5.

[0016] The isolator module 40 is a module that functions as a digital isolator. A transformer is mounted in the isolator module 40. The isolator module 40 is configured to transmit signals while isolating the transmitting circuit (primary circuit) and the receiving circuit (secondary circuit) using the transformer. Details of the configuration of the isolator module 40 will be described later.

[0017] The insulating member 50 includes, for example, an insulating resin. The frame 10, semiconductor chips 20 and 30, isolator module 40, and bonding wires W1, W2, W3, W4 and W5 are sealed by the insulating member 50. Pins 23 and 33 are fixed by the insulating member 50 and have portions exposed to the outside of the insulating member 50.

[0018] With the above configuration, the isolator package 1 can transmit signals between pins 23 and 33 via the isolator module 40.

[0019] The structure of the isolator module according to the embodiment will be described using Figures 3, 4, 5, 6, and 7. Figure 3 is a perspective view showing an example of the structure of the isolator module according to the embodiment. Figure 4 is a perspective view showing an example of the structure of the primary circuit of the isolator module according to the embodiment. Figure 5 is a perspective view showing an example of the structure of the secondary circuit of the isolator module according to the embodiment. Figure 6 is a cross-sectional view along line VI-VI in Figure 3, showing an example of the cross-sectional structure of the isolator module and wiring according to the embodiment. Figure 7 is a plan view showing an example of the planar layout of the isolator module and wiring according to the embodiment. Figures 6 and 7 show the wiring provided on the isolator module 40 and the semiconductor chip 20. Also, the semiconductor chip 20 and the adhesive member 13 are not shown in Figures 6 and 7.

[0020] As shown in Figures 3, 4, 5, 6, and 7, the isolator module 40 includes, for example, an insulating portion 41. In Figure 4, a conductive member relating to the primary circuit within the insulating portion 41 is shown as being transmitted through the insulating portion 41 covering the conductive member. In Figure 5, a conductive member relating to the secondary circuit within the insulating portion 41 is shown as being transmitted through the insulating portion 41 covering the conductive member.

[0021] The insulator portion 41 is an insulating member that includes the primary and secondary circuits. The shape of the insulator portion 41 is, for example, cylindrical. However, it is not limited to this, and the shape of the insulator portion 41 may be any shape. As shown in Figure 6, the height H of the insulator portion 41 along the Z direction is, for example, approximately 2 mm or less.

[0022] Conductive pads PU1, PL1, PU2, and PL2, as well as coils C1 and C2, are provided within the insulator portion 41. The insulator portion 41 is provided so as to cover coils C1 and C2. At least a portion of, for example, pads PU1 and PU2 is exposed on the upper surface of the insulator portion 41. At least a portion of, for example, pads PL1 and PL2 is exposed on the lower surface of the insulator portion 41.

[0023] Coil C1 is made of a conductor. Coil C1 includes, for example, copper. Coil C1 has a helical shape. It can also be said that coil C1 has a helical spring shape. More specifically, coil C1 has the shape of a cylindrical coil spring, including wiring that is wrapped around the side surface of a cylinder (a cylindrical object) having an upper and lower surface in the XY plane. As a result, coil C1 has a central axis in the Z direction. Here, the central axis of the coil is the axis along the direction in which the coil extends as the number of turns (also called the number of turns) of the coil increases. Furthermore, with the above configuration, coil C1 has a circular shape when viewed from above, for example. Also, coil C1 is configured such that the inner and outer diameters of coil C1 are substantially uniform along the entire Z direction, for example. As shown in Figure 6, coil C1 has an outer diameter R1. With the above configuration, coil C1 has a predetermined inductance.

[0024] Coil C1 has an upper end and a lower end. The upper end of coil C1 is electrically connected to the lower surface of pad PU1. The lower end of coil C1 is electrically connected to the upper surface of pad PL1.

[0025] With the configuration of coil C1 and pads PL1 and PU1 as described above, a current path is formed between pads PL1 and PU1. Coil C1 is also called the primary coil.

[0026] Coil C2 is made of a conductor. Coil C2 includes, for example, copper. Like coil C1, coil C2 has a helical shape. It can also be said that coil C2 has a helical spring shape, like coil C1. More specifically, coil C2 has a cylindrical coil spring shape, like coil C1. As a result, coil C2 has a central axis in the Z direction. Furthermore, with the above configuration, coil C2 has a circular shape when viewed from above, for example. Also, coil C2 is configured such that the inner and outer diameters of coil C2 are substantially uniform along the entire Z direction, for example. As shown in Figure 6, coil C2 has an outer diameter R2. The outer diameter R2 is, for example, larger than the outer diameter R1 and approximately 5 mm or less. Also, the inner diameter of coil C2 is, for example, larger than the outer diameter R1. Coil C2 is provided outside coil C1 and spaced apart from coil C1. Coils C1 and C2 are electrically insulated, for example, by the insulating portion 41. With this configuration, coil C2 has a predetermined inductance. Furthermore, coil C2 is located within a height range approximately the same as that of coil C1.

[0027] Coil C2 has an upper end and a lower end. The upper end of coil C2 is electrically connected to the lower surface of pad PU2. The lower end of coil C2 is electrically connected to the upper surface of pad PL2.

[0028] With the configuration of coil C2 and pads PL2 and PU2 as described above, a current path is formed between pads PL2 and PU2. Coil C2 is also called a secondary coil.

[0029] Furthermore, in the configuration described above, the primary coil and the secondary coil are in close proximity to each other within the insulator portion 41. As a result, the primary coil and the secondary coil function as a transformer.

[0030] The lower surface of pad PL1 is electrically connected to wiring 61 provided on the semiconductor chip 20, for example, via a conductor BP corresponding to the pad. Wiring 61 is electrically connected to circuit 21 of the semiconductor chip 20. In Figure 6, a pad (not shown) may be provided between wiring 61 and conductor BP.

[0031] The lower surface of pad PL2 is electrically connected to wiring 62 provided on the semiconductor chip 20, for example, via a conductor BP corresponding to the pad. Wiring 62 is electrically connected to pad PC2 provided on the semiconductor chip 20, for example, as shown in Figure 7. Pad PC2 is electrically connected to circuit 31 of semiconductor chip 30 via bonding wire W4. Note that in Figure 6, a pad (not shown) may be provided between wiring 62 and conductor BP.

[0032] The conductive portion BP is formed, for example, by bumps or soldering, for electrically connecting the wiring 61 and 62 provided on the semiconductor chip 20 to the isolator module 40, as described above.

[0033] Pads PU1, PL1, PU2, and PL2 are arranged in this order along the rotation axis in the Z direction. As a result, pads PU1 and PL1 are arranged adjacent to each other in the rotation direction. Also, pads PU2 and PL2 are arranged adjacent to each other in the rotation direction.

[0034] In this embodiment, the arrangement of pads PU1, PL1, PU2, and PL2 is not limited to the above arrangement, as long as pads PU1 and PL1, and pads PU2 and PL2 are adjacent to each other. Furthermore, the arrangement of pads PU1, PL1, PU2, and PL2 can be set by changing the rotation of each coil C1 and C2 along its rotation axis in the Z direction, and by changing the number of turns.

[0035] The above explanation shows the case where coil C2 is located outside coil C1, but it is not limited to this. Coil C1 may also be located outside coil C2. In this case, the outer diameter R1 of coil C1 is, for example, larger than the outer diameter R2 and approximately 5 mm or less. Also, the inner diameter of coil C1 is, for example, larger than the outer diameter R2.

[0036] Furthermore, the above explanation shows the case where coils C1 and C2 have a circular shape when viewed from above. However, it is not limited to this. Coils C1 and C2 may, for example, have an elliptical shape when viewed from above. In this case, the longitudinal outer diameter of the outer coil of coils C1 and C2 is, for example, approximately 5 mm or less. Also, coils C1 and C2 may, for example, have a polygonal shape when viewed from above.

[0037] According to this embodiment, in the isolator module 40, each coil C1 and C2 has a helical shape. This makes it possible to suppress an increase in size (area) compared to the case where an isolator module is formed by bonding a wiring board containing a primary coil and a wiring board containing a secondary coil. To elaborate, when an isolator module is formed by bonding a wiring board containing a primary coil and a wiring board containing a secondary coil, each coil is provided in a spiral shape, for example, within a plane. This can potentially increase the size (area) of the coil and the isolator module when providing coils with a predetermined inductance. On the other hand, according to this embodiment, the configuration of coils C1 and C2 as described above makes it possible to suppress an increase in size (area) within a plane. Therefore, it is possible to suppress an increase in the size (area) of the isolator module 40.

[0038] Furthermore, according to this embodiment, coil C1 is provided inside coil C2 within the insulator portion 41. This makes it possible to suppress the deterioration of characteristics due to misalignment of coils C1 and C2. To add to this, when forming an isolator module by bonding a wiring board containing a primary coil and a wiring board containing a secondary coil, misalignment of the primary and secondary coils during the bonding process of the two different wiring boards can cause a deterioration in the characteristics of the isolator module. For this reason, the manufacturing process may become complicated in order to suppress the occurrence of misalignment of the primary and secondary coils. According to this embodiment, since both the primary and secondary coils are provided within the same insulator portion 41, the occurrence of misalignment can be easily suppressed compared to the case where a wiring board containing a primary coil and a wiring board containing a secondary coil are bonded together to form an isolator module. Therefore, it is possible to suppress the complexity of the manufacturing process of the isolator module and suppress the deterioration of characteristics.

[0039] Furthermore, according to this embodiment, there are two bonding wires that are directly connected to the isolator module 40. This improves the degree of freedom in arranging the isolator module 40. To elaborate, when forming an isolator module by bonding a wiring board containing a primary coil and a wiring board containing a secondary coil, for example, four bonding wires are directly connected to the isolator module to connect one end and the other end of the primary coil, and one end and the other end of the secondary coil, to the primary and secondary circuits, respectively. As a result, according to this embodiment, the number of bonding wires directly connected to the isolator module 40 can be reduced compared to when forming an isolator module by bonding a wiring board containing a primary coil and a wiring board containing a secondary coil. Therefore, the degree of freedom in arranging the isolator module 40 is improved.

[0040] Furthermore, according to this embodiment, a decrease in yield can be suppressed. More specifically, as described above, the degree of freedom in arranging the isolator module 40 is improved, which can suppress an increase in the difficulty of the process of forming the bonding wires when arranging the isolator module 40. This suppresses the occurrence of defective products and reduces a decrease in yield. Moreover, according to this embodiment, the isolator module 40 is electrically connected to the semiconductor chips 20 and 30 by bonding wires W1, W3, and W4. With this configuration, the number of bonding wires used to connect the isolator module and the semiconductor chip can be reduced compared to the case in which a wiring board including a primary coil and a wiring board including a secondary coil are bonded together to form the isolator module. This configuration also helps to suppress a decrease in yield.

[0041] Furthermore, according to this embodiment, the isolator module 40 is electrically connected to the semiconductor chip 20 by flip-chip bonding. As a result, the isolator module 40 is positioned to overlap with the semiconductor chip 20 when viewed in the Z direction. This configuration also helps to suppress an increase in the size (area) of the isolator package 1.

[0042] Furthermore, with the configuration of coils C1 and C2 described above, it is possible to increase the coupling coefficient of the transformer while suppressing an increase in the size (area) of the isolator module 40. In other words, the coupling coefficient of the transformer can be increased by increasing the number of turns while maintaining the outer diameter of each coil C1 and C2.

[0043] Furthermore, with the configuration of coils C1 and C2 described above, the positions of pads PU1, PL1, PU2, and PL2 can be easily adjusted. That is, the positions of pads PU1, PL1, PU2, and PL2 can be set by rotating the coils and changing the number of turns of the coils. This configuration also improves the degree of freedom in the placement of the isolator module 40.

[0044] 2. Variations Next, we will describe an isolator relating to a modified example. In the following, we will omit the explanation of configurations equivalent to those in the embodiment and mainly describe configurations that differ from the embodiment.

[0045] 2.1 First Variation The isolator according to the first modified example will now be described. The first modified example differs from the embodiment in that the pads PU1 and PU2, and PL1 and PL2 of the isolator module 40 are arranged to face each other when viewed from above. The following description will mainly focus on the configuration that differs from the embodiment. Configurations equivalent to those in the embodiment will be omitted.

[0046] In the following section, the configuration of the isolator module 40 according to the first modified example will be described with reference to Figure 8. Figure 8 is a plan view showing an example of the planar layout of the isolator module and wiring according to the embodiment. Figure 8 corresponds to the area shown in Figure 7.

[0047] Pads PU1, PL2, PL1, and PU2 are arranged in this order in the direction of rotation along the axis of rotation in the Z direction. As a result, pad PU1 is positioned so as to be sandwiched in the direction of rotation by pads PU2 and PL2 among pads PU1, PL1, PU2, and PL2. Similarly, pad PL1 is positioned so as to be sandwiched in the direction of rotation by pads PL2 and PU2 among pads PU1, PL1, PU2, and PL2. With these configurations, pads PU1 and PL1, and pads PU2 and PL2 are positioned opposite each other.

[0048] In addition, as with the embodiment, the arrangement of pads PU1, PL1, PU2, and PL2 is not limited to the above arrangement, as long as pads PU1 and PL1, and pads PU2 and PL2 are provided facing each other.

[0049] Furthermore, the configuration of coils C1 and C2 can be the same as in the embodiment, except that they are rotated about a rotation axis along the Z direction.

[0050] The same effects as those of the embodiment are achieved by the first modification.

[0051] 2.2 Second Variation Next, an isolator relating to a second modification will be described. The second modification differs from the embodiment and the first modification in that the isolator module 40 is provided in a position that does not overlap with the semiconductor chips 20 and 30 when viewed from above. The following will mainly describe the configuration that differs from the embodiment and the first modification.

[0052] As shown in Figures 9 and 10, the isolator package 1 includes frames 101, 102, 161, and 162 instead of frame 10 in the embodiment. Figure 9 is a plan view showing an example of the planar layout of the isolator according to the second modification. Figure 10 is a cross-sectional view along line XX in Figure 9, showing an example of the cross-sectional structure of the isolator according to the second modification.

[0053] The isolator package 1 includes semiconductor chips 20 and 30, an isolator module 40, and insulating members 50, as well as frames 101, 102, 161, and 162.

[0054] Frames 101, 102, 161, and 162 are, for example, plate-shaped metal members.

[0055] Semiconductor chips 20 and 30 are provided on the surfaces of frames 101 and 102, respectively, via insulating adhesive members 11 and 12. Frames 101 and 102 function as substrates supporting the semiconductor chips 20 and 30.

[0056] An isolator module 40 is provided above frames 161 and 162. The isolator module 40 is electrically connected to frames 161 and 162 via a conductive part BP. In Figure 10, frame 161 and the conductive part BP connected to frame 161 are shown, while frame 162 and the conductive part BP connected to frame 162 are not shown. The conductive part BP is formed, for example, by bumps or soldering to electrically connect each of frames 161 and 162 to the isolator module 40. The isolator module 40 and frames 161 and 162 are electrically connected by flip-chip bonding, for example, similar to the connection between the isolator module 40 and the semiconductor chip 20 in the embodiment. Frame 161 is electrically connected to the circuit 21 of the semiconductor chip 20 via bonding wire W6 sealed by an insulating member 50. Frame 162 is electrically connected to the circuit 21 of the semiconductor chip 20 via bonding wire W4. Frames 161 and 162 function as substrates supporting the isolator module 40.

[0057] This configuration also produces the same effects as the embodiment and the first modified example.

[0058] 2.3 Third Variation Next, an isolator relating to the third modified example will be described. The third modified example differs from the embodiment, the first modified example, and the second modified example in that the semiconductor chips 20 and 30 and the isolator module 40 are supported on a semiconductor substrate. The following will mainly describe the configuration that differs from the embodiment, the first modified example, and the second modified example.

[0059] The configuration of the isolator package 1 will be explained using Figures 11 and 12. Figure 11 is a plan view showing an example of the planar layout of the isolator package according to the third modified example. Figure 12 is a cross-sectional view along line XII-XII in Figure 11, showing an example of the cross-sectional structure of the isolator package according to the third modified example.

[0060] The isolator package 1 includes semiconductor chips 20 and 30, an isolator module 40, and an insulating member 50, in addition to a semiconductor substrate S.

[0061] On the surface of the semiconductor substrate S, semiconductor chips 20 and 30 and an isolator module 40 are provided via insulating adhesive members 11, 12, and 13, respectively. The semiconductor substrate S functions as a substrate that supports the semiconductor chips 20 and 30 and the isolator module 40.

[0062] The semiconductor substrate S is provided with, for example, pins 23 and 33, and wirings 61 and 62. On the semiconductor substrate S, at least a portion of each of the pins 23 and 33, and the wirings 61 and 62, is provided so that they are exposed on the upper surface of the semiconductor substrate S. The wiring 61 is electrically connected to the circuit 21 of the semiconductor chip 20 via bonding wires W6, similar to the frame 161 in the second modified example. The wiring 62 is electrically connected to the circuit 31 of the semiconductor chip 30 via bonding wires W4, similar to the wiring 62 provided on the semiconductor chip 20 in the embodiment. Furthermore, an isolator module 40 is provided on the upper surface of the wirings 61 and 62 via a conductor portion BP, similar to the embodiment. As a result, the wirings 61 and 62 are electrically connected to the isolator module 40.

[0063] This configuration also produces the same effects as the embodiment, the first modified example, and the second modified example.

[0064] 2.4 Fourth Variation Next, the isolator according to the fourth modified example will be described. The fourth modified example differs from the third modified example in that the pins 23 and 33, the semiconductor chips 20 and 30, and the isolator module 40 are connected by molded wiring instead of bonding wires W1, W2, W3, W4, W5, and W6. The following will mainly describe the configuration that differs from the third modified example.

[0065] The configuration of the isolator package 1 will be explained using Figures 13 and 14. Figure 13 is a plan view showing an example of the planar layout of the isolator package according to the fourth modified example. Figure 14 is a cross-sectional view along line XIV-XIV in Figure 13, showing an example of the cross-sectional structure of the isolator package according to the fourth modified example.

[0066] The isolator package 1 includes wirings I1, I2, I3, I4, I5, and I6 instead of bonding wires W1, W2, W3, W4, W5, and W6. The wirings I1, I2, I3, I4, I5, and I6 are molded wirings provided as a wiring pattern on the surface of semiconductor substrates S, semiconductor chips 20 and 30, and isolator modules 40, etc. The wirings I1, I2, I3, I4, I5, and I6 may be provided integrally with the semiconductor substrates S, semiconductor chips 20 and 30, and isolator modules 40. The wirings I1, I2, I3, I4, I5, and I6 may be formed using, for example, a plating process. The wirings I1, I2, I3, I4, I5, and I6 are sealed by an insulating member 50, similar to the bonding wires W1, W2, W3, W4, W5, and W6.

[0067] The wiring I1 is provided, for example, on the surface of the isolator module 40, the semiconductor substrate S, and the semiconductor chip 20. At one end and the other end, the wiring I1 is electrically connected to the semiconductor chip 20 and the isolator module 40, respectively. In this way, the wiring I1 electrically connects the circuit 21 of the semiconductor chip 20 and the isolator module 40.

[0068] The wiring I2 is provided, for example, on the surface of a semiconductor substrate S or a semiconductor chip 20. At one end and the other end, the wiring I2 is electrically connected to the semiconductor chip 20 and the pins 23, respectively. In this way, the wiring I1 electrically connects the circuit 21 and the pins 23 of the semiconductor chip 20.

[0069] The wiring I3 is provided, for example, on the surface of the isolator module 40, the semiconductor substrate S, and the semiconductor chip 30. At one end and the other end, the wiring I3 is electrically connected to the semiconductor chip 30 and the isolator module 40, respectively. In this way, the wiring I3 electrically connects the circuit 31 of the semiconductor chip 30 and the isolator module 40.

[0070] The wiring I4 is provided, for example, on the surface of the semiconductor substrate S and the semiconductor chip 30. At one end and the other end, the wiring I4 is electrically connected to the semiconductor chip 30 and the wiring 62, respectively. In this way, the wiring I4 electrically connects the wiring 62 and the circuit 31 of the semiconductor chip 30.

[0071] The wiring I6 is provided, for example, on the surface of the semiconductor substrate S and the semiconductor chip 20. At one end and the other end, the wiring I6 is electrically connected to the semiconductor chip 20 and the wiring 61, respectively. In this way, the wiring I6 electrically connects the wiring 61 and the circuit 21 of the semiconductor chip 20.

[0072] The wiring I5 is provided, for example, on the surface of the semiconductor substrate S and the semiconductor chip 30. At one end and the other end, the wiring I5 is electrically connected to the semiconductor chip 30 and the pin 33, respectively. In this way, the wiring I5 electrically connects the circuit 31 and the pin 33 of the semiconductor chip 30.

[0073] The configuration of the isolator module 40 will be explained using Figures 15 and 16. Figure 15 is a perspective view showing an example of the structure of the isolator module according to the fourth modified example. Figure 16 is a cross-sectional view along line XVI-XVI in Figure 15, showing an example of the cross-sectional structure of the isolator module and wiring according to the fourth modified example.

[0074] The wiring I1 is electrically connected to the pad PU1. The wiring I1 is provided on the upper and side surfaces of the insulating portion 41 of the isolator module 40.

[0075] The wiring I2 is electrically connected to the pad PU2. The wiring I2 is provided on the upper and side surfaces of the insulating portion 41 of the isolator module 40.

[0076] This configuration also produces the same effects as the embodiment, the first modified example, the second modified example, and the third modified example.

[0077] According to the fourth modification, the isolator module 40 is connected to the semiconductor chips 20 and 30 by molded wiring. Furthermore, the semiconductor chips 20 and 30 are also connected to pins 23 and 33 by molded wiring. This configuration allows for greater flexibility in forming the wiring compared to connecting the isolator module 40, semiconductor chips 20 and 30, and pins 23 and 33 with bonding wires. This suppresses an increase in wiring length. Therefore, this configuration also suppresses an increase in the size (area) of the isolator package 1.

[0078] 3. Others The above-described embodiments, first modification, second modification, third modification, and fourth modification show cases in which coils C1 and C2 are provided within an insulator portion 41 composed of a single material, but the invention is not limited to this. As shown in Figure 17, an insulating member 42 different from the insulating portion 41 may be provided between coils C1 and C2 within the insulator portion 41. The insulating member 42 includes, for example, liquid crystal polymer (LCP) resin. Figure 17 is a cross-sectional view showing an example of the cross-sectional structure of an isolator module and wiring according to another example. Figure 17 shows the region corresponding to the cross-sectional view in Figure 6. With the above configuration, the insulation resistance of the isolator module 40 can be improved.

[0079] Although not shown in the diagram, the smaller outer diameter coil (of coils C1 and C2) may contain space inside. In other words, it is sufficient that coils C1 and C2 are electrically insulated from each other.

[0080] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]

[0081] 1…Isolator package 10, 101, 102, 161, 162… frames 11, 12, 13, 14… Adhesive components 20, 30... Semiconductor chips 21, 31... circuits W1, W2, W3, W4, W5, W6… Bonding wires I1, I2, I3, I5, I6…Wiring 23, 33... pin 40…Isolator Module 50…Insulating material PU1, PU2, PL1, PL2… pads BP...Conductor part S... Semiconductor substrate

Claims

1. A first coil and a second coil, each having a helix-like shape and a central axis along a first direction, A first insulator that seals the first coil and the second coil, It includes an isolator module, The first coil and the second coil are spaced apart from each other. Viewed from the first direction, the first coil is provided inside the second coil. Isolator.

2. At the upper end of the first coil, a first pad is connected to the upper surface of the first coil, At the lower end of the first coil, a second pad is connected to the lower surface of the first coil, At the upper end of the second coil, a third pad is connected to the upper surface of the second coil, At the lower end of the second coil, a fourth pad is connected to the lower surface of the second coil, The first chip and, The second chip, Furthermore, The first pad and the second pad are electrically connected to the first chip. The third pad and the fourth pad are electrically connected to the second chip. The isolator according to claim 1.

3. Of the first pad, the second pad, the third pad, and the fourth pad, the first pad and the second pad are provided adjacent to each other in the rotational direction with respect to the rotation axis along the first direction. Of the first pad, the second pad, the third pad, and the fourth pad, the third pad and the fourth pad are provided adjacent to each other in the rotational direction with respect to the axis of rotation along the first direction. The isolator according to claim 2.

4. Each of the first pad and the second pad is provided adjacent to the third pad and the fourth pad, respectively, in the rotational direction with respect to the axis of rotation along the first direction. The isolator according to claim 2.

5. Located below the isolator module, the second pad and the first chip are electrically connected to the first conductor, Located below the isolator module, the second conductor is electrically connected to the fourth pad and the second chip, To prepare further, The isolator according to claim 2.

6. The first chip and the first pad are electrically connected to the surface of the first chip and the surface of the isolator module by first wiring provided integrally with the first chip and the isolator module. The second chip and the third pad are electrically connected to the surface of the second chip and the surface of the isolator module by a second wiring provided integrally with the second chip and the isolator module. The isolator according to claim 2.

7. The first coil and the second coil are included in the same height range. The isolator according to claim 1.

8. The first coil and the second coil have a circular, elliptical, or polygonal shape when viewed from the first direction. The isolator according to claim 1.

9. A second insulator, different from the first insulator, is provided between the first coil and the second coil. Furthermore, The second insulator includes a liquid crystal polymer resin. The isolator according to claim 1.

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