Structure having a deformable conductor
Patent Information
- Application Number
- JP2024186955
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2018-08-22
- Filing Date
- 2024-10-23
- Publication Date
- 2026-09-14
- Estimated Expiration
- 2039-08-22
Smart Images

Figure 0007920250000001 
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Figure 0007920250000003
Abstract
Description
[[Background Art]]
[0001] (Cross-Reference to Related Applications) This application claims priority from U.S. Provisional Patent Application No. 62 / 721,538, filed on August 22, 2018, which is incorporated by reference.
[0002] (Copyright) A portion of the disclosure of this patent document contains material subject to copyright protection. The copyright owner has no objection to the facsimile reproduction of the present patent disclosure by any person, since it appears in the patent file or records of the Patent and Trademark Office, but otherwise reserves all copyrights whatsoever.
[0003] (Technical Field) The inventive principles of the present patent disclosure generally relate to deformable conductive materials, and more specifically to structures having electrical connections and / or layers with deformable conductive materials, as well as methods of forming such structures. [[Summary of Invention]]
[0004] A circuit assembly may comprise a substrate and a pattern of contact points formed from a deformable conductive material supported by the substrate. The assembly may also comprise electrical components supported by the substrate and having terminals arranged in a pattern corresponding to the contact points. One or more terminals of an electrical component may contact one or more corresponding contacts to form one or more electrical connections between the electrical component and the contacts. The assembly may further comprise a pattern of conductive traces formed from a deformable conductive material supported by the substrate, where the conductive trace pattern is interconnected with the contact pattern. The assembly may further comprise a sealing material covering the electrical components and contacts. The contacts may be formed on the substrate. The contacts may be formed on the surface of the substrate. The contacts may be provided in recesses of the substrate. The assembly may further comprise an insulating material layer supported by the substrate, and the contacts may be provided in recesses of the insulating material layer. The contacts may be formed by vias in the insulating material layer. The electrical components may comprise surface mount components. The electrical components may comprise packaged integrated circuits. The electrical component may include a bare integrated circuit die. The substrate may include a flexible material. The substrate may include a stretchable material. At least a portion of the substrate may be adhesive. The electrical component may be attached to the substrate by adhesive.
[0005] A circuit assembly may comprise a substrate, a first insulating material layer supported by the substrate, having a pattern of channels formed therein, and a deformable conductive material disposed within the channels. The assembly may further comprise a second insulating material layer disposed to encapsulate the deformable conductive material disposed within the channels of the first insulating material layer. The second insulating material layer may comprise a pattern of contacts interconnected with the channels. The second insulating material layer may comprise a pattern of vias aligned with the channel pattern of the first insulating material layer. The assembly may further comprise a third insulating material layer supported by the second insulating material layer, having a pattern of channels formed therein. The second insulating material layer may comprise a pattern of vias aligned with the channel pattern of the first insulating material layer and the channel pattern of the third insulating material layer. The third insulating material layer may comprise a pattern of contacts interconnected with the channels of the third insulating material layer. The second insulating material layer may have a second pattern of vias aligned with the channel pattern of the first insulating material layer, the third insulating material layer may have a pattern of vias aligned with the second pattern of vias in the second insulating material layer, and the contact pattern of the third insulating material layer may have one or more of the via patterns of the third insulating material layer. The assembly may further include a fourth insulating material layer arranged to encapsulate a deformable conductive material placed within the channel of the third insulating material layer. The fourth insulating material layer may have a pattern of vias aligned with the channel pattern of the third insulating material layer. The second insulating material layer, the third insulating material layer and the fourth insulating material layer each have a pattern of vias aligned with each other and with the channel of the first insulating material layer. The assembly may further include an electrical component supported by the fourth insulating material layer, the electrical component having a terminal pattern, and two or more vias through the fourth insulating material layer forming a contact pattern corresponding to the terminal pattern of the electrical component.
[0006] A circuit assembly may comprise a substrate and a first insulating material layer having a first passage pattern comprising a deformable conductive material, which is attached to the substrate. The circuit assembly may further comprise a second insulating material layer having a second passage pattern comprising a deformable conductive material, which is attached to the first insulating material layer, where the second passage pattern communicates with the first passage pattern at least partially. The first passage pattern may comprise one or more traces, and the second passage pattern may comprise one or more vias. The circuit assembly may further comprise a third insulating material layer having a third passage pattern comprising a deformable conductive material, which is attached to the second insulating material layer, where the third passage pattern communicates with the second passage pattern at least partially. The first passage pattern may comprise one or more traces, the second passage pattern may comprise one or more vias, and the third passage pattern may comprise one or more traces. The circuit assembly may further comprise a fourth insulating material layer having a fourth passage pattern comprising a deformable conductive material, which is attached to the third insulating material layer. Here, the fourth passage pattern communicates with the third passage pattern at least partially. The first passage pattern may have one or more traces, the second passage pattern may have one or more vias, the third passage pattern may have one or more traces, and the fourth passage pattern may have one or more vias.
[0007] The method may include the steps of laminating a first insulating material layer having one or more passages onto a substrate, depositing a deformable conductive material into at least one of the passages in the first insulating material layer, and laminating a second insulating material layer on the first insulating material layer, wherein the second insulating material layer at least partially encapsulates the deformable conductive material into at least one of the passages in the first insulating material layer. At least one of the passages in the first insulating material layer may penetrate the entire thickness of the first insulating material layer. The step of depositing a deformable conductive material into at least one of the passages in the first insulating material layer may include the steps of overfilling the at least one passage with the deformable conductive material and removing the excess deformable conductive material from the surface of the first insulating material layer. The step of removing the excess deformable conductive material from the surface of the first insulating material layer may include the step of removing a release layer from the surface of the first insulating material layer. A method for a second insulating material layer having one or more passages, the method further comprising the steps of depositing a deformable conductive material in at least one of the passages in the second insulating material layer, and laminating a third insulating material layer on the second insulating material layer, wherein the third insulating material layer at least partially encapsulates the deformable conductive material in at least one of the passages in the second insulating material layer. At least one of the passages in the first insulating material layer may communicate with at least one of the passages in the second insulating material layer. At least one of the passages in the second insulating material layer may penetrate the entire thickness of the second insulating material layer. A method for a third insulating material layer having one or more passages, the method further comprising the steps of depositing a deformable conductive material in at least one of the passages in the third insulating material layer, and laminating a fourth insulating material layer on the third insulating material layer, wherein the fourth insulating material layer at least partially encapsulates the deformable conductive material in at least one of the passages in the third insulating material layer.
[0008] The method may include the steps of forming at least one contact on a substrate, wherein the contact is made of a deformable conductive material, and supporting an electrical component on the substrate, wherein the electrical component has at least one terminal, wherein at least one terminal of the electrical component is in contact with at least one of the contacts to form at least one electrical connection between the electrical component and the contact. The at least one terminal may comprise a plurality of terminals arranged in a pattern, the at least one contact may comprise a plurality of contacts arranged in a pattern corresponding to the pattern of the terminals of the electrical component, and the plurality of terminals of the electrical component may be in contact with the plurality of contacts to form a plurality of electrical connections between the electrical component and the contacts. [Brief explanation of the drawing]
[0009] [Figure 1] Figure 1 is an exploded view showing embodiments of circuit assemblies based on some of the inventive principles of this patent disclosure. [Figure 2] Figure 2 is a partially exploded perspective view of an exemplary embodiment of a circuit assembly according to some of the inventive principles of this patent disclosure. [Figure 3A] Figure 3A is a cross-sectional view along line AA in Figure 2, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of this patent disclosure. [Figure 3B] Figure 3B is a cross-sectional view along line AA in Figure 2, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of this patent disclosure. [Figure 3C] Figure 3C is a cross-sectional view along line AA in Figure 2, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of this patent disclosure. [Figure 3D] Figure 3D is a cross-sectional view along line AA in Figure 2, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of this patent disclosure. [Figure 3E]Figure 3E is a cross-sectional view along line AA in Figure 2, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of this patent disclosure. [Figure 4] Figure 4 is a partially exploded perspective view of another exemplary embodiment of a circuit assembly according to some of the inventive principles of this patent disclosure. [Figure 5A] Figure 5A is a cross-sectional view along line AA in Figure 4, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of this patent disclosure. [Figure 5B] Figure 5B is a cross-sectional view along line AA in Figure 4, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of the present patent disclosure. [Figure 5C] Figure 5C is a cross-sectional view along line AA in Figure 4, illustrating details of several possible exemplary implementations and alternative embodiments of some inventive principles of the present patent disclosure. [Figure 6] Figure 6 is a partially exploded perspective view of another exemplary embodiment of a circuit assembly according to some of the inventive principles of this patent disclosure. [Figure 7A] Figure 7A shows embodiments of a circuit assembly and a method for manufacturing a circuit assembly, based on some of the inventive principles of this patent disclosure. [Figure 7B] Figure 7B shows embodiments of a circuit assembly and a method for manufacturing a circuit assembly, based on some of the inventive principles of this patent disclosure. [Figure 8A] Figure 8A shows embodiments of a circuit assembly and a method for manufacturing a circuit assembly, based on some of the inventive principles of this patent disclosure. [Figure 8B] Figure 8B shows embodiments of a circuit assembly and a method for manufacturing a circuit assembly, based on some of the inventive principles of this patent disclosure. [Figure 9A] Figure 9A shows embodiments of a circuit assembly and a method for manufacturing a circuit assembly, based on some of the inventive principles of this patent disclosure. [Figure 9B] FIG. 9B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 10A] FIG. 10A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 10B] FIG. 10B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 11A] FIG. 11A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 11B] FIG. 11B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 12A] FIG. 12A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 12B] FIG. 12B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 13A] FIG. 13A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 13B] FIG. 13B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 14A] FIG. 14A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 14B] FIG. 14B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 15A]FIG. 15A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 15B] FIG. 15B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 16] FIG. 16 is a cross-sectional view illustrating another embodiment of a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 17] FIG. 17 is a cross-sectional view illustrating another embodiment of a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 18] FIG. 18 is a plan view and a cross-sectional view, respectively, of a via structure in accordance with some inventive principles of the present patent disclosure. [Figure 19] FIG. 19 is a plan view and a cross-sectional view, respectively, of a via structure in accordance with some inventive principles of the present patent disclosure. DETAILED DESCRIPTION OF EMBODIMENTS
[0010] The details of the embodiments and exemplary implementations set forth below are for illustrative purposes. The drawings are not necessarily drawn to scale. The principles of the present invention are not limited to these embodiments and details.
[0011] Some of the inventive principles of the present patent disclosure relate to electrical connections between a component and a deformable conductive material in a circuit assembly.
[0012] Figure 1 is an exploded view showing an embodiment of a circuit assembly according to some of the inventive principles of the present patent disclosure. The embodiment in Figure 1 comprises a substrate 100, which is supported by the substrate and has a pattern of contacts 102 formed from a deformable conductive material. An electrical component 104 is also supported by the substrate 100 and has one or more terminals 106 arranged in a pattern corresponding to the pattern of contacts 102. The terminals 106 are located at the bottom of the electrical component 104 and are therefore shown by dashed lines (phantom diagram). One or more of the terminals 106 of the electrical component 104 may contact one or more of the corresponding contacts 102 to form one or more electrical connections between the electrical component and the contacts. One or more terminals 106 may contact one or more contacts 102 when the electrical component 104 is mounted on the substrate 100, brought close to the substrate 100, or supported by the substrate 100, for example, as indicated by arrow 108. Therefore, some of the principles of the present invention enable the creation of electrical connections without any other conventional processes for soldering or creating electrical connections.
[0013] The contacts 102 may be supported by the substrate 100, for example, by being formed directly on the surface of the substrate, by being provided in a recess within the substrate, by being formed on another material layer on the substrate, or by other means. The electrical components 104 may be supported by the substrate 100, for example, by being mounted directly on the surface of the substrate, by being mounted on another component supported by the substrate, by being supported by the pattern of contacts 102, or by other means.
[0014] The assembly in Figure 1 is supported by a substrate and may further comprise a pattern of conductive traces formed from a deformable conductive material. The conductive trace pattern may be interconnected with a pattern of contacts.
[0015] The embodiment shown in Figure 1 can be implemented using a wide variety of materials and components. For example, the substrate may be made from plastic materials, including any silicon-based material such as polydimethylsiloxane (PDMS), thermoplastic polyurethane (TPU), ethylene propylene dienate polymer (EPDM), neoprene, polyethylene terephthalate (PET), and epoxy and epoxy-based materials, or from natural or synthetic rubber, cloth, wood, leather, paper, glass fiber and other composite materials, as well as other insulating materials and / or combinations thereof.
[0016] Deformable conductive materials may be provided in any form including liquids, pastes, gels, and powders, or in other forms having deformable properties including softness, flexibility, stretchability, bendability, elasticity, fluidity, viscoelasticity, or other Newtonian and non-Newtonian properties. Deformable conductive materials include, but are not limited to, deformable conductors containing conductive gels such as gallium indium alloy (also known as "Metal Gel"). Several examples thereof are disclosed in international patent application PCT / US2017 / 019762, filed on 27 February 2017, which is incorporated by reference. This application was published on 8 September 2017 under international publication number WO2017 / 151523A1, which is also incorporated by reference. Other suitable electroactive materials include any conductive metals, including gold, nickel, silver, platinum, and copper; semiconductors based on silicon, gallium, germanium, antimony, arsenic, boron, carbon, selenium, sulfur, and tellurium; semiconductor compounds, including gallium arsenide, indium antimonide, and oxides of many metals; organic semiconductors; and conductive nonmetallic materials such as graphite. Other examples of conductive gels include gels based on graphite or other allotropes of carbon, ionic compounds, or other gels.
[0017] Electrical components may include, but are not limited to, integrated circuits, transistors, diodes, LEDs, capacitors, resistors, inductors, switches, terminals, connectors, displays, sensors, printed circuit boards, or other devices, and may be any electrical, electronic, electromechanical, or other electrical component. Electrical components may be in the form of bare components or may be partially or completely encapsulated in various types of packages. For integrated circuits and other semiconductors, a wide range of package types can be used, as will be described in more detail below. Integrated circuits may also be used in the form of dies or bare dies that are mounted on a substrate, such as a chip-scale device, but are not completely encapsulated in a package.
[0018] The contact pattern can include any number and arrangement of contacts (including a single contact) depending on the number and arrangement of terminals on one or more electrical components, as well as the number and arrangement of electrical connections.
[0019] Figure 2 is a partially exploded perspective view of exemplary embodiments of a circuit assembly according to some of the inventive principles of this patent disclosure. The embodiment in Figure 2 comprises an integrated circuit (IC) 116 in a surface mount package having terminals in the form of leads 118A-118F. A substrate 110 has a pattern of contacts 112A-112F (collectively referred to as 112) made of a deformable conductive material and arranged to fit the footprints of the leads 118A-118F (collectively referred to as 118) on the integrated circuit 116. In this example, the contacts are formed in the form of solder pads conventionally used to create electrical connections between the IC and a printed circuit board. Conductive traces 114A-114F (collectively referred to as 114), which may be made of a deformable conductive material, are connected to the contacts 112A-112F and terminate at the edges of the substrate 110 in this figure. Traces 114A-114F may be used, for example, to connect the integrated circuit 116 to other components, circuits, terminals, etc. Leads 118A to 118F make contact with the corresponding contacts 112A to 112F when the integrated circuit 116 is placed on the substrate, as indicated by arrow 120.
[0020] In the embodiment shown in Figure 2, the contacts 112 and traces 114 are formed on the upper surface of the substrate 110 and protrude upward by, for example, flexographic printing, block printing, jet printing, 3D printing, stenciling, masked spraying, screen printing by extrusion, rolling or brushing, pattern deposition, or any other suitable technique.
[0021] Figures 3A to 3E are cross-sectional views along line AA in Figure 2, illustrating details of several possible exemplary implementations and alternative embodiments.
[0022] Figure 3A shows the state of IC116 before it is placed on the substrate 110.
[0023] Figure 3B shows an IC 116 positioned on the substrate 110, forming ohmic contacts between the lead 118 and the contact 112. The IC 116 is fixed to the substrate 110 by an adhesive layer 122. In this example, the lead 118 offsets a portion of the deformable conductive material of the contact 112, which can conform to the shape of the lead 118 and provide additional surface area and improved electrical connectivity.
[0024] Figure 3C shows an embodiment similar to the embodiment in Figure 3B, but with a sealant 124 covering the integrated circuit 116, leads 118, contacts 112, and traces 114. The sealant 124 may also fill the space between the integrated circuit 116, leads 118, and substrate 110. Examples of suitable materials for the sealant 124 include silicon-based materials such as PDMS, urethane, epoxy, polyester, polyamide, varnish, and any other material that can provide a protective coating and / or help hold the assembly together.
[0025] Figure 3D shows an embodiment in which the integrated circuit 116 is in direct contact with the substrate 110, which may be used, for example, when the encapsulant provides sufficient strength to hold the integrated circuit 116 to the substrate 110, or when the substrate 110 is made from an inherently adhesive or tacky material. In this embodiment, the lead 118 may be further pressed into the contact 112.
[0026] Figure 3E shows an embodiment in which an additional material layer 126 is mounted on the upper surface of the substrate 110 and positioned beneath the pattern of contacts 112. Layer 126 can perform a variety of functions. For example, in a mounting where the substrate is manufactured from a flexible or stretchable material, layer 126 may be manufactured from a more rigid or less stretchable material to prevent bending or stretching of the area of the substrate directly beneath the integrated circuit or other electrical component, which could cause poor connections between the terminals 118 of the integrated circuit 116 and the contacts 112. As another example, layer 126 can perform a heat sinking or heat dissipating function for the integrated circuit 116 or other electrical component. Alternatively, the additional layer 126 may be positioned beneath the substrate 110, within the substrate, or at any other suitable location. Layer 126 may be formed as a continuous sheet of material, or it may be patterned to have openings for, for example, some or all of the contacts 112, traces 114, the integrated circuit 116, or other components. Examples of materials that can be used for layer 126 include forms such as TPU, glass fiber, PET, and other relatively rigid or non-stretchable materials.
[0027] Figure 4 is a partially exploded perspective view of another exemplary embodiment of a circuit assembly according to some of the inventive principles of this patent disclosure. The embodiment in Figure 4 is similar to the embodiment in Figure 2, except that the contacts 126A-126F are formed by recesses in a substrate 128 that are partially or completely filled with a deformable conductive material. The embodiment in Figure 4 also includes traces 130 provided in the recesses in the substrate.
[0028] Recesses in a substrate may be formed by removing portions of a sheet of material by drilling, routing, etching, cutting, or any other method or combination thereof, using mechanical optics (e.g., laser), chemical, electrical, ultrasonic, or other apparatus to remove the material. Alternatively, the substrate may be formed to have recesses therein by molding, casting, 3D printing, or other forming processes. Deformable conductive material may be deposited in the recesses by any of the processes described above, including printing, stenciling, spraying, rolling, brushing, and any other techniques for depositing material into the recesses. Furthermore, the recesses may be overfilled with deformable conductive material, and any suitable technique, including scraping, rolling, brushing, etc., may be used to remove the excess material so that it is coplanar with the periphery surface of the substrate, or slightly above or below the periphery surface of the substrate, as described in more detail below.
[0029] Figures 5A to 5C are cross-sectional views along line AA in Figure 4, illustrating details of several possible exemplary implementations and alternative embodiments.
[0030] Figure 5A shows the state of IC132 before it is placed on the substrate 128.
[0031] Figure 5B shows an IC 132 positioned on a substrate 128, forming an ohmic contact between the lead 134 and the contact 126. In this example, the IC 132 is directly mounted to a substrate 110, which may have, for example, a self-adhesive surface. Alternatively, the IC 132 may be mounted to the substrate using an adhesive or any other suitable technique. In this example, the lead 134 protrudes downward into the contact 126, displacing a portion of the deformable conductive material, which can conform to the shape of the lead 134 and provide additional surface area and an improved electrical connection.
[0032] The integrated circuits shown in Figures 2, 3A-3E, 4, and 5A-5B are packaged in surface-mount packages such as SOT23-6 (small outline transistor with six leads) packages, but any other type of IC package and electronic component can be used according to the inventive principles of this patent disclosure. For example, a leadless chip carrier may have terminals with flat lead surfaces that provide a good contact area to any of the disclosed contacts without disturbing the pattern of deformable conductive material. Several other types of packages that may work well include packages with protruding solder structures, such as ball grid arrays (BGAs) and wafer-level chip-scale packaging (WL-CSPs), and packages with slightly protruding leads, such as leaded chip carriers. Their solder structures or leads can sink slightly into the contacts, creating reliable ohmic connections without displacement of deformable conductive material that would disturb the pattern.
[0033] Figure 5C shows an embodiment in which a chip-scale package 136 having solder bumps 138 is bonded to a substrate 128.
[0034] Figure 6 shows an embodiment in which an additional material layer 142 is attached to the surface of the substrate 140 after the contact 144 and trace 146 patterns have been formed, but before the integrated circuit 148 is mounted. Layer 142 may be similar to, for example, layer 126 in the embodiment of Figure 3E. In this embodiment, layer 142 provides openings for the contact 144.
[0035] In addition to packaged integrated circuits and other devices, bare integrated circuit dies and other components may be used in accordance with the inventive principles of this patent disclosure. For example, an IC die having bonding pads or contact pads may be mounted on a substrate having a coplanar or protruding pattern of contacts corresponding to the pattern of bonding pads or contact pads on the die. This typically requires mounting the die upside down (i.e., with the bonding pads or contact pads facing the top surface of the substrate) so that the contacts, which include a deformable conductive material, form an ohmic connection with the bonding pads or contact pads.
[0036] In the embodiments of Figures 4, 5A to 5C, and 6, the deformable conductive material is generally shown to be coplanar with the surface of the substrate. However, the deformable conductive material may alternatively be formed to sink from the surface of the substrate (i.e., to be recessed downwards) or to rise from the surface of the substrate (i.e., to be projected upwards). For example, the material may be formed to sink from the surface by partially filling some or all of the recess with the material, or by removing some of the material by scraping, brushing, gouging, etching, evaporation, etc. Alternatively, the material may be formed to rise from the surface by pattern depositing, stenciling, various forms of printing, etc. In some embodiments, the material may be formed to rise from the surface by using a release layer having a pattern that matches the pattern of the recess. The release layer may be placed on the substrate, the pattern of the recess may be overfilled, and then scraped off coplanar with the top surface of the release layer. The release layer can then be removed, leaving the protruding material in a manner similar to that of the embodiments described below.
[0037] In the embodiments of Figures 2, 3A–3E, 4, 5A–5C, and 6, the contacts and traces are generally shown on the surface of the substrate or extend partway into the substrate. In other embodiments, some or all of the contacts and / or traces may extend through the entire thickness of the substrate. For example, the contacts may be mounted as vias through the substrate and may function as layers in one of the embodiments described below.
[0038] Some additional inventive principles of this patent disclosure relate to circuit assemblies comprising a layer having passages containing a deformable conductive material. The inventive principles relating to electrical connections and the inventive principles relating to the layer having passages are independent principles with independent utility. However, some additional inventive principles of this patent disclosure can bring about more inventive principles in a way that can combine some of these separate principles to provide synergistic results.
[0039] Figures 7A and 7B to 15A and 15B illustrate embodiments of circuit assemblies and methods for manufacturing circuit assemblies according to some of the inventive principles of this patent disclosure. Figures 7B, 8B, 9B, 10B, 11B, 12B, 13B, 14B and 15B are cross-sectional views along line AA in the perspective views of Figures 7A, 8A, 9A, 10A, 11A, 12A, 13A, 14A and 15A, respectively.
[0040] Figure 7A is a perspective view of the substrate 150, the first insulating material layer (first layer) 152, and the release layer 154. Figure 7B is a cross-sectional view along line AA in Figure 7A. The substrate 150 and the first layer 152, as well as the insulating layers shown in Figures 8A and 8B to 15A and 15B, can be manufactured from the insulating materials described above with respect to the embodiment of Figure 1. For example, the substrate 150 and the first layer 152 may be manufactured from a stretchable TPU or epoxy-based material. The substrate 150 may generally be an uninterrupted sheet of material. On the other hand, the first insulating material layer 152 and the release layer 154 have a pattern of passages 156 and 158, in this example the channels are cut through their entire thickness to create a mask or stencil. The release layer 154, which may be thinner than the first layer, is laminated on the first layer 152 and may be manufactured from any of the insulating materials described above with respect to the embodiment of Figure 1. For example, the release layer 154 can be manufactured from a thin layer of PET. In embodiments in which the release layer 154 is ultimately removed, the release layer 154 may be manufactured from a metallized plastic or other conductive material, as well as a conductive material containing an alloy or a pure form of metal.
[0041] The passages 156 and 158 may be formed in the first insulating material layer 152 and the release layer 154 using any suitable subtractive technique such as laser cutting, drilling, routing, die cutting, or waterjet cutting. In other embodiments, the first layer 152 and / or the release layer may be formed by an additive manufacturing technique such as 3D printing or pattern deposition.
[0042] Figure 8A is a perspective view of the substrate 150 and the first insulating material layer 152 after the first layer has been laminated onto the substrate. Figure 8B is a cross-sectional view along line AA in Figure 8A. The substrate 150 and the first insulating material layer 152 may be bonded, fused, or cured together, or attached to each other by any suitable process and / or other method using any suitable material. For example, if the substrate 150 and the first layer 152 are manufactured from TPU or other thermoplastic resins, they may be bonded together by heat and pressure. As another example, if the substrate 150 and the first layer 152 are manufactured from an inherently adhesive material such as some epoxy-based material, they may be bonded together by pressing these layers together. In yet another example, the substrate 150 and the first layer 152 may be manufactured from a UV-curable material and exposed to a UV light source after lamination. The lamination and bonding of the two layers may close the bottoms of channels 156 and 158, resulting in little to no leakage when they are filled with material.
[0043] Figure 9A is a perspective view of the substrate 150, the first insulating material layer 152, and the release layer 154 after channels 156 and 158 have been overfilled with the deformable conductive material 160.
[0044] Referring to Figures 9A and 9B, channels 156 and 158 are overfilled with a deformable conductive material 160, which can be implemented with any of the deformable conductive materials described above in relation to the embodiment of Figure 1. For example, a conductive gel can be used as the deformable conductive material. The material may be overfilled using any suitable technique such as extrusion, rolling, swabbing, spraying, printing, brushing, or deposition. In one embodiment, cotton swabs may be used to overfill the channel 156 and 158 with the deformable conductive material.
[0045] Referring to Figures 10A and 10B, excess deformable conductive material 160 may be removed from the surface of the release layer 154 by scraping it off with a tool 162, as indicated by arrow 164. This causes the excess material to form a mound 166 in front of the tool 162, which helps fill the underfilled areas of channels 156 and 158. The excess material may be discarded or recycled for use with other assemblies. Examples of items that may be used for the tool 162 include a straight-edge ruler, squeegee, spatula, scraper blade, etc. In other embodiments, the excess deformable material can be removed using alternative techniques such as rolling, brushing, or etching. In one embodiment, a roller pre-loaded with deformable conductive material can be used to perform both the application of the material and the removal of the excess material by pushing it from underneath the roller in a single step.
[0046] Referring to Figures 11A and 11B, the deformable conductive material is shown substantially coplanar with the upper surface 167 of the release layer 154, with all or most of the excess material removed. Depending on the technique used to remove the excess material, there may still be a thin patch of deformable conductive material remaining on the upper surface of the release layer 154. Therefore, the release layer may be removed by peeling it off, for example, as shown in Figures 12A and 12B, leaving a clean upper surface 168 on the first insulating material layer 152.
[0047] The deformable conductive material 160 within channels 156 and 158 is shown substantially coplanar with the top surface 168 of the first insulating material layer 152 in Figures 12A and 12B. This can be achieved by using a release layer that is thin enough (e.g., a few microns, tens of microns, or thousands of an inch thick) for the remaining deformable conductive material to be effectively coplanar. In some embodiments, the thickness of the release layer 154 may be exaggerated in Figures 7A and 7B to 11A and 11B. In some embodiments, if it is necessary to avoid only small protrusions, a small amount of deformable conductive material 160 can be removed from channels 156 and 158 by scraping, brushing, etc., before removing the release layer 154, thereby keeping the deformable conductive material 160 coplanar with the top surface 168 of the first insulating material layer 152.
[0048] In some embodiments, it may be beneficial to slightly raise the deformable conductive material 160 from the surface. In some embodiments, the thickness of the release layer 154 may be intentionally set to a value that allows the deformable conductive material 160 to protrude by a predetermined amount above the upper surface 168 of the first insulating material layer 152.
[0049] The structures shown in Figures 12A and 12B are useful when manufactured or as a base for additional layers. For example, when manufactured, they can be used as a pattern for contact pads and engage with terminals of electrical components that can be mounted on or supported by the first layer 152, as described above with respect to Figures 1 to 6. In such applications, it is beneficial for the deformable conductive material 160 to protrude above the upper surface 168 of the first insulating material layer 152, for example, to engage better with the terminals of electrical components. The patterns of the conductive channels 156 and 158 may be modified to include conductive passages of different numbers, sizes, shapes, etc., to function as contacts and / or traces.
[0050] When manufactured, the embodiments shown in Figures 12A and 12B, or embodiments with modified channel patterns, may be used as circuit elements themselves. For example, channels 156 and 158 filled with the deformable conductive material 160 can function as transmission lines such as striplines or in circuit capacitors. In such implementations, a sealing layer may be formed to cover the top of layer 152 to encapsulate and protect the deformable conductive material 160.
[0051] As described above, structures such as those shown in Figures 12A and 12B, or structures having modified passage patterns, can be used as a base for additional layers. For example, referring to Figures 13A and 13B, a second insulating material layer (second layer) 170 is laminated on top of the first layer 152. The second layer 170 may have a passage pattern, at least one of which communicates with one or more passages in the first layer 152. In the example of Figures 13A and 13B, the pattern comprises through vias 172 and 174 that align with traces formed by channels 156 and 158, respectively, in the first layer 152. Other portions of the second layer 170 may serve to encapsulate deformable conductive material within the portions of channels 156 and 158 in the first layer 152. The second layer 170 and the vias 172 and 174 may be formed and mounted using any of the materials and techniques disclosed for the first layer 152, including the use of a release layer. For the sake of simplicity, the intermediate steps in which the second layer 170 is formed and attached are not shown, and the second layer is shown in its final form in Figures 13A and 13B.
[0052] As shown in Figure 13B, vias 172 in the second layer 170 align with and communicate with a portion of the channel 156 in the first layer 152. Therefore, when vias 172 are filled with a deformable conductive material, they form a continuous conductive structure with the channel 156.
[0053] The vias 172 and 174 in the second layer 170 can perform many functions. For example, they can function as contacts for one or more electrical components, and they can function as circuit elements themselves, for example, as transmission lines or sensors. They can also electrically connect traces formed by channels 156 and 158 in the first layer 152 to traces in another layer above the second layer, etc. The patterns of vias 172 and 174 shown in Figures 13A and 13B are merely examples, and the patterns may be modified to include any number, shape, arrangement, etc., of conductive passages.
[0054] Referring to Figures 14A and 14B, a third insulating material layer (third layer) 176 is laminated on the second insulating material layer 170. The third layer 176 may have a passage pattern, at least one of which communicates with one or more passages in the second layer 170. In the example of Figures 14A and 14B, the pattern comprises channels 178 and 180 that align with vias 172 and 174 in the second layer 170, respectively. The third layer 176 and the channels 178 and 180 may be formed and attached using any of the materials and techniques disclosed for the first layer 152 and the second layer 170, including the use of a release layer. For the sake of brevity, the intermediate steps in which the third layer 176 is formed and attached are not shown, and the third layer is shown in its final form in Figures 14A and 14B.
[0055] Similar to the pathway patterns in the first layer 152 and the second layer 170, the channel patterns 178 and 180 in the third layer 176 can serve many functions. For example, they can function as contacts for one or more electrical components, they can function as circuit elements themselves, for example, as transmission lines or sensors, or they can function as traces electrically connected to vias 172 and 174 in the second layer 170. The channel patterns 178 and 180 shown in Figures 14A and 14B are merely examples, and their patterns may be modified to include any number, shape, arrangement, etc., of conductive pathways.
[0056] Referring to Figures 15A and 15B, a fourth insulating material layer (fourth layer) 182 is laminated on the third insulating material layer 176. The fourth layer 182 may have a passage pattern, at least one of which communicates with one or more passages in the third layer 176. In the example of Figures 15A and 15B, the pattern comprises pads 184 and 186 that align with channels 178 and 180 in the third layer 176, respectively. Other portions of the fourth layer 182 may serve to encapsulate a deformable conductive material within the portions of channels 178 and 180 in the third layer 176. The fourth layer 182 and the pads 184 and 186 may be formed and attached using any of the materials and techniques disclosed for the first layer 152, the second layer 170, and the third layer 176, including the use of a release layer. For the sake of simplicity, the intermediate steps to which the fourth layer 182 is formed and attached are not shown, and the fourth layer is shown in its final form in Figures 15A and 15B.
[0057] Similar to the pathway patterns in other layers, the patterns of pads 184 and 186 in the fourth layer 182 can perform many functions. For example, they can function as contacts for one or more electrical components, and they can function as circuit elements themselves, for example, as transmission lines or sensors. They can also function as vias that electrically connect channels 178 and 180 in the third layer 182 to pathways in additional layers above the fourth layer 182. Furthermore, they can also function as contacts to create “hard-to-soft” connections between rigid external terminals and deformable conductive materials. The patterns of pads 184 and 186 shown in Figures 15A and 15B are merely examples, and their patterns may be modified to include any number, shape, arrangement, etc., of conductive pathways.
[0058] As shown in Figure 15B, there is a single continuous conductive path through channel 156 in the first layer 152, via 172 in the second layer 170, channel 178 in the third layer 176, and pad 184 in the fourth layer 182. The layers and paths in the embodiments shown in Figures 7A and 7B to 15A and 15B are for illustrative purposes only and can be modified to create any type of circuit configuration. For example, the order of the via and pad layers, as well as the layers with traces, can be changed. Some layers can include both traces and vias and pads.
[0059] In some exemplary embodiments, one or more of the insulating layers may be formed of a TPU such as Lubrizol Estane 58000 series, e.g., 58238, or a stretchable epoxy material. Stretchable epoxy materials may also provide a self-adhesive surface for bonding electrical components to the layers and for bonding the layers to each other. Other examples of adhesive materials include thermally activated adhesives such as polyurethane (PU) adhesives (e.g., Bemis or Framis), thermosetting adhesives with different chemical properties such as silicone, acrylic, or others, and pressure-sensitive adhesives with any chemical properties.
[0060] Such materials can result in embodiments of circuit assemblies having sufficient flexibility and / or stretchability for use in medical electronic devices, clothing, etc., worn in close contact with or against a patient's body. In some embodiments, one or more release layers may be left at predetermined locations on the surface of the insulating material layer. In other embodiments, the release layer may be omitted entirely. The passages shown in the embodiments of Figures 7A and 7B to 15A and 15B are generally shown to extend completely through the insulating material layer. However, in other embodiments, some or all of the passages may extend only partway through one or more insulating material layers.
[0061] In some embodiments, electrical components may be integrated into the laminate (e.g., between layers). For example, one or more internal layers of the laminate may have cutout sections to accommodate the height of devices such as integrated circuit packages. In other embodiments, components such as resistors and / or capacitors, as well as smaller IC packages and bare IC dies, may be small enough to be placed between layers, especially if the layers are relatively soft and / or flexible.
[0062] Figure 16 is a cross-sectional view showing another embodiment of a circuit assembly according to some of the inventive principles of this patent disclosure. For illustrative purposes, the embodiment in Figure 16 is shown to have layers similar to those in Figure 15B, but the inventive principles are not limited to these details. The embodiment in Figure 16 comprises a layer, sublayer, or part of a layer (collectively referred to as the “sublayer”) 177 in which a pattern of conductive elements is formed in or on. In this example, the sublayer 177 is inserted between a second layer 170 and a third layer 176 on the right-hand portion of the laminate. The third layer 176 and the fourth layer 182 are formed with a step to correspond to the sublayer 177. In other embodiments, the sublayer may replace part of a layer, an entire layer, or be added as another layer. The sublayer 177 may be thinner than, thicker than, or the same thickness as any of the other layers.
[0063] Some or all of the conductive elements on layer 177 may be formed from any of the deformable conductive materials disclosed above. The pattern of conductive elements may also include a mixture of deformable and non-deformable conductive elements. Sublayer 177 is manufactured from any of the insulating materials disclosed above and mounted to the other layers as described above. The pattern of elements may include circuit elements such as traces, vias, pads, transmission lines, and sensors. The pattern of elements may be formed on sublayer 177 by any of the techniques described above. In some embodiments, it is beneficial to form some or all of the elements by a printing process such as a reel-to-reel (R2R) process. This allows for the creation of finer conductive elements, which may accommodate smaller electrical components or interconnects, or components or interconnects with generally different properties.
[0064] In the embodiment shown in Figure 16, the sublayer 177 has a pattern comprising two traces 188 and 190 connected to pads 192 and 194, respectively, which are aligned with terminals 196 and 198 on the electrical component 200. Vias 202 and 204 through the third layer 176 connect pads 192 and 194 to terminals 196 and 198, respectively. In this example, the electrical component 200 is shown as a bare integrated circuit die with terminals 196 and 198 formed as bonding pads or contact pads, but any other type of electrical component can be used. In this example, the IC die 200 is attached to the third layer 176 with adhesive, but it may be attached by any other method.
[0065] The pattern of conductive elements formed on the sublayer 177 may be interconnected with any other traces, vias, pads, components, etc. In the example of Figure 16, trace 190 on the sublayer 177 is electrically connected to trace 178 in layer 176 via a hybrid trace / via 208 formed in the stepped portion of layer 176 corresponding to the thickness of the sublayer 177. In other embodiments, the portion of layer 176 on the sublayer 177 may be omitted, and the fourth layer 182 may be formed on the plane formed by the remainder of layer 176 and the sublayer 177.
[0066] Figure 17 is a cross-sectional view showing another embodiment of a circuit assembly according to some of the inventive principles of the present patent disclosure. The embodiment of Figure 17 is similar to the embodiment of Figure 16, except that the entire third layer 176 beneath the IC die 200 is omitted, and vias 202 and 204 are also omitted. The IC die is attached to the upper surface of the sublayer 177 by an adhesive layer 206, and bonding or contact pads 196 and 198 are in direct contact with pads 192 and 194, respectively, formed from a deformable conductive material.
[0067] Figure 18 is a plan view of a via structure according to some of the inventive principles of this patent disclosure. Figure 19 is a cross-sectional view along line AA in Figure 18. Embodiments of Figures 18 and 19 can utilize any of the materials and manufacturing techniques described above and comprise a substrate 210 and a first insulating material layer 212 and a second insulating material layer 216 laminated on the substrate 210. The first layer 212 comprises a trace 214. The second layer comprises a via 218 formed on the trace 214 and communicating with the trace 214. As shown in Figure 18, the via 218 has a length that extends along the X-axis (compared to the Y-axis). Along the X-axis, the assembly of Figure 18 is subjected to strain, shear force, and / or tensile deformation. Extending the length of the via along the X-axis can provide a stronger connection between the via 218 and the trace 214, which tend to pass each other when the assembly is stretched along the X-axis.
[0068] The technique for stretching conductive elements in the expected stretching direction is shown in the context of vias in Figures 18 and 19, but can also be applied to any other passage, interconnect, or structure. In some embodiments, other aspects of the relative size and shape of vias, traces, and other features may be adjusted to accommodate the stretching. For example, in some embodiments, vias may have a diameter of about half the width of the trace.
[0069] Embodiments constructed according to the inventive principles of this patent disclosure may result in high-performance circuit assemblies that can reduce assembly costs by enabling the use of less expensive unpackaged electronic components and by eliminating the soldering step. Furthermore, embodiments constructed according to the inventive principles of this patent disclosure may provide improved reliability by reducing the heating associated with soldering by eliminating solder and by providing improved cooling by eliminating device packaging that can be an obstacle to heat dissipation.
[0070] The inventive principles of this patent disclosure can be modified in arrangement and detail without departing from the concept of the present invention, and such modifications and alterations are considered to fall within the scope of the following claims. The use of terms such as the first and second is for the purpose of distinguishing different components and does not necessarily imply the presence of two or more components.
Claims
1. The substrate layer, A trace pattern formed from a liquid-containing, expandable conductor, An insulating layer disposed on the substrate layer and encapsulating the pattern of the trace, A pattern of vias filled with a deformable conductor and electrically coupled to the pattern of the trace, A circuit assembly comprising an electrical component bonded to one of the insulating layer and the substrate layer, the electrical component having a terminal operably bonded to the deformable conductor filling the pattern of the via.
2. The circuit assembly according to claim 1, wherein the pattern of the via extends through the insulating layer and the substrate layer to the pattern of the trace.
3. The circuit assembly according to claim 2, wherein the electrical component is physically bonded to one of the surfaces of the insulating layer and the substrate layer.
4. The circuit assembly according to claim 3, wherein one of the insulating layer and the substrate layer includes an adhesive that physically bonds the electrical component to the surface of the insulating layer and the substrate layer.
5. The insulating layer includes a first insulating layer and a second insulating layer, The circuit assembly according to claim 1, wherein the substrate layer, the first insulating layer, and the second insulating layer are made of a stretchable material.
6. The circuit assembly according to claim 5, wherein the stretchable material is the same in the substrate layer, the first insulating layer, and the second insulating layer.
7. The circuit assembly according to claim 6, wherein the substrate layer is made of thermoplastic polyurethane.
8. The circuit assembly according to claim 1, wherein the liquid comprises an alloy containing gallium and indium.
9. The circuit assembly according to claim 1, wherein the terminals form a pattern of the terminals corresponding to the pattern of the vias.
10. The circuit assembly according to claim 1, wherein the deformable conductor comprises an electroactive material containing a conductive metal that electrically couples the terminal to the pattern of the trace.
11. The circuit assembly according to claim 1, wherein the stretchable conductor and the deformable conductor are the same.
12. The circuit assembly according to claim 1, wherein the terminal extends within the via.
13. The circuit assembly further includes a low-stretch material that is less stretchable than either the substrate layer or the insulating layer. The low-stretch material is bonded to one of the substrate layer and the insulating layer, The circuit assembly according to claim 1, wherein the electrical components are attached to the low-stretch material.
14. The circuit assembly according to claim 13, wherein the low-stretch material has higher rigidity than one of the substrate layer and the insulating layer to which it is bonded.
15. A method for manufacturing a circuit assembly, The steps include preparing the substrate layer and The steps of forming a trace pattern on the substrate layer, wherein the trace pattern includes an expandable conductor, and the expandable conductor includes a liquid. The steps include: placing an insulating layer on the substrate layer and encapsulating the pattern of the trace; The steps of forming a plurality of vias in one of the substrate layer and the insulating layer, and the plurality of vias being formed to communicate with the pattern of the trace, The steps include filling the plurality of vias with a deformable conductor so that the plurality of vias are electrically coupled to the pattern of the trace, A manufacturing method comprising the step of operably coupling an electrical component to a plurality of vias, wherein the electrical component is supported by the substrate layer and the insulating layer.
16. The manufacturing method according to claim 15, wherein the electrical component includes a plurality of terminals, and in the step of operably coupling the electrical component to the pattern of the plurality of vias, the plurality of terminals are electrically coupled to the pattern of the trace.
17. The manufacturing method according to claim 16, wherein the deformable conductor comprises an electroactive material containing a conductive metal that electrically connects the plurality of terminals to the pattern of the trace.
18. The manufacturing method according to claim 17, wherein one of the surfaces of the substrate layer and the insulating layer is composed of an adhesive that physically bonds the electrical components.
19. The electrical component includes a plurality of terminals, The manufacturing method according to claim 15, further comprising the step of recessing the plurality of terminals in one of the substrate layer and the insulating layer.
20. The manufacturing method according to claim 15, wherein the substrate layer and the insulating layer are made of an expandable material.
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