Method for manufacturing silicon carbide epitaxial wafers

Abstract

This application relates to the technical field of silicon carbide epitaxial wafers and discloses a silicon carbide epitaxial wafer and a manufacturing method thereof, which includes the following steps: S1. preparing a silicon carbide substrate, and sequentially growing a buffer layer and an epitaxial layer on the silicon carbide substrate under conditions required for epitaxial growth, thereby obtaining a first product; S2. sequentially immersing the first product in a first solution, a second solution, and a third solution for cleaning, and then cleaning it in a fourth solution, thereby obtaining a silicon carbide epitaxial wafer.

Description

[[Technical Field]]

[0001] Cross-Reference to Related Application The present disclosure claims priority to Chinese Patent Application No. 202211215338.X, filed on September 30, 2014, entitled "Silicon carbide epitaxial wafer and preparation method therefor", the disclosure of which is hereby incorporated by reference in its entirety into the present specification.

[0002] The present disclosure relates to the technical field of silicon carbide epitaxy, and in particular to a silicon carbide epitaxial wafer and a manufacturing method therefor. [[Background Art]]

[0003] Silicon carbide epitaxy is an extremely important part of the silicon carbide semiconductor industry, and the quality of epitaxy has a great influence on the performance of semiconductor devices. Minority carrier lifetime is directly related to device performance in subsequent manufacturing processes, such as on-resistance, breakdown field strength, switching speed, and the like. Minority carrier lifetime is the abbreviation of non-equilibrium minority carrier lifetime, which is a basic parameter of semiconductor materials, and directly reflects material quality and device characteristics. Therefore, how to improve and effectively control the carrier lifetime in silicon carbide wafers has become an important factor in the development of silicon carbide substrates and epitaxial wafer products. [[Summary of Invention]] [[Problem to be Solved by the Invention]]

[0004] To overcome the technical problem of how to effectively improve the minority carrier lifetime in silicon carbide epitaxial materials, which exists in related technologies, the object of this disclosure is to provide silicon carbide epitaxial wafers and a method for manufacturing the same. In this disclosure, the epitaxial process is combined with a cleaning process, and the minority carrier lifetime is increased by the cooperation of these two processes, thereby improving the quality of the epitaxial wafer. [Means for solving the problem]

[0005] To achieve the above objective, a first aspect of this disclosure provides a method for manufacturing silicon carbide epitaxial wafers. This manufacturing method includes the following steps:

[0006] S1: A silicon carbide substrate is prepared, and under the conditions necessary for epitaxial growth, a buffer layer and an epitaxial layer are sequentially grown on the silicon carbide substrate to obtain the first product.

[0007] S2: The first product is sequentially immersed and washed with the first solution, the second solution, and the third solution, and then washed with the fourth solution to obtain a silicon carbide epitaxial wafer. The first solution contains 10% to 98% by weight of sulfuric acid and 10% to 50% by weight of hydrogen peroxide. The second solution contains 5% to 30% by weight of aqueous ammonia and 10% to 50% by weight of hydrogen peroxide. The third solution contains 3% to 40% by weight of hydrochloric acid and 10% to 50% by weight of hydrogen peroxide. The fourth solution contains 1% to 15% by weight of hydrofluoric acid and 5% to 70% by weight of nitric acid.

[0008] A second aspect of this disclosure provides a silicon carbide epitaxial wafer manufactured by the manufacturing method according to the first aspect. [Effects of the Invention]

[0009] Through the technical solutions described above, this disclosure has the following beneficial effects.

[0010] In this disclosure, the epitaxial process and the cleaning process are closely combined, and the minority carrier lifetime in the epitaxial wafer can be improved by the cooperation of these two processes. In particular, the improvement in minority carrier lifetime is significant in medium-voltage epitaxial wafers (having a thickness of 8 μm to 20 μm), and no other external contamination is introduced in the method of this disclosure.

[0011] The advantages of the examples in this disclosure are partly described in the following description, partly evident from the specification, or may be learned through the practice of the examples in this disclosure.

[0012] The accompanying drawings are intended to provide a further understanding of this disclosure, constitute part of this specification, and are helpful in illustrating this disclosure along with modes for carrying out the inventions described below, but do not constitute a limitation of this disclosure. [Brief explanation of the drawing]

[0013] [Figure 1] This figure shows the mapping of minority carrier lifetime test results for silicon carbide epitaxial samples produced in Example 1 of this disclosure. [Figure 2] This figure shows the mapping of the test results for surface defects corresponding to the test specimens in Figure 1. [Figure 3] This figure shows the mapping of minority carrier lifetime test results in another silicon carbide epitaxial sample within the same batch of products manufactured in Example 1 of this disclosure. [Figure 4] This figure shows the mapping of the test results for surface defects corresponding to the test samples in Figure 3. [Modes for carrying out the invention]

[0014] The ranges and endpoints of any values ​​disclosed herein are not limited to exact ranges or values, and these ranges or values ​​should be interpreted as including values ​​close to these ranges or values. In the case of numerical ranges, to obtain one or more new numerical ranges (which should be interpreted as specifically disclosed herein), the values ​​of the endpoints of each range may be combined, the values ​​of the endpoints of each range may be combined with the values ​​of individual points, or the values ​​of individual points may be combined.

[0015] A first aspect of this disclosure provides a method for manufacturing silicon carbide epitaxial wafers. This manufacturing method includes the following steps:

[0016] S1: A silicon carbide substrate is prepared, and under the conditions necessary for epitaxial growth, a buffer layer and an epitaxial layer are sequentially grown on the silicon carbide substrate to obtain the first product.

[0017] S2: The first product is sequentially immersed and washed with the first solution, the second solution, and the third solution, and then washed with the fourth solution to obtain a silicon carbide epitaxial wafer. The first solution contains 10% to 98% by weight of sulfuric acid and 10% to 50% by weight of hydrogen peroxide. The second solution contains 5% to 30% by weight of aqueous ammonia and 10% to 50% by weight of hydrogen peroxide. The third solution contains 3% to 40% by weight of hydrochloric acid and 10% to 50% by weight of hydrogen peroxide. The fourth solution contains 1% to 15% by weight of hydrofluoric acid and 5% to 70% by weight of nitric acid.

[0018] In this disclosure, there are no specific restrictions on the silicon carbide substrate, and silicon carbide substrates commonly used in the art may be used. For example, the silicon carbide substrate may have a thickness of 300 μm to 400 μm. For example, the silicon carbide substrate may have a thickness of 300 μm, 320 μm, 350 μm, 370 μm, or 400 μm.

[0019] In step S2, metal ions on the surface of the epitaxial wafer are removed by washing with a fourth solution.

[0020] Step S2 further includes: after washing with the fourth solution, in order to obtain a silicon carbide epitaxial wafer, hydrofluoric acid on the surface of the epitaxial wafer is removed with diluted hydrochloric acid, then the epitaxial wafer is spray-washed with pure water, and dried by blowing under a nitrogen atmosphere.

[0021] During the growth process of the buffer layer and the epitaxial layer, desired flow rates of the carbon source, silicon source and doping source, as well as required growth conditions are selected according to conventional methods in the art.

[0022] It should be noted that the flow rate unit slm in the present disclosure can be understood as liters per minute. The flow rate unit sccm can be understood as standard cubic centimeters per minute. The pressure unit 1 Torr is equal to 1 mmHg.

[0023] In some examples, the conditions required for epitaxial growth include: a hydrogen flow rate of 10 slm to 200 slm, a hydrogen pressure of 0.1 Torr to 800 Torr, and a temperature of 1000°C to 2000°C. For example, the hydrogen flow rates are 10 slm, 50 slm, 100 slm, 150 slm, or 200 slm. The hydrogen pressures are 0.1 Torr, 1 Torr, 5 Torr, 10 Torr, 50 Torr, 100 Torr, 150 Torr, 200 Torr, 250 Torr, 300 Torr, 350 Torr, 400 Torr, 450 Torr, 500 Torr, 550 Torr, 600 Torr, 650 Torr, 700 Torr, 750 Torr, or 800 Torr. The temperature is 1000°C, 1100°C, 1200°C, 1300°C, 1400°C, 1500°C, 1600°C, 1700°C, 1800°C, 1900°C, or 2000°C. In some other examples, the conditions required for epitaxial growth include: a hydrogen flow rate of 50 slm to 150 slm, a hydrogen pressure of 1 Torr to 600 Torr, and a temperature of 1200°C to 1800°C. In some other examples, the conditions required for epitaxial growth include: a hydrogen flow rate of 80 slm to 120 slm, a hydrogen pressure of 200 Torr to 300 Torr, and a temperature of 1400°C to 1600°C.

[0024] According to this disclosure, the conditions required for epitaxial growth include, specifically, the following: The epitaxial furnace reaction chamber is evacuated until the internal pressure is less than 0.1 Torr. Hydrogen is introduced as the etching atmosphere, and the hydrogen flow rate is controlled to 10 slm to 200 slm. The pressure and temperature are set to the conditions required for epitaxial growth, with the pressure set to 0.1 Torr to 800 Torr and the temperature set to 1000°C to 2000°C.

[0025] In some examples, the steps for growing a buffer layer include: using hydrogen as the carrier gas; adjusting the flow rates of the first carbon source, the first silicon source, and the doping source to the flow rates required for buffer layer growth, controlling the temperature to 1000°C to 2000°C, and controlling the pressure to 0.1 Torr to 800 Torr. For example, the temperature may be 1000°C, 1100°C, 1200°C, 1300°C, 1400°C, 1500°C, 1600°C, 1700°C, 1800°C, 1900°C, or 2000°C. The pressures are 0.1 Torr, 1 Torr, 5 Torr, 10 Torr, 50 Torr, 100 Torr, 150 Torr, 200 Torr, 250 Torr, 300 Torr, 350 Torr, 400 Torr, 450 Torr, 500 Torr, 550 Torr, 600 Torr, 650 Torr, 700 Torr, 750 Torr, or 800 Torr.

[0026] In some examples, during the step for growing the buffer layer, the hydrogen flow rate is 10 slm to 200 slm, and the ratio of hydrogen-transported carbon to silicon is 0.1 to 10:1. For example, the hydrogen flow rates are 10 slm, 50 slm, 100 slm, 150 slm, or 200 slm. The ratio of hydrogen-transported carbon to silicon is 0.1:1, 0.5:1, 1:1, 1.5:1, 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 4.5:1, 5:1, 5.5:1, 6:1, 6.5:1, 7:1, 7.5:1, 8:1, 8.5:1, 9:1, 9.5:1, or 10:1, etc.

[0027] In some other examples, during the step of growing the buffer layer, the hydrogen flow rate is 50 slm to 150 slm, and the ratio of hydrogen-transported carbon to silicon is 1 to 8:1. In some other examples, during the step of growing the buffer layer, the hydrogen flow rate is 80 slm to 120 slm, and the ratio of hydrogen-transported carbon to silicon is 3 to 6:1.

[0028] In this disclosure, the ratio of carbon to silicon refers to the atomic ratio of carbon to silicon transported by introduced hydrogen.

[0029] According to this disclosure, during the growth of the buffer layer, the hydrogen flow rate is maintained within the range of 10 slm to 200 slm, and the ratio of hydrogen-transported carbon to silicon is controlled within the range of 0.1 to 10:1.

[0030] According to this disclosure, during the growth process of the buffer layer and the epitaxial layer, hydrogen is introduced as a carrier gas at its original flow rate without interruption.

[0031] According to this disclosure, doping sources help improve the conductivity of a product by introducing an excess valence of electrons or holes, i.e., charge carriers, into the product.

[0032] In some examples, the first carbon source includes at least one of ethylene and propane.

[0033] In some examples, the flow velocity of the first carbon source is 10 sccm to 500 sccm, for example, 12 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 75 sccm, 85 sccm, 95 sccm, 100 sccm, 150 sccm, 180 sccm, 200 sccm, 230 sccm, 275 sccm, 300 sccm, 355 sccm, 395 sccm, 400 sccm, 435 sccm, 455 sccm, 485 sccm, and any value within the range formed by any two of the above numbers. In some other examples, the flow velocity of the first carbon source is 200 sccm to 400 sccm.

[0034] In some examples, the first silicon source includes at least one of silane and trichlorosilane.

[0035] In some examples, the flow velocity of the first silicon source is 10 sccm to 500 sccm, for example, 12 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 75 sccm, 85 sccm, 95 sccm, 100 sccm, 150 sccm, 180 sccm, 200 sccm, 230 sccm, 275 sccm, 300 sccm, 355 sccm, 395 sccm, 400 sccm, 435 sccm, 455 sccm, 485 sccm, and any value within the range formed by any two of the above numbers. In some other examples, the flow velocity of the first silicon source is 200 sccm to 400 sccm.

[0036] In some cases, the doping source includes at least one of nitrogen and trimethylaluminum.

[0037] In some examples, the flow velocity of the doping source is between 1 sccm and 500 sccm, e.g., 12 sccm, 15 sccm, 20 sccm, 25 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 75 sccm, 85 sccm, 95 sccm, 100 sccm, 150 sccm, 180 sccm, 200 sccm, 230 sccm, 275 sccm, 300 sccm, 355 sccm, 395 sccm, 400 sccm, 435 sccm, 455 sccm, 485 sccm, and any value within the range formed by any two of the above numbers. In some other examples, the flow velocity of the doping source is between 200 sccm and 400 sccm.

[0038] In some examples, the steps for growing an epitaxial layer include: adjusting the flow velocities of a second carbon source and a second silicon source to the flow velocities required to grow the epitaxial layer; and during the epitaxial layer growth process, growing the epitaxial layer to a first thickness at a first growth rate, and then to a second thickness at a second growth rate, where the first rate is faster than the second rate.

[0039] According to this disclosure, step S1 is an epitaxial process, in which the epitaxial layer is grown in a manner that includes an initial rapid growth followed by slow growth. When the epitaxial layer has grown to about 75% to 90% of the epitaxial layer thickness, the growth rate is reduced to perform slow growth. Point defects such as color centers and deep energy level vacancies in silicon carbide are regulated by slow growth to reduce the scattering effect of neutral impurities. Thus, the conversion between SF (Stacking Fault) and BPD (Basal Plane Dislocations) is slowed down, the number of SF, BPD and black spots (tiny black spot defects that cannot be specifically identified) on the surface of the epitaxial wafer is significantly reduced, and thus the recombination of minority carriers on the surface is reduced.

[0040] During the growth process of the epitaxial layer, the second carbon source includes, in some examples, at least one of ethylene and propane.

[0041] In some examples, the flow velocity of the second carbon source is 50 sccm to 500 sccm, e.g., 80 sccm, 100 sccm, 150 sccm, 175 sccm, 200 sccm, 300 sccm, 350 sccm, 400 sccm, 450 sccm, 485 sccm, 495 sccm, and any value within the range formed by any two of the above numbers. In some other examples, the flow velocity of the second carbon source is 100 sccm to 450 sccm.

[0042] In some examples, the flow velocity of the second silicon source is between 10 sccm and 1000 sccm, for example, 20 sccm, 50 sccm, 100 sccm, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, 750 sccm, 850 sccm, 900 sccm, 950 sccm, and any value within the range formed by any two of the above numbers. In some other examples, the flow velocity of the second silicon source is between 10 sccm and 900 sccm.

[0043] In some examples, the second silicon source includes at least one of silane and trichlorosilane.

[0044] In some examples, the first growth rate is 10 μm / h to 100 μm / h, for example, 12 μm / h, 15 μm / h, 20 μm / h, 25 μm / h, 30 μm / h, 40 μm / h, 50 μm / h, 60 μm / h, 75 μm / h, 85 μm / h, 95 μm / h, and any value within the range formed by any two of the above numbers. In some other examples, the first growth rate is 35 μm / h to 85 μm / h.

[0045] In some examples, the second growth rate is 1 μm / h to 10 μm / h, for example, 2 μm / h, 3 μm / h, 5 μm / h, 6 μm / h, 7 μm / h, 8 μm / h, 9 μm / h, 9.5 μm / h, and any value within the range formed by any two of the above numbers. In some other examples, the second growth rate is 5 μm / h to 8 μm / h.

[0046] In some examples, the first thickness is 75% to 90% of the epitaxial layer thickness, for example, 78%, 80%, 82%, 84%, 85%, 88%, and any value within the range formed by any two of the above numbers. In some other examples, the first thickness is 80% to 85% of the epitaxial layer thickness.

[0047] In some examples, the second thickness is 10-25% of the epitaxial layer thickness, for example, 12%, 15%, 18%, 20%, 22%, 24%, and any value within the range formed by any two of the above numbers.

[0048] In some preferred examples, the thickness of the epitaxial layer is 8 μm to 20 μm, for example, 10 μm, 13 μm, 15 μm, 18 μm, and any value within the range formed by any two of the above values. In some other preferred examples, the thickness of the epitaxial layer is 10 μm to 18 μm.

[0049] In this disclosure, when the thickness of the epitaxial layer is 8 μm to 20 μm, the first thickness is 6 μm to 18 μm, for example, the first thickness is 7 μm to 14 μm, and furthermore, the first thickness is 8 μm to 10 μm.

[0050] As the thickness of the epitaxial layer decreases, the rates of surface recombination and bulk recombination slow down, and therefore the minority carrier lifetime is significantly improved. For specifications with a thickness of 8 μm to 20 μm, the increase in minority carrier lifetime is largely limited, and it is difficult to achieve a significant increase. In this disclosure, the epitaxial process and the cleaning process are closely combined, and the minority carrier lifetime in the epitaxial wafer can be improved by the cooperation of these two processes. In particular, the improvement in minority carrier lifetime is significant in medium-voltage epitaxial wafers (having a thickness of 8 μm to 20 μm), and no other external contamination is introduced in the method of this disclosure.

[0051] Specifically, in the growth process of the epitaxial layer, rapid growth (growth rates of 10 μm / h to 100 μm / h, e.g., 10 μm / h, 15 μm / h, 20 μm / h, 25 μm / h, 30 μm / h, 35 μm / h, 40 μm / h, 45 μm / h, 50 μm / h, 55 μm / h, 60 μm / h, 65 μm / h, 70 μm / h, 75 μm / h, 80 μm / h, 85 μm / h, 90 μm / h, 95 μm / h, 100 μm / h, and any value within the range formed by any two numbers) is performed first. After growing to approximately 8 μm to 10 μm, the growth rate is reduced to a slower rate (1 μm / h to 10 μm / h, for example, 1 μm / h, 2 μm / h, 5 μm / h, 7 μm / h, 10 μm / h, and any value within the range formed by any two of the above values), and the wafer is grown to approximately 1 μm to 2 μm to obtain a 4° off-axis silicon carbide epitaxial wafer substrate.

[0052] Due to the different use of graphite fittings in the furnace, the growth rate is calculated by dividing the measured epitaxial thickness by the growth time. During the experiment, the flow rates of the carbon and silicon sources, as well as their flow rate ratio, are initially set roughly, and then a sample wafer is grown to confirm the growth rate before formal growth is performed. The growth rate of the sample wafer is used as the growth rate in the formal experiment. If the current growth rate is 10 μm / h, the approximate flow rate of the second silicon source is 150 ccm to 250 ccm, e.g., 150 ccm, 170 ccm, 200 ccm, 220 ccm, 250 ccm, and any value within the range formed by any two of the above numbers, and the flow rate of the second carbon source is 60 ccm to 120 ccm, e.g., 60 ccm, 80 ccm, 100 ccm, 120 ccm, and any value within the range formed by any two of the above numbers.

[0053] The first growth rate is controlled by adjusting the flow velocity of the second silicon source to a range of 100 ccm to 1000 ccm, and the flow velocity of the second carbon source to a range of 80 ccm to 500 ccm. To control the second growth rate, the flow velocity of the second silicon source is 10 ccm to 80 ccm, and the flow velocity of the second carbon source is 50 ccm to 100 ccm.

[0054] In some examples, the manufacturing method further includes the following steps: Annealing the first product before washing the first product.

[0055] In some examples, the annealing step includes the following steps: stopping the introduction of the reaction gas, introducing hydrogen, or a mixture of hydrogen and an inert gas, at the growth temperature of the epitaxial layer, subjecting the first product to high-temperature annealing in a hydrogen-rich atmosphere, incubating for 1 to 2 hours, and then cooling to room temperature in the furnace.

[0056] In this step, the hydrogen flow rate is 1 slm to 50 slm, for example, 1 slm, 5 slm, 10 slm, 15 slm, 20 slm, 25 slm, 30 slm, 35 slm, 40 slm, 45 slm, and 50 slm. The inert gas is Ar or He, and the inert gas flow rate is 1 slm to 10 slm, for example, 1 slm, 5 slm, and 10 slm.

[0057] In this example, after the epitaxial growth of silicon carbide is complete, the silicon carbide epitaxy can be directly incubated without changing the equipment, thereby reducing time and production costs, lowering process complexity, and facilitating industrial advancement.

[0058] In some other examples of this disclosure, after the epitaxial growth of silicon carbide is complete, the first product may be transferred from the growth furnace to other high-temperature equipment for annealing. The atmosphere and temperature used in the annealing process are the same as those in the examples above and are not described herein.

[0059] Step S2 is a cleaning process. In this disclosure, by adjusting the composition of the solution and the cleaning sequence, metal ions on the surface of the epitaxial layer can be effectively removed, reducing the trapping effect of metal contamination on minority carriers on the surface of the epitaxial layer, inhibiting the recombination of minority carriers on the surface of the silicon carbide wafer, and further improving the minority carrier lifetime in the sample.

[0060] In some examples, the first solution is prepared by mixing 98% by weight concentrated sulfuric acid and 30% by weight hydrogen peroxide in a volume ratio of 1 to 3:1. For example, 98% by weight concentrated sulfuric acid and 30% by weight hydrogen peroxide are mixed in a volume ratio of 1:1, 2:1, or 3:1.

[0061] In some examples, the second solution is prepared by mixing 27 wt% aqueous ammonia, 30 wt% hydrogen peroxide, and pure water in volume ratios of 1:1 to 3:3 to 10. For example, 27 wt% aqueous ammonia, 30 wt% hydrogen peroxide, and pure water are mixed in volume ratios of 1:1:3 to 10, 1:2:3 to 10, 1:3:3 to 10, 1:1 to 3:3, 1:1 to 3:5, 1:1 to 3:7, 1:1 to 3:9, or 1:1 to 3:10.

[0062] In some examples, the third solution is prepared by mixing 37 wt% hydrochloric acid, 30 wt% hydrogen peroxide, and pure water in volume ratios of 1:1 to 5:5 to 15. For example, 37 wt% hydrochloric acid, 30 wt% hydrogen peroxide, and pure water are mixed in volume ratios of 1:1:5 to 15, 1:2:5 to 15, 1:3:5 to 15, 1:4:5 to 15, 1:5:5 to 15, 1:1 to 5:5, 1:1 to 5:7, 1:1 to 5:9, 1:1 to 5:10, 1:1 to 5:12, 1:1 to 5:13, or 1:1 to 5:15.

[0063] In some examples, the fourth solution is prepared by mixing 38 wt% hydrofluoric acid, 55 wt% nitric acid, and pure water in volume ratios of 1:1 to 3:3 to 10. For example, 38 wt% hydrofluoric acid, 55 wt% nitric acid, and pure water are mixed in volume ratios of 1:1:3 to 10, 1:2:3 to 10, 1:3:3 to 10, 1:1 to 3:3, 1:1 to 3:5, 1:1 to 3:7, 1:1 to 3:9, or 1:1 to 3:10.

[0064] In some examples, step S2 further includes the following steps: After washing with the fourth solution, hydrofluoric acid on the surface of the epitaxial wafer is removed with dilute hydrochloric acid, and then the epitaxial wafer is spray-washed with pure water and dried by blowing under a nitrogen atmosphere to obtain a silicon carbide epitaxial wafer.

[0065] In some cases, the dilute hydrochloric acid concentration is between 3% by weight and 15% by weight, for example, 3% by weight, 5% by weight, 7% by weight, 10% by weight, 12% by weight, 15% by weight, and any value within the range formed by any two of the above numbers.

[0066] A second aspect of this disclosure provides a silicon carbide epitaxial wafer produced by the manufacturing method described above.

[0067] In some preferred examples, the thickness of the epitaxial layer on a silicon carbide epitaxial wafer is 8 μm to 20 μm, for example, 10 μm, 13 μm, 15 μm, 18 μm, and any value within the range formed by any two of the above values. In some other examples, the thickness of the epitaxial layer on a silicon carbide epitaxial wafer is 10 μm to 18 μm.

[0068] In some examples, silicon carbide epitaxial wafers have minority carrier lifetimes of 100 ns to 320 ns, such as 100 ns, 120 ns, 150 ns, 180 ns, 200 ns, 220 ns, 250 ns, 280 ns, 300 ns, and 320 ns. In some other examples, silicon carbide epitaxial wafers have minority carrier lifetimes of 160 ns to 300 ns.

[0069] In this disclosure, minority carrier lifetime can be detected by minority carrier lifetime detection method (GB / T26068-2018).

[0070] In some examples, on the surface of silicon carbide epitaxial wafers, the total number of defects is 700 or less, the number of particles is 10 or less, the number of pits is 200 or less, both the SF and BPD numbers are 100 or less, the number of black spots is 200 or less, and the Fe contamination content is less than the order of E9, i.e., the Fe ion content is 10 9 atom / cm -2 The following applies:

[0071] In some other examples, on the surface of a silicon carbide epitaxial wafer, the total number of defects is 600 or less, the number of particles is 8 or less, the number of pits is 150 or less, both the SF and BPD numbers are 90 or less, the number of black spots is 180 or less, and the Fe contamination content is less than the order of E9, i.e., the Fe ion content is 10 9 atom / cm -2 The following applies:

[0072] In this disclosure, on the surface of a silicon carbide epitaxial wafer, particles represent particulate matter, pits represent depressions, SF represents stacking faults, BPD represents basal dislocations, and black spots represent minute black spot defects that cannot be specifically identified. The above parameters can be detected by a silicon carbide epitaxial defect detection method (GB / T17167-1997).

[0073] The Fe contamination content indicates the iron ion content, which can be detected by the metal ion contamination detection method (GB / T39145-2020).

[0074] The method described herein combines an epitaxial process and a cleaning process, and the cooperation of these two processes significantly improves the minority carrier lifetime, particularly for medium-voltage epitaxial wafers (8 μm to 20 μm).

[0075] During the epitaxial growth stage, epitaxial wafers have more point defects such as carbon vacancies and hydrogen impurities during the growth process. These lead to the formation of SFs, which slowly expand on the surface as they grow, forming BPDs. This results in more defects on the surface of the grown epitaxial wafer, such as SFs (stack faults), BPDs (basal dislocations), black spots (tiny black spot defects that cannot be specifically identified), and pits (depressions). The traps formed by these surface defects capture excited minority carriers, worsening the surface recombination effect. Furthermore, during the substrate processing and cleaning processes, a large amount of metal ions are introduced by processing equipment and chemical solutions. The surface charge of these metal ions also neutralizes minority carriers, resulting in a low minority carrier lifetime in the newly grown epitaxial wafer.

[0076] According to a particularly preferred example of this disclosure, a method for producing a silicon carbide epitaxial wafer having an epitaxial layer thickness of, for example, 8 μm to 20 μm, includes the following steps:

[0077] S1: The growth process includes the following steps.

[0078] S11: A silicon carbide substrate (with a thickness of 300 μm to 400 μm) is placed in the mounting position of the epitaxial furnace (a Class 100 environment, i.e., an environment with a cleanliness level of 100) and transferred to the epitaxial furnace reaction chamber by a mechanical arm. The reaction chamber is then evacuated so that the pressure inside the reaction chamber is less than 0.1 Torr.

[0079] S12: Hydrogen is introduced as the etching atmosphere. The hydrogen flow rate is 10 slm to 200 slm, and the pressure and temperature are set to the conditions required for epitaxial growth. The pressure is set to 0.1 Torr to 800 Torr, and the temperature to 1000°C to 2000°C. The flow rates of the carbon source, silicon source, and doping source are adjusted to the flow rates required for buffer layer growth (carbon source: 10 sccm to 500 sccm, silicon source: 10 sccm to 500 sccm, doping source: 1 sccm to 500 sccm). At this point, hydrogen is introduced steadily as a carrier gas at the original flow rate without stopping, and the carbon-to-silicon ratio (i.e., the atomic ratio of carbon to silicon in the introduced gas) is set to 0.1 to 10:1. All gas is vented until the temperature and pressure in the reaction chamber of the epitaxial furnace reach the required values.

[0080] S13: Once the temperature (1000°C~2000°C) and pressure (0.1 Torr~800 Torr) in the epitaxial furnace reaction chamber have reached the required levels and are showing signs of stabilization, gas and doping sources are introduced into the reaction chamber to grow a buffer layer with a thickness of 1 μm~5 μm. After growing the buffer layer, the flow rates of the carbon source and silicon source are adjusted to the flow rates required to grow the epitaxial layer (carbon source: 50 sccm~500 sccm, and silicon source: 10 sccm~1000 sccm). Rapid growth is performed first (growth rate of 10 μm / h~100 μm / h). Once the epitaxial layer has grown to 75%~90% of its thickness, the growth rate is reduced. By performing slow growth (growth rate of 1 μm / h to 10 μm / h), the epitaxial layer is grown to a thickness of 8 μm to 20 μm to obtain a 4° off-axis silicon carbide epitaxial wafer.

[0081] S14: Stop introducing the reaction gas, maintain the temperature constant, and introduce hydrogen (flow rate 1 slm to 50 slm) and an inert gas (e.g., Ar or He, flow rate 1 slm to 10 slm) into the epitaxial furnace reaction chamber, and anneal the epitaxial wafer at a high temperature in a hydrogen-rich atmosphere. Maintain the temperature for 1 to 2 hours, then cool the product together with the furnace to room temperature, and then remove it.

[0082] S2: The cleaning process includes the following steps.

[0083] S21: The product obtained in S1 is washed in an SPM (sulfuric acid and hydrogen peroxide mixture, 98 wt% concentrated sulfuric acid + 30 wt% hydrogen peroxide mixed in a 3:1 volume ratio) tank (the chemical solution is SPM), ultrasonically cleaned in an ultrasonic cleaning device, then transferred to an SC1 (27 wt% aqueous ammonia + 30 wt% hydrogen peroxide + pure water mixed in a 1:1:3 volume ratio) tank where it is immersed and washed, and finally transferred to an SC2 (37 wt% hydrochloric acid + 30 wt% hydrogen peroxide + pure water mixed in a 1:1:5 volume ratio) tank where it is immersed and washed. This step is a conventional washing that can wash away particulate contaminants (diameter 0.1 μm to 1 μm) from the surface of the product.

[0084] S22: Mix 38 wt% hydrofluoric acid + 55 wt% nitric acid + pure water in a volume ratio of 1:1:3, and then use to remove metal ions.

[0085] S23: Finally, remove the hydrofluoric acid by spray cleaning with a chemical solution that is 15% by weight dilute hydrochloric acid.

[0086] S24: To obtain silicon carbide epitaxial wafer products with a long minority carrier lifetime, the products are spray-washed with pure water and blow-dried under a nitrogen atmosphere.

[0087] This disclosure is described below with reference to specific embodiments. It should be noted that these embodiments are for illustrative purposes only and do not limit this disclosure in any way.

[0088] In the following examples and comparative examples, the minority carrier lifetime detection method (GB / T26068-2018) is the microwave photoconductive decay (μ-PCD) method. Microwave photoconductive decay is primarily used to monitor carrier recombination in materials. The test system includes a semiconductor laser, a circulator, a microwave generator, a detector, and a flat panel display. The light source selected in the test is generally a YAG laser pump source, with an emitted pulse wavelength of generally 349 nm and a pulse duration of 200 ns. After the test sample is excited by the laser, non-equilibrium carriers are generated, which alter the conductivity of the semiconductor material. The infrared light emitted by the detector is reflected from the sample surface and captured as a detection signal by a reflection detector. After passing through the circulator, it is converted into an electrical signal and displayed on a transient oscilloscope in the form of an intuitive voltage curve, reflecting the changing pattern of minority carrier lifetimes.

[0089] The silicon carbide epitaxial defect detection method (GB / T17167-1997) is an optical surface analysis technique that can simultaneously measure scattering intensity, shape changes, surface reflectivity, and phase shift. By combining the fundamental principles of scattering measurement, polarization analysis, reflectivity measurement, and optical shape analysis, this detection method can non-destructively detect residual foreign matter, surface and subsurface defects, shape changes, and film thickness uniformity on the surface of a silicon wafer. In this method, a laser is used as the light source, and a divergent beam with a highly uniform wavefront is formed through laser coherence and multi-channel spatial filtering, which is then used to illuminate the sample surface. The reflected wavefront beam is distorted due to different types of defects on the sample surface. The distorted wavefront is spatially folded, making it suitable for coherent imaging and forming images corresponding to various defects. The reflected beam is received by a photodetector (e.g., a CCD), and the results of the sample surface state analysis can be displayed on a screen after processing by an algorithm.

[0090] Detection method for metal ion contamination (GB / T39145-2020): ICP-MS method. Metal elements on a silicon carbide wafer are dissolved in nitric acid to obtain a scanning solution containing metal ions. A sample of the silicon carbide scanning solution is sprayed, microdroplets are screened, and introduced into an inductively coupled plasma at a high temperature of 8,000-10,000 K. The inorganic elements to be measured are continuously gasified, sprayed, and ionized, and then ionized into positively charged ions. The cations are then screened by a quadrupole rod ion deflection system, and interfering ions are completely eliminated by a quadrupole rod collision reaction cell system. Finally, the ions are scanned by a quadrupole rod mass spectrometer and then introduced into a detector system for qualitative and quantitative analysis. [Examples]

[0091] (Example 1) Silicon carbide epitaxial wafers were manufactured by a method including a combination of epitaxial and cleaning processes. The method was as follows:

[0092] S1: Epitaxial process: The reaction chamber was evacuated to an internal pressure of less than 0.1 Torr. The hydrogen flow rate was 150 slm, the temperature was 1640°C, the carbon-to-silicon ratio was 0.5, the silicon source trichlorosilane (TCS) flow rate was 50 sccm, and the carbon source ethylene flow rate was 15 ccm. A 1 μm buffer layer was grown. After the buffer layer had grown, the carbon source flow rate was adjusted to 80 sccm and the silicon source flow rate was adjusted to 180 sccm. The epitaxial layer was grown. Rapid growth was performed first (growth rate of 15 μm / h). After growing 9 μm, the growth rate was reduced. Slow growth was performed (growth rate of 5 μm / h). Approximately 2 μm was grown. At this point, the epitaxial layer was fully grown. The introduction of the reaction gas was stopped, the temperature was kept constant (1640°C), and hydrogen (flow rate of 2 slm) was introduced into the epitaxial furnace reaction chamber. The epitaxial wafer was then annealed at high temperature in a hydrogen-rich atmosphere. The temperature was maintained for 1 hour, and then the product was cooled to room temperature along with the furnace before being removed.

[0093] S2. Washing process: The product obtained in step S1 was immersed and washed with SPM (98 wt% concentrated sulfuric acid + 30 wt% hydrogen peroxide in a 3:1 volume ratio) + SC1 (27 wt% aqueous ammonia + 30 wt% hydrogen peroxide + pure water in a 1:1:3 volume ratio) + SC2 (37 wt% hydrochloric acid + 30 wt% hydrogen peroxide + pure water in a 1:1:5 volume ratio). 38 wt% hydrofluoric acid + 55 wt% nitric acid + pure water were mixed in a 1:1:3 volume ratio and used to remove metal ions. The hydrofluoric acid was then removed with 15 wt% dilute hydrochloric acid. Finally, the product was spray-washed with pure water and dried by blowing under a nitrogen atmosphere to obtain silicon carbide epitaxial wafers.

[0094] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0095] In this example, the following examples, and comparative examples, the specific method for data acquisition was as follows: Three silicon carbide epitaxial wafer samples were selected from the same batch, and each was tested. Then, the detected data was averaged to obtain data for the silicon carbide epitaxial wafer. This data is shown in Table 1.

[0096] Figures 1-4 show the test results for silicon carbide epitaxial wafers. Figure 1 shows a mapping of minority carrier lifetime test results for a silicon carbide epitaxial sample manufactured in Example 1 of this disclosure. Figure 2 shows a mapping of surface defect test results corresponding to the test sample in Figure 1. Figures 3 and 4 show mappings of minority carrier lifetime test results and surface defect test results for another silicon carbide epitaxial wafer sample in the same batch of products manufactured in Example 1 of this disclosure, respectively. From Figures 2 and 4, it can be seen that the special epitaxial growth and cleaning process described in this disclosure results in a total defect count of 600 or less, a particle count of 5 or less, a pit count of 200 or less, an SF and BPD count of 50 or less, and a black spot count of 120 or less on the surface of the wafer (silicon carbide epitaxial wafer). It can be seen that BPD, SF, pits, and black spots are clearly controlled in this process. Surface Fe contamination was tested, and the concentration was at the E8 level (i.e., Fe ion content was 10 8 atom / cm -2 The following indicates that the contamination is mild. From Figures 1 and 3, we can see that the minority carrier lifetime is up to 280 ns, which is an extremely high level for the range of epitaxial thickness required by medium voltages.

[0097] (Example 2) The method of Example 1 was used, but in step S1, the rapid growth rate was 15 μm / h and the slow growth rate was 1 μm / h, while the remaining conditions were the same. Silicon carbide epitaxial wafers were obtained.

[0098] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0099] (Example 3) The method of Example 1 was used, but in step S1, the rapid growth rate was 15 μm / h and the slow growth rate was 9 μm / h, while the remaining conditions were the same. Silicon carbide epitaxial wafers were obtained.

[0100] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0101] (Example 4) The method of Example 1 was used, but in step S1, the rapid growth rate was 15 μm / h and the slow growth rate was 9 μm / h, while the remaining conditions were the same. Silicon carbide epitaxial wafers were obtained.

[0102] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0103] (Example 5) The method of Example 1 was used, but in step S1, the rapid growth rate was 15 μm / h and the slow growth rate was 9 μm / h, while the remaining conditions were the same. Silicon carbide epitaxial wafers were obtained.

[0104] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0105] (Example 6) The method of Example 1 was used, but in step S1, epitaxial growth was performed at the same growth rate. After growing the buffer layer, the entire epitaxial film was grown at a high rate (15 μm / h), and no slow growth process was included; the remaining conditions were the same. A silicon carbide epitaxial wafer was obtained.

[0106] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0107] (Example 7) The method of Example 1 was used, but in step S1, after growing the epitaxial layer, the epitaxial layer was directly introduced into the cleaning process without high-temperature annealing in a hydrogen atmosphere, while the remaining conditions were the same. A silicon carbide epitaxial wafer was obtained.

[0108] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0109] (Comparative Example 1) The method of Example 1 was used, but the cleaning in step S2 was different. The nitric acid + hydrofluoric acid cleaning process was omitted, and the remaining conditions were the same. Silicon carbide epitaxial wafers were obtained.

[0110] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0111] (Comparative Example 2) The method of Example 1 was used, but only the epitaxial manufacturing process was used to obtain the silicon carbide epitaxial wafer; that is, only step S1 of Example 1 was included, and the subsequent cleaning process S2 was not performed.

[0112] Table 1 shows the data for the silicon carbide epitaxial wafer after testing.

[0113] [Table 1]

[0114] The results in Table 1 show that, on the surface of silicon carbide epitaxial wafers obtained by combining the epitaxial process and cleaning process in Examples 1 to 7 of this disclosure, the total number of defects was 700 or less, the number of particles was 10 or less, the number of pits was 200 or less, both the number of SFs and BPDs were 100 or less, the number of black spots was 200 or less, and the Fe contamination content was less than the order of E9. By comparison, the minority carrier lifetime of the silicon carbide epitaxial wafers obtained in Examples 1 to 7 of this disclosure is significantly higher than that of Comparative Examples 1 and 2, and the BPDs, SFs, pits, and black spots are also clearly controlled and at an extremely high level within the range of epitaxial thickness required by medium voltage.

[0115] The cleaning process used in Comparative Example 1 does not include a nitric acid + hydrofluoric acid cleaning process. The minority carrier lifetime on the epitaxial wafer is less than approximately 100 ns. The number of particles and black spots on the surface of the epitaxial wafer increased significantly, and Fe contamination increased significantly by approximately 1 to 2 orders of magnitude.

[0116] In Comparative Example 2, only the epitaxial process was used. Without cleaning, the minority carrier lifetime on the epitaxial wafer was less than approximately 100 ns, the number of pits, SFs, BPDs, and black spots increased significantly, and Fe contamination was also severe.

[0117] From the above, it can be seen that by combining the epitaxial process with a special cleaning process, the minority carrier lifetime in silicon carbide epitaxial wafers can be significantly improved, and the total number of surface defects, particles, pits, SFs (stack faults), BPDs (basal dislocations), and black spots (tiny black spot defects that cannot be specifically identified), as well as the Fe contamination content, can be significantly reduced. By controlling a combination of rapid and slow growth modes of the epitaxial layer, the minority carrier lifetime and the performance of the silicon carbide epitaxial wafer can be further improved.

[0118] The examples above are merely some practices of this application and, although described in detail, should not be construed as limitations on the scope of this disclosure. Those skilled in the art will understand that some modifications and improvements may be made without departing from the ideas of this disclosure, all of which are intended to fall within the scope of protection of this disclosure. Accordingly, the scope of protection of this disclosure is defined by the appended claims.

Claims

1. A method for manufacturing silicon carbide epitaxial wafers, S1: A step of preparing a silicon carbide substrate, and sequentially growing a buffer layer and an epitaxial layer on the silicon carbide substrate under conditions necessary for epitaxial growth to obtain a first product. S2: A step to obtain a silicon carbide epitaxial wafer by sequentially immersing and washing the first product with the first solution, the second solution and the third solution, and then washing with the fourth solution, wherein the first solution is prepared by mixing 98% by weight concentrated sulfuric acid and 30% by weight hydrogen peroxide in a volume ratio of 1 to 3:1, the second solution is prepared by mixing 27% by weight aqueous ammonia, 30% by weight hydrogen peroxide and pure water in a volume ratio of 1 to 1 to 3:3 to 10, the third solution is prepared by mixing 37% by weight hydrochloric acid, 30% by weight hydrogen peroxide and pure water in a volume ratio of 1 to 1 to 5:5 to 15, and the fourth solution is prepared by mixing 38% by weight hydrofluoric acid, 55% by weight nitric acid and pure water in a volume ratio of 1 to 1 to 3:3 to 10. A method for providing this.

2. The method according to claim 1, wherein the conditions necessary for epitaxial growth include a hydrogen flow rate in the range of 10 slm to 200 slm, a hydrogen pressure in the range of 0.1 Torr to 800 Torr, and a temperature in the range of 1000°C to 2000°C.

3. The method according to claim 1, wherein the step of growing the buffer layer comprises using hydrogen as a carrier gas, adjusting the flow rates of a first carbon source, a first silicon source, and a doping source to the flow rates necessary for the growth of the buffer layer, and controlling the temperature to 1000°C to 2000°C and the pressure to 0.1 Torr to 800 Torr.

4. The method according to claim 3, wherein the hydrogen flow rate is 10 slm to 200 slm, and the ratio of hydrogen-transported carbon to silicon is 0.1 to 10:

1.

5. The method according to claim 1, wherein the step of growing the epitaxial layer comprises adjusting the flow velocities of a second carbon source and a second silicon source to the flow velocities necessary for the growth of the epitaxial layer, and during the growth process of the epitaxial layer, the epitaxial layer is grown to a first thickness at a first growth rate, and then to a second thickness at a second growth rate, where the first rate is faster than the second rate.

6. The method according to claim 5, wherein the first thickness is 75% to 90% of the thickness of the epitaxial layer.

7. The method according to claim 5, wherein the second thickness is 10% to 25% of the thickness of the epitaxial layer, and the thickness of the epitaxial layer is 8 μm to 20 μm.

8. The method according to claim 1, further comprising the step of annealing the first product before washing the first product.

9. The method according to claim 8, wherein the annealing step comprises stopping the introduction of the reaction gas, introducing hydrogen, or a mixture of hydrogen and an inert gas, at the growth temperature of the epitaxial layer, subjecting the first product to a high-temperature annealing treatment in a hydrogen-rich atmosphere, incubating for 1 to 2 hours, and then cooling together with the furnace to room temperature.

10. The method according to claim 1, further comprising step S2, in order to obtain the silicon carbide epitaxial wafer, removing hydrofluoric acid from the surface of the epitaxial wafer with dilute hydrochloric acid after washing with the fourth solution, then spray washing with pure water, and drying by blowing under a nitrogen atmosphere.

11. The method according to claim 10, wherein the concentration of the dilute hydrochloric acid is 3% by weight to 15% by weight.

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