Light-receiving element and infrared imaging device

Abstract

To provide a photodetector and an infrared imaging device capable of reducing a peripheral component of a dark current.SOLUTION: A light receiving element includes a light-receiving layer including a superlattice of an InAs layer and a GaSb layer, and an amorphous layer covering a side wall surface of the light-receiving layer, and the amorphous layer contains In and As, an amount of Ga and an amount of Sb contained in the amorphous layer are smaller than the amount of In and the amount of As contained in the amorphous layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This disclosure relates to a light-receiving element and an infrared imaging device. [Background technology]

[0002] An infrared detector includes a photodetector and a readout circuit. The photodetector generates a current corresponding to the intensity of the incident infrared radiation. The readout circuit has a capacitor and an amplifier. The current generated by the photodetector is stored as charge in the capacitor, and the stored charge is converted into a voltage by the amplifier and amplified for output.

[0003] Dark current flows through a photodetector even when infrared light is not incident on it. Dark current acts as a noise source, and the larger the dark current, the lower the signal-to-noise ratio (S / N ratio). When a single photodetector is processed and formed into a mesa type, the dark current can be broadly divided into an in-plane component and a peripheral (sidewall) component. As the number of pixels in a photodetector increases and the photodetector is miniaturized, the influence of the peripheral component becomes relatively larger. Therefore, in order to obtain a good S / N ratio in a miniaturized photodetector, it is important to reduce the peripheral component of the dark current. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2017-011168 [Patent Document 2] Japanese Patent Publication No. 2016-111294 [Patent Document 3] U.S. Patent Application Publication No. 2008 / 0073743 [Patent Document 4] U.S. Patent Application Publication No. 2013-0213462 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] Type II superlattice (T2SL) is attracting attention as a material for the infrared absorption layer contained in photodetectors. In particular, superlattices with InAs and GaSb layers are promising in terms of sensitivity, wavelength controllability, and multi-pixel capabilities. However, it is difficult to reduce the peripheral component of the dark current flowing through the sidewalls of the infrared absorption layer, including the InAs and GaSb superlattices. Therefore,

[0006] The purpose of this disclosure is to provide a photodetector and an infrared imaging device that can reduce peripheral components of dark current. [Means for solving the problem]

[0007] According to one embodiment of the present disclosure, a photodetector is provided having a photodetector layer including a superlattice of an InAs layer and a GaSb layer, and an amorphous layer covering the sidewall surface of the photodetector layer, wherein the amorphous layer contains In and As, and the amount of Ga and Sb contained in the amorphous layer is less than the amount of In and As contained in the amorphous layer. [Effects of the Invention]

[0008] According to this disclosure, peripheral components of dark current can be reduced. [Brief explanation of the drawing]

[0009] [Figure 1] This is a cross-sectional view (part 1) showing a light-receiving element according to the first embodiment. [Figure 2] This is a cross-sectional view (part 2) showing a light-receiving element according to the first embodiment. [Figure 3] This is a cross-sectional view (part 1) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 4] This is a cross-sectional view (part 2) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 5] This is a cross-sectional view (part 3) showing a method for manufacturing a light-receiving element according to the first embodiment. [Figure 6]It is a cross-sectional view (part 4) illustrating the method for manufacturing a light receiving element according to the first embodiment. [Figure 7] It is a cross-sectional view (part 5) illustrating the method for manufacturing a light receiving element according to the first embodiment. [Figure 8] It is a cross-sectional view illustrating the light receiving element according to a reference example. [Figure 9] It is a diagram showing the analysis result of a laminated structure. [Figure 10] It is a schematic diagram illustrating the infrared imaging device according to the second embodiment. [Figure 11] It is a cross-sectional view (part 1) illustrating the method for manufacturing the infrared imaging device according to the second embodiment. [Figure 12] It is a cross-sectional view (part 2) illustrating the method for manufacturing the infrared imaging device according to the second embodiment. [Figure 13] It is a cross-sectional view (part 3) illustrating the method for manufacturing the infrared imaging device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] The inventors of the present application have conducted intensive studies to investigate the cause why it is difficult to reduce the peripheral component of dark current flowing through the side wall surface of an infrared absorption layer including a superlattice of an InAs layer and a GaSb layer. As a result, it has been found that during the manufacturing process of a light receiving element, gallium oxide and antimony oxide are generated on the side wall of the infrared absorption layer during washing with water after etching or the like, and antimony oxide having relatively low thermal stability has oxygen taken away by other elements, thereby exhibiting metal-like properties. Based on these findings, the inventors of the present application have conceived the following embodiments.

[0011] Hereinafter, embodiments of the present disclosure will be specifically described with reference to the accompanying drawings. In the present specification and the drawings, constituent elements having substantially the same functional configuration may be denoted by the same reference numerals to omit redundant description.

[0012] (First Embodiment) A first embodiment will be described. The first embodiment relates to a light-receiving element. Figures 1 and 2 are cross-sectional views showing a light-receiving element according to the first embodiment. Figure 2 corresponds to an enlarged view of region R in Figure 1.

[0013] As shown in Figure 1, the light-receiving element 1 according to the first embodiment includes a lower contact layer 13, an electron barrier layer 14, an infrared absorption layer 15, a hole barrier layer 16, an upper contact layer 17, an amorphous layer 20, a protective layer 21, a lower electrode 24, and an upper electrode 25.

[0014] The lower contact layer 13 is, for example, InAs 0.91 S 0.09 This is a layer. The lower contact layer 13 contains 1 × 10⁻¹⁶ Si or Te as n-type impurities. 18 cm -3 The lower contact layer 13 is doped with a concentration of [specific compound] and has an n-type conductivity. The thickness of the lower contact layer 13 is, for example, 2 μm.

[0015] The electron barrier layer 14 is provided on the lower contact layer 13. The electron barrier layer 14 includes a type II superlattice in which, for example, InAs layers and GaSb layers are alternately stacked. For example, the thickness of the InAs layer is 2.2 nm and the thickness of the GaSb layer is 2.1 nm. For example, the electron barrier layer 14 contains 5 × 10⁻¹⁶ Be or Zn as p-type impurities. 17 cm -3 The electron barrier layer 14 is doped at a certain concentration and has a p-type conductivity. The thickness of the electron barrier layer 14 corresponds to, for example, 50 periods when the laminate of the InAs layer and the GaSb layer is considered as one period of the superlattice.

[0016] The infrared absorption layer 15 is provided on top of the electron barrier layer 14. As shown in Figure 2, the infrared absorption layer 15 includes a type II superlattice in which, for example, InAs layers 15A and GaSb layers 15B are alternately stacked. For example, the thickness of the InAs layer 15A is 4.2 nm, and the thickness of the GaSb layer 15B is 2.1 nm. For example, the infrared absorption layer 15 contains 1 × 10⁻¹⁶ Be or Zn as p-type impurities. 16 cm -3is doped at a concentration of , and the infrared absorption layer 15 has p-type conductivity. The thickness of the infrared absorption layer 15 corresponds to, for example, 400 periods when a stacked body of an InAs layer 15A and a GaSb layer 15B is defined as one period of the superlattice. As shown in FIG. 2, in a plan view from a direction perpendicular to the upper surface of the infrared absorption layer 15, the side wall surface of the GaSb layer 15B may be located inside the side wall surface of the InAs layer 15A. The infrared absorption layer 15 is an example of a light-receiving layer.

[0017] The hole barrier layer 16 is provided on the infrared absorption layer 15. The hole barrier layer 16 includes, for example, a type II superlattice in which InAs layers and AlSb layers are alternately stacked. For example, the thickness of the InAs layer is 4.6 nm, and the thickness of the AlSb layer is 1.2 nm. For example, Si or Te as an n-type impurity is added to the hole barrier layer 16 at 5×10 17 cm -3 and is doped at a concentration of , and the hole barrier layer 16 has n-type conductivity. The thickness of the hole barrier layer 16 corresponds to, for example, 50 periods when a stacked body of an InAs layer and an AlSb layer is defined as one period of the superlattice.

[0018] The upper contact layer 17 is provided on the hole barrier layer 16. The upper contact layer 17 is, for example, an InAs layer. Si or Te as an n-type impurity is added to the upper contact layer 17 at 1×10 18 cm -3 and is doped at a concentration of , and the upper contact layer 17 has n-type conductivity. The thickness of the upper contact layer 17 is, for example, 20 nm.

[0019] The electron barrier layer 14, the infrared absorption layer 15, the hole barrier layer 16 and the upper contact layer 17 are etched into a mesa shape. That is, the light receiving element 1 has a mesa 19 including the electron barrier layer 14, the infrared absorption layer 15, the hole barrier layer 16, and the upper contact layer 17.

[0020] The amorphous layer 20 covers the sidewalls of the electron barrier layer 14 and the infrared absorption layer 15. The amorphous layer contains In and As. The amorphous layer 20 may further contain oxygen (O). The main components of the amorphous layer are In, As, and O. The amorphous layer 20 may contain Ga or Sb or both, but the amount of Ga (atomic %) and Sb (atomic %) contained in the amorphous layer 20 is less than the amount of In (atomic %) and As (atomic %) contained in the amorphous layer 20. The amount of Ga (atomic %) and Sb (atomic %) contained in the amorphous layer 20 is preferably 10 atomic % or less, more preferably 8 atomic % or less, and even more preferably 5 atomic % or less.

[0021] The amorphous layer 20 mainly covers the sidewalls of the electron barrier layer 14 and the infrared absorption layer 15, but may also include a portion that covers the sidewalls of the hole barrier layer 16. However, the portion that covers the sidewalls of the hole barrier layer 16 is thin; for example, the thickness from the edge of the InAs layer included in the hole barrier layer 16 is at most 3 nm. Therefore, the distance between the hole barrier layer 16 and the protective layer 21 is 3 nm or less. The portion of the amorphous layer 20 that covers the sidewalls of the hole barrier layer 16 does not contain Ga, but contains Al.

[0022] The protective layer 21 covers the sides of the upper contact layer 17 and the hole barrier layer 16, the top surface of the upper contact layer 17, and the top surface of the lower contact layer 13. The protective layer 21 further covers the amorphous layer 20. The protective layer 21 is, for example, a silicon oxide (SiO2) layer, a silicon oxynitride (SiON) layer, or a silicon nitride (SiN) layer. The thickness of the protective layer 21 is, for example, about 500 nm.

[0023] The protective layer 21 has an opening 22 that exposes a portion of the upper surface of the lower contact layer 13 and an opening 23 that exposes a portion of the upper surface of the upper contact layer 17. The lower electrode 24 is provided inside the opening 22, and the upper electrode 25 is provided inside the opening 23. The lower electrode 24 has, for example, a Ti film in contact with the lower contact layer 13, a Pt film on the Ti film, and an Au film on the Pt film. The lower electrode 24 is ohmic bonded with the lower contact layer 13. The upper electrode 25 has, for example, a Ti film in contact with the upper contact layer 17, a Pt film on the Ti film, and an Au film on the Pt film. The upper electrode 25 is ohmic bonded with the upper contact layer 17.

[0024] Next, a method for manufacturing the light-receiving element 1 according to the first embodiment will be described. Figures 3 to 7 are cross-sectional views showing the method for manufacturing the light-receiving element 1 according to the first embodiment.

[0025] First, as shown in Figure 3, a buffer layer 12, a lower contact layer 13, an electron barrier layer 14, an infrared absorption layer 15, a hole barrier layer 16, and an upper contact layer 17 are epitaxially grown on the substrate 11. In the following description, these semiconductor layers will be epitaxially grown by molecular beam epitaxy (MBE). These semiconductor layers may also be epitaxially grown by metal-organic chemical vapor deposition (MOCVD) or other methods. The thickness of the substrate 11 is, for example, about 600 μm.

[0026] Next, an SiON layer 31 is formed on the upper contact layer 17. The SiON layer 31 is formed, for example, by plasma CVD, and the thickness of the SiON layer 31 is, for example, about 500 nm. After that, a resist mask 32 is formed on the SiON layer 31 by lithography. The resist mask 32 is formed so as to cover the region where the mesa 19 is to be formed.

[0027] Next, as shown in Figure 4, the portion of the SiON layer 31 exposed from the resist mask 32 is etched. This etching is performed using reactive ion etching (RIE) with, for example, CF4 gas and Ar gas. Then, the resist mask 32 is removed, and the remaining SiON layer 31 is used as a hard mask to etch the upper contact layer 17, hole barrier layer 16, infrared absorption layer 15, and electron barrier layer 14. This etching is performed using RIE with, for example, BCl3 gas and Ar gas. In this etching process, the pulse signal of Ga due to secondary ions is monitored, and the etching endpoint is detected by the reduction of Ga. That is, the etching is terminated when the upper surface of the lower contact layer 13, which does not contain Ga, is exposed. As a result of this etching, a mesa 19 is formed, including the upper contact layer 17, hole barrier layer 16, infrared absorption layer 15, and electron barrier layer 14.

[0028] Subsequently, as shown in Figure 5, the sidewalls of mesa 19 are etched to a thickness of approximately 50 nm using a mixed solution of phosphoric acid, citric acid, hydrogen peroxide, and water to remove the damaged layer on the sidewalls of mesa 19 caused by RIE. As a result, in the infrared absorption layer 15, the GaSb layer 15B is etched preferentially over the InAs layer 15A, and as shown in Figure 2, the sidewall surface of the GaSb layer 15B recedes inward more than the sidewall surface of the InAs layer 15A. In the electron barrier layer 14, the sidewall surface of the GaSb layer also recedes inward more than the sidewall surface of the InAs layer.

[0029] Next, the sidewalls of the mesa 19 are treated with a citric acid-based aqueous solution. As a result, as shown in Figure 6, an amorphous layer 20 containing In and As is formed using a portion of the InAs layer contained in the electron barrier layer 14 and the infrared absorption layer 15. The amorphous layer 20 mainly covers the sidewalls of the electron barrier layer 14 and the infrared absorption layer 15, but it may also be formed to include a portion that covers the sidewalls of the hole barrier layer 16.

[0030] Next, as shown in Figure 7, the SiON layer 31 is removed using buffered hydrofluoric acid (BHF). Then, a protective layer 21 is formed to cover the mesa 19 and the lower contact layer 13. The protective layer 21 can be formed, for example, by a plasma CVD method using SiH4 gas and N2O gas. Subsequently, an opening 22 that exposes a portion of the upper surface of the lower contact layer 13 and an opening 23 that exposes a portion of the upper surface of the upper contact layer 17 are formed in the protective layer 21. Then, a lower electrode 24 is formed inside the opening 22, and an upper electrode 25 is formed inside the opening 23. The lower electrode 24 and the upper electrode 25 can be formed, for example, by a lift-off method combining lithography and vapor deposition.

[0031] Subsequently, the photodetector 1 according to the first embodiment can be manufactured by removing the substrate 11 and the buffer layer 12.

[0032] In the first embodiment, the sidewall surface of the infrared absorption layer 15 is covered with an amorphous layer 20. The amorphous layer 20 contains In and As, and the amount of Ga (atomic %) and Sb (atomic %) contained in the amorphous layer 20 is less than the amount of In (atomic %) and As (atomic %) contained in the amorphous layer 20. Therefore, both during the manufacturing process of the photodetector 1 and after the completion of the photodetector 1, the arrival of oxygen to the sidewall surface of the electron barrier layer 14 and the infrared absorption layer 15 is suppressed, and the formation of Ga oxide and Sb oxide is suppressed. Consequently, leakage current associated with the formation of Sb oxide can be suppressed, and peripheral components of dark current that use the sidewall surface of the electron barrier layer 14 and the infrared absorption layer 15 as a leakage path can be reduced. Therefore, even when the photodetector 1 is miniaturized, a good signal-to-noise ratio can be obtained.

[0033] Here, a reference example will be described for comparison with the first embodiment. Figure 8 is a cross-sectional view showing a light-receiving element according to the reference example. Note that Figure 8 is not a diagram of the prior art.

[0034] The photodetector 1X in the reference example is manufactured by a method generally similar to that of the first embodiment. It differs from the first embodiment mainly in that water washing is performed immediately after the removal of the damaged layer, and the processing from the formation of the protective layer 21 onwards is carried out without forming the amorphous layer 20. As shown in Figure 8, the photodetector 1X in the reference example does not have an amorphous layer 20, but has an amorphous oxide film 20X formed during water washing. The oxide film 20X covers the sidewall surface of the electron barrier layer 14 containing the GaSb layer, the sidewall surface of the infrared absorption layer 15 containing the GaSb layer, and the sidewall surface of the hole barrier layer 16 not containing the GaSb layer. The oxide film 20X contains Sb oxide. GaSb is easily oxidized by water washing, and the electron barrier layer 14 and infrared absorption layer 15 also contain Ga. Therefore, the portion of the oxide film 20X that covers the sidewalls of the electron barrier layer 14 and the infrared absorption layer 15 also contains Ga oxide and is thicker than the portion that covers the sidewalls of the hole barrier layer 16.

[0035] In the photodetector 1X, as described above, the thermal stability of the Sb oxide contained in the oxide film 20X is low, and the oxide film 20X contains portions where the Sb oxide decomposes and exhibits properties similar to metal. Because this oxide film 20X is thick, dark current tends to flow near the side wall of the infrared absorption layer 15. In contrast, this embodiment has a configuration that does not easily contain Sb oxide, so the dark current caused by Sb oxide can be reduced.

[0036] Here, we will describe the analysis results of a laminated structure manufactured according to the first embodiment. This laminated structure has the structure shown in Figure 6. Figure 9 shows the analysis results of the laminated structure. In Figure 9, "TEM" indicates an observation image obtained by a transmission electron microscope (TEM). In Figure 9, "In", "As", "Ga", and "Sb" indicate the results of energy dispersive X-ray spectroscopy (EDX) analysis of In, As, Ga, and Sb, respectively. The EDX analysis results show that the element is present in the areas where there are black dots. Figure 9 shows observation and analysis results of roughly the same location.

[0037] As shown in Figure 9, TEM observations revealed crystals in the region corresponding to the infrared absorption layer 15, while no crystals were observed in the region corresponding to the amorphous layer 20. Furthermore, EDX analysis revealed that in the region corresponding to the infrared absorption layer 15, combinations of In and As and combinations of Ga and Sb were alternately present. In the region corresponding to the amorphous layer 20, In and As were present, but Ga and Sb were almost absent.

[0038] Furthermore, the amorphous layer 20 may contain oxygen contained in the mixed solution used to remove the damaged layer or oxygen contained in the gas used to form the protective layer 21.

[0039] The thickness of the amorphous layer 20 (thickness in the direction parallel to the upper surface of the substrate 11) is preferably 5 nm to 50 nm, more preferably 10 nm to 45 nm, and even more preferably 15 nm to 40 nm. If the amorphous layer 20 is too thin, the infrared absorption layer 15 and electron barrier layer 14 covered by the amorphous layer 20 may be oxidized during the formation of the protective layer 21, making it easier for Sb oxide to be generated. Also, if the amorphous layer 20 is too thick, the reduction in the crystalline GaSb layer constituting the superlattice will be large, worsening the surface flatness, resulting in insufficient formation of the protective layer 21, and potentially increasing the dark current due to process damage.

[0040] The infrared absorption layer 15 may have an InSb layer as a strain compensation layer between the InAs layer 15A and the GaSb layer 15B. The thickness of the InSb layer is, for example, 0.2 nm. The InSb layer can alleviate strain caused by the difference in lattice constants between the substrate 11 and the InAs layer 15A. The InSb layer may be provided throughout the entire space between the InAs layer 15A and the GaSb layer 15B, or it may be provided for each period (set) of the InAs layer 15A and the GaSb layer 15B. Similarly, the electron barrier layer 14 and the hole barrier layer 16 may have an InSb layer as a strain compensation layer.

[0041] (Second Embodiment) A second embodiment will now be described. The second embodiment relates to an infrared imaging device including a light-receiving element 1. Figure 10 is a schematic diagram showing an infrared imaging device according to the second embodiment.

[0042] The infrared imaging device 2 according to the second embodiment includes a pixel array 50 and a readout circuit (ROIC) 60. The pixel array 50 has a plurality of light-receiving elements 1 arranged in an array. Each light-receiving element 1 constitutes one pixel 51. The pixel array 50 and the readout circuit 60 are flip-chip connected. Each pixel 51 is electrically connected to a corresponding unit cell 61 formed in the readout circuit 60 by a junction electrode 27 (see Figure 13). The infrared imaging device 2 has an FPA (Focal Plane Array).

[0043] Next, a method for manufacturing the infrared imaging device 2 according to the second embodiment will be described. Figures 11 to 13 are cross-sectional views showing the method for manufacturing the infrared imaging device 2 according to the second embodiment.

[0044] First, following the first embodiment, the process up to the formation of the lower electrode 24 and the upper electrode 25 is carried out. At this time, multiple mesa 19 are formed in an array on a single substrate 11. In addition to the mesa 19 that constitute the pixel 51, mesa for dummy pixels are formed around the pixel 51. Then, lead wires are formed on the side walls of the mesa for dummy pixels, and the lower electrode 24 is connected to the upper electrode included in the mesa for dummy pixels. The lower electrode 24 is used as a common electrode for multiple pixels 51 that form corresponding columns or rows of the pixel array 50.

[0045] After the formation of the lower electrode 24 and the upper electrode 25, a bump electrode 26 is formed on the upper electrode 25, as shown in Figure 11. The bump electrode 26 is, for example, an In electrode. The bump electrode 26 can be formed, for example, by a lift-off method that combines lithography and vapor deposition. In this way, the temporary pixel array 52 is formed.

[0046] Next, as shown in Figure 12, the temporary pixel array 52 and the readout circuit 60 having connecting electrodes (not shown) are flip-chip bonded. During this flip-chip bonding, a bonding electrode 27 is formed from the bump electrode 26 and the connecting electrode. After that, underfill 70 is filled between the temporary pixel array 52 and the readout circuit 60.

[0047] Next, the back surface of the substrate 11 is ground until its thickness reaches, for example, 50 μm. Then, as shown in Figure 13, the lower contact layer 13 is used as an etching stopper with a mixed solution containing HF and CrO3, and the remaining substrate 11 and buffer layer 12 are removed by wet etching.

[0048] Subsequently, an anti-reflective film is formed on the back surface of the lower contact layer 13, which will be the infrared incident surface, and the device is mounted in a container. In this way, the infrared imaging device 2 can be manufactured.

[0049] According to the second embodiment, since it includes the photodetector 1 according to the first embodiment, peripheral components of the dark current are reduced, an excellent signal-to-noise ratio is obtained, and a clear image with high temperature resolution can be obtained with a fine and high-resolution configuration.

[0050] The wavelength of infrared light to be received is not particularly limited; for example, infrared light with wavelengths of 1.4 μm to 30 μm can be received, and in particular, infrared light with wavelengths of 1.4 μm to 15 μm can be received. The thickness of the InAs layer 15A and the GaSb layer 15B can be adjusted according to the wavelength of the infrared light to be received. Similarly, the thickness of the compound semiconductor layers constituting the superlattice in the electron barrier layer 14 and the hole barrier layer 16 can be adjusted according to the wavelength of the infrared light to be received. Furthermore, the configuration of the superlattice included in the electron barrier layer 14 and the hole barrier layer 16 is not particularly limited. For example, the superlattice included in the hole barrier layer 16 may have a configuration in which an InAs layer, a GaSb layer, an AlSb layer, and a GaSb layer are stacked in that order. Also, the conductivity type of the light-receiving layer may be n-type. In this case, an AlGaSb layer or the like can be used for the electron barrier layer.

[0051] Light-receiving elements and infrared imaging devices can be used, for example, for nighttime navigation on ships or for non-destructive testing of concrete.

[0052] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims.

[0053] The various aspects of this disclosure are summarized below as an appendix.

[0054] (Note 1) A photodetector layer including a superlattice of InAs and GaSb layers, An amorphous layer covering the side wall surface of the light-receiving layer, It has, The amorphous layer comprises In and As, A photodetector characterized in that the amount of Ga and Sb contained in the amorphous layer is less than the amount of In and As contained in the amorphous layer. (Note 2) The photodetector according to Appendix 1, characterized in that the amorphous layer further contains oxygen. (Note 3) The photodetector according to Appendix 1 or 2, characterized in that the amount of Ga and the amount of Sb contained in the amorphous layer are both 10 atomic percent or less. (Note 4) The photodetector according to any one of the appendices 1 to 3, characterized in that the thickness of the amorphous layer is 5 nm or more and 50 nm or less. (Note 5) The light-receiving element according to any one of the appendices 1 to 4, characterized in that, in a plan view from the thickness direction, the sidewall surface of the GaSb layer is located inside the sidewall surface of the InAs layer. (Note 6) The light-receiving element according to any one of the appendices 1 to 5, characterized in that the light-receiving layer includes an InSb layer between the InAs layer and the GaSb layer. (Note 7) A superlattice comprising an InAs layer and an AlSb layer, and an n-type hole barrier layer in contact with one surface of the light-receiving layer, A protective layer covering the side wall surface of the hole barrier layer, It has, The photodetector according to any one of the appendices 1 to 6, characterized in that the distance between the hole barrier layer and the protective layer is 2 nm or less. (Note 8) The superlattice comprises an InAs layer and a GaSb layer, and has a p-type electron barrier layer in contact with the other surface of the light-receiving layer. The photodetector according to Appendix 7, characterized in that the sidewall surface of the electron barrier layer is covered with the amorphous layer. (Note 9) A light-receiving element as described in any of the appendices 1 to 8, A readout circuit connected to the light-receiving element, An infrared imaging device characterized by having the following features. [Explanation of Symbols]

[0055] 1: Photodetector 2: Infrared imaging device 11: Circuit board 12: Buffer Layer 13: Lower contact layer 14: Electron barrier layer 15: Infrared absorbing layer 15A: InAs layer 15B:GaSb layer 16: Hole barrier layer 17: Upper contact layer 19: Mesa 20: Amorphous layer 21:Protective layer 22: Opening 23: Opening 24: Lower electrode 25: Upper electrode 50: Pixel Array 51: Pixels 60: Readout Circuit (ROIC) 61: Unit Cell

Claims

1. A light-receiving layer including a superlattice of InAs and GaSb layers, An amorphous layer covering the side wall surface of the light-receiving layer, It has, The amorphous layer comprises In and As, A light-receiving element characterized in that the amount of Ga and Sb contained in the amorphous layer is less than the amount of In and As contained in the amorphous layer.

2. The photodetector according to claim 1, characterized in that the amorphous layer further contains oxygen.

3. The photodetector according to claim 1 or 2, characterized in that the amount of Ga and the amount of Sb contained in the amorphous layer are both 10 atomic percent or less.

4. The photodetector according to claim 1 or 2, characterized in that the thickness of the amorphous layer is 5 nm or more and 50 nm or less.

5. The light-receiving element according to claim 1 or 2, characterized in that, in a plan view from the thickness direction, the sidewall surface of the GaSb layer is located inside the sidewall surface of the InAs layer.

6. A light-receiving element according to claim 1 or 2, A readout circuit connected to the light-receiving element, An infrared imaging device characterized by having the following features.

Images