Detector for detecting the polarity of AC signals

Abstract

A device for detecting the polarity of a current or a voltage, said detection device generating a so-called "measured" voltage (V sense a circuit portion (20) with a so-called "detection" node (N1) configured to generate a measurement voltage (V) at the detection node, and a transistor coupled to the detection node (N1) sense ) 37 , M 55 ), and the comparator transistor further comprises a detection circuit (30) having an amplifier with a source set to a fixed potential (GND) so that the source-gate voltage is equal to the measurement voltage (V sense ), or the gate is set to a fixed potential (VGGbias) and the source-gate voltage is sense ), and the detection circuitry depends on the measured potential (V sense ) with a predetermined threshold, and outputting a binary detection signal indicative of the polarity of the detected current or the detected voltage.

Description

[Technical Field]

[0001] The present invention relates to the field of electronic circuits for detecting current or voltage, and more particularly to circuits for detecting the polarity of alternating current or alternating voltage. Specifically, it relates to a current sensing device for indicating the polarity of a current provided by a power transistor such as a HEMT (High Electron Mobility Transistor). [Background technology]

[0002] Heterojunction power transistors, such as GaN-HEMT transistors, have the advantage of having low electrical resistance in the ON state and being able to withstand high current density and high voltage in the OFF state. They have applications particularly in the field of power supply, such as electrical energy converters, DC / DC converters, AC / DC converters based on bidirectional switches, and USB-PD (Universal Serial Bus Power Supply).

[0003] For some applications, it is desirable to detect whether the current flowing through a power transistor exceeds a predetermined threshold, specifically whether that current is positive.

[0004] Non-patent document 1 discloses, for example, a circuit that uses the on-resistance of a power transistor to detect a positive current supplied by the transistor.

[0005] The detection circuit disclosed in Non-Patent Document 1 is sensitive to changes in resistance as a function of temperature.

[0006] On the other hand, Non-Patent Document 2 discloses a shunt of only a small portion of the current from the cells forming the power transistors to the detection circuit formed by the operational amplifier in order to achieve the same type of detection. Such a detection circuit presents an overall size problem. Furthermore, the operational amplifier is associated with a bias circuit that provides a negative voltage, requiring the integration of additional circuitry to ensure this type of bias. [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] "Fully Protected H-Bridge IR3220S," Architecture and Typical Application, Application Note AN-1032, by Xavier de Frutos, 2001. [Non-Patent Document 2] Application Note AND8093 / D for "Current Sensing Power MOSFETs Semiconductor," 2002, Semiconductor Components Industries, LLC, 2002. [Overview of the project] [Problems that the invention aims to solve]

[0008] The challenge lies in finding a new device for detecting current from power transistors that is improved in at least one of the aforementioned drawbacks. [Means for solving the problem]

[0009] According to one embodiment, the present invention relates to a device for detecting the polarity of a so-called "detected" current or a so-called "detected" voltage that alternates between positive and negative, wherein the detection device is capable of indicating the polarity of the detected current or the detected voltage, and the detection device is A circuit section comprising a so-called "detection" node, configured to generate a so-called "measurement" voltage, which is a mapping of a small portion of the detected current or the detected voltage, A detection circuit comprising at least one transistor coupled to the detection node, wherein at least one of the amplifier stages comprises one or more amplifier stages, the amplifier stage comprising a so-called "comparator" transistor having a source-gate voltage dependent on the measurement voltage, It includes, The comparator transistor is further configured such that the source is set to a fixed potential (GND) and the source-gate voltage depends on the measured voltage, or the gate is set to a fixed potential and the source-gate voltage depends on the measured voltage. The detection circuit is configured to compare the measured potential with a predetermined threshold and output a binary detection signal indicating the polarity of the detected current or the polarity of the detected voltage. The detection signal selects a first state when the measured voltage is lower than the predetermined threshold and a second state when the measured voltage is higher than the predetermined threshold.

[0010] Preferably, the transistor in the at least one detection circuit is an N-type transistor. Therefore, the detection circuit can consist of an N-type transistor and a bias load formed by a resistor and / or a transistor.

[0011] The transistor in the detection circuit can be, in particular, a HEMT transistor having a channel structure made of at least one GaN layer.

[0012] According to one preferred embodiment, the detection node is coupled to the source of the input transistor of the detection circuit, and the input transistor of the detection circuit is a comparator transistor or a transistor coupled to the comparator transistor.

[0013] Typically, the predetermined voltage threshold is equal to or close to 0 volts. "Close to 0 volts" means less than 20% of the supply voltage Vdd in absolute value, and usually equal to less than 10% of the supply voltage Vdd.

[0014] According to one embodiment, the present invention relates to a device for detecting current from a power transistor, wherein the current detection device is capable of indicating when the detected current reaches or does not reach at least a first predetermined current level, and the detection device A circuit section comprising a so-called "detection" node coupled to the power transistor, and configured to generate a so-called "measurement" voltage at the detection node, which is a mapping of a small portion of the current flowing through the power transistor, A detection circuit comprising at least one transistor coupled to the detection node, wherein at least one of the amplifier stages comprises one or more amplifier stages, the amplifier stage comprising a so-called "comparator" transistor having a source-gate voltage dependent on the measurement voltage, It includes, The detection circuit is configured to compare the measured voltage with a predetermined threshold and output a two-state detection signal indicating when the detected current reaches a first predetermined current level. The detection signal selects a first state when the measured voltage is lower than the predetermined threshold and a second state when the measured potential is higher than the predetermined threshold.

[0015] Preferably, the detection circuit further includes a so-called 'output' transistor having a drain coupled to the output and a gate coupled to the drain of the comparator transistor.

[0016] According to one embodiment, the present invention relates to a device for detecting current from a power transistor, wherein the current detection device is capable of indicating when the detected current reaches or does not reach at least a first predetermined current level, and the detection device A circuit section comprising a so-called "detection" node coupled to the power transistor, and configured to generate a so-called "measurement" voltage at the detection node, which is a mapping of a small portion of the current flowing through the power transistor, A detection circuit comprising at least one transistor coupled to the detection node, wherein at least one of the amplifier stages comprises one or more amplifier stages, the amplifier stage comprising a so-called "comparator" transistor having a source-gate voltage dependent on the measurement voltage, It includes, The detection circuit is configured to compare the measured voltage with a predetermined threshold and output a two-state detection signal indicating when the detected current reaches a first predetermined current level. The detection signal selects a first state when the measured voltage is lower than the predetermined threshold and a second state when the measured potential is higher than the predetermined threshold.

[0017] According to one possible implementation of the aforementioned device, the power transistor is a HEMT transistor having a GaN-based channel structure.

[0018] Preferably in this case, the transistor of the at least one detection circuit may also be a HEMT transistor having a channel structure made of at least one GaN layer. Implementing the power transistor and the detection circuit using the same technology enables co-integration within the same chip, and therefore allows for increased density.

[0019] According to one possible implementation, the power transistor, the circuit section comprising the detection node, and the detection circuit can be integrated on the same substrate.

[0020] Typically, the detection circuit includes a so-called "output" transistor having a drain coupled to the output, and the output transistor has a gate coupled to the drain of the comparator transistor. Using such an output transistor, the signal resulting from the detection can be shaped to obtain a square wave signal.

[0021] Preferably, the output transistor and the comparator transistor of the detection circuit are of the normally-off type.

[0022] According to one particular implementation of the device, the detection node can be coupled to the source of the so-called 'input' transistor of the detection circuit. This type of configuration may enable the acquisition of an amplification chain with low input impedance.

[0023] In the first embodiment of the detection device, the first predetermined current level becomes a positive current level. In this case, the detection circuit generates a detection signal at the output indicating the detection of a positive current. The amplifier stage typically forms an amplifier chain with positive gain.

[0024] According to one particular implementation of this first embodiment, the detection node is coupled to the source of a so-called "input" transistor of the detection circuit, the input transistor having a drain electrode coupled to the gate of the comparator transistor, the comparator transistor having a source set to a fixed potential.

[0025] Preferably, the input transistor can be connected as a diode.

[0026] Preferably, the input transistor can be a normally-off type transistor, which facilitates adjustment of the detection threshold.

[0027] In the second embodiment, the first predetermined current level becomes a negative current level, and the detection circuit outputs a detection signal indicating the detection of a negative current.

[0028] In this case, the amplifier stage can form a negative-gain amplifier chain.

[0029] According to one possible implementation of this second embodiment, the detection node is coupled to the source of the comparator transistor, and the comparator transistor is connected as gate common. The gate of the comparator transistor can be coupled to a transistor that is then connected as a diode.

[0030] According to other possible implementations of this second embodiment, the detection node can be coupled to the gate of a so-called "input" transistor of the detection circuit, the input transistor having a drain which is coupled to the gate of the comparator transistor.

[0031] According to a third embodiment of the detection device, the detection circuit includes a so-called "input" transistor, the source or gate electrode of which can be coupled to the detection node. The selection of the electrode into which the measurement voltage is injected depends on whether it is desirable to detect a positive or negative current level.

[0032] Preferably, for this third embodiment, the input transistor may include a drain electrode coupled to the gate of the comparator transistor and a transistor forming an active load.

[0033] In other possible implementations, the first predetermined current level of the detected current can be set to a positive current level, thereby causing the detection circuit to generate a detection signal indicating positive current detection. In this case, the device may further include at least a second detection circuit, the second detection circuit comprising a transistor and at least one amplification stage including at least one comparator transistor whose source-gate voltage depends on the measured voltage, the second detection circuit being configured to output another two-state detection signal, the other detection signal being a two-state signal capable of indicating that the detected current is negative.

[0034] The detection circuit typically includes a circuit for biasing the transistor. Preferably, only a positive supply voltage is supplied to this bias circuit, which also allows for increased density.

[0035] Preferably, the detection circuit may be configured such that the first and second states correspond to positive voltage levels of the detection signal. Such signals have the advantage of being easily used downstream, particularly by digital processing circuits.

[0036] The present invention will be better understood based on the following description and the accompanying drawings. [Brief explanation of the drawing]

[0037] [Figure 1] This figure shows a current sensing device implemented according to one embodiment of the present invention, which is fitted with a circuit including transistors that form an amplification chain for detecting when the current flowing through a power transistor is positive. [Figure 2] This figure shows the various signals implemented within the detection device shown in Figure 1. [Figure 3]This figure shows another embodiment of a current sensing device equipped with a detection circuit for detecting when the current flowing through a power transistor is negative in this case. [Figure 4] This figure shows the output signals from the positive current detection circuit and the negative current detection circuit for different performance characteristics of transistors in an amplifier chain. [Figure 5] This figure shows a current sensing device equipped with both a positive current sensing circuit and a negative current sensing circuit. [Figure 6] This figure shows different signals implemented within a current sensing device that involves negative and positive current detection. [Figure 7] This figure shows one alternative embodiment of a detection circuit for detecting positive current. [Figure 8] This figure shows one alternative embodiment of a detection circuit for detecting negative current. [Figure 9] This figure shows one alternative embodiment of a current sensing circuit that can be adapted to either negative or positive current detection. [Figure 10] This figure shows a current sensing device fitted with two sensing circuits, one of which is adapted for negative current detection and the other for positive current detection, as shown in Figure 9. [Figure 11] This figure shows an exemplary device for detecting the polarity of an AC voltage. [Modes for carrying out the invention]

[0038] Parts that are exactly the same, similar, or equivalent within the various figures share the same reference number to facilitate switching between figures. The various parts represented within the figures are not necessarily drawn to a uniform scale to make reading the figures easier.

[0039] The following describes a device for detecting the current level of a power transistor, implemented according to one embodiment of the present invention.

[0040] Detection is performed from a measured voltage, which is a mapping of a small portion of the current flowing through the power transistor. Specifically, the detection of current polarity is implemented by using a circuit that receives a measured voltage or a voltage dependent on the measured voltage, and is fitted with at least one transistor, usually connected as common source or common gate, forming at least one preferably high-gain amplifier, and detecting a threshold crossover of this measured voltage, specifically a zero or non-zero crossover.

[0041] The detection device is preferably configured to provide an all-or-nothing type output signal, in other words, a binary or two-state signal, depending on whether a predetermined current level provided by the power transistor is detected. Thus, its output signal can be used by digital circuits. This output signal selects one state, in other words, a voltage level, when the current is below a predetermined current level, and the other state, in other words, the other voltage level, when the current exceeds that predetermined current level.

[0042] Power transistors can be N-type transistors in particular, and often provide bidirectional, or in other words, positive or negative, current. Power transistors are preferably heterostructured field-effect transistors, typically high electron-mobility transistors (HEMTs) with a structure comprising two semiconductor materials with different band gaps.

[0043] In the exemplary embodiment illustrated in Figure 1, the power transistor 10 under consideration is a GaN-HEMT transistor having a channel structure made at least partially from a GaN layer. This transistor 10 is arranged in parallel with a plurality of transistors 121, ..., 12 that share a common drain electrode and a common source electrode. 21It can be formed from multiple parallel cells, which are represented as follows. The paper "From epitaxy to converters topologies what issues for 200mm GaN / Si?" by L. Di Cioccio et al., 2015 IEEE International Electron Devices Meeting (IEDM), Washington D.C., 2015, pp. 16.5.1-16.5.4, doi:10.1109 / IEDM.2015.7409712, introduces technical implementations of this type of transistor.

[0044] A small portion of the drain current from transistor 10 is converted via a current-to-voltage conversion stage 20. This conversion stage 20 includes a resistor 24, which is typically a resistor connected to transistors 121, ..., 12 21 It is arranged in series with transistor 22 of the same type. Therefore, a portion of the drain current of power transistor 10 is shunted, and transistors 121, ..., 12 21 It is returned to the common node.

[0045] A so-called "detection node" N1, located between transistor 22 and resistor 24 and coupled to the source of transistor 22, is a so-called "measurement" voltage V, which is a mapping of a small portion of the current for which polarity is desired or for verifying whether the level exceeds a predetermined level. sense This makes it possible to generate [something].

[0046] The measured voltage V is a mapping of a portion of the current to be detected. sense This refers to transistor M that forms a multi-stage amplifier or a chain of amplifiers. 36 M 37 M 38 This is applied to the input of the detection circuit 30.

[0047] For example, the measured voltage V sense level can be less than 100 mV for a maximum current on the order of 1 A flowing through the power transistor.

[0048] Preferably, a resistor 24 having a large value, for example, a value at least 10 to 100 times the resistance R of the transistor 22 in its on-state ON_mes of V sense is selected herein to shunt a small amount of current away from the power transistor.

[0049] For example, if the on-state resistance R of the transistor 22 ON_mes is on the order of 10 ohms, the resistor 24 may be provided in the range of 100 ohms to 1 kΩ. Generally, the equivalent resistance Ron in the on-state of the transistors 121, ..., 12 connected in parallel 21 is less than 10 ohms to ensure high efficiency of the power converter.

[0050] The detection circuit 30 is adapted to a particularly wide range of measured voltage V sense , which range may depend on variations in the method for manufacturing the power transistor 10 used.

[0051] The detection circuit 30 herein is a so-called "positive voltage detection" circuit and operates in open loop. In this exemplary embodiment, the positive voltage detection circuit 30 enables detection of a positive current by detecting an upward zero crossing of the measured voltage V sense . The amplifier chain therefore has an overall positive gain.

[0052] Specifically, the detection circuit 30 comprises a first transistor M, referred to as an "input transistor", that receives the measurement signal V sense M 36 , followed by a second transistor M connected as a common source 37 , which in turn outputs a two-state signal OUT that alternates between a voltage on the order of, for example, 0 volts and another voltage on the order of at least 3 volts, for examplep The third transistor M, called the 'output transistor', generates 38 It is equipped with.

[0053] Transistor M 36 M 37 M 38 This is preferably the same type as power transistor 10, specifically a HEMT transistor, usually with a GaN-based channel structure. Transistor M 36 M 37 M 38 Therefore, it is possible to integrate them on the same substrate and manufacture them within the same technical stack as the power transistor 10. The power transistor 10 and the associated detection circuit 30 can therefore be conveniently co-integrated on the same chip to achieve density.

[0054] Transistor M 37 M 38 This is typically a normally-off (n-off) transistor with a positive threshold voltage that turns off when the source-gate voltage is zero, or an enhancement transistor. Using this type of transistor ensures a proper gate bias level to provide a sufficient output voltage level. In this example, transistor M 37 M 38 However, transistor M 36 It can withstand a gate voltage that is approximately the same as the drain voltage, i.e., a voltage in the 1.5V range.

[0055] Transistor M 36 M 37 M 38 The circuit for biasing it here uses, for example, a positive supply voltage VDC in the range of 6 volts and a resistor R 32 , R 33 , R 34 , R 35 , R 36 This bias circuit includes transistor M. 36 M 37 M 38In a method that operates in a saturated state, specifically, the resistor R 32 , R 34 , R 36 Preferably provided by making an appropriate selection of resistor R. 33 and R 35 These resistors reduce the circuit's sensitivity to technical variations. These resistors are optional and can be omitted, especially when the overall gain of the connection is prioritized.

[0056] Transistor M 36 and transistor M 37 The branches 31 and 32 of the circuit, which each contain, have exactly the same resistance R. 32 , R 34 Equipped with a saturated transistor M 36 M 37 To achieve the bias and obtain the maximum gain and low current sensing threshold, R 32 =R 34 =R L These are, for example, in the range of 10kΩ to 40kΩ. For example, resistors R of 7.5kΩ, 50Ω, and 100Ω, respectively. 36 , R 33 , R 35 It is possible to provide the resistor R. 32 and R 34 These do not necessarily have to be exactly equal. In practice, the maximum gain for each stage is sought, and therefore, in the illustrated example, each branch is biased in the same way, and the optimal condition is the same for all stages.

[0057] The measured voltage V is a mapping of a portion of the current to be detected. sense However, the voltage is applied to branch 31, specifically to the input transistor. Measured voltage V sense The fluctuations in this region lead to an imbalance between branches 31 and 32, specifically between the potentials GGbias and VDtect used for detection.

[0058] Measured voltage V sense In this example, the resistor R enables the acquisition of an amplification chain with low input impedance. 33via input transistor M 36 It is applied to the source. Resistor R 33 This can be omitted when an increase in gain, and therefore in the system's sensitivity, and a decrease (in absolute value) in the current detection threshold are desired.

[0059] In a particular exemplary embodiment illustrated in Figure 1, the input transistor M 36 It is also a normally-off transistor that facilitates the adjustment of the circuit's detection threshold, which depends on the different bias points to which the transistor is subjected.

[0060] Input transistor M 36 In this configuration, the gate electrode is connected as a diode with its drain connected to it, and the measured voltage V is located at the drain electrode. sense This generates a potential GGbias that depends on the M. This potential GGbias is a so-called 'comparator transistor' M 37 It is applied to the gate.

[0061] Comparator Transistor M 37 Here, the source is resistor R 35 It is coupled to ground via and therefore connected to a fixed or substantially fixed potential. Its source-gate voltage, which determines the conduction state, i.e., on or off, is therefore the measured voltage V sense It depends on the passage of time. Comparator transistor M 37 This generates a potential VDtect at its drain, which then acts as the so-called 'output' transistor M. 38 Coupled to the gate of transistor M 38 The drain of the output signal OUT p It generates output transistor M. 38 Depending on its state, it outputs a square wave or binary signal OUT indicating the positive polarity of the current of power transistor 10. p Generates the output signal OUT. pis a positive voltage between GND and VDC herein. When the detection threshold is not reached, the signal is GND, for example 0 volts; when the detection threshold is reached, the signal is VDC herein, which is usually higher than 3 volts.

[0062] Figure 2 illustrates the operation of the detection circuit 30 described above, when a sine wave test signal VAC alternating between negative and positive values is applied to the power transistor 10 using a gate driver (not shown) that receives a low-power signal and generates a power control input GateCTRL for controlling the gate of the higher-power transistor 10.

[0063] This generates a current alternating between negative and positive that flows through the power transistor 10.

[0064] Curves C 20 , C 21 , C 22 , C 23 respectively represent the test signal VAC, the current I(R1) flowing through the power transistor 10, the potential V(Dtect) of node Dtect generated by transistor M 37 and provided to the gate of output transistor M 38 , and the all-or-nothing output signal OUT p of the detection circuit 30.

[0065] At time t1, the current level is negative, and therefore lower than the current level for which detection is desired.

[0066] The source-gate voltage of comparator transistor M 37 places this transistor M 37 in a state close to the off state. As a result, the gate of output transistor M 38 rises to a voltage close to the higher supply voltage VDC, and is therefore set to a voltage higher than the threshold voltage of this transistor M 38 . Transistor M 38has a source-gate voltage that places it in a predetermined conduction state, which is an ON state herein, and as a result, the signal OUT at the output of circuit 30 p reaches a first voltage level, which is ground GND herein, corresponding to a first state indicating that the current to be detected is lower than the detection level.

[0067] At time t2, the current rises and becomes higher than the detection level; specifically, it rises, changes sign and reaches a positive current level, and the measured voltage Vmes also changes sign and becomes positive. When the voltage exceeds the detection threshold (time t3), the comparator transistor M 37 corrects the source-gate voltage and corrects its conduction state (therefore, the detection threshold is set not at 0A herein, but at a current level slightly higher than 0A).

[0068] Transistor M 37 switches to another state which is ON herein, and this changes and reduces the drain potential of comparator transistor M 38 applied to the gate of output transistor M 37 , and as a result, a change is caused to the source-gate voltage of output transistor M 38 such that the conduction state of transistor M 38 changes. Output transistor M 38 switches to another conduction state which is OFF herein. In this case, output OUT p is coupled to the supply voltage VDC, and therefore the output signal OUT p becomes a second voltage level corresponding to, for example, logic level "1", indicating that the current to be detected is higher than the detection level, specifically that it is positive.

[0069] One alternating current detection circuit is shown in Figure 3.

[0070] Circuit 50 is referred to as a negative voltage detection circuit herein, and it also includes transistors M forming an amplifier chain 54 , M 55 , M 53This is conveniently provided. In this exemplary embodiment, the circuit 50 has an overall negative gain, which in this case allows for the detection of a negative current flowing through the power transistor 10.

[0071] Transistor M 54 M 55 M 53 Preferably, the power transistor is of the same type as the power transistor 10, specifically a GaN-based HEMT transistor, which in this case can also be conveniently integrated on the same substrate and manufactured within the same technical stack as the power transistor 10.

[0072] In this particular exemplary embodiment, transistor M 54 M 55 M 53 This is a normally-off type.

[0073] The specific feature of circuit 50 here is transistor M 54 M 55 M 53 A circuit for biasing is provided, which operates only with a positive supply voltage, for example, in the 6-volt range VDC, and therefore requires no additional circuit elements whatsoever.

[0074] In this example, the resistor R 54 , R 56 , R 58 , R 57 , R 59 A bias circuit equipped with a transistor M enters a saturation state. 55 M 53 It is configured to bias the resistor R, as in the exemplary embodiment described above. 57 and R 59 This is optional and can be omitted if the circuit's gain is preferred.

[0075] Conveniently, while having the best current sensitivity, transistor M 54 M 55 M 53By biasing the current, the same current level I is achieved at each of the branches 51, 52, and 53. O In order to secure R 54 =R 56 =R 58 Let R be a perfectly equal resistor, where R = RL. 54 , R 56 , R 58 It is possible to provide this.

[0076] In this case, the detection node N1 is a comparator transistor M whose gate is set to a fixed or constant potential VGGbias. 55 It is coupled to the source of transistor M. 55 This is also a measurement signal V sense Specifically, it has a source-gate voltage that depends on its sign. Comparator transistor M 55 To bias the gate, transistor M is connected here as a diode. 54 It is equipped with, and that is, transistor M 55 The source-gate voltage at which it switches is lowered. Transistor M 55 The gate is coupled to the drain of the output transistor M. 53 However, the binary output signal OUT n This generates a signal, and its state indicates whether the detected current is negative or not.

[0077] Preferably, the gain of the gate common connection and the comparator transistor M 55 The maximum ratio between the currents Ids provided by the transistor M is sought. To determine the appropriate bias conditions, the transistor M 55 The gain-to-current ratio can be determined as a function of its gate voltage for various geometries. From this, the current value I0 that maximizes this ratio, and therefore the gate-to-source voltage Vgs, i.e., the voltage above which the transistor changes its conduction state and resistance RL, can be derived.

[0078] Circuit 50 can operate as follows: When the current level of the power transistor is positive, the comparator transistor M of the negative voltage detection circuit 50 55 The gate-source voltage of this transistor M 55 In this case, the voltage becomes such that it results in a predetermined conductive state where it is turned off. Output transistor M 53 The gate in that case is supplied with voltage V DC This combines with the output transistor M, resulting in this output transistor M. 53 However, it has a source-gate voltage that puts it into a predetermined conductive state, which in this case is the ON state. The signal OUT at the output of circuit 50 n This is defined as ground (GND) and represents a first voltage level corresponding to a first state that characterizes, for example, logic level "0". In that case, the signal OUT n This indicates that no negative current was detected. When the sign of the current flowing through power transistor 10 changes to negative, it becomes the measured voltage V sense This causes a change in the sign of the comparator transistor M 55 The conduction state of transistor M is changed by varying its source-gate voltage. 55 The output transistor M turns on, and as a result, 53 The gate is coupled to the input, and the measured voltage V sense This will depend on the level of the output transistor M. 53 The source-gate voltage of the transistor M is changed, and therefore its conduction state is altered. 53 This is turned off, and as a result, the signal OUT in the output n The signal is drawn to the supply voltage VDC side, which causes the signal to OUT. n This becomes the second state, for example, the state that characterizes logic level "1".

[0079] As shown in Figure 4, all of the detection circuits described above are robust against process variations.

[0080] This figure shows the simulation results of the operation of the aforementioned circuits 30 and 50 for different performances of TT (typical-typical), FF (high-speed-high-speed), and SS (low-speed-low-speed) transistors, representing potential variations in the process corner, with curve C. 41 , C' 41 , C” 41 These represent the current I(R1) flowing through the power transistor, respectively, and curve C 43 , C' 43 , C” 43 This is the signal OUT provided by the positive voltage detection circuit. p This represents curve C 45 , C' 45 , C” 45 This is the signal OUT provided by the negative voltage detection circuit. n This represents the transistor size, which is optimized here to reduce power consumption. The overall consumption at a voltage of 6 volts is, for example, 660 μA for a TT transistor, 900 μA for an FF transistor, and 500 μA for an SS transistor.

[0081] The negative voltage detection circuit 50 can be used in combination with the positive voltage detection circuit 30 described above.

[0082] Therefore, in the device illustrated in Figure 5, circuits 30 and 50 are co-integrated within the same current detection device and are conveniently manufactured on the same substrate as the positive voltage detection circuit 30, and, if appropriate, on the same substrate as the power transistor 10. Thus, the co-integration of the power transistor 10 and the detection circuits 30 and 50 is provided to enable the device to detect both when the current flowing through the power transistor 10 has a negative intensity and when it has a positive intensity.

[0083] Figure 6 shows other simulation results of the operation of the device including the two co-integrated circuits 30 and 50 described above, where curve C 61 , C 62 , C 63 , C 65These represent the current I (R1) flowing through the power transistor and the output transistor M, respectively. 38 The potential V (Dtect) emitted by the gate, and the signal OUT at the output of the positive voltage detection circuit 30. p , signal OUT at the output of the negative voltage detection circuit 50 n This represents one embodiment in which two circuits 30 and 50 are used together, with an undetected, so-called "dead zone" detection range between, for example, 0.7A and -2.7A, corresponding to current values ​​around zero.

[0084] Dead zones can be useful in some control systems, for example, the output OUT of detection circuits 30 and 50. p and output OUT n This can prevent simultaneous conduction of two devices, each controlled by a different mechanism. This kind of dead zone is determined by the dimensions of each transistor and / or the value of the resistance of the circuit used to bias the transistor, specifically the resistance R of the detection circuit 30. 33 , R 35 or the R of the other detection circuit 57 , R 59 It can be adjusted by changing [something].

[0085] Figure 7 shows a detection circuit 30' of an alternative embodiment adapted for positive current detection.

[0086] The detection circuit 30' also uses transistor M' to form an amplifier chain with an overall positive gain. 36 , M' 37 , M' 38 The detection circuit 30' is the one described earlier in relation to Figure 1, and in particular its input transistor M' 36 It varies depending on the transistor, and in this example, this is the normally on, or n-on, state where the source-gate voltage is zero. On the other hand, transistor M' 37 , M' 38 It can be set to Normal Off.

[0087] Input transistor M' that receives the measured voltage 36 It is biased to be set to a saturation state, and as a result generates a substantially constant current Ids that depends only on the transistor geometry. To enable the maintenance of this state, transistor M' 36 The resistor RL of the bias circuit branch to which the drain is connected is preferably selected such that it satisfies the following conditions: RL ≤ (VDD - Vds) / Ids In this, VDD is the value of the supply voltage of the bias circuit, Ids is the drain-source current of the transistor, and Vds is its drain-source voltage.

[0088] The small signal gain Avo of a common gate amplification stage is gm × R L It is a base, and in it gm is transistor M' 36 Transconductance, R L It is resistance. Condition: V ds ≥V dssat As long as the following conditions are met, Av0 = (gm / Ids) × (V dd -V ds ) can be shown, and in that, V dssat This is a technical parameter of the transistor, which depends on its bias and geometry, and can be obtained, for example, through simulation. Transistor M' 37 , M' 38 The branch of the bias circuit to which each drain is connected is determined by the resistor R, insofar as the source-drain voltage VDssat in their saturation mode differs from that of a normal-on transistor. L A different resistor RL2 can be provided. To maximize the gain, the factor gm / Ids must be maximized, and the transistor M' 36 In order to maintain a saturated state, V dssat You need to select Vds so that it is equal to [the given value].

[0089] One alternative embodiment of a detection circuit adapted for negative current detection is shown in Figure 8.

[0090] The detection circuit 50' uses transistor M' 54 , M' 55 , M' 53 It encompasses, and here they form an overall negative gain amplification chain. The detection circuit 50' is input transistor M' 54 This transistor M' is provided, and in this case it is connected as a common source. 54 Therefore, the measured voltage V on its gate sense It receives this transistor M'. 54 The amplifier stage to which it is attached is -gm×R L It has a negative amplification gain Avo.

[0091] Input transistor M' 54 Transistor M' is normally on, meaning it turns on when the source-gate voltage is zero. 55 and output transistor M' 53 This is a normal-off transistor, which is also connected with a common source, and transistor M 55 M 53 It has a similar arrangement.

[0092] Figure 9 shows a normally-off type comparator transistor M with an arrangement similar to the example described above. 72 And, output transistor M 73 Another exemplary detection circuit 70 is shown, which conveniently incorporates a normally-on type input transistor M. 71 This includes a measurement signal V at either its gate or its source, corresponding to the first input INp and second input INN of the circuit, respectively. sense It receives one of the inputs INp and INn that is not used, and therefore the measured signal V sense Those who do not receive the signal can set it to the reference potential, in this case to ground (GND).

[0093] When detection of a positive current is desired, the first input INp is connected to the detection node N1, and when detection of a negative current is desired, the second input INn is connected to the detection node N1.

[0094] To achieve high-gain amplification, a comparator transistor M is connected as a current source. 72 Transistor M forms an active load coupled to its gate. 74 The detection circuit 70 in this example further includes the following:

[0095] To enable the detection of both positive and negative currents, the detection circuit 70 can be made redundant as described above.

[0096] In the example illustrated in Figure 10, the detection device therefore includes a first detection circuit 701 of the type illustrated in Figure 9, associated with a second detection circuit 702 of the type illustrated in Figure 9. The first detection circuit 701 has an input INp, which measures the signal V sense It receives and outputs a two-state signal OUT1 to indicate when a positive current is detected. The second detection circuit 702 has an input INn and measures the signal V sense It receives a signal and outputs a two-state signal OUT2 to indicate when a negative current is detected.

[0097] In all of the examples described above, the detector is capable of detecting the polarity of the alternating current.

[0098] A detector with a transistor according to any of the embodiments described herein can also be adapted to detect the polarity of an AC voltage. Thus, in the exemplary embodiment shown in Figure 11, a detection circuit of the type illustrated in Figure 10 and described herein is used to indicate the polarity of an AC voltage VAC, for example, at the input to a power converter. Therefore, this detection device includes a first detection circuit 701 of the type illustrated in Figure 9, associated with a second detection circuit 702 of the type illustrated in Figure 9. The first detection circuit 701 has an input INp coupled to detection node N1 and outputs a two-state signal OUT1 to indicate when the voltage VAC between two nodes NA and NB is positive, and the second detection circuit has an input INn coupled to detection node N1 and outputs a two-state signal OUT2 to indicate when the voltage VAC is negative. The measurement signal V at node N1 sense In this example, this is achieved by limiting the AC voltage VAC. Therefore, a voltage limiter 117 is provided between node N1 and node NB. Preferably, clipping of node NA can also be implemented using a clipper 116, especially when the amplitude of voltage VAC is large compared to the supply voltage of the detection circuit 70. Therefore, the clipper stage controls the voltage V between the ground and supply voltage of the detection circuit 70. sense Because it has this property, it may be possible to absorb a large portion of the voltage between nodes NA and NB in ​​order to enable the use of 'low voltage' transistors that are more compact and less expensive in making circuit 70.

[0099] Thus, an AC voltage VAC is supplied between two nodes NA and NB, and at least one component in series between these nodes NA and NB, and here a voltage V is a mapping of a small portion of the voltage VAC. sense Therefore, there exists a part of the detection circuit that includes a node N1 that supplies an AC signal having polarity dependent on the direction of this voltage VAC.

Claims

1. A detection device for detecting the polarity of a current to be detected that alternates between positive and negative, or a voltage to be detected that alternates between positive and negative, wherein the detection device is capable of indicating the polarity of the current to be detected or the voltage to be detected, and the detection device is Detection node (N １ ) is provided, and a portion of the detected current or detected voltage is branched, and the branched detected current or detected voltage is measured to a voltage (V) that represents a portion of the detected current or detected voltage. ｓｅｎｓｅ A circuit section (20) configured to convert to ), said detection node (N １ ) connected transistor (M ３６ , M ５４ , M ７１ , M ３７ , M ５５ , M' ３７ , M' ５５ , M ７２ , M ３８ , M ５３ , M' ３８ , M' ５３ , M ７３ ), at least one detection circuit comprising three or more amplifier stages, wherein at least one of said amplifier stages has a gate-source voltage dependent on said measurement voltage (V ｓｅｎｓｅ ), and comprises comparator transistors (M ３７ , M ５５ , M' ３７ , M ７２ ), at least one detection circuit (30, 30', 50, 50', 70, 70 １ , 70 ２ , 90), and Equipped with, The aforementioned comparator transistor (M ３７ M ５５ , M' ３７ M ７２ Furthermore, the source is set to a fixed potential (GND), and the gate-source voltage is the measured voltage (V ｓｅｎｓｅ ) depends on the detection node (N １ ) is the input transistor (M) of the detection circuit (30, 30', 70) ３６ M ７１ ) is connected to a source, or the gate is set to a fixed potential (VGGbias) and the gate-source voltage is the measured voltage (V ｓｅｎｓｅ ) depends on the detection node (N １ ) is the comparator transistor (M ５５ ) is connected to the source, The detection circuit further includes an output transistor (M) having a drain coupled to the output. ３８ M ５３ , M' ３８ M ７３ ) encompasses the output transistor, and the comparator transistor (M ３７ M ５５ , M' ３７ M ７２ It has a gate connected to the drain of ) The detection circuit measures the measured potential (V ｓｅｎｓｅ ) is compared with a predetermined threshold, and a binary detection signal (OUT) indicating the polarity of the detected current or the detected voltage is obtained. ｎ OUT ｐ OUT １ OUT ２ The detection circuit is configured to generate the measurement voltage (V) at the output, and the detection circuit is configured to generate the measurement voltage (V) ｓｅｎｓｅ When the measurement voltage (V) is lower than the predetermined threshold, the first state is selected, and the measurement voltage (V) ｓｅｎｓｅ When ) is higher than the predetermined threshold, a second state is selected. The input transistor (M) of the detection circuit ３６ , M ５４ ), the comparator transistor (M ３７ M ５５ , M' ３７ , M' ５５ M ７２ ), and the output transistor (M ３８ M ５３ , M' ３８ , M' ５３ M ７３ ) is N-type and normally-off type, Detection device.

2. The detection circuit (30, 30') outputs (OUT ｐ A detection signal indicating positive polarity is generated on the detection node (N), and the amplifier stage forms a positive gain amplification chain, and the detection node (N １ ) is the input transistor (M) of the detection circuit (30, 30'). ３６ The input transistor is coupled to the source of the comparator transistor (M ３７ The comparator transistor (M) has a drain electrode that is coupled to the gate of the comparator transistor (M ３７ The detection device according to claim 1, wherein the source is set to a fixed potential (GND).

3. The aforementioned input transistor (M ３６ The drain and gate of the detection device according to claim 2 are connected.

4. The aforementioned detection node (N １ ) is a comparator transistor (M ５５ ) is connected, The detection circuit (50, 50') outputs a detection signal indicating the detection of negative polarity to the output (OUT). ｎ The detection device according to claim 1, wherein the amplifier stage generates the signal and forms a negative gain amplification chain.

5. The aforementioned comparator transistor (M ５５ The gate of the above-mentioned transistor is the input transistor (M ５４ It is connected to the input transistor (M ５４ The drain and gate of the detection device according to claim 4 are connected.

6. The aforementioned detection node (N １ ) is the input transistor (M') of the detection circuit (50'). ５４ The input transistor is coupled to the gate of the comparator transistor (M' ５５ The detection device according to claim 1, having a drain coupled to the gate of the aforementioned device.

7. The aforementioned detection node (N １ ) is the input transistor (M) of the detection circuit (70). ７１ The input transistor is coupled to the source electrode of the comparator transistor (M ７２ The transistor (M) that is implemented as the gate and active load of the aforementioned transistor (M ７４ The detection device according to claim 1, comprising a drain electrode coupled to ).

8. The aforementioned detection circuit (30, 70 １ ) is a detection signal indicating positive polarity (OUT ｐ The detection device generates a second detection circuit (50, 70 ２ The second detection circuit is equipped with a gate-source voltage that is equal to the measurement voltage (V ｓｅｎｓｅ ) depends on at least one comparator transistor (M ５５ The second detection circuit (30, 50) comprises at least one amplification stage including the measurement voltage (V ｓｅｎｓｅ ) is compared with a predetermined second threshold, and the other two state detection signals (OUT) are used in the output. ｎ ) is configured to generate the other detection signal (OUT ｎ The detection device according to claim 1, wherein the signal is a binary detection signal capable of exhibiting negative polarity.

9. The detection circuit (30, 70 １ ) and the second detection circuit (50, 70 ２ ) are configured with a non-detection dead zone detection range corresponding to a current value around zero, the detection device according to claim 8.

10. The detection device according to any one of claims 1 to 9, further comprising a bias circuit for biasing the input transistor, the comparator transistor, and the output transistor of the detection circuit, wherein the bias voltage is supplied to the bias circuit by a positive supply voltage (VDC).

11. AC current arrives from the power transistor (10) coupled to the circuit section (20), and the power transistor is a HEMT transistor having a GaN-based channel, and the transistor (M) of at least one detection circuit (30, 30', 50, 50', 70) ３６ M ３７ M ３８ M ５４ M ５５ M ５３ The detection device according to any one of claims 1 to 10, wherein the detection device is also a HEMT transistor having a channel structure formed in a GaN layer.

12. A detection AC current to be detected arrives from a power transistor (10) coupled to the circuit section (20), the detection device further includes the power transistor (10), and the power transistor, the circuit section (20), and the at least one detection circuit (30, 50, 30', 50', 70, 90) are integrated on the same substrate, the detection device according to any one of claims 1 to 11.

Images