Manufacturing method of wiring boards

Abstract

To provide a method of manufacturing a highly reliable wiring board.SOLUTION: Disclosed is a method of manufacturing a wiring board which includes the steps of: preparing a laminate including a first insulating layer 11 and a first conductive layer 12 including a plurality of conductive pads 12a formed on the first insulating layer 11; forming, on the first conductive layer 12, a coating insulating layer 10 including a large-diameter opening 10a and a small-diameter opening 10b through which the upper surface of the conductive pad 12a is exposed; performing the oxide film removal processing on the upper surfaces of the plurality of conductive pads 12a exposed in the large-diameter opening 10a and the small-diameter opening 10b, respectively; and forming metallic posts 100a and 100b on the conductive pads 12a. The oxide film removal processing includes the plasma processing.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a wiring board. [Background Art]

[0002] Patent Document 1 discloses a method for manufacturing a board including a metal post connected to a connection pad. In the method for manufacturing a board disclosed in Patent Document 1, the metal post is formed on a seed layer covering the inside of an opening that exposes the upper surface of the connection pad in the solder resist layer. [Prior Art Documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Unexamined Patent Publication No. 2010-129996 [Summary of the Invention] [Problem to be Solved by the Invention]

[0004] In the method for manufacturing a board disclosed in Patent Document 1, the upper surface of the connection pad exposed inside the opening of the solder resist layer is covered with the seed layer, and the metal post is formed on the seed layer. When the adhesion between the seed layer and the connection pad is insufficient, it is considered that defective formation of the metal post may be caused. [Means for Solving the Problem]

[0005] A method for manufacturing a wiring board according to the present invention comprises: preparing a laminate including a first insulating layer and a first conductor layer including a plurality of conductor pads formed on the first insulating layer; forming a covering insulating layer having a large-diameter opening exposing the upper surface of the conductor pad and a small-diameter opening on the first conductor layer; performing an oxide film removal treatment on the upper surfaces of the plurality of conductor pads respectively exposed inside the large-diameter opening and the small-diameter opening; and forming a metal post on the conductor pad. The oxide film removal treatment includes plasma treatment.

[0006] According to embodiments of the present invention, since the oxide film removal treatment on the upper surface of the conductor pad exposed in the opening includes plasma treatment, it is considered that the metal post formed on the conductor pad and the conductor pad can be joined with good adhesion. [Brief explanation of the drawing]

[0007] [Figure 1] A cross-sectional view showing an example of a wiring board manufactured by the method of one embodiment of the present invention. [Figure 2A] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2B] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2C] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2D] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2E] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2F] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2G] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2H] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2I] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 2J] A diagram showing an example of a manufacturing method for one embodiment of the present invention. [Figure 3] A diagram illustrating another example of a manufacturing method for one embodiment of the present invention. [Modes for carrying out the invention]

[0008] Next, a wiring board manufactured by a wiring board manufacturing method, which is one embodiment of the present invention, will be described with reference to the drawings. Note that the drawings referenced below are not intended to show the exact proportions of each component, but are drawn in a way that facilitates understanding of the features of this embodiment. Figure 1 partially shows a cross-section of a wiring board 1, which is an example of a wiring board of this embodiment. The wiring board 1 is formed of alternatingly stacked insulating layers and conductive layers, and Figure 1 shows some of the insulating layers 10, 11 and conductive layer 12. One side F of the illustrated wiring board 1 may be a component mounting surface on which external electronic components such as semiconductor elements are mounted.

[0009] As shown in Figure 1, one side F of the wiring board 1 is composed of a coating insulating layer 10 and the surfaces of metal posts 100a and 100b that fill the openings 10a and 10b formed in the coating insulating layer 10 and protrude from the coating insulating layer 10 to the outside of the wiring board 1. As shown in Figure 1, the wiring board 1 has a metal post 100a that fills the large-diameter opening 10a and a metal post 100b that fills the small-diameter opening 10b.

[0010] Metal posts 100a and 100b may have a common structure in their layer structure, except for the difference in the diameter of the portion that penetrates the insulating coating layer 10 (the portion that fills the openings 10a and 10b). In this specification, "diameter" means the distance between the two furthest apart points in a cross-section along the horizontal direction of the object (the direction in which the insulating coating layer 10 extends). That is, for example, if the cross-sectional shape is circular, it means the diameter; if the cross-sectional shape is polygonal, it means the length of the longest diagonal; and if the cross-sectional shape is elliptical, it means the major axis.

[0011] The metal post 100a filling the large-diameter opening 10a may be formed such that the diameter of its lowest part (i.e., the bottom of the opening 10a) is 30 μm or more and 45 μm or less. The metal post 100b filling the small-diameter opening 10b may be formed such that the diameter of its lowest part (i.e., the bottom of the opening 10b) is 15 μm or more and 25 μm or less.

[0012] In FIG. 1, among the plurality of insulating layers 11 and conductor layers 12 that the wiring substrate 1 may have, three layers each of insulating layers 11 and conductor layers 12 on the side of one surface F are illustrated. The wiring substrate of the embodiment has one or two or more insulating layers 11 and one or two or more conductor layers 12, and a covering insulating layer 10 is formed on the insulating layer 11 and the conductor layer 12 closest to the one surface F. The number of layers of the insulating layers 11 and conductor layers 12 included in the wiring substrate 1 is not particularly limited, and can be increased or decreased as appropriate. Note that the insulating layer 11 closest to the covering insulating layer 10 having the one surface F is also referred to as a first insulating layer 11, and the conductor layer 12 closest to the covering insulating layer 10 having the one surface F is also referred to as a first conductor layer 12.

[0013] In the description of the wiring substrate of the embodiment, regarding each constituent element configuring the wiring substrate, the one surface F side in the thickness direction of the wiring substrate is referred to as "upper side", "outer side", or simply "upper" or "outer", and the side opposite to the one surface F is referred to as "lower side", "inner side", or simply "lower" or "inner". Accordingly, the surface on the one surface F side of each constituent element is also referred to as an "upper surface", and the surface facing the opposite side of the one surface F is also referred to as a "lower surface".

[0014] The conductor layer 12 has an arbitrary conductor pattern. The conductor layer 12 can be electrically connected to the conductor layer 12 on the opposite side of the insulating layer 11 via a via conductor 13 formed so as to penetrate the insulating layer 11.

[0015] Among the three illustrated conductor layers 12, the first conductor layer 12 formed on the uppermost side (closest to the one surface F) is formed in a pattern including a conductor pad 12a. The conductor pad 12a can be electrically connected to a connection pad included in an external electronic component such as a semiconductor element via metal posts 100a and 100b formed thereon. That is, the conductor pad 12a can be a component mounting pad.

[0016] As illustrated, a large-diameter metal post 100a is formed on the upper surface of a conductor pad 12a exposed in a large-diameter opening 10a. Further, a small-diameter metal post 100b is formed on the upper surface of the conductor pad 12a exposed in a small-diameter opening 10b. Before the metal posts 100a and 100b are formed, an oxide film on the surface of the conductor pad 12a exposed in the large-diameter and small-diameter openings 10a and 10b is removed by, for example, plasma treatment. Therefore, a newly formed surface is exposed on the upper surface of the conductor pad 12a, and the adhesion of the bonding surface between the metal posts 100a and 100b (specifically, the first layer 101) and the conductor pad 12a can be improved. Stronger bonding between the conductor pad 12a and the metal posts 100a and 100b can be achieved.

[0017] The metal posts 100a and 100b include a first layer 101 and a second layer 102 formed on the first layer 101. The first layer 101 constituting the metal posts 100a and 100b covers the inner surfaces of the openings 10a and 10b. Specifically, the first layer 101 covers the upper surface of the conductor pad 12a exposed at the bottom of the openings 10a and 10b formed in the covering insulating layer 10, and the inner wall surfaces (side wall surfaces) of the openings 10a and 10b. In the illustrated example, the first layer 101 further covers the upper surface of the covering insulating layer 10 at the peripheral portions of the openings 10a and 10b. The second layer 102 covers the entire area of the upper surface of the first layer 101. In the illustrated example, the metal posts 100a and 100b further include, on the upper side of the second layer 102, a third layer 103 covering the entire upper surface of the second layer 102, and a fourth layer 104 covering the entire upper surface of the third layer 103.

[0018] The insulating layer 11 constituting the wiring board 1 can be formed using any insulating resin such as epoxy resin. Polyimide resin, BT resin (bismaleimide-triazine resin), polyphenylene ether resin, phenolic resin, etc., can also be used. The insulating layer 11 may contain an inorganic filler such as silica. In the illustrated example of the wiring board 1, the insulating layer 11 does not contain a core material, but a core material such as glass fiber or aramid fiber may be included as needed. Including a core material can improve the strength of the wiring board 1. Multiple insulating layers 11 may be composed of different materials, or they may all be formed of the same material.

[0019] The conductive layer 12 can be formed using any material with suitable conductivity, such as copper or nickel. The conductive layer 12 is formed, for example, by an electroplating film (preferably an electroplated copper film), an electroless plating film (preferably an electroless copper plating film), or a combination thereof, and is preferably formed in a two-layer structure of an electroless plating film layer 121 and an electroplating film layer 122, as shown in the figure. However, the configuration of each conductive layer 12 constituting the wiring board 1 is not limited to the multilayer structure exemplified in Figure 1. For example, it may be composed of a three-layer structure of metal foil, an electroless plating film layer, and an electroplating film layer. Alternatively, it may be a single-layer structure of an electroless plating film layer or an electroplating film layer. In addition, a sputtering film or a vapor-deposited film may be formed instead of the electroless plating film layer.

[0020] As shown in Figure 1, the via conductor 13 can be formed integrally with the electroless plating layer 121 and the electroplating layer 122 that constitute the conductor layer 12. In the illustrated example, the via conductor 13 is a so-called filled via that fills a conductive hole 13a formed in the insulating layer 11, and is composed of an electroless plating layer 121 and an electroplating layer 122 that cover the bottom surface and inner wall surface of the conductive hole 13a.

[0021] The insulating coating layer 10 is formed using any insulating resin material. For example, the insulating coating layer 10 may be formed using a photosensitive polyimide resin or epoxy resin. The insulating coating layer 10 covers the edges of the conductor pad 12a, the sides of the metal posts 100a and 100b formed on the conductor pad 12a, and the upper surface of the insulating layer 11 that is exposed between the patterns of the conductor layer 12 including the conductor pad 12a. The insulating coating layer 10 may be a solder resist layer.

[0022] The first layer 101 constituting the metal posts 100a and 100b may be a metal film layer containing any conductive metal such as copper or nickel. The first layer 101 may be an electroless plating film layer. The first layer 101 may also include a sputtered film layer. In the illustrated example, the openings 10a and 10b filled by the metal posts 100a and 100b are formed in a shape that decreases in diameter from the upper side of the insulating coating layer 10 toward the conductor pad 12a, but the openings 10a and 10b are not limited to this shape. They may also be formed in a substantially cylindrical shape with the same diameter in the thickness direction of the insulating coating layer 10.

[0023] The second layer 102 constituting the metal posts 100a and 100b may be a plating film layer containing any conductive metal. The second layer 102 may be an electroplating film layer formed with the first layer 101 as a power supply layer, as will be described later regarding the manufacturing method of the wiring board. The second layer 102 may be formed as, for example, an electroplating film layer of copper. The third layer 103 formed on the upper surface of the second layer 102 may be, for example, a nickel plating layer. The fourth layer 104 formed on the upper surface of the third layer 103 may be, for example, a tin plating layer. The third layer 103 functions as a barrier layer, preventing the diffusion and reaction of elements constituting the fourth layer 104 (e.g., tin) into the second layer 102 (e.g., the copper plating layer).

[0024] As will be described in detail later regarding the manufacturing method, the oxide film present on the surface of the conductor pad 12a exposed within the openings 10a and 10b formed in the insulating coating layer 10 is removed, for example, by irradiation with an oxygen-containing plasma. This plasma treatment can expose a new surface on the conductor pad 12a. As a result, it is believed that the adhesion between the conductor pad 12a and the metal film layer, which is the first layer 101 of the metal posts 100a and 100b formed thereon, is improved.

[0025] Conventionally, in order to improve the adhesion between the conductor pad 12a and the first layer 101, soft etching using a chemical solution (etching solution) was sometimes performed on the surface of the conductor pad 12a, which roughened the upper surface of the conductor pad 12a, after which the first layer 101 was formed. When such soft etching is performed, recesses 12ra and 12rb may be formed on the surface of the conductor pad 12a, as shown in Figure 3.

[0026] As shown in Figure 1, when large-diameter openings 10a and small-diameter openings 10b are mixed, it is thought that in the soft etching process described above, the etching solution will flow well into the large-diameter openings 10a and less easily into the small-diameter openings 10b. As a result, although not shown in Figures 1 and 3, a significant difference may occur between the depth D of recess 12ra and the depth D of recess 12rb. If a significant difference in the depth D of recesses 12ra and 12rb occurs between different conductor pads 12a, there is a risk that a difference in the height of the metal posts 100a and 100b formed on the conductor pads 12a may occur. If there is a difference in the height of the metal posts 100a and 100b, it is thought that the reliability of the connections of electronic components mounted on the wiring board 1 via the metal posts 100a and 100b may decrease. Specifically, "height of the metal posts" refers to the shortest distance between the outermost point of the metal posts 100a and 100b and the upper surface of the first insulating layer 11.

[0027] In contrast, as will be described in detail later, in the manufacturing method of this embodiment, the upper surface of the conductor pad 12a exposed on the bottom surface of the openings 10a and 10b is subjected to a plasma treatment instead of soft etching. With the plasma treatment, recesses 12ra and 12rb are less likely to form, and therefore differences in the height of the metal posts 100a and 100b are less likely to occur. Consequently, in the wiring board manufactured by the manufacturing method of this embodiment, there is less variation in the height of the multiple metal posts 100a and 100b, and external electronic components can be mounted with greater reliability when used.

[0028] Furthermore, as will be described later, in addition to plasma treatment of the upper surface of the conductor pad 12a exposed on the bottom surface of the openings 10a and 10b, light soft etching may be performed to form relatively small recesses on the surface of the conductor pad 12a. In this case, the light soft etching may be performed such that the recesses have a depth of 1 μm or less, for example, so as not to cause the problem (decreased connection reliability of mounted electronic components) caused by the uneven height of the metal posts 100a and 100b formed on the conductor pad 12a described above. In other words, the conductor pad 12a on the wiring board 1 may have recesses with a depth of 1 μm or less.

[0029] The method for manufacturing the wiring board 1 shown in Figure 1 will be described below with reference to Figures 2A to 2J and Figure 3. In Figures 2A to 2J and Figure 3, as with Figure 1, the entire wiring board is not shown, and only partial cross-sections of the side on which the metal posts 100a and 100b are formed are shown. In the following description of the method for manufacturing the wiring board 1, as with the description of the wiring board 1 above, the side on which one surface F of the wiring board 1 (see Figure 1) is formed will be referred to as "top," "upper side," "outside," or simply "outside."

[0030] First, a laminate is prepared in which the outermost first conductor layer 12 has been laminated, for example, by a general wiring board manufacturing method using the build-up method. Figure 2A shows a laminate 1p in which the insulating layer (first insulating layer) 11 and the conductor layer (first conductor layer) 12, which includes a conductor pad 12a in contact with the first insulating layer 11, have been laminated using the build-up method.

[0031] Next, as shown in Figure 2B, a covering insulating layer 10 is formed on the conductor pad 12a and on the insulating layer 11 exposed from the conductor pattern of the conductor layer 12 including the conductor pad 12a. The covering insulating layer 10 is formed of an insulating resin, such as a photosensitive epoxy resin or polyimide resin. For example, a photosensitive epoxy resin film can be formed by spray coating, curtain coating, or film lamination, thereby forming the covering insulating layer 10, which is, for example, a solder resist layer.

[0032] The insulating coating layer 10 has openings 10a and 10b that expose the conductor pad 12a, corresponding to the positions where the metal posts 100a and 100b (see Figure 1) are to be formed. The openings 10a and 10b can be formed, for example, by exposure and development using a mask having an opening pattern corresponding to the positions where the metal posts 100a and 100b are to be formed.

[0033] The diameter of the opening 10a (specifically, the diameter at the bottom of the opening 10a) is formed to be larger than the diameter of the opening 10b (specifically, the diameter at the bottom of the opening 10b). That is, the opening 10a is formed as a large-diameter opening larger than the diameter of the opening 10b, and the opening 10b is formed as a small-diameter opening smaller than the diameter of the opening 10a. Specifically, the large-diameter opening 10a may be formed so that its bottom diameter is between 30 μm and 45 μm. The small-diameter opening 10b may be formed so that its bottom diameter is between 15 μm and 25 μm.

[0034] Next, as shown in Figure 2C, the inner surfaces of the openings 10a and 10b are irradiated with a plasma PZ, for example, using nitrogen or oxygen. This plasma treatment can activate the upper surface of the conductor pad 12a exposed within the openings 10a and 10b. That is, oxides and impurities on the surface of the conductor pad 12a are removed, exposing a new surface of the conductor pad 12a. In addition, this plasma treatment can roughen the upper surface of the conductor pad 12a, creating fine irregularities (not shown). This treatment to remove oxides and impurities from the surface of the conductor pad 12a is called oxide film removal treatment.

[0035] Normally, plasma is generated under low pressure, but it can also be generated at atmospheric pressure. Plasma can be generated by forming a plasma generation section between electrodes and applying a high-frequency electric field between the electrodes while supplying a plasma-generating gas such as nitrogen (N2) or oxygen (O2) into the section. For example, plasma treatment can be performed by exposing a substrate to the plasma generated between electrodes. The electric field that generates the plasma is not limited to a high-frequency electric field; a DC electric field may also be used. In addition to nitrogen (N2) or oxygen (O2), gases containing argon (Ar) or fluorinated compounds (CF4) can also be used as plasma-generating gases.

[0036] While this plasma treatment alone can activate the surface of the conductor pad 12a, a mild soft etching treatment can be added. Mild soft etching involves short-duration etching using a relatively dilute etching solution, for example, to the extent that the indentations on the surface of the conductor pad 12a caused by etching are not too noticeable. By applying this mild etching, the state shown in Figure 3 can be achieved. That is, although exaggerated in Figure 3, mild soft etching can create recesses 12ra and 12rb on the conductor pad 12a with a depth D of, for example, 1 μm or less, so as not to cause the problems caused by the uneven height of the metal posts formed as described above.

[0037] Mild soft etching can be performed using an etching solution containing an oxidizing agent such as persulfate or hydrogen peroxide. This mild soft etching forms recesses 12ra and 12rb, which in turn enlarges the bonding surface between the metal posts 100a and 100b subsequently formed on the conductor pad 12a and the conductor pad 12a, potentially resulting in a stronger bond between the conductor pad 12a and the metal posts 100a and 100b.

[0038] Next, as shown in Figure 2D, a metal film layer (first layer) 101, such as an electroless copper plating film layer, is formed over the inner surfaces of the openings 10a and 10b (the upper surface of the conductor pad 12a and the inner wall surfaces of the openings 10a and 10b) and the entire upper surface of the insulating coating layer 10, for example, by electroless plating. The first layer 101, which is a metal film layer, may also be formed by sputtering using a target containing copper, for example.

[0039] Next, as shown in Figure 2E, a plating resist 101r for electroplating is formed on the first layer 101. Specifically, a plating resist containing, for example, a photosensitive polyhydroxyether resin, epoxy resin, phenol resin, or polyimide resin is formed over the entire area of ​​the first layer 101, including the areas inside the openings 10a and 10b of the insulating coating layer 10 and the upper side of the upper surface of the insulating coating layer 10, by, for example, spray coating or film application.

[0040] Next, as shown in Figure 2F, a resist opening 101ro is formed on the plating resist 101r by exposure and development, for example, using a mask having an appropriate opening pattern. The resist opening 101ro can be formed using a mask having an opening pattern corresponding to the arrangement pattern that the metal posts 100a and 100b (see Figure 1) constituting one side of the wiring substrate 1 should have. The formed resist opening 101ro may be formed so as to include the entire area of ​​the openings 10a and 10b formed in the insulating coating layer 10, as well as the portion of the upper surface of the insulating coating layer 10 at the periphery of the openings 10a and 10b.

[0041] During the formation of the resist opening 101ro, residue (scum) from the resist 101r developed during the resist development process may remain within the resist opening 101ro. In such cases, bonding defects may occur. Therefore, a residue removal process (descam treatment) may be performed on the inner surface of the resist opening 101ro. This residue removal process can be carried out, for example, by a dry process using oxygen plasma or a wet process using chemicals.

[0042] Next, as shown in Figure 2G, a plating film layer (second layer) 102 is formed within the resist opening 101ro. By electroplating using the first layer 101 as a power supply layer, an electroplated film layer can be formed as the second layer 102 within the resist opening 101ro. The second layer 102, for example, is an electroplated copper film, and is formed on the power supply layer (on the first layer 101) inside the resist opening 101ro, including the inside of the openings 10a and 10b of the insulating coating layer 10 and the upper side of the upper surface of the insulating coating layer 10.

[0043] Next, as shown in Figure 2H, a third layer 103 is formed on the second layer 102, and a fourth layer 104 is formed on the third layer 103. The third layer 103 can be formed as a nickel plating layer that directly covers the second layer 102, for example, using a nickel plating solution mainly composed of nickel. The fourth layer 104 can be formed as a tin plating layer that covers the third layer 103, for example, using a tin plating solution mainly composed of tin.

[0044] The fourth layer 104 may be made of a metal that has a lower melting point than the second layer 102 and can be melted and formed into a hemispherical shape by reflow soldering. The fourth layer 104 may be formed by filling with a solder paste containing, for example, tin, silver, and copper. The fourth layer 104 is reflow soldered after lamination, thereby forming an alloy layer between the third layer 103 and the fourth layer 104, and joining the third layer 103 and the fourth layer 104. As shown in the figure, the fourth layer 104 can be formed into a hemispherical shape by this reflow soldering process.

[0045] Next, the plating resist 101r is removed, and the first layer 101 on the insulating coating layer 10 is exposed, as shown in Figure 2I.

[0046] Next, the exposed first layer 101 on the insulating coating layer 10 is removed by etching, and as shown in Figure 2J, the insulating coating layer 10 is exposed and the formation of the metal posts 100a and 100b is completed. The formation of the wiring board 1 is completed.

[0047] The method for manufacturing the wiring board of the embodiment is not limited to the method described with reference to the drawings, and the conditions and sequence may be changed as appropriate. The method for manufacturing the wiring board of the embodiment only requires that the upper surfaces of the multiple conductor pads exposed in the large-diameter opening and the small-diameter opening, respectively, be subjected to plasma treatment, and some steps may be omitted or other steps may be added depending on the structure of the wiring board to be manufactured. For example, the openings 10a and 10b of the insulating coating layer 10 may be formed by partially removing the insulating coating layer 10 using a UV laser. [Explanation of Symbols]

[0048] 1 Wiring board 10. Insulating coating layer 10a Opening (Large diameter opening) 10b Opening (small diameter opening) 11 Insulating layer 12 Conductor Layers 12a conductor pad 12ra, 12rb recess 100a Metal Post (Large Diameter Metal Post) 100b Metal post (small diameter metal post) 101 1st layer (metal film layer) 102 Second layer (plating film layer) 103 3rd layer 104 4th layer 101r Plating Resist 101ro resist opening

Claims

1. A laminate is prepared that includes a first insulating layer and a first conductor layer including a plurality of conductor pads formed on the first insulating layer. A covering insulating layer is formed on the first conductor layer, having a large-diameter opening and a small-diameter opening that expose the upper surface of the conductor pad. The oxide film removal treatment is applied to the upper surfaces of the plurality of conductor pads that are exposed in the large-diameter opening and the small-diameter opening, respectively. Forming a metal post on the aforementioned conductor pad, A method for manufacturing a wiring board, including, The oxide film removal process includes plasma treatment using oxygen plasma and soft etching.

2. A method for manufacturing a wiring board according to claim 1, wherein a recess with a depth of 1 μm or less is formed on the upper surface of the conductor pad by the soft etching.

3. A method for manufacturing a wiring board according to claim 1, wherein the diameter of the bottom of the large-diameter opening is formed to be 30 μm or more and 45 μm or less, and the diameter of the bottom of the small-diameter opening is formed to be 15 μm or more and 25 μm or less.

4. A method for manufacturing a wiring board according to claim 1, wherein the metal post is formed A metal film layer is formed to cover the upper surface of the insulating coating layer, and the entire inner surface of the large-diameter opening and the inner surface of the small-diameter opening. Forming a resist layer that covers the aforementioned metal film layer, The resist layer is formed to expose the upper surface of the metal film layer within the large-diameter opening and within the small-diameter opening, Forming a plating film layer on the metal film layer within the resist opening, Removing the aforementioned resist layer, This includes removing the metal film layer that is exposed by removing the resist layer.

5. A method for manufacturing a wiring board according to claim 4, wherein forming the metal film layer includes electroless copper plating.

6. A method for manufacturing a wiring board according to claim 4, wherein forming the plating film layer includes an electrolytic copper plating process in which the metal film layer is used as a power supply layer.

7. A method for manufacturing a wiring board according to claim 4, further comprising forming a nickel plating layer on the plating layer after the formation of the plating layer, and forming a tin plating layer on the nickel plating layer.

8. A method for manufacturing a wiring board according to claim 7, further comprising forming the tin plating layer by a reflow process.

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