Method for processing device wafers

Abstract

To provide a processing method for a device wafer capable of suppressing protrusion of debris onto a top face of a device layer.SOLUTION: A processing method for a device wafer includes: a protective film forming step 1001 of forming a protective film which covers a surface of the device wafer; a mask forming step 1002 of forming a mask, in which an opening is formed along a street, on the protective film by irradiating the protective film with a laser beam along the street after the protective film forming step 1001 is implemented; a device layer plasma etching step 1003 of performing plasma etching on a device layer of the device wafer with a gas for device layers via the mask after the mask forming step 1002 is implemented; and a substrate plasma etching step 1004 of performing plasma etching on a substrate with a gas for substrates via the mask after the device layer plasma etching step 1003 is implemented.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for processing a device wafer. [Background Art]

[0002] In recent years, with the increasing integration density of devices, hybrid bonding, which connects electrodes on the device surfaces by aligning them together, has begun to be adopted. In hybrid bonding, since the surfaces of devices are bonded to each other, adhesion of foreign substances to the device surfaces may cause bonding failure.

[0003] Accordingly, as a method for singulating devices to be hybrid bonded from a wafer, for example, a method of singulation by plasma etching has been studied (see, for example, Patent Document 1). [Prior Art Literature] [Patent Literature]

[0004] [Patent Document 1] Japanese Unexamined Patent Publication No. 2018-098318 [Summary of the Invention] [Problem to be Solved by the Invention]

[0005] In the wafer processing method disclosed in Patent Document 1, the surface of a device wafer is covered with a water-soluble resin, and a laser beam is irradiated to remove the functional layer along with the protective film along the streets, thereby serving as a mask during plasma etching.

[0006] However, when a laser processed groove is formed by laser beam irradiation, debris of the functional layer (device layer) is formed at the edge of the laser processed groove. Since the debris protrudes and extends upward from the upper surface of the functional layer (device layer), it causes a problem when bonding devices by hybrid bonding in a subsequent process.

[0007] The object of the present invention is to provide a method for processing a device wafer that can suppress the protrusion of debris onto the upper surface of the device layer. [Means for solving the problem]

[0008] To solve the above-mentioned problems and achieve the objective, the present invention provides a device wafer processing method, wherein device layers constituting a device are laminated on a substrate and devices are formed in each region partitioned by a plurality of intersecting streets on the surface, comprising: a protective film forming step of forming a protective film covering the surface of the device wafer; a mask forming step, after performing the protective film forming step, irradiating the protective film along the streets to form a mask in which openings along the streets are formed in the protective film; a device layer plasma etching step, after performing the mask forming step, plasma etching the device layers of the device wafer with a device layer gas through the mask; and a substrate plasma etching step, after performing the device layer plasma etching step, plasma etching the substrate with a substrate gas through the mask. In the mask forming step, the mask is formed by irradiating the street with a laser beam under processing conditions that restrict the removal of the protective film on the street and the device layer on the street. It is characterized by the following: In the device wafer processing method described above, the protective film may be left at the bottom of the opening in the mask formation step, and the protective film left at the bottom of the opening may be removed in the device layer plasma etching step. In the method for processing the device wafer described above, the street may be exposed at the bottom of the opening during the mask formation step.

[0009] This invention Method for processing device wafers A method for processing a device wafer, wherein device layers constituting a device are stacked on a substrate and devices are formed in each region demarcated by a plurality of intersecting streets on the surface, comprising: a protective film forming step of forming a protective film covering the surface of the device wafer; a mask forming step of irradiating the protective film along the streets with a laser beam after performing the protective film forming step to form a mask in which openings along the streets are formed in the protective film; a device layer plasma etching step of plasma etching the device layers of the device wafer with a device layer gas through the mask after performing the mask forming step; and a substrate plasma etching step of plasma etching the substrate with a substrate gas through the mask after performing the device layer plasma etching step. The device layer plasma etching step includes forming an etching groove in the device layer that does not reach the upper surface of the substrate and forming a remaining portion of the device layer below the etching groove, and after performing the device layer plasma etching step and before performing the substrate plasma etching step, a laser beam is irradiated onto the remaining portion of the device layer to divide the remaining portion and form a laser-processed groove that reaches the substrate, wherein the groove width of the laser-processed groove is formed to be narrower than the groove width of the etching groove, and the depth of the etching groove may be set to a depth such that the debris formed in the laser processing step does not protrude from the upper surface of the device layer. [Effects of the Invention]

[0010] This invention has the effect of suppressing the protrusion of debris onto the upper surface of the device layer. [Brief explanation of the drawing]

[0011] [Figure 1] Figure 1 is a perspective view showing an example of a workpiece to be processed in the device wafer processing method according to Embodiment 1. [Figure 2] Figure 2 is a flowchart showing the flow of the device wafer processing method according to Embodiment 1. [Figure 3] Figure 3 is a schematic perspective view showing the protective film formation step of the device wafer processing method shown in Figure 2, where tape is attached to the back surface of the wafer and a frame is attached to the outer edge of the tape. [Figure 4] Figure 4 is a schematic side view showing, in a partial cross-section, the state in which a water-soluble resin is applied to the entire surface of the wafer during the protective film formation step of the device wafer processing method shown in Figure 2. [Figure 5] Figure 5 is a schematic cross-sectional view showing a portion of a device wafer in which a protective film has been formed on its surface during the protective film formation step of the device wafer processing method shown in Figure 2. [Figure 6] Figure 6 is a schematic side view showing a partial cross-section of the mask formation step of the device wafer processing method shown in Figure 2. [Figure 7] Figure 7 is a schematic cross-sectional view showing a portion of the wafer after the mask formation step of the device wafer processing method shown in Figure 2. [Figure 8] Figure 8 is a schematic cross-sectional view showing an example of the configuration of a plasma etching apparatus that performs the device layer plasma etching step and the substrate plasma etching step of the device wafer processing method shown in Figure 2. [Figure 9] Figure 9 is a schematic cross-sectional view of a portion of a device wafer, illustrating the device layer plasma etching step of the device wafer processing method shown in Figure 2. [Figure 10] FIG. 10 is a partial cross-sectional view of a device wafer that schematically illustrates the base plasma etching step of the device wafer processing method shown in FIG. 2. [Figure 11] FIG. 11 is a cross-sectional view that schematically illustrates a part of the device wafer after the mask removing step of the device wafer processing method shown in FIG. 2. [Figure 12] FIG. 12 is a flowchart illustrating the flow of the device wafer processing method according to the second embodiment. [Figure 13] FIG. 13 is a partial cross-sectional view of a device wafer that schematically illustrates the device layer plasma etching step of the device wafer processing method shown in FIG. 12. [Figure 14] FIG. 14 is a partial cross-sectional view of a device wafer that schematically illustrates the laser processing step of the device wafer processing method shown in FIG. 12. [Figure 15] FIG. 15 is a cross-sectional view that schematically illustrates a part of the device wafer after the laser processing step of the device wafer processing method shown in FIG. 12. [Figure 16] FIG. 16 is a partial cross-sectional view of a device wafer that schematically illustrates the base plasma etching step of the device wafer processing method shown in FIG. 12. DETAILED DESCRIPTION OF THE INVENTION

[0012] Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the following embodiments. In addition, the constituent elements described below include those that can be easily conceived by a person skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. In addition, various omissions, substitutions, or modifications can be made to the configuration without departing from the scope of the gist of the present invention.

[0013] First Embodiment A device wafer processing method according to Embodiment 1 of the present invention will be described based on the drawings. Figure 1 is a perspective view showing an example of a workpiece to be processed in the device wafer processing method according to Embodiment 1. Figure 2 is a flowchart showing the flow of the device wafer processing method according to Embodiment 1.

[0014] (Device wafer) The device wafer processing method according to Embodiment 1 is a device wafer processing method for the device wafer 1 shown in Figure 1. In Embodiment 1, the device wafer 1 is a wafer such as a semiconductor wafer, with silicon or the like as the base material 2, and a device layer 3 laminated on the base material 2. As shown in Figure 1, the device wafer 1 has devices 6 formed in each region that is partitioned in a grid pattern by a plurality of intersecting streets 5 on the surface 4.

[0015] Device 6 is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration), or a memory (semiconductor memory device). In Embodiment 1, the device layer 3 comprises, for example, a plurality of interlayer insulating films made of SiO2 stacked on top of each other, and a circuit layer made of a conductive metal disposed between the interlayer insulating films.

[0016] Device 6 is constructed by laminating an interlayer insulating film of device layer 3 and a circuit layer. In street 5, device layer 3 is composed only of the interlayer insulating film. Device 6 also has electrodes (not shown) on its surface. The electrodes are flat, and in embodiment 1, it is desirable that they be located on the same plane as the surface of device 6. The electrodes are made of a conductive metal such as a copper alloy and connect to devices on other wafers or devices on device chips.

[0017] In other words, in Embodiment 1, the device wafer 1 is a wafer on which a device from another wafer or a device from a device chip is superimposed on a device 6, and the electrodes of device 6 are bonded to the electrodes of the device from the other wafer or the device from the device chip. Thus, in Embodiment 1, the device wafer 1 to be processed is a so-called hybrid bonded wafer, but the present invention is not limited to hybrid bonded wafers.

[0018] (Method for processing device wafers) The device wafer processing method according to Embodiment 1 is a method of dividing the device wafer 1 into individual device chips 10 along a street 5. The device chip 10 includes a part of the substrate 2 and a device 6 on the substrate 2.

[0019] The device wafer processing method according to Embodiment 1 is also a method of dividing the device wafer 1 into device chips 10 by plasma etching, or so-called plasma dicing. As shown in Figure 2, the device wafer processing method comprises a protective film formation step 1001, a mask formation step 1002, a device layer plasma etching step 1003, a substrate plasma etching step 1004, and a mask removal step 1005.

[0020] (Protective film formation step) Figure 3 is a schematic perspective view showing the protective film formation step of the device wafer processing method shown in Figure 2, where tape is attached to the back surface of the wafer and a frame is attached to the outer edge of the tape. Figure 4 is a schematic side view showing a partial cross-section of the protective film formation step of the device wafer processing method shown in Figure 2, where a water-soluble resin is applied to the entire surface of the wafer. Figure 5 is a schematic cross-sectional view showing a part of the device wafer with a protective film formed on its surface, in the protective film formation step of the device wafer processing method shown in Figure 2. Note that device layer 3 is omitted in Figure 4.

[0021] The protective film formation step 1001 is a step in which a protective film 12 is formed to cover the entire surface 4 of the device wafer 1. In Embodiment 1, in the protective film formation step 1001, first, as shown in Figure 3, the central part of a disc-shaped tape 8 with a larger diameter than the device wafer 1 is attached to the back surface 7 of the device wafer 1, and an annular frame 9 with an inner diameter larger than the outer diameter of the device wafer 1 is attached to the outer edge of the tape 8. In Embodiment 1, the tape 8 is an adhesive tape comprising a base material made of a resin having non-adhesive and flexible properties, and an adhesive layer laminated on the base material and made of a resin having adhesive and flexible properties, with the adhesive layer being attached to the device wafer 1 and the frame 9, or a sheet consisting only of a base material made of a thermoplastic resin without an adhesive layer and which is heat-pressed to the device wafer 1 and the frame 9.

[0022] In Embodiment 1, in the protective film formation step 1001, the protective film coating apparatus 20 shown in Figure 4 places the back surface 7 of the device wafer 1 on the holding surface 22 of the spinner table 21 via tape 8, holds the back surface 7 of the device wafer 1 to the holding surface 22 via tape 8, and clamps the frame 9 with clamp parts 23 provided around the spinner table 21. In Embodiment 1, in the protective film formation step 1001, as shown in Figure 4, the protective film coating apparatus 20 applies a liquid water-soluble resin 11 from a coating nozzle 24 above the device wafer 1 to the center of the surface 4 of the device wafer 1 while rotating the spinner table 21 around its axis. The water-soluble resin 11 applied to the surface 4 of the device wafer 1 is then spread to the outer edge of the device wafer 1 by the centrifugal force generated by the rotation of the spinner table 21, covering the entire surface 4 of the device wafer 1.

[0023] Thus, in Embodiment 1, in the protective film formation step 1001, a water-soluble resin 11 is supplied to and applied to the device wafer 1 held on a spinner table 21 that rotates around its axis, in a so-called spin coating manner. In Embodiment 1, in the protective film formation step 1001, the water-soluble resin 11 is dried to form a protective film 12 that covers the entire surface 4 of the device wafer 1, as shown in Figure 5.

[0024] In Embodiment 1, the water-soluble resin 11 includes, for example, a water-soluble resin such as polyvinyl alcohol (PVA) or polyvinylpyrrolidone (PVP). The protective film 12 composed of the water-soluble resin 11 is resistant to the plasma-treated device layer gas 581 used in the device layer plasma etching step 1003 and the plasma-treated substrate gas 582 used in the substrate plasma etching step 1004. In Embodiment 1, the water-soluble resin 11 contains a light-absorbing material that absorbs the laser beam 36 with a wavelength of 355 nm irradiated in the mask formation step 1002, but in the present invention, it is not necessary to include a light-absorbing material. For example, carbon black or phthalocyanine can be used as the light-absorbing material.

[0025] The protective film 12 formed on the entire surface 4 of the device wafer 1 after the water-soluble resin 11 dries is made of the aforementioned water-soluble resin 11, and is composed of a material that is resistant to the plasma-treated device layer gas 581 used in the device layer plasma etching step 1003 and the plasma-treated substrate gas 582 used in the substrate plasma etching step 1004, and is formed to a uniform thickness that is resistant to the plasma-treated gases 581 and 582.

[0026] (Mask formation step) Figure 6 is a schematic side view showing a partial cross-section of the mask formation step of the device wafer processing method shown in Figure 2. Figure 7 is a schematic cross-sectional view showing a part of the wafer after the mask formation step of the device wafer processing method shown in Figure 2. Note that Figure 6 omits the device layer 3. The mask formation step 1002 is a step in which, after performing the protective film formation step 1001, a laser beam 36 (shown in Figure 6) is irradiated along the street 5 to form a mask 13 (shown in Figure 7) in which an opening 131 (shown in Figure 7) is formed in the protective film 12 along the street 5.

[0027] In Embodiment 1, during the mask formation step 1002, the laser processing apparatus 30 shown in Figure 6 holds the back surface 7 of the device wafer 1 to the holding surface 32 of the chuck table 31 via tape 8, and clamps the frame 9 with clamps 37 provided around the chuck table 31. In Embodiment 1, during the mask formation step 1002, the laser processing apparatus 30 images the surface 4 of the device wafer 1 with an imaging camera and performs alignment to align the street 5 of the device wafer 1 with the focusing lens 34 of the laser beam irradiation unit 33.

[0028] In Embodiment 1, in the mask formation step 1002, the laser processing apparatus 30 moves the chuck table 31 and the laser beam irradiation unit 33 relative to each other along the street 5, as shown in Figure 7, setting the focal point to the surface of the protective film 12 on the street 5. The oscillator 35 irradiates the protective film 12 on each street 5 with a laser beam 36 of a wavelength that is absorbed by the protective film 12 (for example, 355 nm), thereby removing the protective film 12 on the street 5. In Embodiment 1, in the mask formation step 1002, the laser processing apparatus 30 forms an opening 131 along the street 5 over the entire length of each street 5, forming the protective film 12 on the mask 13 with the opening 131 formed as shown in Figure 7. The opening 131 exposes the street 5 at its bottom.

[0029] In Embodiment 1, in the mask formation step 1002, the laser processing apparatus 30 removes the entire thickness of the protective film 12 on the street 5. However, in the present invention, a small amount of the protective film 12 may be left at the bottom of the opening 131. The small amount of protective film 12 remaining at the bottom of the opening 131 is etched and removed in the next device layer plasma etching step 1003. Thus, in the present invention, in the mask formation step 1002, the laser processing apparatus 30 removes the protective film 12 on the street 5 and irradiates the device wafer 1 with a laser beam 36 under processing conditions that restrict the removal of the device layer 3 of the street 5, thereby forming a mask 13 on the device wafer 1.

[0030] (Plasma etching equipment) Next, the plasma etching apparatus 50 that performs the device layer plasma etching step 1003 and the substrate plasma etching step 1004 will be described based on the drawings. Figure 8 is a schematic cross-sectional view showing an example of the configuration of a plasma etching apparatus that performs the device layer plasma etching step and the substrate plasma etching step of the device wafer processing method shown in Figure 2. As shown in Figure 8, the plasma etching apparatus 50 comprises a rectangular parallelepiped chamber 51, a holding unit 52, an upper electrode 53, and a control unit 55.

[0031] Chamber 51 has a processing space 511 formed inside where plasma etching is performed. Chamber 51 has an opening 513 in one side wall 512 for loading and unloading device wafers 1, and an opening / closing door 514 for opening and closing the opening 513. The opening / closing door 514 opens and closes the opening 513 by moving up and down with an opening / closing mechanism 515 consisting of an air cylinder or the like.

[0032] Furthermore, the chamber 51 has an exhaust port 517 formed in its bottom wall 516, which connects the inside and outside of the chamber 51. An exhaust mechanism 510, such as a vacuum pump, is connected to the exhaust port 517.

[0033] The holding unit 52 and the upper electrode 53 are positioned facing each other in the processing space 511 of the chamber 51. The upper surface of the holding unit 52 is a holding surface 524 that holds the device wafer 1 via the tape 8. The holding unit 52 is also made of a conductive material and functions as a lower electrode.

[0034] The holding unit 52 includes a disc-shaped holding portion 521 and a cylindrical support portion 520 that protrudes downward from the center of the lower surface of the holding portion 521. The support portion 520 is inserted into an opening 522 formed in the bottom wall 516 of the chamber 51. Within the opening 522, an annular insulating member 523 is placed between the bottom wall 516 and the support portion 520, electrically insulating the chamber 51 and the holding unit 52. The holding unit 52 is also connected to a high-frequency power supply 56 outside the chamber 51.

[0035] The holding portion 521 of the holding unit 52 is provided with an electrode 526 connected to a high-frequency power supply (not shown). When power is applied to the electrode 526 from the high-frequency power supply, the holding unit 52 generates a dielectric polarization phenomenon between the holding surface 524 and the device wafer 1, and the device wafer 1 is held and attracted onto the holding surface 524 by the electrostatic attraction force due to the polarization of the charge.

[0036] Furthermore, cooling channels 527 are formed inside the holding portion 521 and the support portion 520 of the holding unit 52, through which a cooling fluid flows to cool the holding unit 52. Both ends of the cooling channels 527 are connected to a refrigerant circulation mechanism 528. When the refrigerant circulation mechanism 528 is activated, a cooling fluid such as water circulates through the cooling channels 527, cooling the holding unit 52.

[0037] The upper electrode 53 is made of a conductive material and includes a disc-shaped gas ejection portion 531 and a cylindrical support portion 530 that protrudes upward from the center of the upper surface of the gas ejection portion 531. The support portion 530 is inserted into an opening 532 formed in the upper wall 518 of the chamber 51. Within the opening 532, an annular insulating member 533 is placed between the upper wall 518 and the support portion 530, thereby electrically insulating the chamber 51 from the upper electrode 53.

[0038] The upper electrode 53 is connected to the high-frequency power supply 57 outside the chamber 51. A support arm for the lifting mechanism 534 is attached to the upper end of the support portion 530. The upper electrode 53 moves up and down by the lifting mechanism 534.

[0039] Multiple nozzles 535 are provided on the lower side of the gas ejection section 531. The nozzles 535 are connected to a first etching gas supply source 58 and a second etching gas supply source 59 via a flow path 536 formed in the gas ejection section 531 and the support section 530. The first etching gas supply source 58 supplies gases 581 and 582 into the chamber 51 from the nozzles 535 through the flow path 536. In Embodiment 1, when the substrate 2 of the device wafer 1 is made of silicon, the first etching gas supply source 58 supplies fluorine-based gases as gases 581 and 582 into the chamber 51. The second etching gas supply source 59 supplies etching gas into the chamber 51 from the nozzles 535 through the flow path 536. In Embodiment 1, the second etching gas supply source 59 supplies oxygen-based gas into the chamber 51 as the gas.

[0040] The control unit 55 controls each component of the plasma etching apparatus 50 to cause the plasma etching apparatus 50 to perform plasma etching on the device wafer 1. The control unit 55 is a computer having an arithmetic processing unit with a microprocessor such as a CPU (central processing unit), a storage device with memory such as ROM (read-only memory) or RAM (random access memory), and an input / output interface device. The arithmetic processing unit of the control unit 55 performs calculations according to the computer program stored in the storage device and outputs control signals for controlling the plasma etching apparatus 50 to each component of the plasma etching apparatus 50 via the input / output interface device.

[0041] Furthermore, the control unit 55 is connected to a display unit, which consists of a liquid crystal display device that displays various information and images, and an input unit used by the operator to register processing content information. The input unit consists of at least one of the following: a touch panel provided on the display unit and an external input device such as a keyboard.

[0042] (Device layer plasma etching step) Figure 9 is a schematic cross-sectional view of a part of a device wafer showing the device layer plasma etching step of the device wafer processing method shown in Figure 2. The device layer plasma etching step 1003 is a step in which, after performing the mask formation step 1002, the device layer 3 of the device wafer 1 is plasma-etched with a plasma device layer gas 581 (corresponding to an etching gas) through the mask 13.

[0043] In Embodiment 1, during the device layer plasma etching step 1003, the plasma etching apparatus 50 raises the upper electrode 53 by the lifting mechanism 534 and raises the frame clamping plate 542 by the lifting mechanism, and then lowers the opening / closing door 514 by the opening / closing mechanism 515 to open the opening 513.

[0044] In the device layer plasma etching step 1003, the plasma etching apparatus 50 receives the device wafer 1, on which the mask 13 was formed in the mask formation step 1002, into the processing space 511 via a transport unit (not shown), and the back surface 7 of the device wafer 1 is placed on the holding surface 524 of the holding unit 52 via the tape 8. In the device layer plasma etching step 1003, the plasma etching apparatus 50 applies power from a high-frequency power supply to the electrode 526 to adsorb and hold the back surface 7 of the device wafer 1 on the holding surface 524 via the tape 8.

[0045] In the device layer plasma etching step 1003, the plasma etching apparatus 50 raises the opening / closing door 514 using the opening / closing mechanism 515 to close the opening 513, activates the exhaust mechanism 510 to reduce the pressure inside the chamber 51, creating a vacuum (low pressure) state in the processing space 511, and activates the refrigerant circulation mechanism 528 to circulate a cooling fluid such as water in the cooling channel 527 to suppress abnormal temperature rise of the holding unit 52. In the device layer plasma etching step 1003, the plasma etching apparatus 50 lowers the upper electrode 53 using the lifting mechanism 534, positioning the distance between the lower surface of the upper electrode 53 and the device wafer 1 held by the holding unit 52 that constitutes the lower electrode to a predetermined electrode distance suitable for plasma etching.

[0046] In the device layer plasma etching step 1003, the plasma etching apparatus 50 supplies device layer gas 581 from the first etching gas supply source 58 at a predetermined flow rate and ejects it from multiple nozzles 535 of the gas ejection section 531 toward the device wafer 1 held on the holding unit 52. In the device layer plasma etching step 1003, while supplying device layer gas 581 from the first etching gas supply source 58, the plasma etching apparatus 50 applies high-frequency power from the high-frequency power supply 57 to the upper electrode 53 to create and maintain plasma, and applies high-frequency power from the high-frequency power supply 56 to the lower electrode, the holding unit 52, to draw in ions.

[0047] In the device layer plasma etching step 1003, the plasma etching apparatus 50 plasmaizes the device layer gas 581 in the space between the holding unit 52 and the upper electrode 53. As shown in Figure 9, this plasmaized device layer gas 581 is drawn towards the device wafer 1, etching (so-called plasma etching) the surface 4 of the street 5 exposed through the opening 131 of the mask 13 of the device wafer 1. In the device layer plasma etching step 1003, the plasma etching apparatus 50 forms an etching groove 14 (shown in Figure 9) in the device layer 3 of the street 5 and advances the etching groove 14 toward the back surface 7 of the device wafer 1. Thus, in Embodiment 1, the device layer plasma etching step 1003 performs plasma etching on the device layer 3 of the device wafer 1 via the mask 13.

[0048] In Embodiment 1, when the device layer 3 of street 5 is composed of SiO2, a fluorine-based gas such as CF4 is used as the device layer gas 581, but in the present invention, C4F8 may also be used. In Embodiment 1, in the device layer plasma etching step 1003, the plasma etching apparatus 50 has a predetermined time set in advance for plasma etching the device layer 3 of the device wafer 1 according to the thickness of the device layer 3 of the device wafer 1.

[0049] In the device layer plasma etching step 1003, the plasma etching apparatus 50 applies high-frequency power to the holding unit 52 and the upper electrode 53 while supplying the device layer gas 581 for a predetermined time, completely removing the device layer 3 of the street 5 exposed from the opening 131 of the mask 13, as shown in Figure 9, thereby dividing the device layer 3 of the device wafer 1 along the opening 131, i.e., the etching groove 14. In other words, in the device layer plasma etching step 1003, the plasma etching apparatus 50 removes the device layer 3 of each street 5 of the device wafer 1 along its entire length.

[0050] (Substrate plasma etching step) Figure 10 is a schematic cross-sectional view of a part of a device wafer showing the substrate plasma etching step of the device wafer processing method shown in Figure 2. The substrate plasma etching step 1004 is a step in which, after performing the device layer plasma etching step 1003, the substrate 2 of the device wafer 1 is plasma-etched with a substrate gas 582 (corresponding to an etching gas) through a mask 13.

[0051] In the substrate plasma etching step 1004, the plasma etching apparatus 50 supplies substrate gas 582 from the first etching gas supply source 58 at a predetermined flow rate and ejects it from multiple nozzles 535 of the gas ejection section 531 toward the device wafer 1 held on the holding unit 52. In the substrate plasma etching step 1004, while supplying substrate gas 582 from the first etching gas supply source 58, the plasma etching apparatus 50 applies high-frequency power from the high-frequency power supply 57 to the upper electrode 53 to create and maintain plasma, and applies high-frequency power from the high-frequency power supply 56 to the lower electrode, the holding unit 52, to draw in ions.

[0052] In the substrate plasma etching step 1004, the plasma etching apparatus 50 plasmaizes the substrate gas 582 in the space between the holding unit 52 and the upper electrode 53. As shown in Figure 10, this plasmaized substrate gas 582 is drawn towards the device wafer 1, etching the bottom of the etching groove 14 exposed from the opening 131 of the mask 13 of the device wafer 1, i.e., the substrate 2 (so-called plasma etching). In the substrate plasma etching step 1004, the plasma etching apparatus 50 advances the etching groove 14 toward the back surface 7 of the device wafer 1. Thus, in Embodiment 1, in the substrate plasma etching step 1004, plasma etching is performed on the substrate 2 of the device wafer 1 via the mask 13.

[0053] In Embodiment 1, when the substrate 2 is composed of silicon, a fluorine-based gas such as SF6, C4F8, or CF4 is used as the substrate gas 582, but the substrate gas 582 is not limited to these. Also, in Embodiment 1, in the substrate plasma etching step 1004, the plasma etching apparatus 50 plasma etches the substrate 2 of the device wafer 1 by the Bosch method, which alternately repeats plasma etching by supplying SF6 and protective film deposition on the inner surface of the etching groove 14 by supplying C4F8, but in the present invention, plasma etching may be performed by supplying a single etching gas.

[0054] In the substrate plasma etching step 1004, the plasma etching apparatus 50 has a predetermined time set for plasma etching the substrate 2 of the device wafer 1, according to the thickness of the substrate 2 of the device wafer 1. In the substrate plasma etching step 1004, the plasma etching apparatus 50 applies high-frequency power to the holding unit 52 and the upper electrode 53 while supplying substrate gas 582 for a predetermined time, completely removing the substrate 2 of the street 5 exposed from the opening 131 of the mask 13, as shown in Figure 10, and dividing the device wafer 1 along the opening 131, i.e., the etching groove 14, to separate it into individual device chips 10. That is, in the substrate plasma etching step 1004, the etching groove 14 penetrates the device wafer 1 along the entire length of each street 5.

[0055] (Mask removal step) Figure 11 is a schematic cross-sectional view showing a portion of the device wafer after the mask removal step of the device wafer processing method shown in Figure 2. The mask removal step 1005 is a step in which the mask 13 is removed from the surface 4 of the device wafer 1 after performing the substrate plasma etching step 1004.

[0056] In Embodiment 1, in the mask removal step 1005, a cleaning device (not shown) places the back surface 7 of the device wafer 1 on the holding surface of the spinner table via tape 8, holds the back surface 7 of the device wafer 1 on the holding surface via tape 8, and clamps the frame 9 with clamps provided around the spinner table. In Embodiment 1, in the mask removal step 1005, the cleaning device rotates the spinner table around its axis and supplies a cleaning solution, such as pure water, from a cleaning nozzle above the device wafer 1 to the center of the surface 4 of the device wafer 1. The cleaning solution supplied to the surface 4 of the device wafer 1 flows toward the outer edge of the device wafer 1 due to the centrifugal force generated by the rotation of the spinner table, washing away the mask 13 from the surface 4 of the device wafer 1, as shown in Figure 11.

[0057] Thus, in Embodiment 1, the mask removal step 1005 involves supplying a cleaning solution to the device wafer 1 held on a spinner table that rotates around its axis, and cleaning it, a process known as spinner cleaning. In Embodiment 1, the mask removal step 1005 also involves drying the device wafer 1 to complete the device wafer processing method.

[0058] In the device wafer processing method according to Embodiment 1 described above, in the mask formation step 1002, the laser processing apparatus 30 irradiates a laser beam 36 under processing conditions that restrict the removal of the protective film 12 on the street 5 and the device layer 3 of the street 5, thereby forming a mask 13 on the device wafer 1. This suppresses the formation of convex debris from the device layer 3 on the surface 4 of the device wafer 1 after the mask formation step 1002. Furthermore, in the device wafer processing method according to Embodiment 1, the device layer 3 on the street 5 is removed in the device layer plasma etching step 1003.

[0059] As a result, the device wafer processing method according to Embodiment 1 has the effect of suppressing the protrusion of debris from the upper surface of the device layer 3 in each individually divided device chip 10.

[0060] [Embodiment 2] Next, the device wafer processing method according to Embodiment 2 will be described based on the drawings. Figure 12 is a flowchart showing the flow of the device wafer processing method according to Embodiment 2. Figure 13 is a schematic cross-sectional view of a part of the device wafer showing the device layer plasma etching step of the device wafer processing method shown in Figure 12. Figure 14 is a schematic cross-sectional view of a part of the device wafer showing the laser processing step of the device wafer processing method shown in Figure 12. Figure 15 is a schematic cross-sectional view of a part of the device wafer after the laser processing step of the device wafer processing method shown in Figure 12. Figure 16 is a schematic cross-sectional view of a part of the device wafer showing the substrate plasma etching step of the device wafer processing method shown in Figure 12. Note that Figures 12, 13, 14, 15, and 16 use the same reference numerals as Embodiment 1 for the same parts and their descriptions are omitted.

[0061] The device wafer processing method according to Embodiment 2 is the same as Embodiment 1, except that the device layer plasma etching step 1003 and the substrate plasma etching step 1004 differ, and it further includes a laser processing step 1010, as shown in Figure 12. In Embodiment 2, the protective film formation step 1001 and the mask formation step 1002 are performed in the same manner as in Embodiment 1.

[0062] In the device wafer processing method according to Embodiment 2, in the device layer plasma etching step 1003, the plasma etching apparatus 50 applies high-frequency power to the holding unit 52 and the upper electrode 53 while supplying the device layer gas 581 for a second predetermined time shorter than the predetermined time for removing the entire thickness direction of the device layer 3 of the device wafer 1 with the plasma-enhanced device layer gas 581, thereby plasma etching the device wafer 1 through the mask 13 to form etching grooves 14 in the device layer 3 of the street 5 of the device wafer 1.

[0063] Thus, in the device wafer processing method according to Embodiment 2, in the device layer plasma etching step 1003, the plasma etching apparatus 50 forms an etching groove 14 in the device layer 3 of street 5, as shown in Figure 13, which does not reach the upper surface of the substrate 2, i.e., leaves the device layer 3 at the bottom. In the device wafer processing method according to Embodiment 2, in the device layer plasma etching step 1003, the plasma etching apparatus 50 forms a remaining portion 141 of the device layer 3 below the etching groove 14 formed in the device layer 3 of street 5 of the device wafer 1.

[0064] The laser processing step 1010 is a step in which, after performing the device layer plasma etching step 1003 and before performing the substrate plasma etching step 1004, a laser beam 62 (shown in Figure 14) is irradiated onto the remaining portion 141 of the device layer 3 to divide the remaining portion 141 and form a laser-processed groove 15 (shown in Figure 15) leading to the substrate 2. In Embodiment 2, in the laser processing step 1010, the laser processing apparatus 60 shown in Figure 14 holds the back surface 7 of the device wafer 1 by suction to the holding surface of the chuck table via tape 8, and clamps the frame 9 with clamps provided around the chuck table.

[0065] In Embodiment 2, in the laser processing step 1010, the laser processing apparatus 60 images the surface 4 of the device wafer 1 with an imaging camera and performs alignment to align the etching grooves 14 formed in the street 5 of the device wafer 1 with the focusing lens of the laser beam irradiation unit 61. In Embodiment 2, in the laser processing step 1010, as shown in Figure 14, the laser processing apparatus 60 moves the chuck table and the laser beam irradiation unit 61 relative to each other along the etching grooves 14 formed in the street 5, sets the focusing point to the surface of the remaining portion 141 at the bottom of the etching grooves 14, and irradiates the bottom of the etching grooves 14 formed in each street 5 with a laser beam 62 of a wavelength that is absorbed by the device layer 3, removing the remaining portion 141 at the bottom of the etching grooves 14 in the street 5, forming a laser processing groove 15 at the bottom of the remaining portion 141 that divides the device layer 3 and leads to the substrate 2, thereby dividing the device layer 3 along the street 5. Note that the groove width 152 of the laser-processed groove 15 is narrower than the groove width 142 of the etching groove 14.

[0066] In the laser processing step 1010, when the remaining portion 141 at the bottom of the etching groove 14 of street 5 is divided, debris 151, consisting of device layers 3 protruding from the bottom of the laser processing groove 15, adheres to both edges in the width direction of the laser processing groove 15, as shown in Figure 15. In Embodiment 2, in the laser processing step 1010, the laser processing apparatus 60 forms a laser processing groove 15 at the bottom of the etching groove 14 formed in street 5, with a groove width 152 narrower than the groove width 142 of the etching groove 14, and irradiates the device wafer 1 with a laser beam 62 under processing conditions where the height 153 of the debris 151 from the bottom of the etching groove 14 is lower than the depth 143 from the surface 4 of the etching groove 14, thereby dividing the device layer 3 of street 5 of the device wafer 1. Thus, in Embodiment 2, the groove width 152 of the laser-processed groove 15 is formed to be narrower than the groove width 142 of the etching groove 14, and the depth 143 of the etching groove 14 is set to a depth such that the debris 151 formed in the laser processing step 1010 does not protrude from the upper surface of the device layer 3 (i.e., protrusion is restricted).

[0067] In Embodiment 2, in the substrate plasma etching step 1004, the plasma etching apparatus 50, as shown in Figure 16, uses plasma-enhanced substrate gas 582 to etch (so-called plasma etching) the substrate 2 exposed at the bottom of the laser processing groove 15, forming a second etching groove 16 at the bottom of the laser processing groove 15, and advances the second etching groove 16 toward the back surface 7 of the device wafer 1. In Embodiment 2, in the substrate plasma etching step 1004, similar to Embodiment 1, the substrate 2 of the device wafer 1 is plasma-etched by the Bosch method to completely remove the substrate 2 of the street 5 exposed from the laser processing groove 15, dividing the device wafer 1 along the laser processing groove 15, i.e., the second etching groove 16, and separating it into individual device chips 10.

[0068] In Embodiment 2, the device wafer processing method involves performing the substrate plasma etching step 1004, followed by the mask removal step 1005, similar to Embodiment 1.

[0069] In the device wafer processing method according to Embodiment 2, in the mask formation step 1002, the laser processing apparatus 30 irradiates a laser beam 336 to form a mask 13 on the device wafer 1, and in the device layer plasma etching step 1003, the device layer 3 on the street 5 is plasma etched. Therefore, similar to Embodiment 1, the effect is to suppress the protrusion of debris from the upper surface of the device layer 3 in the individually divided device chips 10.

[0070] Furthermore, in the device wafer processing method according to Embodiment 2, although plasma etching of the device layer 3 takes time, the plasma etching step 1003 plasma etches up to a certain point of the device layer 3, and in the laser processing step 1010, the remaining portion 141 is irradiated with a laser beam 62 to divide it, thus shortening the processing time compared to when the entire thickness of the device layer 3 is plasma etched.

[0071] Furthermore, in the device wafer processing method according to Embodiment 2, the groove width 152 of the laser-processed groove 15 formed in the remaining portion 141 is narrower than the groove width 142 of the etching groove 14, and the debris 151 formed in the laser processing step 1010 is formed on the remaining portion 141 of the device layer 3 at the bottom of the etching groove 14. In addition, in the device wafer processing method according to Embodiment 2, the depth 143 of the etching groove 14 is set deeper than the height 153 of the debris 151. As a result, the device wafer processing method according to Embodiment 2 can suppress the debris 151 formed in the laser processing step 1010 from protruding from the upper surface of the device layer 3.

[0072] It should be noted that the present invention is not limited to the embodiments described above. That is, it can be implemented with various modifications without departing from the core principles of the present invention. In the present invention, the protective film 12 may be a non-water-soluble film such as a resist film, in which case it is removed in the mask removal step 1005 by ashing with an oxygen-based gas, for example. [Explanation of Symbols]

[0073] 1 device wafer 2 Base material 3-device layer 4 Surface (top surface) 5th Street 6 devices 12 Protective film 13 masks 14 Etched grooves 15 Laser-cut grooves 36 laser beams 62 laser beams 131 Aperture 141 Remaining portion 142 groove width 143 depth 151 Debris 152 groove width 581 Gas for device layer 582 Gas for base materials 1001 Protective film formation step 1002 Mask Forming Step 1003 Device layer plasma etching step 1004 Substrate Plasma Etching Step 1010 Laser processing step

Claims

1. A method for processing a device wafer in which device layers constituting a device are stacked on a substrate and devices are formed in each region demarcated by multiple intersecting streets on the surface, A protective film forming step of forming a protective film that covers the surface of the device wafer, After performing the protective film forming step, a mask forming step is performed, in which a laser beam is irradiated along the street to form a mask in which an opening along the street is formed in the protective film, After performing the mask formation step, a device layer plasma etching step is performed in which the device layer of the device wafer is plasma-etched with a device layer gas through the mask, The device layer plasma etching step is performed, followed by a substrate plasma etching step in which the substrate is plasma-etched with a substrate gas through the mask, A method for processing a device wafer in which a mask is formed by irradiating it with a laser beam under processing conditions that restrict the removal of the protective film on the street and the device layer on the street during the mask formation step.

2. The method for processing a device wafer according to Claim 1, wherein in the mask forming step, the protective film is left at the bottom of the opening, and in the device layer plasma etching step, the protective film left at the bottom of the opening is removed.

3. The method for processing a device wafer according to Claim 1, wherein in the mask forming step, the street is exposed at the bottom of the opening.

4. A method for processing a device wafer in which device layers constituting a device are stacked on a substrate and devices are formed in each region demarcated by multiple intersecting streets on the surface, A protective film forming step of forming a protective film that covers the surface of the device wafer, After performing the protective film forming step, a mask forming step is performed, in which a laser beam is irradiated along the street to form a mask in which an opening along the street is formed in the protective film, After performing the mask formation step, a device layer plasma etching step is performed in which the device layer of the device wafer is plasma-etched with a device layer gas through the mask, The device layer plasma etching step is performed, followed by a substrate plasma etching step in which the substrate is plasma-etched with a substrate gas through the mask, In the device layer plasma etching step, etching grooves that do not reach the upper surface of the substrate are formed in the device layer, and a portion of the device layer remains below the etching grooves. The device includes a laser processing step, which involves irradiating the remaining portion of the device layer with a laser beam after performing the device layer plasma etching step and before performing the substrate plasma etching step, to divide the remaining portion and form a laser-processed groove leading to the substrate, A method for processing a device wafer, wherein the groove width of the laser-processed groove is formed to be narrower than the groove width of the etching groove, and the depth of the etching groove is set to a depth such that the debris formed in the laser processing step does not protrude from the upper surface of the device layer.

Images