Reference current source

Abstract

To provide a reference current source capable of supplying a stable reference current against a change in ambient temperature.SOLUTION: A reference current source 100 includes: a reference voltage circuit 110 which generates a reference voltage Vref; a voltage division circuit 130 which divides the reference voltage Vref and outputs a divided voltage Vdiv; and an output MOS transistor 140 which supplies a reference current Iref when the divided voltage Vdiv is applied to a gate terminal 140G. The reference voltage circuit 110 includes: a depletion type MOS transistor 111; and an enhancement type MOS transistor 112 which has the same conductive type and impurity concentration as a channel 111c of the enhancement type MOS transistor and different Fermi level from that of a gate electrode 111g. The voltage division circuit 130 outputs the divided voltage Vdiv in a voltage range of 0 V or higher and lower than a cross point X to the gate terminal 140G of the output MOS transistor 140.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present invention relates to a reference current source.

Background Art

[0002] Mobile devices, wearable devices and the like are used in various locations and climates, and thus are required to operate stably against changes in the usage environment. Many semiconductor chips mounted in such devices include analog circuits, and a reference current output from a reference current source is supplied to the analog circuits as a bias current.

[0003] Some reference current sources supply a reference current by converting the reference voltage generated by a reference voltage circuit into a current using an element including a high-precision resistor. Various proposals have been made for such reference current sources with the aim of supplying a stable reference current.

[0004] For example, a reference current source capable of suppressing fluctuations in the reference current even if the reference voltage generated from the reference voltage circuit fluctuates has been proposed. Specifically, a reference current source has been proposed which includes: a feedback constant voltage circuit to which a reference voltage is input; another feedback constant voltage circuit to which a divided reference voltage is input; a reference resistor connected between outputs of these circuits; and a unit that outputs a reference current based on the current flowing through the reference resistor (see Patent Document 1). In this reference current source, a voltage dividing circuit that divides the reference voltage is connected in parallel with the reference resistor, and by setting the combined resistance value of the voltage dividing circuit higher than that of the reference resistor to reduce the current flowing through the reference resistor, fluctuations in the reference current due to fluctuations in the reference voltage are suppressed.

[0005] Many reference voltage circuits capable of suppressing fluctuations in reference voltage due to changes in ambient temperature have also been proposed. For example, a reference voltage circuit that can reduce manufacturing variations by sharing the structure of elements that affect changes in ambient temperature has been proposed. Specifically, a reference voltage circuit has been proposed that cancels out the effects of changes in the conductivity coefficient in the channel by having a pair of transistors equipped with gates of different Fermi levels and channels having the same conductivity type and the same impurity concentration (see Patent Document 2). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2007-219901 [Patent Document 2] Japanese Patent Publication No. 2001-284464 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] One aspect of the present invention aims to provide a reference current source that can supply a stable reference current in response to changes in ambient temperature. [Means for solving the problem]

[0008] The reference current source in one embodiment of the present invention is A reference voltage circuit that generates a reference voltage, A voltage divider circuit that divides the aforementioned reference voltage and outputs divided voltages, An output MOS transistor that supplies a reference current when the aforementioned divided voltage is applied to the gate terminal, It has, The aforementioned reference voltage circuit is Depletion-type MOS transistors and An enhancement-type MOS transistor having the same channel conductivity type and impurity concentration as the depletion-type MOS transistor, and a different Fermi level of the gate electrode from the depletion-type MOS transistor, Equipped with, The aforementioned voltage divider circuit is The divided voltage, which is 0V or higher and in a voltage range lower than the temperature-independent crossover point of the gate voltage-drain current characteristics of the output MOS transistor, is output to the gate terminal of the output MOS transistor. [Effects of the Invention]

[0009] According to one aspect of the present invention, a stable reference current can be supplied with respect to changes in ambient temperature. ru. [Brief explanation of the drawing]

[0010] [Figure 1] Figure 1 is a circuit diagram showing the reference current source in this embodiment. [Figure 2A] Figure 2A is a schematic cross-sectional view showing the depletion-type MOS transistor in the reference voltage circuit shown in Figure 1. [Figure 2B] Figure 2B is a schematic cross-sectional view showing the enhancement-type MOS transistor of the reference voltage circuit shown in Figure 1. [Figure 3] Figure 3 is a band diagram showing the dependence of the Fermi level in silicon on temperature and impurity concentration. [Figure 4] Figure 4 is a graph showing the gate voltage-drain current characteristics of the depletion-type MOS transistor and the enhancement-type MOS transistor in this embodiment. [Figure 5] Figure 5 is a graph showing the temperature characteristics of the reference voltage of the reference voltage circuit in this embodiment. [Figure 6] Figure 6 is a graph showing the gate voltage-drain current characteristics of the output MOS transistor in this embodiment. [Figure 7] Figure 7 is an explanatory diagram showing the temperature characteristics of the reference current supplied by the output MOS transistor in this embodiment. [Figure 8] Figure 8 is a graph showing an example of the gate voltage-drain current characteristics of an output MOS transistor. [Figure 9] Figure 9 is a graph showing an example of the temperature characteristics of the reference voltage in a reference voltage circuit. [Figure 10] Fig. 10 is an explanatory diagram showing an example of temperature characteristics of a reference current supplied by an output MOS transistor. [Figure 11] Fig. 11 is a circuit diagram showing another example of the voltage divider circuit shown in Fig. 1. MODE FOR CARRYING OUT THE INVENTION

[0011] A reference current source according to an embodiment of the present invention is based on the following findings. The reference voltage circuit disclosed in Patent Document 2 can suppress manufacturing variations by making the channel conductivity type and impurity concentration of the paired transistors identical, but it is affected by temperature fluctuations caused by the difference in Fermi level of each gate. As a result, it has been difficult for this reference voltage circuit to generate a highly accurate and stable reference voltage against changes in ambient temperature. Therefore, it has been difficult for a reference current source using such a reference voltage circuit to supply a stable reference current against changes in ambient temperature.

[0012] Accordingly, in the reference current source according to an embodiment of the present invention, temperature fluctuation of the reference voltage in the reference voltage circuit is canceled out by temperature fluctuation of an output MOS transistor that supplies a reference current based on the reference voltage.

[0013] Specifically, the reference current source of the present embodiment includes a reference voltage circuit that generates a reference voltage, a voltage divider circuit that divides the reference voltage and outputs a divided voltage, and an output MOS transistor that supplies a reference current when the divided voltage is applied to the gate terminal thereof (see Fig. 1). This reference voltage circuit includes a depletion-type MOS transistor and an enhancement-type MOS transistor having the same channel conductivity type and impurity concentration as the depletion-type MOS transistor and having a Fermi level different from that of the gate electrode of the depletion-type MOS transistor (see Figs. 2A and 2B). Accordingly, since the paired transistors in this reference voltage circuit have the same channel composition, variations in the reference voltage can be reduced. However, since the gate electrodes have different Fermi levels, the reference voltage has a temperature characteristic in which the reference voltage decreases as the ambient temperature increases (see Fig. 5).

[0014] As shown in Figure 6, as the ambient temperature rises, the threshold voltage of the output MOS transistor decreases and the slope of the gate voltage-drain current characteristic becomes smaller. The threshold voltage decreases because the Fermi level approaches the true Fermi level due to the increase in carriers excited in the conduction band, and the depletion layer width shrinks. The slope of the gate voltage-drain current characteristic becomes smaller because the mobility decreases due to the increase in phonon scattering with rising temperature. Therefore, the gate voltage-drain current characteristic of the output MOS transistor has a "crossover point" where the gate voltage-drain current does not change with changes in ambient temperature. In this output MOS transistor, the sign of the temperature characteristic reverses depending on whether the gate voltage is higher or lower than this crossover point. In other words, if the gate voltage of the output MOS transistor is lower than the crossover point, the drain current increases as the ambient temperature rises, and if the gate voltage of the output MOS transistor is higher than the crossover point, the drain current decreases as the ambient temperature rises.

[0015] Therefore, in the reference current source of this embodiment, the reference voltage, which decreases as the ambient temperature rises, is divided and applied to the gate of the output MOS transistor, so that the gate voltage of the output MOS transistor is lower than the crossover point, and the drain current increases as the ambient temperature rises. In other words, the voltage divider circuit that divides the reference voltage to form the gate voltage of the output MOS transistor outputs a divided voltage in a voltage range of 0V or higher and lower than the crossover point (see Figure 7). As a result, this reference current source can supply a stable reference current even when the ambient temperature rises and the reference voltage of the reference voltage circuit decreases, because the drain current of the output MOS transistor increases.

[0016] Hereinafter, one embodiment for carrying out the present invention will be described in detail with reference to the drawings. In drawings, identical components are denoted by the same reference numeral, and redundant explanations may be omitted. Furthermore, the X, Y, and Z axes shown in the drawings are assumed to be orthogonal to each other. The X-axis direction may be referred to as the "width direction," the Y-axis direction as the "depth direction," and the Z-axis direction as the "height direction" or "thickness direction." The surface of each film on the +Z direction side may be referred to as the "front surface" or "top surface," and the surface on the -Z direction side as the "back surface" or "bottom surface." Furthermore, the drawings are schematic, and the ratios of width, depth, and thickness are not necessarily as shown. The number, position, shape, structure, and size of multiple films or layers, or semiconductor elements obtained by structurally combining them, are not limited to the embodiments shown below, and may be any number, position, shape, structure, and size that is preferable for carrying out the present invention.

[0017] Figure 1 is a circuit diagram showing the reference current source in this embodiment. As shown in Figure 1, the reference current source 100 includes a reference voltage circuit 110, a buffer amplifier 120, a voltage divider circuit 130, an output MOS transistor 140, and a current mirror circuit 150.

[0018] The reference voltage circuit 110 outputs a reference voltage Vref to the non-inverting input terminal of the buffer amplifier 120. This reference voltage circuit 110 is a so-called "ED type reference voltage circuit" and comprises an N-channel depletion type MOS transistor 111 and an N-channel enhancement type MOS transistor 112.

[0019] The depletion-type MOS transistor 111 has its drain terminal 111D connected to the power supply terminal and its gate terminal 111G connected to the source terminal 111S. When a power supply voltage is applied to the drain terminal 111D, this depletion-type MOS transistor 111 functions as a constant current source that supplies a constant current independent of the power supply voltage from the source terminal 111S to the enhancement-type MOS transistor 112. The back gate of the depletion-type MOS transistor 111 is connected to the source terminal 111S.

[0020] The enhancement-type MOS transistor 112 has its gate terminal 112G connected to its drain terminal 112D, and the drain terminal 112D is connected to the source terminal 111S of the depletion-type MOS transistor 111. This enhancement-type MOS transistor 112 outputs a voltage based on the constant current supplied from the depletion-type MOS transistor 111 as a reference voltage Vref from its drain terminal 112D to the buffer amplifier 120. The back gate of the enhanced MOS transistor 112 is connected to the source terminal 112S.

[0021] In this way, the reference voltage circuit 110 outputs a reference voltage Vref that is independent of the power supply voltage to the buffer amplifier 120 using a pair of transistors consisting of a depletion-type MOS transistor 111 and an enhancement-type MOS transistor 112. The structures of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112, as well as the operation of the reference voltage circuit 110, will be described later.

[0022] The buffer amplifier 120 receives the reference voltage Vref output from the reference voltage circuit 110 as input to its non-inverting input terminal, and its inverting input terminal is connected to its output terminal, outputting a voltage approximately the same as the reference voltage Vref.

[0023] The voltage divider circuit 130 is formed by connecting resistors 131 and 132 in series, and a predetermined voltage division ratio is set based on the ratio of their resistance values. This voltage divider circuit 130 divides the reference voltage Vref output from the buffer amplifier 120 and outputs the divided voltage Vdiv to the gate terminal 140G of the output MOS transistor 140.

[0024] The range of the divided voltage Vdiv based on a predetermined voltage division ratio is set to be 0V or higher, and lower than the temperature-independent crossover point of the gate voltage-drain current characteristic of the output MOS transistor 140. The lower limit of the divided voltage Vdiv is 0V or higher, since the threshold voltage of the output MOS transistor 140 is a negative value. As a result, even if the ambient temperature rises and the reference voltage Vref of the reference voltage circuit 110 decreases, the drain current of the output MOS transistor 140 increases, thus enabling the supply of a stable reference current in response to changes in ambient temperature.

[0025] Furthermore, the voltage divider voltage Vdiv is preferably a voltage that cancels out temperature fluctuations caused by the reference voltage Vref, so that the drain current of the output MOS transistor 140 does not fluctuate with temperature.

[0026] The output MOS transistor 140 is a depletion-type MOS transistor, with its gate terminal 140G connected to the output of the voltage divider circuit 130, its drain terminal 140D connected to the current mirror circuit 150, and its source terminal 140S grounded. The divided voltage Vdiv output from the voltage divider circuit 130 is input to the gate terminal 140G of this output MOS transistor 140, and based on the divided voltage Vdiv, it supplies a reference current Iref from the drain terminal 140D to the current mirror circuit 150. In other words, the output MOS transistor 140 supplies the reference current Iref when the divided voltage Vdiv is applied to the gate terminal 140G. Also, the output MOS transistor 140 does not supply a current that reaches the reference current Iref when the divided voltage Vdiv is not applied to the gate terminal 140G.

[0027] The current mirror circuit 150 includes MOS transistors 151 and 152. MOS transistor 151 has its gate terminal connected to the source terminal and its drain terminal connected to the power supply terminal. MOS transistor 152 has its gate terminal connected to the gate terminal of MOS transistor 151, its drain terminal connected to the power supply terminal, and a reference current Iref supplied from its source terminal.

[0028] <Temperature characteristics of reference current> Next, the temperature characteristics of the reference current in this embodiment will be described. In one embodiment of the present invention, in order to supply a stable reference current Iref with respect to changes in ambient temperature, the temperature characteristics of the reference voltage circuit 110 are compensated for by the temperature characteristics of the output MOS transistor 140. First, let's explain the temperature characteristics of the reference voltage generated by the reference voltage circuit 110.

[0029] -Temperature characteristics of the reference voltage- The temperature characteristics of the reference voltage generated by the reference voltage circuit 110 depend on the temperature characteristics of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112. Therefore, the structure and temperature characteristics of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 will be explained, along with an explanation of the operating principle of the reference voltage circuit 110.

[0030] Figure 2A is a schematic cross-sectional view showing the depletion-type MOS transistor in the reference voltage circuit shown in Figure 1. As shown in Figure 2A, the depletion-type MOS transistor 111 has its gate electrode 111g, drain region 111d, and source region 111s connected to the gate terminal 111G, drain terminal 111D, and source terminal 111S shown in Figure 1, respectively.

[0031] The gate electrode 111g is an N+ type with a high concentration of phosphorus implanted, and has a Fermi level close to the conduction band in the band diagram of Figure 3. The channel 111c, located below the gate electrode 111g, is an N- type conductive type with a low concentration of phosphorus implanted on the surface of a P-type silicon substrate 111b. As a result, even when the potential difference between the gate and source is 0V, a current path is formed in this N-type channel 111c between the drain region 111d and the source region 111s of the same conductivity type, which are both N+ type.

[0032] Figure 2B is a schematic cross-sectional view showing the enhancement-type MOS transistor of the reference voltage circuit shown in Figure 1. As shown in Figure 2B, the enhanced MOS transistor 112 has its gate electrode 112g, drain region 112d, and source region 112s connected to the gate terminal 112G, drain terminal 112D, and source terminal 112S shown in Figure 1, respectively.

[0033] The gate electrode 112g is a P+ type with a high concentration of boron implanted, and has a Fermi level close to the valence band in the band diagram of Figure 3. The channel 112c, located below the gate electrode 112g, is an N- type conductive type in which phosphorus is implanted at a low concentration on the surface of a P-type silicon substrate 112b using the same process as channel 111c of the depletion-type MOS transistor 111. Therefore, channel 112c has the same conductivity coefficient and temperature coefficient of its conductivity as channel 111c. has Furthermore, channel 112c becomes depleted because the Fermi level of gate electrode 112g is close to the valence band, causing the Fermi level to be pulled towards the valence band. As a result, when the potential difference between the gate and source is 0V, no current path is formed in this N-type channel 112c, even between the N+-type drain region 112d and the N+-type source region 112s, which are of the same conductivity type.

[0034] In this respect, the enhanced MOS transistor 112 differs from a typical enhanced MOS transistor in which impurities are not injected into the channel. Furthermore, since channel 112c has the same conductivity coefficient and temperature coefficient as channel 111c, manufacturing variations in each channel of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 can be reduced. On the other hand, because the Fermi levels of the gate electrodes of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 are different, the reference voltage Vref decreases as the ambient temperature rises, according to the operating principle of the "ED-type reference voltage circuit".

[0035] Next, the temperature characteristics of the reference voltage Vref in this embodiment will be described. Figure 4 is a graph showing the gate voltage-drain current characteristics of the depletion-type MOS transistor and the enhancement-type MOS transistor in this embodiment. In Figure 4, the horizontal axis is the gate voltage and the vertical axis is the drain current. Figure 4 also shows the gate voltage-drain current characteristics of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112.

[0036] As shown in Figure 4, the depletion-type MOS transistor 111 has an N-type channel 111c (see Figure 2A), so its threshold voltage Vtnd is lower than 0V. Also, since the gate terminal 111G and drain terminal 111D of the depletion-type MOS transistor 111 are connected (see Figure 1), the gate-source potential difference (gate voltage) is 0V. For this reason, the depletion-type MOS transistor 111 supplies a drain current Idn to the enhancement-type MOS transistor 112, which is a constant current that does not depend on the power supply voltage and utilizes the saturation current characteristic.

[0037] The enhancement-type MOS transistor 112 generates a reference voltage Vref corresponding to the drain current Idn supplied from the depletion-type MOS transistor 111. This reference voltage Vref is given by the following equation: Vref = |Vtnd| + Vtne.

[0038] In the reference voltage circuit 110, the channels of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 have the same conductivity type and impurity concentration, and therefore their conductivity coefficient and temperature coefficient are the same. As a result, the reference voltage Vref has a temperature characteristic in which the factors causing variations based on the conductivity type and impurity concentration of each channel are suppressed. On the other hand, the gates of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 have different conductivity types and different impurity concentrations, so as shown in Figure 3, their Fermi levels are not the same.

[0039] Therefore, in the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112, factors due to each channel can be suppressed, but factors based on differences in the conductivity type and impurity concentration of each gate remain, and temperature characteristics due to gate differences exist.

[0040] Figure 5 is a graph showing the temperature characteristics of the reference voltage of the reference voltage circuit in this embodiment. As shown in Figure 5, the reference voltage Vref exhibits a temperature characteristic in which it decreases as the ambient temperature rises. This is because, as shown in the band diagram in Figure 3, the depletion-type MOS transistor 111 has a lower N+ impurity concentration in the gate electrode 111g as the ambient temperature rises, causing the threshold voltage Vtnd to increase (in the positive direction) and the absolute value of the threshold voltage |Vtnd| to decrease. Similarly, the enhancement-type MOS transistor 112 has a lower P+ impurity concentration in the gate electrode 112g as the ambient temperature rises, causing the threshold voltage Vtne to decrease (in the negative direction). Consequently, the reference voltage Vref exhibits a temperature characteristic in which it decreases as the ambient temperature rises, according to the following equation: Vref = |Vtnd| + Vtne.

[0041] Therefore, the reference voltage Vref of the reference voltage circuit 110 has a temperature characteristic in which it decreases as the ambient temperature rises, and is divided by the voltage divider circuit 130 via the buffer amplifier 120 and applied as a gate voltage to the gate terminal 140G of the output MOS transistor 140 (see Figure 1).

[0042] -Temperature characteristics of the output MOS transistor- Figure 6 is a graph showing the gate voltage-drain current characteristics of the output MOS transistor in this embodiment. As shown in Figure 6, the output MOS transistor 140, like a typical MOS transistor, does not produce drain current when the gate voltage is below the threshold voltage Vth, and produces drain current with a slope based on the conductivity coefficient when the gate voltage exceeds the threshold voltage Vth. Furthermore, as the ambient temperature rises, the threshold voltage Vth and conductivity coefficient decrease, and the slope of the gate voltage-drain current characteristic becomes smaller. For this reason, there is a crossover point X where the gate voltage-drain current characteristic does not exhibit a temperature characteristic. When a gate voltage below the crossover point X is applied, the drain current increases as the ambient temperature rises. When a gate voltage above the crossover point is applied, the drain current decreases as the ambient temperature rises.

[0043] In this embodiment, as the ambient temperature rises in the reference voltage circuit 110, the reference voltage Vref decreases. In contrast, the drain current, which is the reference current, is increased by applying a gate voltage to the output MOS transistor 140 that is below the crossover point X. This makes it possible to reduce the temperature characteristics of the reference current generated from the reference current source 100.

[0044] Figure 7 is an explanatory diagram showing the temperature characteristics of the reference current supplied by the output MOS transistor in this embodiment. In Figure 7, the graph on the left is the temperature characteristic of the divided voltage Vdiv obtained by dividing the reference voltage Vref shown in Figure 5 by the voltage divider circuit 130. The graph on the right is the temperature characteristic of the output MOS transistor 140, obtained by swapping the vertical and horizontal axes of the gate voltage-drain current characteristic shown in Figure 6 and zooming in on the vicinity of the crossover point X. Figure 7 shows the relationship between the temperature characteristics of the divided voltage Vdiv (reference voltage Vref) output from the voltage divider circuit 130 and the temperature characteristics of the drain current (reference current Iref) when this divided voltage Vdiv is applied to the gate terminal 140G of the output MOS transistor 140. Note that the temperature characteristics of the buffer amplifier 120 and the voltage divider circuit 130 are not considered here.

[0045] As shown in Figure 7, in the reference current source 100, the voltage division ratio of the voltage divider circuit 130 is adjusted so that a gate voltage below the crossover point X shown in Figure 6 is applied to the gate of the output MOS transistor 140. Since the reference voltage Vref output by the reference voltage circuit 110 decreases as the ambient temperature rises, the gate voltage of the output MOS transistor 140 applied via the voltage divider circuit 130 also decreases as the ambient temperature rises. As a result, although the gate voltage decreases as the ambient temperature rises, the drain current increases by the same amount, and consequently, the temperature dependence of the reference current Iref can be reduced.

[0046] Thus, even when the ambient temperature rises and the reference voltage Vref of the reference voltage circuit 110 decreases, the drain current of the output MOS transistor 140 increases, allowing the reference current source 100 to supply a stable reference current Iref in response to changes in ambient temperature.

[0047] Next, we will explain specific examples, referring to Figure 1 as well as Figures 8 to 10. The depletion-type MOS transistor 111 has a gate electrode 111g of 1.0 ×10 20 atoms / cm 3 The N+ type was configured with the above concentrations, and the gate oxide film was made 25 nm thick. Furthermore, the impurity concentration of channel 111c of the depletion-type MOS transistor 111 was adjusted so that the threshold voltage Vtnd was -0.29 V. As a result, the temperature characteristics of the gate voltage-drain current characteristics per unit channel length and unit channel width of the depletion-type MOS transistor 111 are shown in Figure 8. The gate voltage at crossover point X was 0.22 V. The enhancement-type MOS transistor 112 is identical to the depletion-type MOS transistor 111, except that its gate electrode 112g is of the P+ type.

[0048] When a reference voltage circuit 110 was formed using these depletion-type MOS transistors 111 and enhancement-type MOS transistors 112, the reference voltage Vref was 1.13V at room temperature (25°C), as shown in Figure 9, resulting in a temperature characteristic of -0.35mV / °C.

[0049] The voltage divider circuit 130 divides the reference voltage Vref with a voltage division ratio of 0.82:0.18, outputting a divided voltage Vdiv of 0.20V at room temperature (25°C) to the output MOS transistor 140. The temperature characteristics of the divided voltage Vdiv are shown in the left graph of Figure 10.

[0050] Since the output MOS transistor 140 is formed using the same process as the depletion-type MOS transistor 111, its gate voltage-drain current characteristics are the same as those of the depletion-type MOS transistor 111 (see Figure 8). In other words, at room temperature (25°C), the output MOS transistor 140 receives a divided voltage Vdiv of 0.20V, which is lower than the gate voltage of 0.22V that becomes the crossover point X, at the gate terminal 140G. As a result, as shown in Figure 10, the reference current source 100 was able to supply a drain current, i.e., the reference current Iref, with sufficiently suppressed temperature fluctuations.

[0051] The voltage divider Vdiv to be applied to the gate terminal to suppress temperature fluctuations changes with the fluctuation of the threshold voltage of the output MOS transistor 140. In this specific example, the threshold voltage of the output MOS transistor 140 was -0.29V, the voltage at cross point X was 0.22V, and the difference between them was 0.51V. By setting a predetermined voltage divider ratio such that the divided voltage is obtained by adding a difference (0.49V) smaller than the difference (0.51V) between the threshold voltage and the voltage at cross point X for any given threshold voltage, the reference current source 100 can supply a stable reference current Iref in response to changes in ambient temperature.

[0052] (modified version) The voltage divider circuit 130 may include a trimming circuit that allows adjustment of the voltage divider voltage Vdiv in order to set the divided voltage Vdiv to 0V or higher and the gate voltage-drain current characteristic of the output MOS transistor 140 to a voltage lower than the crossover point X.

[0053] Specifically, as shown in Figure 11, the voltage divider circuit 230 comprises a first resistor 230A, a second resistor 230B, a third resistor 230C, and a fourth resistor 230D. The first resistor 230A, the second resistor 230B, and the third resistor 230C are connected in series. The fourth resistor 230D is, Second resistor section 230B It is connected in parallel to it.

[0054] The first resistor section 230A comprises a plurality of resistor elements connected in series and a fuse connected to each node of the plurality of resistor elements. This first resistor section 230A performs coarse adjustment of the divided voltage Vdiv by selectively disconnecting the fuse. The fourth resistor 230D comprises a plurality of resistor elements connected in series and a fuse connected to each node of the plurality of resistor elements. This fourth resistor 230D divides the potential difference across the fourth resistor 230D into minute steps using the plurality of resistor elements, selectively switching off the fuse. Refuse By doing so, the divided voltage Vdiv is finely adjusted and output from the OUT terminal. In this modified example, a fuse is used, but it is not limited to a fuse; a switching element or other similar element could also be used.

[0055] Thus, the voltage divider circuit 230, by incorporating a trimming circuit, allows for fine adjustment of the divided voltage Vdiv, enabling it to supply a stable reference current Iref with high precision in response to changes in ambient temperature.

[0056] As described above, the reference current source in one embodiment of the present invention includes a reference voltage circuit that generates a reference voltage, a voltage divider circuit that divides the reference voltage and outputs divided voltages, and an output MOS transistor that supplies a reference current when the divided voltages are applied to the gate terminal. This reference voltage circuit comprises a depletion-type MOS transistor and an enhancement-type MOS transistor whose channel conductivity type and impurity concentration are the same as the depletion-type MOS transistor, but whose Fermi level is different from that of the gate electrode. As a result, the reference voltage has a temperature characteristic in which it decreases as the ambient temperature rises. Furthermore, the voltage divider circuit outputs a divided voltage in a voltage range of 0V or higher and lower than the crossover point to the gate terminal of the output MOS transistor. This makes the gate voltage-drain current characteristic of the output MOS transistor a temperature characteristic that increases with temperature, thereby canceling out the temperature characteristics of the reference voltage. Therefore, the reference current source in one embodiment of the present invention can supply a stable reference current with respect to changes in ambient temperature. [Explanation of Symbols]

[0057] 100 Reference current source 110 Reference voltage circuit 111 Depletion-type MOS transistors 112 Enhanced MOS Transistors 120 Buffer Amplifier 130, 230 voltage divider circuit 140 Output MOS Transistors 150 Current Mirror Circuit Iref Reference Current Vref Reference Voltage Vdiv divided voltage

Claims

1. A reference voltage circuit that generates a reference voltage, A voltage divider circuit that divides the aforementioned reference voltage and outputs divided voltages, A depletion-type output MOS transistor that supplies a reference current when the aforementioned divided voltage is applied to the gate terminal, It has, The aforementioned reference voltage circuit is Depletion-type MOS transistors and An enhancement-type MOS transistor having the same channel conductivity type and impurity concentration as the depletion-type MOS transistor, and having a different Fermi level of the gate electrode from the depletion-type MOS transistor, Equipped with, The aforementioned voltage divider circuit is A reference current source characterized by outputting a divided voltage to the gate terminal of the output MOS transistor, the divided voltage being 0V or higher and in a voltage range lower than the crossover point where the gate voltage-drain current characteristics of the output MOS transistor are independent of temperature.

2. The reference current source according to claim 1, further comprising a buffer amplifier connected between the output terminal of the reference voltage circuit and the voltage divider circuit.

3. The reference current source according to claim 1 or 2, wherein the voltage divider circuit comprises a trimming circuit capable of adjusting the divided voltage.

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