Micro LED beam collimation

Abstract

A method of manufacturing a light emitting diode array including a first layer having a plurality of light emitting diodes arranged to emit light from a light emitting surface of the first layer, the method including: depositing a layer of dielectric material over the light emitting surface of the first layer; and forming a plurality of gaps through the layer of dielectric material, each gap having an inner surface that is at least partially reflective, wherein at least one gap of the plurality of gaps is centered and aligned with one light emitting diode of the plurality of light emitting diodes of the first layer such that light emitted from the light emitting diode is collimated upon passing through the at least one gap.

Description

Technical Field

[0001] The present disclosure relates to LED arrays, LED devices including monolithic LED arrays, and methods for manufacturing the same. In particular, the present disclosure provides LED arrays with improved light emission. Background Art

[0002] A micro light emitting diode (LED) array has a size of 100×100 μm 2 and may be defined as an arrayed LED having the following dimensions. Micro LED arrays are being developed for many commercial and military applications, such as self-emissive microdisplays and projectors that can be incorporated into a variety of devices including wearable displays, head-up displays, camcorders, viewfinders, multisite excitation sources, and pico projectors.

[0003] Group III-nitride based micro-LEDs are inorganic semiconductor LEDs comprising GaN, InN, and their alloys with AlN in an active light-emitting region. Group III-nitride based micro-LEDs are popular because they can be driven at significantly higher current densities and emit higher optical power densities than conventional large-area LEDs, particularly organic light-emitting diodes (OLEDs) where the light-emitting layer is an organic compound. As a result, higher luminance, which is defined as the amount of light emitted per unit area of a light source in a given direction, measured in candela per square meter (cd / m 2 ) and commonly referred to as Nit (nt), makes micro-LEDs suitable for applications that require or benefit from high luminance, such as displays in high-brightness environments or for projection.

[0004] In addition, the high luminosity of Group III nitride micro-LEDs, expressed in lumens / watt (lm / W), enables lower power consumption compared to other light sources, making micro-LEDs particularly suitable for portable devices. Furthermore, thanks to the inherent material properties of Group III nitrides, micro-LEDs can be operated under extreme conditions such as high or low temperatures and humidity, thereby providing performance and reliability advantages in wearable and outdoor applications.

[0005] Light-emitting diode (LED) devices are further known to provide efficient light sources for a wide range of applications. Increased LED luminous efficiency and light extraction, along with the production of smaller LEDs (with smaller emitting surface area) and their integration into arrays of various wavelength LED emitters, have led to the provision of high-quality color arrays with multiple applications (particularly in display technology).

[0006] Several display technologies have been conceived and are in use for microLED displays for use in various applications, including augmented reality, merged reality, virtual reality, and direct-view displays such as smartwatches and mobile devices. These include digital micromirrors (DMDs) and liquid crystal on silicon (LCoS). Technologies such as silicon are based on reflection technology, where an external light source is used to generate red, green, and blue photons in time-series mode, and pixels either direct the light away from the optical element (DMD) or absorb the light (LCoS) to adjust the brightness of the pixel to form an image. Liquid crystal displays (LCDs) typically use a backlight, an addressable LCD panel on the back, and other components to generate the image. A back filter is used. The back requires turning individual pixels on / off to adjust the brightness of each individual pixel in each frame of the image. Radiative display technologies such as organic light-emitting diodes (OLEDs), active matrix OLEDs (AMOLEDs), and more recently, microLEDs are increasing in popularity because they offer low power consumption for untethered microdisplay applications and higher image contrast. MicroLEDs, in particular, offer higher efficiency and better reliability than microOLEDs and AMOLED displays.

[0007] Standard micro-LEDs emit light with an angular distribution (120-degree full width at half maximum) close to Lambertian emission. When a micro-LED emission display is coupled to a projection lens and / or relay lens, only light within the lens's receiving angle is used. For example, a typical F / 3 lens has a receiving angle of approximately + / - 9.5 degrees. Only 2.7% of the light emitted by a Lambertian micro-LED is within + / - 9.5 degrees, and the remaining 97.3% of the light is lost.

[0008] Existing solutions primarily rely on the use of extra optical elements to perform collimation. Such optical elements are typically configured on a microlens array, where each microlens is aligned with an individual micro-LED to collimate the emitted light. Mechanical alignment between the micro-LED device and the optical components requires high precision (within 0.25 micrometers with respect to a 3-micrometer pixel pitch) to maintain a collimated beam distribution around the optical axis (perpendicular to the micro-LED emission area). [Overview of the Initiative] [Means for solving the problem]

[0009] To mitigate at least some of the above-mentioned problems, a method is provided according to a first aspect of the present invention for manufacturing a light-emitting diode array comprising a first layer having a plurality of light-emitting diodes, wherein the plurality of light-emitting diodes are configured to emit light from the light-emitting surface of the first layer, the method comprising: depositing a layer of dielectric material on the light-emitting surface of the first layer; and forming a plurality of gaps through the layer of dielectric material, each gap having an inner surface that is at least partially reflective, wherein at least one of the plurality of gaps is centered on and aligned with one of the plurality of light-emitting diodes in the first layer such that light emitted from the light-emitting diodes is collimated as it passes through at least one of the gaps.

[0010] Advantageously, this method is highly suitable for mass production of LED devices with high optical efficiency and provides a single micro-LED device that achieves a narrow beam radiation distribution via collimation, where collimation is achieved by using etched micro-gaps on the wafer so that no additional optical elements are required to achieve the narrow radiation distribution. The absence of additional optical elements not only reduces the number of components in the device but also simplifies manufacturing by eliminating the need for a process to align the optical elements with the lower LEDs. Furthermore, providing reflective gaps surrounding each individual LED provides enhanced optical isolation and helps prevent crosstalk between neighboring dies and significantly reduces stray light when such LED arrays are coupled to an optical system. Moreover, the manufacturing process described below is suitable for small-pitch LED wafers and provides the required high fidelity. The manufacturing process can also be carried out at low temperatures, ensuring that the LEDs are not damaged by high-temperature processing.

[0011] Preferably, the dielectric layer has a first surface and a second pair extending across the entire light-emitting surface of the first layer The gaps have a facing surface, and each gap is formed such that it includes a first opening within the first surface of the dielectric layer and a second opening within the second surface of the dielectric layer, the second opening being larger than the first opening so that the gap is frustoconical.

[0012] Preferably, the first aperture corresponds to the area of ​​the lower light-emitting diode.

[0013] Preferably, the gap is frustoconical in shape.

[0014] Preferably, the inner surface of the gap is inclined at an angle of 7.5 degrees with respect to a plane perpendicular to the dielectric layer.

[0015] Preferably, the second layer has a thickness of 1 to 5 micrometers.

[0016] Preferably, the inner surface of the gap is coated with a reflective metal.

[0017] Providing such an internal reflective gap across the entire lower LED is shown to reduce the cutoff angle and improve the coupling efficiency of the LED device to the projection lens.

[0018] Preferably, the reflective metal is aluminum, which can be easily deposited using known techniques and then mechanically or chemically polished.

[0019] Preferably, reflective metals are deposited using a high-target-utilization sputtering (HiTUS) process. This is beneficial because it allows for uniform thin-film deposition in gaps at low temperatures.

[0020] Preferably, the light-emitting diodes in the first layer are spaced 3 micrometers apart from each other.

[0021] Preferably, the dielectric layer is formed of silicon dioxide or a polymer.

[0022] Preferably, the formation of the plurality of gaps is achieved by depositing a hard mask material onto the second surface of the dielectric layer and patterning the hard mask material to expose an area of the dielectric layer that defines a maximum width of the gap, said maximum width being larger than the corresponding dimension of the underlying light emitting diode.

[0023] Preferably, the hard mask material is tungsten.

[0024] Preferably, the exposed area of the dielectric layer is etched to create a gap having an inclined inner surface extending from an opening in the second surface of the dielectric layer defined by the hard mask material to an opening in the first surface of the dielectric layer, the opening in the first surface corresponding to the area of the underlying light emitting diode. This process, together with the process outlined in the summary of the invention, enables high-resolution control of the position and profile of the gap, allowing the method to be applied to small-pitch LED wafers.

[0025] Preferably, the light emitting diode array is a monolithic light emitting diode array.

[0026] According to a second aspect of the present invention, there is provided a light emitting diode array comprising: a first layer having a plurality of light emitting diodes, the plurality of light emitting diodes being arranged to emit light from a light emitting surface of the first layer; and a dielectric layer extending across the entire light emitting surface of the first layer, the dielectric layer comprising a plurality of gaps extending through the dielectric layer, each gap being at least partially having an inner surface that is reflective, wherein at least one of the plurality of gaps is centered and aligned with one of the plurality of light emitting diodes of the first layer such that light emitted from the light emitting diode is collimated as it passes through the at least one gap.

[0027] Further aspects of the invention will be apparent from the description herein and the appended claims.

[0028] A detailed description of embodiments of the invention is given by way of example only with reference to the accompanying drawings below. [Brief explanation of the drawing]

[0029] [Figure 1] This shows a cross-sectional view of a portion of a monolithic LED array according to one embodiment of the present invention. [Figure 2] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 3] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 4] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 5] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 6] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 7] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 8] This diagram illustrates the stages of the monolithic manufacturing process for an LED array according to one embodiment of the present invention. [Figure 9] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 10] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 11] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 12] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 13] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 14] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 15] The steps of the manufacturing process for an LED array according to an alternative embodiment of the present invention are shown. [Figure 16]A perspective view of a monolithic LED array according to one embodiment of the present invention is shown. [Figure 17] This image shows a cross-sectional view of a portion of a monolithic LED array, captured via electron microscopy. [Figure 18] This is a table showing the gap height against angle in the side wall. [Figure 19A] This shows the emission distribution for various reflective aperture heights (H = 1 micrometer, 2 micrometers, 3.5 micrometers, and 5 micrometers) with respect to a 3-micrometer pitch. [Figure 19B] This shows the emission distribution for various reflective aperture heights (H = 1 micrometer, 2 micrometers, 3.5 micrometers, and 5 micrometers) with respect to a 3-micrometer pitch. [Figure 19C] This shows the emission distribution for various reflective aperture heights (H = 1 micrometer, 2 micrometers, 3.5 micrometers, and 5 micrometers) with respect to a 3-micrometer pitch. [Figure 19D] This shows the emission distribution for various reflective aperture heights (H = 1 micrometer, 2 micrometers, 3.5 micrometers, and 5 micrometers) with respect to a 3-micrometer pitch. [Figure 20A] Various graphs are shown plotting the full-width half-maximum angle (FWHM), optical efficiency, and coupling efficiency to various lenses for a micro-LED device with a 3-micrometer pitch against the reflective aperture height. [Figure 20B] Various graphs are shown plotting the full-width half-maximum angle (FWHM), optical efficiency, and coupling efficiency to various lenses for a micro-LED device with a 3-micrometer pitch against the reflective aperture height. [Figure 20C] Various graphs are shown plotting the full-width half-maximum angle (FWHM), optical efficiency, and coupling efficiency to various lenses for a micro-LED device with a 3-micrometer pitch against the reflective aperture height. [Figure 20D] Various graphs are shown plotting the full-width half-maximum angle (FWHM), optical efficiency, and coupling efficiency to various lenses for a micro-LED device with a 3-micrometer pitch against the reflective aperture height. [Figure 20E] Various graphs are shown plotting the full-width half-maximum angle (FWHM), optical efficiency, and coupling efficiency to various lenses for a micro-LED device with a 3-micrometer pitch against the reflective aperture height. [Figure 21] A typical mask layout used in the formation of a monolithic LED array according to one embodiment of the present invention is shown. [Figure 22] A typical mask layout used in the formation of a monolithic LED array according to one embodiment of the present invention is shown. [Modes for carrying out the invention]

[0030] A cross-sectional view of a monolithic microLED array 100 is shown in Figure 1. This array is formed from an LED wafer 10 having LEDs 11, 12, and 13 arranged to emit light from the top surface of the LED wafer 10 (known as the light-emitting surface of the LED wafer 10). Each LED 11, 12, and 13 has an associated light-emitting surface. Although electrical connections are not shown, it should be understood that each LED is independently addressable, thereby controlling the light from the pixels defined by the associated light-emitting surfaces of LEDs 11, 12, and 13. The LED wafer 10 is supplied via known technology. In one embodiment, LEDs 11, 12, and 13 are produced by metal-organic chemical vapor deposition (MOCVD). The invention is provided by a GaN-based epitaxial multiple quantum well (MQW) structure grown by vapor deposition, having n-type and p-type regions flanking an active or luminescent region containing one or more quantum wells. Such devices operate in known ways. Those skilled in the art will know of alternative structures incorporating one or more additional layers or indeed any other suitable devices that operate in the manner described below. Advantageously, monolithic arrays of LEDs having a uniform structure and high internal quantum efficiency are combined with elegantly formed collimation structures to provide an improved optical output distribution with precisely controlled emission angles, fewer components, and a reduced number of processing steps compared to known techniques.

[0031] While the LED wafer 10 is a monolithic micro-LED array, in another example, the LED wafer 10 is formed in any suitable way to provide a layer having multiple light-emitting diodes arranged to emit light from multiple light-emitting surfaces. For example, the LED wafer 10 is provided by a layer of light-emitting diodes formed by a pick-and-place technique.

[0032] LEDs 11, 12, and 13 are configured to emit light with various primary peak wavelengths. In one example, one LED 11 emits light having a primary peak wavelength (approximately 620 nm) corresponding to red light, one LED 12 emits light having a primary peak wavelength (approximately 520 nm) corresponding to green light, and one LED 13 emits light having a primary peak wavelength (approximately 450 nm) corresponding to blue light. In another example, LEDs 11, 12, and 13 are configured to emit light having the same primary peak wavelength and / or include color conversion regions to provide light having the required wavelength. Three LEDs 11, 12, and 13 are shown in Figure 1, but in another example, any suitable number and configuration of LEDs can be used to provide the collimated emission functionality described herein.

[0033] Distributed on the LED wafer 10 and dispersed across the entire light-emitting surface is a dielectric layer 20 having gaps / through holes / cavities 25, each gap being center-aligned with the LEDs of the underlying LED wafer 10. The gaps 25 have inclined sidewalls such that the width of each gap increases with distance from the underlying LED. In a preferred embodiment, the gap 25 has a frustoconical profile with a height (or depth) of 3 micrometers, an opening with a diameter of 1.7 micrometers at the interface with the LED wafer 10 and extending to a diameter of 2.5 micrometers on the opposing surface, and sidewalls inclined at an angle of 7.5° over its entire width of 0.4 micrometers. In an alternative embodiment, the gap 25 has a parabolic profile that acts to further collimate the light emitted from the LED. However, those skilled in the art will understand that the exact three-dimensional shape of the gap 25 may vary with the shape of the underlying LED and the angular distribution of the light emitted from it. In one embodiment, the dielectric layer 20 is formed of silicon dioxide.

[0034] The uppermost surface of the dielectric layer (i.e., the surface of the dielectric layer 20 that is in contact with the light-emitting surface of the LED wafer 10) is covered with a rigid mask layer 30. The surface of the dielectric layer 20 is shown in contact with the LED wafer 10, but in another example, the structure includes one or more intervening layers between the LED wafer 10 and the dielectric layer 20. In one embodiment, the rigid mask layer 30 is made of tungsten.

[0035] The outer layer of the reflective material 40 is provided across the entire exposed inner surface of the gap 25 and the rigid mask layer 30, leaving the light-emitting surfaces of the LEDs 11, 12, and 13 exposed. In one embodiment, the reflective material 40 is aluminum. A perspective view of the monolithic LED array is shown in Figure 16, where the LEDs are arranged in red-green-blue (RGB) rows, and arrows are provided to demonstrate the direction of light emitted from the LEDs 11, 12, and 13 through the gap 25.

[0036] During use, the light emitted from each of the LEDs 11, 12, and 13 is internally reflected by the reflective material 40 covering the inner / side walls of the overlapping gap. This has the effect of collimating the light emitted from each individual LED of the monolithic LED array 100 so that optical coupling to any subsequent optical system (e.g., projection or relay lens) is improved along with the overall optical efficiency of the device. Crosstalk from neighboring LEDs within the array 100 is also minimized.

[0037] Figures 2-8 illustrate the steps involved in manufacturing the monolithic LED array 100 shown in Figure 1 according to one embodiment of the present invention.

[0038] Figure 2 shows the process of depositing a dielectric material layer 20 onto an LED wafer 10. To prevent damage to the micro-LED devices on the wafer, a low-temperature deposition method is preferred and used to deposit a low-stress silicon dioxide layer with a thickness of approximately 3 micrometers or more. However, this layer may become thinner with smaller and more densely packed LEDs.

[0039] In the stage shown in Figure 3, the upper surface of the dielectric layer 20 is etched using a mask that is positioned at the center of LEDs 11, 12, and 13 in the LED wafer 10 and includes an aperture larger than that. The mask openings are patterned for preparation. The mask openings are sized to allow for etch sidewall angles such that the bottom of the etched gap 25 is sized similarly to the light-emitting surfaces of the LEDs 11, 12, and 13. In a preferred embodiment, a thin layer 30 of a material (such as tungsten) is deposited on the dielectric layer 20, which will act as a hard mask for dielectric etching. This hard mask 30 is patterned prior to etching the dielectric layer. This allows relatively small geometric shapes to be etched into a relatively thick dielectric layer without the need for a thick coating layer of photoresist, providing an improvement in the process of manufacturing micro-LED arrays. The hard mask can be patterned by using either (i) dry etching or (ii) a lift-off process.

[0040] In case (i), a thin layer 30 of rigid mask material is deposited onto the dielectric layer, and the window openings are patterned over the positions of the lower LEDs 11, 12, and 13 by using standard photolithography techniques known to those skilled in the art. The rigid mask material 30 is then etched using known dry etching techniques, and any photoresist from photolithography is removed.

[0041] In case (ii), a photoresist layer is deposited, and the reverse pattern of the openings is printed into the resist. Next, a hard mask material 30 is deposited over the entire photoresist, and a standard lift-off technique is used to remove the hard mask material lying over the LEDs 11, 12, and 13, creating the structure shown in Figure 3.

[0042] In the stage shown in Figure 4, the dielectric material is etched through a known process to create gaps 25 between the islands of the hard mask material 30 up to the LED wafer 10, with each gap 25 located in the center of the LEDs 11, 12, and 13. The angle of the gap sidewall (inner surface of the gap 25) is determined by both the thickness of the oxide layer and the etching chemistry.

[0043] In Figures 5 and 6, the etched wafer is covered with a photoresist layer 50 that is selectively developed or selectively lifted off to remove the photoresist 50 from the inner surface of the gaps 25, leaving their sidewalls exposed while maintaining the photoresist layer 50 at the bottom of the etched gaps 25 across the LEDs of the LED wafer 10. In a preferred embodiment, this is printed by using a mask alignment process. In an alternative embodiment, this process is achieved by using a resist etch-back technique such that a mask window used to subsequently deposit a reflective material 40 can self-align with a window in the mask used to pattern the dielectric material 20.

[0044] Figure 7 shows the deposition of a thin layer 40 of conformal reflective material onto an exposed surface of a structure. In one embodiment, this material is aluminum and is deposited to a thickness of 50 nm. Deposition is preferably achieved using a high-target-utilized sputtering (HiTUS) method. Sputtering is performed by remote generation of high-density plasma. The plasma is generated in a side chamber that opens into a main processing chamber containing the target and substrate to be coated. Since the plasma is generated remotely and not from the target itself (as in conventional magnetron sputtering), the ion current to the target is independent of the voltage applied to the target. The optimal balance between plasma density and deposition rate is set to deliver low-energy "plasma-assisted" deposition to the deposition process without the need for substrate biasing. This beneficially affects the thin-film coating properties and enhances the reactive deposition process, thereby enabling coating at fast deposition rates, high-density films on temperature-sensitive polymer substrates, and uniform thin-film deposition on gap sidewalls at low temperatures.

[0045] As shown in Figure 8, the reflective material is then removed from the bottom of the gap 25 by dissolving the underlying photoresist using a standard lift-off procedure (i.e., LEDs 11, 12, 13). The light-emitting surface is left exposed and surrounded by the reflective inner surface provided by the gap sidewalls. Then, any light emitted from the LED is collimated before it exits each of the gaps 25.

[0046] In an alternative embodiment, the dielectric layer containing the gaps is a photoimaging polymer layer (with the gaps printed on it). The key steps for manufacturing the monolithic LED array 100 according to this embodiment, which replace the steps shown in Figures 2-4 above, are shown in Figures 9 and 10. Figure 9 depicts the step of coating the LED wafer 10 with the polymer layer 21. The thickness of the polymer layer is selected to be the maximum possible thickness within constraints set by the width and pitch of the LEDs on the LED wafer 10 and the required sidewall angle of the conical gaps 25.

[0047] Figure 10 shows the formation of gaps 25 generated within the polymer layer 21. These are generated by optically imaging the polymer layer according to the required pattern, and subsequently by an imprint or etch process. The dimensions shown are for a 3-micrometer pitch LED wafer 10. The gaps 25 can also be generated within the polymer layer by molding or imprinting methods. The sidewalls of the gaps 25 are then covered with a reflective layer, which is described in relation to Figures 5-8 or 11-15 above.

[0048] In an alternative embodiment, the reflective material 40 is deposited and then patterned using a post-deposition photomask, etch & strip process. This process is shown in Figures 11-15, replacing those in Figures 5-8.

[0049] Figure 11 shows a dielectric layer 20 covered with a reflective material 40 such that the side walls of the gap are covered at equal angles.

[0050] Next, the reflective material 40 is covered with an etching-resistant material 41, which is also applied to the area above the gap sidewall, as shown in Figure 12.

[0051] Figure 13 illustrates a series of gaps 600 created in the etching-resistant material 41. In one embodiment, this is done via a mask exposure / development process. In an alternative embodiment, this process is performed via a self-align spacer process.

[0052] In the stage shown in Figure 14, the reflective material 40 is etched to create gaps in the areas not covered by the etching-resistant material 41. The etching-resistant material is then removed to create the structure shown in Figure 15.

[0053] Another process for defining the gap 25 and patterning the reflective material 40 (described in relation to Figures 9, 10 and 11-15, respectively) is not mutually exclusive, so either one, neither, or both may be employed to provide the monolithic array 100.

[0054] Figure 17 shows a cross-section of a monolithic LED array 100, captured using an electron microscope, illustrating the distance between the upper and lower openings of the neighboring gap, which is 1.3 micrometers at the base (i.e., at the interface between the dielectric layer 20 and the LED wafer layer 10) and 0.5 micrometers above (on the opposing surface of the dielectric layer).

[0055] Figure 18 shows a table illustrating the angle theta of the inclined internal gap wall with respect to the direction perpendicular to the surface formed by the opposing surface of the dielectric layer at the corresponding height of the reflective aperture 25 passing through the dielectric layer 20.

[0056] Figure 19 shows the emission distribution at various heights (A=1 micrometer, B=2 micrometers, C=3.5 micrometers, and D=5 micrometers) of a reflective aperture 25 with a pitch of 3 micrometers. Here, the pitch is the spacing between LEDs on the LED wafer 10. As can be seen, the cutoff angle is reduced from 90° in the typical Lambertian distribution without the reflective aperture 25 to 48° at a gap height of 5 micrometers.

[0057] As shown in the simulation results in Figure 20A (assuming a mirror-finished surface of the reflective material and a Lambert distribution of light emitted from the LED), the total width at half maximum of the emitted light is reduced from 120° to less than 80° for gap heights greater than 1 micrometer.

[0058] Figures 20C-E show the increase in optical coupling to the F / 3, F / 2, and F / 1 lenses as the gap height increases, so that most of the now collimated light exiting the gap 25 is within the lens's receiving angle.

[0059] Figure 21 shows an exemplary mask that can be used to pattern a dielectric layer 20 sized for an array of 1.7-micrometer wide LEDs at a 3-micrometer pitch, with a 3-micron thick dielectric layer 20. The exact shape of the window (square in Figure 20A and circular in Figure 20B) naturally depends on the shape of the LEDs that make up the array.

[0060] Figure 22 shows a first mask 200 used for patterning the dielectric layer 20, and the first mask 200 aligned with a second mask 300 used in the lift-off process of the reflective material 40.

[0061] Therefore, a monolithic LED array 100 according to the present invention is provided.

Claims

1. A method for manufacturing a microlight-emitting diode array comprising a first layer having a plurality of light-emitting diodes, wherein the microlight-emitting diode array is arranged to emit light from the light-emitting surface of the first layer, wherein the method is: The method involves depositing a dielectric layer of a dielectric material onto the light-emitting surface of the first layer, wherein the dielectric layer has a thickness of 1 to 5 micrometers, and the dielectric layer has a first surface and a second opposing surface that extend across the entire light-emitting surface of the first layer. A rigid mask material is deposited onto the second opposing surface of the dielectric layer, and the rigid mask material is patterned to expose an area of ​​the dielectric layer that defines the maximum width of a plurality of gaps. Next, the exposed area of ​​the dielectric layer is etched to form the plurality of gaps penetrating the deposited dielectric layer of the dielectric material, wherein each gap has an inner surface that is at least partially reflective. Next, the inner surface is covered with a reflective material. Includes, The method is such that at least one of the plurality of gaps is centered on and aligned with one of the plurality of light-emitting diodes in the first layer and is frustum-shaped, such that light emitted from a light-emitting diode is collimated when it passes through the at least one gap.

2. The method according to claim 1, wherein each of the plurality of gaps is formed such that it includes a first opening in the first surface of the dielectric layer and a second opening in the second opposing surface of the dielectric layer, the second opening being larger than the first opening.

3. The method according to claim 2, wherein the first aperture corresponds to the area of ​​the light-emitting diode.

4. The method according to claim 1, wherein the gap is frustoconical in shape.

5. The method according to claim 1, wherein the gap is formed such that the inner surface of the gap is inclined at an angle of 7.5 degrees with respect to a plane perpendicular to the dielectric layer.

6. The method according to claim 1, wherein the reflective material is aluminum.

7. The method according to claim 6, wherein the reflective material is deposited using a high-target sputtering (HiTUS) process.

8. The method according to claim 1, wherein the light-emitting diodes in the first layer are spaced 3 micrometers apart from each other.

9. The method according to claim 1, wherein the dielectric layer is formed of silicon dioxide or a polymer.

10. The method according to claim 2, wherein the maximum width is greater than the corresponding dimension of the light-emitting diode.

11. The method according to claim 10, wherein the rigid mask material is tungsten.

12. The gap has an inclined inner surface that extends from an opening in the second opposing surface of the dielectric layer defined by the rigid mask material to an opening in the first surface of the dielectric layer, The method according to claim 10 or 11, wherein the opening in the first surface corresponds to the area of ​​the light-emitting diode.

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