Encoding device and encoding method

Abstract

An encoding device comprising: a quantization circuit that generates a quantization parameter that includes information about a vector quantization codebook; and a control circuit that sets the number of available bits according to conditions for encoding based on the difference between the number of bits available for encoding of the target sub-vector and the number of bits for the quantization parameter of the target sub-vector.

Description

[[Technical Field]]

[0001] The present disclosure relates to an encoding apparatus, a decoding apparatus, an encoding method, and a decoding method. [[Background Art]]

[0002] One of quantization methods in audio or speech encoding (e.g., encoding of an excitation signal) is multi-rate lattice vector quantization (see, for example, Non-Patent Document 1). Multi-rate lattice vector quantization may be applied to, for example, split vector quantization (referred to as, for example, split multi-rate lattice vector quantization or divided multi-rate lattice vector quantization). Further, split multi-rate lattice vector quantization may be applied to, for example, algebraic vector quantization (AVQ: Algebraic Vector Quantization). [[Prior Art Literature]] [[Patent Literature]]

[0003] [[Patent Literature 1]] International Publication No. 2013 / 061531 [[Non-Patent Literature]]

[0004] [[Non-Patent Literature 1]] 3GPP TS 26.445 V16.0.0,"Codec for Enhanced Voice Services (EVS); Detailed Algorithmic Description (Release 16)”, 2019-06. [[Summary of the Invention]]

[0005] However, there is room for study on a method for reducing the number of encoding bits in multi-rate lattice vector quantization.

[0006] Non-limiting embodiments of this disclosure contribute to providing an encoding device, a decoding device, an encoding method, and a decoding method that reduce the number of encoded bits in vector quantization.

[0007] An encoding device according to one embodiment of the present disclosure comprises a quantization circuit that generates quantization parameters including information about a vector quantization codebook, and a control circuit that sets the number of available bits in encoding based on the difference between the number of bits available for encoding a target subvector and the number of bits in the quantization parameters of the target subvector, depending on the conditions.

[0008] These comprehensive or specific embodiments may be implemented as systems, devices, methods, integrated circuits, computer programs, or recording media, or as any combination of systems, devices, methods, integrated circuits, computer programs, and recording media.

[0009] According to one embodiment of the present disclosure, the number of encoded bits can be reduced in multirate lattice vector quantization.

[0010] Further advantages and effects of one embodiment of this disclosure will be made apparent from the specification and drawings. Such advantages and / or effects are provided by several embodiments and features described in the specification and drawings, but not all of them are necessarily provided in order to obtain one or more identical features. [Brief explanation of the drawing]

[0011] [Figure 1] A diagram showing an example of a codebook list in split multirate lattice vector quantization. [Figure 2] This block diagram shows a partial configuration example of the Algebraic Code Excited Linear Prediction (ACELP) encoding section in the Enhanced Voice Services (EVS) codec. [Figure 3]Block diagram showing a configuration example related to Algebraic Vector Quantizer (AVQ) encoding in an EVS codec [Figure 4] Block diagram showing a configuration example of an encoding device according to Embodiment 1 [Figure 5] Diagram showing an example of subvector selection processing [Figure 6] Diagram showing an example of code conversion processing [Figure 7] Diagram showing an example of code conversion processing [Figure 8] Diagram showing an example of code conversion processing [Figure 9] Diagram showing an example of encoding processing for the number of unused bits [Figure 10] Diagram showing an example of the correspondence between the number of unused bits and unused bit count encoding codes [Figure 11] Block diagram showing a configuration example of a decoding device according to Embodiment 1 [Figure 12] Block diagram showing a configuration example of an encoding device according to Embodiment 2 [Figure 13] Diagram showing an example of code conversion processing [Figure 14] Diagram showing an example of code conversion processing [Figure 15] Diagram showing an example of code conversion processing [Figure 16] Diagram showing an example of code conversion processing [Figure 17] Diagram showing another example of code conversion processing [Figure 18] Diagram showing an example of encoding processing for the number of unused bits [Figure 19] Diagram showing an example of processing for updating the number of bits available for encoding a code conversion target subvector [Figure 20] Diagram showing an example of processing for updating the number of bits available for encoding a code conversion target subvector [Figure 21] Block diagram showing a configuration example of a decoding device according to Embodiment 2 [Figure 22] Diagram showing an example of decoding processing [Figure 23] Diagram showing an example of decoding processing [Figure 24] Figure illustrating an example of decoding processing [Figure 25] Figure illustrating an example of decoding processing [Figure 26] Figure illustrating another example of decoding processing [Figure 27] Figure illustrating an example of decoding processing based on the number of unused bits [Figure 28] Figure illustrating an example of processing for updating the number of bits remaining as a bit string of a subvector to be code-converted [Figure 29] Figure illustrating an example of processing for updating the number of bits remaining as a bit string of a subvector to be code-converted DETAILED DESCRIPTION OF EMBODIMENTS

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0013] For example, in split multi-rate lattice vector quantization, a signal in the time domain or frequency domain (or spectral domain) is divided into a plurality of sub-vectors (SV: also referred to as sub-bands or sub-blocks), and multi-rate lattice vector quantization may be performed on each of the plurality of divided sub-vectors.

[0014] FIG. 1 is a diagram illustrating an example of a list of codebooks (also referred to as code books) in multi-rate lattice vector quantization for sub-vectors (see, for example, Patent Document 1 or Non-Patent Document 1).

[0015] For example, as shown in FIG. 1, quantization parameters in split multi-rate lattice vector quantization may include information identifying a codebook used for quantization (e.g., referred to as a "codebook indicator" or a codebook index), and information identifying a code vector selected from among a plurality of code vectors included in the codebook (e.g., referred to as a "code vector index").

[0016] For example, in each of the codebooks Q0, Q2, Q3, Q4, Q5, ..., Qn shown in Figure 1, 1, 10, 15, 20, 25, ..., 5n bits (where n is an integer greater than or equal to 2) may be used to encode (or quantize) one subvector (SV). Of the total number of bits used for encoding with each codebook (e.g., total number of bits used), 1, 2, 3, 4, 5, ..., n bits (where n is an integer greater than or equal to 2) may be used for the codebook instruction value. In other words, in Figure 1, the ratio of the number of bits allocated to encoding the codebook instruction value to the total number of bits used for encoding with each codebook (e.g., 5n, where n is an integer greater than 1) may be 1 / 5.

[0017] Note that codebook Q0 may contain one vector (for example, a zero vector or a null vector). A zero vector means, for example, that the quantization value of the vector is 0. Therefore, a code vector index does not need to be specified in codebook Q0, and the number of bits used for the code vector index may be 0. Codebook Q0 may use, for example, 1 bit for the codebook indicator value.

[0018] For example, an encoder may encode multiple subvectors (e.g., eight SVs in Non-Patent Document 1) together using the codebook shown in Figure 1. The number of bits available for encoding multiple subvectors (e.g., referred to as the "total number of bits") may be known between the encoder and the decoder.

[0019] For example, Patent Document 1 proposes, as an example, a method for reducing bits in split multirate lattice vector quantization for eight SVs. For example, based on the number of bits used for seven of the eight SVs, the codebook index used for the remaining SV may be estimated according to the following equation (1) (see, for example, Patent Document 1).

number

[0020] In equation (1), cb'fix is ​​an estimate of the number of bits used in the codebook directive for one SV (e.g., sub-vector number i=Pfix), Bitsavailable is the total number of bits available for encoding the eight SVs, and ΣBitscbvi is the sum of the bits used for encoding the seven other sub-vectors vi (i≠Pfix) that are different from sub-vector number i=Pfix (e.g., the total number of bits used in Figure 1).

[0021] In Patent Document 1, the encoding device quantizes (or encodes) the difference between the estimated number of bits used in the codebook instruction value shown in equation (1), cb'fix, and the actual number of bits in the codebook instruction value, for a single SV (e.g., i=Pfix), and transmits the difference information to the decoding device. For example, the larger the codebook number n used for a single SV, the less information (e.g., number of bits) in the difference information described above is compared to the codebook instruction value, thus reducing the number of encoded bits.

[0022] However, in Patent Document 1, for example, there are cases where the difference information (in other words, the data to be encoded) is a negative number (for example, -1), and since a quantization level or code corresponding to the negative number is used, the complexity of encoding (or quantization) may increase.

[0023] Furthermore, when encoding a single identified SV using codebook Q0 (e.g., codebook instruction value "0") or codebook Q2 under special conditions (e.g., codebook instruction value "1"), it may not be possible to reduce the number of encoded bits.

[0024] Here, a special case is, for example, a case where, of the total number of bits available for encoding, there are no bits that are not used for encoding, and all bits are used for encoding. In this case, for example, in Figure 1, the trailing "0" (also called a stop bit) of the multiple bits that indicate the codebook indication value of each codebook may be omitted. For example, in the special case, the codebook indication value of codebook Q2 may be "1" (1 bit) by omitting the "0" from "10".

[0025] Furthermore, if we focus on reducing the number of bits used for encoding in SVs (Subscripts) that have a larger number of bits used for encoding, for example, it may not be possible to reduce the number of encoded bits if an SV occurs where the number of bits used for encoding becomes 0 (for example, an SV that is not encoded because there are not enough available bits). Note that SVs where the number of bits used for encoding becomes 0 tend to be high-frequency SVs among multiple SVs (for example, the 6th, 7th, or 8th SV out of 8 SVs).

[0026] Therefore, in one embodiment of this disclosure, a method for reducing the number of encoding bits used to encode (in other words, variable-length encoding) the codebook indication values ​​of multirate lattice vector quantization (LVQ) applied to split vector quantization (e.g., SVQ) is described.

[0027] In the following, we will describe the Enhanced Voice Services (EVS) codec, which uses multirate lattice vector quantization as AVQ, as an example. Furthermore, while we will describe an example where AVQ is used for vector quantization of discrete cosine transform (DCT) coefficients, it is not limited to the quantization and encoding of DCT coefficients (in other words, the frequency domain). For example, AVQ (or multirate lattice vector quantization) can also be applied to time-domain vector quantization.

[0028] Furthermore, the following section explains, as an example, the case where the number of sub-vectors in AVQ is set to 8 (for example, SV1 to SV8). Note that the number of sub-vectors is not limited to 8; other numbers are also acceptable.

[0029] (Embodiment 1) [Example of encoding device configuration] Figure 2 is a block diagram showing an example configuration of an Algebraic Code Excited Linear Prediction (ACELP) encoding device for the EVS codec (for example, Figure 29 in Non-Patent Document 1). Figure 3 is a block diagram showing signal processing related to the AVQ encoding unit (for example, the AVQ encoder) in Figure 2. One embodiment of this disclosure is applicable, for example, to encoding codebook indices output from the AVQ encoding unit (AVQ enc block or Split Lattice VQ block) in Figures 2 and 3.

[0030] Figure 4 is a block diagram showing an example of the signal processing configuration for an AVQ coding unit (hereinafter referred to as the "coding device") 100 according to one embodiment of the present disclosure. The coding device 100 shown in Figure 4 may include a multiplication unit 101, a subtractor 102, a de-emphasis unit 103, a DCT unit 104, an AVQ coding unit (or a split multirate lattice vector quantization unit) 105 (for example, corresponding to a quantization circuit), a floating bit management unit 106, an inverse DCT (iDCT) unit 107, a sub-vector identification unit 108, a code conversion unit 109 (for example, corresponding to a control circuit), and a multiplexing unit 110.

[0031] The multiplier 101 may, for example, multiply the adaptive codebook vector v(n) input from the adaptive codebook by the adaptive codebook gain (or pitch gain) gp, and output the multiplication result to the subtractor 102.

[0032] The subtractor 102 may, for example, subtract the adaptive code vector after adaptive code gain multiplication input from the multiplier 101 from the linear prediction residual signal r(n), which is the coding target in ACELP coding, to determine (for example, calculate) the excitation residual signal qin(n). The excitation residual signal qin(n) may be calculated, for example, based on the following equation (2). The subtractor 102 may output the excitation residual signal qin(n) to the de-emphasis unit 103.

number

[0033] The de-emphasis unit 103 is, for example, a de-emphasis filter Fp(z), and may perform de-emphasis processing on the excitation residual signal qin(n) input from the subtractor 102. The de-emphasis unit 103 may output the excitation residual signal qin,d(n) after de-emphasis processing to the DCT unit 104.

[0034] The DCT unit 104 may, for example, convert the excitation residual signal qin,d(n) input from the de-emphasis unit 103 into DCT coefficients and output the DCT coefficients to the AVQ coding unit 105. Note that the method for converting a time-domain signal to a frequency-domain signal is not limited to DCT processing, and other methods such as the Discrete Fourier Transform (DFT) or the Modified Discrete Cosine Transform (MDCT) may also be used.

[0035] The AVQ coding unit 105 may perform split lattice vector quantization (or AVQ coding) on ​​the DCT coefficients of the excitation residual signal qin,d(n) input from the DCT unit 104.

[0036] For example, the AVQ coding unit 105 may divide the DCT coefficients into a plurality of subvectors (SV), quantize each of the plurality of subvectors, and generate quantization parameters that include a codebook number (also called a codebook indicator value or codebook index) indicating a codebook, and a code vector index indicating one of the plurality of code vectors contained in the codebook.

[0037] Furthermore, the AVQ encoding unit 105 may, for example, determine the number of bits allocated to AVQ or the bit allocation (AVQ bit budget) based on the sum of a fixed number of bits (or a predetermined number of bits, fixed bit-budget) and a floating number of bits (for example, the number of additional bits available) (floating bit-budget) input from the floating bit management unit 106 in each subframe of encoding, and output this to the code conversion unit 109. In addition, the AVQ encoding unit 105 may, for example, output information regarding the floating number of bits (floating bit-budget) that is updated based on the number of bits remaining after AVQ to the floating bit management unit 106.

[0038] The AVQ coding unit 105 may, for example, output the global gain code, one of the quantization parameters obtained by quantization, to the multiplexing unit 110. The AVQ coding unit 105 may also output the codebook numbers, codevector indices, and AVQ bit budget allocated to AVQ to the code conversion unit 109. The AVQ coding unit 105 may also output the DCT coefficients of the quantized excitation residual signals qin,d(n) to the inverse DCT unit 107.

[0039] The floating bits manager 106 may maintain (or manage) information regarding the number of bits available within the encoded processing frame, based on the floating bit information input from the AVQ encoding unit 105. For example, the floating bits manager 106 may output the number of bits to be maintained as the floating bit number to the AVQ encoding unit 105 during AVQ encoding of a subsequent subframe.

[0040] The inverse DCT unit 107 may perform an inverse DCT transformation on the DCT coefficients qin,d(n) input from the AVQ coding unit 105 and output the quantized excitation residual signal qd(n).

[0041] The sub-vector identification unit 108 may, for example, identify a dominant sub-vector from among multiple sub-vectors based on the input adaptive code vector v(n). The sub-vector identification unit 108 may output information regarding the position of the dominant sub-vector (e.g., dominant sub-vector information) to the code conversion unit 109. For example, since the target of quantization or encoding in the AVQ encoding unit 105 is the DCT coefficient, the sub-vector identification unit 108 may convert the adaptive code vector v(n) to the DCT coefficient and identify the position (or frequency) of the sub-vector having the maximum energy in the DCT coefficient domain (or frequency domain) of the adaptive code vector v(n). Note that if the target of quantization or encoding in the AVQ encoding unit 105 is a time-domain signal, the sub-vector identification unit 108 does not need to convert the adaptive code vector v(n) to the DCT coefficient.

[0042] Furthermore, the sub-vector identification unit 108 may be a memory that outputs information regarding the position of a predetermined specific sub-vector to the code conversion unit 109, regardless of the adaptive codebook vector v(n). In this case, the position of the specific sub-vector is fixed, so if, for example, one embodiment of the present disclosure is implemented by a software program, the position of the specific sub-vector may be written into the program. For example, the sub-vector identification unit 108 may set the third or last sub-vector among a plurality of (e.g., eight) sub-vectors as the specific sub-vector. Note that the specific sub-vector is not limited to the third or last sub-vector, but may be a sub-vector in any other order. For example, the position of the specific sub-vector may be set to a position (e.g., the highest position) where the probability (frequency) of an experimentally or statistically larger codebook number is higher.

[0043] The code conversion unit 109 (Codebook indications conversion) may, for example, convert the encoded information of the codebook number of a specific sub-vector (e.g., a sub-vector to be converted) based on the codebook number and code vector index of each of the multiple sub-vectors input from the AVQ encoding unit 105, information on the number of bits allocated to the AVQ of one subframe (AVQ bit-budget), and the main sub-vector information input from the sub-vector identification unit 108.

[0044] For example, if there are eight subvectors, the code conversion unit 109 may output encoded information to the multiplexing unit 110, for example, including the codebook index and code vector index of the eight subvectors, or it may output encoded information to the multiplexing unit 110, including the codebook index of seven subvectors, an indicator value for one unused bit (for example, called the unused bit indicator), and the code vector index of the eight subvectors.

[0045] The multiplexing unit 110 may multiplex the global gain input from the AVQ encoding unit 105 and the encoding information input from the code conversion unit 109, and output the multiplexed bitstream information (for example, AVQ code).

[0046] Next, an example of the operation of the encoding device 100 will be described.

[0047] [Example of selecting sub-vectors to be converted] The code conversion unit 109 may select a subvector to be coded (for example, also called a target subvector) based, for example, on the main subvector information input from the subvector identification unit 108 (for example, information indicating a subvector identified as a main subvector) and the number of bits allocated to the AVQ of one subframe (number of bits allocated for vector quantization) input from the AVQ coding unit 105.

[0048] Figure 5 shows an example of the sub-vector selection process for code conversion.

[0049] In Figure 5, the code conversion unit 109 determines, for example, the number of AVQ bits available in a subframe (e.g., AVQ sub-frame) (AVQ bit-budget) (S101).

[0050] The code conversion unit 109 determines, for example, whether the AVQ bit-budget exceeds a threshold (S102). The threshold may be set to, for example, 85 [bits / subframe], or other values ​​may be set. The threshold may be set, for example, experimentally or statistically.

[0051] If the AVQ bit-budget exceeds a threshold (S102: Yes), the code conversion unit 109 may select a sub-vector identified by the main sub-vector information from among multiple sub-vectors as the sub-vector to be converted (S103).

[0052] On the other hand, if the AVQ bit-budget is below a threshold (S102: No), the code conversion unit 109 may, for example, set the last sub-vector (for example, the 8th sub-vector SV8) among the multiple sub-vectors as the sub-vector to be converted (S104).

[0053] The code conversion unit 109 may, for example, apply the code conversion process described later to the selected sub-vector to be converted.

[0054] The above explains an example of selecting a sub-vector to be converted.

[0055] The selection process for the sub-vectors to be converted may be performed in the sub-vector identification unit 108 instead of the conversion unit 109. In this case, information regarding the AVQ bit-budget may be input to the sub-vector identification unit 108. For example, the sub-vector identification unit 108 may output the main sub-vector information related to the sub-vector selected as the sub-vector to be converted to the conversion unit 109.

[0056] [Code conversion example] Next, an example of the code conversion process in the code conversion unit 109 will be described.

[0057] For example, the code conversion unit 109 may perform the following steps 1 to 3 based on the codebook instruction values ​​of each of the multiple sub-vectors input from the AVQ encoding unit 105, and the selected sub-vector to be converted.

[0058] (Step 1) The code conversion unit 109 sets the codebook instruction values ​​of other subvectors (e.g., N-1 subvectors) located at positions different from the subvector to be converted, from among a plurality of (e.g., N) codebook instruction values, as the code (or encoded code). The code conversion unit 109 may then calculate, for example, the sum of the number of bits used in the codebook instruction values ​​and the number of bits used in the code vector index for the N-1 subvectors.

[0059] (Step 2) The code conversion unit 109 may, for example, calculate the number of bits available for encoding the codebook instruction value of the subvector to be converted. For example, the code conversion unit 109 may calculate the number of bits available for encoding the codebook instruction value of the subvector to be converted by subtracting the sum of the number of bits used for encoding the N-1 subvectors calculated in (step 1) from the total number of bits available for AVQ encoding (AVQ bit-budget).

[0060] (Step 3) The code conversion unit 109 may, for example, calculate the number of bits that are not used for encoding (for example, called the number of unused bits) from the number of bits available for encoding the sub-vector to be converted, which was calculated in (step 2), and encode the number of unused bits. For example, the code conversion unit 109 may calculate the number of unused bits by subtracting the sum of the number of bits used for the codebook instruction value and the number of bits used for the code vector index of the sub-vector to be converted from the number of available bits calculated in (step 2).

[0061] The code conversion unit 109 may output to the multiplexing unit 110, for example, the codebook instruction value (encoded code) obtained by (step 1) to (step 3), and information encoding the number of unused bits (for example, also called the number of unused bits instruction value or the number of unused bits encoded code).

[0062] Next, an example of the operation of the code conversion unit 109 will be described.

[0063] Figures 6, 7, and 8 are flowcharts showing examples of processing by the code conversion unit 109.

[0064] In Figure 6, the code conversion unit 109 may, for example, classify the multiple subvectors to be encoded into two groups (S201). For example, if there are eight subvectors to be encoded (e.g., SV1 to SV8), the code conversion unit 109 may divide the eight subvectors into the following two groups. Group 1: SV1~SV5, excluding the sub-vector (SVd) selected for code conversion. Group 2: SV6~SV8, and SVd

[0065] For example, if the sub-vector SVd to be converted is SV3, Group 1 may include SV1, SV2, SV4, and SV5, and Group 2 may include SV6-SV8 and SV3. Also, for example, if the sub-vector SVd to be converted is SV8, Group 1 may include SV1-SV5, and Group 2 may include SV6-SV83. Note that SVd is not limited to SV3 or SV8.

[0066] The code conversion unit 109 may, for example, sequentially encode the codebook index and code vector index of the subvectors classified as Group 1 (S202). The code conversion unit 109 may then output the encoded information (codebook index and code vector index) of the subvectors included in Group 1 to the multiplexing unit 110. The code conversion unit 109 may also calculate, for example, the number of bits used for encoding Group 1 (represented as BITSgroup1) (S202). The code conversion unit 109 may also determine, for example, the number of bits available for encoding the subvectors classified as Group 2 (represented as BITSgroup2) based on the following equation (3) (S202). (BITSgroup2)=(AVQ bit-budget)-(BITSgroup1) (3)

[0067] The code conversion unit 109 may, for example, determine whether BITSgroup2 exceeds the threshold Threshold1 (S203).

[0068] If BITSgroup2 exceeds the threshold Threshold1 (S203:Yes), the code conversion unit 109 may proceed to the process shown in Figure 7 (for example, the process in S205).

[0069] On the other hand, if BITSgroup2 is less than or equal to the threshold Threshold1 (S203: No), the code conversion unit 109 may determine the coding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S204). If SVd is any of SV1-SV5: SVd, SV6, SV7, SV8 Other cases: SV6, SV7, SV8

[0070] The code conversion unit 109 then outputs encoded information, including the codebook instruction value and code vector index for each sub-vector of Group 2, to the multiplexing unit 110, and terminates the code conversion process.

[0071] In Figure 7, the code conversion unit 109 may, for example, update Group2 by removing SV6 from Group2 if SVd is not SV6, encode SV6, and output encoded information including the codebook number code vector index of SV6 to the multiplexing unit 110 (S205). Alternatively, the code conversion unit 109 may, for example, calculate the number of bits used for encoding SV6, subtract the calculated number of bits from BITSgroup2, and update BITSgroup2. In other words, the updated BITSgroup2 may indicate the number of bits available for encoding SV, excluding SV6 from Group2.

[0072] If SVd is SV6, then neither Group2 nor BITSgroup2 needs to be changed (or updated).

[0073] Next, the code conversion unit 109 may determine, for example, whether BITSgroup2 exceeds the threshold Threshold2 (S206).

[0074] If BITSgroup2 exceeds the threshold Threshold2 (S206:Yes), the code conversion unit 109 may proceed to the process shown in Figure 8 (for example, the process in S208).

[0075] On the other hand, if BITSgroup2 is less than or equal to the threshold Threshold2 (S206: No), the code conversion unit 109 may determine the coding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S207). If SVd is any of SV1-SV6: SVd, SV7, SV8 Other cases: SV7, SV8

[0076] The code conversion unit 109 then outputs encoded information, including the codebook instruction value and code vector index for each sub-vector of Group 2, to the multiplexing unit 110, and terminates the code conversion process.

[0077] In Figure 8, the code conversion unit 109 may, for example, update Group2 by removing SV7 from Group2 if SVd is not SV7, encode SV7, and output encoded information including the codebook number code vector index of SV7 to the multiplexing unit 110 (S208). Alternatively, the code conversion unit 109 may, for example, calculate the number of bits used for encoding SV7, subtract the calculated number of bits from BITSgroup2, and update BITSgroup2. In other words, the updated BITSgroup2 may indicate the number of bits available for encoding SV after removing SV7 from Group2.

[0078] If SVd is SV7, then neither Group2 nor BITSgroup2 needs to be changed (or updated).

[0079] Next, the code conversion unit 109 may determine, for example, whether BITSgroup2 exceeds the threshold Threshold3 (S209).

[0080] If BITSgroup2 is less than or equal to the threshold Threshold3 (S209: No), the code conversion unit 109 may determine the coding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S210). If SVd is any of SV1 to SV7: SVd, SV8 Other cases: SV8

[0081] The code conversion unit 109 then outputs encoded information, including the codebook instruction value and code vector index for each sub-vector of Group 2, to the multiplexing unit 110, and terminates the code conversion process.

[0082] On the other hand, if BITSgroup2 exceeds the threshold Threshold3 (S209:Yes), the code conversion unit 109 may determine the coding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S211). If SVd is any of SV1 to SV7: SV8, SVd Other cases: SV8

[0083] The code conversion unit 109 then outputs encoded information, including the codebook instruction value and code vector index of SV8 and the instruction value for the number of unused bits, to the multiplexing unit 110, and terminates the code conversion process. In other words, the code conversion unit 109 may output encoded information for the number of unused bits to the multiplexing unit 110 instead of encoded information for the codebook instruction value of SVd.

[0084] If SVd is SV8, the code conversion unit 109 may output, for example, either the codebook instruction value or the instruction value for the number of unused bits of SV8, along with the code vector index, to the multiplexing unit 110. Either the codebook instruction value or the number of unused bits may be predetermined.

[0085] Thus, the code conversion unit 109 may decide whether to perform encoding of the SVd codebook number or encoding of the unused bits based on the number of bits available for encoding in Group 2. For example, the code conversion unit 109 may decide to encode the codebook number (in other words, output a codebook indicator value) if the number of bits available for encoding in Group 2 is less than or equal to a threshold (e.g., Threshold1, Threshold2, or Threshold3), and may decide to encode the unused bits (in other words, output an unused bit indicator value) if the number of bits available for encoding in Group 2 exceeds the threshold.

[0086] In Figures 6, 7, and 8, the thresholds Threshold1, Threshold2, and Threshold3 may be set as follows.

[0087] For example, based on the number of bits fixedly allocated to AVQ, the average number of bits allocated per subvector is represented as "BITSsv".

[0088] In the example above, for instance, Threshold1 may be set to 4×BITSsv if SVd is any of SV1 to SV5, and to 3×BITSsv if SVd is any of SV6 to SV8.

[0089] Furthermore, for example, Threshold2 may be set to 3×BITSsv if SVd is any of SV1 to SV6, and to 2×BITSsv if SVd is any of SV7 to SV8.

[0090] Furthermore, for example, Threshold3 may be set to 2×BITSsv if SVd is any of SV1 to SV7, and to BITSsv if SVd is SV8.

[0091] Thus, the bit number obtained by multiplying the number of SVs classified as Group2 by BITSsv may be set as the threshold.

[0092] [Example of encoding unused bits] Next, an example of encoding unused bits in the code conversion unit 109 (for example, the process in S211 in Figure 8) will be described.

[0093] Figure 9 is a flowchart showing an example of the encoding process for unused bits in the code conversion unit 109.

[0094] In Figure 9, the code conversion unit 109 determines, for example, whether the encoded result of SV8 (e.g., the codebook number) is zero (S301). In other words, the code conversion unit 109 may determine whether SV8 is a null vector (or a zero vector). The process in S301 is, for example, a process to determine whether the encoded result of SV8 is zero in AVQ encoding used in the EVS standard, and whether the encoding of the 0 of SV8 has been terminated because the number of bits available for AVQ has been used up for encoding the sub-vector (for example, when SV8 is encoded with 0 bits).

[0095] If SV8 is not zero (S301: No), the code conversion unit 109 may set the number of bits obtained by subtracting the number of bits used to encode the codebook number of SVd from the number of bits available to encode the codebook number of SVd as the "unused bits" (S302).

[0096] Even if SV8 is not zero, there are cases in AVQ coding where the last bit of the codebook instruction value of the coded result of SV8 (for example, stop bit 0) is truncated. In this case, the number of bits used for coding SVd is reduced by 1 bit, but the 1-bit shortage may be covered by truncating stop bit 0 in the coding of SVd, or the 1-bit shortage may be covered by the number of bits saved by applying one embodiment of this disclosure.

[0097] Furthermore, if, for example, the encoding result of SV8 is zero and stop bit 0 is truncated, then SV7 or SV6 may also be truncated (for example, SV7 or SV6 may be encoded with 0 bits). In this way, when two or more SVs are truncated, one bit (for example, codebook instruction value 0) is allocated to the encoding of each of those two or more SVs, so the number of bits available for encoding SVd may be two or more bits less. Such cases can be detected, for example, based on whether the number of bits available for encoding SVd is an odd number of bits used for encoding the SVs (for example, whether it is not a multiple of 5).

[0098] As described above, in encoding unused bits, the encoding order of SVd is set to the end of the subvectors included in Group2 (in other words, swapped). Here, in Figure 9, if SV8 is zero (S301: Yes), for example, there may be an SV encoded with 0 bits (for example, an SV that is not encoded because the number of allocated bits is 0) among the SVs encoded before SVd. For example, if encoding of unused bits is performed instead of encoding SVd, as in the process of S211 in Figure 8, other SVs may be encoded before SVd. If an SV encoded before SVd is an SV encoded with zero bits, one bit (for example, the codebook instruction value 0 shown in Figure 1) is consumed (or wasted) to encode 0 for one SV, and the number of bits available for encoding SVd (or unused bits) may be reduced (or insufficient). Hereinafter, bits wasted for an SV encoded with zero bits will be called "wasted bits".

[0099] Note that if SV8 (or an earlier SV) is encoded with zero bits, all bits allocated to AVQ encoding are used, so the number of unused bits is 0.

[0100] Therefore, if there is a difference between the number of bits available for SVd encoding (e.g., the number of remaining bits) and the number of bits used for SVd encoding, this difference may correspond to the number of SVs encoded with zero bits. Also, for example, as shown in Figure 1, when the codebook number is 2 or greater, the number of bits used for SVd encoding is a multiple of 5.

[0101] For example, the code conversion unit 109 may add the number of wasted bits to the number of bits available for encoding SVd (e.g., the number of remaining bits) to update the number of bits available for encoding SVd to a multiple of 5 (S303). Alternatively, the code conversion unit 109 may determine, for example, that the number of unused bits is zero.

[0102] Thus, the code conversion unit 109 may, for example, calculate the number of wasted bits and add the wasted bits to the number of bits available for encoding the SVd, thereby calculating the number of unused bits based on the original number of bits available for encoding the SVd (in other words, the number of bits that would be available for encoding the SVd if the encoding order of the SVd were not rearranged) when wasted bits occur. In other words, the code conversion unit 109 may update the number of bits available for encoding the SVd based on the number of consecutive subvectors among the subvectors of Group 2 that are different from the SVd and whose quantization parameter is a null vector.

[0103] Next, the code conversion unit 109 may encode (for example, convert to an instruction value) the number of unused bits obtained in the processing of S302 or S303 (S304). Figure 10 shows an example of encoding the number of unused bits. In Figure 10, the number of unused bits that are different from 0 bits has a range, but the number of bits used for encoding is defined as a multiple of 5 (or 1), so a unique number of bits can be derived during decoding depending on the number of available bits.

[0104] For example, if the number of available bits is 13 bits and the sign (indication value) of the unused bits is "10", then, assuming there are no wasted bits, the number of unused bits can be determined to be 3 bits in order for the number of bits excluding the unused bits to be a multiple of 5.

[0105] Whether or not there are wasted bits can be determined, for example, by whether the decoded SV8 is a zero vector, the remainder when the number of available bits is divided by 5 (for example, modulo 5) (hereinafter also referred to as the "remaining bits"), and the number of consecutive decoded SVs, including SV8, that result in a zero vector. For example, if SV8 is not a zero vector, no wasted bits occur. Also, for example, wasted bits occur when the number of unused bits is 0. The number of wasted bits can be determined, for example, by the number of consecutive decoded SVs, including SV8, that result in a zero vector, and the remainder of the number of available bits by 5 (for example, the remaining bits).

[0106] The number of unused bits when wasted bits occur may be determined, for example, as follows:

[0107] For example, if the number of bits available for encoding SVd is 12 bits, and the decoded values ​​of three consecutive SVs, including SV8, are zero vectors (null vectors), then the 3 bits used to encode the three zero vectors (e.g., SV6~SV8) during the reordering of the SVd encoding (e.g., 5 - (12 modulo 5) = 3) are wasted bits. Therefore, the number of bits available for encoding SVd is 15 bits, which is 12 bits plus 3 bits. As a result, the number of bits available for encoding SVd is equal to the number of bits used for encoding SVd (e.g., a multiple of 5), and the number of unused bits becomes zero.

[0108] As another example, let's consider the case where 13 bits are available for SVd encoding, the decoded values ​​of three consecutive SVs (e.g., SV6~SV8) are zero vectors (null vectors), SV6 is encoded with 1 bit, and SV7 and SV8 are encoded with 0 bits (e.g., unencoded zero vectors). In this case, of the 3 bits used to encode the three zero vectors (encode SV6~SV8) when rearranging the SVd encoding order, at least 2 bits (e.g., 5 - (13 modulo 5) = 2) are wasted bits. Therefore, 15 bits are available for SVd encoding, which is 13 bits plus 2 bits. As a result, the number of bits available for SVd encoding is equal to the number of bits used for SVd encoding (e.g., a multiple of 5), and the number of unused bits is zero.

[0109] For example, if the number of unused bits is 0, the number of bits used for encoding is 1 bit, as shown in Figure 10. Also, for example, if the number of bits used for encoding SVd is 15 bits, the codebook number is 3, and the number of bits used for encoding the codebook instruction value is 3 bits, as shown in Figure 1. In the above example, the number of bits used for encoding the number of unused bits is 1 bit, and the number of wasted bits is 2 bits, for a total of 3 bits. Therefore, when wasted bits occur, the number of bits used for encoding is the same whether encoding the codebook instruction value of SVd (e.g., 3 bits) or encoding the number of unused bits (e.g., 1 bit + 2 wasted bits).

[0110] In this way, even when wasted bits occur, the encoding device 100 can encode the unused bits while suppressing an increase in the number of bits used for encoding.

[0111] Furthermore, since the number of unused bits is 0 when it is determined that wasted bits have occurred, the code conversion unit 109 may, for example, change (or update) the number of bits available for encoding SVd and then determine the number of unused bits to be 0 without calculating the difference between that number and the number of bits used for encoding SVd. Furthermore, for example, when decoding the SVd codebook number by dividing the number of bits available for encoding SVd by 5, the number of bits available for encoding SVd may be changed as described above. Alternatively, the decoding procedure may be changed to decode the codebook number by adding 1 to the codebook number obtained by dividing the number of bits available for encoding SVd by 5, depending on the case.

[0112] Furthermore, while Figure 10 shows an example where the codes for unused bits are assigned in order of increasing unused bit count, this is not limited to this arrangement. For example, codes may be assigned in order of decreasing unused bit count frequency. For instance, unused bits that appear more frequently may be assigned codes with fewer bits. This reduces the number of bits used for encoding unused bits.

[0113] [Example of a decoding device configuration] Figure 11 is a block diagram showing an example of signal processing for an AVQ decoding unit (hereinafter referred to as the "decoding device") 200 according to one embodiment of the present disclosure. The decoding device 200 shown in Figure 11 may include, for example, a separation unit 201, a sub-vector identification unit 202, a code conversion unit 203 (for example, corresponding to a control circuit), an AVQ decoding unit 204 (for example, corresponding to an inverse quantization circuit), a floating-bit number management unit 205, and an inverse DCT unit 206.

[0114] In the decoding device 200, the bitstream transmitted from the encoding device 100 is input to the separation unit 201.

[0115] The separation unit 201 may, for example, separate the global gain code, code vector indices, codebook indices, and unused-bit code (or unused-bit index) from the AVQ code contained in the input bitstream. The separation unit 201 may, for example, output the global gain code to the AVQ decoding unit 204 and output the codebook indices, code vector indices, and unused-bit code (or unused-bit index) to the code conversion unit 203.

[0116] The sub-vector identification unit 202 may, for example, identify a main sub-vector from among a plurality of sub-vectors based on the input adaptive code vector v(n). The sub-vector identification unit 202 may, for example, output information regarding the position of the main sub-vector (e.g., main sub-vector information) to the code conversion unit 203. For example, here, since the target of quantization or encoding in the encoding device 100 (e.g., AVQ encoding unit 105) is the DCT coefficient, the sub-vector identification unit 202 may convert the adaptive code vector v(n) into the DCT coefficient and identify the position (or frequency) of the sub-vector having the maximum energy in the DCT coefficient region of the adaptive code vector v(n). Note that if the target of quantization or encoding in the encoding device 100 is a time-domain signal, the sub-vector identification unit 202 does not need to convert the adaptive code vector v(n) into the DCT coefficient.

[0117] The code conversion unit 203 may, for example, calculate the codebook instruction value of a sub-vector at a specific position (e.g., a sub-vector to be code converted) based on the information input from the separation unit 201 and the information input from the sub-vector identification unit 202. For example, the code conversion unit 203 may calculate the codebook instruction value of a sub-vector to be code converted based on the codebook instruction value, code vector index, and unused bit number instruction value input from the separation unit 201, and the number of bits available for AVQ (e.g., AVQ bit-budget) input from the AVQ decoding unit 204. The code conversion unit 203 may output the codebook instruction value and code vector index of each sub-vector to the AVQ decoding unit 204.

[0118] For example, the code conversion unit 203 may perform the following steps 4 to 7.

[0119] (Step 4) The code conversion unit 203, for example, decodes the codebook instruction values ​​of other subvectors different from the subvector to be converted, based on the codebook instruction values. The code conversion unit 203 may also calculate, for example, the number of bits used to encode the subvector different from the subvector to be converted (for example, the sum of the number of bits used in the codebook instruction values ​​and the number of bits used in the code vector) based on the decoded codebook instruction values.

[0120] (Step 5) The code conversion unit 203 may, for example, decode the number of unused bits based on the unused bit number indicator value.

[0121] (Step 6) The code conversion unit 203 may, for example, calculate the number of encoded bits of the subvector to be converted based on the number of encoded bits of the subvector calculated in (step 4) and the number of unused bits decoded in (step 5).

[0122] (Step 7) The code conversion unit 203 may, for example, calculate (or decode) the codebook instruction value of the subvector based on the number of encoded bits of the subvector to be converted, which was calculated in (step 6).

[0123] The AVQ decoding unit 204 may, for example, decode (or de-quantize) the quantization DCT coefficients based on the global gain code input from the separation unit, the codebook instruction value and code vector index of each SV input from the code conversion unit 203, and the floating bit count input from the floating bit count management unit 205, and output them to the inverse DCT unit 206. The AVQ decoding unit 204 may also, for example, determine (for example, calculate) the number of bits to be allocated to AVQ based on the sum of a fixed number of bits (or a predetermined number of bits) and the floating bit count input from the floating bit count management unit 205, and output this to the code conversion unit 203. The AVQ decoding unit 204 may also, for example, output information regarding the floating bit count that is updated based on the number of bits remaining after AVQ decoding to the floating bit count management unit 205.

[0124] The floating bit management unit 205 may maintain (or manage) information regarding the number of bits available within the decoded frame, based on the floating bit information input from the AVQ decoding unit 204. For example, the floating bit management unit 205 may output the number of bits to be maintained as the floating bit number to the AVQ decoding unit 204 during AVQ decoding of a subsequent subframe.

[0125] The inverse DCT unit 206 may, for example, perform an inverse DCT transformation on the decoded quantization DCT coefficients input from the AVQ decoding unit 204 to convert them into a time-domain signal and output it as a decoded excitation residual signal qd(n).

[0126] As described above, in this embodiment, the encoding device 100 determines whether to perform encoding of the codebook number for the subvector to be converted, or encoding based on the difference between the number of bits allocated for vector quantization and the number of bits for the quantization parameters (for example, encoding of the number of unused bits), based on the number of bits available for encoding the subvector in vector quantization.

[0127] In this way, by switching between encoding the codebook number and encoding the number of unused bits based on the number of bits available for encoding, it is possible to perform encoding according to the number of bits available for encoding in multirate lattice vector quantization, thereby reducing the number of encoded bits. Therefore, according to this embodiment, the number of encoded bits can be reduced in multirate lattice vector quantization.

[0128] Furthermore, according to this embodiment, even if the subvector to be converted to the unused bit count indicator is a different subvector from the last subvector (e.g., SV8) (in other words, if the coding order is reversed), the coding device 100 can accurately determine the number of unused bits according to the number of wasted bits that may result from the reversal of the coding order. For example, if wasted bits occur, the coding device 100 can accurately estimate the number of unused bits according to the number of wasted bits, thereby suppressing errors due to insufficient coding bits or a reduction in the codebook number (e.g., a reduction in the accuracy of the codebook), and thus suppressing a decrease in coding performance.

[0129] Furthermore, even in cases where changing the encoding order of SVs does not result in wasted bits (for example, in cases where there are no SVs encoded with 0 bits), the encoding device 100 may rearrange the encoding bit allocation to result in wasted bits if it is possible to create wasted bits (for example, if there may be SVs encoded with 0 bits). As an example, consider a case in Group 2 including SVd, SV6, SV7, and SV8 where SV6, SV7, and SV8 are encoded with 0 (1 bit), SVd is encoded with 10 bits (codebook number 2), and the number of bits available for encoding SVd is 13 bits. In this case, since each of SV6 to SV8 is a zero vector, the encoding device 100 may set the bit allocation for SV6 to SV8 to 0 bits and allocate the 3 bits previously allocated to SV6 to SV8 to the encoding bits of SVd (in other words, they may be reassigned). Note that wasted bits occur (for example, 0 bits can be allocated) when the number of unused bits is 0, and the sum of the remaining bits and the number of consecutive zero vectors is limited to a multiple of 5, so the sub-vectors to which 0 bits can be allocated are SV7 and SV8. For this reason, the number of bits that can be reallocated to the encoded bits of SVd is 2 bits. In this case, the encoding device 100 sets the number of usable bits of SVd to 15 bits (13 bits plus 2 bits), and encodes SVd with codebook number 3 (for example, 15 bits). In this case, the number of unused bits becomes zero. In this way, by rearranging the bit allocation, it is possible to reliably determine whether or not there are wasted bits on the decoding side, and the encoding accuracy of SVd can be improved.

[0130] Furthermore, according to this embodiment, the decoding device 200 can identify the encoding information relating to the subvector to be coded based on parameters such as the number of bits used for encoding and the decoding information (for example, the codebook instruction value of a subvector different from the subvector to be coded). Therefore, for example, a signal for switching between encoding the codebook instruction value and encoding the number of unused bits (for example, a flag or control information specifically for switching) does not need to be notified from the encoding device 100 to the decoding device 200.

[0131] (Embodiment 2) Figure 12 is a block diagram showing an example configuration of an AVQ encoding unit (hereinafter referred to as the "encoding device") 300 according to one embodiment of the present disclosure. In Figure 12, components that perform the same processing as the encoding device 100 shown in Figure 4 are denoted by the same reference numerals.

[0132] In Figure 12, the sub-vector identification unit 301 may output information regarding the position of a predetermined sub-vector (for example, called a target sub-vector, target sub-vector, or fixed sub-vector) to the code conversion unit 109. The predetermined sub-vector may be any of the eight sub-vectors (for example, SV1 to SV8). For example, the following will describe the case where, among the eight sub-vectors SV1 to SV8, the predetermined sub-vector is the third sub-vector from the lowest frequency (for example, SV3) or the last sub-vector (for example, SV8).

[0133] Furthermore, the sub-vector identification unit 301 does not need to perform any signal processing to identify (specify) a sub-vector at a predetermined specific position, and for example, it does not need to be explicitly provided as a component. In Figure 12, as an example, the sub-vector identification unit 301 may be a memory that holds the predetermined position of a sub-vector.

[0134] In the encoding device 300 shown in Figure 12, the operation of components different from the sub-vector identification unit 301 may be the same as the operation of the encoding device 100 shown in Figure 4.

[0135] Next, we will describe an example of operation in the encoding device 300 that differs from Embodiment 1.

[0136] The method for selecting the sub-vectors to be converted can be the same as the method shown in Figure 5. In this embodiment, the code conversion unit 109 may use pre-specified sub-vector position information instead of main sub-vector information. Also, the sub-vector selection process may be performed by the sub-vector identification unit 301 instead of the code conversion unit 109. In this case, AVQ bit-budget information may be input to the sub-vector identification unit 301, and information regarding the selected sub-vectors may be input to the code conversion unit 109 as sub-vector position information.

[0137] Figures 13 to 16 show flowcharts illustrating an example of operation in the encoding device 300. As an example, Figures 13 to 16 show an example of operation in the encoding device 300 when the position of the sub-vector to be converted is the third lowest sub-vector SV3 in the frequency domain.

[0138] In Figure 13, the encoding device 300 classifies the subvectors SV1 to SV8 into, for example, Group 1, which includes SV1 and SV2, and Group 2, which includes the five subvectors SV3 to SV8 (S401). For example, the encoding device 300 may classify the subvectors SV1 to SV8 into, for example, Group 1, which includes subvectors (before the subvector to be converted), and Group 2, which includes subvectors (after the subvector to be converted). For example, when encoding a subvector in the frequency domain, the encoding device 300 may classify multiple subvectors (e.g., SV1 to SV8) into Group 1, which consists of subvectors with frequencies lower than the subvector to be converted, and Group 2, which consists of the subvector to be converted and subvectors with frequencies higher than the subvector to be converted. In other words, the encoding device 300 may classify the subvectors SV1 to SV8 into Group 1, which does not include the subvector to be converted, and Group 2, which includes the subvector to be converted, with the subvector to be converted as the boundary.

[0139] Next, the encoding device 300 encodes the quantization parameters of the sub-vectors included in Group 1 (e.g., SV1 and SV2) and outputs encoded information (e.g., codebook instruction values ​​and code vector indices) (S402). The encoding device 300 may also determine, for example, the number of bits used (or consumed) for encoding Group 1 and the number of bits available for encoding the sub-vectors of Group 2 (e.g., SV3 to SV8).

[0140] Next, the encoding device 300 determines, for example, whether the number of bits available for encoding the sub-vector of Group 2 is greater than or equal to the threshold Threhold 1 (S403). For example, if the number of bits available for encoding the sub-vector of Group 2 is less than Threhold 1 (S403: No), the encoding device 300 proceeds to the process shown in Figure 14 (for example, the process in S404), and if the number of bits available for encoding the sub-vector of Group 2 is greater than or equal to Threhold 1 (S403: Yes), the encoding device 300 proceeds to the process shown in Figure 15 (for example, the process in S408).

[0141] Here, if the position of the subvector selected as the target for code conversion is the third (for example, SV3), Threshold1 may be set to 30 bits. For example, if SV3 is set as the last subvector to be encoded among the subvectors SV1 to SV8 (in other words, if there is a change in the encoding order), then if the decoding result of each of the subvectors SV4 to SV8 that come after SV3 is 0 (for example, a null vector), then 1 bit may be used for encoding each of them (for example, a maximum of 5 bits for 5 subvectors). On the other hand, in the case of AVQ encoding (in other words, if there is no change in the encoding order), SV4 to SV8 that come after SV3 may each be encoded with 0 bits. If SV4 to SV8 are encoded with 0 bits by AVQ encoding, then in the encoding method that performs code conversion according to this embodiment, a total of 5 bits are used for encoding SV4 to SV8, so a bit reduction effect of 5 bits or more can be expected in the encoding of SV3. For example, referring to Figures 1 and 10, the number of encoded bits is 1 bit when the number of unused bits is 0. Therefore, to achieve a reduction of 5 bits, the SV3 codebook number can be 6 or greater. For example, when the codebook number is 6, the encoded information, including the code vector index, is 30 bits. Thus, the threshold Threshold1 can be set to 30 bits.

[0142] If the position of a particular sub-vector differs from that of SV3, the subbands and threshold value Threshhold1 included in Group2 may be set according to the specific sub-vector. For example, if SV4 is set to a specific sub-vector, Group2 may include SV4 to SV8, and Threshhold1 may be set to 25 bits.

[0143] In Figure 14, the encoding device 300 determines, for example, the encoding order of the subvectors in Group 2 to be SV3, SV4, SV5, SV6, SV7, SV8, encodes SV3 to SV7, and outputs encoded information (e.g., codebook instruction value and code vector index) (S404). The encoding device 300 may also determine, for example, the number of bits used for encoding SV3 to SV7 and the number of bits available for encoding SV8 (S404).

[0144] Thus, if the number of bits available for encoding Group 2 is less than Threshold 1 (S403: No), the encoding device 300 does not need to perform code conversion (in other words, change the encoding order) for sub-vector SV3 during the encoding of Group 2. In other words, if the number of bits available for encoding Group 2 is less than Threshold 1, the encoding device 300 may set (or change, update) the sub-vector to be converted from SV3 to the last sub-vector in Group 2, SV8. This process can suppress, for example, the occurrence of a shortage of bits during the encoding of the sub-vector to be converted.

[0145] Next, the encoding device 300 may determine, for example, whether the number of bits available for encoding SV8 is less than threshold 2 or greater than threshold 3 (S405).

[0146] If the number of bits available for encoding SV8 is less than Threshold 2 or greater than Threshold 3 (S405: Yes), the encoding device 300 may encode SV8 using, for example, the AVQ encoding method (a method for encoding the codebook number), output encoded information (for example, the codebook instruction value and the code vector index), and terminate the code conversion process (S406). In this way, if the number of bits available for encoding SV8 is less than Threshold 2 or greater than Threshold 3, the encoding device 300 may encode the codebook number without encoding the unused bits, since the number of encoded bits is not reduced by encoding the unused bits.

[0147] On the other hand, if the number of bits available for encoding SV8 is greater than or equal to Threshold 2 and does not exceed Threshold 3 (S405: No), the encoding device 300 may encode the number of unused bits instead of encoding the codebook number, output the encoded information (e.g., an unused bit number indicator and a code vector index), and terminate the code conversion process (S407).

[0148] Here, for example, Threshold2 may be set to 9 bits and Threshold3 to 80 bits. The reason for setting Threshold2 to 9 bits is that, for example, if the number of bits available for SV8 encoding is less than 10 bits, then even in AVQ encoding, the number of bits used for encoding the codebook number is 1 bit, and the bit reduction effect from code conversion cannot be obtained.

[0149] Furthermore, Threshold3 may be set experimentally or empirically, for example. For instance, the more bits available for SV8 encoding, the more likely it is that the number of unused bits will increase; therefore, Threshold3 may be set to avoid an increase in the number of unused bits. However, in cases where the number of unused bits is large, for example, when the data to be encoded is silent or otherwise low in information, there is no problem with the quality of the encoding even if bit reduction is not achieved. For this reason, Threshold3 may be set to a relatively large number of bits empirically, for example.

[0150] In Figure 15, the encoding device 300 may, for example, determine the encoding order of the subvectors in Group 2 as SV4, SV5, SV6, SV7, SV8, SV3 (S408). In other words, the encoding device 300 may set the subvector SVd=SV3 to be converted as the last subvector in Group 2.

[0151] Next, the encoding device 300 may encode the subvectors one by one in the order of SV4, SV5, SV6, SV7, and SV8, for example, and output encoded information (for example, a codebook instruction value and a code vector index) (S409). The encoding device 300 may also determine, for example, the number of bits used for encoding the subvectors and determine (in other words, update) the number of bits available for encoding the remaining subvectors of Group 2 (S409).

[0152] Next, the encoding device 300 determines, for example, whether the number of bits available for encoding the remaining sub-vectors of Group 2 is greater than or equal to Threshold 1 (S410).

[0153] If the number of bits available for encoding Group 2 is less than Threshold 1 (S410: No), the encoding device 300 may, for example, proceed to the process in S404 in Figure 14, change the encoding order of the remaining sub-vectors in Group 2 to SV3, then the other remaining sub-vectors, and perform the encoding processes in S404 to S407 in Figure 14. These processes are performed, for example, because the number of bits available for encoding Group 2 is not sufficient to encode all the remaining sub-vectors, so the encoding order of SV3 is changed back to encode SV3 first.

[0154] On the other hand, if the number of bits available for encoding Group 2 is greater than or equal to Threshold 1 (S410: Yes), the encoding device 300 determines, for example, whether the next sub-vector to be encoded is SV3 (S411). If the next sub-vector to be encoded is not SV3 (the sub-vector to be converted) (S411: No), the encoding device 300 may proceed to process S409, for example, and encode the next sub-vector. The encoding device 300 may repeat processes S409 to S411, for example, to encode SV4, SV5, SV6, SV7, and SV8 in order.

[0155] If the sub-vector to be encoded next is SV3 (S411: Yes), the encoding device 300 proceeds to process S412, for example, as shown in Figure 16.

[0156] In Figure 16, the encoding device 300 may, for example, determine whether the number of bits available for encoding SV3 (=SVd) exceeds Threshold 3 (S412).

[0157] If the number of bits available for encoding SV3 exceeds Threshold3 (S412: Yes), the encoding device 300 may, for example, encode SV3 based on AVQ encoding without performing code conversion, output encoding information (e.g., codebook indicator value and code vector index), and terminate the code conversion process (S413). In this way, if the number of bits available for encoding SV3 exceeds Threshold3, the number of unused bits will increase, and the number of bits in the unused bit indicator value will tend to increase, so the encoding device 300 may encode the codebook number.

[0158] On the other hand, if the number of bits available for encoding SV3 is less than or equal to Threshold 3 (S412: No), the encoding device 300 may, for example, encode the number of unused bits instead of encoding the codebook number of SV3, output the encoded information (e.g., the codebook instruction value and the code vector index), and terminate the code conversion process (S414).

[0159] Next, other examples of operation in the encoding device 300 will be described.

[0160] Figure 17 is a flowchart illustrating another example of operation in the encoding device 300. As an example, Figure 17 shows an example of operation in the encoding device 300 when the position of the sub-vector to be converted is the sub-vector SV8 (for example, the last sub-vector) with the highest position in the frequency domain.

[0161] Note that the example operation shown in Figure 17 may be the same as the example operation shown in Figure 14, for example. Figure 14 shows an example operation in which, when the position of the sub-vector selected as the target of code conversion is SV3, and code conversion of the encoded information of SV3 is not possible (for example, when the encoding order of the sub-vectors cannot be changed to apply encoding of unused bits to the encoding of SV3, and the encoding of SV3 cannot be performed last), the system switches SV8 to the sub-vector to be converted instead of SV3 and determines whether or not encoding of unused bits can be applied to the encoding of SV8 (for example, whether encoding of unused bits results in fewer encoded bits than encoding the codebook number).

[0162] In Figure 17, the encoding device 300 encodes SV1 to SV7 and outputs encoded information (e.g., codebook instruction values ​​and code vector indexes) (S501). The encoding device 300 may also determine the number of bits used for encoding SV1 to SV7 and the number of bits available for encoding SV8 (S501).

[0163] Next, the encoding device 300 may determine, for example, whether the number of bits available for encoding SV8 is less than threshold 2 or greater than threshold 3 (S502).

[0164] If the number of bits available for encoding SV8 is less than Threshold 2 or greater than Threshold 3 (S502: Yes), the encoding device 300 may encode SV8 using, for example, the AVQ encoding method (encoding the codebook number), output encoded information (for example, the codebook instruction value and the code vector index), and terminate the code conversion process (S503). In this way, if the number of bits available for encoding SV8 is less than Threshold 2 or greater than Threshold 3, the encoding device 300 may encode the codebook number without encoding the unused bits, since the number of encoded bits is not reduced by encoding the unused bits.

[0165] On the other hand, if the number of bits available for encoding SV8 is greater than or equal to Threshold 2 and does not exceed Threshold 3 (S502: No), the encoding device 300 may encode the number of unused bits instead of encoding the codebook number, output the encoded information (e.g., an unused bit number indicator and a code vector index), and terminate the code conversion process (S504).

[0166] In Figure 17, Threshold2 and Threshold3 may be set to values ​​such as those set in Figure 14.

[0167] Next, we will explain an example of the encoding process for unused bits in the process of S407 in Figure 14, the process of S414 in Figure 16, or the process of S504 in Figure 17.

[0168] Figure 18 shows a flowchart of an example of encoding processing for unused bits.

[0169] In Figure 18, the encoding device 300 may, for example, determine whether the subvector to be transcoded is SV8 (S601). If the subvector to be transcoded is SV8 (S601: Yes), the encoding device 300 may, for example, calculate the remaining bits (hereinafter referred to as "RB") (S602). The remaining bits RB may be calculated, for example, by (number of bits available for encoding the subvector to be transcoded) % 5. Here, "%" represents modulo operation. After calculating the remaining bits RB, the encoding device 300 proceeds to, for example, the process in S606.

[0170] On the other hand, if the subvector to be transcoded is not SV8 (for example, SV3) (S601: No), the encoding order of the subvector is changed, and the number of bits used to encode the subvector after the encoding order change may differ from the number of bits used when encoding without changing the encoding order (for example, AVQ encoding). In other words, changing the encoding order may result in bits being used unnecessarily (for example, wasted bits). For example, wasted bits may occur if the number of bits available for encoding becomes zero by the time an intermediate subvector is encoded, and subsequent subvectors (for example, consecutive subvectors including SV8) are not encoded and are forced to become zero vectors (in other words, encoded with 0 bits).

[0171] In this embodiment, if the subvector to be coded is not SV8 (S601: No), the encoding device 300 counts the number of consecutive subvectors whose quantization parameter is a null vector (also called an all-zero vector or zero vector) in the subvector to be AVQ coded (hereinafter referred to as "NCNV"), and checks whether SV8 (for example, the last subvector) is included among the null subvectors (S603). In other words, NCNV may represent the number of consecutive subvectors that are null vectors and contain SV8.

[0172] Furthermore, the encoding device 300 may calculate, for example, the remaining number of bits RB (S603). The remaining number of bits RB may be calculated, for example, by (the number of bits available for encoding the subvector to be converted) % 5. Here, "%" represents the modulo operation.

[0173] Next, the encoding device 300 may determine, for example, whether there is a possibility of wasted bits occurring due to a change in the coding order of the subvectors (S604). The encoding device 300 may determine, for example, whether there is a possibility of wasted bits occurring based on NCNV and RB (an example of such determination will be described later). If there is no possibility of wasted bits occurring (S604: No), the encoding device 300 proceeds to the process in S606, for example.

[0174] On the other hand, if there is a possibility of wasted bits occurring (S604: Yes), the encoding device 300 may, for example, update the number of bits available for encoding the sub-vector to be converted (e.g., SVd) (S605). For example, the encoding device 300 may, depending on the conditions, add (5-RB) bits, NCNV bits, or (NCNV+1) bits to the number of bits available for encoding the sub-vector to be converted. In other words, the encoding device 300 may, for example, increase the number of bits available for encoding the sub-vector to be converted by the number of wasted bits (e.g., the number of bits that may be used unnecessarily). The encoding device 300 may also, for example, update the remaining number of bits RB to 0 (S605). An example of the process for updating the number of bits available for encoding the sub-vector to be converted will be described later.

[0175] Note that the value "5" used to calculate the number of bits to be added (e.g., 5-RB) and the remaining number of bits RB is just an example. It may be determined based on, for example, the ratio of the number of bits allocated to the codebook to the total number of bits used to encode multiple sub-vectors (e.g., 1 / 5), or on what multiple the number of bits used to encode the sub-vectors is.

[0176] Next, the encoding device 300 determines, for example, whether the remaining number of bits RB is 4 (S606). If RB is not 4 (S606: No), the encoding device 300 may proceed to process S608, for example, to determine the number of unused bits.

[0177] If RB=4 (S606:Yes), the encoding device 300 may increase the number of bits available for encoding the subvector to be converted by 1 bit, for example (S607).

[0178] Next, the encoding device 300 may determine, for example, the number of unused bits (S608). For example, the encoding device 300 may calculate the number of unused bits as the difference between the number of bits available for the subvector to be converted and the number of bits used for encoding the subvector to be converted (for example, the number of bits that will be unused).

[0179] The encoding device 300 may, for example, encode the calculated number of unused bits (S609).

[0180] Next, we will explain an example of how to determine whether or not wasted bits may occur due to a change in the coding order of the subvectors in the processing of S604 in Figure 18.

[0181] For example, the encoding device 300 may determine that there is a possibility of wasted bits occurring if both of the following conditions 1 and 2 are met. In other words, the encoding device 300 may determine that there is no possibility of wasted bits occurring if either condition 1 or condition 2 is not met. Condition 1: The quantized SV8 (or the decoded SV8) is a null vector. Condition 2: RB+NCNV≧4

[0182] For example, regarding condition 1, if SV8 is not a null vector, then in AVQ coding, all of the sub-vectors (e.g., SV1 to SV8) are coded, so the number of bits used for coding does not change whether the coding order of the sub-vectors is changed or not. Therefore, if SV8 is not a null vector, no wasted bits can occur. In other words, if SV8 is a null vector, there is a possibility of wasted bits occurring.

[0183] Note that condition 1 may be set to, for example, "NCNV>0". If NCNV>0 is satisfied, then at least SV8 is a null vector.

[0184] Furthermore, for example, regarding condition 2, wasted bits occur only when, for example, the number of unused bits (for example, the number of bits that become unused in AVQ encoding) is zero.

[0185] Here, for example, the remaining bits RB correspond to the number of bits that are left over because the number of bits available for encoding SVd is reduced (or becomes insufficient) due to the use of bits unnecessarily as a result of changing the encoding order. Also, for example, the number of bits NCNV corresponds to the number of bits that may be unnecessarily used (wasted bits) as a result of changing the encoding order.

[0186] Therefore, if wasted bits occur, RB+NCNV can be a value of 5 or greater. Note that, for example, if the number of bits used for encoding the subvector is a multiple of 5 (e.g., 5n), the last bit (stop bit) of the codebook instruction may be omitted, so RB+NCNV can be a value of 4 or greater. Thus, in condition 2, if the number of unused bits is zero, RB+NCNV can be 4 or greater. In other words, if RB+NCNV is 4 or greater, there is a possibility that there are zero unused bits, and wasted bits may occur. On the other hand, if RB+NCNV is less than 4, there are unused bits, so wasted bits cannot occur.

[0187] Condition 2 may be set as follows: Condition 2': Let RB be the number of remaining bits, NCNVV be the number of consecutive null vector subvectors (including SV8), and ECBI be the estimated codebook number. Then (Number of bits available for SVd) + NCNVV ≥ 5 × ECBI + 4

[0188] Here, ECBI = (INT)(number of bits available for SVd / 5) is also acceptable. Furthermore, the function (INT)(X) can be any function that returns the value of X with the decimal part truncated.

[0189] Next, we will describe an example of the process of updating the number of bits available for encoding the subvector to be converted in the encoding device 300.

[0190] Figure 19 shows a flowchart of an example of a process for updating the number of bits available for encoding the subvector to be converted in the encoding device 300.

[0191] If the encoding device 300 determines, for example, that there is a possibility of wasted bits occurring (S604: Yes in Figure 18), it may add NCNV bits, (NCNV+1) bits, or (5-RB) bits as wasted bits to the number of bits available for encoding the subvector to be converted, depending on the conditions relating to the remaining number of bits (for example, the remainder of 5 relative to the number of bits available for encoding the subvector to be converted) RB and the number of consecutive subvectors NCNV whose quantization parameter is a null vector.

[0192] For example, if (RB+NCNV)%5=0 (S641:Yes), the encoding device 300 may set the number of bits to be added (hereinafter referred to as "W") to the NCNV bits (S642).

[0193] Furthermore, for example, the encoding device 300 may set the number of bits to be added W to (NCNV+1) bits when (RB+NCNV)%5=4 (S641:No, and S643:Yes) (S644).

[0194] Furthermore, for example, the encoding device 300 may set the number of bits to be added W to (5-RB) bits if (RB+NCNV)%5=0 and (RB+NCNV)%5=4 (S641:No, and S643:No) (S645).

[0195] The encoding device 300 may update the number of bits available for encoding the subvector to be converted by adding the number of bits W to be added (S646). As a result of the process in S646, the number of bits available for encoding the subvector to be converted is set to a multiple of 5. In this case, the remaining number of bits RB is 0, so the encoding device 300 may update the remaining number of bits RB to 0.

[0196] Here, as an example, the number of bits used for encoding a subvector is a multiple of 5. Also, for example, in a subvector being AVQ encoded, the number of consecutive subvectors whose quantization parameter is a null vector, NCNV, can be 5 or greater. For example, among SV1 to SV8, if the subvector being coded is SV3, NCNV can be 5 (corresponding to, for example, SV4 to SV8).

[0197] If NCNV is 5 or greater, for example, due to wasted bits, the number of bits available for encoding the subvector to be transcoded may be reduced by 5 bits or more from the original number of bits (hereinafter referred to as "5n" bits) (where n is an integer greater than or equal to 2). In this case, when updating the number of bits available for the subvector to be transcoded, simply adding (5-RB) bits may result in setting it to a number of bits less than the original number of bits (5n bits) (for example, 5(n-1) bits).

[0198] In contrast, as shown in Figure 19, when (RB+NCNV)%5=0, the encoding device 300 adds the NCNV bits to the number of bits available for encoding the subvector to be converted. This allows the encoding device 300 to set the number of bits available for encoding the subvector to be converted to an appropriate value (e.g., 5n bits), even when NCNV is 5 or greater (e.g., RB+NCNV=5 or 10), taking the NCNV bits into consideration.

[0199] Furthermore, as mentioned above, while the number of bits used for encoding a subvector is a multiple of 5, there are cases where, for example, the last bit (stop bit) of the codebook instruction value can be omitted. In this case, (RB+NCNV)%5 can be 4. As shown in Figure 19, when (RB+NCNV)%5=4, the encoding device 300 adds (NCNV+1) bits to the number of bits available for encoding the subvector to be converted. This allows the encoding device 300 to set the number of bits available for encoding the subvector to be converted to an appropriate value (e.g., 5n bits), even when NCNV is 5 or greater, taking the stop bit into consideration.

[0200] Note that while Figure 19 illustrates an example based on the result of (RB+NCNV)%5 in the S641 process, the method is not limited to this. For example, the encoding device 300 may set the number of bits to be added W to NCNV if NCNV is 5 or greater and (RB+NCNV)%5=4, and set the number of bits to be added W to (NCNV+1) bits if (RB+NCNV)%5=4. Alternatively, the encoding device 300 may set the number of bits to be added W to (5-RB) bits if NCNV is less than 5. The decoding device 400 (for example, the process in Figure 28 described later) may also perform a similar process.

[0201] Furthermore, while Figure 19 illustrates the case where the processing in S641 is based on a remainder of 5 for (RB+NCNV), the device is not limited to this. For example, the encoding device 300 may set the number of bits to be added W based on a remainder of 10 for (RB+NCNV). Even in this case, the encoding device 300 can appropriately set the number of bits available for encoding the subvector to be converted (e.g., 5n bits) when NCNV is 5 or greater. Also, for example, if the number of subvectors set in AVQ encoding is greater than 8, RB+NCNV may be 15 or greater. In this case, the encoding device 300 may set the number of bits to be added W based on a remainder of 15 or greater that is a multiple of 5 for (RB+NCNV). The decoding device 400 (for example, the processing in Figure 28 described later) may also perform a similar process.

[0202] Figure 20 shows another flowchart of an example of a process in which the number of bits available for encoding the subvector to be converted in the encoding device 300 is updated.

[0203] If the encoding device 300 determines, for example, that there is a possibility of wasted bits occurring (S604: Yes in Figure 18), it may add NCNV bits or (NCNV+1) bits as wasted bits to the number of bits available for encoding the subvector to be converted, depending on the conditions relating to the number of remaining bits RB and the number of consecutive subvectors NCNV whose quantization parameter is a null vector.

[0204] In other words, in Figure 20, unlike in Figure 19, the encoding device 300 does not add (5-RB) bits when updating the number of bits available for encoding the sub-vector to be converted.

[0205] For example, the encoding device 300 may set the number of bits to be added W to (NCNV+1) bits if (RB+NCNV)%5=4 (S651:Yes) (S652), and may set the number of bits to be added W to NCNV bits if (RB+NCNV)%5=4 (S651:No) (S653).

[0206] The encoding device 300 may update the number of bits available for encoding the subvector to be converted by adding the number of added bits W to the number of bits available for encoding the subvector to be converted (S654).

[0207] Furthermore, the encoding device 300 may recalculate the remaining bits RB for the number of bits available for encoding the subvector to be converted after adding (NCNV+1) bits or NCNV bits (S654). Due to the addition of NCNV bits, the recalculated remaining bits RB may be RB > 0.

[0208] The encoding device 300 determines, for example, whether the recalculated remaining bits RB > 0 (S655). In other words, the encoding device 300 determines whether the recalculated remaining bits RB (or the updated number of available bits) is true.

[0209] If RB > 0 (S655: No), the encoding device 300 may terminate the process shown in Figure 20.

[0210] On the other hand, if RB > 0 (S655: Yes), the encoding device 300 may update the number of bits available for encoding the subvector to be converted by subtracting the remaining bits RB from the number of bits available for encoding the subvector to be converted after adding (NCNV+1) bits or NCNV bits (S656). Alternatively, the encoding device 300 may update the remaining bits RB to 0.

[0211] In Figure 20, through the processing in S652 and S653, the encoding device 300 can appropriately set the number of bits available for encoding the subvector to be converted, even when NCNV is 5 or greater. Furthermore, through the processing in S656, the number of bits available for encoding the subvector to be converted can be adjusted to a multiple of 5.

[0212] As shown in Figure 19 or Figure 20, the encoding device 300 sets (for example, updates) the number of bits available for encoding the subvector to be converted, depending on the conditions relating to the remaining number of bits RB and the number of consecutive subvectors NCNV whose quantization parameter is a null vector. This allows the encoding device 300 to set an appropriate number of bits available for encoding the subvector to be converted, even when NCNV is 5 or greater.

[0213] Furthermore, while the decoding device 400, described later, cannot identify the number of wasted bits, it can identify RB and NCNV. In this embodiment, for example, the encoding device 300 (and the decoding device 400, described later) can appropriately set the number of bits available for encoding the sub-vector to be converted using RB and NCNV, which are parameters that can be identified in the decoding device 400.

[0214] Next, an example of the operation of the AVQ decoding unit according to this embodiment will be described.

[0215] Figure 21 is a block diagram showing an example configuration of an AVQ decoding unit (hereinafter referred to as the "decoding device") 400 according to one embodiment of the present disclosure. In Figure 21, components that perform the same processing as the decoding device 200 shown in Figure 11 are denoted by the same reference numerals.

[0216] In Figure 21, the sub-vector identification unit 401 may output information regarding the position of a predetermined sub-vector (for example, called a target sub-vector, target sub-vector, or fixed sub-vector) to the code conversion unit 203. The predetermined sub-vector may be any of the eight sub-vectors (for example, SV1 to SV8). For example, the following will describe the case where, among the eight sub-vectors SV1 to SV8, the predetermined sub-vector is the third sub-vector from the lowest frequency (for example, SV3) or the last sub-vector (for example, SV8).

[0217] Furthermore, the sub-vector identification unit 401 does not need to perform any signal processing to identify (specify) a sub-vector at a predetermined specific position, and for example, it does not need to be explicitly provided as a component. In Figure 21, as an example, the sub-vector identification unit 401 may be a memory that holds the predetermined position of a sub-vector.

[0218] In the decoding device 400 shown in Figure 21, the operation of components different from the sub-vector identification unit 401 may be the same as the operation of the decoding device 200 shown in Figure 11.

[0219] Next, we will describe an example of operation in the decoding device 400 that differs from Embodiment 2.

[0220] The method for selecting the sub-vectors to be converted can be the same as the method shown in Figure 5. In this embodiment, the code conversion unit 203 may use pre-identified sub-vector position information instead of main sub-vector information. Also, the sub-vector selection process may be performed by the sub-vector identification unit 401 instead of the code conversion unit 203. In this case, AVQ bit-budget information may be input to the sub-vector identification unit 401, and information regarding the selected sub-vectors may be input to the code conversion unit 203 as sub-vector position information.

[0221] Figures 22 to 25 show flowcharts illustrating an example of operation in the decoding device 400. As an example, Figures 22 to 25 show an example of operation in the decoding device 400 when the position of the sub-vector to be coded is the third sub-vector SV3 from the lowest in the frequency domain.

[0222] In the explanation of Figures 22 to 25, the multiple subvectors SV1 to SV8, and the thresholds Threshhold1, Threshhold2, and Threshhold3 can be the same as those in Figures 13 to 16.

[0223] In Figure 22, the decoding device 400 may, for example, decode the sub-vectors of Group 1 (e.g., SV1 and SV2) and output decoded information (e.g., codebook number and code vector index) (S701). Alternatively, the decoding device 400 may, for example, calculate the number of bits in the bit sequence used to decode the sub-vectors of Group 1 (e.g., SV1 and SV2), subtract the number of bits used to decode SV1 and SV2 from the number of bits allocated to the entire AVQ (e.g., AVQ bit-budget) to calculate the number of bits remaining as the bit sequence of the sub-vectors of Group 2 (remaining bits) (S701).

[0224] Next, the decoding device 400 determines, for example, whether the number of bits remaining as the bit sequence of the subvector of Group 2 is greater than or equal to the threshold Threshold 1 (S702). For example, if the number of bits remaining as the bit sequence of the subvector of Group 2 is less than the threshold Threshold 1 (S702: No), the decoding device 400 proceeds to the process shown in Figure 23 (for example, the process in S703), and if the number of bits remaining as the bit sequence of the subvector of Group 2 is greater than or equal to Threshold 1 (S702: Yes), the decoding device 400 proceeds to the process shown in Figure 24 (for example, the process in S707).

[0225] In Figure 23, the decoding device 400 determines (or interprets) the coding order of the subvectors in Group 2 as SV3, SV4, SV5, SV6, SV7, and SV8, decodes SV3 to SV7 respectively, and outputs the decoding results (codebook number and code vector index) (S703). The decoding device 400 may also calculate the number of bits in the bit sequence used for decoding SV3 to SV7 and the number of bits remaining as the bit sequence (encoded code) for SV8 (S703).

[0226] Thus, the decoding device 400 may determine, for example, that if the number of bits remaining as the bit sequence of the subvector of Group 2 is less than Threshold 1 (S702: No), then the encoding device 100 has not performed code conversion (in other words, reversal of the encoding order) on the subvector SV3 that is subject to code conversion.

[0227] Next, the decoding device 400 may determine, for example, whether the number of bits remaining as the bit sequence of SV8 is less than threshold 2 or greater than threshold 3 (S704).

[0228] If the number of bits remaining in the bit sequence of SV8 is less than Threshold2 or greater than Threshold3 (S704: Yes), the decoding device 400 may determine, for example, that SV8 is encoded by the AVQ encoding method (the method of encoding the codebook number), decode SV8, output the decoded information (for example, the codebook number and the code vector index), and terminate the decoding process (S705).

[0229] On the other hand, if the number of bits remaining in the SV8 bit sequence is greater than or equal to Threshold 2 and does not exceed Threshold 3 (S704: No), the decoding device 400 determines, for example, that the number of unused bits is encoded instead of the SV8 codebook number, and decodes the number of unused bits and the code vector index (S706). The decoding device 400 may also determine the SV8 codebook number based, for example, the number of bits remaining in the SV8 bit sequence and the decoded number of unused bits (S706). An example of how to determine the codebook number will be described later. The decoding device 400 may output the determined SV8 decoding information (for example, the codebook number and the code vector index) and terminate the decoding process.

[0230] In Figure 24, the decoding device 400 may, for example, determine (or interpret) the coding order of the subvectors in Group 2 as SV4, SV5, SV6, SV7, SV8, SV3 (S707). In other words, the decoding device 400 may set the subvector SVd=SV3 to be the last subvector in Group 2.

[0231] Next, the decoding device 400 may decode the subvectors one by one in the order of SV4, SV5, SV6, SV7, and SV8, and output the decoded information (for example, the codebook number and the code vector index) (S708). The decoding device 400 may also determine, for example, the number of bits in the bit sequence used for decoding the subvectors and determine the number of bits in the bit sequence of the remaining subvectors of Group 2 (S708).

[0232] Next, the decoding device 400 determines, for example, whether the number of bits in the bit sequence of the remaining sub-vectors of Group 2 is greater than or equal to Threshold 1 (S709).

[0233] If the number of bits in the bit sequence of the remaining sub-vectors in Group 2 is less than Threshold 1 (S709: No), the decoder 400 may, for example, proceed to the process in S703 in Figure 23, change the encoding order of the remaining sub-vectors in Group 2 to SV3, then the other remaining sub-vectors, and perform the decoding processes in S703 to S706 in Figure 23.

[0234] On the other hand, if the number of bits in the bit sequence of the remaining sub-vectors of Group 2 is greater than or equal to Threshold 1 (S709: Yes), the decoding device 400 determines, for example, whether the next sub-vector to be decoded is SV3 (S710). If the next sub-vector to be decoded is not SV3 (the sub-vector to be converted to code) (S710: No), the decoding device 400 may proceed to process S708, for example, and decode the next sub-vector. The decoding device 400 may repeat processes S708 to S710, for example, to decode SV4, SV5, SV6, SV7, and SV8 in order.

[0235] If the sub-vector to be decoded next is SV3 (S710: Yes), the decoding device 400 proceeds to process S711, for example, as shown in Figure 25.

[0236] In Figure 25, the decoding device 400 may, for example, determine whether the number of bits remaining as the bit sequence of SV3 (=SVd) exceeds Threshold3 (S711).

[0237] If the number of bits remaining in the bit sequence of SV3 exceeds Threshold3 (S711: Yes), the decoding device 400 may, for example, decode SV3 based on the AVQ encoding method without performing code conversion, output decoded information (e.g., codebook number and code vector index), and terminate the decoding process (S712).

[0238] On the other hand, if the number of bits remaining in the bit sequence of SV3 is less than or equal to Threshold3 (S711: No), the decoding device 400 may, for example, decode an unused bit number indicator instead of the codebook number of SV3, and also decode the code vector index (S713). Alternatively, the decoding device 400 may determine the codebook number of SV3 based on the number of bits remaining in the bit sequence of SV3 and the decoded unused bit number information (S713). The decoding device 400 may, for example, output the codebook number and code vector index of SV3 and terminate the decoding process. An example of how to determine the codebook number will be described later.

[0239] Next, other examples of operation in the decoding device 400 will be described.

[0240] Figure 26 is a flowchart illustrating another example of operation in the decoding device 400. As an example, Figure 26 shows an example of operation in the decoding device 400 when the position of the sub-vector to be coded is the sub-vector SV8 with the highest position in the frequency domain (for example, the last sub-vector).

[0241] For example, the process in Figure 26 is an example of a decoding process corresponding to the encoding process shown in Figure 17. Furthermore, the example operation shown in Figure 26 may be the same as the example operation shown in Figure 23.

[0242] In Figure 23, the decoding device 400 decodes SV1 to SV7 and outputs decoded information (e.g., codebook number and code vector index) (S801). The decoding device 400 may also determine the number of bits in the bit sequence used for decoding SV1 to SV7 and the number of bits remaining as the bit sequence for SV8 (S801).

[0243] Next, the decoding device 400 may determine, for example, whether the number of bits remaining as the bit sequence of SV8 is less than threshold 2 or greater than threshold 3 (S802).

[0244] If the number of bits remaining in the bit sequence of SV8 is less than Threshold2 or greater than Threshold3 (S802: Yes), the decoding device 400 may determine, for example, that SV8 is encoded by the AVQ encoding method (the method of encoding the codebook number), decode SV8, output the decoded information (for example, the codebook number and the code vector index), and terminate the decoding process (S803).

[0245] On the other hand, if the number of bits remaining in the SV8 bit sequence is greater than or equal to Threshold 2 and does not exceed Threshold 3 (S802: No), the decoding device 400 determines, for example, that the number of unused bits is encoded instead of the SV8 codebook number, and decodes the number of unused bits and the code vector index (S804). The decoding device 400 may also determine the SV8 codebook number based, for example, the number of bits remaining in the SV8 bit sequence and the decoded number of unused bits (S804). An example of how to determine the codebook number will be described later. The decoding device 400 may output the determined SV8 decoding information (for example, the codebook number and the code vector index) and terminate the decoding process.

[0246] Next, we will explain an example of the SVd (for example, SV3 or SV8) decoding process in the S706 process in Figure 23, the S713 process in Figure 25, or the S804 process in Figure 26.

[0247] Figure 27 shows a flowchart of an example of the SVd decoding process. The process shown in Figure 27 may correspond to, for example, the encoding process shown in Figure 18. The process shown in Figure 27 includes, for example, a step to determine the SVd codebook number based on the number of bits remaining and unused bits in the SVd code bit sequence.

[0248] In Figure 27, the decoder 400 may, for example, determine whether the subvector to be coded is SV8 (S901). If the subvector to be coded is SV8 (S901: Yes), the decoder 400 may, for example, calculate the remaining bits RB (S902). The remaining bits RB may be calculated, for example, by (number of bits available for coding the subvector to be coded) % 5. Here, "%" represents modulo operation. After calculating the remaining bits RB, the decoder 400 proceeds to, for example, the process in S906.

[0249] On the other hand, if the subvector to be coded is not SV8 (for example, SV3 in this case) (S901: No), the decoder 400 may, for example, count the number of consecutive subvectors (including SV8) in the decoded subvector whose quantization parameter is a null vector (zero vector) (for example, NCNV) (S903).

[0250] Furthermore, the decoding device 400 may calculate, for example, the number of remaining bits (e.g., RB) (S903). The number of remaining bits RB may be calculated, for example, by (the number of bits remaining as the sign bit sequence of the subvector to be converted (e.g., SV3)) % 5. Here, "%" represents the modulo operation.

[0251] Next, the decoder 400 may, for example, determine whether to update the number of bits remaining in the bit sequence of SVd (e.g., SV3) based on NCNV and RB (S904). In other words, the decoder 400 may determine, for example, whether there is a possibility that wasted bits have occurred due to a change in the coding order of the subvectors. The determination method in S904 may be the same as the determination method in the encoder 300.

[0252] If there is no possibility of wasted bits occurring (S904: No), the decoding device 400 proceeds to process S906, for example.

[0253] On the other hand, if there is a possibility that wasted bits have occurred (S904: Yes), the decoder 400 may, for example, update the number of bits remaining in the bit sequence of the sub-vector to be coded (e.g., SVd) (S905). For example, the decoder 400 may, depending on the conditions, add (5-RB) bits, NCNV bits, or (NCNV+1) bits to the number of bits remaining in the bit sequence of the sub-vector to be coded. In other words, the decoder 400 may, for example, increase the number of bits remaining in the bit sequence of SVd by the number of wasted bits (e.g., the number of bits that may be used unnecessarily). The decoder 400 may also, for example, update the remaining number of bits RB to 0 (S905). An example of the process of updating the number of bits remaining in the bit sequence of the sub-vector to be coded will be described later.

[0254] Next, the decoding device 400 determines, for example, whether the remaining number of bits RB is 4 (S906). If RB is not 4 (S906: No), the decoding device 400 may proceed to process S908, for example, and determine the code length of the SVd obtained by AVQ coding based on the number of unused bits (an example will be described later).

[0255] If RB=4 (S906:Yes), the decoder 400 may increase the number of bits remaining as the bit sequence of the subvector to be converted by 1 bit, for example (S907).

[0256] Next, the decoding device 400 may determine the code length of SVd obtained by AVQ encoding, for example, based on unused bit number information (S908). For example, the decoding device 400 may calculate the code length of SVd (e.g., the number of bits of a code (bit string) obtained by AVQ encoding) by subtracting the number of decoded unused bits from the number of bits remaining as the bit string of the subvector to be code-converted.

[0257] As an example, when the association between the number of unused bits and a code (unused bit number indicator) is specified as shown in FIG. 10, the code length of SV8 may be determined as follows. Code length of SV8 =(INT(Number of bits remaining as encoded bit string of SV8−(“Number of bits” in FIG. 10−1)×5) / 5)+1)×5

[0258] For example, when the number of bits remaining as the encoded bit string of SV8=13 bits, and the code of the number of unused bits=10, the code length of SV8 is (INT((13−5) / 5)+1)×5=10 bits. Note that when the code of the number of unused bits=10, the decoded number of unused bits is any one of 1 to 5 bits based on FIG. 10; however, when the number of bits remaining as the encoded bit string of SV8 is 13 bits, the decoded number of unused bits may be specified as 3. This is because the code length of the subvector is set to a multiple of 5.

[0259] Next, the decoding device 400 may decode the codebook number and code vector index of SVd based on the code length of SVd, for example (S909). As an example, when the code length of SV8=10 bits, the decoding device 400 may decode the codebook number=2 based on FIG. 1.

[0260] Next, an example of processing for updating the number of bits remaining as the bit string of the subvector to be code-converted in the decoding device 400 will be described.

[0261] FIG. 28 is a flowchart illustrating an example of processing for updating the number of bits remaining as a bit string of a subvector to be code-converted in decoding device 400. The processing of decoding device 400 illustrated in FIG. 28 corresponds to, for example, the processing of encoding device 300 illustrated in FIG. 19.

[0262] When it is determined that there is a possibility that wasted bits have occurred, for example (S904: Yes in FIG. 27), decoding device 400 obtains a remainder of 5 with respect to the number of remaining bits (for example, the number of bits remaining as a bit string of a subvector to be code-converted) RB, and the consecutive number NCNV of subvectors whose quantization parameter is a null vector. Depending on the condition related to the above, NCNV bits, (NCNV+1) bits, or (5-RB) bits may be added as the number of wasted bits to the number of bits remaining as a bit string of the subvector to be code-converted.

[0263] For example, when (RB+NCNV)%5=0 (S941: Yes), decoding device 400 may set the number of additional bits (hereinafter referred to as "W") to NCNV bits (S942).

[0264] Further, for example, when (RB+NCNV)%5=4 (S941: No, and S943: Yes), decoding device 400 may set the number of additional bits W to (NCNV+1) bits (S944).

[0265] Further, for example, when (RB+NCNV)%5 is not 0 and not (RB+NCNV)%5=4 (S941: No, and S943: No), decoding device 400 may set the number of additional bits W to (5-RB) bits (S945).

[0266] The decoding device 400 may, for example, update the number of bits remaining in the bit sequence of the subvector to be coded by adding the number of added bits W to the number of bits remaining in the bit sequence of the subvector to be coded (S946). As a result of the process in S946, the number of bits remaining in the bit sequence of the subvector to be coded is set to a multiple of 5. In this case, the remaining number of bits RB is 0, so the decoding device 400 may, for example, update the remaining number of bits RB to 0.

[0267] Figure 29 shows another flowchart of an example of the process in the decoding device 400 for updating the number of bits remaining in the bit sequence of the subvector to be converted. The processing of the decoding device 400 shown in Figure 29 corresponds, for example, to the processing of the encoding device 300 shown in Figure 20.

[0268] If the decoding device 400 determines, for example, that there is a possibility of wasted bits (S904: Yes in Figure 27), it may add NCNV bits or (NCNV+1) bits as wasted bits to the number of bits remaining as the bit sequence of the subvector to be coded, depending on the conditions relating to the remaining number of bits RB and the number of consecutive subvectors NCNV whose quantization parameter is a null vector.

[0269] In other words, in Figure 29, unlike in Figure 28, the decoding device 400 does not add (5-RB) bits when updating the number of bits remaining in the bit sequence of the subvector to be converted.

[0270] For example, the decoder 400 may set the number of bits to be added W to (NCNV+1) bits if (RB+NCNV)%5=4 (S951:Yes) (S952), and may set the number of bits to be added W to NCNV bits if (RB+NCNV)%5=4 (S951:No) (S953).

[0271] The decoding device 400 may, for example, update the number of bits remaining in the bit sequence of the subvector to be coded by adding the number of added bits W to the number of bits remaining in the bit sequence of the subvector to be coded (S954).

[0272] Furthermore, the decoding device 400 may recalculate the number of remaining bits RB for the bit sequence of the subvector to be converted after adding, for example, (NCNV+1) bits or NCNV bits (S954). Due to the addition of NCNV bits, the recalculated number of remaining bits RB may be RB>0.

[0273] The decoding device 400 determines, for example, whether the recalculated remaining bits RB > 0 (S955). In other words, the decoding device 400 determines whether the recalculated remaining bits RB (or the updated number of available bits) is true.

[0274] If RB > 0 (S955: No), the decryption device 400 may terminate the process shown in Figure 29.

[0275] On the other hand, if RB > 0 (S955: Yes), the decoder 400 may update the number of bits remaining in the bit sequence of the subvector to be coded by subtracting the number of remaining bits RB from the number of bits remaining in the bit sequence of the subvector to be coded after adding (NCNV+1) bits or the NCNV bit (S956). Alternatively, the decoder 400 may update the number of remaining bits RB to 0.

[0276] As shown in Figure 28 or Figure 29, the decoder 400 sets (for example, updates) the number of bits remaining in the bit sequence of the subvector to be coded, depending on the conditions relating to the remaining number of bits RB and the number of consecutive subvectors NCNV whose quantization parameter is a null vector. This allows the decoder 400 to set the number of bits remaining in the bit sequence of the subvector to be coded to an appropriate value, even when NCNV is 5 or greater.

[0277] Furthermore, the decoding device 400 can appropriately set the number of bits remaining as the bit sequence of the subvector to be coded, using RB and NCNV, which are parameters that can be identified in the decoding device 400, without having to identify the wasted bits.

[0278] The decoding device 400 may, for example, decode the codebook number and code vector index for the subvector to be coded based on the setting of the number of bits remaining as the bit sequence of the subvector to be coded, as described above, and perform AVQ decoding (e.g., inverse vector quantization) based on the decoding result.

[0279] As described above, in this embodiment, the encoding device 300 determines whether to perform encoding of the codebook number for the subvector to be converted, or encoding based on the difference between the number of bits allocated for vector quantization and the number of bits for the quantization parameters (for example, encoding of the number of unused bits), based on the number of bits available for encoding the subvector in vector quantization.

[0280] In this way, by switching between encoding the codebook number and encoding the number of unused bits based on the number of bits available for encoding, it is possible to perform encoding according to the number of bits available for encoding in multirate lattice vector quantization, thereby reducing the number of encoded bits. Therefore, according to this embodiment, the number of encoded bits can be reduced in multirate lattice vector quantization.

[0281] Furthermore, according to this embodiment, even if the subvector to be converted to an unused bit number indicator is a different subvector from the last subvector (for example, SV8) (in other words, if the encoding order is reversed), the encoding device 300 can accurately determine the number of unused bits according to the number of bits that may be wasted due to the reversal of the encoding order.

[0282] Furthermore, according to the present embodiment, the decoding device 400 can specify the encoded information related to the subvector to be code-converted based on parameters such as, for example, the number of bits used for encoding and decoding information (e.g., a codebook indicator value of a subvector different from the subvector to be code-converted). Therefore, for example, a signal (e.g., a flag or dedicated switching control information) for switching between encoding for a codebook indicator value and encoding for the number of unused bits does not need to be notified from the encoding device 300 to the decoding device 400.

[0283] The embodiments of the present disclosure have been described above.

[0284] It should be noted that, in one embodiment of the present disclosure, the codebook list is not limited to the example shown in Fig. 1, and the code values and the number of used bits (or the total number of used bits) of the codebook indicator value and the code vector index in the codebook may be other values. Furthermore, the above-described threshold may be set according to the codebook list applied to encoding and decoding.

[0285] Furthermore, for example, in Fig. 1, the case where the ratio of the number of used bits of the codebook indicator value to the total number of used bits in each codebook is 1 / 5 (in other words, the case where the divisor when using a remainder is 5) has been described, but the present disclosure is not limited thereto.

[0286] Furthermore, in the above-described embodiment, the case where the number of subvectors into which the input signal S(f) is divided is 8 has been described, but the number of subvectors into which the input signal S(f) is divided is not limited to 8.

[0287] Furthermore, in the embodiment described above, as an example, the case in which the input signal is divided into multiple sub-vectors in the frequency domain was explained, but the invention is not limited to this, and the input signal may be divided into multiple sub-vectors in the time domain. In the case of the time domain, for example, the sub-vector SVd to be coded may be a specific sub-vector from among the multiple sub-vectors arranged in the time domain (for example, the third sub-vector from the beginning, or the last sub-vector). Thus, in one embodiment of the present disclosure, when the input signal is divided into sub-vectors of a fixed length in either the frequency domain or the time domain, the sub-vector SVd to be coded may be a sub-vector in any order among the arranged sub-vectors (for example, a sub-vector in a specific order (for example, the third), or the last sub-vector).

[0288] Furthermore, in the embodiments described above, vector quantization is not limited to AVQ, and other methods may also be used.

[0289] This disclosure can be implemented as software, hardware, or software linked to hardware. Each functional block used in the description of the above embodiments may be implemented partially or entirely as an integrated circuit (LSI), and each process described in the above embodiments may be controlled partially or entirely by a single LSI or a combination of LSIs. An LSI may consist of individual chips, or it may consist of a single chip that includes some or all of the functional blocks. An LSI may have data inputs and outputs. Depending on the degree of integration, LSIs may be referred to as ICs, system LSIs, super LSIs, or ultra LSIs. The method of integrated circuit implementation is not limited to LSIs, and may also be implemented with dedicated circuits, general-purpose processors, or dedicated processors. Furthermore, an FPGA (Field Programmable Gate Array) that can be programmed after LSI manufacturing, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells inside the LSI, may be used. This disclosure may be implemented as digital processing or analog processing. Furthermore, if advancements in semiconductor technology or other derived technologies lead to the emergence of integrated circuit technologies that replace LSIs, then naturally, it would be possible to use those technologies to integrate functional blocks. The application of biotechnology, for example, is a possibility.

[0290] This disclosure is applicable to all types of devices, systems, and equipment having communication capabilities (collectively referred to as communication equipment). Communication equipment may include a radio transceiver and a processing / control circuit. A radio transceiver may include a receiver and a transmitter, or both as functions. A radio transceiver (transmitter, receiver) may include an RF (Radio Frequency) module and one or more antennas. The RF module may include an amplifier, an RF modulator / demodulator, or similar. Non-exclusive examples of communication devices include telephones (mobile phones, smartphones, etc.), tablets, personal computers (PCs) (laptops, desktops, notebooks, etc.), cameras (digital still / video cameras, etc.), digital players (digital audio / video players, etc.), wearable devices (wearable cameras, smartwatches, tracking devices, etc.), game consoles, digital book readers, telehealth / telemedicine devices, vehicles or mobile transport with communication capabilities (cars, airplanes, ships, etc.), and combinations of the above-mentioned devices.

[0291] Communication devices are not limited to portable or movable devices, but also include all kinds of non-portable or fixed devices, devices, and systems, such as smart home devices (appliances, lighting equipment, smart meters or measuring instruments, control panels, etc.), vending machines, and any other "things" that may exist on an IoT (Internet of Things) network.

[0292] Communication includes data communication via cellular systems, wireless LAN systems, and communication satellite systems, as well as data communication using combinations of these.

[0293] Furthermore, the communication device also includes devices such as controllers and sensors that are connected to or linked to a communication device that performs the communication functions described in this disclosure. For example, this includes controllers and sensors that generate control signals and data signals used by the communication device that performs the communication functions of the communication device.

[0294] Furthermore, communication equipment includes infrastructure facilities such as base stations, access points, and any other devices, devices, and systems that communicate with or control the aforementioned non-limited types of equipment.

[0295] An encoding device according to one embodiment of the present disclosure comprises a quantization circuit that generates quantization parameters including information about a vector quantization codebook, and a control circuit that sets the number of available bits in encoding based on the difference between the number of bits available for encoding a target subvector and the number of bits in the quantization parameters of the target subvector, depending on the conditions.

[0296] In one embodiment of the present disclosure, the control circuit classifies a plurality of subvectors into a first group including subvectors with frequencies lower than the frequency of the target subvector, and a second group including subvectors with frequencies higher than the frequency of the target subvector and the frequency of the target subvector, and sets the coding order of the target subvector to the last of the subvectors included in the second group.

[0297] In one embodiment of the present disclosure, the control circuit updates the number of available bits based on the condition relating to a first number of consecutive subvectors among the second group of subvectors different from the target subvectors, the subvectors whose quantization parameter is a null vector, and a second number which is the remainder of 5 to the number of available bits.

[0298] In one embodiment of the present disclosure, the control circuit adds the first number to the number of available bits if the remainder of 5 in the sum of the first number and the second number is 0; adds the value of the first number plus 1 to the number of available bits if the remainder of 5 in the sum of the first number and the second number is 4; and adds the value of 5 minus the second number to the number of available bits if the remainder of 5 in the sum of the first number and the second number is different from 0 and 4.

[0299] In one embodiment of the present disclosure, the control circuit adds the value of the first number plus 1 to the number of available bits if the remainder of 5 to the sum of the first number and the second number is 4; adds the first number to the number of available bits if the remainder of 5 to the sum of the first number and the second number is different from 4; and subtracts the third number from the number of available bits after adding the first number or the value of the first number plus 1 to the number of available bits if the third number is greater than 0.

[0300] In one embodiment of the present disclosure, the target subvector is the third lowest subvector in the frequency domain or the third earliest subvector in the time domain among the eight subvectors.

[0301] A decoding device according to one embodiment of the present disclosure comprises a control circuit that sets the number of available bits according to conditions in decoding encoded data based on the difference between the number of bits available for encoding a target subvector in vector quantization and the number of bits of a quantization parameter that includes information about the vector quantization codebook of the target subvector, and an inverse quantization circuit that performs inverse vector quantization based on the result of the decoding.

[0302] In an encoding method according to one embodiment of the present disclosure, the encoding device generates quantization parameters including information about a vector quantization codebook, and sets the number of available bits in encoding based on the difference between the number of bits available for encoding a target subvector and the number of bits in the quantization parameters of the target subvector, depending on the conditions.

[0303] In a decoding method according to one embodiment of the present disclosure, the decoding device, in decoding encoded data based on the difference between the number of bits available for encoding a target subvector in vector quantization and the number of bits of a quantization parameter that includes information about the vector quantization codebook of the target subvector, sets the number of available bits according to the conditions and performs inverse vector quantization based on the result of the decoding.

[0304] All disclosures in the specification, drawings, and abstract contained in the Japanese application 2021-195488, filed on December 1, 2021, are incorporated herein by reference. [Industrial applicability]

[0305] One embodiment of this disclosure is useful for coding systems and the like. [Explanation of Symbols]

[0306] 100,300 encoder 101 Multiplication part 102 Subtractors 103 De-emphasis section 104 DCT section 105 AVQ encoding section 106,205 Floating Bit Management Unit 107,206 Inverse DCT section 108,202,301,401 Sub-vector Identification Unit 109,203 Code conversion section 110 Multiplexer 200 Decoders 201 Separation part 204 AVQ Decoding Section

Claims

1. A quantization circuit that generates quantization parameters for each of a plurality of sub-vectors, including a codebook index indicating the codebook used for vector quantization and a code vector index indicating the code vector used for the vector quantization, A control circuit divides the plurality of subvectors into a first group that does not include the target subvector and a second group that includes the target subvector, and in encoding the second group, when calculating the number of unused bits which is the difference between the number of bits available for encoding the target subvector and the number of bits required for encoding the quantization parameters of the target subvector, updates the number of available bits based on the number of consecutive null vectors (NCNV) which indicates the number of consecutive null vectors other than the target subvector among the two or more subvectors included in the second group, and / or the number of remaining bits (RB: Remainder Bits), which is the remainder of 5 to the number of available bits, then calculates the number of unused bits of the target subvector and encodes the number of unused bits. An encoding device comprising the following:

2. The aforementioned control circuit is The coding order of the target subvector is set to the last of the two or more subvectors included in the second group. The encoding device according to claim 1.

3. The control circuit updates the number of available bits and then updates the value of RB to 0. The encoding device according to claim 1.

4. The aforementioned control circuit is If the remainder of 5 for the sum of the NCNV value and the RB value is 0, the NCNV value is added to the number of available bits before the update. If the remainder of 5 for the sum of the NCNV value and the RB value is 4, add 1 to the NCNV value and add that value to the number of available bits before the update. If the remainder of 5 for the sum of the NCNV value and the RB value is different from 0 and 4, the value obtained by subtracting the RB value from 5 is added to the number of available bits before the update. The encoding device according to claim 1.

5. The aforementioned control circuit is If the remainder of 5 for the sum of the NCNV value and the RB value is 4, add 1 to the NCNV value and add that value to the number of available bits before the update. If the remainder of 5 for the sum of the NCNV value and the RB value is different from 4, the NCNV value is added to the number of available bits before the update. If the recalculated RB value, which is the value of NCNV plus 1 or the remainder of 5 to the number of available bits after adding the value of NCNV, is greater than 0, then the recalculated RB value is subtracted from the value of NCNV plus 1 or the number of available bits after adding the value of NCNV. The encoding device according to claim 1.

6. The target subvector is the third subvector from the lowest frequency in the frequency domain, or the third subvector from the earliest time in the time domain, among the eight subvectors included in the plurality of subvectors. The encoding device according to claim 1.

7. An encoding method in an encoding device, For each of the multiple sub-vectors, a quantization parameter is generated that includes a codebook index indicating the codebook used for vector quantization and a code vector index indicating the code vector used for the vector quantization. The plurality of subvectors are divided into a first group that does not include the target subvector and a second group that includes the target subvector. In encoding the second group, when calculating the number of unused bits, which is the difference between the number of bits available for encoding the target subvector and the number of bits required for encoding the quantization parameters of the target subvector, the number of available bits is updated based on the number of consecutive null vectors (NCNV) that indicate the number of consecutive null vectors other than the target subvector among the two or more subvectors included in the second group, and / or the number of remaining bits (RB: Remainder Bits), which is the remainder of 5 to the number of available bits. Then, the number of unused bits of the target subvector is calculated, and the number of unused bits is encoded. Encoding method.

8. The coding order of the target subvector is set to the last of the two or more subvectors included in the second group. The encoding method according to claim 7.

9. After updating the number of available bits, update the value of RB to 0. The encoding method according to claim 7.

10. If the remainder of 5 for the sum of the NCNV value and the RB value is 0, the NCNV value is added to the number of available bits before the update. If the remainder of 5 for the sum of the NCNV value and the RB value is 4, add 1 to the NCNV value and add that value to the number of available bits before the update. If the remainder of 5 for the sum of the NCNV value and the RB value is different from 0 and 4, the value obtained by subtracting the RB value from 5 is added to the number of available bits before the update. The encoding method according to claim 7.

11. If the remainder of 5 for the sum of the NCNV value and the RB value is 4, add 1 to the NCNV value and add that value to the number of available bits before the update. If the remainder of 5 for the sum of the NCNV value and the RB value is different from 4, the NCNV value is added to the number of available bits before the update. If the recalculated RB value, which is the value of NCNV plus 1 or the remainder of 5 to the number of available bits after adding the value of NCNV, is greater than 0, then the recalculated RB value is subtracted from the value of NCNV plus 1 or the number of available bits after adding the value of NCNV. The encoding method according to claim 7.

12. The target subvector is the third subvector from the lowest frequency in the frequency domain, or the third subvector from the earliest time in the time domain, among the eight subvectors included in the plurality of subvectors. The encoding method according to claim 7.

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