Control method for power converter and power converter
Patent Information
- Application Number
- JP2026545511
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2026-05-18
- Publication Date
- 2026-09-30
- Estimated Expiration
- 2046-05-18
AI Technical Summary
【0011】 上記の一態様の電力変換装置によれば、系統故障の種別に応じて正相無効電流指令値に優先して逆相電流指令値が生成されることにより、系統電圧の不平衡の緩和および保護リレーによる方向判定の補助を確実に実現できる。さらに、系統故障の種別に応じて正相無効電流指令値の上限値が設定されることにより、電力変換器の入出力電流が電力変換器の電流容量を超えない範囲で平均的な系統電圧を維持または底上げできる。
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Abstract
Description
[[Technical Field]]
[0001] The present disclosure relates to a power conversion device and a control method for a power converter. [[Background Art]]
[0002] When a power system fault such as a single-line-to-ground fault or a two-phase short-circuit fault occurs, the system voltage becomes unbalanced and negative-sequence components are generated. Accordingly, a synchronous generator installed in the power system automatically supplies a negative-sequence current to the power system. A protection relay (directional element) installed in the power system performs direction determination (i.e., determination of whether a fault location is in front of or behind the protection relay) based on the phase of the negative-sequence current supplied by the synchronous generator during a system fault.
[0003] However, in a weak power system where the number of connected synchronous generators has decreased due to connection of a large number of renewable energy sources, sufficient negative-sequence current is not supplied from the synchronous generators to the power system during a system fault. On the other hand, renewable energy sources are interconnected to the power system via power conversion devices, and general power conversion devices do not have a function of supplying a negative-sequence current to the power system during a system fault. As a result, when a fault occurs in a weak system, sufficient negative-sequence current is not supplied to the power system, which causes a problem that the protection relay incorrectly determines the fault location.
[0004] Similar to general power conversion devices, a conventional static synchronous compensator (STATCOM) used for stabilizing system voltage does not supply a negative-sequence current to the power system during a system fault. Therefore, by adding a negative-sequence current compensation function during system fault to the conventional STATCOM, the supply amount of negative-sequence current to the power system during system fault can be increased. This enables direction determination during a system fault using existing protection relays (directional elements). The reactive power compensator can be configured by, for example, a modular multilevel converter (MMC) including a large number of unit converters (also referred to as "converter cells") connected in cascade.
[0005] Furthermore, a reverse-sequence current compensation function may also be added to a general power converter (e.g., an inverter) connected between a large-scale renewable energy source and the power grid. This allows the power converter to supply a reverse-sequence current to the power grid in the event of a power grid failure. In other words, the device for supplying a reverse-sequence current to the power grid in the event of a power grid failure is not limited to STATCOM; it may be a general power converter. In this disclosure, STATCOM and general power converters are collectively referred to simply as power converters.
[0006] Patent Document 1 (Japanese Patent Application Publication No. 2023-71319) discloses a power converter capable of supplying a desired amount of reactive power to a connection point in the event of an unbalanced fault in the power system. Specifically, the control device of this power converter controls the output of positive-sequence AC current and negative-sequence AC current based on the detected positive-sequence AC voltage and negative-sequence AC voltage, the upper and lower limits of the AC current defined as device constraints, and the reactive power command value set by the higher-level control device. [Prior art documents] [Patent Documents]
[0007] [Patent Document 1] Japanese Patent Publication No. 2023-71319 [Overview of the project] [Problems that the invention aims to solve]
[0008] When an unbalanced fault occurs in a power system, positive-sequence reactive current is supplied to the power system from power converters such as reactive power compensators. The supply of positive-sequence reactive current is done to maintain the positive-sequence voltage of the power system. Thus, the current STATCOM has a function to maintain the positive-sequence voltage, but it does not have a function to supply negative-sequence reactive current in the direction of suppressing unbalanced voltage (i.e., negative-sequence reactive current in the direction supplied by synchronous generators).
[0009] Therefore, by incorporating a function into STATCOM (more broadly, a power converter) that supplies a reverse-sequenced reactive current in the same direction as a synchronous generator to the power system in the event of an unbalanced fault in the power system, unbalanced voltages can be suppressed, and furthermore, as mentioned above, direction determination by protective relays (direction elements) can be assisted even in weak power systems. In this case, it is necessary to output positive-sequenced reactive current and reverse-sequenced reactive current within the current capacity range defined as a device constraint of the power converter. Patent Document 1 mentioned above does not clarify how to specifically determine the distribution of the output amounts of the positive-sequenced reactive current command value and the reverse-sequenced reactive current command value. One of the purposes of this disclosure is to provide a power converter equipped with a control device that takes the above problems into consideration. [Means for solving the problem]
[0010] A power converter according to one aspect of the present disclosure comprises a power converter connected to a three-phase power system and performing reactive power input and output to the three-phase power system, and a control device that controls the power converter. The control device includes a fault diagnosis unit, a reverse-sequence current control unit, an AC voltage control unit, and a positive-sequence current control unit. The fault diagnosis unit determines whether there is a fault in the three-phase power system and the type of fault based on the three-phase AC voltage detected from the three-phase power system. If the reverse-sequence current control unit determines that an unbalanced system fault has occurred, it generates a reverse-sequence current command value according to the type of system fault. The AC voltage control unit calculates a positive-sequence reactive current command value by a feedback calculation that minimizes the difference between the effective value of the three-phase AC voltage and the AC voltage command value. If the positive-sequence current control unit determines that a system fault has occurred, it generates the final version of the positive-sequence reactive current command value by limiting the positive-sequence reactive current command value by an upper limit set according to the type of system fault so that the input and output currents of the power converter do not exceed the current capacity of the power converter. [Effects of the Invention]
[0011] According to the power converter in the above embodiment, a reverse-sequence current command value is generated in priority over a positive-sequence reactive current command value depending on the type of grid fault, thereby reliably mitigating grid voltage imbalance and assisting in direction determination by protective relays. Furthermore, by setting an upper limit for the positive-sequence reactive current command value depending on the type of grid fault, the average grid voltage can be maintained or raised within the range where the input and output currents of the power converter do not exceed the current capacity of the power converter. [Brief explanation of the drawing]
[0012] [Figure 1] Figure 1 is a schematic diagram of the power conversion device according to Embodiment 1. [Figure 2] Figure 2 is a circuit diagram showing the configuration of a full-bridge type converter cell. [Figure 3] Figure 3 is a circuit diagram showing the configuration of a half-bridge type converter cell. [Figure 4] Figure 4 is a block diagram showing an example of the hardware configuration of the control device shown in Figure 1. [Figure 5] Figure 5 is a block diagram showing an example of the functional configuration of the control device shown in Figure 1. [Figure 6] Figure 6 is a block diagram showing an example configuration of the DC voltage control unit shown in Figure 5. [Figure 7] Figure 7 is a block diagram showing an example configuration of the AC voltage control unit shown in Figure 5. [Figure 8] Figure 8 is a flowchart showing an example of the operation of the fault diagnosis unit in Figure 5. [Figure 9] Figure 9 is a block diagram showing an example configuration of the positive-sequence current control unit shown in Figure 5. [Figure 10] Figure 10 is a diagram illustrating the operation of a variable limiter in the event of a single-line-to-ground fault. [Figure 11] Figure 11 shows an example of a table representing the upper limit of the positive-sequence reactive current command value according to the type of fault. [Figure 12] Figure 12 shows an example of the time variation of the upper limit of the positive-sequence reactive current command value output from the positive-sequence current control unit when a single-line-to-ground fault occurs. [Figure 13] FIG. 13 is a block diagram showing a configuration example of the negative-phase sequence current control unit in FIG. 5. [Figure 14] FIG. 14 is a diagram showing an example of a table representing set values of negative-phase sequence current command values according to fault types. [Figure 15] FIG. 15 is a block diagram showing a configuration example of the output current control unit in FIG. 5. [Figure 16] FIG. 16 is a block diagram showing a configuration example of the phase voltage balance control unit in FIG. 5. [Figure 17] FIG. 17 is a block diagram showing a configuration example of the circulating current control unit in FIG. 5. [Figure 18] FIG. 18 is a block diagram showing a configuration example of the voltage command value calculation unit in FIG. 5. [Figure 19] FIG. 19 is a diagram showing an example of a table representing an upper limit value of a positive-phase sequence reactive current command value set by a variable limiter 45 of the positive-phase sequence current control unit in the power converter according to the second embodiment. [Figure 20] FIG. 20 is a diagram showing an example of an upper limit value of a positive-phase sequence reactive current command value output from the positive-phase sequence current control unit when a single-line ground fault occurs in the power converter according to the second embodiment. [Figure 21] FIG. 21 is a diagram showing an example of a table representing negative-phase sequence current command values set by a negative-phase sequence current command value setting unit of the negative-phase sequence current control unit in the power converter according to the second embodiment. [Figure 22] FIG. 22 is a flowchart for explaining operations of a fault diagnosis unit, a positive-phase sequence current control unit, and a negative-phase sequence current control unit in the power converter according to the third embodiment. MODE FOR CARRYING OUT THE INVENTION
[0013] Each embodiment will be described in detail below with reference to the drawings. The same or corresponding parts will be denoted by the same reference numerals, and their descriptions will not be repeated. In the following embodiments, an example will be described in which the power converter is a delta-connected cascade type three-phase MMC STATCOM. However, the types of power converters to which the control method according to this disclosure can be applied are not limited to this. For example, the control method according to this disclosure can also be applied to a star-connected cascade type three-phase MMC power converter.
[0014] Embodiment 1. [Schematic configuration of a three-phase delta-connected MMC type power converter] Figure 1 is a schematic diagram of the power converter 1 according to Embodiment 1. The power converter 1 comprises a delta-connected cascade type three-phase MMC power converter 2 and its control device 3. The power converter 2 in this embodiment is also called STATCOM (self-excited static reactive power compensation device).
[0015] The power converter 2 includes a transformer 4 and three-phase AC lines UL, VL, and WL. The primary winding of the transformer 4 is connected to the U-phase, V-phase, and W-phase transmission lines of the AC power system 9, respectively. The secondary winding of the transformer 4 is connected to the first terminals of the AC lines UL, VL, and WL, respectively. The AC power system 9 is also referred to as the three-phase power system.
[0016] The power converter 2 functions as a reactive power compensator that injects or absorbs reactive power into the AC power system 9 via the transformer 4. Specifically, when the three-phase AC voltage of the AC power system 9 (hereinafter also referred to as "system voltage") becomes low, the power converter 2 injects reactive power into the AC power system 9 to raise the system voltage. On the other hand, when the system voltage becomes high, the power converter 2 absorbs reactive power from the AC power system 9 to lower the system voltage. In other words, the power converter 2 can compensate for reactive power in the AC power system 9 by injecting or absorbing a current perpendicular to the system voltage.
[0017] The power converter 2 further includes arms A1 to A3. Arm A1 is connected between the second terminal of the U-phase AC line UL and the second terminal of the V-phase AC line VL. Arm A2 is connected between the second terminal of the V-phase AC line VL and the second terminal of the W-phase AC line WL. Arm A3 is connected between the second terminal of the W-phase AC line WL and the second terminal of the U-phase AC line UL. In other words, arms A1 to A3 are connected in a delta connection.
[0018] Arms A1 to A3 may be connected in a star configuration. In this case, arm A1 is connected between the second terminal of the U-phase AC line UL and the common neutral point. Arm A2 is connected between the second terminal of the V-phase AC line VL and the common neutral point. Arm A3 is connected between the second terminal of the W-phase AC line WL and the common neutral point.
[0019] Each of the arms A1 to A3 has a reactor L (L1 to L3) and n converter cells 5 (where n is an integer greater than or equal to 2). Therefore, the power converter 2 has a total of 3n converter cells 5. Hereafter, 3n will also be referred to as N. The n converter cells 5 are connected in series with each other. The reactor L is connected in series with the n converter cells 5 in each arm (A1 to A3) to suppress the circulating current flowing within the delta connection.
[0020] Each of the multiple converter cells 5 performs bidirectional power conversion according to the control signal from the control device 3. An example configuration of the converter cells 5 will be described later with reference to Figures 2 and 3.
[0021] The power conversion device 1 further includes an arm current detection unit 10 located on each arm (A1 to A3), and an AC current detection unit 11 and an AC voltage detection unit 12 located on the AC power system 9.
[0022] The arm current detection unit 10a detects the arm current Iuv flowing through arm A1, the arm current detection unit 10b detects the arm current Ivw flowing through arm A2, and the arm current detection unit 10c detects the arm current Iwu flowing through arm A3. The AC current detection unit 11 detects the U-phase AC current Iu, V-phase AC current Iv, and W-phase AC current Iw of the AC power system 9. In other words, the AC current detection unit 11 detects the output current from the power converter 2 to the AC power system 9. The AC voltage detection unit 12 detects the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the AC power system 9. The signals representing these detected currents and voltages are input to the control device 3.
[0023] In Figure 1, the UV phase voltage across arm A1 is denoted as Vuv, the VW phase voltage across arm A2 as Vvw, and the WU phase voltage across arm A3 as Vwu. These voltage values can be calculated from the voltage detection values of the U phase AC voltage Vu, V phase AC voltage Vv, and W phase AC voltage Vw of the AC power system 9, and the transformation ratio of transformer 4. For example, if the transformation ratio is a (primary voltage / secondary voltage), the UV phase voltage Vuv across arm A1 can be calculated as (Vu-Vv) / a. Alternatively, a voltage detector that directly detects the voltage across each arm may be provided for each arm.
[0024] [Example configuration of converter cell 5] The following describes examples of the configuration of the converter cell 5 with reference to Figures 2 and 3. Figure 2 shows an example of a full-bridge configuration, and Figure 3 shows an example of a half-bridge configuration. The converter cell 5 may have configurations other than those shown in Figures 2 and 3.
[0025] Figure 2 is a circuit diagram showing the configuration of a full-bridge type converter cell 5. The converter cell 5 in Figure 2 comprises a first series unit formed by connecting two semiconductor switching elements Q1 and Q2 in series, a second series unit formed by connecting two semiconductor switching elements Q3 and Q4 in series, rectifier elements D1, D2, D3, and D4 (typically diodes), an energy storage element 17 (typically a capacitor), a voltage detector 18, input / output terminals 16a and 16b, and a driver 19.
[0026] A first series unit, a second series unit, and an energy storage element 17 are connected in parallel between the positive electrode line PL and the negative electrode line NL. Rectifier elements D1 and D2 are connected in antiparallel to semiconductor switching elements Q1 and Q2, respectively (i.e., in parallel and in the reverse bias direction). Rectifier elements D3 and D4 are connected in antiparallel to semiconductor switching elements Q3 and Q4, respectively. The semiconductor switching elements Q1, Q2, Q3, Q4 and rectifier elements D1, D2, D3, D4 constitute a full bridge circuit 15F. The voltage detector 18 detects the voltage Vdccell (also called the capacitor voltage Vdccell) across the energy storage element 17.
[0027] The midpoints of semiconductor switching elements Q1 and Q2 are connected to input / output terminal 16a. Similarly, the midpoints of semiconductor switching elements Q3 and Q4 are connected to input / output terminal 16b. Therefore, the energy storage element 17 is connected to input / output terminals 16a and 16b via the full-bridge circuit 15F. The converter cell 5 outputs the voltage Vdccell, -Vdccell, or zero voltage of the energy storage element 17 as the output voltage Vcell between input / output terminals 16a and 16b through the switching operation of semiconductor switching elements Q1, Q2, Q3, and Q4.
[0028] The driver 19 is connected to the positive electrode line PL and the negative electrode line NL and operates according to the voltage of the energy storage element 17. The driver 19 controls the switching of the semiconductor switching elements Q1, Q2, Q3, and Q4 by outputting a gate signal Ga to the respective control electrodes G of the semiconductor switching elements Q1, Q2, Q3, and Q4.
[0029] Figure 3 is a circuit diagram showing the configuration of a half-bridge type converter cell 5. The converter cell 5 in Figure 3 comprises a series unit formed by connecting two semiconductor switching elements Q1 and Q2 in series, rectifier elements D1 and D2, an energy storage element 17, a voltage detector 18, and input / output terminals 16a and 16b.
[0030] The rectifier elements D1 and D2 are connected in antiparallel to the semiconductor switching elements Q1 and Q2. The series configuration of semiconductor switching elements Q1 and Q2 and the energy storage element 17 are connected in parallel between the positive electrode line PL and the negative electrode line NL. The voltage detector 18 detects the voltage Vdccell across the ends of the energy storage element 17.
[0031] The half-bridge circuit 15H is formed by a series configuration of semiconductor switching elements Q1 and Q2 and rectifier elements D1 and D2. Both terminals of semiconductor switching element Q2 are connected to input / output terminals 16a and 16b, respectively. Therefore, the energy storage element 17 is connected to input / output terminals 16a and 16b via the half-bridge circuit 15H.
[0032] The converter cell 5 outputs the voltage Vdccell of the energy storage element 17 or a zero voltage between the input / output terminals 16a and 16b through the switching operation of semiconductor switching elements Q1 and Q2. When semiconductor switching element Q1 is ON and semiconductor switching element Q2 is OFF, the converter cell 5 outputs the voltage Vdccell of the energy storage element 17. When semiconductor switching element Q1 is OFF and semiconductor switching element Q2 is ON, the converter cell 5 outputs a zero voltage.
[0033] In addition, both terminals of the semiconductor switching element Q1 may be connected to the input / output terminals 16a and 16b, respectively. In this case as well, the converter cell 5 outputs the voltage Vdccell and zero voltage of the energy storage element 17 as the output voltage Vcell from the input / output terminals 16a and 16b by the on / off operation of the semiconductor switching elements Q1 and Q2.
[0034] The driver 19 is connected to the positive electrode line PL and the negative electrode line NL and operates according to the voltage of the energy storage element 17. The driver 19 controls the switching of the semiconductor switching elements Q1 and Q2 by outputting a gate signal Ga to the respective control electrodes G of the semiconductor switching elements Q1 and Q2.
[0035] In Figures 2 and 3, the semiconductor switching elements Q1, Q2, Q3, and Q4 are composed of self-extinguishing semiconductor switching elements such as IGBTs (Insulated Gate Bipolar Transistors) and GCTs (Gate Commutated Turn-off) thyristors.
[0036] In the following explanation, semiconductor switching elements will be referred to collectively as "semiconductor switching element Q" or to any one of them. Similarly, rectifier elements will be referred to collectively as "rectifier element D."
[0037] As shown in Figure 1, the converter cells 5 are cascaded. Therefore, in Figures 2 and 3, the input / output terminal 16a is connected to the input / output terminal 16b of one adjacent converter cell 5 or to the second terminal of the corresponding AC line. The input / output terminal 16b is connected to the input / output terminal 16a of the other adjacent converter cell 5 or to the second terminal of the corresponding AC line of the other.
[0038] [Example Hardware Configuration of Control Device 3] Figure 4 is a block diagram showing an example of the hardware configuration of the control device 3 shown in Figure 1. Figure 4 also shows an example of the control device 3 being configured by a computer.
[0039] Referring to Figure 4, the control device 3 includes one or more input converters 20, one or more sample-and-hold (S / H) circuits 21, a multiplexer (MUX) 22, and an A / D (Analog to Digital) converter 23. Furthermore, the control device 3 includes one or more CPUs (Central Processing Units) 24, RAM (Random Access Memory) 25, and ROM (Read Only Memory) 26. In addition, the control device 3 includes one or more input / output interfaces 27, an auxiliary storage device 28, and a bus 29 that interconnects the above components.
[0040] The input converter 20 has an auxiliary transformer (not shown) for each input channel. Each auxiliary transformer converts the detection signals from each electrical quantity detector in Figure 1 into signals with a voltage level suitable for subsequent signal processing.
[0041] A sample-and-hold circuit 21 is provided for each input converter 20. The sample-and-hold circuit 21 samples and holds the signal representing the quantity of electricity received from the corresponding input converter 20 at a specified sampling frequency.
[0042] The multiplexer 22 sequentially selects signals held by multiple sample-and-hold circuits 21. The A / D converter 23 converts the signals selected by the multiplexer 22 into digital values. Note that by providing multiple A / D converters 23, A / D conversion may be performed in parallel for detection signals from multiple input channels.
[0043] The CPU 24 controls the entire control unit 3 and performs calculations according to the program. The RAM 25, which is volatile memory, and the ROM 26, which is non-volatile memory, are used as the main memory of the CPU 24. The ROM 26 stores the program and setting values for signal processing. The auxiliary storage device 28 is a non-volatile memory with a larger capacity than the ROM 26, and stores the program and data of detected electrical quantities.
[0044] The input / output interface 27 is an interface circuit for communication between the CPU 24 and external devices.
[0045] Unlike the example in Figure 4, it is also possible to configure at least a portion of the control device 3 using FPGA (Field Programmable Gate Array) and ASIC (Application Specific Integrated Circuit) circuits. In other words, the functions of each functional block shown in Figure 4 can be configured based on the computer exemplified in Figure 4, or at least a portion of them can be configured using FPGA and ASIC circuits. Furthermore, at least a portion of the functions of each functional block can also be configured using analog circuits.
[0046] [Characteristics of control by control device 3] The following describes the features of the control of the power converter 2 by the control device 3 of the power converter 1 of this disclosure.
[0047] The first key point of the control by the control device 3 of the power converter 1 of this disclosure is that, in the event of a grid fault, it determines the type of fault and preferentially outputs a reverse-sequence reactive current with amplitude and phase determined according to the type of fault in the case of an unbalanced fault. By outputting the reverse-sequence reactive current, voltage imbalance in the power system can be mitigated, and furthermore, in weak systems with a small number of connected synchronous generators, it can assist in determining the direction of the protective relay. The second key point is that, according to the type of fault, the magnitude of the positive-sequence reactive current output is limited according to the deviation between the detected value (effective value or amplitude value) of the three-phase AC voltage and the command value. The output of the positive-sequence reactive current is for maintaining or raising the average grid voltage, but in the event of a grid fault, the output of the reverse-sequence reactive current takes precedence. By limiting the amount of output of the positive-sequence reactive current according to the type of fault, abnormal shutdowns caused by limitations in the current capacity of the power converter can be prevented.
[0048] The following further explanation concerns the case where the power converter is composed of an MMC. When the grid voltage is unbalanced and positive-sequence reactive current and negative-sequence reactive current are output from the MMC, the arm current of the MMC may become overcurrent, causing the MMC to shut down.
[0049] Specifically, when a grid fault causes an imbalance in grid voltage, the grid voltage includes both positive-sequence and negative-sequence voltages. As a result, differences in input and output power occur for each phase of the MMC, leading to inter-phase variation in the capacitor voltage of the converter cells that make up the MMC. Normally, MMCs use circulating current control to suppress inter-phase variation in capacitor voltage, and as the inter-phase variation in capacitor voltage increases, the circulating current used for inter-phase variation control also increases. As a result, if the magnitude of the circulating current exceeds the upper limit of the current flowing through the converter cells, the MMC will shut down to protect itself.
[0050] To prevent the MMC from shutting down as described above, output limiting of positive-sequence reactive current is performed when the system voltage becomes unbalanced due to a system fault. The functional configuration of the control device 3 will be described in detail below with reference to the drawings.
[0051] In the event of a system fault being a three-phase short-circuit fault or a three-wire-to-ground fault, a decrease in system voltage will occur, but the system voltage will remain balanced. In this case, it is not necessary to output reverse-sequence reactive current from the MMC, but positive-sequence reactive current will be output to maintain or raise the system voltage. When positive-sequence reactive current is output from the MMC, positive-sequence reactive current also flows through each arm of the MMC, so the output amount of positive-sequence reactive current is also limited by the upper limit of the current flowing through each converter cell.
[0052] [Example of functional configuration of control device 3] Figure 5 is a block diagram showing an example of the functional configuration of the control device 3 in Figure 1. Functionally, as shown in Figure 5, the control device 3 comprises a DC voltage control unit 30, an AC voltage control unit 35, a fault diagnosis unit 40, a positive-sequence current control unit 44, a negative-sequence current control unit 46, an output current control unit 50, a phase voltage balance control unit 60, a circulating current control unit 70, a voltage command value calculation unit 80, and a gate signal generation unit 90. In this specification, the output current control unit 50, the circulating current control unit 70, and the voltage command value calculation unit 80 are collectively referred to as the voltage command value generation unit 95.
[0053] The functions of the above components are realized, for example, by the operation of CPU24 in Figure 4 according to the program. The functions of each component will be explained in order below with reference to Figures 6 to 18.
[0054] [DC voltage control unit 30] Figure 6 is a block diagram showing an example configuration of the DC voltage control unit 30 in Figure 5. The DC voltage control unit 30 receives inputs of the capacitor voltage Vdccell value detected by the voltage detector 18 of each converter cell 5 and the total DC voltage command value Vdcref. Based on these inputs, the DC voltage control unit 30 generates a positive-sequence active current command value Iqref to balance the capacitor voltage Vdccell of all converter cells 5.
[0055] Specifically, as shown in Figure 6, the DC voltage control unit 30 comprises a DC voltage representative value calculation unit 31, a subtractor 32, and a controller 33. The DC voltage control unit 30 receives the capacitor voltage Vdccell of all (in this case, 3n (=N)) converter cells 5 detected by the voltage detector 18 for each converter cell 5, and the DC total voltage command value Vdcref as input.
[0056] The DC voltage representative value calculation unit 31 calculates a representative voltage Vdc from the capacitor voltages Vdccell of all converter cells 5. The representative voltage Vdc may be the average, median, maximum, or minimum value of at least some of the capacitor voltages Vdccell, and is not particularly limited as long as it reflects the magnitude of the capacitor voltages Vdccell of all converter cells 5.
[0057] The subtractor 32 calculates the deviation ΔVdc by subtracting the voltage representative value Vdc from the DC total voltage command value Vdcref. The DC total voltage command value Vdcref is set to 1[pu].
[0058] Controller 33 calculates the positive-sequence active current command value Iqref by performing a feedback control operation to make this deviation ΔVdc zero, that is, to make the voltage representative value Vdc follow the DC total voltage command value Vdcref. Controller 33 may be a PI (proportional-integral) controller or any other type of controller. In the case of a PI controller, a proportional operation (P) and an integral operation (I) are performed on the deviation ΔVdc, and the positive-sequence active current command value Iqref is generated by adding the results of these operations.
[0059] [AC voltage control unit 35] Figure 7 is a block diagram showing an example configuration of the AC voltage control unit 35 in Figure 5. The AC voltage control unit 35 receives input from the AC voltage detection unit 12, which receives the detected values (instantaneous values) of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the AC power system 9 detected by the AC voltage detection unit 12, and the AC voltage command value Vacref. Based on these inputs, the AC voltage control unit 35 generates a positive-sequence reactive current command value Idref in order to make the voltage amplitude of the three-phase AC a constant value, that is, to bring it close to the AC voltage command value Vacref. The AC voltage control unit 35 is also commonly referred to as an Alternating-Current Automatic Voltage Regulator (AC-AVR).
[0060] Specifically, as shown in Figure 7, the AC voltage control unit 35 comprises an amplitude calculation unit 36, a low-pass filter 37, a subtractor 38, and a controller 39. The amplitude calculation unit 36 receives the detected values (instantaneous values) of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the AC power system 9 at each sampling period of the AC voltage detection unit 12.
[0061] The amplitude calculation unit 36 calculates the voltage amplitude value Vac of the three-phase AC according to the following equation (1). The effective voltage value may also be calculated by dividing equation (1) by √2.
[0062]
number
[0063] The low-pass filter 37 extracts the DC component of the voltage amplitude value Vac by removing the AC component and noise component contained in the voltage amplitude value Vac calculated by the amplitude calculation unit 36. In particular, when the three-phase AC voltage is unbalanced, the amplitude value calculated by equation (1) oscillates, so a low-pass filter is necessary.
[0064] The subtractor 38 calculates the deviation ΔVac by subtracting the voltage amplitude value Vac (DC component) from the AC voltage command value Vacref. The AC voltage command value Vacref is set to 1[pu].
[0065] The controller 39 calculates the positive-sequence reactive current command value Idref by performing a feedback control calculation to make this deviation ΔVac zero, that is, to make the voltage amplitude value Vac follow the AC voltage command value Vacref. The controller 39 may be a PI controller or any other type of controller.
[0066] [Fault Diagnosis Unit 40] The fault diagnosis unit 40 receives the detected values of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the AC power system 9 at each sampling period of the AC voltage detection unit 12. Based on these detected values, the fault diagnosis unit 40 determines whether or not there is a system fault and the type of system fault that has occurred.
[0067] Figure 8 is a flowchart showing an example of the operation of the fault diagnosis unit 40 in Figure 5. First, in step S10 of Figure 8, the fault diagnosis unit 40 calculates the effective values of the voltages of each phase and the effective value of the zero-sequence voltage based on the detected values of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the AC power system 9. The zero-sequence voltage V0 (instantaneous value) is calculated using the instantaneous values of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw in the following equation (2). The effective value is given as the square root of the average of the squares of the instantaneous values over one period.
[0068]
number
[0069] In the following procedure, the fault diagnosis unit 40 uses the calculated RMS value to determine the presence and type of system fault, but of course, the amplitude value (i.e., √2 times the RMS value) may be used instead of the RMS value.
[0070] In the subsequent series of steps S20, S40, and S80, the fault diagnosis unit 40 determines how many of the calculated effective voltage values for each phase are less than the judgment value Vdet1.
[0071] If the effective voltage value of any one phase is less than the determination value Vdet1 (YES in step S20), the fault diagnosis unit 40 determines that a single-line-to-ground fault (1LG) has occurred (step S30).
[0072] If the effective voltage value of any one phase is less than the determination value Vdet1 (YES in step S40), the fault diagnosis unit 40 proceeds to step S50. In step S50, the fault diagnosis unit 40 determines whether the effective value of the zero-sequence voltage exceeds the determination value Vdet2. If the effective value of the zero-sequence voltage exceeds the determination value Vdet2 (YES in step S50), the fault diagnosis unit 40 determines that a two-line-to-ground fault (2LG) has occurred (step S60). On the other hand, if the effective value of the zero-sequence voltage does not exceed the determination value Vdet2 (NO in step S50), that is, if the effective value of the zero-sequence voltage is almost 0, the fault diagnosis unit 40 determines that a two-phase short-circuit fault (2LS) has occurred (step S70).
[0073] If the effective voltage values of all three phases are less than the determination value Vdet1 (YES in step S80), the fault diagnosis unit 40 determines that a three-line-to-ground fault (3LG) or a three-phase short-circuit fault (3LS) has occurred (step S90).
[0074] If none of the above conditions are met (all of steps S20, S40, and S80 are NO), that is, if the effective voltage values of all three phases are greater than or equal to the determination value Vdet1, the fault diagnosis unit 40 determines that no system fault has occurred (step S100).
[0075] With the above steps completed, the fault diagnosis process by the fault diagnosis unit 40 is finished. The fault diagnosis unit 40 outputs the fault diagnosis results (i.e., whether or not there is a system fault and the type of system fault) to the positive-sequence current control unit 44 and the negative-sequence current control unit 46.
[0076] Note that the flowchart in Figure 8 is just one example, and the method for determining the presence or absence of a system fault and the type of system fault is not limited to the method described above. For example, the positive-sequence voltage and negative-sequence voltage may be calculated from the instantaneous values of the three-phase AC voltage, and the presence or absence of a system fault and the type of system fault may be determined based on the amplitude and phase of the positive-sequence voltage and negative-sequence voltage.
[0077] [Positive-sequence current control unit 44] Figure 9 is a block diagram showing an example configuration of the positive-sequence current control unit 44 in Figure 5. As shown in Figure 9, the positive-sequence current control unit 44 is equipped with a variable limiter 45. The positive-sequence current control unit 44 receives the positive-sequence active current command value Iqref output from the DC voltage control unit 30, the positive-sequence reactive current command value Idref output from the AC voltage control unit 35, and the fault diagnosis result output from the fault diagnosis unit 40. The positive-sequence current control unit 44 outputs the positive-sequence active current command value Iqref as is. When a system fault occurs, the variable limiter 45 sets an upper limit value according to the system type and outputs a positive-sequence reactive current command value Idref* limited by the set upper limit value.
[0078] The upper limit of the variable limiter 45 is set by the CPU 24 in Figure 4, for example, by referring to the table in Figure 11. The table in Figure 11 is pre-stored in the ROM 26 or auxiliary storage device 28 in Figure 4.
[0079] Figure 10 is a diagram illustrating the operation of the variable limiter 45 in the event of a single-line-to-ground fault. The horizontal axis of Figure 10 shows the positive-sequence reactive current command value Idref input to the variable limiter 45, and the vertical axis of Figure 10 shows the positive-sequence reactive current command value Idref* output from the variable limiter 45.
[0080] As shown in Figure 10, the output positive-sequence reactive current command value Idref* is equal to the input positive-sequence reactive current command value Idref until the input positive-sequence reactive current command value Idref reaches the upper limit A_1LG for a single-line-to-ground fault. When the input positive-sequence reactive current command value Idref exceeds the upper limit A_1LG, the output positive-sequence reactive current command value Idref* from the variable limiter 45 is limited to the upper limit A_1LG.
[0081] Figure 11 shows an example of a table representing the upper limits of the positive-sequence reactive current command value according to the type of fault. As shown in Figure 11, different upper limits are set depending on the type of system fault.
[0082] As mentioned above, in the case of single-line-to-ground faults (1LG), double-line-to-ground faults (2LG), and two-phase short-circuit faults (2LS), reverse-sequence reactive current is preferentially supplied to the power system to suppress the voltage drop in the faulty phase and the voltage rise in the non-faulty phase, and also to assist in directional determination by the protective relay. Therefore, the upper limits of the positive-sequence reactive current A_1LG, A_2LG, and A_2LS for these fault types are determined within the current capacity of the power converter 2, according to the output amount of the reverse-sequence reactive current. Since the degree of voltage imbalance (reverse-sequence voltage / positive-sequence voltage) differs depending on the fault type of the power system, the required output amount of reverse-sequence reactive current also differs depending on the fault type. Therefore, the upper limit of the positive-sequence reactive current is also set to a different value depending on the fault type.
[0083] Furthermore, generally, the greater the voltage imbalance (e.g., reverse-sequence voltage / positive-sequence voltage), the greater the unbalance in the capacitor voltages between phases of power converter 2. As a result, the greater the voltage imbalance, the more likely the circulating current value for phase-to-phase balance control will be to become excessive. Therefore, generally, the greater the voltage imbalance, the smaller the upper limit of the positive-sequence reactive current should be set to.
[0084] On the other hand, in the case of a three-line-to-ground fault (3LG) and a three-phase short-circuit fault (3LS), the system voltage is balanced, so no reverse-phase reactive current is output from the power converter 2 to the AC power system 9. Therefore, the upper limit A_other in these cases is set to a value greater than the upper limits A_1LG, A_2LG, and A_2LS mentioned above for the case of an unbalanced system voltage.
[0085] If no system fault occurs, no upper limit is set for the positive-sequence reactive current command value Idref. Therefore, the positive-sequence current control unit 44 outputs the positive-sequence reactive current command value Idref generated by the AC voltage control unit 35 as is. For convenience, in Figures 5 and 9, the positive-sequence reactive current command value when there is no upper limit is also indicated as Idref*. In this case, Idref* = Idref.
[0086] Figure 12 shows an example of the time variation of the upper limit of the positive-sequence reactive current command value output from the positive-sequence current control unit 44 when a single-line-to-ground fault occurs. The horizontal axis of Figure 12 represents time, and the vertical axis of Figure 12 represents the ratio [%] of the upper limit to the positive-sequence reactive current command value Idref generated by the AC voltage control unit 35.
[0087] As shown in Figure 12, from time t1 when a single-line-to-ground fault is detected until time t3 when the fault is removed from the power system, the positive-sequence reactive current command value is limited by the upper limit value A_1LG. During other periods, the positive-sequence reactive current command value Idref output from the AC voltage control unit 35 remains unchanged, i.e., 100% of the positive-sequence reactive current command value Idref is output. The same applies to other types of faults.
[0088] [Reverse-phase current control unit 46] Figure 13 is a block diagram showing an example configuration of the reverse-phase current control unit 46 in Figure 5. As shown in Figure 13, the reverse-phase current control unit 46 includes a reverse-phase current command value setting unit 47 that sets the amplitude mag and phase ph of the reverse-phase current command value Inref based on the fault diagnosis result output from the fault diagnosis unit 40.
[0089] Specifically, the reverse-sequence current command value setting unit 47 sets the amplitude mag and phase ph of the reverse-sequence current command value Inref by referring to a table, for example, shown in Figure 14. The phase ph is defined as the phase difference of the reverse-sequence current with respect to the positive-sequence voltage. When the phase ph is positive, the phase of the reverse-sequence current leads the phase of the reference positive-sequence voltage. Based on the set amplitude mag and phase ph, the reverse-sequence current command value setting unit 47 calculates the reverse-sequence active current command value Iqnref and the reverse-sequence reactive current command value Idnref and outputs these calculated values. For example, the reverse-sequence reactive current command value Idnref is obtained by multiplying the amplitude mag by a sine function, and the reverse-sequence active current command value Iqnref is obtained by multiplying the amplitude mag by a cosine function, and the phase of these trigonometric functions is corrected by the set phase ph.
[0090] Figure 14 shows an example of a table representing the set values for the reverse-phase current command value according to the type of fault. As shown in Figure 14, different reverse-phase current command values are set depending on the type of system fault. Note that the reverse-phase current command value is 0 before a system fault occurs and after a system fault is resolved.
[0091] As mentioned above, in the case of single-line-to-ground faults (1LG), double-line-to-ground faults (2LG), and two-phase short-circuit faults (2LS), a reverse-sequence reactive current is supplied to the power system to suppress the voltage drop in the faulty phase and the voltage rise in the non-faulty phase, and also to assist in directional determination by protective relays. Since the degree of voltage imbalance (reverse-sequence voltage / positive-sequence voltage) differs depending on the type of fault in the power system, the amplitude command values C(mag)_1LG, C(mag)_2LG, and C(mag)_2LS of the reverse-sequence current required for the above purposes also differ depending on the type of fault.
[0092] Furthermore, the phase command values C(ph)_1LG, C(ph)_2LG, and C(ph)_2LS for the reverse-phase current in these fault types are set to a leading phase of 0 degrees or more and 180 degrees or less. Preferably, the phase command value C(ph) is set to 90 degrees or more and 100 degrees or less.
[0093] Furthermore, the reverse-sequence current command value Inref also depends on the actual configuration of the power system (e.g., neutral point grounding method, information on nearby renewable energy sources, information on nearby load configurations, estimated positive-sequence, negative-sequence, and zero-sequence impedances of transmission lines, etc.). Therefore, when actually determining the amplitude mag and phase ph of the reverse-sequence current command value Inref, it is desirable to set the optimal values by repeating simulations for each type of fault.
[0094] On the other hand, in the case of a three-line ground fault (3LG) or a three-phase short-circuit fault (3LS) where the system voltage remains balanced, no reverse-sequence reactive current is supplied from the power converter 2 to the AC power system 9. Therefore, both the amplitude command value and the phase command value of the reverse-sequence current are set to 0. Furthermore, even when no system fault occurs, the output of reverse-sequence reactive current is not necessary, so both the amplitude command value and the phase command value of the reverse-sequence current are set to 0.
[0095] [Output current control unit 50] Figure 15 is a block diagram showing an example configuration of the output current control unit 50 in Figure 5. The output current control unit 50 receives the positive-sequence active current command value Iqref and the positive-sequence reactive current command value Idref* output from the positive-sequence current control unit 44, and the negative-sequence active current command value Iqnref and the negative-sequence reactive current command value Idnref output from the negative-sequence current control unit 46. The output current control unit 50 also receives the three-phase AC currents Iu, Iv, Iw detected by the AC current detection unit 11 and the three-phase AC voltages Vu, Vv, Vw detected by the AC voltage detection unit 12. Based on these inputs, the output current control unit 50 generates the d-axis voltage command value Vdref and the q-axis voltage command value Vqref.
[0096] As shown in Figure 15, the output current control unit 50 includes a reference voltage calculation unit 51, a three-phase / two-phase coordinate conversion unit 55b, and adders 53c and 53d. The reference voltage calculation unit 51 includes a three-phase / two-phase coordinate conversion unit 55a, adders 53a and 53b, subtractors 54a and 54b, and a controller 52.
[0097] As shown in Figure 15, the reference voltage calculation unit 51 receives the positive-sequence reactive current command value Idref*, the negative-sequence reactive current command value Idnref, the positive-sequence active current command value Iqref, the negative-sequence active current command value Iqnref, the U-phase AC current Iu, the V-phase AC current Iv, and the W-phase AC current Iw as inputs.
[0098] Adder 53a calculates the reactive current command value Id2ref by adding the positive-sequence reactive current command value Idref* and the negative-sequence reactive current command value Idnref, as shown in equation (3A). Adder 53b calculates the active current command value Iq2ref by adding the positive-sequence active current command value Iqref and the negative-sequence active current command value Iqnref, as shown in equation (3B).
[0099]
number
[0100] The three-phase / two-phase coordinate transformation unit 55a calculates the positive-sequence reactive current Id and positive-sequence active current Iq, which are obtained by three-phase / two-phase transformation of the AC currents Iu, Iv, Iw detected by the AC current detection unit 11 in the positive-sequence coordinate system. More specifically, the three-phase / two-phase coordinate transformation unit 55a transforms the AC currents Iu, Iv, Iw from UVW coordinates to AC currents Iα, Iβ in αβ coordinates according to equation (4A). The three-phase / two-phase coordinate transformation unit 55a further performs a rotational coordinate transformation from the AC currents Iα, Iβ in αβ coordinates to positive-sequence currents Id, Iq in positive-sequence dq coordinates according to equation (4B) using the reference phase θ. Here, the reference phase θ is the phase θ synchronized with the system voltage.
[0101]
number
[0102] The subtractor 54a calculates the deviation ΔId between the reactive current command value Id2ref output from the adder 53a and the positive-sequence reactive current Id output from the three-phase / two-phase coordinate conversion unit 55a. The subtractor 54b calculates the deviation ΔIq between the active current command value Iq2ref output from the adder 53b and the positive-sequence active current Iq output from the three-phase / two-phase coordinate conversion unit 55a.
[0103] Controller 52 performs feedback control calculations to make the deviations ΔId and ΔIq zero, that is, to make the positive-sequence reactive current Id and positive-sequence active current Iq follow the reactive current command value Id2ref and the active current command value Iq2ref, respectively, and generates positive-sequence and negative-sequence reference voltages Vd2ref and Vq2ref. Vd2ref is the reactive component of the positive-sequence and negative-sequence reference voltage, and Vq2ref is the active component of the positive-sequence and negative-sequence reference voltage. Controller 52 may be a PI controller or any other type of controller.
[0104] On the other hand, the three-phase / two-phase coordinate transformation unit 55b generates positive-sequence voltages (positive-sequence d-axis voltage Vdff, positive-sequence q-axis voltage Vqff) obtained by three-phase / two-phase transformation of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the power system in a positive-sequence coordinate system. More specifically, the three-phase / two-phase coordinate transformation unit 55b performs a three-phase / two-phase transformation of the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw from UVW coordinates to system voltages Vα and Vβ in αβ coordinates. The three-phase / two-phase coordinate transformation unit 55b further performs a rotational coordinate transformation from the system voltages Vα and Vβ in αβ coordinates to positive-sequence voltages Vdff and Vqff in positive-sequence dq coordinates using a reference phase θ. Here, the reference phase θ is the phase θ synchronized with the system voltage.
[0105] The adder 53c calculates the d-axis voltage command value Vdref by feedforward adding the positive-sequence d-axis voltage Vdff calculated by the three-phase / two-phase coordinate transformation unit 55b to the positive-sequence negative-sequence reference voltage Vd2ref on the d-axis, which is the output of the controller 52.
[0106] The adder 53d calculates the q-axis voltage command value Vqref by feedforward adding the positive-sequence q-axis voltage Vqff, calculated by the three-phase / two-phase coordinate transformation unit 55b, to the positive-sequence negative-sequence reference voltage Vq2ref on the q-axis, which is the output of the controller 52. Here, each of the voltage command value Vdref on the d-axis and the voltage command value Vqref on the q-axis includes both positive-sequence and negative-sequence components.
[0107] [Phase voltage balance control unit 60] Figure 16 is a block diagram showing an example configuration of the phase voltage balance control unit 60 in Figure 5. The phase voltage balance control unit 60 receives inputs of the capacitor voltage Vdccell value detected by the voltage detector 18 of each converter cell 5, the UV phase voltage Vuv applied to arm A1, the VW phase voltage Vvw applied to arm A2, and the WU phase voltage Vwu applied to arm A3. Based on these inputs, the phase voltage balance control unit 60 generates a circulating current command value Izref to balance the capacitor voltage Vdccell of all converter cells 5.
[0108] As shown in Figure 16, the phase voltage balance control unit 60 comprises a voltage representative value calculation unit 61, a subtractor 62, a controller 63, a limiter 64, a multiplier 65, an adder 66, a constant multiplier 67, and a filter 68. Of these components, the subtractor 62, controller 63, limiter 64, multiplier 65, and filter 68 are provided in accordance with the voltage or current of each arm. When distinguishing between arms, a, b, and c are appended to the end of the reference numeral, corresponding to arms A1, A2, and A3, respectively.
[0109] The voltage representative value calculation unit 61 receives the value of the capacitor voltage Vdccell detected in each converter cell 5 as input. Based on these detected values of capacitor voltage Vdccell, the voltage representative value calculation unit 61 calculates the representative value Vphref for the capacitor voltage Vdccell of all converter cells 5, the representative value Vdcuv for the capacitor voltage Vdccell of the converter cell 5 constituting arm A1, the representative value Vdcvw for the capacitor voltage Vdccell of the converter cell 5 constituting arm A2, and the representative value Vdcwu for the capacitor voltage Vdccell of the converter cell 5 constituting arm A3. The representative value of the capacitor voltage Vdccell may be an average value, median value, maximum value, or minimum value, and is not particularly limited as long as it reflects the magnitude of the capacitor voltage Vdccell of the corresponding converter cell 5.
[0110] The typical capacitor voltages for each arm, Vdcuv, Vdcvw, and Vdcwu, oscillate at a frequency of 2f, where f is the fundamental frequency of the power system. Each of the filters 68a, 68b, and 68c outputs only the DC component by removing the 2f AC component from the typical capacitor voltage of the corresponding arm, Vdcuv, Vdcvw, or Vdcwu.
[0111] Each of the subtractors 62a, 62b, and 62c calculates an error ΔVuv, ΔVvw, or ΔVwu by subtracting the representative value of the capacitor voltage of the corresponding arm, Vdcuv, Vdcvw, or Vdcwu, from the representative value Vphref of the total capacitor voltage Vdccell.
[0112] Each of the controllers 63a, 63b, and 63c performs a feedback operation to bring the corresponding error ΔVuv, ΔVvw, or ΔVwu closer to zero. Specifically, controller 63 may be configured as a proportional controller, as a PI (proportional-integral) controller that adds the results of a proportional operation (P) and an integral operation (I), or as any other type of controller.
[0113] Each of the limiters 64a, 64b, and 64c limits the output of the corresponding controller 63a, 63b, or 63c to within the range of an upper and lower limit. That is, each limiter 64 changes the output value of the corresponding controller 63 to the upper limit if the output exceeds the upper limit, changes the output value to the lower limit if the output exceeds the lower limit, and outputs the output value as is if the output of the corresponding controller 63 is between the upper and lower limits. When the system voltage is unbalanced, the magnitude of the circulating current command value Izref output from the phase voltage balance control unit 60 increases, so the limiters 64 are provided to reduce the magnitude of the circulating current command value Izref.
[0114] The upper and lower limits of the limiter 64 may be determined, for example, according to the rated value of the arm current so that the arm current flowing through the converter cell 5 does not become an overcurrent. Alternatively, the upper and lower limits may be predetermined in the form of a table according to the values of the positive-sequence voltage and negative-sequence voltage of the power system (i.e., the degree of voltage imbalance) so that the output current of the power converter does not exceed the current capacity.
[0115] Multiplier 65a calculates the UV phase arm current command value Iuvref flowing through arm A1 by multiplying the output of the corresponding limiter 64a by the voltage Vuv of arm A1. Similarly, multiplier 65b calculates the VW phase arm current command value Ivwref flowing through arm A2 by multiplying the output of the corresponding limiter 64b by the voltage Vvw of arm A2. Multiplier 65c calculates the WU phase arm current command value Iwuref flowing through arm A3 by multiplying the output of the corresponding limiter 64c by the voltage Vwu of arm A3.
[0116] The adder 66 adds the above arm current command values Iuvref, Ivwref, and Iwuref. The constant multiplier 67 calculates the circulating current command value Izref by multiplying the sum of the adder 66 by one-third. If the limiter 64 limits the value of any of the arm current command values Iuvref, Ivwref, or Iwuref, the value of the circulating current command value Izref is also limited.
[0117] If a limiter 64 is not provided at the output of the controller 63 of the phase voltage balance control unit 60, the circulating current command value Izref becomes unnecessarily large in order to compensate for the phase voltage balance, especially when the system voltage is unbalanced. As a result, the problem of increased arm current occurs. By limiting the output of the controller 63 of the phase voltage balance control unit 60 with the limiter 64, the circulating current command value Izref is limited.
[0118] [Circulating current control unit 70] Figure 17 is a block diagram showing an example configuration of the circulating current control unit 70 in Figure 5. Referring to Figure 17, the circulating current control unit 70 comprises an adder 73, a constant multiplier 74, a subtractor 72, and a controller 71.
[0119] The adder 73 adds the arm currents Iuv, Ivw, and Iwu detected by the arm current detection unit 10. The constant multiplier 74 calculates the circulating current Iz flowing through the power converter 2 by multiplying the sum of the adder 73 by one-third.
[0120] The subtractor 72 calculates the deviation ΔIz between the circulating current command value Izref and the circulating current Iz. The controller 71 performs a feedback control calculation to make this deviation ΔIz zero, that is, to make the circulating current Iz follow the circulating current command value Izref, and generates the zero-sequence voltage command value Vzref. The controller 84 may be a PI controller or any other type of controller.
[0121] [Voltage command value calculation unit 80] Figure 18 is a block diagram showing an example configuration of the voltage command value calculation unit 80 in Figure 5. Referring to Figure 18, the voltage command value calculation unit 80 comprises a two-phase / three-phase coordinate transformation unit 81, subtractors 82a, 82b, 82c, and adders 83a, 83b, 83c.
[0122] The two-phase / three-phase coordinate conversion unit 81 calculates the AC voltage command values Vu2ref, Vv2ref, and Vw2ref for the U-phase, V-phase, and W-phase by performing a two-phase / three-phase conversion on the voltage command value Vdref on the d-axis and the voltage command value Vqref on the q-axis output from the output current control unit 50. The two-phase / three-phase conversion can be configured as the inverse conversion of the three-phase / two-phase conversion shown in equations (4A) and (4B). That is, the two-phase / three-phase coordinate conversion unit 81 converts the dq coordinate to an αβ coordinate, and then converts the αβ coordinate to a three-phase coordinate.
[0123] The subtractor 82a calculates the UV phase AC voltage command value Vuv2ref by subtracting the V phase AC voltage command value Vv2ref from the U phase AC voltage command value Vu2ref.
[0124] The subtractor 82b calculates the AC voltage command value Vvw2ref for the V and W phases by subtracting the AC voltage command value Vw2ref for the W phase from the AC voltage command value Vv2ref for the V phase.
[0125] The subtractor 82c calculates the AC voltage command value Vwu2ref for the W and U phases by subtracting the AC voltage command value Vu2ref for the U phase from the AC voltage command value Vw2ref for the W phase.
[0126] The adder 83a generates the output voltage command value Vuvref for arm A1 by adding the zero-sequence voltage command value Vzref output from the circulating current control unit 70 to the calculated UV-phase AC voltage command value Vuv2ref.
[0127] The adder 83b generates the output voltage command value Vvwref for arm A2 by adding the zero-sequence voltage command value Vzref output from the circulating current control unit 70 to the calculated AC voltage command value Vvw2ref of the VW phase.
[0128] The adder 83c calculates and outputs the output voltage command value Vwref for arm A3 by adding the zero-sequence voltage command value Vzref output from the circulating current control unit 70 to the calculated AC voltage command value Vwu2ref for the WU phase.
[0129] The generated output voltage command values Vuvref, Vvwref, and Vwuref for arms A1, A2, and A3 are output to the gate signal generation unit 90 in Figure 5.
[0130] [Gate signal generation unit 90] Referring to Figure 5, the gate signal generation unit 90 generates a gate signal Ga for controlling the on / off state of the semiconductor switching elements (Q1 to Q4 in Figure 2, Q1 and Q2 in Figure 3) of each converter cell 5 in each arm by PWM (Pulse Width Modulation) control according to the output voltage command values Vuref, Vvref, and Vwref for arms A1, A2, and A3 output from the voltage command value calculation unit 80. The gate signal Ga is input to the control electrode G of the semiconductor switching element of each converter cell 5 via the driver 19 of each converter cell 5. This determines whether the semiconductor switching element of each converter cell 5 is on or off.
[0131] [Voltage command value generation unit 95] In this specification, the output current control unit 50, the circulating current control unit 70, and the voltage command value calculation unit 80 are collectively referred to as the voltage command value generation unit 95. The voltage command value generation unit 95 generates the output voltage command values Vuvref, Vvwref, and Vwuref for arms A1, A2, and A3, respectively, based on the positive-sequence active current command value Iqref, the positive-sequence reactive current command value Idref (or the final version of the positive-sequence reactive current command value Idref* limited by a set upper limit), and the circulating current command value Izref. The voltage command value generation unit 95 outputs the generated output voltage command values Vuref, Vvref, and Vwref to the gate signal generation unit 90.
[0132] [Effects of Embodiment 1] The key features of the power converter 1 of the above embodiment 1 are summarized as follows: The power converter 1 is connected to a three-phase power system 9 and comprises a power converter 2 that inputs and outputs reactive power to and from the three-phase power system 9, and a control device 3 that controls the power converter 2. The control device 3 includes a fault diagnosis unit 40, a reverse-sequence current control unit 46, an AC voltage control unit 35, and a positive-sequence current control unit 44.
[0133] The fault diagnosis unit 40 determines whether there is a fault in the three-phase power system 9 and the type of fault based on the three-phase AC voltages Vu, Vv, Vw detected from the three-phase power system 9. The reverse-sequence current control unit 46 generates a reverse-sequence current command value Inref according to the type of fault if it is determined that an unbalanced system fault has occurred. The AC voltage control unit 35 calculates a positive-sequence reactive current command value Idref by performing a feedback calculation such that the difference between the effective values of the three-phase AC voltages Vu, Vv, Vw and the AC voltage command value Vacref is small. The positive-sequence current control unit 44 generates the final version of the positive-sequence reactive current command value Idref* by limiting the positive-sequence reactive current command value Idref by an upper limit set according to the type of fault so that the input and output currents of the power converter 2 do not exceed the current capacity of the power converter 2.
[0134] According to the power converter 1 described above, the reverse-sequence current command value Inref is generated in priority to the positive-sequence reactive current command value Idref depending on the type of grid fault, thereby reliably mitigating grid voltage imbalance and assisting in direction determination by protective relays. Furthermore, by setting an upper limit for the positive-sequence reactive current command value Idref according to the type of grid fault, the average grid voltage can be maintained or raised within the range where the input and output currents of the power converter 2 do not exceed the current capacity of the power converter 2.
[0135] Embodiment 2. The power converter 1 of Embodiment 2 is characterized by different distributions of positive-sequence reactive current and negative-sequence reactive current outputs during the period immediately following an unbalanced fault in the power system and during the period thereafter.
[0136] Specifically, immediately after an unbalanced fault occurs in the power system, it is desirable for the power converter 1 to preferentially supply reverse-sequence reactive current to the AC power system 9 in order to suppress the sharp drop in voltage of the faulty phase and the sharp rise in voltage of the non-faulty phase, and also to assist in direction determination by the protective relay. Subsequently, after a certain period has elapsed since the occurrence of the unbalanced fault and the voltage drop of the faulty phase and the voltage rise of the non-faulty phase have subsided, it is desirable for the power converter 1 to increase the output of positive-sequence reactive current in order to raise the overall system voltage. This will be explained in detail below with reference to the drawings.
[0137] Figure 19 shows an example of a table representing the upper limit of the positive-sequence reactive current command value set by the variable limiter 45 of the positive-sequence current control unit 44 in the power converter of Embodiment 2.
[0138] As shown in Figure 19, the upper limit of the positive-sequence reactive current command value Idref in the first period Tp1 is set to the same value as shown in the table in Figure 11 until a certain period has elapsed since the occurrence of a system fault.
[0139] On the other hand, after the first period Tp1 has elapsed, the upper limit of the positive-sequence reactive current command value Idref in the second period Tp2, until the system fault is removed, is set to a value greater than the value in the first period Tp1, for each type of system fault. This relaxes the limit on the positive-sequence reactive current command value Idref, so that more positive-sequence reactive current is supplied to the AC power system 9 for an overall increase in system voltage.
[0140] Figure 20 shows an example of the upper limit value of the positive-sequence reactive current command value output from the positive-sequence current control unit 44 when a single-line-to-ground fault occurs in the power converter of Embodiment 2. The horizontal axis of Figure 20 represents time, and the vertical axis of Figure 20 represents the ratio [%] of the upper limit value to the positive-sequence reactive current command value Idref generated by the AC voltage control unit 35.
[0141] As shown in Figure 20, during the first period Tp1, from time t1 to time t2 when a single-line-to-ground fault is detected, the positive-sequence reactive current command value is limited by the upper limit A_1LG. During the second period Tp2, from time t2 after the first period Tp1 has elapsed until time t3 when the fault is removed from the power system, the positive-sequence reactive current command value is limited by the upper limit B_1LG, which is greater than the upper limit A_1LG. During other periods, the positive-sequence reactive current command value Idref output from the AC voltage control unit 35 remains unchanged, i.e., 100% of the positive-sequence reactive current command value Idref is output. The same applies to other types of faults.
[0142] Figure 21 shows an example of a table representing the reverse-phase current command value set by the reverse-phase current command value setting unit 47 of the reverse-phase current control unit 46 in the power converter 1 of Embodiment 2. As shown in Figure 21, the reverse-phase current command value is set to a different value in the first period Tp1 immediately after the occurrence of the grid fault and in the subsequent second period Tp2, depending on the type of grid fault.
[0143] Specifically, the amplitude command value (mag) and phase command value (ph) of the reverse-phase current in the first period Tp1 are set to the same values as those shown in the table in Figure 14, until a certain period has elapsed since the occurrence of a system fault.
[0144] On the other hand, the amplitude command value (mag) of the reverse-sequence current in the second period Tp2, which occurs after the first period Tp1 and until the system fault is removed, is set to a smaller value than the value in the first period Tp1, depending on the type of system fault. This allows the limitation on the positive-sequence reactive current command value Idref in the corresponding second period Tp2 to be relaxed, thereby allowing more positive-sequence reactive current to be supplied to the AC power system 9.
[0145] The phase (ph) of the reverse-sequence current in the second period Tp2 may be the same as the value in the first period Tp1, or it may be changed to a more appropriate value. Furthermore, other aspects of the power converter 1 of Embodiment 2 are the same as those of the power converter 1 of Embodiment 1, so the explanation will not be repeated.
[0146] As described above, according to the power converter 1 of Embodiment 2, the upper limit of the positive-sequence reactive current command value Idref is set to a different value in the first period Tp1 from the occurrence of a fault in the three-phase power system 9 and in the second period Tp2 after the elapsed period Tp1 and until the fault is removed. Similarly, the negative-sequence current command value Inref is also set to a different value in the first period Tp1 and the second period Tp2. As a result, the power converter 2 can supply an appropriate amount of positive-sequence reactive current and negative-sequence reactive current to the AC power system 9, within the range where the input and output currents of the power converter 2 do not exceed the current capacity of the power converter 2, according to the elapsed time after the occurrence of the fault.
[0147] For example, immediately after an unbalanced fault occurs in AC power system 9, it is desirable that reverse-sequence reactive current be preferentially supplied to AC power system 9 to mitigate the imbalance in system voltage and to assist in directional determination by protective relays. Subsequently, after a certain period has elapsed since the occurrence of the unbalanced fault and the voltage drop in the faulty phase and the voltage rise in the non-faulty phase have subsided, it is desirable to suppress the output of reverse-sequence reactive current and increase the output of positive-sequence reactive current in order to raise the overall system voltage.
[0148] Embodiment 3. In the power converter 1 of Embodiment 3, when the fault diagnosis unit 40 determines a two-phase short-circuit fault (2LS, step S70 in Figure 8), it further determines whether it is a nearby two-phase short-circuit fault or a distant two-phase short-circuit fault. The positive-sequence current control unit 44 and the negative-sequence current control unit 46 then set different positive-sequence reactive current command values Idref* and negative-sequence current command values Inref, respectively, for nearby and distant faults. A detailed explanation follows with reference to the drawings.
[0149] Figure 22 is a flowchart illustrating the operation of the fault diagnosis unit 40, the positive-sequence current control unit 44, and the negative-sequence current control unit 46 in the power converter 1 of Embodiment 3. Step S70 in Figure 22 corresponds to step S70 in Figure 8, and Figure 22 shows the operation of the fault diagnosis unit 40 from step S70 onward.
[0150] In step S70 of Figure 22, if the fault diagnosis unit 40 determines that a two-phase short-circuit fault (2LS) has occurred in the AC power system 9, it proceeds to step S71.
[0151] In step S71, the fault diagnosis unit 40 calculates the effective values of the phase-to-phase voltages of the UV phase (i.e., U phase voltage Vu - V phase voltage Vv), the VW phase (i.e., V phase voltage Vv - W phase voltage Vw), and the WU phase (i.e., W phase voltage Vw - Vu) of the AC power system 9. The amplitude values may be calculated instead of the effective values.
[0152] In the next step, S72, the fault diagnosis unit 40 determines whether the minimum of the calculated effective values (or amplitude values) of each line voltage is greater than the determination value Vdet3. Here, the two phases whose effective values of the line voltages are minimized are the short-circuit fault phases.
[0153] Based on the above determination, if the minimum effective value of the line voltage (i.e., the line voltage of the short-circuit fault phase) is less than or equal to the determination value Vdet3 (NO in step S72), the fault diagnosis unit 40 determines that the type of system fault is a nearby two-phase short-circuit fault (step S73). In this case, the line voltage between the faulty phases is approximately 0V, and the voltage of the faulty phase is also approximately 0V.
[0154] On the other hand, if, as a result of the above determination, the minimum effective value of the line voltage (i.e., the line voltage of the short-circuit fault phase) is greater than the determination value Vdet3 (YES in step S72), the fault diagnosis unit 40 determines that the type of system fault is a distant two-phase short-circuit fault (step S74). In this case, the fault phase has a certain voltage value.
[0155] The upper limit of the positive-sequence reactive current command value Idref set in the variable limiter 45 of the positive-sequence current control unit 44, and the negative-sequence current command value Inref set in the negative-sequence current control unit 46, differ depending on whether the fault diagnosis unit 40 determines that a nearby two-phase short-circuit fault is occurring (step S73) or whether the fault diagnosis unit 40 determines that a distant two-phase short-circuit fault is occurring (step S74). In Figure 22, in step S75, which represents the setting value in the case of a nearby two-phase short-circuit fault, "near" is appended to the end of the setting value, and in step S76, which represents the setting value in the case of a distant two-phase short-circuit fault, "far" is appended to the end of the setting value.
[0156] Specifically, in the case of a nearby two-phase short-circuit fault, the voltage drop is significant. Therefore, in order to avoid disconnection of the power supply connected to the AC power system 9, it is desirable to raise the overall system voltage by increasing the output amount of positive-sequence reactive current. Specifically, the upper limit A_2LS_near (step S75) of the positive-sequence reactive current command value Idref in the case of a nearby two-phase short-circuit fault is set to a value greater than the upper limit A_2LS_far (step S76) for the positive-sequence reactive current command value Idref in the case of a distant two-phase short-circuit fault. Correspondingly, the amplitude C(mag)_2LS_near (step S75) of the negative-sequence current command value Inref in the case of a nearby two-phase short-circuit fault is set to a value less than the amplitude C(mag)_2LS_far (step S76) of the negative-sequence current command value Inref in the case of a distant two-phase short-circuit fault.
[0157] Furthermore, since the output of a reverse-phase reactive current is necessary to assist in determining the direction of protective relays in weak power systems, it is not possible to completely reduce the reverse-phase current command value Inref to zero even in the case of a short-circuit fault between two nearby phases.
[0158] Other aspects of the power converter 1 of Embodiment 3 are the same as those of the power converter 1 of Embodiment 1, so the explanation will not be repeated. Furthermore, the power converter 1 of Embodiment 3 can also be combined with the power converter 1 of Embodiment 2.
[0159] As described above, according to the power converter 1 of Embodiment 3, when the fault diagnosis unit 40 determines the fault type to be a two-phase short-circuit fault, it further determines whether it is a nearby two-phase short-circuit fault or a distant two-phase short-circuit fault. In this case, the upper limit of the positive-sequence reactive current command value Idref is set to a different value for nearby two-phase short-circuit faults and distant two-phase short-circuit faults. Similarly, the negative-sequence current command value is set to a different value for nearby two-phase short-circuit faults and distant two-phase short-circuit faults.
[0160] Specifically, in the case of a nearby two-phase short-circuit fault, the voltage drop is significant, so it is necessary to avoid disconnecting the power supply connected to the AC power system 9. For this reason, it is desirable to raise the overall system voltage by increasing the upper limit of the positive-sequence reactive current command value Idref compared to the case of a distant two-phase short-circuit fault. In this case, in order to prevent the input and output currents of the power converter 2 from exceeding the current capacity of the power converter 2, the amplitude setting value of the negative-sequence current command value Inref is set to a smaller value in proportion to the increase in the upper limit of the positive-sequence reactive current command value Idref.
[0161] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this application is indicated by the claims and not by the foregoing description, and all modifications within the meaning and scope equivalent to the claims are intended to be included. [Explanation of Symbols]
[0162] 1 Power converter, 2 Power converter, 3 Control device, 4 Transformer, 5 Converter cell, 9 AC power system (three-phase power system), 10 Arm current detection unit, 11 AC current detection unit, 12 AC voltage detection unit, 15F Full bridge circuit, 15H Half bridge circuit, 16a, 16b Input / output terminals, 17 Energy storage element, 18 Voltage detector, 19 Driver, 20 Input converter, 21 Sample-and-hold circuit, 22 Multiplexer, 23 A / D converter, 25 RAM, 26 ROM, 27 Input / output interface, 28 Auxiliary storage device, 29 Bus, 30 DC voltage control unit, 31 DC voltage representative value calculation unit, 32, 38, 54, 62, 72, 82 Subtractor, 33, 39, 52, 63, 71, 84 Controller, 35 AC voltage control unit, 36 Amplitude calculation unit, 37 Low-pass filter, 40 Fault diagnosis unit, 44 Positive-sequence current control unit, 45 Variable limiter, 46 Negative-sequence current control unit, 47 Negative-sequence current command value setting unit, 50 Output current control unit, 51 Reference voltage calculation unit, 53, 66, 73, 83 Adder, 55a, 55b Three-phase / two-phase coordinate conversion unit, 60 Voltage balance control unit, 61 Voltage representative value calculation unit, 64 Limiter, 65 Multiplier, 67, 74 Constant multiplier, 68 Filter, 70 Circulating current control unit, 80 Voltage command value calculation unit, 81 Two-phase / three-phase coordinate conversion unit, 90 Gate signal generation unit, 95 Voltage command value generation unit, A1, A2, A3 Arm, Iu, Iv, Iw AC current, Id Positive-sequence reactive current, Idnref Negative-sequence reactive current command value, Idref* Final version of positive-sequence reactive current command value, Idref Positive-sequence reactive current command value, Inref Iq: Reverse-sequence current command value, Iqnref: Positive-sequence active current command value, Iqref: Reverse-sequence active current command value, Iu, Iv, Iw: Three-phase AC current, Iuv, Ivw, Iwu: Arm current, Iuvref, Ivwref, Iwuref: Arm current command value, Iz: Circulating current, Izref: Circulating current command value, Q: Semiconductor switching element, UL, VL, WL: AC line, Vdccell: Capacitor voltage, Vdref: d-axis voltage command value, Vqref: q-axis voltage command value, Vu, Vv, Vw: Three-phase AC voltage, Vuvref, Vvwref, Vwuref: Output voltage command value, Vzref: Zero-sequence voltage command value.
Claims
1. A power converter connected to a three-phase power system and performing reactive power input and output to the said three-phase power system, The system includes a control device for controlling the power converter, The control device is A fault diagnosis unit that determines whether or not there is a fault in the three-phase power system and the type of fault in the system based on the three-phase AC voltage detected from the three-phase power system, When it is determined that an unbalanced system fault has occurred, a reverse-phase current control unit generates a reverse-phase current command value according to the type of system fault, An AC voltage control unit calculates a positive-sequence reactive current command value by performing a feedback operation such that the difference between the effective value of the three-phase AC voltage and the AC voltage command value becomes small. A power converter including a positive-sequence current control unit that generates the final version of the positive-sequence reactive current command value by limiting the positive-sequence reactive current command value by an upper limit set according to the type of system fault, so that the input and output currents of the power converter do not exceed the current capacity of the power converter when a system fault is determined to have occurred.
2. The power converter comprises a plurality of arms, each of which includes a plurality of cascaded converter cells. Each of the plurality of converter cells is Input / output terminal pair, A bridge circuit including multiple semiconductor switching elements, Includes a power storage element connected to the input / output terminal pair via the bridge circuit, The control device is A DC voltage control unit calculates a positive-sequence active current command value by performing a feedback calculation such that the difference between the representative voltage of the energy storage elements included in all arms and the DC total voltage command value is minimized. A phase voltage balance control unit calculates a circulating current command value by performing a feedback calculation such that the difference between the representative voltage of the energy storage element in each arm and the representative voltage of the energy storage element in all arms is minimized. A voltage command value generation unit generates output voltage command values for each of the plurality of arms based on the positive-sequence active current command value, the final version of the positive-sequence reactive current command value, the negative-sequence current command value, and the circulating current command value. The power conversion device according to claim 1, further comprising a gate signal generation unit that generates a gate signal for controlling the on / off state of each semiconductor switching element of each converter cell constituting each arm based on the output voltage command value for each arm.
3. The voltage command value generation unit, An output current control unit generates a q-axis voltage command value based on a feedback calculation that minimizes the difference between the sum of the positive-sequence active current command value and the active component of the negative-sequence current command value and the positive-sequence active current calculated from the three-phase current of the three-phase power system, and generates a d-axis voltage command value based on a feedback calculation that minimizes the difference between the sum of the final version of the positive-sequence reactive current command value and the reactive component of the negative-sequence current command value and the positive-sequence reactive current calculated from the three-phase current of the three-phase power system. A circulating current control unit generates a zero-sequence voltage command value by performing a feedback calculation such that the difference between the average value of the current flowing through each arm and the circulating current command value becomes small, The power conversion device according to claim 2, further comprising a voltage command value calculation unit that calculates the output voltage command value of each arm by adding the zero-sequence voltage command value to the voltage command value of each arm calculated from the q-axis voltage command value and the d-axis voltage command value.
4. The aforementioned reverse-phase current command value has an amplitude component and a phase component. The power conversion device according to any one of claims 1 to 3, wherein the phase component of the reverse-phase current command value is set to lead the reverse-phase voltage of the three-phase power system.
5. The power conversion device according to claim 4, wherein the phase component of the reverse-phase current command value is set to 90 degrees or more and 100 degrees or less.
6. The upper limit of the positive-sequence reactive current command value is set to a different value in the first period following the occurrence of the fault in the three-phase power system and in the second period after the elapsed time of the first period and until the system fault is removed. The power conversion device according to any one of claims 1 to 3, wherein the reverse-phase current command value is set to a different value in the first period and the second period.
7. The power converter according to any one of claims 1 to 3, wherein the type of system fault includes a single-line ground fault, a two-line ground fault, a two-phase short-circuit fault, a three-phase short-circuit fault, and a three-line ground fault.
8. When the fault diagnosis unit determines that the type of system fault is a two-phase short-circuit fault, it further determines whether it is a nearby two-phase short-circuit fault or a distant two-phase short-circuit fault. The upper limit of the positive-sequence reactive current command value is set to a different value for the nearby two-phase short-circuit fault and the distant two-phase short-circuit fault. The power converter according to claim 7, wherein the reverse-phase current command value is set to a different value for the nearby two-phase short-circuit fault and the distant two-phase short-circuit fault.
9. A method for controlling a power converter, The power converter is connected to a three-phase power system and performs reactive power input and output to the three-phase power system. The control method described above is: The steps include determining whether there is a fault in the three-phase power system and the type of fault based on the three-phase AC voltage detected from the three-phase power system, If it is determined that an unbalanced system fault has occurred, the process involves generating a reverse-sequence current command value according to the type of system fault, The steps include: calculating a positive-sequence reactive current command value by a feedback calculation that reduces the difference between the effective value of the three-phase AC voltage and the AC voltage command value; A method for controlling a power converter, comprising the step of generating a final version of the positive-sequence reactive current command value by limiting the positive-sequence reactive current command value by an upper limit set according to the type of system fault, so that the input and output currents of the power converter do not exceed the current capacity of the power converter, when it is determined that a system fault has occurred.
10. The power converter comprises multiple arms, each containing multiple converter cells connected in a cascaded configuration. Each of the plurality of converter cells is Input / output terminal pair, A bridge circuit including multiple semiconductor switching elements, Includes a power storage element connected to the input / output terminal pair via the bridge circuit, The control method described above is: The steps include: calculating a positive-sequence active current command value by performing a feedback calculation such that the difference between the representative voltage of the energy storage elements included in all arms and the DC total voltage command value is reduced; The steps include: calculating a circulating current command value by performing a feedback operation such that the difference between the representative voltage of the energy storage element in each arm and the representative voltage of the energy storage element in all arms is reduced; A step of generating output voltage command values for each of the plurality of arms based on the positive-sequence active current command value, the final version of the positive-sequence reactive current command value, the reverse-sequence current command value, and the circulating current command value, The power converter control method according to claim 9, further comprising the step of generating a gate signal for on / off control of each semiconductor switching element of each converter cell constituting each arm, based on the output voltage command value for each arm.
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