Semiconductor equipment

Abstract

To fabricate a display device with threshold-controlled, highly reliable thin-film transistors. The task is to propose a method for doing so. [Solution] A gate insulating film is formed on the gate electrode, and a microcrystalline semiconductor film is formed on the gate insulating film. A film is formed, and impurity elements for threshold control are added to the microcrystalline semiconductor film by ion implantation. Then, a laser beam is irradiated to improve the crystallinity of the microcrystalline semiconductor film. A buffer layer is formed on a semiconductor film to create a channel-etch type thin-film transistor. A display device having the thin-film transistor is manufactured.

Description

[Technical Field]

[0001] This invention relates to a semiconductor device having a circuit composed of thin-film transistors (hereinafter referred to as TFTs). This relates to a device and a method for manufacturing the same. For example, electro-optical devices such as liquid crystal display panels and This invention relates to electronic equipment that incorporates a light-emitting display device having an optical light-emitting element as a component.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This term refers to all types of equipment, and includes electro-optical devices, semiconductor circuits, and electronic devices, all of which are semiconductor equipment. [Background technology]

[0003] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates having insulating surfaces have been used. The technology for constructing thin-film transistors (TFTs) is attracting attention. Thin-film transistors It has been widely applied to electronic devices such as ICs and electro-optical devices, and is particularly used in switches for image display devices. Development as a junction element is being expedited.

[0004] Thin-film transistors using amorphous semiconductor films as switching elements for image display devices, Thin-film transistors using polycrystalline semiconductor films are also employed.

[0005] Thin-film transistors using amorphous semiconductor films include amorphous silicon films such as hydrogenated amorphous silicon films. Because a high-quality semiconductor film is used, there are limitations on the process temperature, specifically 400°C, the point at which hydrogen is desorbed from the film. The above heating processes, as well as laser irradiation at an intensity that would cause surface roughness due to hydrogen in the film, are not performed.

[0006] Furthermore, as a method for forming polycrystalline semiconductor films, in order to prevent surface roughness, amorphous material is used beforehand. After a dehydrogenation treatment is performed to reduce the hydrogen concentration in the silicon film, pulse oscillation excimer A laser beam is processed into a linear shape using an optical system, and then applied to a dehydrogenated amorphous silicon film. In contrast, a technique is known in which crystallization is achieved by irradiating with a linear beam while scanning it.

[0007] Thin-film transistors using polycrystalline semiconductor films are similar to thin-film transistors using amorphous semiconductor films. Compared to that, the mobility is more than two orders of magnitude higher, and the drive circuit for the pixel portion and its surroundings of the display device can be placed on the same substrate. It has the advantage of being able to be formed as a single unit. However, when using an amorphous semiconductor film... In contrast, the process for crystallizing semiconductor films becomes more complex, which reduces the yield. There is the problem of increased strikes.

[0008] Furthermore, FETs (FETs) are semiconductors whose channel formation region consists of a mixture of crystalline and amorphous structures. An ield effect transistor is disclosed in Patent Document 1.

[0009] Furthermore, thin-film transistors using microcrystalline semiconductor films are used as switching elements in image display devices. The character タ is used (Patent Documents 2 and 3).

[0010] Conventional thin-film transistor fabrication methods involve using an amorphous silicon film on a gate insulating film. After forming the film, a metal film is formed on its upper surface, and the metal film is irradiated with a diode laser. Technology for modifying morphous silicon films into microcrystalline silicon films (Non-patent document 1) This is known. According to this method, the metal film formed on the amorphous silicon film is This is for converting the light energy of an iod laser into thermal energy, and is a thin-film transistor. For the completion of the Zista, it was something that should have been removed afterward. That is, transmission from the metal film A method for forming a microcrystalline silicon film by heating only an amorphous silicon film via conduction heating .

PRIOR ART DOCUMENT

PATENT DOCUMENTS

[0011]

Patent Document 1

Patent Document 2

Patent Document 3

NON-PATENT DOCUMENTS

[0012]

Non-Patent Document 1

SUMMARY OF THE INVENTION

PROBLEM TO BE SOLVED BY THE INVENTION

[0013] A thin film transistor is a switching element that turns on when a specific voltage value called threshold voltage (Vth) is applied to a gate electrode and turns off when the voltage is lower than said value. Said threshold voltage (Vth) corresponds to the voltage value at the rising point of the curve obtained when measuring the current-voltage characteristic curve of a thin film transistor. The closer the threshold voltage (Vth) is to 0 V, the more excellent it is , and a thin film transistor having a threshold voltage (Vth) of 0 V can be said to be an ideal switching element.

[0014] Due to unspecified factors in the manufacturing process of thin film transistors, the threshold voltage shifts to the negative side ​​Or it may shift to the positive side. If the value of the shift from 0V is large, This leads to an increase in dynamic voltage, which in turn increases the power consumption of semiconductor devices.

[0015] Even in thin-film transistors using microcrystalline semiconductor films, the threshold can be affected by unspecified factors. The voltage may shift to the negative or positive side.

[0016] In light of the above-mentioned problems, a thin film using a microcrystalline semiconductor film in which the threshold voltage is controlled to a desired value is proposed. One of the objectives is to propose a method for fabricating a display device containing transistors. [Means for solving the problem]

[0017] After forming the gate electrode, a gate insulating film is formed, and a film thickness of 10 nm is applied to the gate insulating film. A microcrystalline semiconductor film of ~50 nm is deposited. Then, a threshold voltage is applied to the microcrystalline semiconductor film. To control this, impurity elements (p-type impurity elements or n-type impurity elements) impart conductivity. ) is added. A small amount of boron is intentionally added to the microcrystalline semiconductor film by ion implantation or other methods. After addition, laser treatment is performed to activate the added boron, and the gate insulating film and microcrystalline semiconductor are activated. This laser treatment improves the crystallinity of the microcrystalline semiconductor film at the interface with the body film in the same process. Laser process (LP) is a method of crystallization by radiant heating. This is a solid-phase crystal growth method that does not involve melting the semiconductor film. In other words, it involves the deposition of microcrystalline semiconductors. This method utilizes the critical region where the film does not enter a liquid phase, and in that sense, it is also called "critical growth." It can be said that.

[0018] In this way, a microcrystalline semiconductor film that functions as a channel-forming region is formed on the gate insulating film. The microcrystalline semiconductor film obtained by performing LP treatment on the deposited microcrystalline semiconductor film is called LPSAS. Laser Process Semi Amorphous Semiconductor It is called a film. Then, after irradiation with laser light, the amorphous semiconductor film is transferred onto the microcrystalline semiconductor film. A buffer layer is stacked. Then, a pair of source and drain regions are placed on the buffer layer. Formed so that a portion of the source region and drain region is exposed, the source region and drain A pair of source and drain electrodes are formed in contact with the region.

[0019] The thin-film transistor having the above configuration has a channel formation region made of a microcrystalline semiconductor film. Therefore, it has a higher field-effect mobility compared to thin-film transistors using conventional amorphous semiconductor films.

[0020] Because a small amount of boron is added to the microcrystalline semiconductor film that functions as a channel-forming region. This enables threshold control of thin-film transistors and prevents oxidation of microcrystalline semiconductor films. Furthermore, Because it has a buffer layer that functions as a high-resistance region, the leakage current of the thin-film transistor It has low pressure resistance and high pressure resistance.

[0021] Furthermore, thin-film transistors (TFTs) are fabricated using microcrystalline semiconductor films, and these thin-film transistors A display device is fabricated using stylus in the pixel section and further in the driving circuit. Microcrystalline semiconductor films are channeled The thin-film transistor used in the ion formation region has a mobility of 1 to 20 cm. 2 / V·sec and It has a mobility 2 to 20 times higher than thin-film transistors that use amorphous semiconductor films in the channel formation region. Therefore, part or all of the drive circuit is integrally formed on the same substrate as the pixel section, and the system A Muon panel can be formed.

[0022] The invention of the method for manufacturing a semiconductor device disclosed herein is configured such that a gate electrode is placed on a substrate. Form an insulating film on the gate electrode, and on the insulating film, a second layer overlapping the gate electrode A semiconductor film is formed, and a p-type or n-type impurity element is added to the first semiconductor film. A second semiconductor film is formed, and a third semiconductor film is formed by irradiating the second semiconductor film with laser light. Formed, a buffer layer is deposited on the third semiconductor film, and n-type impurity elements are deposited on the buffer layer. A fourth semiconductor film containing an element is formed, and a source electrode or drain electrode is placed on the fourth semiconductor film. This is a method for manufacturing a display device that forms an electrode.

[0023] In the above manufacturing method, the first semiconductor film is a microcrystalline semiconductor film, and the third semiconductor film is the This is a microcrystalline semiconductor film with higher crystallinity than semiconductor film 1. In this specification, high crystallinity means: This refers to a high crystalline / amorphous peak intensity ratio (hereinafter referred to as Ic / Ia).

[0024] The present invention solves at least one of the above problems.

[0025] Microcrystalline semiconductor films are produced using high-frequency plasma CVD equipment with frequencies ranging from tens of MHz to hundreds of MHz, This can be formed using a microwave plasma CVD apparatus with a frequency of 1 GHz or higher. Typically, silicon hydride such as SiH4 and Si2H6 can be formed by diluting it with hydrogen. It can also be produced from silicon hydride and hydrogen, as well as helium, argon, krypton, and neon. Microcrystalline semiconductor films can be formed by diluting with one or more selected noble gas elements. The hydrogen flow rate ratio to silicon hydride at these times is preferably between 12 and 1000 times. The ratio should be 50 times or more and 200 times or less, more preferably 100 times. Alternatively, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. can be used. .

[0026] Furthermore, the amount of hydrogen in the microcrystalline semiconductor film obtained by the above film deposition method is normally Because the amount is less than that of hydrogenated amorphous silicon films, heat treatment for dehydrogenation is not required. Both can perform LP processing.

[0027] When depositing a microcrystalline semiconductor film with a thickness of 10 nm to 50 nm on a gate insulating film, the film thickness is thin. Therefore, it is difficult to obtain a highly crystalline film immediately after deposition, but in this invention, LP treatment is performed. To achieve this, even if half of the film is amorphous, at least microcrystalline deposits that serve as growth nuclei will remain in the film after deposition. It is sufficient if multiple crystals are present. Therefore, the margin for the deposition conditions of microcrystalline semiconductor films can be widened. It is possible.

[0028] Furthermore, mass separation is performed on the microcrystalline semiconductor film that forms the channel formation region of the thin-film transistor. Using an ion implantation method, impurity elements that impart conductivity are added, and the threshold voltage is intentionally set. It is controlled by shifting to this. Examples of impurity elements that impart conductivity include phosphorus, arsenic, and boron. Examples include: Phosphorus Examples include fins and diboranes. These are impurity elements that impart conductivity through ion implantation. By adding this, even if the crystallinity decreases compared to immediately after film formation, LP treatment is performed. Ultimately, this can improve crystallinity.

[0029] Furthermore, it is not limited to ion implantation devices, but can also be used to implant ions into microcrystalline semiconductor films with a thickness of 10 nm to 50 nm. If the threshold can be controlled by adding impurity elements that impart electrical properties, then mass separation is not necessary. On-doping devices may be used.

[0030] Impurities that impart conductivity to microcrystalline semiconductor films of 10 nm to 50 nm by ion implantation. To add the desired amount of element, for example, ion injection is performed after forming a silicon nitride film of the desired thickness. The ion implantation may be performed to remove the silicon nitride film, followed by LP treatment. The thickness of the silicon nitride film used for adjustment is determined by the concentration profile of the dopant ion-implanted in the sample. It can be calculated from the file. Also, the dopant gas used in the ion implantation method for mass separation and do B 10 H 14 B 18 H 22 If ion implantation is performed using this method, the added material to the gate insulating film will This allows for a reduction in the amount of boron used, and enables the addition of a desired amount of boron to microcrystalline semiconductor films of 10 nm to 50 nm. It can be made to happen.

[0031] Doping for threshold control is performed using ion implantation devices or ion doping devices. This damages the microcrystalline semiconductor film, but by performing LP treatment after doping, The image can be restored, and depending on the LP processing conditions, the microcrystalline semiconductor film before doping is even better. It can also improve crystallinity.

[0032] Alternatively, the microcrystalline semiconductor film may be irradiated with a laser beam and heated. Typically, the substrate is heated to a temperature of 300°C to 400°C while shining a laser beam on it. By irradiating, it is possible to increase the crystallinity of microcrystalline semiconductor films. The body membrane is irradiated with a laser beam and strong light to instantaneously change the temperature of the microcrystalline semiconductor film. The value may be increased. Typical examples of strong light include infrared light, especially light with a peak at 1 μm to 2 μm. Infrared light (preferably halogen light (1.3 μm)) can be used.

[0033] Furthermore, if a thin oxide film is formed during LP treatment, it should be removed by wet etching. This is preferable. By removing the oxide film, the interface between the LPSAS film and the buffer layer is formed. It is possible to reduce the inhibition of carrier movement by oxide films. Furthermore, LPSAS film The thickness of the LPSAS film may be reduced by etching. By setting the wavelength to 50 nm or less, it is possible to fabricate fully depleted thin-film transistors.

[0034] Furthermore, it is preferable to clean the surface of the microcrystalline semiconductor film before LP treatment. By cleaning, impurities adhering to the surface of the microcrystalline semiconductor film are removed by irradiation with a laser beam. This prevents contamination of the crystalline semiconductor film.

[0035] Furthermore, after LP treatment, ion implantation is performed, followed by a second LP treatment or heat treatment. Alternatively, the configuration of another invention may involve forming a gate electrode on a substrate and an insulating film on the gate electrode. A first semiconductor film is formed on the insulating film, and a first semiconductor film overlapping the gate electrode is deposited on the insulating film. A second semiconductor film is formed by irradiating a semiconductor film with a first laser beam, and p is applied to the second semiconductor film. A third semiconductor film is formed by adding an n-type impurity element or an n-type impurity element, and the third semiconductor A second laser beam is irradiated onto the body membrane to form a fourth semiconductor film, and a batch is placed on the fourth semiconductor film. A buffer layer is formed, and a fifth semiconductor film containing n-type impurity elements is formed on the buffer layer. The fifth method for fabricating a display device in which a source electrode or drain electrode is formed on a semiconductor film. ru.

[0036] In the above manufacturing method, the first semiconductor film is a microcrystalline semiconductor film, and the fourth semiconductor film is the This is a microcrystalline semiconductor film with higher crystallinity than semiconductor film 1.

[0037] The present invention solves at least one of the above problems.

[0038] If the crystallinity of the microcrystalline semiconductor film is improved beforehand by LP treatment, then ion implantation can be performed. This prevents the film from becoming completely amorphous. Also, the first LP treatment and the second The LP treatment does not have to be under the same conditions. The oxide film formed during the second LP treatment is It is preferable to remove it before the fa layer is formed. Also, when heat treatment is performed after ion implantation. Even in this case, an oxide film is formed on the surface, so it is preferable to remove it before the buffer layer is formed. It seems so.

[0039] Furthermore, it is not limited to ion implantation after film formation, but also to controlling the threshold of thin-film transistors. Furthermore, a microcrystalline semiconductor film is formed by incorporating a small amount of boron or phosphorus during film formation, and after film formation... LP processing may be performed, and in the configuration of another invention, a gate electrode is formed on the substrate, and the gate An insulating film is formed on the electrode, and the insulating film contains a p-type impurity element or an n-type impurity element. A semiconductor film 1 is formed, and the first semiconductor film is irradiated with laser light to form a second semiconductor film. Then, a buffer layer is formed on the second semiconductor film, and n-type impurity elements are added to the buffer layer. A third semiconductor film is formed, and a source electrode or drain electrode is placed on the third semiconductor film. This is a method for manufacturing the display device to be formed.

[0040] In the above manufacturing method, the first semiconductor film is a microcrystalline semiconductor film, and the second semiconductor film is the This is a microcrystalline semiconductor film with higher crystallinity than semiconductor film 1.

[0041] The present invention solves at least one of the above problems.

[0042] When a microcrystalline semiconductor film is formed by incorporating a small amount of boron during film deposition, and then LP treatment is performed after film deposition. Unlike ion implantation after film formation, this method does not require an additional step to activate boron. Therefore, the LP treatment here improves the crystallinity. A small amount of boron is present during film formation. When forming a microcrystalline semiconductor film and performing LP treatment after film formation, an ion implantation process or ion implantation process is required. Because processes such as the cleaning step before injection are reduced, it can be said to be a process suitable for mass production. One method for incorporating a small amount of boron is to use diborane gas as one of the deposition gases during film formation. This can be done by introducing it into a film chamber. Furthermore, it contains trace amounts of phosphorus during film formation. One method for forming a microcrystalline semiconductor film involves, for example, using a small amount of f as one of the deposition gases during film formation. This can be done by introducing a fosphing gas into the film deposition chamber.

[0043] Furthermore, a display device obtained using each of the above manufacturing methods is also one of the present inventions, and its configuration is based A p-type circuit with a gate electrode on a plate, an insulating film on the gate electrode, and a gate electrode overlapping the insulating film. A first semiconductor film containing an impurity element or an n-type impurity element, and a buff on the first semiconductor film. A buffer layer, a second semiconductor film containing n-type impurity elements on the buffer layer, and on the second semiconductor film A display device having a source electrode or a drain electrode.

[0044] Furthermore, the display device includes light-emitting devices and liquid crystal display devices. The light-emitting device includes light-emitting elements. A liquid crystal display device includes liquid crystal elements. The brightness of the light-emitting element is controlled by current or voltage. This category includes elements such as inorganic EL (Electroluminescent Lumines). This includes CENCE, OLED, etc.

[0045] Furthermore, the display device includes a panel in which the display elements are sealed, and a control on the panel The present invention includes a module on which ICs, etc., including RA are mounted. Furthermore, the present invention relates to the display device. With respect to an element substrate that corresponds to one form before the display element is completed in the process of manufacturing the element, The element substrate is provided with means for supplying current to the display element at each of the multiple pixels. Specifically, the display element may be in a state where only the pixel electrodes are formed, or the pixel electrodes and This is the state after a conductive film has been formed, but before etching to form pixel electrodes. That's fine, and it applies to all forms.

[0046] In this specification, a display device refers to an image display device, a light-emitting device, or a light display device. This refers to the power source (including lighting equipment). It also refers to connectors, such as FPC (Flexible Printed Circuit). (inted circuit) or TAB (Tape Automated Bon (ding) tape or TCP (Tape Carrier Package) Modules that have a printed circuit board attached to the end of the TAB tape or TCP. The display element or IC (integrated circuit board) is integrated using the COG (Chip On Glass) method. All modules in which the road is directly implemented are also included in the display device. [Effects of the Invention]

[0047] A microcrystalline semiconductor film containing p-type or n-type impurity elements is used as the channel formation region. Furthermore, by intentionally incorporating p-type or n-type impurity elements into the microcrystalline semiconductor film, This makes it possible to realize a thin-film transistor in which the key voltage is controlled to a desired value. [Brief explanation of the drawing]

[0048] [Figure 1] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 2] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 3] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 4] This figure shows a top view of the manufacturing process of the present invention. [Figure 5] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 6] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 7] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 8] This figure illustrates a multi-gradation mask applicable to the present invention. [Figure 9] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 10] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 11] A diagram showing a cross-sectional view of the manufacturing process of the present invention. [Figure 12] This figure shows a top view of the manufacturing process of the present invention. [Figure 13] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 14] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 15] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 16] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 17] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 18] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 19] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 20] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 21] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 22] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 23] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 24] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 25] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 26] This is a diagram illustrating the liquid crystal display device of the present invention. [Figure 27] This is a cross-sectional view illustrating a method for manufacturing a light-emitting device according to the present invention. [Figure 28] This is a cross-sectional view illustrating a pixel applicable to the light-emitting device of the present invention. [Figure 29] This is a perspective view illustrating the display panel of the present invention. [Figure 30] This is a perspective view illustrating an electronic device using the light-emitting device of the present invention. [Figure 31] This figure illustrates an electronic device using the light-emitting device of the present invention. [Figure 32] This is a block diagram illustrating the configuration of the light-emitting device of the present invention. [Figure 33] This is an equivalent circuit diagram illustrating the configuration of the drive circuit for the light-emitting device of the present invention. [Figure 34] This is an equivalent circuit diagram illustrating the configuration of the drive circuit for the light-emitting device of the present invention. [Figure 35] This is a top view illustrating the layout of the drive circuit for the light-emitting device of the present invention. [Figure 36] These are a top view and a cross-sectional view illustrating the display panel of the present invention. [Figure 37] These are a top view and a cross-sectional view illustrating the display panel of the present invention. [Modes for carrying out the invention]

[0049] Embodiments of the present invention are described below. However, the present invention can be implemented in many different forms. It is possible to make such a form and details without departing from the spirit and scope of the present invention. Those skilled in the art will readily understand that the details can be changed in various ways. Therefore, the details of this embodiment The interpretation is not limited to the content stated herein.

[0050] (Embodiment 1) In this embodiment, the process for fabricating thin-film transistors used in liquid crystal display devices is shown in Figure This will be explained using Figures 1 to 4. Figures 1 to 3 are cross-sectional images showing the fabrication process of a thin-film transistor. Figure 4 is a top view of the connection region between the thin-film transistor and the pixel electrode in a single pixel. be.

[0051] Thin-film transistors with microcrystalline semiconductor films have higher mobility in the n-type than in the p-type, therefore... It is more suitable for use in dynamic circuits. All thin-film transistors formed on the same substrate are the same Matching the polarity is desirable in order to reduce the number of processes. Here, n channels The problem is solved using a thin-film transistor of a certain type.

[0052] As shown in Figure 1(A), a gate electrode 51 is formed on the substrate 50. The substrate 50 has burrs. Aluminoborosilicate glass, aluminoborosilicate glass, or aluminosilicate glass Alkali-free glass substrates and ceramic substrates fabricated by fusion or float methods, etc. In addition, a plastic substrate or the like with heat resistance that can withstand the processing temperature of this manufacturing process is used. It is also possible to apply a substrate in which an insulating film is provided on the surface of a metal substrate such as a stainless steel alloy. That's good too. If the board 50 is the mother glass, the size of the board is the first generation (320mm x 40 0mm), 2nd generation (400mm x 500mm), 3rd generation (550mm x 650mm) , 4th generation (680mm x 880mm, or 730mm x 920mm), 5th generation (1 000mm x 1200mm or 1100mm x 1250mm), 6th generation (1500m m x 1800mm), 7th generation (1900mm x 2200mm), 8th generation (2160m m x 2460mm), 9th generation (2400mm x 2800mm, 2450mm x 3050 You can use sizes such as (mm), 10th generation (2950mm x 3400mm), etc.

[0053] The gate electrode 51 is made of titanium, molybdenum, chromium, tantalum, tungsten, and aluminum. It is formed using a metal material such as mol or an alloy material thereof. The gate electrode 51 is sputtered A conductive film is formed on the substrate 50 by a vapor deposition or vacuum deposition method, and photolithography is applied to the conductive film. A mask is formed by technology or an inkjet method, and a conductive film is etched using the mask. It can be formed by applying a conductive nanopaste such as silver, gold, or copper. The gate electrode 51 can also be formed by extruding and firing it using an inkjet method. Furthermore, the above-mentioned metal is used as a barrier metal to improve the adhesion of the gate electrode 51 and prevent diffusion into the substrate. A nitride film of the same material may be provided between the substrate 50 and the gate electrode 51. Here, the first A conductive film formed on the substrate 50 using a resist mask formed using a photomask. The gate electrode is formed by etching.

[0054] A specific example of a gate electrode structure is to stack a molybdenum film on an aluminum film, The structure may also be designed to prevent hillock and electromigration, which are characteristic of luminium. Alternatively, a three-layer structure in which an aluminum film is sandwiched between molybdenum films may be used. Examples of structures include lamination of molybdenum film on copper film, lamination of titanium nitride film on copper film, and on copper film One example is the lamination of tantalum nitride films.

[0055] Furthermore, since a semiconductor film and wiring will be formed on the gate electrode 51, the edges will be designed to prevent breakage. It is desirable to process it into a tapered shape. Also, although not shown in the diagram, a gate is used in this process. Wiring to connect to the electrodes can also be formed at the same time.

[0056] Next, gate insulating films 52a, 52b, 52c and a microcrystalline semiconductor film 2 are placed on the gate electrode 51. 3a is formed in order. The cross-sectional view after completing the steps up to this point corresponds to Figure 1(A). Note that Without exposing the insulating films 52a, 52b, and 52c and the microcrystalline semiconductor film 23a to the atmosphere It is preferable to deposit the film continuously. By depositing the film continuously, atmospheric components and airborne particles can be removed. Since each layer interface can be formed without contamination by polluting impurity elements, thin film trauma This can reduce variations in the characteristics of the transistor.

[0057] The gate insulating films 52a, 52b, and 52c are each manufactured using methods such as CVD and sputtering. Therefore, it can be formed with a silicon oxide film, silicon nitride film, silicon oxide nitride film, or silicon nitride oxide film. Yes, it is possible. In order to prevent interlayer short circuits caused by pinholes etc. formed in the gate insulating film 52, It is preferable to use a multilayer insulating layer. Here, gate insulating films 52a, 52b , 52c is a form formed by stacking silicon nitride film, silicon oxidized nitride film, and silicon nitride film in that order. This indicates.

[0058] Here, a silicon oxide nitride film is defined as a film whose composition has a higher oxygen content than nitrogen. And there is the Rutherford Backscattering Method (RBS). Hydrogen forward scattering (HFS) and hydrogen spectrometry (Spectrometry) When measured using (forward scattering), the concentration range is Oxygen is 50-70 atomic%, nitrogen is 0.5-15 atomic%, silicon is 25-35 atomic%, and hydrogen is This refers to substances contained in the range of 0.1 to 10 atomic percent. Furthermore, the silicon nitride oxide film refers to its composition. As such, it is a substance with a higher nitrogen content than oxygen, and is measured using RBS and HFS. In that case, the concentration range would be 5-30 atomic percent oxygen, 20-55 atomic percent nitrogen, and 25 atomic percent Si. This refers to materials containing approximately 35 atomic percent, with hydrogen in the range of 10 to 30 atomic percent.

[0059] The thickness of both the first and second layers of the gate insulating film 52 is greater than 50 nm. The first layer of the border film is nitrogen to prevent the diffusion of impurities (such as alkali metals) from the substrate. A silicon dioxide film or a silicon nitride film is preferred. Also, the first layer of the gate insulating film 52 is the gate In addition to preventing oxidation of electrodes, it can also prevent hillock formation when aluminum is used for the gate electrode. Furthermore, the third layer of the gate insulating film 52 in contact with the microcrystalline semiconductor film is thicker than 0 nm and less than 10 nm. The third layer of the gate insulating film 52 is designed to improve adhesion with the microcrystalline semiconductor film. It is provided. Furthermore, by making the third layer of the gate insulating film 52 a silicon nitride film, subsequent steps can be taken. This can prevent oxidation of microcrystalline semiconductor films caused by heat treatment or laser irradiation. For example, When a heat treatment is performed with an insulating film containing a high oxygen content and a microcrystalline semiconductor film in contact, the microcrystalline semiconductor film... The conductive film may oxidize.

[0060] Furthermore, the gate insulating film 52 is processed using a microwave plasma CVD apparatus with a frequency of 1 GHz. It is preferable to form a silicon oxide nitride film, nitrogen formed by a microwave plasma CVD apparatus. Silicon oxide films have high breakdown voltage, which can improve the reliability of thin-film transistors.

[0061] Furthermore, the microcrystalline semiconductor film 23a is an intermediate between amorphous and crystalline structures (including single crystals and polycrystalline structures). It is a film containing a semiconductor structure. This semiconductor has a third state that is stable in terms of free energy. A semiconductor having short-range order and lattice distortion, which is crystalline and has a particle size of 0 Columnar or needle-shaped crystals with a size of 0.5 to 20 nm are growing in the direction normal to the substrate surface. Microcrystalline semiconductors and non-single-crystal semiconductors coexist. A typical example of a microcrystalline semiconductor is a microcrystalline semiconductor. Silicon exhibits a Raman spectrum of 520.5 cm², which is characteristic of single-crystal silicon. -1 Lower It is shifted towards the wavenumber side. That is, 520.5 cm², which represents single-crystal silicon. -1 and Amorph 480cm showing fast silicone -1 The peaks in the Raman spectrum of microcrystalline silicon during this time are Yes. Also, hydrogen or halogen is used to terminate dangling bonds. It contains at least 1 atom percent or more. Furthermore, helium, argon, and krypton. By adding noble gas elements such as neon, the lattice distortion is further amplified, increasing stability. A good microcrystalline semiconductor film can be obtained. A description of such a microcrystalline semiconductor film can be found, for example, This is disclosed in U.S. Patent No. 4,409,134.

[0062] This microcrystalline semiconductor film 23a is used in high-frequency plasma CV with frequencies ranging from tens of MHz to hundreds of MHz. It can be formed by a D apparatus or a microwave plasma CVD apparatus with a frequency of 1 GHz or higher . Typically, silicon hydride such as SiH₄, Si₂H₆ is diluted with hydrogen to form the microcrystalline semiconductor film. In addition to silicon hydride and hydrogen, the microcrystalline semiconductor film can also be formed by diluting with one or more kinds of rare gas elements selected from helium, argon, krypton and neon . In these cases, the flow rate ratio of hydrogen to silicon hydride is set to 12 times or more and 1000 times or less, preferably 50 times or more and 200 times or less, more preferably 100 times. In addition, instead of silicon hydride , SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄ or the like can be used .

[0063] In addition, the oxygen concentration of the microcrystalline semiconductor film 23a is set to 5×10 19 atoms / cm 3 or less, preferably 1×10 atoms / cm 19 or less, and the concentration of each of nitrogen and carbon is preferably set to 3×10 3 or less, wherein the concentration of each of nitrogen and carbon is 3×10 18 atoms / cm 3 or less. By reducing the concentration of oxygen, nitrogen and carbon mixed into the microcrystalline semiconduc tor film, it can be prevented that the microcrystalline semiconductor film becomes n-type .

[0064] The film thickness of the microcrystalline semiconductor film 23a is 1 nm or more and 20 nm or less, preferably 2 nm or more and 10 n m or less. In the LP processing performed later, when the film thickness of the microcrystalline semiconductor film 23a is 4 nm to 8 n m, the absorptivity of the laser beam can be improved, so the film thickness is preferably set to 2 nm or more and less than 10 nm By setting the microcrystalline semiconductor film 23a within the above film thickness range, the thin film transistor to be formed later becomes a fully depleted type. In addition, the deposition rate of the microcrystalline semiconductor film 23a is non- Because the deposition rate is slow, 1 / 10 to 1 / 100 of that of crystalline semiconductor films, thinning the film thickness allows for smoother deposition. - It can improve output.

[0065] Furthermore, before depositing the microcrystalline semiconductor film 23a, the surface of the gate insulating film 52c is treated with hydrogen plasma The gate insulating film and the microcrystalline semiconductor film may be processed. By hydrogen plasma treatment, the gate insulating film and the microcrystalline semiconductor film may be processed. It is possible to reduce lattice strain at the interface between the gate insulating film and the microcrystalline semiconductor film. Surface characteristics can be improved. Therefore, the electrical characteristics of the thin-film transistor formed later... It can improve sexual performance.

[0066] Next, in order to control the threshold, an impurity element that imparts conductivity is implanted by ion implantation. The film is added graphically. The microcrystalline semiconductor film 23a immediately after deposition exhibits weak n-type electrical conductivity. Here, channel doping is performed by adding a small amount of boron to control the threshold. Thus, as shown in Figure 1(B), a boron-containing microcrystalline semiconductor film 23b is obtained. By on-implantation, the microcrystalline semiconductor film 23a containing boron is produced compared to the microcrystalline semiconductor film 23a immediately after deposition. The crystalline semiconductor film 23b exhibits reduced crystallinity.

[0067] Next, in order to improve the crystallinity of the microcrystalline semiconductor film 23a immediately after deposition, A laser beam is shone from the surface side. The energy of the laser beam dissolves the microcrystalline semiconductor film. The laser beam is irradiated with non-melting energy. Because the gate electrode 51 is located below, the laser beam The energy range should be determined by considering the diffusion of heat. Therefore, the laser beam Depending on the energy of the pulse, the microcrystalline semiconductor film in the region that does not overlap with the gate electrode 51 will melt. On the other hand, the region overlapping with the gate electrode 51 may not melt. Because the film quality formed differs between the region and the region that does not overlap with the gate electrode, in this embodiment Preferably, the semiconductor layer used as a thin-film transistor is limited to the region that overlaps with the gate electrode. This uses the region that overlaps with the gate electrode, excluding the tapered portion of the gate electrode. The film material is the same microcrystal. By using a semiconductor film as the channel formation region, the characteristic variations between multiple thin-film transistors can be reduced. It can be reduced.

[0068] The laser beam can be directed to the interface between the microcrystalline semiconductor film and the gate insulating film 52c. This allows the crystals on the surface side of the microcrystalline semiconductor film to act as a seed, and gate insulation is released from the surface. A microcrystalline semiconductor film, known as a LPSA, is formed by solid-phase crystal growth at the interface of the edge film, resulting in improved crystallinity. S film 53 can be formed (see Figure 1(C)). Solid-phase crystal growth by LP treatment is This does not increase the grain size, but rather improves the crystallinity in the thickness direction of the film. In other words, LP treatment improves the crystallinity near the gate insulating film of the microcrystalline semiconductor film. This improves the electrical characteristics of thin-film transistors having a bottom gate structure.

[0069] Furthermore, the LP treatment here also activates the boron added to the microcrystalline semiconductor film. Yes, it is possible. The boron contained in the microcrystalline semiconductor film controls the threshold voltage to a desired value. Thin-film transistors can be obtained. For example, by using boron contained in a microcrystalline semiconductor film If the threshold voltage can be controlled to 0V or a negative threshold voltage, thin film transistors When the gate voltage applied to the gate of the transistor is set to 0V, the thin-film transistor is in the off state. It can be used as a normally-off switching element.

[0070] When using an excimer laser as the laser beam, the pulse oscillation frequency should be 1 Hz or higher and 10 MHz or higher. The frequency should be less than Hz, preferably 100 Hz to 10 kHz, and the laser energy should be 0.2 to 0.3 5J / cm 2 (Typically 0.2~0.3 J / cm) 2 ) Also, using a YAG laser If present, use its third harmonic and set the pulse oscillation frequency to 1 Hz or more and less than 10 MHz. - The energy is 0.2~0.35 J / cm³ 2 (Typically 0.2~0.3 J / cm) 2 ) That would be good.

[0071] A laser oscillator that emits a laser beam can perform pulsed or continuous oscillation. A capable laser oscillator can be used. Furthermore, the laser wavelength allows for efficient laser application to the semiconductor film. The beam is absorbed in the visible to ultraviolet region (below 800 nm), preferably in the ultraviolet region. (400 nm or less). Illuminate with a laser beam in the ultraviolet region with a wavelength of 300 nm to 400 nm. By irradiating, it is efficiently absorbed by the microcrystalline semiconductor film. As for the laser oscillator, KrF, Excimer laser oscillators such as ArF, XeCl, XeF, N2, He, He-Cd, Ar, Gas laser oscillators such as He-Ne, HF, CO2, YAG, GdVO4, YVO4, YL Crystals such as F, YAlO3, ScO3, Lu2O3, and Y2O3 contain Cr, Nd, Er, and Ho Solid-state laser oscillators using crystals doped with Ce, Co, Ti, Yb, or Tm, KG Solid-state lasers such as W lasers, KYW lasers, alexandrite lasers, and Ti:sapphire lasers. Metal vapor laser oscillators such as helium-cadmium lasers can be used. In solid-state laser oscillators, it is preferable to apply the second to fifth harmonics of the fundamental wave. It's nice.

[0072] Typically, laser beams with wavelengths of 400 nm or less, and typically 308 nm, are excitoelectric. This method uses a male laser beam or the third harmonic (355 nm) of a YAG laser.

[0073] LP processing focuses the light into a rectangular, elongated shape to create a linear laser beam, for example, 730mm x 9 A microcrystalline semiconductor film 23b on a 20mm glass substrate is processed in a single laser beam scan. This is possible. In this case, the ratio of overlapping linear laser beams (overlap rate) This is done with a rate of 0-95% (preferably 0-67%). This is how processing is done per substrate. Time can be reduced and productivity can be improved. The shape of the laser beam is limited to a linear shape. It can be processed in the same way not only as a solid but also as a surface. Furthermore, this LP treatment is the same as the glass treatment. It is not limited to the size of the substrate and can be applied to a variety of things.

[0074] Furthermore, when using a continuous-oscillation laser beam, polygon mirrors and glass mirrors are used. By placing a Rubano mirror between the oscillator and the substrate and scanning the laser beam at high speed, LP It is possible to improve processing throughput, for example, a 730mm x 920mm glass Microcrystalline semiconductor films formed on lath substrates or even larger glass substrates are subjected to LP treatment. It is possible.

[0075] Furthermore, laser beams can be used in argon, hydrogen, argon and hydrogen, nitrogen, and other atmospheres. The laser beam may be irradiated onto the microcrystalline semiconductor film 23b in an inert atmosphere. By irradiating a microcrystalline semiconductor film with a light, an oxide film is formed on the surface of the LPSAS film 53. Kui.

[0076] Furthermore, before irradiating the microcrystalline semiconductor film 23b with a laser beam, the surface of the microcrystalline semiconductor film 23b is... By cleaning the surface, any deposits adhering to the surface of the microcrystalline semiconductor film 23b during channel doping, etc. This prevents impurities from being mixed into the microcrystalline semiconductor film by laser beam irradiation. ru.

[0077] Alternatively, the microcrystalline semiconductor film may be irradiated with a laser beam and heated. Typically, the substrate 50 is heated to 300°C to 400°C while being irradiated with a laser beam. This makes it possible to improve the crystallinity of the microcrystalline semiconductor film 23b. Alternatively, microcrystalline semiconductor By irradiating the conductive film 23b with a laser beam and strong light, a microcrystalline semiconductor is instantaneously formed. The temperature of film 23b may be increased. Typical examples of strong light include infrared light, especially 1 μm to 2 μm. Infrared light having a peak at m (preferably halogen light (1.3 μm)) can be used. ru.

[0078] Next, as shown in Figure 1(D), a buffer layer 54 and a single conductivity type are placed on the LPSAS film 53. A semiconductor film 55 with impurities to be added is formed. The laser beam irradiates it, forming LPS If an oxide film is formed on the surface of the AS film 53, it is removed before forming the buffer layer 54. It is preferable.

[0079] The buffer layer 54 is formed using an amorphous semiconductor film containing hydrogen, nitrogen, or halogen. The flow rate of silicon hydride is 1 to 10 times, more preferably 1 to 5 times. Using hydrogen, an amorphous semiconductor film containing hydrogen can be formed. By using an element and nitrogen or ammonia, an amorphous semiconductor film containing nitrogen can be formed. This can be done. Also, the above silicon hydride and a gas (F) containing fluorine, chlorine, bromine, or iodine can be used. 2. By using Cl2, Br2, I2, HF, HCl, HBr, HI, etc., fluorine, Amorphous semiconductor films containing chlorine, bromine, or iodine can be formed. Instead of silicon, use SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. It is possible.

[0080] Furthermore, the buffer layer 54 uses an amorphous semiconductor as the target and spalls hydrogen or a noble gas. Amorphous semiconductor films can be formed by tarring. At this time, ammonia, nitrogen, Alternatively, by incorporating N2O into the atmosphere, an amorphous semiconductor film containing nitrogen can be formed. This can be done. Also, gases containing fluorine, chlorine, bromine, or iodine (F2, C) in the atmosphere can be used. By including (I2, Br2, I2, HF, HCl, HBr, HI, etc.), fluorine, Amorphous semiconductor films containing chlorine, bromine, or iodine can be formed.

[0081] Furthermore, as a buffer layer 54, the surface of the LPSAS film 53 is subjected to plasma CVD or spallation. After forming an amorphous semiconductor film by the taring method, the surface of the amorphous semiconductor film is treated with hydrogen plasma. The surface of an amorphous semiconductor film is hydrogenated by treatment with nitrogen plasma or halogen plasma. It may be ionized or halogenated. Alternatively, the surface of the amorphous semiconductor film may be treated with helium plasma. Alternatively, the treatment may be performed using neon plasma, argon plasma, krypton plasma, etc.

[0082] The buffer layer 54 is preferably formed from an amorphous semiconductor film that does not contain crystal grains. Therefore, high-frequency plasma CVD methods with frequencies ranging from tens of MHz to hundreds of MHz, or microwave plasma When forming using the Zuma CVD method, the deposition strip should be designed to create an amorphous semiconductor film that does not contain crystal grains. It is preferable to control the number of cases.

[0083] The buffer layer 54, in the subsequent process of forming the source region and drain region, partially... Chining occurs. At that time, a part of the buffer layer 54 is so that the LPSAS film 53 is not exposed. It is preferable to form it with the remaining thickness. Typically, 100 nm to 400 nm. Preferably, it is formed with a thickness of 200 nm to 300 nm. Display devices with high applied voltages to the zista (for example, around 15V), typically liquid crystal displays, Therefore, if the thickness of the buffer layer 54 is formed to be as shown in the above range, the pressure resistance will be increased, and thin Even when a high voltage is applied to the film transistor, this prevents the film transistor from degrading. It is possible.

[0084] Furthermore, the buffer layer 54 is doped with impurities that impart a single conductivity type, such as phosphorus or boron. No. The LPSAS film 53 contains a small amount of boron to control the threshold. The impurities, which impurities that impart a single conductivity type, diffuse from the semiconductor film 55 to the LPSAS film. To prevent this, buffer layer 54 functions as a barrier layer. In combination, the LPSAS film and the semiconductor film 55 to which impurities that impart a single conductivity type are added come into contact. If impurities migrate during subsequent etching or heating processes, threshold control becomes difficult. There is fear.

[0085] Furthermore, by forming a buffer layer 54 on the surface of the LPSAS film 53, the LPSAS film 53 It is possible to prevent spontaneous oxidation of the surface of the crystal grains contained in the material. In particular, amorphous semiconductors and In regions where microcrystalline grains are in contact, cracks are prone to forming due to local stress. These cracks come into contact with oxygen. The crystal grains are then oxidized, and silicon oxide is formed.

[0086] The energy gap of the amorphous semiconductor buffer layer 54 is compared to the LPSAS film 53. Largely (the energy gap of amorphous semiconductor films is 1.6~1.8 eV, LPSAS film 53 Its energy gap is 1.1-1.5 eV, and it has high resistance and low mobility, LPS It is 1 / 5 to 1 / 10 the size of the AS film 53. Therefore, in the thin-film transistors that are formed later... Then, a buffer layer is formed between the source region and the drain region and the LPSAS film 53. This functions as a high-resistance region, and the LPSAS film 53 functions as a channel-forming region. Therefore, the off-current of the thin-film transistor can be reduced. When used as a switching element in a display device, it improves the contrast of the display device. It is possible.

[0087] Furthermore, a buffer layer 54 is applied to the LPSAS film 53 by plasma CVD at 300°C to 40°C. It is preferable to deposit the film at a temperature of 0°C. This film deposition process allows hydrogen to be deposited into the LPSAS film 53. It is supplied, and an effect equivalent to hydrogenating the LPSAS membrane 53 is obtained. That is, LPS By depositing a buffer layer 54 on the AS film 53, hydrogen is diffused into the LPSAS film 53. This allows for the termination of dangling bonds.

[0088] Furthermore, the semiconductor film 55 to which impurities that impart a single conductivity type are added is an n-channel thin film tracer. When forming a hydrogenator, phosphorus can be added as a typical impurity element, and hydrogenation Adding an impurity gas such as pH3 to silicon is sufficient. Also, p-channel thin-film transistors... When forming it, boron can be added as a typical impurity element, and silicon hydride You can add impurity gases such as B2H6. A semiconductor with impurities that impart a single conductivity type has been added. The body film 55 can be formed from a microcrystalline semiconductor or an amorphous semiconductor. One conductivity type is attached. The semiconductor film 55 to which the impurities are added is formed with a thickness of 2 nm to 50 nm. By reducing the thickness of a semiconductor film to which conductive impurities are added, throughput can be increased. It can be improved.

[0089] Next, as shown in Figure 2(A), a semiconductor film 55 to which impurities that impart a single conductivity type are added. A resist mask 56 is formed on top. The resist mask 56 is made using photolithography technology. Alternatively, it is formed by an inkjet method. Here, a second photomask is used to create a conductive material. A resist coated on a semiconductor film 55 to which impurities that impart a pattern are added is exposed and developed. A resist mask 56 is formed.

[0090] Next, the resist mask 56 is used to create the LPSAS film 53, buffer layer 54, and conductive type The semiconductor film 55 to which the impurities to be added are etched and separated, as shown in Figure 2(B). A sea urchin, an LPSAS film 61, a buffer layer 62, and an impurity that imparts a single conductivity type are added. A semiconductor film 63 is formed. After this, the resist mask 56 is removed.

[0091] Because the edges of the LPSAS film 61 and buffer layer 62 are inclined, the buffer layer 6 2 A leakage current is generated between the source region and drain region formed on the LPSAS film 61. It is possible to prevent this from happening. Also, the source electrode and drain electrode, and LPS It is possible to prevent leakage current from occurring between the AS film 61 and the LPSAS film 6. The inclination angle of the end side surface of 1 and buffer layer 62 is 90° to 30°, preferably 80° to 4°. It is 5°. By setting this angle, the source electrode or drain electrode will have a stepped shape. This prevents the poles from breaking off at a step.

[0092] Next, as shown in Figure 2(C), the semiconductor film 63 to which impurities that impart a single conductivity type are added and Conductive films 65a to 65c are formed so as to cover the gate insulating film 52c. 5c is aluminum, copper, or silicon, titanium, neodymium, scandium, molybdenum A single layer of aluminum alloy to which heat-resistant elements such as ions or hillock-preventing elements have been added. Alternatively, it is preferable to form them in a laminated manner. Furthermore, a semiconductor to which impurities that impart a single conductivity type are added. The film in contact with the conductive film is made of titanium, tantalum, molybdenum, tungsten, or one of these materials. A laminate formed from nitrides of the element, with aluminum or an aluminum alloy formed on top thereof. The structure is also good. Furthermore, the top and bottom surfaces of aluminum or aluminum alloy are made of... Laminates sandwiched between tan, tantalum, molybdenum, tungsten, or nitrides of these elements. It may also be a structure. Here, the conductive film is a structure in which three layers of conductive films 65a to 65c are stacked. The conductive film is shown, with a molybdenum film on conductive films 65a and 65c, and an aluminum film on conductive film 65b. Multilayer conductive films using films, or conductive films 65a and 65c with titanium films, conductive film 65b with aluminum This shows a multilayer conductive film using a vacuum film. Conductive films 65a to 65c were produced by sputtering or vacuum deposition. Formed by law.

[0093] Next, as shown in Figure 2(D), a third photomask is used on the conductive films 65a to 65c. A resist mask 66 is formed, and a portion of the conductive film 65a to 65c is etched to form a pair of saws. The drain electrodes 71a to 71c are formed. The conductive films 65a to 65c are wetted. When etching occurs, the conductive films 65a to 65c are selectively etched. As a result, the conductive film To etch isotropically, a source electrode and a resist mask 66 with a smaller area than the resist mask 66 are used. Rain electrodes 71a to 71c can be formed.

[0094] Next, as shown in Figure 3(A), impurities are impurities that are given a single conductivity type using the resist mask 66. The semiconductor film 63 to which the compound is added is etched to form a pair of source and drain regions 72. Form. Furthermore, in the etching process, a portion of the buffer layer 62 is also etched. The buffer layer, which has been partially etched and has depressions (grooves) formed on it, is shown as buffer layer 73. The process of forming the source region and drain region, and the process of forming the depressions (grooves) in the buffer layer, are carried out in the same process. This can be achieved. The depth of the depression (groove) in the buffer layer is the thickest region of the buffer layer. By setting it to 1 / 2 to 1 / 3, it is possible to increase the distance between the source region and the drain region. Therefore, leakage current between the source and drain regions can be reduced. After that, remove the resist mask 66.

[0095] In particular, when exposed to plasma used in dry etching, the resist mask deteriorates, and the resist To prevent residue from remaining due to incomplete removal during the stool removal process, a buffer layer of 50nm is applied. Etching is performed to a certain extent. The resist mask 66 etches a portion of the conductive film 65a~65c. It is used twice: once for processing and again for etching during the formation of the source region and drain region 72. In both cases, when using dry etching, residue tends to remain, so the residue is completely removed. It is effective to form a thick buffer layer that can be etched when removed. Furthermore, the buffer layer 73 is protected from plasma damage during dry etching, which can damage the LPSAS film. It is also possible to prevent it from being given to 61.

[0096] Next, as shown in Figure 3(B), source electrodes and drain electrodes 71a-71c, source region drain region 72, buffer layer 73, LPSAS film 61, and gate insulating film 52c An insulating film 76 is formed to cover the gate insulating films 52a, 52b, and 52c. It can be formed using the following film formation method. The insulating film 76 is made of organic matter suspended in the atmosphere. It is intended to prevent the intrusion of contaminants such as objects, metals, and water vapor, and a dense film is preferred. Furthermore, by using a silicon nitride film for the insulating film 76, the oxygen concentration in the buffer layer 73 can be increased by 5 × 10 19 atoms / cm 3 The following is preferably 1 × 10 19 atoms / cm 3 The following It is possible.

[0097] As shown in Figure 3(B), the ends of the source electrode and drain electrodes 71a to 71c, and the source The edges of the region and the drain region 72 do not coincide and are offset, resulting in a shape that is offset between the source electrode and the drain region. Because the distance between the ends of the rain electrodes 71a to 71c increases, the distance between the source electrode and the drain electrode This can prevent leakage current and short circuits. Also, the source electrode and drain electrode 71 The ends of a~71c and the ends of the source region and drain region 72 do not coincide and have a shifted shape. Therefore, source electrode and drain electrode 71a~71c and source region and drain region 7 The electric field does not concentrate at the end of 2, and the gate electrode 51 and the source electrode and drain electrode 71a~7 This prevents leakage current between 1c and the circuit. Therefore, it is highly reliable and withstands high voltage. High-performance thin-film transistors can be fabricated. Furthermore, channel doping is performed, Thin-film transistors with controlled key values ​​can be fabricated.

[0098] Through the above process, a channel-etched thin-film transistor 74 can be formed. .

[0099] The thin-film transistor shown in this embodiment has a gate insulating film, an LPSAS film, on the gate electrode. A buffer layer, a source region and a drain region, a source electrode and a drain electrode are stacked, A buffer layer covers the surface of the LPSAS film, which functions as a channel-forming region. A depression (groove) is formed in part of the layer, and the area outside of this depression is the source area and the drain area. It is covered by a region. That is, the source region and drain region are covered by a depression formed in the buffer layer. Because the regions are far apart, leakage current between the source and drain regions is reduced. This can be done. Also, by etching a part of the buffer layer, a depression can be formed. Therefore, etching residue generated during the formation process of the source region and drain region is removed. Therefore, leakage current (parasitic channel) can be transmitted to the source and drain regions via the residue. This can prevent the occurrence of (ru).

[0100] Further, between the LPSAS film functioning as a channel forming region and the source and drain regions, a buffer layer is formed. In addition, the surface of the LPSAS film is covered with the buffer layer. The high-resistance buffer layer extends between the LPSAS film and the source and drain regions, so it can reduce the occurrence of leakage current in the thin film transistor, and can also reduce degradation caused by application of high voltage. Further, the buffer layer, the LPSAS film, and the source and drain regions are all formed on a region overlapping with the gate electrode. Therefore, it can be said that the structure is not affected by the end shape of the gate electrode. When the gate electrode has a stacked structure, if aluminum is used as the lower layer, aluminum is exposed on the side surface of the gate electrode, which may cause hillocks. However, by adopting a configuration in which the source and drain regions also do not overlap with the end of the gate electrode, the occurrence of a short circuit in the region overlapping with the side surface of the gate electrode can be prevented. In addition, since an amorphous semiconductor film whose surface is terminated with hydrogen is formed as a buffer layer on the surface of the LPSAS film, it is possible to prevent oxidation of the LPSAS film, and can prevent etching residues generated in the forming process of the source and drain regions from mixing into the LPSAS film. Therefore, a thin film transistor having excellent electrical characteristics and excellent pressure resistance can be formed.

[0101] Further, the channel length of the thin film transistor can be shortened, and the plane area of the thin film transistor can be reduced.

[0102] Next, the insulating film is processed using a resist mask formed on the insulating film 76 by using a fourth photomask, ​A part of 76 is etched to form a contact hole, and in the contact hole, a pixel electrode 77 in contact with the source electrode or the drain electrode 71c is formed. Note that FIG. 3(C ) corresponds to a cross-sectional view taken along line A-B indicated by the dashed line in FIG. 4.

[0103] As shown in FIG. 4, ends of the source region and the drain region 72 are the source electrode and the drain electrode 71c. It can be seen that the ends are located outside the ends of the electrode 71c. In addition, an end of the buffer layer 73 is the source electrode and the drain electrode 71c, and located outside the ends of the source region and the drain region 72 . In addition, one of the source electrode and the drain electrode surrounds the other of the source electrode and the drain electrode has a shape (specifically, a U-shape or a C-shape). For this reason, the surface of the region where carriers move since the product can be increased, the amount of current can be increased, and the thin film transistor area of the transistor can be reduced. In addition, on the gate electrode, an LPSAS film, a source since the source electrode and the drain electrode are overlapped, the influence of unevenness of the gate electrode is small, and the coverage reduction in coverage and occurrence of leakage current can be suppressed. Note that the source or drain one of the source and drain electrodes also functions as a source wiring or a drain wiring.

[0104] In addition, the pixel electrode 77 may be formed of indium oxide containing tungsten oxide, or tungsten oxide indium zinc oxide containing, indium oxide containing titanium oxide, indium containing titanium oxide indium tin oxide, indium tin oxide, indium zinc oxide, indium added with silicon oxide a light-transmitting conductive material such as indium tin oxide can be used.

[0105] In addition, as the pixel electrode 77, a conductive composition containing a conductive polymer (also referred to as a conductive polymer) is used It can be formed using materials. Pixel electrodes formed using a conductive composition have a sheet resistance. It is preferable that the resistance is 10,000 Ω / □ or less and the light transmittance at a wavelength of 550 nm is 70% or more. Furthermore, the resistivity of the conductive polymer contained in the conductive composition is 0.1 Ω·cm or less. It is preferable to do so.

[0106] As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene Examples include derivatives thereof, or copolymers of two or more of these.

[0107] Here, the pixel electrode 77 is formed by depositing an indium tin oxide film using the sputtering method. Next, a resist is applied to the indium tin oxide film. Then, a fifth photomask is used. The resist is exposed and developed to form a resist mask. Next, the resist mask is used Then, the indium tin oxide film is etched to form the pixel electrode 77.

[0108] As a result, an element substrate that can be used in a display device can be formed.

[0109] (Embodiment 2) This embodiment describes a process that differs in part from Embodiment 1. Since only the parts differ, the same reference numerals are used in Figure 5 for the same parts as in Figure 1, and the same process is used. Detailed explanations will be omitted.

[0110] First, the state shown in Figure 5(A) is obtained in the same manner as in Embodiment 1. Figure 5(A) is the same as Figure 1(A). It is one. After forming the gate electrode 51 on the substrate 50, the gate on the gate electrode 51 An insulating film 52a, 52b, 52c, and a microcrystalline semiconductor film 23a are formed in this order.

[0111] As shown in FIG. 5(B), a first LP treatment is performed on the microcrystalline semiconductor film to obtain an LPSA S film 33a is formed. By performing the LP treatment in advance to improve the crystallinity of the microcrystalline semiconductor film , it is possible to prevent the film from becoming a completely amorphous semiconductor film due to ion implantation.

[0112] Next, as shown in FIG. 5(C), boron is implanted into the LPSAS film 33a by ion implantation in a trace amount. Compared with the LPSAS film 33a before ion implantation, the crystallinity of the boron-containing microcrystalline semiconductor film 33b is decreased. Note that if an oxide film is formed on the surface of the LPSAS film 33a by laser beam irradiation in the first LP treatment, it is preferable to perform ion implantation as it is and remove the oxide film after ion implantation. This oxide film can function as a surface protective film.

[0113] Next, as shown in FIG. 5(D), a second LP treatment is performed. Through the second LP treatment, the crystallinity can be improved, and boron in the film can be activated. In addition, the first LP treatment and the second LP treatment do not need to be performed under the same conditions. It is preferable to clean the surface of the microcrystalline semiconductor film 3 3b before the second LP treatment.

[0114] Alternatively, heat treatment may be performed instead of the second LP treatment. The temperature of this heat treatment is lower than the melting temperature of the microcrystalline semi conductor film, and only needs to be not lower than the temperature required to activate boron in the film .

[0115] Next, as shown in FIG. 5(E), a buffer layer 54 and a layer imparting one conductivity type are formed on the LPSAS film 53 ​A semiconductor film 55 is formed with the impurities added. Figure 5(E) is the same as Figure 1(D). Furthermore, the oxide film formed during the second LP treatment is removed before the buffer layer 54 is formed. It is preferable to remove it.

[0116] Although the number of steps increases compared to Embodiment 1, the crystallinity is further improved compared to Embodiment 1. An LPSAS film can be obtained.

[0117] The subsequent steps are the same as in Embodiment 1, and are therefore omitted here.

[0118] Furthermore, this embodiment can be freely combined with Embodiment 1.

[0119] (Embodiment 3) This embodiment describes a process that differs in part from Embodiment 1. Since only the parts differ, the same reference numerals are used in Figure 6 for the same parts as in Figure 1, and the same process is used. I will omit the detailed explanation.

[0120] In this embodiment, impurity elements that impart p-type properties are added simultaneously with film formation, thereby imparting p-type properties. This section describes the process of forming a microcrystalline semiconductor film containing trace amounts of pure elements, followed by LP treatment.

[0121] First, the gate electrode 51 is formed on the substrate 50 in the same manner as in Embodiment 1, and then the gate Gate insulating films 52a, 52b, and 52c are formed on electrode 51. Then, as shown in Figure 6(A) As shown, a microcrystalline semiconductor film 4 intentionally containing impurity elements for the purpose of threshold control. Form film 3.

[0122] Typical impurity elements that confer the p-type include boron, as well as B2H6, BF3, and others. A pure gas containing silicon hydride in a concentration of 1 ppm to 1000 ppm, preferably 1 to 100 ppm. It is good to mix it in. And the concentration of boron contained in the microcrystalline semiconductor film 43 (SIMS measurement) For example, the concentration is 1 × 10 14 ~6×10 16 atoms / cm 3 That would be good.

[0123] Next, in order to improve the crystallinity of the microcrystalline semiconductor film 43 immediately after deposition, the microcrystalline semiconductor film A laser beam is irradiated from the surface side. The energy of the laser beam melts the microcrystalline semiconductor film. The laser beam is irradiated with an energy that does not cause damage. As shown in Figure 6(B), the laser beam is irradiated. An LPSAS film 53 with improved crystallinity can be formed.

[0124] When a microcrystalline semiconductor film is formed by incorporating a small amount of boron during film deposition, and then LP treatment is performed after film deposition. Since it is not necessary to activate boron, the LP treatment here does not improve crystallinity. The laser beam irradiation conditions should be such that they are suitable.

[0125] This process involves forming a microcrystalline semiconductor film by incorporating a small amount of boron during film deposition, followed by LP treatment. By adopting this configuration, the number of steps is reduced, making it a suitable process for mass production.

[0126] Furthermore, when using ion implantation devices or ion doping devices, depending on the doping conditions Furthermore, ion doping can damage the microcrystalline semiconductor film, and even the gate insulating film can be damaged. There is a risk of causing damage. By incorporating a small amount of boron during film formation, a microcrystalline semiconductor film is formed. If this is possible, thin-film transistors can be fabricated without causing this damage. can.

[0127] Next, as shown in Figure 6(C), a buffer layer 54 and a single conductivity type are placed on the LPSAS film 53. A semiconductor film 55 with the impurities to be added is formed. Figure 6(C) is the same as Figure 1(D). Yes. Also, the oxide film formed during the LP treatment is removed before the buffer layer 54 is formed. It is preferable.

[0128] The subsequent steps are the same as in Embodiment 1, and are therefore omitted here.

[0129] Furthermore, this embodiment can be freely combined with Embodiment 1.

[0130] (Embodiment 4) This embodiment describes a process that differs in part from Embodiment 1. Since only the parts differ, the same reference numerals are used in Figure 7 for the same parts as in Figure 1, and the same process is used. I will omit the detailed explanation.

[0131] First, obtain the state shown in Figure 7(A) in the same manner as in Embodiment 1. Figure 7(A) is the same as Figure 1(C). It is one. After forming the gate electrode 51 on the substrate 50, the gate on the gate electrode 51 Insulating films 52a, 52b, and 52c, and a microcrystalline semiconductor film are formed in sequence. Then, threshold control is performed. Therefore, impurity elements that impart conductivity to microcrystalline semiconductor films are intentionally introduced by ion implantation. It is then added to the film. Next, in order to improve the crystallinity compared to the microcrystalline semiconductor film immediately after deposition, the microcrystalline semiconductor A laser beam is irradiated from the surface side of the conductive film. This LP treatment gives the LPSAS film 53 To form.

[0132] Next, as shown in Figure 7(B), the surface of the LPSAS film 53 is subjected to hydrogen plasma and nitrogen plasma. or process with halogen plasma. Laser beam irradiation processes the surface of the LPSAS film 53. If an oxide film is formed, it should be removed before the buffer layer that is later formed. This is preferable. Here, after removing the oxide film on the surface of the LPSAS film 53, the LPSAS film 5 3. The surface is treated with hydrogen plasma. The interface with the buffer layer that will be formed later is cleaned. To achieve this, the material is treated with hydrogen plasma, nitrogen plasma, or halogen plasma. By treating with hydrogen plasma, nitrogen plasma, or halogen plasma, LP The SAS film 53 surface can be made less susceptible to oxide film formation.

[0133] By preventing the formation of an oxide film on the surface of the LPSAS film 53, the threshold voltage is increased. It can suppress this.

[0134] Next, as shown in Figure 7(C), a buffer layer 54 and a single conductivity type are placed on the LPSAS film 53. A semiconductor film 55 with the impurities to be added is formed. Figure 7(C) is the same as Figure 1(D). be.

[0135] The subsequent steps are the same as in Embodiment 1, and are therefore omitted here.

[0136] Furthermore, this embodiment can be freely combined with any one of Embodiments 1 to 3. Cut.

[0137] (Embodiment 5) A method for fabricating a thin-film transistor different from Embodiment 1 is described using Figures 8 to 12. Let me explain. Here, we will explain how to reduce the number of photomasks compared to Embodiment 1 described above. This document describes the process of fabricating thin-film transistors using Seth.

[0138] Similar to Figure 1(A) shown in Embodiment 1, a conductive film is formed on the substrate 50, and a resin is applied to the conductive film. A resin is applied and formed by a photolithography process using a first photomask. A portion of the conductive film is etched using a dystomask to form the gate electrode 51. On the gate electrode 51, gate insulating films 52a, 52b, 52c and a microcrystalline semiconductor film 23a are laid. Form them in order.

[0139] Next, similar to Figure 1(B) shown in Embodiment 1, a small amount of boron is added for the purpose of threshold control. Ion implantation is performed to form a microcrystalline semiconductor film 23b.

[0140] Next, similar to Figure 1(C) shown in Embodiment 1, the laser beam is irradiated to perform LPSAS. A film 53 is formed. Next, the LPSAS film 53 is formed in the same manner as shown in Figure 1(D) of Embodiment 1. A buffer layer 54 and a semiconductor film 55 with impurities that impart a single conductivity type are sequentially formed on top. do.

[0141] Next, conductive films 65a to 65c are added to the semiconductor film 55 which contains impurities that impart a single conductivity type. Next, as shown in Figure 9(A), the resist 80 is applied to the conductive film 65a.

[0142] The resist 80 can be either a positive-type resist or a negative-type resist. This is shown using a positive-type resist.

[0143] Next, using a multi-gradation mask 59 as a second photomask, light is irradiated onto the resist 80. Then, expose resist 80.

[0144] Here, we will explain exposure using the multi-gradation mask 59 with reference to Figure 8.

[0145] A multi-gradation mask applies three exposure levels to the exposed area, the mid-exposed area, and the unexposed area. This is a mask that allows for the creation of multiple (typically two) types of masks in a single exposure and development process. It is possible to form a resist mask having a region of thickness of ). Therefore, multi-gradation By using masks, it is possible to reduce the number of photomasks required.

[0146] A typical example of a multi-tone mask is the gray tone mask 59a shown in Figure 8(A). There is a halftone mask 59b as shown in 8(C).

[0147] As shown in Figure 8(A), the gray tone mask 59a has a light-transmitting substrate 163 and It consists of a light-shielding portion 164 and a diffraction grating 165 formed on top of it. In this case, the light transmittance is 0%. On the other hand, diffraction grating 165 consists of slits, dots, and meshes. By setting the spacing of the light-transmitting parts to a spacing less than or equal to the resolution limit of the light used for exposure, The transmittance can be controlled. The diffraction grating 165 has periodic slits, dots, You can use either a mesh, or a non-periodic slit, dot, or mesh.

[0148] The translucent substrate 163 can be a translucent substrate such as quartz. Part 164 and the diffraction grating 165 use a light-absorbing light-shielding material such as chromium or chromium oxide. It can be formed.

[0149] When exposure light is shone on the gray tone mask 59a, the light-shielding portion 1 is as shown in Figure 8(B). In 64, the light transmittance 166 is 0%, and a light-shielding portion 164 and a diffraction grating 165 are provided. In the region that is not affected, the light transmittance 166 is 100%. Also, in the diffraction grating 165 This can be adjusted within the range of 10-70%. The adjustment of light transmittance in diffraction grating 165 is This is possible by adjusting the spacing and pitch of the slits, dots, or mesh of the diffraction grating. ru.

[0150] As shown in Figure 8(C), the halftone mask 59b has a translucent substrate 163 and It consists of a semi-transparent portion 167 and a light-shielding portion 168 formed thereon. MoSiN, MoSi, MoSiO, MoSiON, CrSi, etc. can be used. The light-shielding portion 168 is formed using a light-absorbing light-shielding material such as chromium or chromium oxide. It is possible.

[0151] When exposure light is shone on the halftone mask 59b, the light-shielding portion 1 is as shown in Figure 8(D). In section 68, the light transmittance 169 is 0%, and a light-shielding section 168 and a semi-transparent section 167 are provided. In the areas that are not illuminated, the light transmittance 169 is 100%. Also, in the semi-transparent area 167 It can be adjusted within the range of 10-70%. The light transmittance in the semi-transparent part 167 can be adjusted as follows: This can be adjusted by changing the material of the semi-transparent portion 167.

[0152] After exposure using a multi-tone mask and then development, as shown in Figure 9(B), variations in film thickness are achieved. A resist mask 81 having such a region can be formed.

[0153] Next, the resist mask 81 is used to impart the LPSAS film 53, buffer layer 54, and single conductivity type. The semiconductor film 55 and conductive films 65a to 65c, to which impurities are added, are etched and separated. As a result, as shown in Figure 10(A), the LPSAS film 61, buffer layer 62, and conductive film are formed. A semiconductor film 63 and conductive films 85a to 85c are formed by adding impurities that impart a mold. This can be done. Note that Figure 10(A) corresponds to the cross-sectional view at AB in Figure 12(A) (however (Excluding resist mask 86).

[0154] Next, the resist mask 81 is ashing. As a result, the area of ​​the resist is reduced, and the thickness is reduced. The thickness decreases. At this time, the resist in the thin film thickness region (superimposed on a part of the gate electrode 51) The region is removed, forming a separated resist mask 86 as shown in Figure 10(A). It is possible.

[0155] Next, the conductive films 85a to 85c are etched and separated using the resist mask 86. As a result, a pair of source electrodes and drain electrodes 92a-92c are formed as shown in Figure 10(B). A conductive film 85a to 85c can be formed using a resist mask 86. When etched, the conductive films 85a to 85c are selectively etched. As a result, the conductive In order to etch the film isotropically, a source electrode with an area smaller than the resist mask 86 and Drain electrodes 92a to 92c can be formed.

[0156] Next, using the resist mask 86, the semiconductor film to which impurities that impart a single conductivity type are added is examined. 63 is etched to form a pair of source and drain regions 88. In the etching process, a portion of the buffer layer 62 is also etched. The buffer layer is shown as buffer layer 87. Note that a recess is formed in buffer layer 87. The process of forming the drain region and the recess (groove) of the buffer layer is carried out in the same process. This is possible. Here, a portion of the buffer layer 87 is compared to the resist mask 81. Because the product was partially etched by the resist mask 86, the source region and drain region were also etched. The buffer layer 87 protrudes outside the region 88. After this, the resist mask 86 Remove. Also, the ends of the source electrode and drain electrode 92a~92c, and the source region and The ends of the drain region 88 do not coincide and are offset, and the source electrode and drain electrodes 92a~9 The ends of the source region and the drain region 88 are formed outside the end of 2c.

[0157] Note that Figure 10(C) corresponds to the cross-sectional view of AB in Figure 12(B). As shown, the ends of the source region and drain region 88 are the source electrode and drain electrode 92c It can be seen that it is located outside the end of the buffer layer 87. Also, the end of the buffer layer 87 is located on the source electrode and the It is located outside the rain electrode 92c and the ends of the source region and drain region 88. One of the source electrode and drain electrode has a shape that surrounds the other of the source region and drain region ( Physically, it is U-shaped or C-shaped. Therefore, the area of ​​the region in which the carrier moves is increased. Because it is possible to increase the amount of current, the area of ​​the thin-film transistor It can be reduced in size. Also, on the gate electrode, a microcrystalline semiconductor film, a source electrode and Because the drain electrode is superimposed, the effect of the gate electrode's irregularities is reduced, resulting in a reduction in coverage. Furthermore, the generation of leakage current can be suppressed. One end functions as either a source or drain wire.

[0158] As shown in Figure 10(C), the ends of the source electrode and drain electrodes 92a to 92c, and the saw The edges of the source region and the drain region 88 do not coincide and are offset, resulting in a source electrode and Because the distance between the ends of the drain electrodes 92a to 92c increases, the distance between the source electrode and the drain electrode This can prevent leakage current and short circuits. Also, the source electrode and drain electrode 9 The ends of 2a to 92c and the ends of the source region and drain region 88 do not coincide and have a shifted shape. Therefore, source electrode and drain electrode 92a~92c and source region and drain region The electric field does not concentrate at the end of 88, and the gate electrode 51, source electrode and drain electrode 92a~ This prevents leakage current between the 92c and the circuit. Therefore, it is highly reliable and durable. High-pressure thin-film transistors can be fabricated.

[0159] Through the above process, a channel-etched thin-film transistor 83 can be formed. Furthermore, thin-film transistors can be formed using two photomasks.

[0160] Next, as shown in Figure 11(A), source electrode and drain electrode 92a~92c, source Region and drain region 88, buffer layer 87, LPSAS film 90, and gate insulating film 52 An insulating film 76 is formed on c. The insulating film 76 is the same as the gate insulating films 52a, 52b, and 52c. It can be formed by the same manufacturing method.

[0161] Next, a part of the insulating film 76 is formed using a resist mask created with a third photomask. Etching is performed to form a contact hole. Next, sawing is performed in the contact hole. A pixel electrode 77 is formed in contact with the drain electrode 92c. Here, the pixel electrode For 77, after depositing an indium tin oxide film by sputtering, indium A resist is applied to the tin oxide film. Next, the resist is exposed using a fourth photomask. Then develop and form a resist mask. Next, use the resist mask to form indium stinic acid The oxide film is etched to form the pixel electrode 77. Note that Figure 11(B) is the same as Figure 12(C). This corresponds to a cross-sectional view of AB.

[0162] As described above, by using a multi-level mask to reduce the number of masks, it becomes possible to use elements in a display device. Sub-substrates can be formed.

[0163] Furthermore, this embodiment can be freely combined with any one of Embodiments 1 to 4. Cut.

[0164] (Embodiment 6) In this embodiment, as one form of the display device, the thin-film transistor shown in Embodiment 1 is used The liquid crystal display devices we possess are described below.

[0165] First, we will explain VA (Vertical Alignment) type liquid crystal display devices. A VA-type liquid crystal display device is a type of system that controls the arrangement of liquid crystal molecules in a liquid crystal panel. In VA-type liquid crystal display devices, when no voltage is applied, liquid crystal molecules are present on the panel surface. This is a vertical orientation method. In this embodiment, pixels are particularly divided into several regions It is divided into (subpixels) and designed to tilt each molecule in a different direction. This is called multi-domainization or multi-domain design. In the following explanation, we will refer to multi-domain design. This section describes a liquid crystal display device that takes this into consideration.

[0166] Figures 14 and 15 show the pixel electrode and the counter electrode, respectively. Note that Figure 14 is a pixel This is a plan view of the substrate side where the primary electrodes are formed, and shows the cross-sectional structure corresponding to the cutting line AB shown in the figure. This is shown in Figure 13. Figure 15 is a plan view of the substrate side where the opposing electrodes are formed. The following explanation will refer to these diagrams.

[0167] Figure 13 shows the TFT 628, the pixel electrode 624 connected to it, and the holding capacitance unit 630. The formed substrate 600 and the opposing substrate 601 on which the opposing electrodes 640 etc. are formed are superimposed. This indicates that the liquid crystal has been injected.

[0168] At the position where the spacer 642 is formed on the opposing substrate 601, a light-shielding film 632 and a first attachment A color film 634, a second color film 636, a third color film 638, and a counter electrode 640 are formed. This structure allows the heights of the protrusions 644 and spacers 642 to be different for controlling the orientation of the liquid crystal. It is being made to work. An alignment film 648 is formed on the pixel electrode 624, and similarly on the counter electrode 640. An alignment film 646 is also formed there. A liquid crystal layer 650 is formed between them.

[0169] Although spacer 642 is shown here using a columnar spacer, bead spacers can also be scattered. Furthermore, the spacer 642 is formed on the pixel electrode 624 formed on the substrate 600. That's good too.

[0170] On the substrate 600 are a TFT 628, a pixel electrode 624 connected to it, and a holding capacitance section 63. A zero is formed. The pixel electrode 624 covers the TFT 628, wiring, and retaining capacitance portion 630. Contact holes 62 penetrate the insulating film 620 and the third insulating film 622 covering the insulating film. In step 3, connect to wiring 618. TFT628 is a thin-film transistor as shown in Embodiment 1. It can be used as appropriate. In addition, the holding capacity section 630 is connected to the gate wiring 602 of the TFT 628. Similarly formed first capacitive wiring 604, gate insulating film 606, wirings 616, 618 and It is composed of a second capacitance wiring 617 formed in the same manner.

[0171] A liquid crystal element is formed when the pixel electrode 624, the liquid crystal layer 650, and the counter electrode 640 overlap. It is being done.

[0172] Figure 14 shows the structure on the substrate 600. The pixel electrode 624 uses the material shown in Embodiment 1. The pixel electrode 624 is provided with a slit 625. The slit 625 is for the orientation of the liquid crystal. It is for controlling [something].

[0173] The TFT 629 shown in Figure 14, the pixel electrode 626 connected thereto, and the holding capacitance unit 631 are, Each can be formed in the same manner as the TFT628, pixel electrode 624, and holding capacitance section 630. It is possible. Both TFT628 and TFT629 are connected to wiring 616. A pixel is composed of a pixel electrode 624 and a pixel electrode 626. 624 and pixel electrode 626 are subpixels.

[0174] Figure 15 shows the structure of the opposing substrate. The opposing electrode 640 is formed on the light-shielding film 632. The counter electrode 640 is preferably formed using the same material as the pixel electrode 624. A projection 644 that controls the orientation of the liquid crystal is formed on the directional electrode 640. Also, a light-shielding film 6 Spacer 642 is formed to align with position 32.

[0175] The equivalent circuit of this pixel structure is shown in Figure 16. Both TFT628 and TFT629 are gates. It is connected to wiring 602 and wiring 616. In this case, capacitive wiring 604 and capacitive wiring 605 By changing the potential, the operation of the liquid phase element 651 and the liquid crystal element 652 can be made different. This is achieved by individually controlling the potential of the capacitance wiring 604 and capacitance wiring 605. The viewing angle is widened by precisely controlling the orientation of the crystals.

[0176] When a voltage is applied to the pixel electrode 624 with the slit 625, near the slit 625... This generates distortion of the electric field (oblique electric field). This slit 625 and the protrusion on the opposing substrate 601 side By arranging 644 and other elements in an alternating interlocking manner, a diagonal electric field is effectively generated, resulting in a liquid crystal. By controlling the orientation, the direction in which the liquid crystals align varies depending on the location. That is, By using a multi-domain architecture, the viewing angle of the LCD panel is widened.

[0177] Next, a VA-type liquid crystal display device, different from the one described above, will be explained using Figures 17 to 20. ru.

[0178] Figures 17 and 18 show the pixel structure of a VA-type liquid crystal panel. Figure 18 shows the substrate 600. This is a plan view, and Figure 17 shows the cross-sectional structure corresponding to the cutting line YZ shown in the figure. The explanation will refer to both of these figures.

[0179] This pixel structure has multiple pixel electrodes for each pixel, and each pixel electrode has a TFT. They are connected. Each TFT is configured to be driven by a different gate signal. In other words, in a multi-domain designed pixel, the signal applied to each pixel electrode is independently It has a configuration that allows for control from a standing position.

[0180] The pixel electrode 624 is connected to the TFT 628 by wiring 618 in the contact hole 623. Furthermore, the pixel electrode 626 is connected to the contact hole 627 via wiring 619. It is connected to T629. The gate wiring 602 of TFT628 and the gate wiring of TFT629 Line 603 is isolated so that different gate signals can be applied to it. The wiring 616, which functions as a data line, is used in common with TFT628 and TFT629. The thin-film transistors shown in Embodiment 1 can be appropriately used for TFT628 and TFT629. It is possible.

[0181] The shapes of pixel electrodes 624 and 626 are different and are separated by the slit 625. It is formed such that the pixel electrode 626 surrounds the outside of the V-shaped spreading pixel electrode 624. The timing of the voltage applied to the pixel electrode 624 and the pixel electrode 626 is controlled by the TFT62. The orientation of the liquid crystal is controlled by using different pixel structures, such as 8 and TFT629. The equivalent circuit is shown in Figure 20. TFT628 is connected to gate wiring 602, and TFT629 is It is connected to gate wiring 603. Gate wiring 602 and gate wiring 603 are different gates. By applying a signal, it is possible to make the operating timing of the TFT628 and TFT629 different. can.

[0182] A light-shielding film 632, a second colored film 636, and a counter electrode 640 are formed on the opposing substrate 601. Furthermore, a planarization film 637 is formed between the second colored film 636 and the counter electrode 640. This prevents misalignment of the liquid crystal. Figure 19 shows the structure on the opposing substrate side. The opposing electrode 640 is different Although the electrodes are common to all pixels, a slit 641 is formed therein. The lit 641 and the slit 625 on the pixel electrode 624 and pixel electrode 626 sides are alternately engaged. By arranging them in a specific way, it is possible to effectively generate an oblique electric field and control the orientation of the liquid crystal. Yes, it is possible. This allows the orientation of the liquid crystal to vary depending on the location, and the viewing angle. It is spreading.

[0183] The pixel electrode 624, the liquid crystal layer 650, and the counter electrode 640 overlap, forming the first liquid crystal element. It is formed. Also, the pixel electrode 626, the liquid crystal layer 650, and the counter electrode 640 overlap. Thus, a second liquid crystal element is formed. Also, one pixel contains a first liquid crystal element and a second liquid crystal element. It is a multi-domain structure with subdomains.

[0184] Next, we will describe a transverse electric field type liquid crystal display device. In the transverse electric field type, the liquid crystal molecules within the cell This method drives the liquid crystal by applying an electric field in the horizontal direction to express gradation. This allows the field of view to be expanded to approximately 180 degrees. The following explanation uses a transverse electric field method. The liquid crystal display device used will be described below.

[0185] Figure 21 shows a substrate 600 on which a TFT 628 and a pixel electrode 624 connected thereto are formed, This shows the state after the opposing substrate 601 is placed on top and liquid crystal has been injected. The optical film 632, the second coloring film 636, the planarization film 637, etc. are formed. The pixel electrode is a base Since it is located on board 600, it is not provided on the opposing substrate 601. A liquid crystal layer 650 is formed between the 601 layers.

[0186] On the substrate 600 are the first pixel electrode 607 and the capacitive wiring connected to the first pixel electrode 607. 604 and the TFT628 shown in Embodiment 1 are formed. First pixel electrode 60 7 can be made of the same material as the pixel electrode 77 shown in Embodiment 1. The pixel electrode 607 is formed in a shape that is divided into approximately the shape of a pixel. A gate insulating film 606 is formed on 07 and the capacitive wiring 604.

[0187] The wiring 616 and wiring 618 of the TFT628 are formed on the gate insulating film 606. 6 is a data line in an LCD panel that carries video signals and is a unidirectional wiring. Simultaneously, it connects to the source region 610 and becomes one of the source and drain electrodes. Wiring 61 8 is the other electrode of the source and drain, and is a wiring that connects to the second pixel electrode 624. ru.

[0188] A second insulating film 620 is formed on wiring 616 and wiring 618. Also, on insulating film 620 In the contact hole formed in the insulating film 620, a second connection is made to the wiring 618. The pixel electrode 624 is formed. The pixel electrode 624 is the same as the pixel electrode 77 shown in Embodiment 1. It is formed using similar materials.

[0189] In this way, the TFT 628 and the first pixel electrode 624 connected thereto are placed on the substrate 600. This is formed. The retention capacity is formed between the first pixel electrode 607 and the second pixel electrode 624. They have achieved it.

[0190] Figure 22 is a plan view showing the configuration of the pixel electrode. The pixel electrode 624 has a slit 625. It is provided. Slit 625 is for controlling the orientation of the liquid crystal. In this case, the electric field This occurs between the first pixel electrode 607 and the second pixel electrode 624. A gate insulating film 606 is formed between the second pixel electrode 624 and the gate insulating film. The thickness of 606 is 50-200 nm, which is considerably less than the thickness of the liquid crystal layer, which is 2-10 μm. Because it is thin, an electric field is generated in a direction parallel to the substrate 600 (horizontal direction). This electric field causes liquid The orientation of the crystals is controlled. An electric field approximately parallel to the substrate is used to rotate the liquid crystal molecules horizontally. This causes the liquid crystal molecules to be horizontal in any state, thus reducing the contrast depending on the viewing angle. The effects of factors such as [unclear text] are minimal, resulting in a wider field of view. Also, the first pixel electrode 607 and the second Since both pixel electrodes 624 are light-transmitting electrodes, the aperture ratio can be improved.

[0191] Next, we will show another example of a transverse electric field type liquid crystal display device.

[0192] Figures 23 and 24 show the pixel structure of an IPS-type liquid crystal display device. Figure 24 is a plan view. The cross-sectional structure corresponding to the cutting line AB shown in the figure is represented in Figure 23. The following explanation... Now, let's explain by referring to these two figures.

[0193] Figure 23 shows a substrate 600 on which a TFT 628 and a pixel electrode 624 connected to it are formed, This shows the state after the opposing substrate 601 is placed on top and liquid crystal has been injected. The optical film 632, the second coloring film 636, the planarization film 637, etc. are formed. The pixel electrode is a base Since it is located on board 600, it is not provided on the opposing board 601. Board 600 and opposing board A liquid crystal layer 650 is formed between the 601 layers.

[0194] A common potential line 609 and the TFT 628 shown in Embodiment 1 are formed on the substrate 600. The common potential line 609 is formed simultaneously with the gate wiring 602 of the thin-film transistor 628. This is possible. In addition, the pixel electrode 624 is formed in a shape that is divided into sections approximately the shape of the pixel.

[0195] The wiring 616 and wiring 618 of the TFT628 are formed on the gate insulating film 606. 6 is a data line in an LCD panel that carries video signals and is a unidirectional wiring. Simultaneously, it connects to the source region 610 and becomes one of the source and drain electrodes. Wiring 61 8 is the other electrode of the source and drain, and is a wiring that connects to the pixel electrode 624.

[0196] A second insulating film 620 is formed on wiring 616 and wiring 618. Also, on insulating film 620 In the contact hole 623 formed in the insulating film 620, it is connected to the wiring 618. A pixel electrode 624 is formed. The pixel electrode 624 is the same as the pixel electrode 77 shown in Embodiment 1. It is formed using the same material. Note that, as shown in Figure 24, the pixel electrode 624 is at a common potential. The comb-shaped electrode formed simultaneously with line 609 is formed to generate a transverse electric field. The comb-shaped portions of electrode 624 interlock alternately with the comb-shaped electrodes formed simultaneously with the common potential line 609. It is formed in such a way.

[0197] When an electric field is generated between the potential applied to the pixel electrode 624 and the potential of the common potential line 609, This electric field controls the orientation of the liquid crystal. The liquid crystal is formed using an electric field approximately parallel to the substrate. Rotate the molecules horizontally. In this case, since the liquid crystal molecules are horizontal in any state, the viewing angle... The impact on contrast and other factors is minimal, resulting in a wider viewing angle.

[0198] In this way, the TFT 628 and the pixel electrode 624 connected to it are formed on the substrate 600. The retention capacitance is achieved by providing a gate insulating film 606 between the common potential line 609 and the capacitive electrode 615. , thereby forming. The capacitive electrode 615 and the pixel electrode 624 are connected to the contact hole 633 It is connected via [a certain method].

[0199] Next, we will describe the configuration of TN-type liquid crystal display devices.

[0200] Figures 25 and 26 show the pixel structure of a TN-type liquid crystal display device. Figure 26 is a plan view. Yes, and the cross-sectional structure corresponding to the cutting line AB shown in the figure is shown in Figure 25. This will be explained by referring to these two figures.

[0201] The pixel electrode 624 is connected to the TFT 628 by wiring 618 via contact hole 623. The wiring 616, which functions as a data line, is connected to the TFT628. 28 can be any of the TFTs shown in Embodiment 1.

[0202] The pixel electrode 624 is formed using the pixel electrode 77 shown in Embodiment 1.

[0203] A light-shielding film 632, a second colored film 636, and a counter electrode 640 are formed on the opposing substrate 601. Furthermore, a planarization film 637 is formed between the second colored film 636 and the counter electrode 640. This prevents misalignment of the liquid crystal. The liquid crystal layer 650 is located between the pixel electrode 624 and the counter electrode 640. It is formed.

[0204] A liquid crystal element is formed when the pixel electrode 624, the liquid crystal layer 650, and the counter electrode 640 overlap. It is being done.

[0205] Furthermore, a color filter or discriminant is applied to the substrate 600 or the opposing substrate 601. A shielding film (black matrix) or the like may be formed to prevent this. Also, substrate 60 A polarizing plate is attached to the side opposite to the side where the thin-film transistor of 0 is formed, and the opposing group A polarizing plate is attached to the side of plate 601 opposite to the side where the opposing electrode 640 is formed. .

[0206] The counter electrode 640 can be made of the same material as the pixel electrode 77 as appropriate. The liquid crystal element is formed by the overlapping of 24, the liquid crystal 650, and the counter electrode 640.

[0207] A liquid crystal display device can be manufactured through the above process. Liquid crystal display device of this embodiment It uses thin-film transistors that have low off-current, excellent electrical characteristics, and high reliability. Therefore, it is a liquid crystal display device with high contrast and high visibility. In addition, it is a single-conductivity impurity source. Using a thin-film transistor with threshold control using a microcrystalline semiconductor film containing trace amounts of elements Therefore, highly visible liquid crystal display devices can be manufactured with high productivity.

[0208] (Embodiment 7) In this embodiment, a light-emitting device, which is a form of display device, is shown in Figures 9 to 11 and Figure 27. This will be explained using Figure 28. Here, electroluminescence is used as the light-emitting device. This is demonstrated using a light-emitting element that utilizes electroluminescence. They are distinguished by whether the photomaterial is an organic compound or an inorganic compound, and generally the former Organic EL elements are called organic EL elements, while the latter are called inorganic EL elements.

[0209] Organic EL elements emit electrons and positive voltages from a pair of electrodes when a voltage is applied to the light-emitting element. Each pore is injected into a layer containing a luminescent organic compound, and an electric current flows through it. The recombination of carriers (electrons and holes) causes the luminescent organic compound to form an excited state. It then emits light when the excited state returns to the ground state. From this mechanism, These light-emitting elements are called current-excited light-emitting elements.

[0210] Inorganic electroluminescent (EL) elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements based on their element configuration. They are classified as such. Dispersive inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The luminescence mechanism utilizes donor and acceptor levels, and the donor-acceptor level is the key to this process. This is a receptor recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. This is a localized light emission. Here, we will explain using an organic EL element as the light-emitting element. Furthermore, as a thin-film transistor that controls the driving of the light-emitting element, a channel etch type thin film is used. This will be demonstrated using transistors.

[0211] After going through the steps shown in Figures 9 to 11, a thin-film transistor is placed on the substrate 50 as shown in Figure 27(A). An insulating film 87 forms 85,86 and functions as a protective film on the thin-film transistors 85,86. Next, a planarization film 111 is formed on the insulating film 87, and a thin film is applied to the planarization film 111. A pixel electrode 112 is formed, which is connected to the source electrode or drain electrode of the transistor 86.

[0212] The planarized film 111 is made of organic resins such as acrylic, polyimide, polyamide, or siloxane. It is preferable to form it using sunflower.

[0213] In Figure 27(A), since the pixel thin-film transistor is of the n type, the pixel electrode 112 is defined as follows: It is preferable to use a cathode, but conversely, in the case of a p-type, it is preferable to use an anode. Specifically, For the cathode, a known material with a small work function is used, such as calcium, aluminum, or f Calcium oxide, magnesium silver alloy, lithium aluminum alloy, etc. can be used. ru.

[0214] Next, as shown in Figure 27(B), partition walls are placed on the edges of the planarization film 111 and the pixel electrode 112. A partition wall 113 is formed. The partition wall 113 has an opening, and in this opening the pixel electrode 112 The part is exposed. The partition wall 113 uses an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, a photosensitive material is used to form an opening on the pixel electrode, and the side of the opening It is preferable to form the wall into an inclined surface with a continuous curvature.

[0215] Next, a light-emitting layer 114 is formed so as to be in contact with the pixel electrode 112 at the opening of the partition wall 113. The light-emitting layer 114 is configured to consist of a single layer, or to consist of multiple layers stacked on top of each other. It's fine either way.

[0216] Then, a common electrode 115 is formed using an anode so as to cover the light-emitting layer 114. Common electrode 115 uses a light-transmitting conductive material listed as the pixel electrode 77 in Embodiment 1. It can be formed with a translucent conductive film. In addition to the above translucent conductive film, the common electrode 115 may also be used. Alternatively, a titanium nitride film or a titanium film may be used. In Figure 27(B), the common electrode 115 is used. Indium tin oxide is used. At the opening of the partition wall 113, the pixel electrode 112 and The light-emitting element 117 is formed by the overlapping of the light layer 114 and the common electrode 115. After that, a common electrode is used to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 117. It is preferable to form a protective film 116 on 115 and the partition wall 113. This can form silicon nitride films, silicon oxide nitride films, DLC films, etc.

[0217] Furthermore, once the process is completed up to Figure 27(B), it is actually necessary to further seal it to prevent exposure to the outside air. Highly durable protective film with minimal degassing (laminated film, UV-curing resin film) It is preferable to package (enclose) the product with a cover material such as [examples of materials].

[0218] Next, the configuration of the light-emitting element will be explained using Figure 28. Here, the driving TFT is Let's take the n-type case as an example to explain the cross-sectional structure of a pixel.

[0219] In order to extract light from a light-emitting element, it is sufficient that at least one of the electrodes, either the anode or the cathode, is transparent. Then, a thin-film transistor and a light-emitting element are formed on the substrate, and light is emitted from the side opposite to the substrate. This includes top-side emission for extraction, bottom-side emission for extraction from the substrate side, and the substrate side and the opposite side of the substrate. There is a light-emitting element with a double-sided emission structure that extracts light from the opposite side, and the pixel configuration of the present invention is which It can also be applied to light-emitting elements in the external structure.

[0220] The light-emitting element with an upper surface injection structure will be explained using Figure 28(A).

[0221] Figure 28(A) shows that the driving TFT 7001 is of type n, and the light emitted from the light-emitting element 7002 Figure 28(A) shows a cross-sectional view of the pixel when the current passes through to the anode 7005 side. The cathode 7003 of 002 and the driver TFT 7001 are electrically connected, and cathode 7003 The light-emitting layer 7004 and the anode 7005 are stacked in order on top of each other. The cathode 7003 has a small work function. Any known material can be used as long as it is a conductive film that reflects light. For example, Calcium, aluminum, calcium fluoride, magnesium silver alloy, lithium aluminum A luminescent alloy such as um is preferable. And even if the light-emitting layer 7004 is composed of a single layer, multiple It doesn't matter whether the layers are stacked or not. On cathode 7003, in the order of electron injection layer, electron transport layer, light emission layer, hole transport layer, and hole injection layer These are stacked. Note that it is not necessary to provide all of these layers. The anode 7005 is light-transmitting. Formed using a conductive material having certain properties, such as indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium oxide-containing indium tin oxide, indium tin oxide, indium zinc oxide, acid A transparent conductive film such as indium tin oxide with added silicon dioxide may also be used. stomach.

[0222] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. This corresponds to the pixel shown in Figure 28(A), where the light emitted from the light-emitting element 7002 is As indicated by the white arrow, the injection is directed towards the anode 7005.

[0223] Next, the light-emitting element with a bottom-extrusion structure will be explained using Figure 28(B). Driving TFT When 7011 is of type n, and the light emitted from the light-emitting element 7012 is directed toward the cathode 7013 side. The cross-sectional view of the pixel is shown. In Figure 28(B), the driving TFT7011 is electrically connected. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive material 7017. The cathode 7013 is layered with the light-emitting layer 7014 and the anode 7015 in that order. If the anode 7015 is translucent, to reflect or shield light so as to cover the anode. A shielding film 7016 may be formed on it. The cathode 7013 is the same as in the case of Figure 28(A). Any known material can be used as long as it is a conductive film with a small work function. However, the thickness The wavelength should be such that it transmits light (preferably around 5 nm to 30 nm). For example, 20 nm Al with a film thickness can be used as the cathode 7013. And the light-emitting layer 7014 is Similar to Figure 28(A), even if it consists of a single layer, it can be constructed so that multiple layers are stacked on top of each other. It doesn't matter whether it's done or not. The anode 7015 does not need to transmit light, as shown in Figure 28(A ) can be formed using a light-transmitting conductive material, similar to the above. And the shielding film 7 016 can be, for example, a light-reflecting metal, but is not limited to a metal film. For example, a resin to which black pigment has been added can also be used.

[0224] The region between the cathode 7013 and anode 7015, sandwiching the light-emitting layer 7014, is the light-emitting element 701 This corresponds to 2. In the case of the pixel shown in Figure 28(B), the light emitted from the light-emitting element 7012 is As indicated by the white arrow, the material is ejected towards the cathode 7013 side.

[0225] Next, a light-emitting element with a double-sided injection structure will be explained using Figure 28(C). Figure 28(C) ) In this case, the drive TFT 7021 is electrically connected to a translucent conductive material 7027 On top of the cathode 7023 of the light-emitting element 7022, a light-emitting layer 70 is formed, and on the cathode 7023 24. The anodes 7025 are stacked in order. The cathode 7023 is the same as in Figure 28(A). Any known material can be used as long as it is a conductive film with a small work function. However, the thickness The material should transmit light to a certain extent. For example, Al with a film thickness of 20 nm is used as the cathode 7023. It can be used in this way. The light-emitting layer 7024 is composed of a single layer, similar to Figure 28(A). It is acceptable whether it is constructed as a single layer or as multiple layers stacked on top of each other. Anode 7 025 is formed using a light-transmitting conductive material, similar to Figure 28(A). It is possible.

[0226] The portion where the cathode 7023, the light-emitting layer 7024, and the anode 7025 overlap is the light-emitting element 7 This corresponds to 022. In the case of the pixel shown in Figure 28(C), it is emitted from the light-emitting element 7022. Light is emitted from both the anode 7025 side and the cathode 7023 side, as indicated by the white arrows.

[0227] Here, we have discussed organic EL elements as light-emitting elements, but inorganic EL elements can also be used as light-emitting elements. It is also possible to incorporate an L element.

[0228] In this embodiment, a thin-film transistor (driving TFT) controls the driving of the light-emitting element. An example was shown where the light-emitting element is electrically connected, but there is an electrical connection between the driving TFT and the light-emitting element. A configuration in which a flow control TFT is connected is also possible.

[0229] The light-emitting device shown in this embodiment is not limited to the configuration shown in Figure 28. Various modifications are possible based on the technical concept of this invention.

[0230] By following the above steps, a light-emitting device can be manufactured. The light-emitting device of this embodiment is OFF Because it uses thin-film transistors that have low current, excellent electrical characteristics, and high reliability, It is a highly reliable and highly visible light-emitting device. Furthermore, it contains trace amounts of monoconductive impurity elements. Because it uses a thin-film transistor with threshold control using a microcrystalline semiconductor film, High-performance light-emitting devices can be manufactured with high productivity.

[0231] (Embodiment 8) The configuration of a display panel, which is one embodiment of the display device of the present invention, is shown below.

[0232] In Figure 29(A), only the signal line drive circuit 6013 is formed separately and is formed on the substrate 6011. The image shows the configuration of the display panel connected to the pixel unit 6012. Pixel unit 6012 and scan lines The drive circuit 6014 is formed using a thin-film transistor made of a microcrystalline semiconductor film. A transistor that can achieve higher mobility than thin-film transistors using crystalline semiconductor films for signal lines By forming a drive circuit, signal line drive circuits that require a higher drive frequency than scan line drive circuits can be formed. This allows for stable operation of the moving circuit. The signal line drive circuit 6013 uses a single-crystal semiconductor. Transistors using conductors, thin-film transistors using polycrystalline semiconductors, or SOI It may also be a transistor used. Pixel section 6012, signal line driving circuit 6013, and The power supply potential, various signals, etc., are transmitted to the probe drive circuit 6014 and the FPC 6015, respectively. It will be supplied.

[0233] Furthermore, both the signal line drive circuit and the scan line drive circuit may be formed on the same substrate as the pixel section. stomach.

[0234] Furthermore, if a separate drive circuit is formed, the pixel portion does not necessarily have to be on the substrate on which the drive circuit is formed. It is not necessary to bond it to a formed substrate; for example, it can be bonded to an FPC. This is also good. In Figure 29(B), only the signal line drive circuit 6023 is formed separately and placed on the substrate 6021. A liquid crystal display panel connected to the formed pixel section 6022 and the scanning line driving circuit 6024. The form of the element is shown. The pixel section 6022 and the scanning line driving circuit 6024 use a microcrystalline semiconductor film. It is formed using thin-film transistors. The signal line drive circuit 6023 is via FPC6025. It is connected to the pixel unit 6022. The pixel unit 6022 and the signal line driving circuit 6023, The scan line drive circuit 6024 and the FPC 6025 receive the power supply potential, various signals, etc., respectively, via the FPC 6025. It is supplied as such.

[0235] Furthermore, using a microcrystalline semiconductor film for only a part of the signal line drive circuit or a part of the scan line drive circuit. Thin-film transistors are used to form the pixel portion on the same substrate, and the remaining portion is formed separately. It may also be electrically connected to it. Figure 29(C) shows the analog of the signal line drive circuit. The switch 6033a is connected to the same circuit board 6031 as the pixel section 6032 and the scan line drive circuit 6034. The shift register 6033b of the signal line drive circuit is formed on top of the above, and the shift register 6033b of the signal line drive circuit is formed on a separate, different substrate. The configuration of the liquid crystal display panel to be bonded together is shown. Pixel section 6032 and scanning line driving circuit The 6034 is formed using a thin-film transistor with a microcrystalline semiconductor film. The shift register 6033b in the path is connected to the pixel unit 6032 via the FPC 6035. It is configured such that the pixel section 6032, the signal line driving circuit, and the scan line driving circuit 6034 are configured as follows: The potential of each power supply, various signals, etc., are supplied via the FPC6035.

[0236] As shown in Figure 29, the liquid crystal display device of the present invention uses a part or all of the drive circuit for the pixel section It can be formed on the same substrate using thin-film transistors with an LPSAS film. .

[0237] Furthermore, the method of connecting the separately formed substrate is not particularly limited and is a known COG method. Methods such as wire bonding or TAB can be used for connection. The location is not limited to the position shown in Figure 29, as long as electrical connection is possible. Alternatively, the controller, CPU, memory, etc., may be formed separately and connected.

[0238] The signal line driving circuit used in this invention comprises only a shift register and an analog switch. It is not limited to the form. In addition to shift registers and analog switches, buffers, level switches, etc. It may also have other circuits such as a lid or source follower. A switch is not always necessary; for example, a decoder circuit can be used instead of a shift register. Alternatively, you could use a different circuit that allows you to select signal lines, or instead of an analog switch... You may use latches or similar devices.

[0239] Figure 32 shows a block diagram of the liquid crystal display device of the present invention. A pixel section 701 having multiple pixels with children, and a scan line driving circuit 702 that selects each pixel. It also includes a signal line drive circuit 703 that controls the input of a video signal to a selected pixel.

[0240] In Figure 32, the signal line drive circuit 703 is connected to the shift register 704 and the analog switch 7 It has 05. The shift register 704 receives the clock signal (CLK) and start pulse. A start pulse (SP) signal is input. The clock signal (CLK) and the start pulse (SP) signal are being input. When ) is input, a timing signal is generated in the shift register 704, analog This input is sent to switch 705.

[0241] Furthermore, the analog switch 705 is also supplied with a video signal. The analog switch 705 outputs the video signal according to the input timing signal. It is pumped and supplied to the subsequent signal line.

[0242] Next, the configuration of the scan line drive circuit 702 will be described. The scan line drive circuit 702 is a shift It has a resistor 706 and a buffer 707. It may also have a level shifter. It is also acceptable to do so. In the scan line drive circuit 702, the clock signal is sent to the shift register 706. A selection signal is generated when the (CLK) and start pulse signal (SP) are input. The generated selection signal is buffered and amplified in buffer 707 and then applied to the corresponding scan line. It is supplied. The scan line is connected to the gate of the transistor for one line of pixels. And, since the transistors for all the pixels in one line must be turned ON at the same time, The F707 is a type that can handle large currents.

[0243] A full-color liquid crystal display that displays video signals corresponding to R (red), G (green), and B (blue). If the data is sampled sequentially and supplied to the corresponding signal line, the shift register 704 and The number of terminals for connecting the analog switch 705 and the pixel unit 7 This corresponds to about one-third of the number of terminals needed to connect the 00 signal line. Therefore, analog switches By forming the 705 on the same substrate as the pixel section 701, the analog switch 705 is positioned at the pixel Compared to the case where it is formed on a different substrate from part 701, the terminals used for connecting a separately formed substrate This reduces the number of connections, lowers the probability of connection failures, and improves yield.

[0244] Furthermore, the scan line drive circuit 702 in Figure 32 uses a shift register 706 and a buffer 707. However, the scan line drive circuit 702 may be configured using the shift register 706.

[0245] Note that the configuration shown in Figure 32 is merely one embodiment of the display device of the present invention, and the signal line drive The configuration of the circuit and scan line drive circuit is not limited to this.

[0246] Next, a shift register including thin-film transistors using LPSAS films with all polarities being the same. One form of this embodiment will be explained using Figures 33 and 34. Figure 33 shows the shift of this embodiment. The register configuration is shown. The shift register shown in Figure 33 consists of multiple flip-flops 701 It consists of _i (one of the flip-flops 701_1 to 701_n). The inputs are the first clock signal, the second clock signal, the start pulse signal, and the reset signal. It operates in this manner.

[0247] The connection relationship of the shift register in Figure 33 will be explained. The shift register in Figure 33 is i-stage The flip-flop 701_i (one of the flip-flops 701_1 to 701_n) In one of these cases, the first wiring 501 shown in Figure 34 is connected to the seventh wiring 717_i-1. The second wiring 502 shown in Figure 34 is connected to the seventh wiring 717_i+1, as shown in Figure 34. The third wiring 503 is connected to the seventh wiring 717_i, and the sixth wiring 50 shown in Figure 34 6 is connected to the fifth wire 715.

[0248] Furthermore, the fourth wiring 504 shown in Figure 34 is the second wiring 7 in odd-numbered flip-flops. It is connected to 12, and in even-numbered flip-flops it is connected to the third wiring 713, as shown in Figure 34. The fifth wiring 505 shown is connected to the fourth wiring 714.

[0249] However, the first wiring 501 shown in Figure 34 of the first stage flip-flop 701_1 is the first Connected to wiring 711, the second wiring shown in Figure 34 of the nth stage flip-flop 701_n 502 is connected to the sixth wiring 716.

[0250] Furthermore, the first wiring 711, the second wiring 712, the third wiring 713, and the sixth wiring 716 are These can also be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 714 and the fifth wiring 715 are connected to the first power line and the second power line, respectively. You can call me.

[0251] Next, the details of the flip-flop shown in Figure 33 are shown in Figure 34. The flop consists of a first thin-film transistor 171, a second thin-film transistor 172, and a third Thin-film transistor 173, fourth thin-film transistor 174, fifth thin-film transistor 1 75, the sixth thin-film transistor 176, the seventh thin-film transistor 177 and the eighth thin-film transistor It has a transistor 178. In this embodiment, the first thin-film transistor 171, the 2 thin-film transistor 172, 3 thin-film transistor 173, 4 thin-film transistor 174, the fifth thin-film transistor 175, the sixth thin-film transistor 176, the seventh thin-film transistor The transistors 177 and 178 of the eighth thin-film transistor are n-channel type transistors. The gate-source voltage (Vgs) exceeds the threshold voltage (Vth) when it enters a conduction state. It shall be so.

[0252] Next, the connection configuration of the flip-flops shown in Figure 33 is described below.

[0253] The first electrode (either the source electrode or the drain electrode) of the first thin-film transistor 171 The fifth wiring 504 is connected to the second electrode (source electrode) of the first thin-film transistor 171. The other (or drain electrode) is connected to the third wiring 503.

[0254] The first electrode of the second thin-film transistor 172 is connected to the sixth wiring 506, and the second thin film The second electrode of transistor 172 is connected to the third wiring 503.

[0255] The first electrode of the third thin-film transistor 173 is connected to the fifth wiring 505, and the third thin film The second electrode of transistor 173 is connected to the gate electrode of the second thin-film transistor 172. Then, the gate electrode of the third thin-film transistor 173 is connected to the fifth wiring 505.

[0256] The first electrode of the fourth thin-film transistor 174 is connected to the sixth wiring 506, and the fourth thin film The second electrode of transistor 174 is connected to the gate electrode of the second thin-film transistor 172. The gate electrode of the fourth thin-film transistor 174 is connected to the gate electrode of the first thin-film transistor 171. It is connected to the electrode.

[0257] The first electrode of the fifth thin-film transistor 175 is connected to the fifth wiring 505, and the fifth thin film The second electrode of transistor 175 is connected to the gate electrode of the first thin-film transistor 171. Then, the gate electrode of the fifth thin-film transistor 175 is connected to the first wiring 501.

[0258] The first electrode of the sixth thin-film transistor 176 is connected to the sixth wiring 506, and the sixth thin film The second electrode of transistor 176 is connected to the gate electrode of the first thin-film transistor 171. The gate electrode of the sixth thin-film transistor 176 is connected to the gate electrode of the second thin-film transistor 172. It is connected to the electrode.

[0259] The first electrode of the seventh thin-film transistor 177 is connected to the sixth wiring 506, and the seventh thin film The second electrode of transistor 177 is connected to the gate electrode of the first thin-film transistor 171. Then, the gate electrode of the seventh thin-film transistor 177 is connected to the second wiring 502. The first electrode of the thin-film transistor 178 is connected to the sixth wiring 506, and the eighth thin-film transistor The second electrode of transistor 178 is connected to the gate electrode of the second thin-film transistor 172. The gate electrode of the eighth thin-film transistor 178 is connected to the first wiring 501.

[0260] Furthermore, the gate electrode of the first thin-film transistor 171 and the gate electrode of the fourth thin-film transistor 174 Electrode, second electrode of the fifth thin-film transistor 175, sixth thin-film transistor 176 The connection point between the second electrode of the 7th thin-film transistor 177 and the second electrode of the 7th thin-film transistor 177 is at node 143 Furthermore, the gate electrode of the second thin-film transistor 172, the third thin-film transistor 173's second electrode, 4th thin film transistor 174's second electrode, 6th thin film transistor The connection point between the gate electrode of transistor 176 and the second electrode of thin-film transistor 178 is Let's set it to code 144.

[0261] Furthermore, the first wiring 501, the second wiring 502, the third wiring 503, and the fourth wiring 504 These can also be called the first signal line, the second signal, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wire 505 may be called the first power line, and the sixth wire 506 may be called the second power line. stomach.

[0262] Figure 35 shows an example of a top view of the flip-flop shown in Figure 34.

[0263] The conductive film 901 includes a portion that functions as the first electrode of the first thin-film transistor 171. It is connected to the fourth wiring 504 via wiring 951 which is formed simultaneously with the pixel electrode.

[0264] The conductive film 902 includes a portion that functions as the second electrode of the first thin-film transistor 171. It is connected to the third wiring 503 via wiring 952 which is formed simultaneously with the pixel electrode.

[0265] The conductive film 903 is the gate electrode of the first transistor and the fourth thin-film transistor 174 It includes a part that functions as the gate electrode.

[0266] The conductive film 904 is the first electrode of the second thin-film transistor 172, and the sixth thin-film transistor The first electrode of 176, the first electrode of the fourth thin-film transistor 174, and the eighth thin-film transistor It includes a portion that functions as the first electrode of the inverter 178 and is connected to the sixth wiring 506. .

[0267] The conductive film 905 includes a portion that functions as the second electrode of the second thin-film transistor 172. It is connected to the third wiring 503 via wiring 954 which is formed simultaneously with the pixel electrode.

[0268] The conductive film 906 is the gate electrode of the second thin-film transistor 172, and the sixth transistor It includes a part that functions as a gate electrode.

[0269] The conductive film 907 includes a portion that functions as the first electrode of the third thin-film transistor 173. It is connected to the fifth wiring 505 via wiring 955.

[0270] The conductive film 908 is the second electrode of the third thin-film transistor 173, and the fourth thin-film transistor Wiring 9, which includes a portion that functions as the second electrode of sta 174 and is formed simultaneously with the pixel electrode. It is connected to the conductive film 906 via 56.

[0271] The conductive film 909 includes a portion that functions as the gate electrode of the third thin-film transistor 173. It is connected to the fifth wiring 505 via wiring 955.

[0272] The conductive film 910 includes a portion that functions as the first electrode of the fifth thin-film transistor 175. It is connected to the fifth wiring 505 via wiring 959 which is formed simultaneously with the pixel electrode.

[0273] The conductive film 911 is the second electrode of the fifth thin-film transistor 175, and the seventh thin-film transistor Wiring 9, which includes a portion that functions as the second electrode of sta 177 and is formed simultaneously with the pixel electrode. It is connected to the conductive film 903 via 58.

[0274] The conductive film 912 includes a portion that functions as the gate electrode of the fifth thin-film transistor 175. It is connected to the first wiring 501 via wiring 960 which is formed simultaneously with the pixel electrode.

[0275] The conductive film 913 includes a portion that functions as the second electrode of the sixth thin-film transistor 176. It is connected to the conductive film 903 via wiring 957 that is formed simultaneously with the pixel electrodes.

[0276] The conductive film 914 includes a portion that functions as the gate electrode of the seventh thin-film transistor 177. It is connected to the second wiring 502 via wiring 962 that is formed simultaneously with the pixel electrode.

[0277] The conductive film 915 includes a portion that functions as the gate electrode of the eighth thin-film transistor 178. It is connected to the conductive film 912 via wiring 961 that is formed simultaneously with the pixel electrodes.

[0278] The conductive film 916 includes a portion that functions as the second electrode of the eighth thin-film transistor 178. It is connected to the conductive film 906 via wiring 953 that is formed simultaneously with the pixel electrodes.

[0279] The circuits shown in Figures 32 to 34 are constructed using transistors made of microcrystalline semiconductors. Liquid crystal display devices can operate circuits at high speed. For example, by using an amorphous semiconductor film... Comparing the case using the LPSAS film with the case using the LPSAS film, the case using the LPSAS film is better. Because the transistor has high mobility, the drive circuit (for example, the shift of the scan line drive circuit 702) This makes it possible to increase the drive frequency of the zista 706. Because it can be operated in this way, the frame rate can be increased, or black screen insertion can be performed. It is possible to achieve things that need to be achieved.

[0280] When increasing the frame rate, the screen data is generated according to the direction of image movement. This is desirable. In other words, it is desirable to interpolate the data by performing motion compensation. Furthermore, by increasing the frame rate and interpolating image data, the display characteristics of the video are improved. This allows for smoother display. For example, twice the frequency (e.g., 120 Hz, 100 Hz) To increase the frequency to 4 times or more, more preferably to 480 Hz, 400 Hz or more. This can reduce image blur and afterimages in videos. In that case, the scan line drive cycle By operating on track 702 with a higher drive frequency, the frame frequency can be increased. It is possible.

[0281] When inserting a black screen, image data or data that will be displayed as black is supplied to the pixel unit 701. This makes it possible. As a result, it becomes similar to impulse driving, which reduces afterimages. It will come. In that case, the scan line drive circuit 702 will also be operated at a higher drive frequency. This allows for the insertion of a black screen.

[0282] Furthermore, the channel width of the transistors in the scan line drive circuit 702 can be increased, and multiple By incorporating a scan line drive circuit, it is possible to achieve an even higher frame frequency. This is possible. For example, a frame frequency of 8 times (e.g., 960 Hz, 800 Hz) or more. This is possible. When arranging multiple scan line drive circuits, to drive even-numbered scan lines The scan line drive circuit is located on one side, and the scan line drive circuit for driving odd-numbered scan lines is located on the other side. By placing it on the opposite side, it is possible to increase the frame frequency. For example, the channel width of the second thin-film transistor 172 is 300 μm or more. Preferably, the particle size should be 1000 μm or larger.

[0283] Furthermore, the circuits shown in Figures 32 to 34 can be constructed using transistors made of microcrystalline semiconductors. By doing so, the layout area can be reduced. Therefore, one of the display devices For example, the bezel of a liquid crystal display device can be made smaller. For example, by using an amorphous semiconductor film. Comparing the case using the LPSAS film with the case using the LPSAS film, the case using the LPSAS film is better. Because the transistor has high mobility, the transistor's channel width can be reduced. As a result, it becomes possible to narrow the bezel of liquid crystal display devices. One example is the second The channel width of the thin-film transistor 172 is 3000 μm or less, more preferably 2000 μm. It is desirable that the size be less than or equal to μm.

[0284] Note that the second thin-film transistor 172 in Figure 34 is connected to the third wiring 503 at a low level. The signal is output for a long period. During that time, the second thin-film transistor 172 remains ON. This is the state in which the second thin-film transistor 172 is subjected to strong stress. As a result, the transistor characteristics are more prone to degradation. When the transistor characteristics degrade, The voltage gradually increases. As a result, the current decreases. To ensure sufficient current supply even if the transistor degrades, a second thin-film transistor is used. A large channel width is desirable for the STA172. Alternatively, even if the transistor degrades... It is desirable that the circuit operation is not affected by compensation. For example, the second thin film A transistor is placed in parallel with the transistor 172, and the second thin-film transistor 172 is connected to it. It is desirable to make them less susceptible to degradation by keeping them both in the ON state. stomach.

[0285] However, when comparing the case using an amorphous semiconductor film with the case using an LPSAS film When using an LPSAS film, degradation is less likely. Therefore, when using an LPSAS film... In this case, the channel width of the transistor can be reduced. Alternatively, compensation for degradation can be applied. It can be operated normally without the need to install compensation circuits. As a result, per pixel This allows for a reduction in the planar area of ​​each transistor.

[0286] (Embodiment 9) Figure 36 shows the external appearance and cross-section of a liquid crystal display panel corresponding to one embodiment of the display device of the present invention. Let's use this to explain. Figure 36(A) shows an LPSAS film formed on the first substrate 4001. The thin-film transistor 4010 and liquid crystal element 4013 are connected to the second substrate 4006. This is a top view of the panel sealed with material 4005, and Figure 36(B) is a top view of Figure 36(A). This corresponds to the cross-sectional view at A-A' of ).

[0287] The pixel section 4002 and the scanning line driving circuit 4004 are provided on the first substrate 4001. A sealing material 4005 is provided in such a manner. Also, the pixel section 4002 and the scanning line drive A second substrate 4006 is provided on top of the circuit 4004. Therefore, the pixel section 4002 and the running The probe drive circuit 4004 consists of a first substrate 4001, a sealing material 4005, and a second substrate 400 6 is sealed together with the liquid crystal 4008. Also, the seal on the first substrate 4001 Polycrystalline material is placed on a separately prepared substrate in a region different from the area enclosed by material 4005. A signal line driving circuit 4003 formed from a semiconductor film is implemented. A signal line drive circuit having a thin-film transistor using a polycrystalline semiconductor film is placed on the first substrate 40 I will now explain an example of bonding to 01, but the signal line is made of a single-crystal semiconductor transistor. The drive circuit may be formed and then glued together. In Figure 36, the signal line drive circuit 400 An example of a thin-film transistor 4009, formed from a polycrystalline semiconductor film, is included in 3.

[0288] Furthermore, the pixel section 4002 provided on the first substrate 4001 and the scanning line driving circuit 4004 are It has multiple thin-film transistors, and in Figure 36(B), the thin film transistor included in the pixel section 4002 The thin-film transistor 4010 is shown as an example. The thin-film transistor 4010 uses an LPSAS film. This corresponds to the thin-film transistor used.

[0289] Furthermore, 4013 corresponds to a liquid crystal element, and the pixel electrode 4030 of the liquid crystal element 4013 is thin It is electrically connected to the film transistor 4010, and to the counter electrode of the liquid crystal element 4013. 4031 is formed on the second substrate 4006. Pixel electrode 4030 and counter electrode 403 The area where 1 and liquid crystal 4008 overlap corresponds to the liquid crystal element 4013.

[0290] The first substrate 4001 and the second substrate 4006 are made of glass, metal (typically Stainless steel, ceramics, and plastic can be used. FRP (Fiberglass-Reinforced Plastics) sheet, P VF (polyvinyl fluoride) film, polyester film, or acrylic resin Film can be used. Also, aluminum foil can be used with PVF film or polyester. It is also possible to use a sheet with a structure sandwiched between layers of telfilm.

[0291] 4035 is a spherical spacer, between the pixel electrode 4030 and the counter electrode 4031. It is provided to control the distance (cell gap). Furthermore, the insulating film is selectively etched. You may also use spacers obtained by [doing something].

[0292] Furthermore, a separately formed signal line drive circuit 4003 and a scan line drive circuit 4004 or pixel unit The various signals and potentials supplied to 4002 are routed through wiring 4014 and 4015. It is supplied from FPC4018.

[0293] In this embodiment, the connection terminal 4016 is connected to the pixel electrode 4030 of the liquid crystal element 4013. It is formed from the same conductive film. Also, the routing wiring 4014 and 4015 are thin film traces. It is formed of the same conductive film as the source electrode or drain electrode of the converter 4010.

[0294] The connection terminal 4016 is connected to the terminals of the FPC 4018 via the anisotropic conductive film 4019. They are electrically connected.

[0295] Although not shown in the figures, the liquid crystal display device shown in this embodiment has an alignment film and a polarizing plate. Furthermore, it may also have color filters or shielding films.

[0296] Furthermore, in Figure 36, a signal line drive circuit 4003 is formed separately and mounted on the first substrate 4001. While an example is shown, this embodiment is not limited to this configuration. You can either create a separate circuit and implement it, or use only a part of the signal line drive circuit or a part of the scan line drive circuit. It may also be formed and implemented separately.

[0297] This embodiment can be implemented in combination with the configurations described in other embodiments. be.

[0298] (Embodiment 10) Next, regarding the appearance and cross-section of a light-emitting display panel corresponding to one embodiment of the display device of the present invention, This will be explained using Figure 37(A). Figure 37 shows an LPSAS film formed on a first substrate. The thin-film transistor and light-emitting element are sealed between the second substrate and the second substrate with a sealing material. This is a top view of the panel, and Figure 37(B) corresponds to the cross-sectional view at A-A' in Figure 37(A). do.

[0299] The pixel section 4002 and the scanning line driving circuit 4004 are provided on the first substrate 4001. A sealing material 4005 is provided in such a manner. Also, the pixel section 4002 and the scanning line drive A second substrate 4006 is provided on top of the circuit 4004. Therefore, the pixel section 4002 and the running The probe drive circuit 4004 consists of a first substrate 4001, a sealing material 4005, and a second substrate 400 6 is sealed together with the filler material 4007. Also, the first substrate 4001 Multiple connections are made on a separately prepared substrate in an area different from the area enclosed by material 4005. A signal line driving circuit 4003 formed from a crystalline semiconductor film is mounted. This includes a signal line driving circuit having a thin-film transistor using a polycrystalline semiconductor film, on a first substrate 4 I will now explain an example of bonding to 001, but a transistor using a single crystal semiconductor will signal A line drive circuit may be formed and then glued together. In Figure 37, the signal line drive circuit 40 An example of a thin-film transistor 4009, formed from a polycrystalline semiconductor film, is included in 03.

[0300] Furthermore, the pixel section 4002 provided on the first substrate 4001 and the scanning line driving circuit 4004 are It has multiple thin-film transistors, and in Figure 37(B), the thin film transistor included in the pixel section 4002 A thin film transistor 4010 is shown as an example. In this embodiment, the thin film transistor 4 Assuming that 010 is a driving TFT, thin-film transistor 4010 is a current control TFT. It can be a T or an erase TFT. Thin-film transistor 4010 is LPS This corresponds to a thin-film transistor using an AS film.

[0301] Furthermore, 4011 corresponds to a light-emitting element, and the pixel electrodes of the light-emitting element 4011 are thin-film transistors. The source or drain electrode of the zista 4010 is electrically connected via wiring 4017. In this embodiment, the light-emitting element 4011 is made of a light-transmitting conductive material 4 012 is electrically connected. The configuration of the light-emitting element 4011 is as shown in this embodiment. The configuration is not limited to this. The direction of light extracted from the light-emitting element 4011, and the thin-film transistor 4 The configuration of the light-emitting element 4011 can be changed as appropriate to match the polarity of 010, etc.

[0302] In addition, a separately formed signal line drive circuit 4003 and a scan line drive circuit 4004 or pixel Various signals and potentials supplied to section 4002 are transmitted via wiring 4014 and 4015. It is supplied from FPC4018.

[0303] In this embodiment, the connection terminal 4016 has the same conductive film as the pixel electrode of the wiring 4017. It is formed from. Also, the routing wires 4014 and 4015 are thin-film transistors 40 It is formed from the same conductive film as the 10 source or drain electrodes.

[0304] The connection terminal 4016 is connected to the terminals of the FPC 4018 via the anisotropic conductive film 4019. They are electrically connected.

[0305] The substrate located in the direction of light extraction from the light-emitting element 4011 must be transparent. In that case, glass plate, plastic plate, polyester film or acrylic film A translucent material such as lum is used.

[0306] Furthermore, in addition to inert gases such as nitrogen and argon, filler material 4007 also contains UV-curable gases. Resins or thermosetting resins can be used, such as PVC (polyvinyl chloride) and acrylic. Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used as a filler. In this embodiment, Nitrogen was used.

[0307] Additionally, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. Even if optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters are appropriately provided, Good. Alternatively, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, due to surface irregularities... It is possible to apply an anti-glare treatment that diffuses reflected light and reduces glare.

[0308] In Figure 37, the signal line drive circuit 4003 is formed separately and mounted on the first substrate 4001. An example is shown, but this embodiment is not limited to this configuration. They may be formed and implemented separately, or only as part of the signal line drive circuit or part of the scan line drive circuit. Alternatively, you could create and implement it separately.

[0309] This embodiment can be implemented in combination with the configurations described in other embodiments. be.

[0310] (Embodiment 11) The display device obtained by the present invention allows for the use of an active matrix type display module. It can be used in all electronic devices that incorporate them into their display units. It can be done.

[0311] Such electronic devices include video cameras, digital cameras, and head-mounted displays. Ray (goggle-type display), car navigation, projector, car stereo, Personal computers, personal information terminals (mobile computers, mobile phones or e-books) Examples include registration documents, etc. An example of these is shown in Figure 30.

[0312] Figure 30(A) shows a television system. The display module is as shown in Figure 30(A). Then, it can be assembled into a housing to complete the television system. The FPC can also be attached. The attached display panel is also called a display module. The display module controls the main screen 20 03 is formed, and other auxiliary equipment such as a speaker unit 2009 and operating switches are provided. In this way, the television system can be completed.

[0313] As shown in Figure 30(A), a display panel 2002 using a display element is installed in the housing 2001. It incorporates the receiver 2005, which can receive general television broadcasts, and the modem 2004. By connecting to a wired or wireless communication network via this, one-way communication (from the sender to the wireless network) is achieved. It is also possible to communicate information in two directions (between the sender and receiver, or between receivers). The television equipment can be operated using switches built into the casing or a separate remote control. This can be done using the 2006 unit, and the information to be output is also displayed on this remote control device. A display unit 2007 may be provided.

[0314] Furthermore, the television system also includes a sub-screen 2008 in addition to the main screen 2003 for use as a second display. It may also include a panel that displays channels, volume, etc. In this system, the main screen 2003 is made of a liquid crystal display panel with an excellent viewing angle, and the sub-screen uses a low-power display. It may also be formed from an illuminating display panel that can be displayed using electricity. Furthermore, to prioritize low power consumption... To achieve this, the main screen 2003 is formed from an illuminated display panel, and the sub-screen is formed from an illuminated display panel. The sub-screen can also be configured to blink.

[0315] Figure 31 shows a block diagram illustrating the main components of the television system. The display panel 900 has , the pixel section 921 is formed. The signal line driving circuit 922 and the scan line driving circuit 923 are shown The display panel 900 may also be implemented using the COG method.

[0316] Other external circuit configurations include, on the video signal input side, the signal received by tuner 924 Among the components, the video signal amplification circuit 925 amplifies the video signal, and the signal output from there is red. A video signal processing circuit 926 converts the video signal into color signals corresponding to green and blue, and the video signal It includes control circuits such as 927 for converting to the input specifications of the driver IC. The control circuit 927 outputs signals to the scan line side and the signal line side, respectively. Digital drive In this case, a signal splitting circuit 928 is provided on the signal line side to split the input digital signal into m parts. It would also be acceptable to supply it in this configuration.

[0317] Of the signals received by the tuner 924, the audio signal is sent to the audio signal amplification circuit 929. The output is then supplied to the speaker 933 via the audio signal processing circuit 930. Control circuit 93 Unit 1 receives control information for the receiving station (receiving frequency) and volume from the input unit 932, and the tuner 924 and A signal is sent to the audio signal processing circuit 930.

[0318] Of course, the present invention is not limited to television equipment, but also applies to personal computer monitors. Initially, large-area displays such as information boards in train stations and airports, and advertising boards on the streets. It can be applied to a variety of uses as a display medium.

[0319] Figure 30(B) shows an example of the mobile phone 2301. This mobile phone 2301 is... It is composed of a display unit 2302, an operation unit 2303, etc. By applying the display device described in the above embodiment, mass production efficiency can be improved.

[0320] Furthermore, the portable computer shown in Figure 30(C) consists of the main unit 2401, the display unit 2402, etc. It includes the following. By applying the display device shown in the above embodiment to the display unit 2402 This allows for increased mass production capabilities.

[0321] Figure 30(D) shows a table lamp fixture, consisting of a lighting unit 2501, a shade 2502, and a variable arm 2503. , including support column 2504, base 2505, and power supply 2506. The light-emitting device of the present invention is the lighting unit 2501 It is manufactured by using it. Note that the lighting fixtures include ceiling-mounted or wall-mounted lighting fixtures. This also includes lighting fixtures of the type shown. By applying the display device shown in the above embodiment, the quantity This can increase productivity and allow us to provide inexpensive desk lamps. [Explanation of Symbols]

[0322] 23a: Microcrystalline semiconductor film 23b: Microcrystalline semiconductor film containing boron 33a:LPSAS membrane 33b: Microcrystalline semiconductor film containing boron 43: Microcrystalline semiconductor film 50: Circuit board 51: Gate Shutdown 52a, 52b, 52c: Gate insulating film 53:LPSAS membrane 54: Buffer layer 55: Semiconductor film with impurities that impart a single conductivity type 56: Resist Mask 59: Multi-gradation mask 61:LPSAS membrane 62: Buffer Layer 63: Semiconductor film with impurities that impart a single conductivity type 65a, 65b, 65c: Conductive film 66: Resist Mask 71a, 71b, 71c: Source electrode and drain electrode 72: Source area and drain area 73: Buffer layer 74: Thin-film transistor 76: Insulating film 77: Pixel electrode 80: Resist 81: Resist Mask 83: Thin-film transistor 85a~85c: Conductive film 87: Buffer Layer 86: Resist Mask 88: Source area and drain area 90:LPSAS membrane 92a, 92b, 92c: Source electrode and drain electrode 111: Flattening film

Claims

1. A multi-stage circuit has at least one circuit containing a first to seventh transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the third wiring. Either the source electrode or the drain electrode of the fourth transistor is electrically connected to the second wiring. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other of the drain electrode of the fifth transistor is electrically connected to the third wiring. The gate electrode of the fifth transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the sixth transistor is electrically connected to the second wiring. The source electrode or drain electrode of the sixth transistor, the other of which is electrically connected to the gate electrode of the first transistor, The gate electrode of the sixth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the seventh transistor is electrically connected to the second wiring. The source electrode or the other of the drain electrode of the seventh transistor is electrically connected to the gate electrode of the second transistor, in a semiconductor device. A first conductive film having the function of either the source electrode or the drain electrode of the second transistor, A second conductive film is electrically connected to the first conductive film and has a region that overlaps with the first conductive film, A third conductive film having the function of the second wiring, The device comprises a fourth conductive film having the function of a gate electrode of the first transistor, The aforementioned second conductive film intersects with the aforementioned third conductive film. The fourth conductive film intersects with the third conductive film. Semiconductor equipment.

2. A multi-stage circuit has at least one circuit containing a first to seventh transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the third wiring. Either the source electrode or the drain electrode of the fourth transistor is electrically connected to the second wiring. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other of the drain electrode of the fifth transistor is electrically connected to the third wiring. The gate electrode of the fifth transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the sixth transistor is electrically connected to the second wiring. The source electrode or drain electrode of the sixth transistor, the other of which is electrically connected to the gate electrode of the first transistor, The gate electrode of the sixth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the seventh transistor is electrically connected to the second wiring. The source electrode or the other of the drain electrode of the seventh transistor is electrically connected to the gate electrode of the second transistor, in a semiconductor device. The first wiring has the function of gate wiring, The second wiring described above functions as a power line, A first conductive film having the function of either the source electrode or the drain electrode of the second transistor, A second conductive film is electrically connected to the first conductive film and has a region that overlaps with the first conductive film, A third conductive film having the function of the second wiring, The device comprises a fourth conductive film having the function of a gate electrode of the first transistor, The aforementioned second conductive film intersects with the aforementioned third conductive film. The fourth conductive film intersects with the third conductive film. Semiconductor equipment.

3. A multi-stage circuit has at least one circuit containing a first to seventh transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the third wiring. Either the source electrode or the drain electrode of the fourth transistor is electrically connected to the second wiring. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other of the drain electrode of the fifth transistor is electrically connected to the third wiring. The gate electrode of the fifth transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the sixth transistor is electrically connected to the second wiring. The source electrode or drain electrode of the sixth transistor, the other of which is electrically connected to the gate electrode of the first transistor, The gate electrode of the sixth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the seventh transistor is electrically connected to the second wiring. The source electrode or the other of the drain electrode of the seventh transistor is electrically connected to the gate electrode of the second transistor, in a semiconductor device. A first conductive film having the function of either the source electrode or the drain electrode of the second transistor, A second conductive film is electrically connected to the first conductive film and has a region that overlaps with the first conductive film, A third conductive film having the function of the second wiring, The device comprises a fourth conductive film having the function of a gate electrode of the first transistor, The third conductive film has a region located between the channel formation region of the first transistor and the channel formation region of the third transistor. The third conductive film has a region located between the channel formation region of the first transistor and the channel formation region of the fourth transistor. The aforementioned second conductive film intersects with the aforementioned third conductive film. The fourth conductive film intersects with the third conductive film. Semiconductor equipment.

4. A multi-stage circuit has at least one circuit containing a first to seventh transistor, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring. The source electrode or drain electrode of the second transistor is electrically connected to the first wiring. The source electrode or drain electrode of the third transistor is electrically connected to the gate electrode of the second transistor. The source electrode or the other drain electrode of the third transistor is electrically connected to the third wiring. Either the source electrode or the drain electrode of the fourth transistor is electrically connected to the second wiring. The source electrode or the other drain electrode of the fourth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the fifth transistor is electrically connected to the gate electrode of the first transistor. The source electrode or the other of the drain electrode of the fifth transistor is electrically connected to the third wiring. The gate electrode of the fifth transistor is electrically connected to the fourth wiring. The source electrode or drain electrode of the sixth transistor is electrically connected to the second wiring. The source electrode or drain electrode of the sixth transistor, the other of which is electrically connected to the gate electrode of the first transistor, The gate electrode of the sixth transistor is electrically connected to the gate electrode of the second transistor. The source electrode or drain electrode of the seventh transistor is electrically connected to the second wiring. The source electrode or the other of the drain electrode of the seventh transistor is electrically connected to the gate electrode of the second transistor, in a semiconductor device. The first wiring has the function of gate wiring, The second wiring described above functions as a power line, A first conductive film having the function of either the source electrode or the drain electrode of the second transistor, A second conductive film is electrically connected to the first conductive film and has a region that overlaps with the first conductive film, A third conductive film having the function of the second wiring, The device comprises a fourth conductive film having the function of a gate electrode of the first transistor, The third conductive film has a region located between the channel formation region of the first transistor and the channel formation region of the third transistor. The third conductive film has a region located between the channel formation region of the first transistor and the channel formation region of the fourth transistor. The aforementioned second conductive film intersects with the aforementioned third conductive film. The fourth conductive film intersects with the third conductive film. Semiconductor equipment.

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