Power converter

Abstract

This electric power conversion device comprises: inductors (Lc1, Lc2), one end of each of which is connected to a power supply terminal (P, N); a converter circuit (20) provided with input terminals (3, 4) to which the other ends of the inductors (Lc1, Lc2) are connected, a switch (Q1) connected between the input terminals (3, 4), and a resonance circuit (30); an X capacitor (Cx) connected between the input terminals (3, 4); and Y capacitors (Cy1, Cy2) connected between the input terminals (3, 4) and a ground (E). The composite capacity of the X capacitor (Cx) and the Y capacitors (Cy1, Cy2) constitutes part of the converter circuit (20). The inductors (Lc1, Lc2) and the Y capacitors (Cy1, Cy2) constitute a filter circuit.

Description

Technical Field

[0001] The present invention relates to a power conversion device. Background Art

[0002] Conventionally, power conversion devices that perform power conversion using LC resonance generated by a switching element and an LC resonance circuit have been known. In the conventional power conversion device described in Patent Document 1, for example, low-frequency AC power with an effective voltage of 200V and a frequency of 50Hz is boosted by a class-E inverter circuit that utilizes LC resonance generated by a switching element and an LC resonance circuit, and converted into high-frequency AC power. This power conversion device is a so-called E² class power conversion device that rectifies high-frequency AC power into DC power by means of a class-E rectifier circuit. Prior Art Documents Patent Documents

[0003] Patent Document 1 Japanese Unexamined Patent Application Publication No. 2021-145433 Summary of the Invention Problems to be Solved by the Invention

[0004] In Patent Document 1, the switching element is operated at the resonance frequency of the resonance circuit to improve the efficiency of power conversion, so the switching element operates at a high frequency. Further, due to the voltage resonance of the resonance circuit, the voltage between switching elements becomes higher than the input voltage. Therefore, the switching element causes high-frequency and high-voltage electromagnetic noise. In order to remove high-frequency and high-voltage electromagnetic noise, it is necessary to use a multi-stage noise filter, which leads to an increase in circuit size and cost.

[0005] An object of the present invention is to provide a power conversion device that achieves low loss through zero voltage switching of a converter circuit, reduces the number of stages of a noise filter due to a noise suppression effect, and can be reduced in size and cost. Means for Solving the Problems

[0006] A power conversion device according to one aspect of the present invention comprises a first inductor with one end connected to a first power terminal and a second inductor with one end connected to a second power terminal, a converter circuit having a first input terminal to which the other end of the first inductor is connected, a second input terminal to which the other end of the second inductor is connected, a switch connected between the first input terminal and the second input terminal, and a resonant circuit, an X capacitor connected between the first input terminal and the second input terminal, a first Y capacitor connected between the first input terminal and ground, and a second Y capacitor connected between the second input terminal and ground. The combined capacitance of the X capacitor, the first Y capacitor, and the second Y capacitor constitutes a part of the converter circuit. The first inductor and the first Y capacitor constitute a first filter circuit, and the second inductor and the second Y capacitor constitute a second filter circuit. [Effects of the Invention]

[0007] According to one aspect of the present invention, it is possible to provide a power conversion device that achieves low loss through zero-voltage switching of the converter circuit, reduces the number of noise filter stages through noise suppression, and enables miniaturization and cost reduction. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a circuit diagram showing the configuration of a power converter according to the first embodiment. [Figure 2] Figure 2 is a graph showing the voltage across the switch and the drain current of the converter circuit in the power conversion device according to the first embodiment. [Figure 3] Figure 3 is a graph showing the magnitude of the noise voltage at the switching frequency and its harmonic frequencies, and the filtering performance of the filter circuit composed of the first inductor and the first X capacitor and the second inductor and the second X capacitor, in the power conversion device according to the first embodiment. [Figure 4]Figure 4 is a graph comparing the noise terminal voltage of a power converter according to the first embodiment with that of a conventional power converter. [Figure 5] Figure 5 is a circuit diagram showing the configuration of a power converter according to the second embodiment. [Figure 6] Figure 6 is a circuit diagram showing the configuration of a power converter according to the third embodiment. [Figure 7] Figure 7 is a circuit diagram showing the configuration of the power converter according to the fourth embodiment. [Figure 8] Figure 8 is a circuit diagram showing the configuration of the power converter according to the fifth embodiment. [Figure 9] Figure 9 is a circuit diagram showing the configuration of a power converter according to the sixth embodiment. [Figure 10] Figure 10 is a circuit diagram showing the configuration of the power converter according to the seventh embodiment. [Modes for carrying out the invention]

[0009] Hereinafter, several power conversion devices according to embodiments of the present invention will be described in detail with reference to the drawings. In the drawings of each embodiment of the power conversion device, the same or corresponding parts are denoted by the same reference numerals and their descriptions are omitted.

[0010] (First Embodiment) A first embodiment will be described using Figures 1 to 4. Figure 1 is a circuit diagram showing the configuration of a power converter 10 according to the first embodiment. The power converter 10 includes a first power terminal P and a second power terminal N, a first inductor Lc1 and a second inductor Lc2, an X capacitor Cx, a first Y capacitor Cy1 and a second Y capacitor Cy2, and a converter circuit 20. For example, a DC power supply (not shown) is connected to the first power terminal P and the second power terminal N. One end of the first inductor Lc1 is connected to the first power terminal P. One end of the second inductor Lc2 is connected to the second power terminal N.

[0011] The converter circuit 20 includes a first input terminal 3, a second input terminal 4, a switch Q1, a resonant circuit 30, a first output terminal 5, and a second output terminal 6. The other end of the first inductor Lc1 is connected to the first input terminal 3. The other end of the second inductor Lc2 is connected to the second input terminal 4. The switch Q1 is connected between the first input terminal 3 and the second input terminal 4. The switch Q1 is composed of a semiconductor switching element such as an N-channel MOSFET. The resonant circuit 30 is connected between one end of the switch Q1 and the first output terminal 5. The resonant circuit 30 is a series resonant circuit in which a resonant inductor Lr and a resonant capacitor Cr are connected in series. The second output terminal 6 is connected to the other end of the switch Q1. A load 2 is connected between the first output terminal 5 and the second output terminal 6.

[0012] The X capacitor Cx is connected between the first input terminal 3 and the second input terminal 4. The X capacitor Cx is for reducing normal mode noise. The first Y capacitor Cy1 is connected between the first input terminal 3 and ground E. The second Y capacitor Cy2 is connected between the second input terminal 4 and ground E. The first Y capacitor Cy1 and the second Y capacitor Cy2 are for bypassing common mode noise to ground E. The first inductor Lc1, the second inductor Lc2, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 are each formed from individual components. However, this is not limited to this, and for example, the first Y capacitor Cy1 and the second Y capacitor Cy2 may be formed from the parasitic capacitance of switch Q1.

[0013] Furthermore, the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 functions as a shunt capacitor, which is part of the converter circuit 20. The converter circuit 20, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 constitute a Class E inverter circuit. Switch Q1 is then switched on and off at a switching frequency fs corresponding to the resonant frequency of the resonant circuit 30. The switching frequency fs is generally a high frequency of several tens of kHz to several MHz. The power of the DC power supply input to the power supply terminals P and N is converted into high-frequency power at the switching frequency fs and output to the output terminals 5 and 6. At this time, as shown in Figure 2, the converter circuit 20 can achieve zero-voltage switching such that when the voltage Vds across switch Q1 is zero, switch Q1 turns on and a drain current Id flows through switch Q1. This makes it possible to reduce the losses of the power conversion device 10.

[0014] Furthermore, the first inductor Lc1 and the second inductor Lc2, acting as common-mode choke coils, and the first Y capacitor Cy1 and the second Y capacitor Cy2, which bypass common-mode noise to ground E, function as filter circuits. More specifically, the first filter circuit is formed by the first inductor Lc1 and the first Y capacitor Cy1, and the second filter circuit is formed by the second inductor Lc2 and the second Y capacitor Cy2. If the inductance values ​​of the first inductor Lc1 and the second inductor Lc2 are L, and the capacitance values ​​of the first Y capacitor Cy1 and the second Y capacitor Cy2 are C, then the cutoff frequencies fc of the first and second filter circuits are expressed as shown in (Equation 1). fc=1 / 2π√(LC) …(Formula 1)

[0015] Then, for example, as shown in FIG. 3, the inductance value L and the capacitance value C are set such that the cutoff frequency fc of the first filter circuit and the second filter circuit is lower than the switching frequency fs. With this configuration, the power conversion device 10 can suppress noise voltage in components of the switching frequency fs and its harmonic frequencies 2fs, 3fs, .... The present invention is not limited to this, and the inductance value L and the capacitance value C may be set such that the cutoff frequency fc of the first filter circuit and the second filter circuit is lower than a predetermined harmonic among the harmonic frequencies 2fs, 3fs, .... In this case, noise voltage of components higher than the predetermined harmonic among the harmonic frequencies 2fs, 3fs, ... can be suppressed. Since the first inductor Lc1, the second inductor Lc2, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 are each formed of separate components, the value of the cutoff frequency fc can be easily adjusted. Further, when the first Y capacitor Cy1 and the second Y capacitor Cy2 are formed by the parasitic capacitance of the switch Q1, cost reduction can be achieved by reducing the number of separate components.

[0016] FIG. 4 shows a simulation result (solid line) of noise terminal voltage when a LISN (line impedance stabilization network) is connected to the first power supply terminal P and the second power supply terminal N of the power conversion device 10. The power conversion device 10 is set such that the cutoff frequency fc is lower than the switching frequency fs as shown in FIG. 3. For comparison, FIG. 4 also shows a simulation result (broken line) of noise terminal voltage when a LISN is connected to a conventional power conversion device as shown in FIG. 1 of Patent Document 1. As described above, by setting the cutoff frequency fc to be lower than the switching frequency fs, the power conversion device 10 according to the first embodiment can obtain a noise suppression effect of 14 dB compared with the conventional power conversion device.

[0017] Accordingly, the power converter 10 according to the first embodiment can achieve low loss through zero voltage switching of the converter circuit 20, reduce the number of stages of the noise filter, and achieve miniaturization and cost reduction of the device.

[0018] (Second Embodiment) The second embodiment will be described with reference to FIG. 5. FIG. 5 is a circuit diagram showing a configuration of a power converter 11 according to the second embodiment. The power converter 11 differs from the power converter 10 according to the first embodiment in that a rectifier circuit 40 is arranged at the subsequent stage of the converter circuit 20, and a load 2 is connected to the subsequent stage of the rectifier circuit 40. Other configurations of the power converter 11 are the same as those of the power converter 10 according to the first embodiment. Therefore, the description of the power converter 11 other than the rectifier circuit 40 will be omitted.

[0019] The rectifier circuit 40 is for rectifying the high-frequency current of the converter circuit 20, and is connected to the first output terminal 5 and the second output terminal 6 of the converter circuit 20. The rectifier circuit 40 includes a diode D1, a rectification-side shunt capacitor C1, an output choke inductor L1, an output capacitor C2, a third output terminal 7, and a fourth output terminal 8. The diode D1 is connected between the first output terminal 5 and the second output terminal 6. The rectification-side shunt capacitor C1 is connected in parallel to the diode D1. One end of the output choke inductor L1 is connected to one end of the rectification-side shunt capacitor C1. The output capacitor C2 is connected between the other end of the output choke inductor L1 and the other end of the rectification-side shunt capacitor C1. The third output terminal 7 is connected to one end of the output capacitor C2. The fourth output terminal 8 is connected to the other end of the output capacitor C2. The load 2 is connected between the third output terminal 7 and the fourth output terminal 8. The rectifier circuit 40 has a configuration of a so-called class E rectifier.

[0020] Furthermore, the cutoff frequencies fc of the first filter circuit, which consists of the first inductor Lc1 and the first Y capacitor Cy1, and the second filter circuit, which consists of the second inductor Lc2 and the second Y capacitor Cy2, are set in the same manner as in the first embodiment. In the power converter 11 according to the second embodiment, the effect of suppressing noise voltage is the same as in the power converter 10 according to the first embodiment.

[0021] In the power converter 11 according to the second embodiment, similar to the power converter 10 according to the first embodiment, it is possible to achieve low loss by zero-voltage switching of the converter circuit 20, as well as reduce the number of noise filter stages, thereby achieving miniaturization and cost reduction of the device.

[0022] Furthermore, the same effect can be obtained by using other rectifier circuits, such as a so-called Class D rectifier circuit consisting of four bridge-connected diodes, instead of the rectifier circuit 40.

[0023] (Third embodiment) A third embodiment will be described using Figure 6. Figure 6 is a circuit diagram showing the configuration of the power converter 12 according to the third embodiment. The power converter 12 differs from the power converter 10 according to the first embodiment in that it uses a converter circuit 21 as shown in Figure 6 instead of a converter circuit 20 as shown in Figure 1. In addition, a low-frequency commercial AC power supply (not shown) of 50 Hz is connected to, for example, the first power terminal P and the second power terminal N of the power converter 12. The other configurations of the power converter 12 are the same as those of the power converter 10 according to the first embodiment, so a detailed explanation will be omitted.

[0024] The converter circuit 21 shown in Figure 6 comprises a first input terminal 3, a second input terminal 4, a switch group 33 in which a first switch Q1 and a second switch Q2 are connected in series, a resonant circuit 30, a first output terminal 5, and a second output terminal 6. The switch group 33, in which the first switch Q1 and the second switch Q2 are connected in series, is connected between the first input terminal 3 and the second input terminal 4. The first switch Q1 and the second switch Q2 are composed of semiconductor switching elements such as N-channel MOSFETs. The switch group 33 may be configured with three or more switches connected in series. The resonant circuit 30 is connected between one end of the switch group 33 and the first output terminal 5. The resonant circuit 30 is a series resonant circuit in which a resonant inductor Lr and a resonant capacitor Cr are connected in series. The second output terminal 6 is connected to the other end of the switch group 33. A load 2 is connected between the first output terminal 5 and the second output terminal 6.

[0025] The combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 functions as a shunt capacitor, which is part of the converter circuit 21. The converter circuit 21, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 constitute a Class E power factor correction circuit.

[0026] Depending on the polarity of the AC voltages input to the first input terminal 3 and the second input terminal 4, one of the first switch Q1 and the second switch Q2 is switched on or off at a switching frequency fs corresponding to the resonant frequency of the resonant circuit 30. The other switch of the first switch Q1 and the second switch Q2 is kept on and conducting. At this time, one of the switches in the converter circuit 21 is zero-voltage switched as shown in Figure 2. When the polarity of the AC voltage is reversed, the operation of the first switch Q1 and the second switch Q2 is also reversed. With this configuration, it is possible for the power converter 12 to operate as a power factor correction circuit.

[0027] Furthermore, the cutoff frequencies fc of the first filter circuit, which consists of a first inductor Lc1 and a first Y capacitor Cy1, and the second filter circuit, which consists of a second inductor Lc2 and a second Y capacitor Cy2, are set in the same way as in the first embodiment. In the third embodiment, AC power is connected to the first power terminal P and the second power terminal N, and a switch group 33 is used in which a first switch Q1 and a second switch Q2 are connected in series, which is different from the first embodiment, but the effect of suppressing noise voltage is the same as in the first embodiment.

[0028] In the power converter 12 according to the third embodiment, similar to the power converter 10 according to the first embodiment, it is possible to achieve low loss by zero-voltage switching of the converter circuit 21, as well as reduce the number of noise filter stages, thereby achieving miniaturization and cost reduction of the device.

[0029] (Fourth embodiment) The fourth embodiment will be described using Figure 7. Figure 7 is a circuit diagram showing the configuration of the power converter 13 according to the fourth embodiment. The power converter 13 differs from the power converter 12 according to the third embodiment in that a rectifier circuit 40 similar to that of the second embodiment is placed after the converter circuit 21, and a load 2 is connected after the rectifier circuit 40.

[0030] The cutoff frequencies fc of the first filter circuit, which consists of a first inductor Lc1 and a first Y capacitor Cy1, and the second filter circuit, which consists of a second inductor Lc2 and a second Y capacitor Cy2, are set in the same way as in the first embodiment. In the power converter 13 according to the fourth embodiment, the effect of suppressing noise voltage is the same as in the power converter 10 according to the first embodiment.

[0031] In the power converter 13 according to the fourth embodiment, in addition to achieving low loss through zero-voltage switching of the converter circuit 21, the number of noise filter stages can be reduced, similar to the power converter 10 according to the first embodiment, thereby achieving miniaturization and cost reduction of the device.

[0032] Furthermore, the same effect can be obtained by using other rectifier circuits, such as a so-called Class D rectifier circuit consisting of four bridge-connected diodes, instead of the rectifier circuit 40.

[0033] (Fifth embodiment) The fifth embodiment will be described using Figure 8. Figure 8 is a circuit diagram showing the configuration of the power converter 14 according to the fifth embodiment. The power converter 14 differs from the power converter 10 according to the first embodiment in that it uses a converter circuit 22 as shown in Figure 8 instead of a converter circuit 20 as shown in Figure 1. The other configurations of the power converter 14 are the same as those of the power converter 10 according to the first embodiment, so a detailed explanation will be omitted.

[0034] The converter circuit 22 shown in Figure 8 includes a first input terminal 3, a second input terminal 4, a switch Q1, a first series circuit 31 consisting of a resonant inductor Lr and a first diode D2, a first output terminal 5, and a second output terminal 6.

[0035] Switch Q1 is connected between the first input terminal 3 and the second input terminal 4. Switch Q1 is composed of a semiconductor switching element such as an N-channel MOSFET. The first series circuit 31 is connected between one end of switch Q1 and the first output terminal 5. The second output terminal 6 is connected to the other end of switch Q1. Load 2 is connected between the first output terminal 5 and the second output terminal 6. In addition, the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2, which are connected in parallel to switch Q1, functions as a resonant capacitor. The converter circuit 22, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 constitute a voltage resonant boost chopper circuit. The switching frequency fs of switch Q1 is set to a value corresponding to the resonant frequency of the resonant inductor Lr and the resonant capacitor which is the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2. As a result, switch Q1 of the converter circuit 22 is zero-voltage switched as shown in Figure 2.

[0036] Furthermore, the cutoff frequencies fc of the first filter circuit, which consists of the first inductor Lc1 and the first Y capacitor Cy1, and the second filter circuit, which consists of the second inductor Lc2 and the second Y capacitor Cy2, are set in the same manner as in the first embodiment. In the power converter 14 according to the fifth embodiment, the configuration of the converter circuit 22 differs from that of the first embodiment, but the effect of suppressing noise voltage is the same as in the power converter 10 according to the first embodiment.

[0037] In the power converter 14 according to the fifth embodiment, similar to the power converter 10 according to the first embodiment, it is possible to achieve low loss by zero-voltage switching of the converter circuit 22, as well as reduce the number of noise filter stages, thereby achieving miniaturization and cost reduction of the device.

[0038] (Sixth Embodiment) The sixth embodiment will be described using Figure 9. Figure 9 is a circuit diagram showing the configuration of the power converter 15 according to the sixth embodiment. In the power converter 15, the configuration of the converter circuit 23 differs from that of the power converter 14 shown in Figure 8, in that the switch Q1 is replaced with a second series circuit 32 of the second diode D3 and the switch Q1. The other configurations of the power converter 15 are the same as those of the power converter 14 according to the fifth embodiment.

[0039] In other words, the converter circuit 23 shown in Figure 9 includes a first input terminal 3, a second input terminal 4, a first series circuit 31 consisting of a resonant inductor Lr and a first diode D2, a second series circuit 32 consisting of a second diode D3 and a switch Q1, a first output terminal 5, and a second output terminal 6.

[0040] The second series circuit 32, consisting of the second diode D3 and switch Q1, is connected between the first input terminal 3 and the second input terminal 4. Switch Q1 is composed of a semiconductor switching element, such as an N-channel MOSFET. The first series circuit 31 is connected between one end of the second series circuit 32 and the first output terminal 5. The second output terminal 6 is connected to the other end of the second series circuit 32. Load 2 is connected between the first output terminal 5 and the second output terminal 6. In addition, the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2, which are connected in parallel to the second series circuit 32, functions as a resonant capacitor. The converter circuit 23, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 constitute a voltage resonant boost chopper circuit. The switching frequency fs of switch Q1 is set to a value corresponding to the resonant frequency of the resonant inductor Lr and the resonant capacitor, which is the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2. As a result, switch Q1 of the converter circuit 23 is switched at zero voltage, as shown in Figure 2.

[0041] Furthermore, the cutoff frequencies fc of the first filter circuit, which consists of the first inductor Lc1 and the first Y capacitor Cy1, and the second filter circuit, which consists of the second inductor Lc2 and the second Y capacitor Cy2, are set in the same manner as in the first embodiment. In the power converter 15 according to the sixth embodiment, the configuration of the converter circuit 23 differs from that of the first embodiment, but the effect of suppressing noise voltage is the same as in the power converter 10 according to the first embodiment.

[0042] In the power converter 15 according to the sixth embodiment, similar to the power converter 10 according to the first embodiment, it is possible to achieve low loss by zero-voltage switching of the converter circuit 23, as well as reduce the number of noise filter stages, thereby achieving miniaturization and cost reduction of the device.

[0043] (Seventh Embodiment) The seventh embodiment will be described using Figure 10. Figure 10 is a circuit diagram showing the configuration of the power converter 16 according to the seventh embodiment. The power converter 16 differs from the power converter 12 according to the third embodiment shown in Figure 6 in that it uses a heat dissipation member 9. The other configurations of the power converter 16 are the same as those of the power converter 12 according to the third embodiment, so a detailed explanation will be omitted.

[0044] In the power converter 16, a switch group 33, in which a first switch Q1 and a second switch Q2 are connected in series, is cooled using a conductive heat dissipation member 9. The heat dissipation member 9 is connected to earth E.

[0045] In the power converter 16, instead of individual components, parasitic capacitances generated between the heat dissipation member 9 and the first switch Q1 and the second switch Q2 may be used as the first Y capacitor Cy1 and the second Y capacitor Cy2 in order to reduce costs by reducing the number of individual components. In this case, the combined capacitance of the individual component X capacitor Cx and the parasitic capacitances, the first Y capacitor Cy1 and the second Y capacitor Cy2, functions as a shunt capacitor which is part of the converter circuit 21. The converter circuit 21, the X capacitor Cx, and the parasitic capacitances, the first Y capacitor Cy1 and the second Y capacitor Cy2, constitute a Class E power factor correction circuit.

[0046] Furthermore, when parasitic capacitances are used as the first Y capacitor Cy1 and the second Y capacitor Cy2, the capacitance values ​​C of the first Y capacitor Cy1 and the second Y capacitor Cy2 become smaller compared to when individual components are used. Therefore, it may not be possible to set the cutoff frequency fc of the first filter circuit (first inductor Lc1 and first Y capacitor Cy1) and the second filter circuit (second inductor Lc2 and second Y capacitor Cy2) lower than the switching frequency fs. However, even in this case, by setting the cutoff frequency fc lower than a predetermined harmonic among the harmonic frequencies 2fs, 3fs, ..., it is possible to suppress noise voltage components higher than the predetermined harmonic.

[0047] In the power converter 16 according to the seventh embodiment, similar to the power converter 10 according to the first embodiment, it is possible to achieve low loss by zero-voltage switching of the converter circuit 21, as well as reduce the number of noise filter stages, thereby achieving miniaturization and cost reduction of the device.

[0048] As described above, several embodiments of the present invention have been presented, but the statements and drawings that constitute part of this disclosure should not be understood as limiting the invention. Various alternative embodiments, examples, and operational techniques will become apparent to those skilled in the art from this disclosure. [Explanation of Symbols]

[0049] 2 loads 3. First Input Terminal 4. Second input terminal 5. First output terminal 6. Second output terminal 7. Third output terminal 8. Fourth output terminal 9 Heat dissipation component 10-16 Power converter 20-23 Converter Circuit 30 Resonant circuit 31 1st series circuit 32 Second series circuit 33 Switch Group Cr resonant capacitor Cx Xcapacitor Cy1 1st Y Capacitor Cy2 is the second Y-capacitor. E Earth fc cutoff frequency fs switching frequency Lc1 First Inductor Lc2 Second Inductor Lr resonant inductor N 2nd power supply terminal P 1st power supply terminal Q1 Switch (First Switch) Q2 Second switch

Claims

1. First power terminal and second power terminal, A first inductor with one end connected to the first power terminal and a second inductor with one end connected to the second power terminal, A converter circuit comprising a first input terminal to which the other end of the first inductor is connected, a second input terminal to which the other end of the second inductor is connected, a switch connected between the first input terminal and the second input terminal, and a resonant circuit, An X capacitor connected between the first input terminal and the second input terminal, A first Y capacitor connected between the first input terminal and ground, and a second Y capacitor connected between the second input terminal and ground, Equipped with, The combined capacitance of the X capacitor, the 1Y capacitor, and the 2Y capacitor functions as a capacitor that is part of the converter circuit. The first inductor and the first Y capacitor constitute the first filter circuit. The second inductor and the second Y capacitor constitute the second filter circuit. Power converter.

2. The power conversion device according to claim 1, wherein the cutoff frequencies of the first filter circuit and the second filter circuit are set lower than the switching frequency of the switch.

3. The aforementioned converter circuit is The aforementioned switch, The resonant circuit, in which a resonant inductor and a resonant capacitor are connected in series, is connected to one end of the switch, The shunt capacitor is the combined capacitance of the X capacitor, the 1Y capacitor, and the 2Y capacitor. The power conversion device according to claim 1 or 2, which is an E-class inverter circuit equipped with the following:

4. The aforementioned converter circuit is The switch, in which at least two switching elements are connected in series, The resonant circuit, in which a resonant inductor and a resonant capacitor are connected in series, is connected to one end of the switch, The shunt capacitor is the combined capacitance of the X capacitor, the 1Y capacitor, and the 2Y capacitor. The power conversion device according to claim 1 or 2, which is an E-class power factor correction circuit equipped with the above.

5. The aforementioned converter circuit is The aforementioned switch, A series circuit of a resonant inductor and a diode is connected to one end of the aforementioned switch, The resonant capacitor is the combined capacitance of the X capacitor, the 1Y capacitor, and the 2Y capacitor. Equipped with, The power conversion device according to claim 1 or 2, wherein the resonant inductor and the resonant capacitor constitute the resonant circuit in a voltage resonant type boost chopper circuit.

6. The aforementioned converter circuit is The first series circuit consists of a resonant inductor and a first diode, A second series circuit of the switch and the second diode is connected between the first input terminal and the second input terminal, The resonant capacitor is the combined capacitance of the X capacitor, the 1Y capacitor, and the 2Y capacitor. Equipped with, One end of the first series circuit is connected to one end of the second series circuit, The power conversion device according to claim 1 or 2, wherein the resonant inductor and the resonant capacitor constitute the resonant circuit in a voltage resonant type boost chopper circuit.

7. The power conversion device according to claim 1 or 2, wherein the first Y capacitor and the second Y capacitor are formed from separate components.

8. The power conversion device according to claim 1 or 2, wherein the first Y capacitor and the second Y capacitor are formed by the parasitic capacitance of the switch.

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