Power transmission equipment

Abstract

To provide a power transmission device achieving improvement in efficiency during switching of semiconductor switching elements.SOLUTION: There is provided a power transmission device transmitting power wirelessly to a power receiving device. The power transmission device includes an inverter which converts a DC voltage into an AC voltage, and a power transmission coil to which the AC voltage is supplied to generate an AC magnetic field. The inverter includes: at least two semiconductor switch elements; a drive signal generator which generates a driving signal to turn on and turn off the semiconductor switch elements; and a current detector which detects a current flowing through the power transmission coil or a current flowing through the semiconductor switch elements. When the drive signal generator generates an on signal, the drive signal generator has mask time without generating an off signal even if a current value detected by the current detector until predetermined time is equal to or less than a first predetermined current value, and on and after the mask time, if the current value detected by the current detector is equal to or less than the first predetermined current value, the drive signal generator generates a signal to turn off the semiconductor switch elements.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a power transmission device.

Background Art

[0002] Inverter systems including an inverter having a plurality of semiconductor switch elements are known.

[0003] In the variable magnetic flux motor drive system described in Patent Document 1, a variable magnetic flux drive system including an inverter for driving a variable magnetic flux motor having a fixed magnet and a variable magnet is provided with: a main control unit that controls the inverter such that the torque of the variable magnetic flux motor matches a torque command; a magnetizing winding that magnetizes the variable magnet of the variable magnetic flux motor; and a magnetizing circuit that supplies a magnetizing current to the magnetizing winding (see Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of Invention

Problems to be Solved by the Invention

[0005] However, in an inverter system, when the frequency (pulse width) of the gate waveform of the semiconductor switch element is fixed during operation, ZVS (Zero Voltage Switching) is performed at the rising edge, and thereafter, the switching loss increases.

[0006] The present disclosure has been made in consideration of such circumstances, and an object thereof is to provide a power transmission device capable of improving efficiency at the time of switching of a semiconductor switch element.

Means for Solving the Problems

[0007] One aspect of the present disclosure is a power transmission device for wirelessly transmitting power to a power receiving device, comprising: an inverter that converts a DC voltage to an AC voltage; and a power transmission coil that receives the AC voltage and generates an AC magnetic field, wherein the inverter comprises at least two semiconductor switch elements; a drive signal generator that generates drive signals to turn the semiconductor switch elements on and off; and a current detection unit that detects the current flowing through the power transmission coil or the current flowing through the semiconductor switch elements, wherein when the drive signal generator generates an ON signal, it has a mask time during which it does not generate an OFF signal even if the current value detected by the current detection unit is less than or equal to a first predetermined current value for a predetermined period of time, and after the mask time, when the current value detected by the current detection unit becomes less than or equal to the first predetermined current value, it generates a signal to turn off the semiconductor switch elements. Furthermore, the inverter is a full-bridge type, and when the first predetermined current value is Ioff1, equation (6) holds, where Cds is a capacitance in parallel with the semiconductor switch element. It is a power transmission device. One aspect of the present disclosure is a power transmission device for wirelessly transmitting power to a power receiving device, comprising: an inverter that converts a DC voltage to an AC voltage; a power transmission coil to which the AC voltage is supplied and which generates an AC magnetic field, wherein the inverter comprises at least two semiconductor switch elements; a drive signal generator that generates drive signals for turning the semiconductor switch elements on and off; and a current detection unit that detects the current flowing through the power transmission coil or the current flowing through the semiconductor switch elements, wherein when the drive signal generator generates an ON signal, it has a mask time during which it does not generate an OFF signal even if the current value detected by the current detection unit is less than or equal to a first predetermined current value for a predetermined time, and after the mask time, when the current value detected by the current detection unit becomes less than or equal to the first predetermined current value, it generates a signal to turn off the semiconductor switch elements, and the inverter is of a half-bridge type, and when the first predetermined current value is Ioff3, the equation is (7), where Cds is a capacitance in parallel with the semiconductor switch elements, and the power transmission device is of a half-bridge type. [Effects of the Invention]

[0008] The power transmission device described herein can improve the efficiency of semiconductor switching elements during switching. [Brief explanation of the drawing]

[0009] [Figure 1] This figure shows an example of the configuration of an inverter system according to the embodiment. [Figure 2] This figure shows an example of a drive signal according to the embodiment. [Figure 3] This figure shows an example of a waveform where ZVS is not established. [Figure 4] This figure shows an example of a waveform when ZVS is established over a short period. [Figure 5] This figure shows an example of a waveform when ZVS is established over a long period. [Figure 6] This figure shows another example of the configuration of the inverter system according to the embodiment. [Figure 7] This figure shows an example of a WPT circuit that supplies power to the magnetization coil of a variable magnet when a full-bridge inverter is used. [Figure 8]This is a diagram showing an example of drive waveforms of an inverter circuit when a full-bridge circuit inverter is used. [Figure 9] This is a diagram showing an equivalent circuit when the inverter starts operating when a full-bridge circuit inverter is used. [Figure 10] This is a diagram showing a further simplified equivalent circuit of the equivalent circuit when the inverter starts operating when a full-bridge circuit inverter is used. [Figure 11] This is a diagram showing an example of an equivalent circuit at time t1 when a full-bridge circuit inverter is used. [Figure 12] This is a diagram showing an equivalent circuit in period t3 when a full-bridge circuit inverter is used. [Figure 13] This is a diagram showing an example of a WPT circuit that supplies power to a magnetization coil of a variable magnet when a half-bridge circuit inverter is used. [Figure 14] This is a diagram showing an example of drive waveforms of an inverter circuit when a half-bridge circuit inverter is used. [Figure 15] This is a diagram showing an example of an equivalent circuit at time t1 when a half-bridge circuit inverter is used. [Figure 16] This is a diagram showing an equivalent circuit in period t3 when a half-bridge circuit inverter is used. [Modes for Carrying Out the Invention]

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0011] [Inverter System] FIG. 1 is a diagram showing an example of the configuration of an inverter system 1 according to an embodiment. The inverter system 1 includes a power transmitting device A1 and a power receiving device A2. In the present embodiment, the power transmitting device A1 includes a full-bridge inverter.

[0012] Power transmission device A1 includes four switch elements (first switch element 11 to fourth switch element 14), four capacitors (first capacitor 21 to fourth capacitor 24), a voltage source 31, a capacitor 32, a power transmission coil 33, a resistor 41, a resistor 42, a drive signal generator 51, and a current detection unit 52.

[0013] The first switch element 11 to the fourth switch element 14 are each an FET (Field Effect Transistor). The first switch element 11 to the fourth switch element 14 each have a body diode (each of body diodes D1 to D4 in the example of FIG. 1). As such a diode, a configuration in which a diode element is connected in parallel to each switch element (the first switch element 11 to the fourth switch element 14) may be used in some cases. In the present embodiment, an FET is described as an example of the switch element, but the switch elements (the first switch element 11 to the fourth switch element 14) may be any semiconductor switches, and may be, for example, an IGBT (Insulated Gate Bipolar Transistor).

[0014] Power reception device A2 includes a power reception coil 111, a capacitor 112, a full-wave rectifier circuit (diodes 113-1 to 113-4) having a rectification function, output terminals (first output terminal P1, second output terminal P2), and a magnetizing coil 121 that is a load. The magnetizing coil 121 includes an inductor (component) 131 and a resistor (component) 132.

[0015] In the present embodiment, the primary side coil is the power transmission coil 33, and the secondary side coil is the power reception coil 111. The power transmission coil 33 has a resonance circuit. In the example of FIG. 1, the resonance circuit includes the capacitor 32, and may further include a resistor (not shown). An inverter is connected to the power transmission coil 33.

[0016] Let me explain the power transmission device A1. A first series circuit consisting of a first switch element 11 and a second switch element 12, and a second series circuit consisting of a third switch element 13 and a fourth switch element 14 are connected in parallel to the voltage source 31. In the example shown in Figure 1, the drain (D) of the first switch element 11 and the drain (D) of the third switch element 13 are connected to the positive side of the voltage source 31, and the source (S) of the second switch element 12 and the source (S) of the fourth switch element 14 are connected to the negative side of the voltage source 31. A capacitor 32 and a power transmission coil 33 are connected in series between the point between the source (S) of the first switch element 11 and the drain (D) of the second switch element 12, and between the point between the source (S) of the third switch element 13 and the drain (D) of the fourth switch element 14.

[0017] Each of the first to fourth switching elements 11 to 14 is connected in parallel to each of the first to fourth switching elements 11 to 14, respectively, to the first to fourth capacitors 21 to 24.

[0018] Resistor 41 is connected to the drain (D) of the first switching element 11. Resistor 42 is connected to the drain (D) of the second switching element 12. The current detection unit 52 detects the current flowing through the resistor 41 (the current flowing through the drain of the first switch element 11) and outputs the detection result to the drive signal generator 51. The current detection unit 52 detects the current flowing through the resistor 42 (the current flowing through the drain of the second switch element 12) and outputs the detection result to the drive signal generator 51. Here, resistors 41 and 42 are used to convert current to voltage, and a current transformer or the like may be used instead of resistors.

[0019] The drive signal generator 51 controls the voltage between the gate (G) and source (S) of each of the first to fourth switch elements 11 to 14. In other words, the drive signal generator 51 generates a drive signal (drive pulse signal) for each of the first to fourth switch elements 11 to 14 and supplies it as the gate voltage. In this embodiment, the drive signal generator 51 controls the drive signals supplied to each of the first to fourth switch elements 11 to 14 based on the information (current detection result) input from the current detection unit 52.

[0020] In the power transmission device A1, the inverter includes four switching elements (first switching element 11 to fourth switching element 14). Furthermore, the inverter may also include a drive signal generator 51 and a current detection unit 52. Furthermore, the inverter may include four capacitors (the first capacitor 21 to the fourth capacitor 24).

[0021] I will now explain the power receiving device A2. A full-wave rectifier circuit is connected to the power receiving coil 111 and the capacitor 112. The full-wave rectifier circuit is constructed using four diodes, 113-1 to 113-4. One end of the power receiving coil 111 is connected to one end of the capacitor 112. The other end of the power receiving coil 111 is connected to the anode of diode 113-3 and the cathode of diode 113-4. The other end of capacitor 112 is connected to the anode of diode 113-1 and the cathode of diode 113-2. The cathode of diode 113-1 is connected to the cathode of diode 113-3, and the first output terminal P1 is connected to it. The anode of diode 113-2 is connected to the anode of diode 113-4, and the second output terminal P2 is connected to it.

[0022] A magnetization coil 121 is connected between the first output terminal P1 and the second output terminal P2. The magnetization coil 121 has a variable magnet and a fixed magnet, and these constitute a variable magnet module. In this variable magnet module, the magnetic force (magnetic field) of the magnet can be changed by the current flowing through the magnetization coil 121. The load is the coil that magnetizes the variable magnet and is an inductance load. The operating time is, for example, 1 ms or less. Furthermore, the variable magnet module is provided in the motor. The motor comprises, for example, a case, a stator, a rotor, a shaft, a receiving coil, a capacitor connected to the receiving coil, and a rectifier.

[0023] In this embodiment, the case in which the magnetization coil 121 has a variable magnet and a fixed magnet is shown, but as another example, a configuration in which the magnetization coil 121 has a variable magnet but no fixed magnet may be used.

[0024] In this embodiment, a drive pulse having a predetermined number of pulses (a finite number of pulses) is used as the drive pulse to drive the inverter. The predetermined number of times is m or more and n or less. Here, m and n are integers greater than or equal to 2, and n is an integer greater than or equal to m. In other words, in this embodiment, a single drive pulse supplies a current to the magnetization coil 121 for a predetermined number of pulses, which is necessary to change the magnetization state of the variable magnet module. In this embodiment, it is sufficient for a current of a predetermined value or higher to flow through the magnetization coil 121; therefore, current smoothing (voltage smoothing) is not required, meaning that the current does not have to be DC.

[0025] In the power transmission device A1, the current flowing through the power transmission coil 33 is controlled by an inverter, thereby wirelessly transmitting power from the power transmission coil 33. In the power receiving device A2, power transmitted wirelessly from the power transmitting coil 33 is received by the power receiving coil 111, and the received power is supplied to the magnetization coil 121 from the output terminals (first output terminal P1 and second output terminal P2). In this way, wireless power transmission takes place between the transmitting coil 33 and the receiving coil 111.

[0026] In the example shown in Figure 1, the drain current of the first switch element 11 and the drain current of the second switch element 12 are detected (measured). However, a configuration that detects the current at other points may also be used. For example, a configuration may be used in which the drain current of the fourth switch element 14 is detected instead of the drain current of the first switch element 11. For example, a configuration may be used in which the drain current of the third switch element 13 is detected instead of the drain current of the second switch element 12. For example, a configuration may be used in which the drain currents of all of the first to fourth switch elements 11 to 14 are detected. For example, a configuration that detects the input current of the inverter may be used. For example, a configuration for detecting a resonant current may be used. This resonant current may be, for example, the current flowing through the power transmission coil 33. For each switching element (first switching element 11 to fourth switching element 14), a configuration may be used in which the source current (source current) is detected instead of the drain current (drain current).

[0027] <Parameter Description> The voltage of voltage source 31 is represented by Vin. The capacitance of the first capacitor 21 connected in parallel with the first switching element 11 is represented by Cds1, the capacitance of the second capacitor 22 connected in parallel with the second switching element 12 is represented by Cds2, the capacitance of the third capacitor 23 connected in parallel with the third switching element 13 is represented by Cds3, and the capacitance of the fourth capacitor 24 connected in parallel with the fourth switching element 14 is represented by Cds4. In this embodiment, Cds1 to Cds4 are assumed to have the same value (Cds). The capacitance of capacitor 32 is represented by Ctx. The inductance of the transmission coil 33 is represented by Ltx. The capacitance may be an external capacitance, or a parasitic capacitance (for example, the parasitic capacitance of a switch element), or it may include both. ω1 represents the angular frequency of resonance. ω1 is expressed by equation (1).

[0028]

number

[0029] The inductance of the receiving coil 111 is represented by Lrx. The capacitance of capacitor 112 is represented by Crx. In the magnetization coil 121, the inductance of the inductor (component) 131 is represented by LLoad. In the magnetization coil 121, the resistance value of the resistance (component) 132 is represented by RLoad.

[0030] [Example of a drive signal] Figure 2 shows an example of a drive signal according to the embodiment. Figure 2 shows the first drive signal 2011 supplied to the first switch element 11 (Q1), the second drive signal 2012 supplied to the second switch element 12 (Q2), the third drive signal 2013 supplied to the third switch element 13 (Q3), and the fourth drive signal 2014 supplied to the fourth switch element 14 (Q4).

[0031] For each drive signal (Drive Signal 1 2011 to Drive Signal 4 2014), the horizontal axis represents time, and the vertical axis represents the signal level (e.g., voltage level). Each drive signal (Drive Signal 1 2011 to Drive Signal 4 2014) has two levels: a high (on) level and a low (off) level.

[0032] In this embodiment, the drive signal generator 51 controls each drive signal (first drive signal 2011 to fourth drive signal 2014) to an on or off state for a predetermined number of times n (where n is an integer of 1 or more) as a single control unit. In this embodiment, the first drive signal 2011 and the fourth drive signal 2014 have the same signal waveform, except for the initial state and the drive stop state portions. Furthermore, in this embodiment, the second drive signal 2012 and the third drive signal 2013 have the same signal waveform, except for the initial state and the drive stop state portions.

[0033] In the example in Figure 2, the horizontal axis shows the initial state, the i-th pulse waveform (where i is an integer from 1 to n), the dead time before and after each pulse waveform (the time when all switching elements are off), and the drive stop state.

[0034] The first drive signal 2011 (and the fourth drive signal 2014 similarly) has an ON signal section (e.g., signal section 2111, signal section 2113, signal section 2114) when i is an odd number of times, and an OFF signal section (e.g., signal section 2112) when i is an even number of times. The second drive signal 2012 (and the third drive signal 2013 similarly) has an off signal section (e.g., signal section 2211, signal section 2213, signal section 2214) when i is an odd number of times, and an on signal section (e.g., signal section 2212) when i is an even number of times. In the example shown in Figure 2, n is odd, but n can also be even.

[0035] In the example in Figure 2, for each drive signal (first drive signal 2011 to fourth drive signal 2014), the length of the ON state signal portion (length of the ON state) increases with each increase in the number i. As a specific example, in the first drive signal 2011, the ON state duration of the first signal unit 2111 is the shortest, the ON state duration of the third signal unit 2113 is longer, and so on thereafter, with the ON state duration of the nth signal unit 2114 being the longest. The change in the length of the ON state of the second drive signal 2012 is the same as in the case of the first drive signal 2011.

[0036] [ZVS conditions] Figure 3 shows an example of a waveform when ZVS is not established for the power transmission coil 33. Figure 3(A) shows an example of the waveform of the resonant current. Figure 3(B) shows an example of the waveform of the drain-source voltage (Vds) of a switching element. Here, the switching element is one of the first switching element 11 to the fourth switching element 14. In this example, Figure 3(A) shows the resonant current flowing through the power transmission coil 33, and Figure 3(B) shows the drain-source voltage (Vds) of the second switching element 12.

[0037] In the graph shown in Figure 3(A), the horizontal axis represents time (t), and the vertical axis represents the current level (Itx). In the graph shown in Figure 3(B), the horizontal axis represents time (t), and the vertical axis represents the voltage level (Vc2). Note that the horizontal axis is the same in both Figure 3(A) and Figure 3(B).

[0038] Figure 3(A) shows the current Itx1(t) in period T1 and the current Itx2(t) in period T2 following period T1. The current Itx1(t) during period T1 rises in an upward-convex quadratic curve, and then decreases after exceeding its maximum value. The current Itx2(t) in period T2 is a continuation of the current Itx1(t) in period T1, which was already decreasing, but the degree of decrease is greater.

[0039] In this embodiment, for the sake of explanation, t in Itx1(t) represents the elapsed time from the origin of the horizontal axis, which is considered to be 0. t1 and T1 represent the period when using such time, and in this embodiment, they represent the on time of the switch element. In this embodiment, the time t1 (or time T1) coincides with the elapsed time of period t1 (or the elapsed time of period T1). Similarly, in this embodiment, t in itx2(t) represents the elapsed time from the point in time when the period T1 on the horizontal axis has elapsed, with the time at that point being considered as 0. t2 and T2 represent the periods when this time is used, and in this embodiment, Vc2 reaches its minimum value (0 in the examples of Figures 4 and 5) when the period has elapsed. Similarly, in this embodiment, t in Itx3(t) represents the elapsed time from the point in time when the period T2 on the horizontal axis has elapsed, with the time at that point being considered as 0. t3 and T3 represent periods when such time is used, and in this embodiment, in the example in Figure 5, they represent the time when Itx becomes 0. During this period, the switch element with the opposite on / off switching timing is turned on in place of the switch element that was turned off.

[0040] Figure 3(B) shows the voltage 3011 during periods T1 and T2. During period T1, the voltage 3011 remains constant. During period T2, the curve descends in a downward-convex quadratic shape. In the example shown in Figure 3(B), the voltage Vc2 does not reach 0[V], and therefore ZVS is not true.

[0041] In the example shown in Figure 3, the gate is turned off when the on-time T1 is long and the current value is small, resulting in a ZVS failure and the generation of noise. The range of ON time T1 is expressed, for example, as the range of t1 shown in equation (2). The acos function represents the arccosine function.

[0042]

number

[0043] Figure 4 shows an example of a waveform when ZVS is established over a short period. Figure 4(A) shows an example of the waveform of the resonant current of the power transmission coil 33. Figure 4(B) shows an example of the waveform of the drain-source voltage (Vds) of a switching element. Here, the switching element is one of the first switching element 11 to the fourth switching element 14. In this example, Figure 4(A) shows the resonant current flowing through the power transmission coil 33, and Figure 4(B) shows the drain-source voltage (Vds) of the second switching element 12.

[0044] In the graph shown in Figure 4(A), the horizontal axis represents time (t), and the vertical axis represents the current level (Itx). In the graph shown in Figure 4(B), the horizontal axis represents time (t), and the vertical axis represents the voltage level (Vc2). Note that the horizontal axis is the same in both Figure 4(A) and Figure 4(B).

[0045] Figure 4(A) shows the current Itx1(t) in period T1 and the current Itx2(t) in period T2 following period T1. The current Itx1(t) during period T1 rises in an upward-convex quadratic curve, and then decreases after exceeding its maximum value. The current Itx2(t) in period T2 is a continuation of the current Itx1(t) in period T1, which was already decreasing, but the degree of decrease is greater.

[0046] Figure 4(B) shows the voltage 3111 during periods T1 and T2. During period T1, the voltage 3111 remains constant. During period T2, the curve descends in a downward-convex quadratic shape. In the example shown in Figure 4(B), the voltage Vc2 reaches 0[V] at a single point, and ZVS is established for a short period of time.

[0047] In the example in Figure 4, the on-time T1 is the point where ZVS is established, and no noise is generated. However, the ZVS period is short. The range of on-time T1 is expressed, for example, as the range of t1 shown in equation (3).

[0048]

number

[0049] Figure 5 shows an example of a waveform when ZVS is established over a long period of time. Figure 5(A) shows an example of the waveform of the resonant current of the power transmission coil 33. Figure 5(B) shows an example of the waveform of the drain-source voltage (Vds) of a switching element. Here, the switching element is one of the first switching element 11 to the fourth switching element 14. In this example, Figure 5(A) shows the resonant current flowing through the power transmission coil 33, and Figure 5(B) shows the drain-source voltage (Vds) of the second switch element 12.

[0050] In the graph shown in Figure 5(A), the horizontal axis represents time (t), and the vertical axis represents the current level (Itx). In the graph shown in Figure 5(B), the horizontal axis represents time (t), and the vertical axis represents the voltage level (Vc2). Note that the horizontal axis is the same in both Figure 5(A) and Figure 5(B).

[0051] Figure 5(A) shows the current Itx1(t) in period T1, the current Itx2(t) in period T2 following period T1, and the current Itx3(t) in period T3 following period T2. The current Itx1(t) during period T1 rises in an upward-convex quadratic curve, and then decreases after exceeding its maximum value. The current Itx2(t) in period T2 is a continuation of the current Itx1(t) in period T1, which was already decreasing, but the degree of decrease is greater. The current Itx3(t) in period T3 is a continuation of the current Itx2(t) in period T2, which was still decreasing. Furthermore, Figure 5(A) shows the first predetermined current value Ioff1.

[0052] Figure 5(B) shows the voltage 3211a during periods T1, T2, and T3, and the voltage 3211b (a continuation of voltage 3211a) from period T3 onward. During period T1, the voltage 3211a remains constant. During period T2, the price declines in a straight line downwards. During period T3, the voltage 3211a is 0[V]. From period T3 onward, the voltage 3211b increases in an upward-convex curve. In the example in Figure 5(B), the voltage Vc2 is constant at 0[V] during period T3, and ZVS holds for a long period.

[0053] In the example in Figure 5, the on-time T1 is slightly shorter than the ZVS establishment point, so no noise is generated. However, the ZVS establishment period is longer compared to the example in Figure 4. The range of ON time T1 can take is expressed, for example, by the range of t1 shown in equation (4).

[0054]

number

[0055] In the examples in Figures 4 and 5, during period T1, when the current Itx1(t) rises towards the peak (rising edge), the gate voltage of the switch element is not turned off for a mask time. Then, after period T1, when the current decreases (falling edge), the gate voltage of the switch element is turned off. In the example shown in Figure 4, ZVS is established at the end of period T2, so the gate voltage of the other switch element (second switch element 12) is turned on. In the example shown in Figure 5, since ZVS is established during period T3, the gate voltage of the other switching element (second switching element 12) is turned on.

[0056] Thus, in the inverter system 1, when controlling each semiconductor switch element (first switch element 11 to fourth switch element 14), the current flowing through the power transmission coil 33 is detected, and when an ON signal is generated, there is a mask time during which an OFF signal is not generated even if the current value is less than or equal to a first predetermined current value for a predetermined period of time. After the mask time, if the current value falls below the first predetermined current value, a signal is generated to turn off the semiconductor switch element. As a result, in this embodiment, the inverter system 1 can, for example, satisfy ZVS while minimizing the current when it is off. Furthermore, in the inverter system 1, for example, the control may involve gradually increasing the on-time for multiple pulses in a time series. In this embodiment, the first predetermined current value is variable by pulses. For example, the drive signal generator 51 changes the first predetermined current value by pulses in a time series of multiple pulses, rather than keeping it constant.

[0057] Note that the waveforms shown in Figures 3 to 5 are ideal, and deviations from the ideal values ​​are acceptable as long as they do not cause practical problems.

[0058] <Half-bridge circuit> In this embodiment, a full-bridge inverter is shown, but as another example of a configuration, a half-bridge inverter may also be used. When a half-bridge inverter is used, the configuration shown in Figure 1 is generally one in which the third switch element 13 and the fourth switch element 14 are not provided.

[0059] Figure 6 shows another example of the configuration of the inverter system 2 according to the embodiment. Inverter system 2 has a configuration that includes an inverter with a half-bridge circuit. In inverter system 2, instead of power transmission device A1 having a full-bridge inverter as shown in Figure 1, power transmission device A11 having a half-bridge inverter is provided.

[0060] In the inverter system 1 according to this embodiment, the power transmission device A1 transmits power wirelessly to the power receiving device A2 and has the following configuration. The power transmission device A1 includes an inverter that converts a DC voltage to an AC voltage, and a power transmission coil 33 that receives the AC voltage and generates an AC magnetic field. The inverter comprises at least two semiconductor switch elements (first switch element 11 to fourth switch element 14), a drive signal generator 51 that generates drive signals to turn the semiconductor switch elements (first switch element 11 to fourth switch element 14) on and off, and a current detection unit 52 that detects the current flowing through the power transmission coil 33 or the current flowing through the semiconductor switch elements (first switch element 11 to fourth switch element 14). When the drive signal generator 51 generates an ON signal, it has a mask time during which it does not generate an OFF signal even if the current value detected by the current detection unit 52 is less than or equal to a first predetermined current value for a predetermined period of time. After the mask time, if the current value detected by the current detection unit 52 falls below the first predetermined current value, it generates a signal to turn off each of the semiconductor switch elements (the first switch element 11 to the fourth switch element 14). The current detection unit 52 may also be considered to be provided in the drive signal generator 51.

[0061] In this embodiment, the drive signal generator 51 generates pulses of a predetermined number. The predetermined number of pulses is the number of pulses at which the output current flowing through the magnetization coil 121 connected to the output section of the power receiving device A2 reaches a predetermined current value.

[0062] The inverter system 1 according to this embodiment has the following configuration. The mask time is the time until the current detected by the current detection unit 52 becomes greater than a second predetermined current value, which is equal to or greater than a first predetermined current value.

[0063] The inverter system 1 according to this embodiment has the following configuration. The mask time tm is expressed by equation (5).

[0064]

number

[0065] The inverter system 1 according to this embodiment has the following configuration. The mask time is the time it takes for the derivative of the current detected by the current detection unit to become zero or negative.

[0066] The inverter system 1 according to this embodiment has the following configuration. The inverter is a full-bridge type, and when the first predetermined current value is Ioff1, it is as shown in equation (6). In equation (6), in the examples in Figures 4 and 5, the upper limit of Ioff1 corresponds to the peak of the current curve, and the lower limit of Ioff1 corresponds to a point midway through the falling edge from that peak.

[0067]

number

[0068] The inverter system 2 according to this embodiment has the following configuration. The inverter is of the half-bridge type, and when the first predetermined current value is Ioff3, it is as shown in equation (7). In equation (7), in the examples in Figures 4 and 5, the upper limit of Ioff3 corresponds to the peak of the current curve, and the lower limit of Ioff3 corresponds to a point midway down the curve from that peak. The same effects as those of inverter system 1 can be obtained with inverter system 2.

[0069]

number

[0070] As described above, in the inverter system 1 (and inverter system 2) according to this embodiment, hard switching can be suppressed in the power transmission device A1 (and power transmission device A11) by adjusting the pulse width of the gate waveform of the semiconductor switch elements of the inverter (in this embodiment, the first switch element 11 to the fourth switch element 14). As a result, in the power transmission device A1 (and power transmission device A11), the inverter system 1 (and inverter system 2) according to this embodiment can improve the efficiency of switching the semiconductor switch elements.

[0071] Note that since the parasitic capacitance in parallel with the FET changes depending on the applied voltage, an example of noise reduction calculation based on the capacitance at the maximum applied voltage was shown. However, the calculation formula may differ depending on the circuit design and the resonance method.

[0072] In this embodiment, the on-time of the drive pulse of the semiconductor switch element is controlled by controlling the on-off state of the semiconductor switch element based on the current flowing through the power transmission coil 33. In this embodiment, a mask time is provided so that the control of the drive pulse is performed after the mask time.

[0073] In this embodiment, we have shown an example in which the drive signal generator 51 controls the multiple pulses in the time series of the drive pulse so that the pulse width gradually increases, but the embodiment is not limited to this. For example, in control based on the current flowing through the power transmission coil 33, if the ZVS condition is met for each of the multiple pulses, the drive pulse may be controlled in such a manner that there are points in the time series where the pulse width becomes shorter than the previous pulse, or where the pulse width becomes the same as the previous pulse.

[0074] Furthermore, a program to realize the function of any component in any of the devices described above may be recorded on a computer-readable recording medium, and that program may be loaded into a computer system and executed. Here, "computer system" includes hardware such as operating systems and peripheral devices. "Computer-readable recording medium" refers to portable media such as flexible disks, magneto-optical disks, ROMs, CD (Compact Disc)-ROMs (Read Only Memory), and storage devices such as hard disks built into computer systems. Moreover, "computer-readable recording medium" also includes volatile memory within a computer system that retains a program for a certain period of time, such as volatile memory within a computer system that acts as a server or client when a program is transmitted via a network such as the Internet or a communication line such as a telephone line. Such volatile memory may be, for example, RAM (Random Access Memory). The recording medium may be, for example, a non-temporary recording medium.

[0075] Furthermore, the above program may be transmitted from a computer system that stores the program in a memory device or the like to another computer system via a transmission medium or by transmission waves within the transmission medium. Here, the "transmission medium" used to transmit the program refers to a medium that has the function of transmitting information, such as a network like the Internet or a communication line like a telephone line. Furthermore, the above program may be intended to implement only a portion of the functions described above. Moreover, the above program may be a so-called differential file, capable of implementing the aforementioned functions in combination with programs already recorded in the computer system. A differential file may also be called a differential program.

[0076] Furthermore, the functions of any component in any device described above may be implemented by a processor. For example, each process in the embodiment may be implemented by a processor that operates based on information such as a program, and a computer-readable recording medium that stores information such as a program. Here, the processor may be implemented by having the functions of each part implemented by separate hardware, or by having the functions of each part implemented by integrated hardware. For example, the processor includes hardware, and the hardware may include at least one of a circuit that processes digital signals and a circuit that processes analog signals. For example, the processor may be configured using one or more circuit devices or one or both of one or more circuit elements mounted on a circuit board. An IC (Integrated Circuit) may be used as the circuit device, and a resistor or capacitor may be used as the circuit element.

[0077] Here, the processor may be, for example, a CPU. However, the processor is not limited to a CPU; various types of processors may be used, such as a GPU (Graphics Processing Unit) or a DSP (Digital Signal Processor). The processor may also be, for example, a hardware circuit using an ASIC (Application Specific Integrated Circuit). Furthermore, the processor may be composed of, for example, multiple CPUs, or multiple hardware circuits using ASICs. The processor may also be composed of, for example, a combination of multiple CPUs and multiple hardware circuits using ASICs. The processor may also include, for example, one or more amplifier circuits or filter circuits that process analog signals.

[0078] While embodiments of this disclosure have been described in detail above with reference to the drawings, the specific configuration is not limited to these embodiments and may include designs and other elements that do not depart from the gist of this disclosure.

[0079] [Outline of the formula] We will briefly explain the mathematical formulas for both full-bridge and half-bridge circuits. In the following explanation, T1, T2, and T3 in the examples in Figures 3 to 5 correspond to t1, t2, and t3 respectively.

[0080] Let's explain the mathematical formulas for a full-bridge circuit. In this example, we examine the conditions under which the zero-value switch (ZVS) of the switching element in the power transmission inverter circuit in wireless power transfer (WPT) becomes zero-value (ZVS). In particular, we will consider the ZVS conditions at WPT startup when power is transmitted via WPT to a magnetization coil used to change the magnetic force of a variable magnet.

[0081] Figure 7 shows an example of a WPT circuit that supplies power to the magnetization coil of a variable magnet. Figure 8 shows an example of a drive waveform for an inverter circuit. Note that rtx shown in Figure 7 is the resistance of the resonant circuit connected to the power transmission coil, but in the examples in Figures 1 to 6, the resistance value of this resistor is assumed to be small, and therefore the explanation has been omitted. Furthermore, rrx shown in Figure 7 is the resistance of the resonant circuit connected to the receiving coil, but in the examples in Figures 1 to 6, the resistance value of this resistor is assumed to be small, and therefore the explanation has been omitted.

[0082] In this example, before the inverter starts operating, FET(Q2) and FET(Q4) are ON, and FET(Q1) and FET(Q3) are OFF. Immediately before the inverter starts, FET(Q2) turns off, and then FET(Q1) turns on, initiating the inverter drive. After that, FET(Q1) and FET(Q4) turn off after the on-time has elapsed, FET(Q2) and FET(Q3) turn on, turn off after the on-time has elapsed, and then FET(Q1) and FET(Q4) turn on again. By repeating these operations, the current value of the magnetization coil, which is the load, increases over time. Once the target current value is reached, the inverter operation is stopped. In this example, we consider the conditions under which ZVS (Zero Void Suppression System) is satisfied when FET(Q1) turns on and inverter operation begins, then FET(Q1) and FET(Q4) turn off after the on-time has elapsed, and FET(Q2) and FET(Q3) turn on.

[0083] In this configuration, the current value of the magnetizing coil, which is the load, increases over time, and when it reaches a target current value, the inverter operation is stopped. The target current value does not necessarily have to be the same as the current value that is required for the magnetizing coil to reach a desired magnetization state. In other words, the target current value (current value when the inverter is stopped) can be any current value that can ultimately bring the magnetizing coil to a desired magnetization state. For example, if it is considered that the resonance of the resonant circuit is maintained even after the inverter is stopped, the load current will increase for a short time after the inverter is stopped. Therefore, the target current value (current value when the inverter is stopped) can be lower than the current value that is required for the magnetizing coil to reach a desired magnetization state. In this case, even if the current value flowing through the magnetizing coil does not reach the required current value when the inverter is stopped, the load current will continue to flow for a short time after the inverter is stopped, and the current value flowing through the magnetizing coil will eventually reach the required current value. Furthermore, such target current values ​​may be set in advance, for example, based on theory or experiment.

[0084] Figure 9 shows the equivalent circuit when the inverter starts operating. The inductance value of the magnetization coil (LLoad) is much larger than the mutual inductance value (M), and no current flows before the inverter is driven. Therefore, the circuit shown in Figure 9 can be further simplified as shown in Figure 10.

[0085] Figure 10 shows a simplified equivalent circuit of the equivalent circuit when the inverter starts operating. The equivalent circuit shown in Figure 10 gives rise to equation (8).

[0086]

number

[0087] By performing the Laplace transform and inverse Laplace transform on equation (8), considering the conditions at the start of inverter operation, and assuming that the value of rtx is small, we can treat the term containing rtx squared as zero (0) and derive equation (9).

[0088]

number

[0089] Next, we consider the coil current itx2(t) after time t1, when FET(Q1) and FET(Q4) are turned off at time t1. At time t1, all FETs are turned off, and the equivalent circuit is as shown in Figure 11. In this example, we assume that Cds1 = Cds2 = Cds3 = Cds4 = Cds.

[0090] Figure 11 shows an example of an equivalent circuit at time t1. Based on the equivalent circuit, equation (10) can be obtained by using the Laplace transform and the inverse Laplace transform.

[0091]

number

[0092] Here, we determine the discharge time at which the voltage of Cds2 changes from Vin to zero (0). Here, let t be the time elapsed since we assumed t1=0. The time t at which Vds² becomes zero (0) is given by equation (11). The atan function is the arctangent function.

[0093]

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[0094] The condition for the existence of real solutions to equation (11) is expressed by equation (12).

[0095]

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[0096] As a condition for performing ZVS, time t1 must satisfy equation (12). This leads to Figures 3(A) and 3(B), Figures 4(A) and 4(B), and Figures 5(A) and 5(B).

[0097] Now, let's consider the ZVS period (period t3) determined by the set value of time t1. During the period t3, at itx3(t), current flows through the body diodes (or externally connected diodes) of FET(Q2) and FET(Q3), as shown in Figure 12.

[0098] Figure 12 shows the equivalent circuit during period t3. Twice the forward voltage drop Vf of the diode is small compared to the value of Vin and can be ignored. Based on the equivalent circuit, by performing the Laplace transform and inverse Laplace transform, the time t (=t3) at which itx3(t) becomes zero (0) can be expressed as shown in equation (13).

[0099]

number

[0100] The time t (=t2) from when FET(Q1) and FET(Q4) turn off after time t1 until the Cds voltage between FET(Q2) and FET(Q3) becomes zero (0) is expressed by equation (14).

[0101]

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[0102] The condition for ZVS to be established when FET(Q2) and FET(Q3) first turn on at the start of inverter operation is that the initial on-time t1 of FET(Q1) and FET(Q4) satisfies equation (12) above. For example, transmitting a large amount of power to the load quickly is more easily achieved when the value of t1 is large. However, if the value of t1 becomes too large, the period during which ZVS is satisfied (period t3) becomes shorter. Therefore, it may be necessary to set an optimal t1 and drive the system accordingly.

[0103] Let's explain the mathematical formulas for a half-bridge circuit. The half-bridge circuit is, in general terms, similar to the full-bridge circuit.

[0104] Figure 13 shows an example of a WPT circuit that supplies power to the magnetization coil of a variable magnet. Figure 14 shows an example of a drive waveform for an inverter circuit. The equivalent circuits shown in Figure 9 and the further simplified equivalent circuits shown in Figure 10 are the same as those for the full-bridge circuit.

[0105] Figure 15 shows an example of an equivalent circuit at time t1. Figure 15 corresponds to Figure 11 in the case of a full-bridge circuit.

[0106] In the case of a half-bridge circuit, the equation corresponding to equation (12) in the case of a full-bridge circuit is expressed as equation (15).

[0107]

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[0108] Figure 16 shows the equivalent circuit during period t3. Figure 16 corresponds to Figure 12 in the case of a full-bridge circuit.

[0109] The condition for ZVS to be established when FET(Q2) first turns on at the start of inverter operation is that the initial on-time t1 of FET(Q1) satisfies equation (15) above. For example, transmitting a large amount of power to the load quickly is more easily achieved when the value of t1 is large. However, if the value of t1 becomes too large, the period during which ZVS is satisfied (period t3) becomes shorter. Therefore, it may be necessary to set an optimal t1 and drive the system accordingly.

[0110] [Note] An example configuration is shown below. (Configuration Example 1) A power transmission device that wirelessly transmits power to a power receiving device, An inverter that converts DC voltage to AC voltage, The system comprises a power transmission coil to which the aforementioned AC voltage is supplied and which generates an AC magnetic field, The inverter comprises at least two semiconductor switch elements, A drive signal generator that generates a drive signal to turn the semiconductor switch element on and off, The system includes a current detection unit for detecting the current flowing through the power transmission coil or the current flowing through the semiconductor switch element, The drive signal generator, when it generates an ON signal, has a mask time during which it does not generate an OFF signal even if the current value detected by the current detection unit is less than or equal to a first predetermined current value for a predetermined period of time. After the mask time, when the current value detected by the current detection unit becomes less than or equal to the first predetermined current value, it generates a signal to turn off the semiconductor switch element. Power transmission equipment.

[0111] (Configuration example 2) The mask time is the time until the current value detected by the current detection unit becomes greater than a second predetermined current value which is equal to or greater than the first predetermined current value. The power transmission device described in (Configuration Example 1).

[0112] (Configuration Example 3) The mask time is given by equation (5), Equation (1) is given, Ltx is the inductance value of the transmission coil, and Ctx is the capacitance connected to the transmission coil. A power transmission device as described in (Configuration Example 1) or (Configuration Example 2).

[0113] (Configuration example 4) The mask time is the time until the derivative of the current value detected by the current detection unit becomes zero or negative. A power transmission device as described in any one of (Configuration Example 1) to (Configuration Example 3).

[0114] (Configuration example 5) The inverter is a full-bridge type, When the first predetermined current value is set to Ioff1, Equation (6) is, Cds is a capacitance in parallel with the semiconductor switch element. A power transmission device as described in any one of (Configuration Example 1) to (Configuration Example 4).

[0115] (Configuration example 6) The inverter is of the half-bridge type, When the first predetermined current value is set to Ioff3, Equation (7) is given by, Cds is a capacitance in parallel with the semiconductor switch element. A power transmission device as described in any one of (Configuration Example 1) to (Configuration Example 4).

[0116] (Configuration example 7) The load of the power receiving device is the magnetization coil of the variable magnet module. The drive pulse signal applied to the semiconductor switch element at one time has a finite number of pulses. A power transmission device as described in any one of (Configuration Example 1) to (Configuration Example 6).

[0117] (Configuration example 8) The first predetermined current value is variable by pulses. A power transmission device as described in any one of (Configuration Example 1) to (Configuration Example 7). [Explanation of Symbols]

[0118] 1, 2... Inverter system, 11... First switch element, 12... Second switch element, 13... Third switch element, 14... Fourth switch element, 21... First capacitor, 22... Second capacitor, 23... Third capacitor, 24... Fourth capacitor, 32, 112... Capacitors, 31... Voltage source, 33... Transmission coil, 41, 42... Resistors, 51... Drive signal generator, 52... Current detection unit, 111... Receiver Electric coil, 113-1~113-4…Diode, 121…Magnetizing coil, 131…Inductor (component), 132…Resistor (component), 2011…First drive signal, 2012…Second drive signal, 2013…Third drive signal, 2014…Fourth drive signal, 2111~2114, 2211~2214…Signal section, A1, A11…Power transmission device, A2…Power receiving device, P1…First output terminal, P2…Second output terminal

Claims

1. A power transmission device that wirelessly transmits power to a power receiving device, An inverter that converts DC voltage to AC voltage, The system comprises a power transmission coil to which the aforementioned AC voltage is supplied and which generates an AC magnetic field, The inverter comprises at least two semiconductor switch elements, A drive signal generator that generates a drive signal to turn the semiconductor switch element on and off, The system includes a current detection unit for detecting the current flowing through the power transmission coil or the current flowing through the semiconductor switch element, The drive signal generator, when it generates an ON signal, has a mask time during which it does not generate an OFF signal even if the current value detected by the current detection unit is less than or equal to a first predetermined current value for a predetermined period of time. After the mask time, when the current value detected by the current detection unit becomes less than or equal to the first predetermined current value, it generates a signal to turn off the semiconductor switch element. The inverter is a full-bridge type, When the first predetermined current value is set to Ioff1, [Math 1] And, Cds is a capacitance in parallel with the semiconductor switch element. Power transmission equipment.

2. A power transmission device that wirelessly transmits power to a power receiving device, An inverter that converts DC voltage to AC voltage, The system comprises a power transmission coil to which the aforementioned AC voltage is supplied and which generates an AC magnetic field, The inverter comprises at least two semiconductor switch elements, A drive signal generator that generates a drive signal to turn the semiconductor switch element on and off, The system includes a current detection unit for detecting the current flowing through the power transmission coil or the current flowing through the semiconductor switch element, The drive signal generator, when it generates an ON signal, has a mask time during which it does not generate an OFF signal even if the current value detected by the current detection unit is less than or equal to a first predetermined current value for a predetermined period of time. After the mask time, when the current value detected by the current detection unit becomes less than or equal to the first predetermined current value, it generates a signal to turn off the semiconductor switch element. The inverter is of the half-bridge type, When the first predetermined current value is set to Ioff3, [Math 2] And, Cds is a capacitance in parallel with the semiconductor switch element. Power transmission equipment.

3. The mask time is the time until the current value detected by the current detection unit becomes greater than a second predetermined current value which is equal to or greater than the first predetermined current value. The power transmission device according to claim 1 or claim 2.

4. The aforementioned mask time is [Math 3] And, [Math 4] And, Ltx is the inductance value of the power transmission coil, and Ctx is the capacitance connected to the power transmission coil. The power transmission device according to claim 1 or claim 2.

5. The mask time is the time until the derivative of the current value detected by the current detection unit becomes zero or negative. The power transmission device according to claim 1 or claim 2.

6. The load of the power receiving device is the magnetization coil of the variable magnet module. The drive pulse signal applied to the semiconductor switch element at one time has a finite number of pulses. The power transmission device according to claim 1 or claim 2.

7. The first predetermined current value is variable by pulses. The power transmission device according to claim 1 or claim 2.

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