Information processing systems, solver devices, information processing methods, programs, and circuit information

Abstract

To reduce the amount of data received from an information processing device by a solver device.SOLUTION: An information processing system solves a combination optimization problem. The information processing system comprises an information processing device and a solver device. Among a plurality of coefficients, a first coefficient is represented by a predetermined first data type. Coefficient information includes a first identification value represented by a second data type having a smaller data size than the first data type in place of the first coefficient. The solver device stores restoration information representing a first restoration value corresponding to the first identification value. The first restoration value is represented by the first data type. When calculating the first coefficient among the plurality of coefficients, the solver device acquires the first identification value included in the coefficient information, and uses the first restoration value corresponding to the first identification value represented by the restoration information as the first coefficient.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] Embodiments of the present invention relate to an information processing system, a solver device, an information processing method, a program, and circuit information. [Background technology]

[0002] The optimization of systems in various application fields such as control, finance, communications, logistics, and chemistry can often be mathematically reduced to combinatorial optimization problems. By solving combinatorial optimization problems, information processing systems have been proposed that realize and improve the efficiency of various information processing functions such as recognition, judgment, and planning.

[0003] A combinatorial optimization problem is a problem in which a cost function is defined with multiple decision variables (e.g., discrete variables) representing the state of the system to be optimized as arguments, and the goal is to find the combination of values ​​for these decision variables that minimizes the defined cost function. The state of the system represented by the multiple decision variables is called a solution. In a combinatorial optimization problem, the number of possible solution states increases exponentially as the number of decision variables increases. This increase in the number of possible solution states is called a combinatorial explosion. Combinatorial optimization, which involves selecting the optimal solution from all candidate solutions, is known to be a computationally difficult problem. Performing large-scale combinatorial optimization in a short amount of time remains a challenging task.

[0004] In recent years, a specific-purpose device called an Ising machine, which searches for the ground state of the Ising model, has attracted attention. The problem of searching for the ground state of the Ising model is called the Ising problem. The Ising problem is a combinatorial optimization problem that minimizes a cost function given by a quadratic function of the Ising spin, one of the binary variables. In the Ising problem, the cost function is called the Ising energy. Many practical combinatorial optimization problems can be transformed into Ising problems. Ising machines can solve Ising problems at high speed. Therefore, many practical combinatorial optimization problems can be solved quickly using Ising machines.

[0005] An information processing system that has the function of solving combinatorial optimization problems using an Ising machine includes an Ising machine that performs a search for the ground state of the Ising model, and a host unit that performs processing other than the search. The Ising model is defined by a set of coupling coefficients (J matrix) and a set of external magnetic field coefficients (h vector). The host unit transmits Ising model data, including the J matrix and h vector, to the Ising machine and receives the values ​​of each of the optimized Ising spins from the Ising machine. The Ising machine also receives Ising model data from the host unit and returns the values ​​of each of the optimized Ising spins that minimize the Ising energy. In this way, the information processing system transmits Ising model data from the host unit to the Ising machine prior to the search for the ground state.

[0006] The Ising model becomes more versatile when represented using a high-precision, wide-range data type. However, an Ising model represented using a high-precision, wide-range data type results in a large amount of data. Therefore, when an information processing system uses an Ising model represented using a high-precision, wide-range data type, the transfer time of the Ising model data from the host unit to the Ising machine becomes long. On the other hand, when an information processing system uses an Ising model represented using a low-precision, narrow-range data type, the transfer time of the Ising model data from the host unit to the Ising machine can be shortened. However, an Ising model represented using a low-precision, narrow-range data type becomes less versatile. Thus, there is a trade-off between the versatility of the Ising model and the data transfer time from the host unit to the Ising machine, depending on the precision and range of the data type used to represent the Ising model. For this reason, it is preferable for an information processing system that has the function of solving optimization problems using the Ising model to shorten the data transfer time from the host unit to the Ising machine, and to be able to use a data type that represents the Ising model with high precision and a wide range.

[0007] Furthermore, information processing systems capable of solving optimization problems are not limited to Ising machines; they can also solve combined optimization problems using QUBO (Quadratic Unconstrained Binary Optimization) solvers or HUBO (Higher Order Binary Optimization) solvers, etc. Even in information processing systems capable of solving optimization problems using such solvers, there is a trade-off relationship between the versatility of the multiple coefficients included in the cost function and the data transfer time from the host unit to the Ising machine, depending on the precision and range of the data type used to represent the multiple coefficients included in the cost function. Therefore, it is preferable for information processing systems capable of solving optimization problems to shorten the data transfer time from the host unit to the Ising machine, and to be able to use data types that represent the multiple coefficients included in the cost function with high precision and a wide range of values. [Prior art documents] [Patent Documents]

[0008] [Patent Document 1] International Publication No. 2021 / 084629A1 [Patent Document 2] Japanese Patent Publication No. 2021-060864 [Patent Document 3] Japanese Patent Publication No. 2019-145010 [Patent Document 4] Japanese Patent Publication No. 2019-159566 [Patent Document 5] Japanese Patent Publication No. 2021-043667 [Patent Document 6] Japanese Patent Publication No. 2021-043589 [Non-patent literature]

[0009] [Non-Patent Document 1] Hayato Goto, Kosuke Tatsumura and Alexander R. Dixon, “Combinatorial optimization by simulating adiabatic bifurcations in nonlinear Hamiltonian systems,” Science Advances 5, eaav2372, 2019 [Non-Patent Document 2] Hayato Goto, Kotaro Endo, Masaru Suzuki, Yoshisato Sakai, Taro Kanao, Yohei Hamakawa, Ryo Hidaka, Masaya Yamasaki and Kosuke Tatsumura, “High-performance combinatorial optimization based on classical mechanics”, Science Advances 7, eabe7953, 2021 [Overview of the project] [Problems that the invention aims to solve]

[0010] The problem that this invention aims to solve is to solve combinatorial optimization problems with high accuracy while reducing the amount of data that the solver device receives from the information processing device. [Means for solving the problem]

[0011] The information processing system according to the embodiment solves a combinatorial optimization problem. The information processing system comprises an information processing device and a solver device. The information processing device outputs coefficient information representing the plurality of coefficients in a cost function that includes a plurality of coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by executing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the plurality of coefficients is represented by a predetermined first data type. The coefficient information includes a first identification value represented by a second data type having a smaller data size than the first data type, instead of the first coefficient. The solver device stores restoration information representing a first restoration value corresponding to the first identification value. The first restoration value is represented by the first data type. When the solver device performs an operation on the first coefficient among the plurality of coefficients, it obtains the first identification value included in the coefficient information and uses the first restoration value corresponding to the first identification value represented by the restoration information as the first coefficient. The recovery information represents P recovery values, each represented by the first data type, corresponding to the P identification values. The p-th recovery value among the P recovery values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values. The p-th recovery value is the p-th value. [Brief explanation of the drawing]

[0012] [Figure 1] A diagram illustrating a model of the Ising problem. [Figure 2] A diagram showing the internal variables used by the simulated branching algorithm. [Figure 3] A flowchart illustrating the processing flow of a simulated branching machine. [Figure 4] Configuration diagram of the information processing system according to the first embodiment. [Figure 5] A diagram illustrating the configuration of an information processing system equipped with a simulated branching machine. [Figure 6] A diagram showing the configuration of the host device and the solver device. [Figure 7] A diagram showing an example of the types of values ​​that multiple coefficients can take. [Figure 8] A diagram illustrating the first encoding method. [Figure 9]A diagram showing the restoration method corresponding to the first encoding method. [Figure 10] A diagram showing the first example of the range of values ​​that multiple coefficients can take. [Figure 11] A diagram illustrating the second encoding method. [Figure 12] A diagram showing the restoration method corresponding to the second encoding method. [Figure 13] A second example showing the range of values ​​that multiple coefficients can take. [Figure 14] A diagram illustrating the third encoding method. [Figure 15] A diagram illustrating the fourth encoding method. [Figure 16] A diagram showing the recovery method corresponding to the fourth encoding method. [Figure 17] A diagram showing an example of the configuration of a solution-finding circuit according to the second embodiment. [Figure 18] A diagram showing the configuration of a sum-of-accumulate circuit. [Figure 19] A diagram illustrating the structure of the market system. [Figure 20] A diagram showing an example of the control system configuration. [Figure 21] A diagram illustrating the hardware configuration of a computer. [Modes for carrying out the invention]

[0013] (Premise) First, we will explain the terminology and technology that are prerequisites for describing the embodiments.

[0014] A combinatorial optimization problem is a problem in which a cost function is defined with multiple decision variables (e.g., discrete variables) representing the state of the system to be optimized as arguments, and the problem is solved by finding the combination of values ​​of the multiple decision variables that minimizes the defined cost function. The cost function is a function of order one or higher that includes multiple decision variables representing the state of the system as arguments. For example, the cost function can be expressed as a linear or quadratic function of the multiple decision variables. The cost function may also be a function of order three or higher that includes multiple decision variables. In other words, the cost function is a function that sums up multiple terms. Each of the multiple terms is a function that multiplies one or more predetermined number of decision variables from the multiple decision variables by a coefficient. The coefficient in each of the multiple terms is a real number and is also called a weight value. That is, each of the multiple terms that make up the cost function is expressed by multiplying one or more decision variables from the multiple decision variables by one of the weight values.

[0015] The state of a system, as represented by multiple decision variables, is called a solution. The set of all possible solutions for the state of the system is called the solution space. The solution that gives the minimum value of the cost function is called the exact solution. A solution that gives a value close to the minimum of the cost function is called a good solution.

[0016] An exact solution method is a method for solving a combinatorial optimization problem that finds an exact solution that minimizes the cost function, and it is guaranteed that the solution is an exact solution.

[0017] A heuristic solution is a method for solving combinatorial optimization problems that seeks either an exact solution that minimizes the cost function or a good solution that is close to the minimum. Heuristic solutions are also called heuristic solutions. Heuristic solutions do not guarantee the accuracy of the solution, i.e., how close the solution is to the minimum of the cost function. Heuristic solutions can produce solutions with practically significant accuracy in a shorter time than exact solutions.

[0018] The computational complexity of solving a combinatorial optimization problem is the number of operations required to obtain the solution, such as the number of multiply-accumulate operations. The time required to solve a combinatorial optimization problem depends not only on the computational complexity but also on the configuration of the computer that performs the operations. For example, the solving time decreases as the degree of parallelism and operating frequency of the computer increase.

[0019] The QUBO problem is an unconstrained quadratic optimization problem where the decision variable is binary. In the QUBO problem, each of the multiple terms in the cost function is expressed as a linear or quadratic expression of the decision variable. In the strict definition, the QUBO problem is a binary variable where the decision variable is either 0 or 1. In this embodiment, the QUBO problem represents the strict definition problem where the decision variable is either 0 or 1. In the strict definition of the QUBO problem, the decision variable is sometimes called a bit variable.

[0020] The cost function for the QUBO problem is given by H in equation (1). total_QUBO It is represented by [this].

number

[0021] Figure 1 shows a model of the Ising problem. The Ising problem is a problem of searching for the ground state of the Ising model. The Ising problem is one of the QUBO problems. The decision variables of the Ising problem represent discrete variables of -1 or +1.

[0022] The cost function of the Ising problem is H in Equation (2) total_Ising represented by [Math Formula] N is an integer of 2 or more, and represents the number of decision variables. i and j each represent any integer of 1 or more and N or less. s i is -1 or +1, and represents the i-th decision variable among the N decision variables. s j is -1 or +1, and represents the j-th decision variable among the N decision variables. J ij represents the coefficient at the i-th row and j-th column included in the N×N coefficient matrix (J). Note that J ij = J ji . h i is a coefficient multiplied by the linear term of the i-th decision variable. h i is called a bias coefficient.

[0023] The Ising problem whose decision variables are s i corresponds to the ground state search problem for the Ising model, which is one of the magnetic material models in statistical mechanics. For this reason, s i may sometimes be referred to as a spin variable. In addition, N, which is the number of decision variables, may sometimes be referred to as the number of spins. Furthermore, H total_Ising may sometimes be referred to as Ising energy. H total_Ising The vector represented by the N s i values that gives the minimum value may sometimes be referred to as the ground state (ground spin configuration).

[0024] The cost function of the QUBO problem and the cost function of the Ising problem differ only in the value of a constant. For this reason, the QUBO problem and the Ising problem are identical as combinatorial optimization problems. That is, the QUBO problem and the Ising problem can be mutually converted. For example, the Ising problem and the QUBO problem are mutually converted by Equation (3-1), Equation (3-2), Equation (3-3), and Equation (3-4). [Math Formula]

[0025] The QUBO problem and the Ising problem are known to be NP-complete. That is, many NP-hard problems can be transformed into either a QUBO problem or an Ising problem in polynomial time. Therefore, many practical combinatorial optimization problems can be transformed into either a QUBO problem or an Ising problem.

[0026] An Ising machine is a device that solves the Ising problem. Many Ising machines solve the Ising problem using heuristic methods. Various Ising machines based on principles from fields such as electronics, optics, quantum mechanics, and statistical mechanics have been proposed. Many Ising machines can produce an exact solution or a good solution in a short amount of time.

[0027] Simulated bifurcation algorithms are algorithms for solving combinatorial optimization problems. Simulated bifurcation algorithms are heuristic solution algorithms.

[0028] Simulated bifurcation algorithms are shown, for example, in Non-Patent Documents 1-2 and Patent Documents 2-6. Because simulated bifurcation algorithms were discovered inspired by quantum mechanical optimization methods based on the quantum adiabatic theorem, they are also called quantum-inspired algorithms. Simulated bifurcation algorithms can solve combinatorial optimization problems where the cost function is a quadratic function of multiple decision variables. Simulated bifurcation algorithms can also solve combinatorial optimization problems where the cost function is a cubic or higher function of multiple decision variables, i.e., HUBO (Higher Order Binary Optimization) problems. For example, a simulated bifurcation algorithm for solving the HUBO problem is shown in Patent Document 5. Furthermore, simulated bifurcation algorithms can also solve combinatorial optimization problems where some or all of the multiple decision variables include continuous variables. A simulated bifurcation algorithm for solving combinatorial optimization problems where some or all of the multiple decision variables include continuous variables is shown in Patent Document 6.

[0029] A simulated branching machine is a computing device that performs processing according to a simulated branching algorithm. A simulated branching machine that solves the QUBO problem or the Ising problem is an example of an Ising machine. In this embodiment, the simulated branching machine solves the Ising problem.

[0030] Figure 2 shows the internal variables used by the simulated branching algorithm.

[0031] The simulated branching algorithm has N decision variables (s1~s N When solving a combinatorial optimization problem in which the cost function is expressed using ), the internal variables are N position variables (x1~x N ) and N momentum variables (y1~y N The simulated branching algorithm uses 2 × N internal variables.

[0032] N position variables (x i ) consists of N decision variables (s i ) corresponds one-to-one with the i-th position variable (x) among the N position variables. i ) is the i-th decision variable (s) among the N decision variables. i ) corresponds to N momentum variables (y i ) consists of N decision variables (s i It corresponds one-to-one with the i-th momentum variable (y) among the N momentum variables. i ) is the i-th decision variable (s) among the N decision variables. i ) corresponds to this.

[0033] Figure 3 is a flowchart showing the processing flow of a simulated branching machine. The simulated branching machine executes processing according to the simulated branching algorithm in the flow shown in Figure 3.

[0034] First, in S11, the simulated branching machine obtains the Ising problem. Specifically, the simulated branching machine obtains J, which is a matrix containing N × N coefficients, and h, which contains N bias coefficients.

[0035] Next, in S12, the simulated branching machine has 2 × N internal variables, i.e., N position variables (x1~x N ) and N momentum variables (y1~y N Initialize the N position variables (x1~x N Initial values ​​of ) and N momentum variables (y1~y N The initial values ​​of both or either of the following can be obtained from an external source. In addition, the simulated branching machine has N position variables (x1~x N Initial values ​​of ) and N momentum variables (y1~y N The initial value of ) may be generated by a random number generation circuit or set to a predetermined value. Note that since the simulated branching machine is a heuristic, even for the same problem, the N position variables (x1~x N Initial values ​​of ) and N momentum variables (y1~y N If at least one of the initial values ​​of ) is different, it may output different good solutions.

[0036] Next, the simulated branching machine repeats the process from S14 to S16 a predetermined number of times (loop processing between S13 and S17). The process from S14 to S16 involves N position variables (x1~x N A matrix operation that performs matrix multiplication of ) and a matrix containing weight values ​​in N rows × N columns, and N position variables (x1~x N ) and N momentum variables (y1~y N This is a time evolution process for evolving ) over time.

[0037] In S14, the simulated bifurcation machine has N momentum variables (y1~y NThe simulated branching machine performs a y-update process that updates each of the i-th momentum variable (y) in the y-update process. i In the update process of ), N position variables (x1~x N ) and the i-th position variable (x) of the N×N matrix (J). i ) and other (N-1) position variables (x 1~i-1, x i+1~N N coefficients (J) representing the interaction between ) i,j ) and the i-th bias coefficient (h i ) and the i-th momentum variable (y i ) Update.

[0038] Next, in S15, the simulated branching machine has N position variables (x1~x N The simulated branch machine executes an x ​​update process that updates each of the i-th position variable (x) in the x update process. i In the update process of ), the i-th momentum variable (y i ) determines the i-th position variable (x i ) Update.

[0039] The simulated branching machine may execute the processes of S14 and S15 in a reversed order.

[0040] Next, in S16, the simulated branching machine has N position variables (x1~x N The simulated bifurcation machine performs wall processing on position variables whose absolute value exceeds 1. Furthermore, the simulated bifurcation machine also performs wall processing on momentum variables corresponding to position variables whose absolute value exceeds 1. For example, in wall processing, the simulated bifurcation machine changes the absolute value of position variables whose absolute value exceeds 1 to a value of 1 or less, while keeping the sign the same. Also, for example, in wall processing, the simulated bifurcation machine changes the value of momentum variables corresponding to position variables whose absolute value exceeds 1 to 0.

[0041] Simulated bifurcation algorithms have variations in the x-update, y-update, and wall-update operations. For example, variations of the simulated bifurcation algorithm include the adiabatic simulated bifurcation (aSB) algorithm, the ballistic simulated bifurcation (bSB) algorithm, and the discrete simulated bifurcation (dSB) algorithm.

[0042] When executing processing according to the adiabatic simulated branching algorithm, the simulated branching machine performs the operation shown in equation (4-1) in the y update process (S14) and the operation shown in equation (4-2) in the x update process (S15). Note that when executing processing according to the adiabatic simulated branching algorithm, the simulated branching machine does not perform the wall process (S15).

number

[0043] When performing processing according to the ballistic simulated branching algorithm, the simulated branching machine performs the operation shown in equation (5-1) in the y update process (S14), the operation shown in equation (5-2) in the x update process (S15), and the operation shown in equation (5-3) in the wall processing (S16).

number

[0044] When executing a process according to a discrete simulated branching algorithm, the simulated branching machine performs the operation shown in equation (6-1) in the y update process (S14), the operation shown in equation (6-2) in the x update process (S15), and the operation shown in equation (6-3) in the wall process (S16).

number

[0045] Note that in equations (4-1), (4-2), (5-1), (5-2), (5-3), (6-1), (6-2), and (6-3), t k and t k+1 t represents time. k+1 is, t k This is the time obtained by adding a unit of time (Δt) to that value.

[0046] x i (t k ) is time (t k The i-th position variable (x) in ) i The value of x is shown. i (t k+1 ) is time (t k+1 The i-th position variable (x) in ) i The value of ) is shown. i (t k ) is time (t k The i-th momentum variable (y i The value of ) is shown. i (t k+1 ) is time (t k+1 The i-th momentum variable (y i This shows the value of ).

[0047] K, a0, η, and c0 are predetermined constants. k a(t) is a function that changes with time. k ) is, for example, a(t1)=0, a positive real number that increases as time increases, and is a function that becomes a0 at the end time (T) (a(T)=a0). Also, sgn(x i (t k )) is time (t k The i-th position variable (x) in ) i This is a function that outputs the sign of x i (t k If ) is 0 or greater, add +1, x i (t k If the value is less than 0, it becomes -1.

[0048] When the simulated branching machine has executed the processes of S14 to S16 a predetermined number of times, that is, when the operations have been executed until the time t reaches the final time T, it exits the loop process between S13 and S17, and proceeds the process to S18.

[0049] In S18, the simulated branching machine outputs the N position variables (x1 to x at the final time N ), or the N position variables (x1 to x at the final time N ), and outputs N decision variables (s1 to s calculated based thereon N ). The simulated branching machine calculates the i-th decision variable (s among the N decision variables (s1 to s N ) i ) based on sgn(x i ).

[0050] When the simulated branching machine completes the process of S18, it ends the processing according to the simulated branching algorithm.

[0051] Note that the number of repetitions of the time evolution process (the loop process between S13 and S17) is determined in advance according to the application. The amount of computation required for one process in the time evolution process (one process of S14 to S16) does not vary. Therefore, the simulated branching machine can reduce the variation in solution finding time. Accordingly, even when applied to a real-time system with a time constraint that processing must be completed by a predetermined time, the simulated branching machine can reliably output a solution by the predetermined time.

[0052] Furthermore, as shown in Patent Document 2, for example, a simulated branch machine can be configured using a dedicated parallel processing circuit that includes a large number of arithmetic units. This allows the simulated branch machine to extremely reduce the computation time of a single process in the time evolution process. In addition, unlike software processing, a simulated branch machine implemented in a dedicated hardware circuit does not experience any interrupt processing, so the solution time is strictly fixed. For example, a simulated branch machine implemented in a dedicated hardware circuit can fix the time until a solution is obtained in units of clock cycles. Therefore, when a simulated branch machine implemented in a dedicated hardware circuit is applied to a real-time system, it can output a solution while more reliably adhering to time constraints.

[0053] (First Embodiment) Next, the information processing system 10 according to the first embodiment will be described.

[0054] Figure 4 shows the configuration of the information processing system 10 according to the first embodiment. The information processing system 10 receives a combinatorial optimization problem and solves the combinatorial optimization problem using the host device 20 and the solver device 30. The information processing system 10 then outputs the solution to the combinatorial optimization problem.

[0055] The information processing system 10 comprises a host device 20 and a solver device 30.

[0056] The solver device 30 is a hardware-implemented Ising machine. The solver device 30 is introduced to shorten the time required to solve combinatorial optimization problems and operates as an accelerator or offloader in the information processing system 10.

[0057] Furthermore, the host device 20 is an information processing device and includes a general-purpose processor and accelerators other than the solver device 30, an offloader, memory, storage, sensors, actuators, a communication interface, etc. The host device 20 performs processing other than that performed by the solver device 30.

[0058] The host device 20 and the solver device 30 may be connected via a network. For example, the host device 20 may be a client terminal device on the network, and the solver device 30 may be implemented as a server or cloud on the network. Alternatively, the host device 20 and the solver device 30 may be connected via a communication bus. For example, the host device 20 may be a computer, and the solver device 30 may be implemented as an external device of the computer or as a separate computer.

[0059] The host device 20 acquires a combinatorial optimization problem. Based on the acquired combinatorial optimization problem, the host device 20 formulates a cost function that includes multiple coefficients and N decision variables (where N is an integer greater than or equal to 2). In this embodiment, the host device 20 formulates a cost function for the Ising problem based on the acquired combinatorial optimization problem. The host device 20 then outputs coefficient information (matrix (J) and bias coefficient array (h)) for identifying the Ising problem to the solver device 30.

[0060] The solver device 30 obtains coefficient information from the host device 20. Upon obtaining the coefficient information, the solver device 30 performs a solution process that minimizes the cost function formulated by the host device 20 based on the coefficient information. After the solution process is completed, the solver device 30 then extracts the N decision variables (s1~s) in the ground state of the cost function. N Ground state information (s) representing each of the values ​​of ) opt ) is output to the host device 20.

[0061] Note that the solver device 30 may be a QUBO solver that solves a QUBO problem. In this case, the host device 20 generates, as the coefficient information, coefficient information (matrix (Q)) that identifies the QUBO problem, and outputs the generated coefficient information to the solver device 30. In this case, the solver device 30 processes N decision variables (b1 to b N ) representing the respective values of the ground state information (b opt ) to the host device 20.

[0062] Further, the solver device 30 may acquire coefficient information (matrix (Q)) that identifies the QUBO problem, reduce the QUBO problem to an Ising problem, and execute a solving process. Further, the solver device 30 may be a HUBO solver that solves a HUBO problem, or may be a device capable of executing a solving process that minimizes a cost function including variables representing continuous values in some of the N decision variables. In this case, the host device 20 formulates a cost function in a format that can be solved by the solver device 30, and outputs coefficient information representing a plurality of coefficients included in the formulated cost function to the solver device 30.

[0063] FIG. 5 is a diagram illustrating a configuration of an information processing system 10 including the solver device 30 that is a simulated bifurcation machine.

[0064] The solver device 30 may be a simulated bifurcation machine. In this case, the host device 20 provides information (matrix (J) and bias coefficient (h)) for identifying the Ising problem to the simulated bifurcation machine. Further, the host device 20 may provide N position variables (x1 to x N ) and initial values of N momentum variables (y1 to y N ) to the solver device 30. Further, the host device 20 may provide various constants and functions (for example, K, a0, c 0、 a(t) and Δt) used in the simulated bifurcation algorithm and the like to the solver device 30. After the optimization process, the solver device 30 outputs N decision variables (s1 to s N ), instead of the ground state information (s opt ), representing N position variables (x1 to xN ) representing ground state information (x opt The solver may also send a response to the host device 20. Alternatively, even if the solver device 30 is a simulated branching machine, it may obtain coefficient information (matrix (Q)) that identifies the QUBO problem, reduce the QUBO problem to the Ising problem, and perform the solution process.

[0065] Figure 6 shows the configuration of the host device 20 and the solver device 30.

[0066] The host device 20 includes a problem acquisition unit 42, a formulation unit 44, an encoding unit 46, a coefficient output unit 48, a solution generation unit 50, and a solution output unit 52.

[0067] The problem acquisition unit 42 acquires combinatorial optimization problems from an external device. For example, the problem acquisition unit 42 acquires problems such as the bipartite graph maximum matching problem or the maximum independent sets problem. The problem acquisition unit 42 may also acquire the Ising problem or the QUBO problem as a combinatorial optimization problem. In addition, the problem acquisition unit 42 may acquire problems that include constraints.

[0068] The formulation unit 44 formulates the acquired combinatorial optimization problem into a cost function in a form that can be solved by the solver device 30.

[0069] The cost function is a function that sums up multiple terms. Each of the multiple terms is a function that multiplies one to a predetermined number of decision variables from the N decision variables by a coefficient. The formulation unit 44 generates multiple coefficients to be included in such a cost function based on the acquired combinatorial optimization problem. For example, if the solver device 30 is an Ising machine, the formulation unit 44 generates a matrix (J) and a bias coefficient array (h). Also, if the solver device 30 is a QUBO solver, the formulation unit 44 generates a matrix (Q).

[0070] Each of the multiple coefficients is represented by a predetermined first data type. The first data type is a data type that can be handled by the solver unit 30. For example, the first data type is a data type that represents a real number, such as a 32-bit floating-point type or a 64-bit fixed-point type.

[0071] The encoding unit 46 encodes each of the multiple coefficients generated by the formulation unit 44 into an identification value represented by a second data type. The second data type has a smaller data size than the first data type. The second data type is, for example, a data type that represents a bit sequence such as 2 bits, 4 bits, or 8 bits, or an integer value or a real number.

[0072] In other words, the encoding unit 46 converts a plurality of coefficients, each represented by a first data type, into a plurality of identification values, each represented by a second data type. The plurality of identification values ​​are the same number as the plurality of coefficients and are arranged in the same order as the plurality of coefficients.

[0073] Here, each of the multiple coefficients belongs to one of P groups (where P is an integer greater than or equal to 2). A group may consist of coefficients of the same value, coefficients within the same value range, or coefficients whose values ​​are relatively approximate.

[0074] The encoding unit 46 assigns a unique identifier to each of the P groups, represented by the second data type. Thus, the encoding unit 46 assigns P identifiers that correspond one-to-one to the P groups. The encoding unit 46 then encodes each of the multiple coefficients into an identifier that identifies the group to which it belongs.

[0075] Furthermore, the encoding unit 46 generates reconstruction information based on a plurality of coefficients and P identification values. The reconstruction information is information that causes the solver device 30 to generate reconstruction values ​​based on the identification values. The reconstruction values ​​are represented by a first data type and represent the coefficients before they are encoded into identification values. The reconstruction values ​​may be the same as the coefficients before they are encoded into identification values, or they may be different from the coefficients before they are encoded into identification values.

[0076] The reconstruction information represents a reconstruction value corresponding to each of the P identification values. In other words, the reconstruction information represents the p-th reconstruction value among the P reconstruction values, corresponding to the p-th identification value (where p is an integer between 1 and P, inclusive). In this case, the p-th identification value identifies the p-th group among the P groups. Furthermore, the p-th reconstruction value represents the coefficient before encoding the p-th identification value.

[0077] For example, the recovery information may be a table representing the recovery value corresponding to each of the P identification values. Alternatively, the recovery information may be a function that outputs the recovery value corresponding to any of the P identification values ​​when one of them is input. Furthermore, the recovery information may be a combination of a table and a function.

[0078] The encoding unit 46 then generates coefficient information that includes multiple identification values ​​instead of multiple coefficients. For example, instead of the first coefficient among the multiple coefficients, the encoding unit 46 generates coefficient information that includes a first identification value that identifies the group to which the first coefficient among the P identification values ​​belongs. For example, if the solver device 30 is an Ising machine, it generates a matrix (J) and a bias coefficient array (h) containing identification values ​​instead of coefficients as coefficient information. Also, for example, if the solver device 30 is a QUBO solver, it generates a matrix (Q) containing identification values ​​instead of coefficients as coefficient information.

[0079] Further details regarding the encoding method and restoration information of the identification value by the encoding unit 46 will be described later.

[0080] The coefficient output unit 48 outputs the coefficient information and reconstruction information generated by the encoding unit 46 to the solver device 30. The solver device 30 performs a solution process in response to receiving the coefficient information and reconstruction information. As a result of the solution process, the solver device 30 outputs ground state information representing the values ​​of each of the N decision variables in the ground state to the host device 20.

[0081] The solution generation unit 50 acquires ground state information from the solver device 30. Based on the acquired ground state information, the solution generation unit 50 generates a solution to the combinatorial optimization problem. The solution output unit 52 outputs the generated solution to the combinatorial optimization problem.

[0082] The solver device 30 includes an acquisition circuit 54, a coefficient information memory 56, a recovery information memory 58, a solution calculation circuit 60, and a ground state output circuit 62.

[0083] The acquisition circuit 54 acquires coefficient information and restoration information from the host device 20. The acquisition circuit 54 writes the acquired coefficient information to the coefficient information memory 56. The acquisition circuit 54 also writes the acquired restoration information to the restoration information memory 58.

[0084] The coefficient information memory 56 stores coefficient information. The recovery information memory 58 stores recovery information.

[0085] The solving circuit 60 performs a solving process to minimize the cost function based on the coefficient information stored in the coefficient information memory 56 and the recovery information stored in the recovery information memory 58. The solving circuit 60 then calculates ground state information representing the values ​​of each of the N decision variables obtained by the solving process.

[0086] For example, when the solving circuit 60 performs an operation on the first coefficient among multiple coefficients, it obtains a first identification value included in the coefficient information instead of the first coefficient. Then, the solving circuit 60 uses the first restored value, which corresponds to the first identification value represented by the restored information, as the first coefficient. Then, the solving circuit 60 performs the calculation based on the obtained first restored value as the first coefficient.

[0087] When the solving circuit 60 performs calculations on each of multiple coefficients, it obtains a restored value in the same way as the first coefficient and performs the calculation. Alternatively, the solving circuit 60 may obtain two or more restored values ​​corresponding to two or more coefficients in parallel from the coefficient information.

[0088] The ground state output circuit 62 outputs the ground state information calculated by the solution circuit 60 to the host device 20.

[0089] The information processing system 10 described above can solve a combinatorial optimization problem and output the solution to the combinatorial optimization problem using the host device 20 and the solver device 30.

[0090] The encoding unit 46 in the host device 20 may store pre-configured restoration information. In this case, the encoding unit 46 does not need to generate restoration information if multiple coefficients are generated by the formulation unit 44.

[0091] Furthermore, if the encoding unit 46 stores pre-set restoration information, the coefficient output unit 48 in the host device 20 does not need to transmit the restoration information to the solver device 30. In this case, the restoration information memory 58 in the solver device 30 stores the same restoration information as the restoration information set in the host device 20. That is, the solver device 30 stores the restoration information without acquiring it from the host device 20, prior to the generation of coefficient information by the encoding unit 46.

[0092] Even when using multiple coefficients represented by a first data type with high accuracy and a wide range of values, the information processing system 10 described above transmits coefficient information, including multiple identification values ​​represented by a second data type with a smaller data size than the first data type, from the host device 20 to the solver device 30. The solver device 30 then uses the restoration information to restore each of the multiple identification values ​​represented by the second data type to a restored value represented by the first data type and performs the calculation.

[0093] As a result, the information processing system 10 can reduce the amount of data transferred from the host device 20 to the solver device 30 by eliminating or minimizing the degradation of multiple coefficients. Therefore, the information processing system 10 can solve combinatorial optimization problems with high accuracy and speed.

[0094] Furthermore, the solver device 30 stores multiple identification values, each represented by a second data type, instead of multiple coefficients, each represented by a first data type. When the solver device 30 performs an operation on the first coefficient among the multiple coefficients, it reads the first identification value included in the coefficient information instead of the first coefficient, and uses the recovery information to recover the first recovered value from the first identification value and then performs the operation. This allows the solver device 30 to reduce the storage capacity of the coefficient information memory 56.

[0095] (First encoding method) Next, we will describe the first encoding method for coefficient information and reconstruction information.

[0096] Figure 7 shows an example of the types of values ​​that multiple coefficients can take.

[0097] In cost functions, the range of possible values ​​for each of the coefficients may be very limited compared to the range of values ​​that can be represented by the first data type. For example, in the example in Figure 7, each of the coefficients in the cost function is one of the following: a, b, c, or d (where a, b, c, and d are real numbers represented by the first data type).

[0098] Figure 8 is a diagram illustrating the first encoding method.

[0099] For example, suppose that each of the multiple coefficients included in the cost function can take on P different values ​​(where P is an integer greater than or equal to 2). In this case, each of the multiple coefficients included in the cost function is one of the P possible values.

[0100] The encoding unit 46 searches all of the multiple coefficients and detects all P values. In some cases, all P values ​​may be predetermined depending on the cost function. In such cases, the encoding unit 46 may read the predetermined P values ​​from memory or elsewhere.

[0101] Furthermore, the encoding unit 46 generates P distinct identifiers, each represented by a second data type. The encoding unit 46 then assigns the p-th identifier to the p-th value (where p is an integer between 1 and P, inclusive). In other words, the encoding unit 46 assigns a one-to-one correspondence between the P identifiers to the P values.

[0102] Furthermore, the encoding unit 46 assigns the p-th restored value out of the P restored values ​​to the p-th value out of the P values. In other words, the encoding unit 46 assigns the P restored values ​​to the P values ​​on a one-to-one basis.

[0103] Note that the p-th restored value is identical to the p-th value among the P values. Furthermore, the p-th restored value may be the value obtained by quantizing the p-th value by a predetermined value, the value obtained by truncating the p-th value to a predetermined digit or below, the value obtained by rounding up the p-th value to a predetermined digit or below by a threshold.

[0104] Furthermore, the encoding unit 46 generates restoration information that represents the correspondence between P identification values ​​and P restoration values. For example, the restoration information is a table that shows that the p-th restoration value among the P restoration values ​​corresponds to the p-th identification value among the P identification values.

[0105] The encoding unit 46 then generates coefficient information by replacing each of the multiple coefficients with an identification value from among the P identification values ​​that corresponds to the target coefficient. For example, the encoding unit 46 generates coefficient information that includes a first identification value that identifies the same value as the first coefficient among the P identification values, instead of the first coefficient among the multiple coefficients.

[0106] In the example in Figure 8, the possible values ​​for each of the multiple coefficients are "a=-2.8", "b=8.5", "c=0.7", and "d=12.1", totaling four values. In this case, the encoding unit 46 generates four identification values, "0", "1", "2", and "3", which are represented by 2-bit data types. The encoding unit 46 then assigns "0" as the identification value for "-2.8", "1" for "8.5", "2" for "0.7", and "3" for "12.1".

[0107] In the example shown in Figure 8, the encoding unit 46 generates a table as restoration information. The table shows that the restoration value representing "-2.8" of the first data type corresponds to the identification value representing "0", the restoration value representing "8.5" of the first data type corresponds to the identification value representing "1", the restoration value representing "0.7" of the first data type corresponds to the identification value representing "2", and the restoration value representing "12.1" of the first data type corresponds to the identification value representing "3".

[0108] Furthermore, the encoding unit 46 generates multiple coefficients ({W} A Replace “a=-2.8” with the identifier value representing “0” of the second data type, replace “b=8.5” with the identifier value representing “1” of the second data type, replace “c=0.7” with the identifier value representing “2” of the second data type, and replace “d=12.1” with the identifier value representing “3” of the second data type.

[0109] Figure 9 shows an example of a method for restoring the restored value from the coefficient information and restoration information encoded by the first encoding method.

[0110] The coefficient information memory 56 stores the coefficient information encoded by the first encoding method. The restoration information memory 58 stores the restoration information encoded by the first encoding method. When performing an operation on a coefficient identified by its coefficient position (m) among multiple coefficients included in the cost function, the solution circuit 60 performs the following processing.

[0111] In the case of the Ising problem, the coefficient position (m) is information that specifies the row and column numbers of the matrix (J), or information that specifies the position of an element in the bias coefficient array (h). Also, in the case of the cost function of the QUBO problem, the coefficient position (m) is information that specifies the row and column numbers of the matrix (Q).

[0112] First, the solving circuit 60 provides the coefficient position (m) to the coefficient information memory 56, and then retrieves an identification value (cW) corresponding to the coefficient position (m) from the coefficient information stored in the coefficient information memory 56. m The circuit then reads out the identified value (cW). Next, the solving circuit 60 reads out the identified value (cW). m ) is provided to the recovery information memory 58, and the identification value (cW) is obtained from the recovery information stored in the recovery information memory 58. m The restored value corresponding to ) is read out. As a result, the solving circuit 60 can restore the restored value corresponding to the coefficient included in the specified coefficient position (m) based on the coefficient information encoded by the first encoding method and the restored information.

[0113] The solution circuit 60 then performs calculations on the coefficients identified by the coefficient position (m) among the multiple coefficients, using the restored values ​​read from the restored information memory 58.

[0114] By using the coefficient information and reconstruction information generated by the first encoding method described above, the information processing system 10 can significantly reduce the amount of data transmitted from the host device 20 to the solver device 30 without degrading the multiple coefficients. In addition, the information processing system 10 can reduce the memory capacity of the coefficient information memory 56 provided in the solver device 30.

[0115] Furthermore, when the information processing system 10 is solving a combinatorial optimization problem in which the number of coefficients included in the cost function is very small in terms of the number of types of values ​​that the coefficients can take, it is preferable to apply this first encoding method.

[0116] For example, when the information processing system 10 solves the bipartite graph maximum matching problem, it may apply the first encoding method. The bipartite graph maximum matching problem formulated in the QUBO model is represented by equations (11-1), (11-2), (11-3), and (11-4).

number

[0117] b i,j This represents a decision variable that is 1 if the i-th object and the j-th object match, and 0 if they do not match. i and j are 1 or greater, and N. O The following integers: N O is an integer greater than or equal to 2, representing the number of objects. A is H penalty This is a constant that represents the strength of the interaction. MR(i,j) represents the ratio in which the i-th object and the j-th object are identical.

[0118] When the QUBO model represented by equations (11-1) to (11-4) is converted to an Ising model, the possible values ​​for each of the multiple coefficients included in the J matrix are -0.5A or 0. In other words, there are two types of multiple coefficients included in the J matrix. Therefore, when solving the bipartite graph maximum matching problem, the information processing system 10 can significantly reduce the amount of data transmitted from the host device 20 to the solver device 30 by using the coefficient information and reconstruction information generated by the first encoding method.

[0119] Furthermore, for example, when the information processing system 10 solves the maximum independent set problem, it may apply the first encoding method. The maximum independent set problem, formulated in the QUBO model, is represented by equations (12-1), (12-2), (12-3), and (12-4).

number

[0120] The graph of the maximum independent set problem is represented as G=(V,E), where V is the set of vertices and E is the set of edges.

[0121] b i This represents a decision variable that is 1 if the i-th vertex in the set of vertices (V) is an element of an independent set, and 0 otherwise. A is H penalty b is a constant that represents the strength of. i b j This value represents 1 if an edge exists between the i-th vertex and the j-th vertex, and 0 if no such edge exists.

[0122] When the QUBO model represented by equations (12-1) to (12-4) is converted to an Ising model, the possible values ​​for each of the multiple coefficients included in the J matrix are -0.5A or 0. In other words, there are two types of multiple coefficients included in the J matrix. Therefore, when solving the maximum independent set problem, the information processing system 10 can significantly reduce the amount of data transmitted from the host device 20 to the solver device 30 by using the coefficient information and reconstruction information generated by the first encoding method.

[0123] (Second encoding method) Next, we will describe a second encoding method for coefficient information and reconstruction information.

[0124] Figure 10 shows a first example of the range of values ​​that multiple coefficients can take.

[0125] In a cost function, the values ​​that multiple coefficients can take may be distributed within a specific range of values, relative to the range of values ​​that the first data type can take. For example, in the example in Figure 10, the multiple coefficients included in the cost function are V min That’s it~V max Below (V min , V max It is distributed among real numbers represented by the first data type.

[0126] Figure 11 is a diagram illustrating the second encoding method.

[0127] For example, suppose the possible values ​​of the multiple coefficients included in the cost function are distributed within a specific range of values. In this case, the encoding unit 46 generates P value ranges by dividing the range of possible values ​​of the multiple coefficients into P parts. Note that the range of possible values ​​of the multiple coefficients is the minimum value (V) among the multiple coefficients. min ) or more, the maximum value (V) among multiple coefficients. min ) The range is as follows:

[0128] Furthermore, the encoding unit 46 generates P distinct identifier values, each represented by a second data type. The encoding unit 46 then assigns the p-th identifier value to the p-th value region among the P value regions. In other words, the encoding unit 46 assigns the P identifier values ​​to the P value regions on a one-to-one basis.

[0129] Furthermore, the encoding unit 46 assigns the p-th restored value out of the P restored values ​​to the p-th value region out of the P value regions. In other words, the encoding unit 46 assigns the P restored values ​​to the P value regions on a one-to-one basis.

[0130] Note that the p-th restored value is a value included in the p-th value range. In this example, the p-th restored value is the minimum value in the p-th value range. The p-th restored value may also be the maximum value or the midpoint in the p-th value range.

[0131] Furthermore, the encoding unit 46 generates reconstruction information that represents the correspondence between P identification values ​​and P reconstruction values. For example, the reconstruction information is a function that outputs the p-th reconstruction value when the p-th identification value is input.

[0132] For example, let step be the width of the values ​​in each of the P value regions, and cW be the p-th identification value. m In that case, the encoding unit 46 is {(cW m ×step)+V min The function represented by} is generated as restoration information. Note that step is (Vmax -V min) It is calculated using / P.

[0133] Note that the restoration information is {(cW m ×step)+V min +V off It may also be a function represented by}. off This is any value between 0 and step, greater than or equal to 0.

[0134] The encoding unit 46 then generates coefficient information by replacing each of the multiple coefficients with an identification value from among the P identification values ​​that corresponds to the target coefficient. For example, the encoding unit 46 generates coefficient information that includes a first identification value that identifies the value region containing the first coefficient from among the P identification values, instead of the first coefficient from among the multiple coefficients.

[0135] In the example in Figure 11, the minimum value (V min ) is 0.0. Maximum value (V max) is 4.0. And P is 4. In this case, the encoding unit 46 generates four identification values, "0", "1", "2", and "3", which are represented by a 2-bit data type. The encoding unit 46 then assigns "0" as the identification value for the value range between 0.0 and 1.0 (inclusive), "1" as the identification value for the value range between 1.0 and 2.0 (inclusive), "2" as the identification value for the value range between 2.0 and 3.0 (inclusive), and "3" as the identification value for the value range between 3.0 and 4.0 (inclusive).

[0136] Furthermore, the encoding unit 46 is {(cW m ×step)+V min A function representing} is generated as the recovery information. In this example, step is 1.0, and V min It is 0.0.

[0137] Furthermore, the encoding unit 46 further encodes multiple coefficients ({W} included in the cost function. A The coefficient information ({cW}) obtained by replacing each of the ) with the corresponding identification value. B) generates. In the example in Figure 11, the encoding unit 46 generates multiple coefficients ({W} A Of these, coefficients between 0.0 and less than 1.0 are replaced with an identification value representing "0", coefficients between 1.0 and less than 2.0 are replaced with an identification value representing "1", coefficients between 2.0 and less than 3.0 are replaced with an identification value representing "2", and coefficients between 3.0 and 4.0 are replaced with an identification value representing "3".

[0138] Figure 12 shows an example of a restoration method for restoring the restored value from the coefficient information and restoration information encoded by the second encoding method.

[0139] The coefficient information memory 56 stores the coefficient information encoded by the second encoding method. The restoration information memory 58 stores the restoration information encoded by the second encoding method. When performing an operation on a coefficient identified by its coefficient position (m) among multiple coefficients included in the cost function, the solution circuit 60 performs the following processing.

[0140] First, the solving circuit 60 provides the coefficient position (m) to the coefficient information memory 56, and then retrieves an identification value (cW) corresponding to the coefficient position (m) from the coefficient information stored in the coefficient information memory 56. m The solution circuit 60 then reads out the identified value (cW). Next, the solution circuit 60 obtains a function from the restored information memory 58 to output the restored value. Then, the solution circuit 60 reads out the identified value (cW). m ) input into the function, and the identification value (cW m The system calculates the restored value corresponding to the coefficient at the specified coefficient position (m). This allows the solving circuit 60 to restore the restored value corresponding to the coefficient included at the specified coefficient position (m) based on the coefficient information encoded by the second encoding method and the restored information.

[0141] The solution circuit 60 then performs calculations on the coefficients identified by the coefficient position (m) among the multiple coefficients, using the calculated restored values.

[0142] By using the coefficient information and reconstruction information generated by the second encoding method described above, the information processing system 10 can reduce the degradation of multiple coefficients and significantly reduce the amount of data transmitted from the host device 20 to the solver device 30. In addition, the information processing system 10 can reduce the memory capacity of the coefficient information memory 56 provided in the solver device 30.

[0143] Next, a third encoding method for coefficient information and reconstruction information will be described.

[0144] Figure 13 shows a second example of the range of values ​​that multiple coefficients can take.

[0145] In a cost function, the values ​​that multiple coefficients can take may be distributed across multiple subdomains, relative to the range of values ​​that can be represented by the first data type. For example, in the example in Figure 13, the multiple coefficients in the cost function fall into one of two subdomains.

[0146] Figure 14 is a diagram illustrating the third encoding method.

[0147] For example, suppose the possible values ​​of the multiple coefficients included in the cost function are distributed across multiple subregions. In this case, the encoding unit 46 clusters the multiple coefficients and divides them into P classes. This allows the encoding unit 46 to generate P classes, each containing a group of coefficients that it approximates. Note that P changes depending on the distribution of the multiple coefficients or the clustering algorithm.

[0148] Furthermore, the encoding unit 46 generates P distinct identifier values, each represented by a second data type. The encoding unit 46 then assigns the p-th identifier value to the p-th class among the P classes. In other words, the encoding unit 46 assigns the P identifier values ​​to the P classes on a one-to-one basis.

[0149] Furthermore, the encoding unit 46 assigns the p-th restoration value to the p-th class out of the P classes. In other words, the encoding unit 46 assigns P restoration values ​​to P classes on a one-to-one basis.

[0150] The p-th restored value is a representative value of the group of coefficients included in the p-th class. For example, the p-th restored value is the minimum, median, mean, or maximum value of the group of coefficients included in the p-th class.

[0151] Furthermore, the encoding unit 46 generates restoration information that represents the correspondence between P identification values ​​and P restoration values. For example, the restoration information is a table that shows that the p-th restoration value corresponds to the p-th identification value.

[0152] The encoding unit 46 then generates coefficient information by replacing each of the multiple coefficients with an identification value from among the P identification values ​​that corresponds to the target coefficient. For example, the encoding unit 46 generates coefficient information that includes a first identification value that identifies the class to which the first coefficient from among the P identification values ​​belongs, instead of the first coefficient from among the multiple coefficients.

[0153] In the example shown in Figure 14, the encoding unit 46 divides the multiple coefficients into two classes. In this case, the encoding unit 46 generates two identification values, "0" and "1", which are represented by a 1-bit data type. The encoding unit 46 then assigns "0" as the identification value to the first class and "1" as the identification value to the second class.

[0154] In the example shown in Figure 14, the encoding unit 46 calculates "-2.8," which is the median of the coefficient group included in the first class, as the representative value for the first class, and calculates "8.5," which is the median of the coefficient group included in the first class, as the representative value for the second class.

[0155] Furthermore, in the example shown in Figure 14, the encoding unit 46 generates restoration information representing a table in which the restoration value representing "-2.8", which is the representative value of the first class, corresponds to the identification value representing "0", and the restoration value representing "8.5" corresponds to the identification value representing "1".

[0156] Furthermore, in the example in Figure 14, the encoding unit 46 includes multiple coefficients ({W}) in the cost function. A The coefficient information ({cW}) obtained by replacing each of the ) with the corresponding identification value. B ) generates. In this case, the encoding unit 46 generates multiple coefficients ({W} A Replace the coefficients in the first class with an identification value representing "0", and replace the coefficients in the second class with an identification value representing "1".

[0157] Furthermore, when using coefficient information and reconstruction information encoded by the third encoding method, the solving circuit 60 reconstructs the reconstruction values ​​in the same manner as the reconstruction method shown in Figure 9. Then, the solving circuit 60 performs calculations on the coefficients identified by the coefficient position (m) among the multiple coefficients, using the calculated reconstruction values.

[0158] By using the coefficient information and reconstruction information generated by the third encoding method described above, the information processing system 10 can reduce the degradation of multiple coefficients and significantly reduce the amount of data transmitted from the host device 20 to the solver device 30. In addition, the information processing system 10 can reduce the memory capacity of the coefficient information memory 56 provided in the solver device 30.

[0159] Next, a fourth encoding method for coefficient information and reconstruction information will be described.

[0160] Figure 15 is a diagram illustrating the fourth encoding method.

[0161] For example, suppose the possible values ​​of the multiple coefficients included in the cost function are distributed across multiple subregions, as shown in Figure 13. In this case, the encoding unit 46 clusters the multiple coefficients and divides them into S classes. S is an integer greater than or equal to 2 and changes depending on the distribution of the multiple coefficients or the clustering algorithm.

[0162] The encoding unit 46 generates S distinct class values. The encoding unit 46 then assigns the s-th class value to the s-th class (where s is an integer between 1 and S, inclusive) among the S classes. In other words, the encoding unit 46 assigns S class values ​​to S classes on a one-to-one basis.

[0163] The encoding unit 46 generates T value regions for each of the S classes by dividing the range of values ​​that the coefficient group included in it can take into T (T is an integer greater than or equal to 2). T is an integer greater than or equal to 2. For example, for the s-th class, the encoding unit 46 generates T value regions by dividing the range of values ​​that the coefficient group included in the s-th class can take into T. Note that the range of values ​​that the coefficient group included in the s-th class can take is the minimum value (V) among the coefficients included in the s-th class. min_s ) The maximum value (V) among the group of coefficients included in the sth class. max_s ) is within the following range. Furthermore, T may be the same in all S classes, or it may be a unique value for each of the S classes.

[0164] The encoding unit 46 generates T sub-identifiers for each of the S classes. Then, for each of the S classes, the encoding unit 46 assigns the t-th sub-identifier to the t-th value region (where t is between 1 and T) out of the T value regions. In other words, for each of the S classes, the encoding unit 46 assigns the T sub-identifiers to the T value regions on a one-to-one basis.

[0165] Furthermore, the encoding unit 46 assigns the t-th restored value out of the T restored values ​​to the t-th value region out of the T value regions for each of the S classes. In other words, the encoding unit 46 assigns the T restored values ​​one-to-one to the T value regions for each of the S classes.

[0166] For each of the S classes, the t-th restored value is a value contained within the t-th value range. In this example, the t-th restored value is the minimum value in the t-th value range. The t-th restored value may also be the maximum value or the intermediate value in the t-th value range.

[0167] The encoding unit 46 then generates reconstruction information for each of the S classes, representing the correspondence between T sub-identifiers and T reconstruction values. For example, the encoding unit 46 generates reconstruction information for each of the S classes, representing a function that outputs the t-th reconstruction value when the t-th sub-identifier is input.

[0168] For example, for the s-th class, let step_s be the value width in each of the T value regions, and QW be the t-th sub-identifier. m In that case, the encoding unit 46 is {(QW m ×step_s)+V min_s The function represented by} is generated as restoration information. Note that step_s is (V max_s -V min_s) It is calculated by / T. max_s V is the maximum value of the coefficient group included in the s-th class. min_s is the minimum value of the coefficient group included in the s-th class.

[0169] Note that the restoration information is {(QV m ×step_s)+V min_s +V off_s It may also be a function represented by}. off_s is any value between 0 and step_s, and less than or equal to 0.

[0170] Furthermore, the encoding unit 46 generates coefficient information by replacing each of the multiple coefficients with an identification value represented by a second data type.

[0171] Here, the identification value is represented by a pair of a class value and a sub-identification value. The pair of class value and sub-identification value is represented by a second data type. The identification value may be an array containing two values, or it may be an integer value with the class value in the upper digit and the sub-identification value in the lower digit. If the number of pairs of class value and sub-identification value is P, then each of the multiple coefficients belongs to one of the P groups.

[0172] For example, the encoding unit 46 generates coefficient information that includes a first identification value instead of the first coefficient among a plurality of coefficients. In this case, the first identification value represents a pair of a class value that identifies the class containing the first coefficient among S classes, and a sub-identification value that identifies the value region containing the first coefficient among T value regions in the class containing the first coefficient.

[0173] In the example shown in Figure 15, the encoding unit 46 classifies the multiple coefficients into two classes. In this case, the encoding unit 46 generates two class values, "0" and "1", which are represented by a 1-bit data type. The encoding unit 46 then assigns "0" as the class value to the first class and "1" as the class value to the second class.

[0174] Furthermore, in Figure 15, the encoding unit 46 sets the first class to {(QW m ×step_1)+V min_1 The function representing} corresponds to the second class {(QW m ×step_2)+V min_2 The function representing} generates the corresponding restoration information.

[0175] Figure 16 shows an example of a restoration method for restoring the restored value from the coefficient information and restoration information encoded by the fourth encoding method.

[0176] The coefficient information memory 56 stores the coefficient information encoded by the fourth encoding method. The restoration information memory 58 stores the restoration information encoded by the fourth encoding method. When performing an operation on a coefficient identified by its coefficient position (m) among multiple coefficients included in the cost function, the solution circuit 60 processes as follows.

[0177] First, the solving circuit 60 provides the coefficient position (m) to the coefficient information memory 56, and then retrieves an identification value (cW) corresponding to the coefficient position (m) from the coefficient information stored in the coefficient information memory 56. m The circuit then reads out the identified value (cW). Next, the solving circuit 60 reads out the identified value (cW). m ) from which the class value and sub-identification value (QV m Next, the solving circuit 60 extracts the sub-identification value (QV). Then, it provides the class value to the recovery information memory 58 and reads the function corresponding to the class value from the recovery information stored in the recovery information memory 58. Next, the solving circuit 60 extracts the sub-identification value (QV). m The read value is input to the function to calculate the restored value. As a result, the solving circuit 60 can restore the restored value corresponding to the coefficient included in the specified coefficient position (m) based on the coefficient information encoded by the fourth encoding method and the restored information.

[0178] The solution circuit 60 then performs calculations on the coefficients identified by the coefficient position (m) among the multiple coefficients, using the calculated restored values.

[0179] By using the coefficient information and reconstruction information generated by the fourth encoding method described above, the information processing system 10 can reduce the degradation of multiple coefficients and significantly reduce the amount of data transmitted from the host device 20 to the solver device 30. In addition, the information processing system 10 can reduce the memory capacity of the coefficient information memory 56 provided in the solver device 30.

[0180] (Second Embodiment) Next, the information processing system 10 according to the second embodiment will be described.

[0181] The information processing system 10 according to the second embodiment is the same as the first embodiment described with reference to FIGS. 1 to 16 except for a solution finding circuit 60 in a solver device 30. Hereinafter, elements having substantially the same functions and configurations as those of the first embodiment are denoted by the same reference numerals, and detailed descriptions thereof are omitted except for the differences.

[0182] FIG. 17 is a diagram illustrating an example of the configuration of the solution finding circuit 60 according to the second embodiment.

[0183] The solution finding circuit 60 includes a first variable memory 68, a sum-of-products operation circuit 70, and a search circuit 72.

[0184] The first variable memory 68 stores N first variables (x1 to x N ). N represents the number of decision variables included in the cost function. The n-th first variable (n is an integer of 1 or more and N or less) among the N first variables (x1 to x N ) corresponds to the n-th decision variable (s N ) among the N decision variables (s1 to s n ). For example, when the solver device 30 is a simulated bifurcation machine, the N first variables (x1 to x N ) correspond to N position variables.

[0185] Note that in the present embodiment, each of the N first variables (x1 to x N ) is represented by a third data type having a smaller data size than the first data type. Note that each of the N first variables (x1 to x N ) may be of the first data type.

[0186] The sum-of-products operation circuit 70 acquires and stores P restored values represented by the restoration information stored in the restoration information memory 58 prior to solution finding processing.

[0187] The sum-of-products operation circuit 70 receives designation of coefficient positions (m1 to m N ) of N coefficients among the plurality of coefficients included in the cost function from the search circuit 72. The sum-of-products operation circuit 70 receives designation of the coefficient positions (m1 to mN If the specified coefficient position (m1~m) is accepted, the coefficient information stored in the coefficient information memory 56 will be used to select the specified coefficient position (m1~m N ) is replaced by N included identification values ​​(cW1~cW N The sum-of-accumulate circuit 70 reads out the coefficient positions (m1 to m). N If the specification of ) is accepted, N first variables (x1~x) will be selected from the first variable memory 68. N ) read out.

[0188] The sum-of-accumulate circuit 70 has N identification values ​​(cW1 to cW N If ) is obtained, then N first variables (x1~x N ) and N restoration values ​​corresponding to N coefficients (W'1~W' N ) performs a sum-of-products operation. Specifically, the sum-of-products circuit 70 performs the operation shown in equation (21).

number

[0189] Then, the sum-of-accumulate circuit 70 stores the calculation result in N first variables (x1~x N ) and the specified coefficient position (m1~m N The value of the sum of products of the N coefficients of ) is given to the search circuit 72.

[0190] The search circuit 72, in the solution-finding process, determines the coefficient positions (m1~m) of N coefficients among the multiple coefficients included in the cost function. N While changing the coefficient position (m1~m N The specification of ) is repeated. In the solution-finding process, the search circuit 72 uses the sum-of-products calculation value calculated by the sum-of-products calculation circuit 70 to determine N first variables (x1~x N The process of updating ) is repeated.

[0191] Then, the search circuit 72 uses N first variables (x1~x N The process of updating the first variables (x1~x) is repeated a predetermined number of times or for a predetermined time. Then, after the search circuit 72 finishes the solution process, the N first variables (x1~x) stored in the first variable memory 68 are updated. NThe following is provided to the ground state output circuit 62: The ground state output circuit 62 receives N first variables (x1~x) stored in the first variable memory 68. N Based on this, N decision variables (s1~s N Ground state information (s) representing each of the values ​​of ) opt It generates a signal and outputs it to the host device 20.

[0192] Figure 18 shows the configuration of the sum-of-accumulate circuit 70.

[0193] The sum-of-accumulate circuit 70 includes P cumulative adder circuits 80 (80-1 to 80-P), a demultiplexer circuit 82, P data type conversion circuits 84 (84-1 to 84-P), a restored value readout circuit 86, and a subsequent circuit 88.

[0194] The P cumulative adder circuits 80 correspond one-to-one with the P groups contained in the multiple coefficients. That is, the p-th cumulative adder circuit 80-p among the P cumulative adder circuits 80 corresponds to the p-th group among the P groups. Note that the number of groups of P varies depending on the contents of the multiple coefficients and the encoding method of the coefficient information and the reconstruction information. Therefore, before execution of the processing, the multiply-accumulate circuit 70 selects and operates P cumulative adder circuits 80 from among the many cumulative adder circuits 80 based on the reconstruction information.

[0195] Each of the P cumulative adder circuits 80 stores a cumulative value. Each of the P cumulative adder circuits 80 adds the acquired value to the stored cumulative value. Each of the P cumulative adder circuits 80 has a demultiplexer circuit 82 that calculates N first variables (x1~x N Before obtaining the value, reset the stored cumulative value to 0.

[0196] The demultiplexer circuit 82 uses the coefficient information stored in the coefficient information memory 56 to determine the specified coefficient position (m1~m N ) contains N identification values ​​(cW1~cW N The first variables (x1~x) are acquired one by one in sequence. The demultiplexer circuit 82 also acquires N first variables (x1~x) from the first variable memory 68.N ) are acquired one by one in sequence. In this case, the demultiplexer circuit 82 acquires N first variables (x1~x N The nth first variable (x) n ) and N identification values ​​(cW1~cW N The nth identification value (cW) among ) n ) and retrieve them in sync.

[0197] The demultiplexer circuit 82 has N first variables (x1~x N Each of the ) is given to one of the P cumulative adder circuits 80. More specifically, the demultiplexer circuit 82 takes N first variables (x1~x N The nth first variable (x) n If you obtain the nth first variable (x n ) are used to select N identification values ​​(cW1~cW N The nth identification value (cW) among ) n This is provided to the cumulative adder circuit 80 corresponding to the group identified by ).

[0198] For example, the demultiplexer circuit 82 includes P selectors 92 (92-1 to 92-P) and a switching control circuit 94.

[0199] The P selectors 92 correspond one-to-one with the P cumulative adder circuits 80. The p-th selector 92-p corresponds to the p-th cumulative adder circuit 80-p. The multiply-accumulate circuit 70, before processing, selects and activates P selectors 92 from among the many selectors 92, similar to the P cumulative adder circuits 80.

[0200] Each of the P selectors 92 has N first variables (x1~x N ) are obtained one by one in sequence. Each of the P selectors 92 is one of N first variables (x1~x N The nth first variable (x) n If you obtain the nth first variable (x n ) or 0 is given to the corresponding cumulative adder circuit 80.

[0201] The switching control circuit 94 sequentially acquires N identification values (cW1 to cW N ) one by one. When acquiring the n-th identification value (cW n ), the switching control circuit 94 causes, among the P selectors 92, the selector 92 corresponding to the group identified by the n-th identification value (cW n ) to output the n-th first variable (x n ), and causes the other selectors 92 to output 0. For example, when the n-th identification value (cW n ) identifies the p-th group among the P groups, the switching control circuit 94 causes, among the P selectors 92, the selector 92-p corresponding to the p-th group to output the n-th first variable (x n ), and causes the other selectors 92 to output 0.

[0202] Such a demultiplexer circuit 82, when acquiring the n-th first variable (x N ) among the N first variables (x1 to x n ), can provide the n-th first variable (x N ) to the cumulative addition circuit 80 corresponding to the group identified by the n-th identification value (cW n ) among the N identification values (cW1 to cW n ) among the P cumulative addition circuits 80, so as to add it to the stored cumulative value.

[0203] Accordingly, the p-th cumulative addition circuit 80-n among the P cumulative addition circuits 80 can execute the operation represented by Equation (22).

Equation

[0204] Note that in Equation (22), ACC p represents the cumulative value stored in the p-th cumulative addition circuit 80-n. Further, cW n =p indicates that the n-th identification value identifies the p-th group.

[0205] Each of the P cumulative adder circuits 80 stores a cumulative value represented by a third data type. Therefore, each of the P cumulative adder circuits 80 stores a cumulative value represented by a third data type and a first variable (x1~x) represented by a third data type. N Add ) and .

[0206] The P data type conversion circuits 84 correspond one-to-one with the P cumulative addition circuits 80. That is, the p-th data type conversion circuit 84-p corresponds to the p-th cumulative addition circuit 80-p. The multiply-accumulate circuit 70, before processing, selects and activates P data type conversion circuits 84 from among the many data type conversion circuits 84, similar to the P cumulative addition circuits 80.

[0207] Each of the P data type conversion circuits 84 obtains a cumulative value from the corresponding cumulative adder circuit 80 among the P cumulative adder circuits 80. Then, each of the P data type conversion circuits 84 converts the obtained cumulative value from the third data type to the first data type and provides it to the subsequent circuit 88. That is, the p-th data type conversion circuit 84-p converts the cumulative value obtained from the p-th cumulative adder circuit 80-p from the third data type to the first data type and provides it to the subsequent circuit 88.

[0208] The restored value reading circuit 86 acquires P restored values ​​represented by the restored information stored in the restored information memory 58 prior to the solution process. The restored value reading circuit 86 provides the acquired P restored values ​​to the subsequent circuit 88 and stores them internally prior to the solution process.

[0209] The subsequent circuit 88 acquires and stores P recovery values, each represented by the first data type, prior to the solution process. The subsequent circuit 88 also acquires P cumulative values, each represented by the first data type, from P data type conversion circuits 84. Then, the subsequent circuit 88 performs a sum-of-products operation on the P cumulative values, each represented by the first data type, and the P recovery values, each represented by the first data type.

[0210] In other words, the subsequent circuit 88 performs the calculation shown in equation (23).

number

[0211] In equation (23), W p The ' represents the p-th restored value out of P restored values. ACC p This represents the p-th cumulative value represented by the first data type.

[0212] Then, the subsequent circuit 88 has N first variables (x1~x N After obtaining all of the values, the sum of products calculated by performing a sum of products operation on the P cumulative values ​​and the P restored values ​​is output as the sum of products calculated value.

[0213] For example, the subsequent circuit 88 includes P recovery value memories 96 (96-1 to 96-P), P multiplication circuits 98 (98-1 to 98-P), and an adder circuit 100. The multiply-accumulate circuit 70, before execution of processing, selects and activates P recovery value memories 96, P recovery value memories 96, and P multiplication circuits 98 from among a large number of recovery value memories 96 and a large number of multiplication circuits 98, similar to the P cumulative adder circuit 80.

[0214] The P recovery value memories 96 correspond one-to-one with the P groups. Each of the P recovery value memories 96 stores a recovery value associated with an identification value that identifies the corresponding group. That is, the p-th recovery value memory 96-p among the P recovery value memories 96 stores a recovery value associated with an identification value that identifies the p-th group.

[0215] The P multipliers 98 correspond one-to-one with the P groups. Each of the P multipliers 98 retrieves the cumulative value represented by the first data type in its corresponding group. That is, the p-th multiplier 98-p retrieves the cumulative value stored in the p-th cumulative adder 80-p via the p-th data type conversion circuit 84-p. In addition, each of the P multipliers 98 retrieves the restored value represented by the first data type in its corresponding group. That is, the p-th multiplier 98-p retrieves the restored value stored in the p-th restored value memory 96-p.

[0216] Then, each of the P multiplication circuits 98 calculates a multiplicative value by multiplying the cumulative value represented by the acquired first data type by the restored value represented by the acquired first data type.

[0217] The adder circuit 100 obtains the P multiplication values ​​calculated by the P multiplication circuits 98. Then, the adder circuit 100 outputs the sum of all P multiplication values ​​as the sum-of-products value.

[0218] Generally, if the data type of each of the multiple coefficients is a first data type with high precision and wide range, the value obtained by multiplying the coefficient by the first variable will also lie within the same high precision and wide range of the first data type. Therefore, in order to perform a multiply-accumulate operation without degrading precision and range, the input and output data of each arithmetic unit included in the multiply-accumulate unit must be a high precision and wideband data type corresponding to the first data type.

[0219] However, in the sum-of-accumulate circuit 70 according to the second embodiment, when we focus on the P cumulative add circuits 80, the first variable (x1~x N The process involves adding (x1~x), so it does not perform operations on coefficients of high precision and wide range data types. N For example, if the Ising machine is a ballistic simulated bifurcation algorithm (Equations (5-1) to (5-3)), then it is limited to -1.0 or greater and 1.0 or less. Also, the first variable (x1 to x N) is limited to -1 or 1, for example, if the Ising machine is a discrete simulated branching algorithm (equations (6-1) to (6-3)). Therefore, the first variable (x1 to x N If the input data is represented by a data type smaller than the data size of the first data type, the multiply-accumulate circuit 70 according to the second embodiment may include P cumulative adder circuits 80 whose input data type is, for example, a narrow bandwidth in a fixed range with relatively low precision.

[0220] Thus, since the multiply-accumulate circuit 70 includes a circuit that performs calculations on data of a relatively low-precision data type in a narrow bandwidth, it can reduce the resources required for implementation and increase the calculation speed compared to a general multiply-accumulate unit that must input and output data of a high-precision and wide-range data type. Therefore, the multiply-accumulate circuit 70 can perform calculations with the same precision as a multiply-accumulate unit that must input and output data of a high-precision and wide-range data type, but at a lower speed and with less power consumption.

[0221] As described above, the information processing system 10 according to the second embodiment, like the first embodiment, can reduce the amount of data transferred from the host device 20 to the solver device 30 by eliminating or minimizing the degradation of multiple coefficients. Furthermore, the information processing system 10 can reduce the storage capacity of the coefficient information memory 56 of the solver device 30. Moreover, the information processing system 10 according to the second embodiment can efficiently perform the sum-of-accumulate operation executed in the solver device 30.

[0222] (Third embodiment) Next, the market system 200 according to the third embodiment will be described.

[0223] The information processing system 10 described in the first and second embodiments can be applied to the market system 200.

[0224] Figure 19 shows the configuration of the market system 200. The market system 200 executes electronic transactions of multiple assets by multiple participants. More specifically, for each of the assets, the market system 200 receives buy and sell orders from each of the multiple participants, matches the price and quantity of the received buy orders with the price and quantity of the sell orders, and electronically completes the transactions.

[0225] For example, the market system 200 executes buy and sell transactions of multiple stocks (stocks of multiple issues) as electronic transactions of multiple assets. The assets are not limited to stocks, but may also include securities such as bonds, equity investment trusts, and real estate investment trusts, and their futures, as well as financial instruments such as foreign exchange, interest rates, and interest rate futures, or commodities such as gold, crude oil, and grains, and their futures.

[0226] The market system 200 comprises a market server device 212 and a plurality of client devices 214.

[0227] The market server device 212 is a computer used by the market administrator. The market server device 212 is connected to multiple client devices 214 via a network.

[0228] Each of the client devices 214 is a device used by market participants. Each of the client devices 214 is implemented, for example, by a computer.

[0229] Each of the multiple client devices 214 decides which of the multiple stocks it will trade. Each of the multiple client devices 214 generates an order packet containing trading information for the stock it decided to trade and sends it to the market server device 212.

[0230] The market server device 212 executes trades for multiple stocks. The market server device 212 receives order packets transmitted from each of the multiple client devices 214. For each of the multiple stocks, the market server device 212 matches the price and quantity of sell orders with the price and quantity of buy orders, and executes trades between sell orders and buy orders with matching prices and quantities in the order they were received. The market server device 212 simultaneously distributes market information packets containing information indicating the status of stock trading to the multiple client devices 214.

[0231] Each of the multiple client devices 214 acquires a market information packet and, based on the information contained in the acquired market information packet, decides which of the multiple stocks to trade. Then, each of the multiple client devices 214 generates an order packet for the stock it has decided on and sends it to the market server device 212.

[0232] The information processing system 10 according to this embodiment functions as part of the client device 214 in the market system 200. The information processing system 10 may be implemented by a computer including a processor and memory, or it may be configured to include a dedicated hardware circuit in addition to a processor and memory.

[0233] Here, the information processing system 10 generates a combinatorial optimization problem based on the market information packet, solves the generated combinatorial optimization problem, and decides whether or not to trade each of the multiple stocks based on the solution to the combinatorial optimization problem obtained. Then, the information processing system 10 generates an order packet containing trading information for the stocks that it has decided to trade among the multiple stocks, and transmits it to the market server device 212.

[0234] In this way, the information processing system 10 is applied to the client device 214 of the market system 200, enabling the optimal execution of electronic transactions such as stock trading.

[0235] (Fourth Embodiment) Next, a control system 300 according to the fourth embodiment will be described.

[0236] The information processing system 10 described in the first and second embodiments can also be applied, for example, to a control system 300 that controls the movement of a moving object.

[0237] Figure 20 shows an example of the configuration of the control system 300 according to the fourth embodiment. The control system 300 controls, for example, an autonomously moving mobile object such as an autonomous vehicle, a drone, or a robot.

[0238] The control system 300 comprises an object detection device 312, an information processing system 10, and a control device 314.

[0239] The object detection device 312 acquires image data from, for example, a camera that captures images around the moving object to be controlled. In addition to image data, the object detection device 312 may also acquire sensor data from other sensor devices. Based on the acquired image data and sensor data, the object detection device 312 detects coordinate data representing the three-dimensional coordinates of one or more objects around the moving object. Furthermore, the object detection device 312 may also detect the three-dimensional coordinates of the moving object itself.

[0240] The object detection device 312 repeatedly outputs data to the information processing system 10 at irregular intervals, which includes identification information that identifies one or more objects, and coordinate data (input information) that represents the coordinates of the object identified by the identification information. In addition to the coordinate data, the input information may also include other relevant information such as the movement speed, acceleration, direction of movement, and type of object of the object identified by the identification information.

[0241] The control device 314 acquires output data from the information processing system 10, which includes output information indicating that a predetermined operation should be performed on the mobile object in order to control it. The control device 314 controls the mobile object based on the acquired output data.

[0242] The information processing system 10 has the same configuration as described in the first and second embodiments.

[0243] The information processing system 10 generates a combinatorial optimization problem based on data provided irregularly from the object detection device 312. The information processing system 10 solves the combinatorial optimization problem and generates a solution to the combinatorial optimization problem. The information processing system 10 generates output data based on the solution to the combinatorial optimization problem and outputs the generated output data to the control device 314.

[0244] In this way, the information processing system 10 is applied to the control system 300, enabling optimal control of the moving object.

[0245] (Hardware configuration) Figure 21 shows an example of a computer hardware configuration. The host device 20 is implemented by a computer with a hardware configuration as shown in Figure 21. The host device 20 includes a CPU (Central Processing Unit) 401, RAM (Random Access Memory) 402, ROM (Read Only Memory) 403, storage device 404, and communication interface device 405. These components are connected by a bus.

[0246] The CPU 401 is one or more processors that perform arithmetic and control processing according to a program. The CPU 401 uses a predetermined area of ​​the RAM 402 as a working area and performs various processes in cooperation with programs stored in the ROM 403 and storage device 404, etc.

[0247] RAM402 is a type of memory such as SDRAM (Synchronous Dynamic Random Access Memory). RAM402 functions as a workspace for CPU401. ROM403 is a memory that stores programs and various information in a non-rewritable format.

[0248] The storage device 404 is a device that writes and reads data to and from a storage medium made of semiconductors such as flash memory, or a storage medium that can record magnetically or optically. The storage device 404 writes and reads data to and from the storage medium in response to control from the CPU 401. The communication interface device 405 communicates with external devices via a network in response to control from the CPU 401.

[0249] A program executed on a computer causes the computer to function as a host device 20. This program is loaded onto RAM 402 and executed by the CPU 401 (processor).

[0250] Furthermore, programs executed on a computer are provided as files in a format that can be installed on a computer or in an executable format, recorded on computer-readable recording media such as CD-ROMs, flexible disks, CD-Rs, and DVDs (Digital Versatile Disks).

[0251] Furthermore, this program may be configured to be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network. Alternatively, this program may be configured to be provided or distributed via a network such as the Internet. Furthermore, the program to be executed on the host device 20 may be pre-installed in a ROM 403 or the like and provided accordingly.

[0252] The program for making the computer function as a host device 20 has a modular configuration that includes, for example, a problem acquisition module, a formulation module, an encoding module, a coefficient output module, a solution generation module, and a solution output module. When this program is executed by the CPU 401, each module is loaded into the RAM 402, causing the CPU 401 to function as a problem acquisition unit 42, a formulation unit 44, an encoding unit 46, a coefficient output unit 48, a solution generation unit 50, and a solution output unit 52. If the CPU 401 consists of multiple processors, these units may be divided among the multiple processors. Note that some or all of these configurations may be made up of hardware.

[0253] Furthermore, the solver device 30 may also be implemented by a computer with a hardware configuration such as that shown in Figure 21. In this case, the program for making the computer function as the solver device 30 includes, for example, an acquisition module, a solution module, and a base state output module. This program is executed by the CPU 401, loading each module into the RAM 402, and causing the CPU 401 to function as an acquisition unit that performs processing similar to that of the acquisition circuit 54, a solution unit that performs processing similar to that of the solution circuit 60, and a base state output unit that performs processing similar to that of the base state output circuit 62. If the CPU 401 consists of multiple processors, these units may be divided among the multiple processors. This program also causes the RAM 402 and the storage device 404 to function as a coefficient information memory 56 and a recovery information memory 58. Note that some or all of these configurations may be made up of hardware.

[0254] Furthermore, each of the host device 20 and the solver device 30 may be implemented by one or more reconfigurable semiconductor devices, such as FPGAs (Field-Programmable Gate Arrays). Also, each of the host device 20 and the solver device 30 may be implemented by one or more CPUs, microprocessors, GPUs (Graphics Processing Units), ASICs (Application Specific Integrated Circuits), or electronic circuits including these circuits.

[0255] Furthermore, if the host device 20 and the solver device 30 are each implemented using a reconfigurable semiconductor device such as an FPGA, the circuit information (configuration data) written to the reconfigurable semiconductor device in order to operate it as the host device 20 and the solver device 30 may be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network. Alternatively, the circuit information (configuration data) written to the reconfigurable semiconductor device in order to operate it as the host device 20 and the solver device 30 may be recorded on a computer-readable recording medium and provided.

[0256] Furthermore, if the host device 20 and the solver device 30 are each implemented using semiconductor devices such as ASICs, the circuit information representing the configuration of the circuits described in a hardware description language used in the design and manufacture of the host device 20 and the solver device 30 may be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network. Alternatively, the circuit information representing the configuration of the circuits described in a hardware description language used in the design and manufacture of the host device 20 and the solver device 30 may be recorded on a computer-readable recording medium and provided.

[0257] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.

[0258] (Note) Furthermore, the above embodiments can be summarized in the following technical proposal.

[0259] [Technical proposal 1] An information processing system for solving combinatorial optimization problems, An information processing device that outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer greater than or equal to 2), A solver device that calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information, Equipped with, The first coefficient among the aforementioned multiple coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing calculations on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Information processing system.

[0260] [Technical proposal 2] The information processing device generates the restoration information based on the plurality of coefficients, and outputs the restoration information to the solver device. The solver device acquires the recovery information from the information processing device. The information processing system described in Technical Proposal 1.

[0261] [Technical proposal 3] The solver device stores the recovery information prior to acquiring the coefficient information. The information processing system described in Technical Proposal 1.

[0262] [Technical proposal 4] Each of the aforementioned coefficients is represented by the first data type and belongs to one of the P groups (where P is an integer greater than or equal to 2). The aforementioned restoration information represents P restoration values ​​corresponding to P identification values, The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value is represented by the second data type and identifies the p-th group out of the P groups, The p-th restored value is represented by the first data type and is a value that represents the group of coefficients belonging to the p-th group. The coefficient information includes, in place of the first coefficient among the plurality of coefficients, a first identification value that identifies the group to which the first coefficient belongs among the P groups. An information processing system as described in Technical Proposal 1 or 2.

[0263] [Technical proposal 5] The solver apparatus is, A coefficient information memory that stores the coefficient information, A recovery information memory that stores the aforementioned recovery information, A solving circuit that performs the solving process based on the coefficient information stored in the coefficient information memory and the restoration information stored in the restoration information memory, An information processing system as described in Technical Proposal 4, including the above.

[0264] [Technical proposal 6] When performing calculations on the first coefficient, the solution circuit, From the coefficient information stored in the coefficient information memory, obtain the first identification value which is included in place of the first coefficient. The first restored value corresponding to the first identification value, which is represented by the restored information stored in the restored information memory, is obtained. The calculation process is performed using the first restoration value as the first coefficient. The information processing system described in Technical Proposal 5.

[0265] [Technical proposal 7] The solution circuit includes a sum-of-products operation circuit that performs a sum-of-products operation between N first variables corresponding to the N decision variables and N restoration values ​​corresponding to N coefficients among the plurality of coefficients, The aforementioned sum-of-accumulate circuit is Each of the P cumulative adder circuits stores a cumulative value, adds the acquired value to the cumulative value, and resets the cumulative value to 0 before acquiring the N first variables. A demultiplexer circuit that provides each of the N first variables to one of the P cumulative adder circuits, A subsequent circuit performs a sum-of-products operation on the P cumulative values ​​stored in the P cumulative summation circuits and the P restored values ​​represented in the restored information. Includes, Of the P cumulative adder circuits, the p-th cumulative adder circuit (where p is an integer between 1 and P) corresponds to the p-th group. The aforementioned demultiplexer circuit is In place of the aforementioned N coefficients, N identification values ​​are obtained from the coefficient information, When the nth first variable (where n is an integer between 1 and N) is obtained from the N first variables, it is given to the cumulative adder circuit among the P cumulative adder circuits that corresponds to the group identified by the nth identification value out of the N identification values. The information processing system described in Technical Proposal 5.

[0266] [Technical proposal 8] The subsequent circuit, after acquiring all of the N first variables, outputs a value obtained by performing a sum-of-products operation on the P accumulated values ​​and the P restored values ​​as the sum-of-products value of the N first variables and the N restored values. The information processing system described in Technical Proposal 7.

[0267] [Technical proposal 9] The aforementioned downstream circuit is, P multiplication circuits, An adder circuit that adds the P multiplication values ​​output from the P multiplication circuits, Includes, Of the P multiplier circuits, the p-th multiplier circuit corresponds to the p-th group, After obtaining all of the aforementioned N first variables, The p-th multiplication circuit outputs a multiplied value obtained by multiplying the accumulated value stored in the p-th cumulative addition circuit by the restored value corresponding to the p-th identification value. The addition circuit outputs the sum of the P multiplication values ​​as the sum-of-products value. The information processing system described in Technical Proposal 8.

[0268] [Technical proposal 10] Each of the N first variables is represented by a third data type having a smaller data size than the first data type. Further equipped with P data type conversion circuits, Of the P data type conversion circuits, the p-th data type conversion circuit corresponds to the p-th cumulative addition circuit, The p-th data type conversion circuit converts the accumulated value stored in the p-th cumulative adder circuit from the third data type to the first data type and provides it to the subsequent circuit. An information processing system described in any one of technical proposals 7 through 9.

[0269] [Technical proposal 11] Each of the N decision variables included in the cost function is a binary discrete variable. An information processing system described in any one of the technical proposals 1 through 10.

[0270] [Technical proposal 12] The information processing device formulates the combinatorial optimization problem into the cost function of a QUBO (Quadratic Unconstrained Binary Optimization) problem. The information processing system described in Technical Proposal 11.

[0271] [Technical proposal 13] The information processing device formulates the combinatorial optimization problem into the cost function in the Ising problem that minimizes the Ising model. The information processing system described in Technical Proposal 11.

[0272] [Technical proposal 14] The solver device solves the QUBO problem by reducing it to an Ising problem that minimizes the Ising model. The information processing system described in Technical Proposal 12.

[0273] [Technical proposal 15] The solver device solves the Ising problem using a simulated branching algorithm. An information processing system as described in Technical Proposal 13 or 14.

[0274] [Technical proposal 16] The cost function is a function of order three or higher of the N decision variables, The aforementioned combinatorial optimization problem is a HUBO (Higher Order Binary Optimization) problem. The information processing system described in Technical Proposal 11.

[0275] [Technical proposal 17] A solver device used in an information processing device for solving combinatorial optimization problems, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned multiple coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing calculations on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Solver device.

[0276] [Technical proposal 18] An information processing method for solving a combinatorial optimization problem using an information processing device and a solver device, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned multiple coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver device, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing calculations on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Information processing methods.

[0277] [Technical proposal 19] A program to make a computer function as a solver device used in an information processing device for solving combinatorial optimization problems, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned multiple coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The aforementioned computer, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing calculations on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. A program that makes it work in that way.

[0278] [Technical proposal 20] Circuit information describing the configuration of a circuit, written in a hardware description language, The aforementioned circuit is made to function as a solver device used by an information processing device that solves combinatorial optimization problems. The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned multiple coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing calculations on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Circuit information.

[0279] [Technical proposal 21] Circuit information written to a reconfigurable semiconductor device in order to operate the said reconfigurable semiconductor device, The aforementioned reconfigurable semiconductor device is made to function as a solver used by an information processing device that solves combinatorial optimization problems. The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned multiple coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing calculations on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Circuit information. [Explanation of Symbols]

[0280] 10 Information Processing Systems 20 Host devices 30 Solver device 42 Question acquisition part 44 Formulation part 46 Encoding section 48 Coefficient Output Section 50 Solution generation part 52 Solution output section 54 Acquisition circuit 56 Coefficient Information Memory 58. Recovery Information Memory 60 Solving circuit 62 Ground State Output Circuit 68. First variable memory 70. Multiply-accumulate circuit 72 Search circuit 80 Cumulative Adder Circuit 82 Demultiplexer Circuit 84 Data type conversion circuit 86. Restored Value Readout Circuit 88. Post-stage circuit 92 Selector 94 Switching control circuit 96 Restored value memory 98 Multiplier Circuits 100 Adder Circuit 200 Market Systems 300 Control Systems

Claims

1. An information processing system for solving combinatorial optimization problems, An information processing device that outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more), A solver device that calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information, Equipped with, The aforementioned information processing device is The aforementioned combinatorial optimization problem is formulated as an Ising problem that minimizes the Ising model, If the number of unique coefficient values ​​in the N×N coefficient matrix (J) in the Ising problem is less than or equal to a predetermined number of P (where P is an integer of 2 or more), then the first coefficient, which is one of the P values ​​represented by a predetermined first data type included in the coefficient matrix (J), is encoded into the first identification value among the P identification values ​​represented by a second data type having a smaller data size than the first data type. Instead of the first coefficient, the coefficient information including the first identification value is output to the solver device. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. The restoration information represents P restoration values, each corresponding to one of the P identification values, and expressed by the first data type. The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values, The p-th restored value is the p-th value. Information processing system.

2. The information processing device generates the restoration information based on the plurality of coefficients, and outputs the restoration information to the solver device. The solver device acquires the recovery information from the information processing device. The information processing system according to claim 1.

3. The solver device stores the recovery information prior to acquiring the coefficient information. The information processing system according to claim 1.

4. The information processing device encodes the first coefficient included in the coefficient matrix (J) into the first identification value when there are two types of coefficient values ​​included in the N × N coefficient matrix (J) in the Ising problem. The information processing system according to claim 1.

5. The solver apparatus is, A coefficient information memory that stores the coefficient information, A recovery information memory that stores the aforementioned recovery information, A solving circuit that performs the solving process based on the coefficient information stored in the coefficient information memory and the restoration information stored in the restoration information memory, The information processing system according to claim 1, including the following:

6. When performing calculations on the first coefficient, the solution circuit, From the coefficient information stored in the coefficient information memory, obtain the first identification value which is included in place of the first coefficient. The first restored value corresponding to the first identification value, which is represented by the restored information stored in the restored information memory, is obtained. The calculation process is performed using the first restoration value as the first coefficient. The information processing system according to claim 5.

7. An information processing system for solving a combinatorial optimization problem, An information processing device that outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more), A solver device that calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information, Equipped with, The first coefficient among the aforementioned plurality of coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Each of the aforementioned plurality of coefficients is represented by the first data type and belongs to one of the P groups (where P is an integer of 2 or more). The aforementioned restoration information represents P restoration values ​​corresponding to P identification values, The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value is represented by the second data type and identifies the p-th group out of the P groups, The p-th restored value is represented by the first data type and is a value that represents the group of coefficients belonging to the p-th group. The coefficient information includes, in place of the first coefficient among the plurality of coefficients, a first identification value that identifies the group to which the first coefficient belongs among the P groups. The solver apparatus is, A coefficient information memory that stores the coefficient information, A recovery information memory that stores the aforementioned recovery information, A solving circuit that performs the solving process based on the coefficient information stored in the coefficient information memory and the restoration information stored in the restoration information memory, Includes, The solution circuit includes a sum-of-products operation circuit that performs a sum-of-products operation between N first variables corresponding to the N decision variables and N restoration values ​​corresponding to N coefficients among the plurality of coefficients, The aforementioned sum-of-accumulate circuit is Each of the P cumulative addition circuits stores a cumulative value, adds the acquired value to the cumulative value, and resets the cumulative value to 0 before acquiring the N first variables. A demultiplexer circuit that provides each of the N first variables to one of the P cumulative adder circuits, A subsequent circuit performs a sum-of-products operation on the P cumulative values ​​stored in the P cumulative summation circuits and the P restored values ​​represented in the restored information. Includes, Of the P cumulative adder circuits, the p-th cumulative adder circuit (where p is an integer between 1 and P) corresponds to the p-th group. The aforementioned demultiplexer circuit is N identification values ​​to be included in place of the aforementioned N coefficients are obtained from the coefficient information, When the nth first variable (where n is an integer between 1 and N) is obtained from the N first variables, it is given to the cumulative adder circuit among the P cumulative adder circuits that corresponds to the group identified by the nth identification value out of the N identification values. Information processing system.

8. The subsequent circuit, after acquiring all of the N first variables, outputs a value obtained by performing a sum-of-products operation on the P accumulated values ​​and the P restored values ​​as the sum-of-products value of the N first variables and the N restored values. The information processing system according to claim 7.

9. The aforementioned downstream circuit is, P multiplication circuits and An adder circuit that adds the P multiplication values ​​output from the P multiplication circuits, Includes, Of the P multiplier circuits, the p-th multiplier circuit corresponds to the p-th group, After obtaining all of the aforementioned N first variables, The p-th multiplication circuit outputs a multiplied value obtained by multiplying the accumulated value stored in the p-th cumulative addition circuit by the restored value corresponding to the p-th identification value. The addition circuit outputs the sum of the P multiplication values ​​as the sum-of-products value. The information processing system according to claim 8.

10. Each of the N first variables is represented by a third data type having a smaller data size than the first data type. It further includes P data type conversion circuits, The p-th data type conversion circuit among the P data type conversion circuits corresponds to the p-th cumulative addition circuit, The p-th data type conversion circuit converts the accumulated value stored in the p-th cumulative adder circuit from the third data type to the first data type and provides it to the subsequent circuit. The information processing system according to claim 7.

11. The solver device solves the Ising problem using a simulated branching algorithm. The information processing system according to claim 1.

12. A solver device used in an information processing device for solving combinatorial optimization problems, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The aforementioned information processing device is The aforementioned combinatorial optimization problem is formulated as an Ising problem that minimizes the Ising model, If the number of unique coefficient values ​​in the N×N coefficient matrix (J) in the Ising problem is less than or equal to a predetermined number of P (where P is an integer of 2 or more), then the first coefficient, which is one of the P values ​​represented by a predetermined first data type included in the coefficient matrix (J), is encoded into the first identification value among the P identification values ​​represented by a second data type having a smaller data size than the first data type. Instead of the first coefficient, the coefficient information including the first identification value is output to the solver device. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. The restoration information represents P restoration values, each corresponding to one of the P identification values, and expressed by the first data type. The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values, The p-th restored value is the p-th value. Solver device.

13. A solver device used in an information processing device for solving a combinatorial optimization problem, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned plurality of coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Each of the aforementioned plurality of coefficients is represented by the first data type and belongs to one of the P groups (where P is an integer of 2 or more). The aforementioned restoration information represents P restoration values ​​corresponding to P identification values, The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value is represented by the second data type and identifies the p-th group out of the P groups, The p-th restored value is represented by the first data type and is a value that represents the group of coefficients belonging to the p-th group. The coefficient information includes, in place of the first coefficient among the plurality of coefficients, a first identification value that identifies the group to which the first coefficient belongs among the P groups. The solver apparatus is, A coefficient information memory that stores the coefficient information, A recovery information memory that stores the aforementioned recovery information, A solving circuit that performs the solving process based on the coefficient information stored in the coefficient information memory and the restoration information stored in the restoration information memory, Includes, The solution circuit includes a sum-of-products operation circuit that performs a sum-of-products operation between N first variables corresponding to the N decision variables and N restoration values ​​corresponding to N coefficients among the plurality of coefficients, The aforementioned sum-of-accumulate circuit is Each of the P cumulative addition circuits stores a cumulative value, adds the acquired value to the cumulative value, and resets the cumulative value to 0 before acquiring the N first variables. A demultiplexer circuit that provides each of the N first variables to one of the P cumulative adder circuits, A subsequent circuit performs a sum-of-products operation on the P cumulative values ​​stored in the P cumulative summation circuits and the P restored values ​​represented in the restored information. Includes, Of the P cumulative adder circuits, the p-th cumulative adder circuit (where p is an integer between 1 and P) corresponds to the p-th group. The aforementioned demultiplexer circuit is N identification values ​​to be included in place of the aforementioned N coefficients are obtained from the coefficient information, When the nth first variable (where n is an integer between 1 and N) is obtained from the N first variables, it is given to the cumulative adder circuit among the P cumulative adder circuits that corresponds to the group identified by the nth identification value out of the N identification values. Solver device.

14. An information processing method for solving a combinatorial optimization problem using an information processing device and a solver device, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The aforementioned information processing device is The aforementioned combinatorial optimization problem is formulated as an Ising problem that minimizes the Ising model, If the number of unique coefficient values ​​in the N×N coefficient matrix (J) in the Ising problem is less than or equal to a predetermined number of P (where P is an integer of 2 or more), then the first coefficient, which is one of the P values ​​represented by a predetermined first data type included in the coefficient matrix (J), is encoded into the first identification value among the P identification values ​​represented by a second data type having a smaller data size than the first data type. Instead of the first coefficient, the coefficient information including the first identification value is output to the solver device. The solver device, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. The restoration information represents P restoration values, each corresponding to one of the P identification values, and expressed by the first data type. The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values, The p-th restored value is the p-th value. Information processing methods.

15. A program to make a computer function as a solver device used in an information processing device for solving combinatorial optimization problems, The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The aforementioned information processing device is The aforementioned combinatorial optimization problem is formulated as an Ising problem that minimizes the Ising model, If the number of unique coefficient values ​​in the N×N coefficient matrix (J) in the Ising problem is less than or equal to a predetermined number of P (where P is an integer of 2 or more), then the first coefficient, which is one of the P values ​​represented by a predetermined first data type included in the coefficient matrix (J), is encoded into the first identification value among the P identification values ​​represented by a second data type having a smaller data size than the first data type. Instead of the first coefficient, the coefficient information including the first identification value is output to the solver device. The aforementioned computer, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. The restoration information represents P restoration values, each corresponding to one of the P identification values, and expressed by the first data type. The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values, The p-th restored value is the p-th value. A program that makes it work in that way.

16. Circuit information describing the configuration of a circuit, written in a hardware description language, The aforementioned circuit is made to function as a solver device used by an information processing device that solves combinatorial optimization problems. The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The aforementioned information processing device is The aforementioned combinatorial optimization problem is formulated as an Ising problem that minimizes the Ising model, If the number of unique coefficient values ​​in the N×N coefficient matrix (J) in the Ising problem is less than or equal to a predetermined number of P (where P is an integer of 2 or more), then the first coefficient, which is one of the P values ​​represented by a predetermined first data type included in the coefficient matrix (J), is encoded into the first identification value among the P identification values ​​represented by a second data type having a smaller data size than the first data type. Instead of the first coefficient, the coefficient information including the first identification value is output to the solver device. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. The restoration information represents P restoration values, each corresponding to one of the P identification values, and expressed by the first data type. The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values, The p-th restored value is the p-th value. Circuit information.

17. Circuit information representing the configuration of a circuit, described in a hardware description language, The aforementioned circuit is made to function as a solver device used by an information processing device that solves combinatorial optimization problems. The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned plurality of coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Each of the aforementioned plurality of coefficients is represented by the first data type and belongs to one of the P groups (where P is an integer of 2 or more). The aforementioned restoration information represents P restoration values ​​corresponding to P identification values, The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value is represented by the second data type and identifies the p-th group out of the P groups, The p-th restored value is represented by the first data type and is a value that represents the group of coefficients belonging to the p-th group. The coefficient information includes, in place of the first coefficient among the plurality of coefficients, a first identification value that identifies the group to which the first coefficient belongs among the P groups. The solver apparatus is, A coefficient information memory that stores the coefficient information, A recovery information memory that stores the aforementioned recovery information, A solving circuit that performs the solving process based on the coefficient information stored in the coefficient information memory and the restoration information stored in the restoration information memory, Includes, The solution circuit includes a sum-of-products operation circuit that performs a sum-of-products operation between N first variables corresponding to the N decision variables and N restoration values ​​corresponding to N coefficients among the plurality of coefficients, The aforementioned sum-of-accumulate circuit is Each of the P cumulative addition circuits stores a cumulative value, adds the acquired value to the cumulative value, and resets the cumulative value to 0 before acquiring the N first variables. A demultiplexer circuit that provides each of the N first variables to one of the P cumulative adder circuits, A subsequent circuit performs a sum-of-products operation on the P cumulative values ​​stored in the P cumulative summation circuits and the P restored values ​​represented in the restored information. Includes, Of the P cumulative adder circuits, the p-th cumulative adder circuit (where p is an integer between 1 and P) corresponds to the p-th group. The aforementioned demultiplexer circuit is N identification values ​​to be included in place of the aforementioned N coefficients are obtained from the coefficient information, When the nth first variable (where n is an integer between 1 and N) is obtained from the N first variables, it is given to the cumulative adder circuit among the P cumulative adder circuits that corresponds to the group identified by the nth identification value out of the N identification values. Circuit information.

18. Circuit information written to a reconfigurable semiconductor device in order to operate the said reconfigurable semiconductor device, The aforementioned reconfigurable semiconductor device is made to function as a solver used by an information processing device that solves combinatorial optimization problems. The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The aforementioned information processing device is The aforementioned combinatorial optimization problem is formulated as an Ising problem that minimizes the Ising model, If the number of unique coefficient values ​​in the N×N coefficient matrix (J) in the Ising problem is less than or equal to a predetermined number of P (where P is an integer of 2 or more), then the first coefficient, which is one of the P values ​​represented by a predetermined first data type included in the coefficient matrix (J), is encoded into the first identification value among the P identification values ​​represented by a second data type having a smaller data size than the first data type. Instead of the first coefficient, the coefficient information including the first identification value is output to the solver device. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. The restoration information represents P restoration values, each corresponding to one of the P identification values, and expressed by the first data type. The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value identifies the p-th value among the P values, The p-th restored value is the p-th value. Circuit information.

19. Circuit information written to a reconfigurable semiconductor device in order to operate the reconfigurable semiconductor device, The aforementioned reconfigurable semiconductor device is made to function as a solver used by an information processing device that solves combinatorial optimization problems. The information processing device outputs coefficient information representing the multiple coefficients in a cost function that includes multiple coefficients and N decision variables (where N is an integer of 2 or more). The solver device calculates ground state information representing the values ​​of each of the N decision variables by performing a solution process that minimizes the cost function based on the coefficient information. The first coefficient among the aforementioned plurality of coefficients is represented by a predetermined first data type, The coefficient information includes, in place of the first coefficient, a first identification value represented by a second data type having a smaller data size than the first data type. The solver apparatus is, The system stores recovery information representing a first recovery value corresponding to the first identification value, and the first recovery value is represented by the first data type. When performing an operation on the first coefficient among the plurality of coefficients, the first identification value included in the coefficient information is obtained, and the first restored value corresponding to the first identification value represented by the restored information is used as the first coefficient. Each of the aforementioned plurality of coefficients is represented by the first data type and belongs to one of the P groups (where P is an integer of 2 or more). The aforementioned restoration information represents P restoration values ​​corresponding to P identification values, The p-th restored value among the P restored values ​​(where p is an integer between 1 and P) corresponds to the p-th identification value among the P identification values. The p-th identification value is represented by the second data type and identifies the p-th group out of the P groups, The p-th restored value is represented by the first data type and is a value that represents the group of coefficients belonging to the p-th group. The coefficient information includes, in place of the first coefficient among the plurality of coefficients, a first identification value that identifies the group to which the first coefficient belongs among the P groups. The solver apparatus is, A coefficient information memory that stores the coefficient information, A recovery information memory that stores the aforementioned recovery information, A solving circuit that performs the solving process based on the coefficient information stored in the coefficient information memory and the restoration information stored in the restoration information memory, Includes, The solution circuit includes a sum-of-products operation circuit that performs a sum-of-products operation between N first variables corresponding to the N decision variables and N restoration values ​​corresponding to N coefficients among the plurality of coefficients, The aforementioned sum-of-accumulate circuit is Each of the P cumulative addition circuits stores a cumulative value, adds the acquired value to the cumulative value, and resets the cumulative value to 0 before acquiring the N first variables. A demultiplexer circuit that provides each of the N first variables to one of the P cumulative adder circuits, A subsequent circuit performs a sum-of-products operation on the P cumulative values ​​stored in the P cumulative summation circuits and the P restored values ​​represented in the restored information. Includes, Of the P cumulative adder circuits, the p-th cumulative adder circuit (where p is an integer between 1 and P) corresponds to the p-th group. The aforementioned demultiplexer circuit is N identification values ​​to be included in place of the aforementioned N coefficients are obtained from the coefficient information, When the nth first variable (where n is an integer between 1 and N) is obtained from the N first variables, it is given to the cumulative adder circuit among the P cumulative adder circuits that corresponds to the group identified by the nth identification value out of the N identification values. Circuit information.

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