Relaxation of saddle deformation of substrates using film deposition and edge ion implantation.
Patent Information
- Application Number
- JP2025545064
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2024-02-02
- Filing Date
- 2024-02-06
- Publication Date
- 2026-10-13
- Estimated Expiration
- 2044-02-06
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Figure 0007934051000186 
Figure 0007934051000187 
Figure 0007934051000188
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to semiconductor manufacturing including wafer manufacturing.
BACKGROUND ART
[0002] Modern semiconductor devices such as processing circuits, memory devices, photodetectors, solar cells, and light-emitting semiconductor devices are often fabricated on silicon wafers (or other suitable substrates). A wafer may undergo a number of processing steps, including physical vapor deposition, chemical vapor deposition, etching, photomasking, polishing, and / or various other processes. In ongoing efforts to reduce the cost of semiconductor devices, multilayer stacks of dies, insulating films, patterned and / or doped semiconductor films, and / or other features are often deposited on a single wafer, resulting in, for example, high-aspect-ratio devices used in 3D flash memory devices and other applications. Deposition, patterning, etching, polishing, etc. of the multilayer structure stack often applies significant stress to the underlying wafer. Such stress leads to both out-of-plane strain and in-plane strain of the features supported by the wafer. These strains can cause misalignment of the deposited features and significantly degrade the quality of the manufactured devices.
BRIEF DESCRIPTION OF THE DRAWINGS
[0003] The present disclosure will be more fully understood from the detailed description given below and the accompanying drawings of various embodiments of the present disclosure.
[0004] [Figure 1] Figures 1A to 1E schematically illustrate a stress correction process for a backside deposited film using additional ion implantation according to at least one embodiment. [Figure 2] Figure 2 shows an example of Zernike polynomial decomposition of one actual deformation of a wafer (upper left) in arbitrary units into paraboloidal curvature deformation (upper right), saddle-type deformation (lower left), and residual deformation (lower right), according to at least one embodiment. [Figure 3]Figure 3 shows stress and deformation relaxation in one exemplary wafer using the process disclosed in relation to Figures 1A-E, according to at least one embodiment. [Figure 4] Figure 4 shows one exemplary profile of a Gaussian ion beam that may be used to relieve stress and deformation in a wafer, according to at least one embodiment. [Figure 5] Figure 5 shows an exemplary silicon wafer on which a silicon nitride film having saddle deformation is deposited, according to at least one embodiment. [Figure 6] Figure 6 is a flowchart illustrating an exemplary process for mitigating saddle deformation of a wafer according to at least one embodiment. [Figure 7] Figure 7A shows exemplary wafer saddle stress according to at least one embodiment. Figure 7B shows schematic selection of a target stress compensation film based on the amplitude of the saddle portion of the wafer stress according to at least one embodiment. Figure 7C shows the stress present in the wafer after the stress compensation film has been deposited on the wafer according to at least one embodiment. Figure 7D shows the relaxation of wafer stress caused by edge ion implantation into the stress compensation film. [Figure 8A-C] Figures 8A-8C show exemplary ion implantation methods usable for ion implantation performed to alleviate saddle wafer deformation, according to at least one embodiment. Figure 8A shows arc implantation, according to at least one embodiment, in which a uniform ion implantation dose is applied within a constant, equiwidth edge area of a stress compensation film. Figure 8B shows crescent edge implantation, according to at least one embodiment, in which a uniform ion implantation dose is applied within an edge area whose thickness varies (with respect to the azimuthal angle). Figure 8C shows gradient edge implantation, according to at least one embodiment, in which a non-uniform ion implantation dose is applied within an edge area. [Figure 8D] Figure 8D shows an exemplary custom-shaped ion implant that can be used for ion implantation performed to alleviate saddle wafer deformation, according to at least one embodiment. [Figure 9]Figures 9A-C show several examples of injection support features that can be used to relieve residual stress, according to at least one embodiment. [Figure 10A] Figure 10A schematically shows the response of an exemplary wafer to the dose maps of Figures 9A and 9C according to at least one embodiment. [Figure 10B] Figure 10B schematically shows the exemplary wafer response to the dose maps of Figures 9A and 9C according to at least one embodiment. [Figure 11] Figure 11A schematically shows an ion implantation system capable of performing ion implantation into a stress compensation layer according to at least one embodiment. Figure 11B shows the delivery of ions to a wafer at an arbitrary incidence angle by the ion implantation system of Figure 11A according to at least one embodiment. [Figure 12] Figure 12 shows a block diagram of an exemplary computer system capable of supporting the processes of this disclosure, according to at least one embodiment. [Overview of the project]
[0005] In one embodiment, a method for correcting out-of-plane deformation of a substrate is disclosed, comprising using optical inspection data to obtain a profile of the out-of-plane deformation of the substrate. The method further comprises using the obtained profile to identify one or more parameters that characterize the saddle stress of the substrate. The method further comprises using the identified one or more parameters to calculate one or more features of a stress compensation layer (SCL) for the substrate. The method further comprises depositing the SCL onto the substrate and applying stress relaxation beams to multiple edge regions of the SCL, the settings of which are determined using the identified one or more parameters.
[0006] In another embodiment, a system is disclosed comprising a memory and a processing device communicatively coupled to the memory, the processing device for obtaining a profile of out-of-plane deformation of a substrate using optical inspection data. The processing device further uses the obtained profile to identify one or more parameters characterizing the saddle stress of the substrate. The processing device further uses the identified one or more parameters to calculate one or more features of a stress compensation layer (SCL) for the substrate. The processing device further applies a stress relaxation beam to multiple edge regions of the SCL, the setting of the stress relaxation beam is determined using the identified one or more parameters.
[0007] In another embodiment, a semiconductor manufacturing system is disclosed that includes one or more processing chambers for processing a substrate and a computing device. The computing device uses optical inspection data to obtain a profile of out-of-plane deformation of the substrate and uses the obtained profile to identify one or more parameters that characterize the saddle stress of the substrate. The computing device further uses the identified one or more parameters to calculate one or more features of a stress compensation layer (SCL) for the substrate and applies stress relaxation beams to multiple edge regions of the SCL, the settings of which are determined using the identified one or more parameters.
[0008] In yet another embodiment, a non-temporary computer-readable memory for storing instructions is disclosed, which, when executed by a processing device, causes the processing device to perform a step including identifying one or more parameters characterizing the saddle stress of a substrate using an acquired profile. The step further includes calculating one or more features of a stress compensation layer (SCL) for the substrate using the identified one or more parameters. The step further includes applying a stress relaxation beam to several edge regions of the SCL, the settings of the stress relaxation beam being determined using the identified one or more parameters, and the settings of the ion implantation being determined using the identified one or more parameters. [Modes for carrying out the invention]
[0009] Existing technologies include many methods for addressing wafer deformation. For example, a deformed (warped) wafer with various films and features deposited on one side (referred to herein as the front, top, or main side) can be coated on the opposite side (referred to herein as the back or bottom side) with a film that imparts compressive or tensile stress to the wafer. Such back-side deposited deformation-correcting films, also referred herein as stress-compensating layers, typically impart uniform (or global) stress to the entire wafer and cannot compensate for local stress regulation and / or anisotropic stress. Additional compensation can be achieved by implanting ions into the stress-compensating layer, for example, by using an ion beam that collides with the stress-compensating layer, thereby adjusting the stress in the stress-compensating layer and, as a result, further mitigating the deformation of the underlying wafer.
[0010] As used herein, “wafer” refers to any substrate, or any material surface formed on a substrate, on which a film treatment is performed during a manufacturing process. For example, wafer surfaces on which treatment can be performed include, depending on the application, materials such as silicon, silicon oxide, silicon nitride, strained silicon, silicon-on-insulator, carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. Wafers include, but are not limited to, semiconductor wafers. In some cases, wafers may include plastic substrates. Wafers may be exposed to pretreatment processes for polishing, etching, reduction, oxidation, hydroxylation, annealing, UV curing, electron beam (e-beam) curing, and / or baking of the substrate surface. In addition to direct film treatment on the surface of the wafer itself, any of the disclosed film treatment steps may also be performed on underlying layers formed on the wafer, which are disclosed in more detail below. The term “wafer surface” is intended to include such underlying layers, as the context indicates. Therefore, for example, if a film / layer or partial film / layer is deposited on the wafer surface, the exposed surface of the newly deposited film / layer becomes the wafer surface. In some embodiments, the wafer has a thickness in the range of 0.25 mm to 1.5 mm, or in the range of 0.5 mm to 1.25 mm, or in the range of 0.75 mm to 1.0 mm, or greater. In some embodiments, the wafer has a diameter of about 10 cm, 20 cm, 30 cm, or greater.
[0011] The deposition of stress compensation layers by ion implantation results in uniform and isotropic stress. It may be very efficient to correct TIFF0007934051000001.tif4170. On the other hand, wafer Position on TIFF0007934051000002.tif6170 TIFF0007934051000003.tif4170, Anisotropic stress Relieving stresses that vary by TIFF0007934051000004.tif5170 or both is a much more difficult problem. Certain feature patterns are in one direction, for example Compressed along TIFF0007934051000005.tif5170, perpendicular direction This generates tensile stress along TIFF0007934051000006.tif5170, which can result in the formation of a saddle-shaped wafer, for example, as shown in Figure 5. Such saddle-shaped features can occur, for example, in stacks of materials with directional patterning, such as in the patterning of word lines in flash memory devices. Correcting such anisotropic saddle deformation in wafers remains a challenging task.
[0012] Aspects and embodiments of this disclosure address such and other challenges in current semiconductor manufacturing technologies by providing systems and techniques capable of alleviating non-uniform and / or anisotropic stress and deformation of wafers. In some embodiments, the method for alleviating saddle deformation involves the principal axis (direction) and the magnitude of the saddle deformation, for example, This may involve identifying TIFF0007934051000007.tif6170 and identifying the properties of a stress compensation film (layer) that can cause the stress within the wafer to have a clear sign (e.g., positive or negative stress across the entire wafer). This changes the wafer deformation from saddle-shaped to cylindrical. The method may further include depositing a film having the identified properties and then relaxing the high-stress regions of the wafer by ion implantation into the edges of such regions of the film. Residual higher-order (ripple) deformation can then be addressed by further ion implantation into areas of the film.
[0013] In one embodiment, the vertical profile of wafer deformation is measured using optical measurement techniques. TIFF0007934051000008.tif5170 is created. For example, profile TIFF0007934051000009.tif5170 interference can be obtained using optical interferometry measurements. Then, through several parameters that qualitatively and quantitatively characterize the geometry and dimensions of wafer deformation, the wafer profile TIFF0007934051000010.tif5170 can be represented. In some embodiments, a set of Zernike (or a similar set of) polynomials may be used to represent the wafer profile, TIFF0007934051000011.tif11170 where TIFF0007934051000012.tif3170 is the radial coordinate in the (mean) plane of the wafer, and TIFF0007934051000013.tif5170 is the polar angle coordinate. Consecutive coefficients TIFF0007934051000014.tif5170... represent the weights of specific geometric features (element deformations) of the wafer described by the corresponding Zernike polynomials TIFF0007934051000015.tif5170…. (Here, the Noll notation for Zernike polynomials is used.) The first three coefficients are associated with the uniform shift of the wafer ( TIFF0007934051000016.tif5170 the coefficient associated with the polynomial TIFF0007934051000017.tif4170), TIFF0007934051000018.tif4170 the deformation-free rotation about the axis corresponding to tilt TIFF0007934051000019.tif3170( TIFF0007934051000020.tif5170 the coefficient associated with the polynomial TIFF0007934051000021.tif4170), and the deformation-free rotation about the axis that can be eliminated by realignment of the coordinate axes TIFF0007934051000022.tif3170 corresponding to tilt TIFF0007934051000023.tif3170( TIFF0007934051000024.tif5170 Coefficients attached to polynomials Since we will be explaining TIFF0007934051000025.tif5170), its importance is low. The fourth coefficient TIFF0007934051000026.tif4170 is, Associated with TIFF0007934051000027.tif5170, it characterizes isotropic parabolic deformation ("curvature"). Fifth TIFF0007934051000028.tif5170 and the 6th one The coefficients for TIFF0007934051000029.tif5170 are, TIFF0007934051000030.tif6170 Polynomial and TIFF0007934051000031.tif6170 is associated with a polynomial and characterizes the saddle deformation. The coefficient for TIFF0007934051000032.tif5170 is the diagonal. According to TIFF0007934051000033.tif4170, above ( TIFF0007934051000034.tif5170) or below ( (TIFF0007934051000035.tif5170) curved diagonally According to TIFF0007934051000036.tif4170, go below ( TIFF0007934051000037.tif5170) or above ( It is characterized by a curved, saddle-like shape (TIFF0007934051000038.tif5170). The coefficient for TIFF0007934051000039.tif5170 is, TIFF0007934051000040.tif3170 Along the axis upward ( TIFF0007934051000041.tif5170) or below ( It is curved as shown in TIFF0007934051000042.tif5170. TIFF0007934051000043.tif4170 Along the axis downwards ( TIFF0007934051000044.tif5170) or above ( Characterized by a curved saddle shape (TIFF0007934051000045.tif5170). Higher coefficient TIFF0007934051000046.tif5170, Examples such as TIFF0007934051000047.tif5170 show wafer deformation along the radial direction, azimuthal direction, or both. Characterizing the gradually accelerating fluctuations of TIFF0007934051000048.tif5170, and collective residual deformation This represents TIFF0007934051000049.tif6170. Figure 2 shows one actual deformation of a wafer according to at least one embodiment. TIFF0007934051000050.tif5170 (top left) can be deformed into a parabolic curve in any unit. TIFF0007934051000051.tif5170 (upper right), saddle-shaped deformation TIFF0007934051000052.tif5170 (bottom left), and residual deformation An example of a Zernike polynomial decomposition of 200 is shown in TIFF0007934051000053.tif5170 (bottom right).
[0014] In some embodiments, the thickness of the stress compensation film The selection of TIFF0007934051000054.tif4170 is the parabolic curvature coefficient. This can be done based on the value of TIFF0007934051000055.tif4170. Figures 1A-E schematically show a stress correction process for a back-side deposited film using additional ion implantation according to at least one embodiment. Figure 1A depicts a wafer 102 having deformation, which includes parabolic curvature deformation (negative coefficient). Other deformations may include TIFF0007934051000056.tif5170) and other deformations, such as saddle deformation and residual deformation (neither of which are shown in Figures 1A-E for brevity and clarity). The wafer 102 has a front side 104 and a back side 106. The front side 104 can have any number of features (e.g., deposition patterns and / or etching patterns), dies, photomasks, and / or any other structures deposited or etched onto it. In some embodiments, the back side 106 may be free of deposited / etched features / structures. In some embodiments, the back side 106 may have one or more deposited / etched features / structures. Figure 1B shows a schematic deposition of a stress compensation layer on the back side of the wafer 102. In some embodiments, the stress compensation layer 108 may include one or more films of different materials. Individual films may have thicknesses ranging from 10 nm to 200 nm, or from 20 nm to 180 nm, or from 30 nm to 160 nm, or from 40 nm to 140 nm, or greater. The total thickness of the stress compensation layer may be at most a few microns, or greater. In some embodiments, the stress compensation layer 108 is deposited at a temperature ranging from 100°C to 500°C, or higher.
[0015] The material (type) of the stress compensation layer 108 is, coefficient You can select based on the sign of TIFF0007934051000057.tif4170. For example, negative curvature. In the case of TIFF0007934051000058.tif5170, the stress compensation layer 108 can be selected to have tensile stress (illustrated in Figures 1A-E). In the case of a silicon wafer, such a film can be a silicon nitride (Si3N4) film. Conversely, positive curvature In the case of TIFF0007934051000059.tif5170, the stress compensation layer 108 may be selected to have tensile stress (not shown in Figures 1A-E). The stress compensation layer 108 can be deposited using any suitable deposition technique, including physical vapor deposition (e.g., sputtering), chemical vapor deposition (e.g., plasma-assisted deposition), epitaxy, and / or delamination. Deposition can be carried out at room temperature or at a temperature different from room temperature (e.g., high temperature). In some embodiments, the thickness of the stress compensation layer 108 TIFF0007934051000060.tif4170 can be selected to correct deformation to some extent, for example, as shown in Figure 1C, where negative parabolic curvature becomes positive parabolic curvature. Thickness-dependent parabolic curvature correction According to TIFF0007934051000061.tif5170, wafer deformation From TIFF0007934051000062.tif5170 It changes to TIFF0007934051000063.tif5170: TIFF0007934051000064.tif5170
[0016] Overcompensation is selected in conjunction with the injection type, energy, and dose to ensure the maximum compensation effect from stress compensation. Overcompensation allows the composite structure of wafer 102 and stress compensation layer 108 to further control stress (and consequently wafer deformation). It becomes susceptible to the effects of TIFF0007934051000065.tif5170). As shown in Figure 1D, the ion beam implanter 110 can generate an ion beam 112 that collides with the stress compensation layer 108 and deposits ions therein. The ion beam 112 can carry silicon ions, phosphorus ions, argon ions, neon ions, xenon ions, and / or krypton ions, etc. In some embodiments, the energy and type of ions in the ion beam 112 can be selected so as to limit the implanted ions to the volume of the stress compensation layer 108 without allowing the ions to reach the wafer 102. Ions present in the stress compensation layer 108 create substitution defects within it. In addition, the ions leave a trail of vacancy defects along their propagation path within the stress compensation layer 108. The substitution defects and / or vacancies can correct (e.g., reduce) the stress in the stress compensation layer 108 and reduce the degree of stress overcorrection caused by film deposition. This flattens the combination of the wafer 102 and the stress compensation layer 108.
[0017] Specifically, the stress relaxation beam used to correct stresses within the stress compensation layer 108 is referred to as an ion beam (e.g., ion beam 112) throughout this disclosure, but the stress relaxation beam may include other material particles (e.g., electrons), electromagnetic waves (e.g., UV light, visible light, infrared light, etc.), and / or appropriate combinations thereof. The stress relaxation beam collides with the stress compensation layer 108 and alters the coupling network of the stress compensation layer 108. For example, a low-energy stress relaxation beam may interact with surface atoms of the stress compensation layer 108, for example, removing some of the surface atoms and effectively performing etching of the surface region of the stress compensation layer 108. The effectiveness of such etching can be controlled by the selection of ion species / radicals / ambient gas. In another example, a high-energy stress relaxation beam may deposit ions inside the stress compensation layer 108. Ions and / or photons can break the bonds in the coupling network (or crystal lattice) of the stress compensation layer 108, forming vacancies inside, which can further induce annealing by local heating, UV curing, and / or other effects.
[0018] In some embodiments, the small area of the wafer Number of ions deposited per TIFF0007934051000066.tif5170 TIFF0007934051000067.tif5170 is a parabolic curvature deformation overcorrected by saddle deformation, residual deformation, and the deposition of stress compensation layer 108. Corrected deformation that may include parts of TIFF0007934051000068.tif5170 The desired local density of ions can be determined using simulations based on local values of TIFF0007934051000069.tif5170 (as described in more detail below). TIFF0007934051000070.tif5170 is the scanning speed of ion beam 112. It can be supplied by controlling TIFF0007934051000071.tif3170. In some embodiments, the ion beam 112 has a profile that can be approximated by a Gaussian function, for example, ion flux The filename is TIFF0007934051000072.tif5170. TIFF0007934051000073.tif3170 and TIFF0007934051000074.tif4170 is in Cartesian coordinates, TIFF0007934051000075.tif5170 is the maximum ion flux at the center of the beam. TIFF0007934051000076.tif3170 and TIFF0007934051000077.tif4170 consists of the following: TIFF0007934051000078.tif3170 axis and TIFF0007934051000079.tif4170 This is a characteristic beam spread along the axis. Correspondingly, the distance from the beam center path is The point located at TIFF0007934051000080.tif4170 receives an ionic dose containing the following number of ions: TIFF0007934051000081.tif13170 In response to this, scan speed By reducing TIFF0007934051000082.tif3170, the number of ions received by various regions of the stress compensation layer 108 can be increased, and vice versa. In addition, the ion beam 112 is different factors that can be averaged to the target dose at various points in the stress compensation layer 108. To receive multiple ion doses from TIFF0007934051000083.tif5170, use different offsets. Multiple scans can be performed with TIFF0007934051000084.tif4170. For example, each scan can be performed from the center of ion beam 112 to an area. Different distances to TIFF0007934051000085.tif5170 In TIFF0007934051000086.tif4170, the ion beam implanter 110 operates at each speed After passing through TIFF0007934051000087.tif4170 n times, the total ion dose received by this area is as follows: As shown in Figure 1E, the injection layer 114 formed as part of the stress compensation layer 108 results in a significant reduction in the deformation of the wafer 102, particularly its saddle-shaped and residual portions.
[0019] Figure 3 shows stress and deformation relaxation 300 in one exemplary wafer using the process disclosed in relation to Figures 1A-E, according to at least one embodiment. As shown in Figure 3, the maximum negative deformation A 30cm silicon wafer 102 having TIFF0007934051000089.tif5170 was first used with a silicon nitride tensile stress compensation layer 108. The maximum deformation of TIFF0007934051000090.tif5170 is overcorrected. Then, the stress in the stress compensation layer 108 is reduced by the formation of the injection layer 114 using an ion beam, and the final maximum deformation is The filename is TIFF0007934051000091.tif5170. Figure 4 shows one exemplary profile 400 of a Gauss ion beam 112 that can be used to relieve stress and deformation in a wafer according to at least one embodiment.
[0020] The techniques for mitigating strain and deformation shown in Figures 1-3 involve stress tensor components. TIFF0007934051000092.tif4170 and The method can also be applied to wafers with complex deformations such that TIFF0007934051000093.tif4170 has different signs, causing saddle-shaped deformation in the wafer. Figure 5 shows an exemplary wafer 500 with saddle-shaped deformation (e.g., a silicon wafer with a silicon nitride film deposited on top) according to at least one embodiment. Cross section As can be seen in Figure 502 of TIFF0007934051000094.tif3170, stress components TIFF0007934051000095.tif4170 can be lower on the wafer (top layer) than on the film deposited on the back side of the wafer (bottom layer). Conversely, the cross-section As shown in Figure 504 of TIFF0007934051000096.tif4170, the stress components TIFF0007934051000097.tif4170 may be higher in the wafer than in the film. In some embodiments, the stress state in the wafer can be represented by a position-dependent stress tensor, which can be approximated by the following equation: TIFF0007934051000098.tif15170 The wafer is typically in a purely bent state and is independent of shear stress, which is represented by the off-diagonal terms of the stress tensor; therefore, this structure of the stress tensor is usually a good approximation. Correction for the saddle shape requires special handling in the calculation and optimization of the dose map to ensure that no additional residual terms are introduced into the wafer as a result.
[0021] Figure 6 is a flowchart illustrating an exemplary process 600 for mitigating saddle deformation of a wafer, according to at least one embodiment. Process 600 can be carried out using a semiconductor manufacturing system that includes one or more processing chambers, for example, one or more deposition chambers, one or more plasma chambers, one or more etching chambers, one or more polishing chambers, one or more film removal chambers, one or more beam irradiation chambers, and / or one or more optical inspection chambers. The processing chambers can be connected to one or more transfer chambers that can be equipped with one or more robots for handling wafers, for example, for loading and unloading wafers into and out of the processing chambers. The transfer chambers can further be connected to load lock chambers (front-end interfaces) that can be connected to one or more FOUP (Front Opening Unified Pod) carriers that hold bare wafers, processed wafers, and / or partially processed wafers. Any, some, or all of the steps of process 600, carried out by the semiconductor manufacturing system, can be carried out in response to instructions issued by a suitable computing device having memory for storing processing logic and instructions.
[0022] In block 610, process 600 determines the shape of the wafer, for example, the displacement of the wafer surface (e.g., the top surface), using several in-plane coordinates (e.g., polar coordinates). TIFF0007934051000099.tif5170, Cartesian coordinates This includes measuring as a function of TIFF0007934051000100.tif5170, or any other suitable coordinates. In block 620, process 600 decomposes the determined shape into a suitable set of polynomials, e.g., Zernike polynomials, and sets of polynomial expansion coefficients. This includes obtaining TIFF0007934051000101.tif6170, where each coefficient in the set characterizes the degree of presence of the geometric shape of a particular element in the deformation of the wafer.
[0023] In block 630, coefficient Using the deformation represented via TIFF0007934051000102.tif6170, the stress tensor The saddle-shaped portion of TIFF0007934051000103.tif4170 can be determined. The saddle-shaped portion is This refers to a portion of the stress tensor proportional to TIFF0007934051000104.tif5170, and the orientation of the saddle shape relative to the coordinate axes is phase This is defined by TIFF0007934051000105.tif3170. For the sake of brevity, without compromising generality, Let's assume the filename is TIFF0007934051000106.tif4170 (which can be achieved by a simple rotation of the coordinate system).
[0024] Process 600 is, Based on the deformation represented by TIFF0007934051000107.tif6170, the wafer edge Hoop stress of wafer in TIFF0007934051000108.tif4170 Amplitude of TIFF0007934051000109.tif5170 This may include determining TIFF0007934051000110.tif4170. Such a determination can be made based on elastic properties (e.g., Young's modulus, Poisson's ratio, etc., of the wafer). Figure 7A shows the saddle stress of an exemplary wafer according to at least one embodiment. This shows TIFF0007934051000111.tif5170. It represents the amplitude of the saddle-shaped portion of the stress. TIFF0007934051000112.tif4170 can be used in block 640 of Figure 6 to specify the characteristics (e.g., material and thickness) of the target stress compensation film to be deposited on the wafer. The film can be selected so that the stress tensor in the new wafer + film structure has a clear sign (e.g., (TIFF0007934051000113.tif5170). This is advantageous because ion implantation can reduce the amount of stress in the membrane, but it may be more difficult to reverse the sign of the tension in the membrane using ions. Figure 7B shows the determined amplitude according to at least one embodiment. This shows a schematic selection of target stress compensation films based on TIFF0007934051000114.tif4170. In some embodiments, the film thickness is determined by uniform (or nearly uniform) stress It may be selected (calculated, simulated, etc.) to induce uniform (parabolic) deformation within the wafer corresponding to TIFF0007934051000115.tif4170. In block 650 of Figure 6, process 600 may include depositing a film of selected material and thickness onto the wafer. Figure 7C shows the stress present in the wafer after the stress-compensating film has been deposited on the wafer, according to at least one embodiment. As shown in Figure 7C, the stress imparted by the film Due to the uniform downward shift caused by TIFF0007934051000116.tif4170, the wafer is shifted to areas of low stress (for example, in this example, at an angle). TIFF0007934051000117.tif5170 and (Near TIFF0007934051000118.tif5170) and areas of high stress (for example, in this example, angle TIFF0007934051000119.tif5170 and It has neighbors to TIFF0007934051000120.tif5170.
[0025] A wafer with a film deposited on top, having the stress shown in Figure 7C, TIFF0007934051000121.tif4170 and TIFF0007934051000122.tif5170 (and / or other selections of coordinate systems, and correspondingly, phase and For TIFF0007934051000123.tif3170 It has a cylindrical deformation that can be characterized by the following combinations of TIFF0007934051000124.tif5170), which, in this specification, is a cylindrical polynomial that is equal to the following (maximum and uniform) shift: Called TIFF0007934051000125.tif5170: TIFF0007934051000126.tif10170 first term TIFF0007934051000127.tif5170 corresponds to the stress of the wafer itself (see Figure 7A), and the second item TIFF0007934051000128.tif5170 corresponds to appropriately selected film-induced uniform stress (see Figure 7B).
[0026] In block 660 of Figure 6, for example, the amplitude determined in block 640 Based on TIFF0007934051000129.tif4170, the dose for edge ion implantation can be calculated. Edge ion implantation performed on a stress-compensating film relieves stress within the film, and consequently within the wafer, as shown in Figure 7D. Specifically, edge ion implantation significantly reduces the magnitude of hoop stress, which can be expressed as follows: TIFF0007934051000130.tif6170 Here, residual hoop stress TIFF0007934051000131.tif4170 is a small value.
[0027] Figures 8A–D show exemplary ion implantation methods usable for ion implantation performed to alleviate saddle wafer deformation, according to at least one embodiment. Figure 8A shows arc implantation 802, according to at least one embodiment, in which a uniform ion implantation dose is applied within a constant, equiwidth edge area of a stress compensation film. For example, constant density The ions in TIFF0007934051000132.tif4170 (for example, defined as the product of the ion flux supplied by the ion beam and the beam exposure time) are width TIFF0007934051000133.tif4170 and angle It can be deposited within the segment TIFF0007934051000134.tif5170: TIFF0007934051000135.tif6170 Here, TIFF0007934051000136.tif5170 is Heaviside's step function. In some embodiments, the angle TIFF0007934051000137.tif5170 is, TIFF0007934051000138.tif4170 or approximately TIFF0007934051000139.tif4170 degrees. In some embodiments, the angle TIFF0007934051000140.tif5170 is, Is it smaller than TIFF0007934051000141.tif4170 (for example, TIFF0007934051000142.tif4170, and (e.g., TIFF0007934051000143.tif4170) or Larger than TIFF0007934051000144.tif4170 (for example, TIFF0007934051000145.tif4170, and (e.g., TIFF0007934051000146.tif4170). In some embodiments, the width of edge injection is TIFF0007934051000147.tif4 can be within 170 mm. In some embodiments, the edge injection width can be less than 1 mm or more than 10 mm. In some embodiments, the edge injection width can be 10% or less of the wafer diameter, or other percentages of the diameter (e.g., 5%, 20%, etc.).
[0028] Figure 8B shows (angle (TIFF0007934051000148.tif5170) shows a crescent-shaped edge implantation 804 in which a uniform ion implantation dose is applied within an edge area with varying thickness, for example as follows: TIFF0007934051000149.tif6170 thickness TIFF0007934051000150.tif5170 is TIFF0007934051000151.tif5170 is the largest, and the line TIFF0007934051000152.tif5170 and TIFF0007934051000153.tif5170 may disappear along the line (or any other line). In some embodiments, the inner boundary of the crescent-shaped injection 804 may be parallel to the horizontal axis in Figure 8B (e.g., the dashed boundary 805 shown by the dashed line), for example as follows: TIFF0007934051000154.tif5170
[0029] Figure 8C shows a gradient edge implantation 806 in which a non-uniform ion implantation dose is applied within the edge area, according to at least one embodiment. In some embodiments, the ion implantation density is applied over the radial distance within the implantation area. TIFF0007934051000155.tif3170 can be changed linearly (or according to some nonlinear dependency), for example, TIFF0007934051000156.tif4170 and In TIFF0007934051000157.tif5170, the following is true: TIFF0007934051000158.tif9170 (otherwise it is zero). In this example, the ion implantation density is In TIFF0007934051000159.tif4170 From TIFF0007934051000160.tif4170 In TIFF0007934051000161.tif4170 It changes (e.g., increases) up to TIFF0007934051000162.tif4170. In some embodiments, the ion implantation density is the vertical distance from the center of the wafer ( It can be modified using TIFF0007934051000163.tif5170), for example as follows: TIFF0007934051000164.tif11170
[0030] In some embodiments, (azimuth angle) (In TIFF0007934051000165.tif5170) the non-uniform ion implantation dose is, for example, As a piecewise linear function of TIFF0007934051000166.tif5170, it can be applied to the film: TIFF0007934051000167.tif23170
[0031] In some embodiments, (azimuth angle) (According to TIFF0007934051000168.tif5170) A smoothly changing ion implantation dose can be applied to the membrane non-uniformly, for example, according to the following piecewise linear function: TIFF0007934051000169.tif14170
[0032] Ion implantation doses that follow a number of other functions can be used, for example, a function that changes smoothly with both radial distance and azimuth angle.
[0033] Figure 8D shows a custom shape ion implantation according to at least one embodiment. For example, the custom shape implantation may include any of the implantations (or similar implantations) referenced in conjunction with Figures 8A-C. In a non-limiting example, the custom shape implantation may include a crescent implantation 808 and one or more longitudinal implantations, e.g., implantation 810. The crescent implantation 808 and the longitudinal implantation 810 may have different ion implantation densities; for example, the crescent implantation 808 may have a higher ion implantation density compared to the longitudinal implantation 810. The longitudinal implantation 810 can be used to prevent (or reduce) the formation of ripples and / or other bulk deformations that may be caused by edge implantation.
[0034] In block 670 of Figure 6, ion implantation is performed using one of the ion implantation doses illustrated in Figures 8A-D (or any other similar doses), as illustrated in the following disclosure in conjunction with Figures 11A-B. Following ion implantation into the film, process 600 can proceed to block 680 to perform new measurements of the wafer shape to evaluate the residual stress remaining in the wafer after implantation. For several reasons, the implanted wafer may still exhibit some stress and deformation. In particular, edge implantation can relieve stress around the outer edge of the wafer (hoop stress), but some residual stress (also referred to herein as higher-order stress) may still remain in the wafer bulk, causing fluctuations (ripples) in the wafer profile. In addition, the thickness of the stress compensation film typically has a non-uniform radial profile near the edge, gradually thinning as it approaches the wafer edge, for example, about 300 nm at a distance of 7-10 mm from the edge compared to about 150 nm on the edge (as an illustrative example). Such radial inhomogeneity can further increase the amount of ripple.
[0035] Referring again to Figure 6, in order to reduce ripple and other residual deformations and stresses within the wafer, process 600 may select one of the additional injection support features in block 690. Figures 9A–C show some examples of injection support features that can be used to relieve residual stress, according to at least one embodiment. Figure 9A schematically shows an exemplary “elliptical” dose map 900, which has bright areas 904 indicating areas of wafer 902 that receive ions (or receive higher doses of ions) and dark areas 906 of wafer 902 that do not receive ions (or receive lower doses of ions). Similarly, Figure 9B schematically shows an exemplary “hourglass” dose map 910. Figure 9C schematically shows an exemplary “butterfly” dose map 920.
[0036] The selection process performed by block 690 in Figure 6 may include various injection support features 910-930 (and many other features). In one non-exclusive exemplary embodiment, each injection support feature is a mask that identifies the area to be implanted with ions. It can be encoded (and stored in computer memory) as TIFF0007934051000170.tif6170 (where index j enumerates various defined masks). In some embodiments, the mask TIFF0007934051000171.tif6170 can be a two-component file, for example, point If TIFF0007934051000172.tif5170 belongs to one of the bright regions 904 intended to receive ions TIFF0007934051000173.tif5170, and point If TIFF0007934051000174.tif5170 belongs to one of the dark regions 906 that are not intended to receive ions This is TIFF0007934051000175.tif5170. The residual stress measured (or estimated from the measurement of residual deformation of the wafer) in step 680. TIFF0007934051000176.tif5170 can be compared to available masks by calculating a set of overlap coefficients (or any other suitable similarity value) that represent the similarity between the residual stress and the mask of each injection support feature (a negative sign is used when the residual stress is negative, as shown in Figure 7D, for example): TIFF0007934051000177.tif9170 Here, the integral (or the corresponding discrete two-dimensional sum) covers the entire area of the circle. Highest overlap An injection support feature having TIFF0007934051000178.tif5170 (or one of several with the highest overlap) may be selected for application to a stress compensation film on the wafer. Then the ion beam density is You can select based on the size of TIFF0007934051000179.tif5170, for example, It can be assumed to be proportional to TIFF0007934051000180.tif5170, calculated using Monte Carlo simulation, or selected by other appropriate techniques. In some embodiments, a mask TIFF0007934051000181.tif5170 is, This can be a continuous function of TIFF0007934051000182.tif4170.
[0037] In block 695, the selected injection support features can be applied to the stress compensation film, for example, as disclosed below in relation to Figures 11A-B. Blocks 680-695 of process 600 can be repeated iteratively until the stress or deformation of the wafer is reduced to below the target tolerance, as indicated by the dashed arrows in Figure 6.
[0038] Figure 10A schematically shows the exemplary wafer response 1000 to an “elliptical” dose map 900 that may be used in process 600 of Figure 6, according to at least one embodiment. The response 1000 is calculated for an undeformed reference wafer on which a reference film is deposited. The deformation of the wafer after ion implantation is shown in a two-dimensional (2D) heat map 1002 and a three-dimensional (3D) map 1004. The 2D heat maps 1006, 1008 and the 3D maps 1008, 1010 show the decomposition of the wafer deformation into a secondary portion (2D map 1006 and 3D map 1008) including parabolic and saddle deformation, and a residual portion (2D map 1010 and 3D map 1012). Figure 10B schematically shows the exemplary wafer response 1001 to a “butterfly” dose map 920 that may be used in process 600 of Figure 6, according to at least one embodiment.
[0039] Figure 11A schematically shows an ion implantation system 1100 capable of performing ion implantation into a stress compensation layer according to at least one embodiment. The ion implantation system 1100 may be or may include the ion beam implanter 110 of Figure 1. Specifically, the stress relaxation beam used to correct stress in the stress compensation layer 108 is called an ion beam (e.g., ion beam 112) in some embodiments, but the stress relaxation beam may include other material particles (e.g., electrons), electromagnetic waves (e.g., UV light, visible light, infrared light, etc.), and / or appropriate combinations thereof. The ion implantation system 1100 may include an ion source 1102 for generating an ion beam 1104. The ion source 1102 may include a chamber (e.g., a plasma chamber) for generating ions. The ion source 1102 may be powered by a power supply 1106 and may include an extraction electrode assembly (not shown). The ion implantation system 1100 may include a mass spectrometer 1108 and a collimating and focusing column 1110. The collimating and focusing column 1110 can direct the ion beam 112 onto the wafer 102. The wafer 102 can be supported by a support stage 1112. In some embodiments, the support stage 1112 and the wafer 102 may remain stationary during scanning of the wafer 102 by the ion beam 112, but the components of the ion implantation system 1100 can be repositioned relative to the wafer 102. In some embodiments, the ion implantation system 1100 may remain stationary, but the support stage 1112 can reposition the wafer 102. Scanning by the ion beam 112 may occur along multiple directions according to any suitable predetermined pattern, for example, TIFF0007934051000183.tif3170 along the axis and TIFF0007934051000184.tif4170 Along the axis, for example, TIFF0007934051000185.tif3170 This can be done in a forward and backward motion along the axis, and in a helical pattern, etc. In various embodiments, the ion beam 112 can be scanned at frequencies of several Hz, tens of Hz, hundreds of Hz, thousands of Hz, or higher.
[0040] The operation of the ion implantation system 1100 can be controlled by a controller 1114, which may include any suitable computing device having a processor, such as a central processing unit (CPU), a field-programmable gate array (FPGA), and / or an application-specific integrated circuit (ASIC), a microcontroller, or other processing device, as well as memory devices, such as random-access memory (RAM), read-only memory (ROM), and / or flash memory, or any combination thereof. The controller 1114 can control the operation of the power supply 1106, the support stage 1112, and / or various other components and modules of the ion implantation system 1100. The controller 1114 may include an ion beam simulation module 1116 that can perform simulations to determine the target intensity of the ion beam 112 used to mitigate various wafer deformations. In some embodiments, the support stage 1112 may be tilted, for example, in one or two spatial directions relative to the wafer 102, in order to change the angle of incidence of the ion beam 112 to the wafer 102. In some embodiments, instead of tilting the wafer 102, the controller 1114 can tilt the ion implantation system 1100 relative to the wafer 102. In some embodiments, for example as shown in Figure 11B, the support stage 1112 can be tilted in one or two spatial directions relative to the wafer 102 to change the angle of incidence of the ion beam 112 to the wafer 102. In some embodiments, instead of tilting the wafer 102, the controller 1114 can tilt the ion implantation system 1100 relative to the wafer 102.
[0041] Figure 12 shows a block diagram of an exemplary computer system 1200 capable of supporting the operations of the present disclosure according to at least one embodiment. In various embodiments, the exemplary computer system 1200 may be or include the controller 1114 of Figure 11. The computer system 1200 may be connected to other computer systems in a local area network (LAN), intranet, extranet, and / or internet. The computer system 1200 may operate within the capacity of a server in a client-server network environment. The computer system 1200 may be a personal computer (PC), a set-top box (STB), a server, a network router, a switch or bridge, or any device capable of executing a set of instructions (sequential or otherwise) that specifies the operations to be performed by the device. Furthermore, although only a single exemplary computer system is shown, the term “computer” should also be understood to include any collection of computers that individually or collectively execute a set of instructions (or sets of instructions) to perform one or more of the methods described herein.
[0042] An exemplary computer system 1200 may include processing devices 1202 (also called processors or CPUs), main memory 1204 (e.g., read-only memory (ROM), flash memory, synchronous DRAM (SDRAM), and other dynamic random access memory (DRAM), static memory 1206 (e.g., flash memory, static random access memory (SRAM), etc.), and auxiliary memory (e.g., data storage device 1218), all of which can communicate with each other via a bus 1230.
[0043] The processing device 1202 represents one or more general-purpose processing devices, such as a microprocessor or a central processing unit. The processing device 1202 may include processing logic 1226. The processing device 1202 may be a composite instruction set arithmetic (CISC) microprocessor, a reduced instruction set arithmetic (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing another instruction set, or a processor implementing a combination of instruction sets. The processing device 1202 may also be one or more special-purpose processing devices, such as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), or a network processor. According to one or more aspects of this disclosure, the processing device 1202 may be configured to execute instructions that implement an exemplary process 600 for mitigating saddle deformation of a wafer.
[0044] The exemplary computer system 1200 may further include a network interface device 1208 that can be communicatively connected to a network 1220. The exemplary computer system 1200 may further include a video display 1210 (e.g., a liquid crystal display (LCD), a touchscreen, or a cathode ray tube (CRT)), an alphanumeric input device 1212 (e.g., a keyboard), a cursor control device 1214 (e.g., a mouse), and an acoustic signal generator 1216 (e.g., a speaker).
[0045] The data storage device 1218 may include a computer-readable storage medium (or more specifically, a non-temporary computer-readable storage medium) 1224 storing one or more sets of executable instructions 1222. According to one or more aspects of the present disclosure, the executable instructions 1222 may include executable instructions that implement an exemplary process 600 for mitigating saddle deformation of a wafer.
[0046] The execution instruction 1222 may also reside in main memory 1204 and / or processing device 1202 while being executed, whole or at least partially, by the exemplary computer system 1200, the main memory 1204 and processing device 1202 also constitute a computer-readable storage medium. The execution instruction 1222 may further be transmitted or received over a network via network interface device 1208.
[0047] Although Figure 12 shows the computer-readable storage medium 1224 as a single medium, the term “computer-readable storage medium” should be interpreted to include a single medium or multiple mediums that store one or more sets of operational instructions (e.g., a centralized or distributed database, and / or associated caches and servers). The term “computer-readable storage medium” should also be interpreted to include any medium capable of storing or encoding a set of instructions executed by a machine, which causes the machine to perform any one or more of the methods described herein. Therefore, the term “computer-readable storage medium” should be interpreted to include, but not be limited to, solid memory and optical and magnetic media.
[0048] Parts of the detailed description above are presented in terms of algorithms and symbolism of operations on data bits in computer memory. The description and representation of these algorithms are means used by those skilled in the field of data processing to most effectively convey the content of the invention to others skilled in the art. Herein, and generally, an algorithm is considered a set of self-consistent steps that lead to a desired result. These steps are steps that require the physical handling of quantities. These quantities are usually, though not always, in the form of electrical or magnetic signals that can be stored, transferred, combined, compared, and otherwise manipulated. It has proven that referring to these signals as bits, values, elements, symbols, characters, terms, or digits, etc., can be convenient, primarily for reasons of common use.
[0049] However, it should be noted that all these terms and similar terms should be associated with appropriate quantities and are merely convenient symbols applied to those quantities. As will be clear from the following explanation, unless otherwise stated, explanations throughout this document using terms such as “identifying,” “determining,” “storing,” “adjusting,” “causing,” “returning,” “comparing,” “creating,” “stopping,” “loading,” “copying,” “throwing,” “replacing,” or “performing” should be understood to refer to the operation and processes of a computer system or similar electronic computing device. Such a computer system or similar electronic computing device manipulates data represented as physical (electronic) quantities in the computer system’s registers and memory and converts it into other data represented as physical (electrical) quantities in the computer system’s memory or registers or in such other information storage, transmission, or display devices.
[0050] The embodiments of this disclosure also relate to apparatus for carrying out the methods described herein. This apparatus may be specifically constructed for a required purpose, or it may be a general-purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program may be stored in computer-readable storage media, such as any type of disk, including, but not limited to, optical disks, CD-ROMs, and magneto-optical disks, each connected to a computer system bus, read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic disk storage media, optical storage media, flash memory devices, other types of machine-accessible storage media, or any type of medium suitable for storing electronic instructions.
[0051] The methods and displays presented herein are not inherently related to any particular computer or other device. Various general-purpose systems may be used with the programs according to the teachings herein, or it may be convenient to construct more specialized devices to carry out the required method steps. The structures required for various such systems will become apparent as shown below. In addition, the scope of this disclosure is not limited to any particular programming language. It should be understood that the teachings of this disclosure can be carried out using a variety of programming languages.
[0052] The above description should be understood as illustrative, not limiting. Many other embodiments will be obvious to those skilled in the art who have read and understood the above description. While this disclosure describes specific embodiments, it will be recognized that the systems and methods of this disclosure are not limited to the embodiments described herein and can be implemented with modifications within the scope of the claims. Therefore, this specification and the drawings should be considered illustrative, not limiting. Accordingly, the scope of this disclosure should be determined by reference to the claims and the entire scope of equivalents to which such claims are entitled.
Claims
1. A method for correcting out-of-plane deformation of a substrate, Using optical inspection data, obtain a profile of the out-of-plane deformation of the substrate, Using the acquired profile, one or more parameters characterizing the saddle stress of the substrate are identified, Using the identified one or more parameters, calculate one or more features of the stress compensation layer (SCL) for the substrate, Depositing the aforementioned SCL onto the substrate, Applying a stress relaxation beam to multiple edge regions of the SCL, wherein the settings of the stress relaxation beam are determined using the specified one or more parameters. A method that includes this.
2. The method according to claim 1, wherein one or more features of the SCL are such that the stress in the substrate is calculated to have the same sign across the entire area of the substrate.
3. The method according to claim 1, wherein each of the plurality of edge regions of the SCL has a width of 30% or less of the diameter of the substrate.
4. The method according to claim 1, wherein the stress relaxation beam applies a spatially uniform dose of ions to the plurality of edge regions of the SCL.
5. The method according to claim 1, wherein the stress relaxation beam applies ions of a radially varying dose to the plurality of edge regions of the substrate.
6. The method according to claim 1, wherein the stress relaxation beam applies ions of varying dose in the azimuthal direction to the plurality of edge regions of the SCL.
7. The one or more features of the SCL are, The material of the aforementioned SCL, or The thickness of the aforementioned SCL The method according to claim 1, comprising one or more of the above.
8. The setting of the stress relaxation beam is, The type of particles in the stress relaxation beam, The energy of the particles in the stress relaxation beam, or The incidence angle of the particles of the stress relaxation beam to the SCL The method according to claim 1, comprising one or more of the above.
9. To obtain an updated profile of the out-of-plane deformation of the substrate in response to the stress relaxation beam applied to the plurality of edge regions of the SCL, Based on the updated profile, the residual stress in the substrate is identified, Based on the residual stress, a target stress relaxation beam pattern is selected from a plurality of stored stress relaxation beam patterns, Applying additional stress relaxation beams to multiple regions of the SCL identified by the target stress relaxation beam pattern The method according to claim 1, further comprising:
10. The method according to claim 9, wherein selecting the stress relaxation beam pattern includes calculating the similarity between the residual stress in the substrate and each of at least one subset of the stored stress relaxation beam patterns.
11. The method according to claim 1, wherein the substrate includes a front side and a back side, the front side includes one or more manufactured features, and the SCL is deposited on the back side of the substrate.
12. Memory and A processing device that is communicably connected to the aforementioned memory and A system comprising, wherein the processing device is Using optical inspection data, we obtain a profile of the out-of-plane deformation of the substrate. Using the acquired profile, one or more parameters characterizing the saddle stress of the substrate are identified. Using the identified one or more parameters, calculate one or more features of the stress compensation layer (SCL) for the substrate. The SCL is deposited on the substrate, A stress relaxation beam having settings determined using the identified one or more parameters is applied to multiple edge regions of the SCL. system.
13. The system according to claim 12, wherein one or more features of the SCL are calculated such that the stress in the substrate has the same sign across the entire area of the substrate.
14. The system according to claim 12, wherein each of the plurality of edge regions of the SCL has a width of 30% or less of the diameter of the substrate.
15. The aforementioned stress relaxation beam, A spatially uniform dose of ions to the plurality of edge regions of the SCL, Ions of a radially varying dose to the plurality of edge regions of the substrate, or Ions to the plurality of edge regions of the SCL, with a dose that varies in the azimuthal direction. The system according to claim 12, wherein at least one of the following is applied.
16. The one or more features of the SCL are, The material of the aforementioned SCL, or The thickness of the aforementioned SCL The system according to claim 12, comprising one or more of the above.
17. The setting of the stress relaxation beam is, The type of particles in the stress relaxation beam, The energy of the particles in the stress relaxation beam, or The incidence angle of the particles of the stress relaxation beam to the SCL The system according to claim 12, comprising one or more of the above.
18. The aforementioned processing device further, In response to the stress relaxation beam applied to the plurality of edge regions of the SCL, an updated profile of the out-of-plane deformation of the substrate is obtained. Based on the updated profile, residual stresses within the substrate are identified. Based on the aforementioned residual stress, a target stress relaxation beam pattern is selected from a plurality of stored stress relaxation beam patterns. An additional stress relaxation beam is applied to multiple regions of the SCL identified by the target stress relaxation beam pattern. The system according to claim 12.
19. The system according to claim 18, wherein the processing device calculates the similarity between the residual stress in the substrate and each of at least one subset of the stored stress relaxation beam patterns in order to select the stress relaxation beam pattern.
20. A semiconductor manufacturing system, One or more processing chambers for processing substrates, A computing device, Using optical inspection data, obtain a profile of the out-of-plane deformation of the substrate. Using the acquired profile, one or more parameters characterizing the saddle stress of the substrate are identified. Using the identified one or more parameters, calculate one or more features of the stress compensation layer (SCL) for the substrate. The SCL is deposited on the substrate, A computer and a computer apply a stress relaxation beam having settings determined using the one or more specified parameters to multiple edge regions of the SCL. A system equipped with these features.
Citation Information
Patent Citations
Production of semiconductor device
JP1978116771A
Control of warp of semiconductor wafer
JP1982102008A
Stress position specifying tuning for controlling curvature to control overlay during processing of semiconductor
JP2018041080A
Method for manufacturing semiconductor device
JP2021170619A
Localized stress modulation by implant to back of wafer
US20220344171A1