Indication device

Abstract

To provide a semiconductor device which suppresses variation in characteristics of a driving transistor and corrects image data.SOLUTION: A semiconductor device includes an image data storage portion, a correction data storage portion, a driver circuit portion, a display element, and a threshold voltage correction circuit portion. The image data storage portion has a function of storing first image data, and the correction data storage portion has a function of storing correction data and a function of generating second image data corresponding to the first image data and the correction data when the image data storage portion stores the first image data. The driver circuit portion has a function of generating a current corresponding to the second image data and a function of supplying the current to the display element. The threshold voltage corrector circuit portion has a function of correcting the threshold voltage of the driving transistor in the driver circuit portion. With the above structure, the semiconductor device can correct the image data, correct the threshold voltage of the driving transistor, and perform display based on the second image data.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] One aspect of the present invention relates to a semiconductor device, a display device, an electronic device, and a method of operation.

[0002] One aspect of the present invention is not limited to the above-mentioned technical field. The technical field relates to a product, a method, or a method of manufacture. Or, one aspect of the present invention. This refers to a process, machine, manufacture, or composition. This relates to (a). Therefore, one aspect of the present invention disclosed more specifically herein In the field of technology, semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, energy storage devices, imaging devices, etc. Devices, memory devices, processors, electronic devices, systems, methods for driving them, and methods for manufacturing them. Laws or their testing methods can be cited as examples. [Background technology]

[0003] In recent years, mobile phones such as smartphones, tablet information terminals, and notebook PCs (personal computers) have become popular. Various improvements are being made to the display devices used in portable game consoles and other devices. For example, increasing resolution, improving color reproduction, and reducing the size of the drive circuit. Development is underway to create display devices that reduce power consumption, etc. Also, for example, the display device To improve display quality, variations in the characteristics of the drive transistors included in the pixels are reduced. Development of circuits and other components is also progressing. In particular, the circuit for correcting the threshold voltage of the drive transistor is being developed. An invention of a pixel circuit having a path is disclosed in Patent Document 1.

[0004] Furthermore, oxide semiconductors are used as switching elements in the pixel circuits of the display device. Examples include technologies that utilize transistors made of semiconductor thin films.

[0005] Silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors. However, oxide semiconductors are attracting attention as other materials. Examples of oxide semiconductors include Furthermore, not only oxides of monochemical metals such as indium oxide and zinc oxide, but also oxides of multichemical metals The substance is also known. Among the oxides of multi-component metals, in particular, In-Ga-Zn oxide (hereinafter Research is actively being conducted on this technology, also known as IGZO.

[0006] Research on IGZO has shown that in oxide semiconductors, C is neither single-crystal nor amorphous. AAC (c-axis aligned crystalline) structure and nc(n An anocrystalline structure was discovered (see Non-Patent Documents 1 to 3). Non-Patent Documents 1 and 2 use an oxide semiconductor having a CAAC structure. Techniques for fabricating transistors are also disclosed. Furthermore, CAAC structure and nc structure Even oxide semiconductors with lower crystallinity can have minute crystals, as shown in Non-Patent Document 4. This is disclosed in Non-Patent Document 5.

[0007] Furthermore, transistors using IGZO as the active layer have extremely low off-current (non See Patent Document 6.) LSIs and display devices utilizing these characteristics have been reported (non-patent). See authorized document 7 and non-patent document 8. Also, patent document 2 contains IGZO in the active layer. An invention has been disclosed that uses transistors in the pixel circuits of a display device. [Prior art documents] [Patent Documents]

[0008]

Patent Document 1

Patent document 2

Non-licensed literature

[0009] [Non-licensed document 1] S. Yamazaki et al., "SID Symposium Digest of Technical Papers", 2012, volume 43, issue 1, p.183-186 [Non-licensed document 2] S. Yamazaki et al., "Japanese Journal of Applied Physics", 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Non-licensed document 3] S. Ito et al., "The Proceedings of AM-FPD'13 Digest of Technical Papers", 2013, p.151-154

Non-licensed Document 4

Non-licensed Document 5

Non-licensed Document 6

Non-licensed Document 7

[0010] For a display device to display high-quality images, the display device must, for example, have high resolution and multiple levels. Features such as high color gamut and wide color depth are required. For example, OLED (Electroluminescent Light-Emitting Diode) In a display device including a light-emitting element such as an nescence element, a display image with high display quality is provided. To display the image, variations in the characteristics of the drive transistors must be suppressed, and the image data transmitted to the pixels must be controlled. The data needs to be corrected appropriately.

[0011] One aspect of the present invention suppresses variations in the characteristics of the drive transistor and corrects image data. To provide a pixel circuit (referred to as a semiconductor device in this specification, etc.) that can perform the following: This is one of the challenges. Alternatively, one aspect of the present invention provides a display device having the semiconductor device. One of the objectives is to provide an electronic device having the display device. One of the objectives is to provide the following. Alternatively, one aspect of the present invention relates to the semiconductor device and the display device. One of the objectives is to provide a method for operating the electronic device in question.

[0012] The problems addressed by one embodiment of the present invention are not limited to those listed above. This does not preclude the existence of other issues. These other issues are described in the following section. This is an issue not mentioned in the specification. Issues not mentioned in this section can be found in the specification or by those skilled in the art. This can be derived from drawings and other descriptions, and can be extracted as appropriate from these descriptions. Furthermore, one aspect of the present invention addresses at least one of the problems listed above and other problems. This invention solves the problems. One aspect of the present invention addresses the problems listed above, as well as other problems. You don't need to solve all of them. [Means for solving the problem]

[0013] (1) One aspect of the present invention comprises an image data holding unit, a correction data holding unit, a drive circuit unit, and a display element. It has a child and a threshold voltage correction circuit section, and the drive circuit section has a first to It has a transistor, and the first terminal of the first transistor is electrically connected to the input terminal of the display element. The image data holding unit has the function of holding the first image data, and the correction data holding unit The function of holding correction data and the image data holding unit holding the first image data It has a function to generate a second image data corresponding to the first image data and correction data. The drive circuit applies a first potential corresponding to the second image data to the gate of the first transistor. This generates a first current between the first and second terminals of the first transistor. It has the function of performing and the function of supplying a first current to the display element, and the threshold voltage correction circuit section is A semiconductor having a function to correct the threshold voltage of the first transistor included in the drive circuit. It is a device.

[0014] (2) Alternatively, in one aspect of the present invention, the configuration of (1) above has first to third capacitance elements, The image data holding unit has a second transistor, and the correction data holding unit has a third transistor The threshold voltage correction circuit has a fourth transistor and the first terminal of the second transistor. The child is electrically connected to the first terminal of the first capacitance element, and the first terminal of the third transistor is connected to the The gate of one transistor, the second terminal of the first capacitance element, and the first terminal of the second capacitance element, Electrically connected, the first terminal of the first transistor is connected to the second terminal of the second capacitance element, and the third capacitance element is connected to the second terminal of the second capacitance element. The first terminal of the element is electrically connected to the fourth terminal, and the back gate of the first transistor is connected to the fourth terminal. A semiconductor device is electrically connected to the first terminal of the transistor and the second terminal of the third capacitance element. It is placed there.

[0015] (3) Alternatively, in one aspect of the present invention, in the configuration of (2) above, the first to fourth transistors Each is a semiconductor device having either a metal oxide or silicon in the channel formation region. be.

[0016] (4) Alternatively, in one aspect of the present invention, in the configuration of (2) or (3) above, the drive circuit section is the 5th It has a transistor, and the first terminal of the third transistor and the input terminal of the display element are the fifth This is a semiconductor device that is electrically connected via the first and second terminals of a transistor.

[0017] (5) Alternatively, in one aspect of the present invention, in the configuration of (4) above, the fifth transistor is a channel This is a semiconductor device having either a metal oxide or silicon in the formation region.

[0018] (6) Alternatively, in one aspect of the present invention, in any one of the configurations (2) to (5) above, the sixth T It has a transistor, and the first terminal of the sixth transistor is electrically connected to the gate of the first transistor. The second terminal of the sixth transistor is connected to the first terminal of the first transistor. It is a semiconductor device that continues to be developed.

[0019] (7) Alternatively, in one aspect of the present invention, in the configuration of (6) above, the sixth transistor is a channel This is a semiconductor device having either a metal oxide or silicon in the formation region.

[0020] (8) Alternatively, in one aspect of the present invention, in any one of the configurations (2) to (7) above, the first machine It has functions 1 through 3, the first function being to turn on the third transistor and the first transistor The gate of the sta, the second terminal of the first capacitance element, and the first terminal of the second capacitance element are initialized to the first initial state. The function applies an electric potential and turns on the fourth transistor, which controls the back of the first transistor. The function applies a second initialization potential to the gate, and the first terminal of the first transistor and the second capacitance element The function applies a third initialization potential to the second terminal of the child and the first terminal of the third capacitance element, and the third The transistor is turned off, and the second capacitance element controls the first and third initialization potentials. The function of maintaining the potential difference with the position, and from the first terminal of the first transistor to the input terminal of the display element The current is interrupted, and a voltage is applied between the first and second terminals of the first transistor. The zista is turned on, and then the potential of the first terminal of the first transistor becomes the second potential. When the first transistor is turned off, the third capacitor element controls the second initialization potential and the third It has a function of maintaining the potential difference with 2 potentials, and the second function is to turn on the third transistor. Then, the gate of the first transistor, the second terminal of the first capacitor element, and the first terminal of the second capacitor element The terminal has a function to write a third potential corresponding to the correction data, and the third transistor is turned off. Then, the gate of the first transistor, the second terminal of the first capacitor element, and the first terminal of the second capacitor element It has a terminal and a function to maintain a third potential, and the third function is the second transistor Turn it on and write the fourth potential corresponding to the first image data to the first terminal of the first capacitance element. The function, and the fact that the fourth potential is written to the first terminal of the first capacitance element, The gate of the sta, the second terminal of the first capacitance element, and the first terminal of the second capacitance element are held together. A semiconductor having a function in which the third potential changes to a first potential corresponding to the second image data. It is a device.

[0021] (9) Alternatively, one aspect of the present invention relates to a semiconductor device having any one of the configurations (1) to (8) above, It is a display device having peripheral circuits.

[0022] (10) Alternatively, one aspect of the present invention is an electronic device having a display device having the configuration of (9) above and a housing. It is a vessel.

[0023] (11) Alternatively, one aspect of the present invention comprises an image data holding unit, a correction data holding unit, and a drive circuit unit. A method for operating a semiconductor device having a display element and a threshold voltage correction circuit, the driving The circuit section has a first transistor with a back gate, and the operation method of the semiconductor device is Key value voltage correction period, correction data writing period, image data writing period, and image table The system has a specified period and a threshold voltage correction period, during which the threshold voltage correction circuit section performs the first transistor A period during which the threshold voltage of the first transistor is corrected by applying a potential to the back gate of the first transistor. The correction data writing period includes a period for writing correction data to the correction data holding unit. The image data writing period involves writing the first image data to the image data storage unit and correcting it. The period during which the data holding unit generates the first image data and the second image data corresponding to the correction data During the image display period, the gate of the first transistor is set to a first potential corresponding to the second image data. When this is applied, the drive circuit unit operates between the first and second terminals of the first transistor. In this configuration, the semiconductor device has a period during which it generates a first current and flows the first current through a display element. This is the method of preparation.

[0024] (12) Alternatively, in one aspect of the present invention, the operation method of (11) above has an initialization period, and semiconductor The device has first to third capacitance elements, and the image data holding unit has a second transistor The correction data holding unit has a third transistor, and the threshold voltage correction circuit has a third It has four transistors, and the first terminal of the second transistor is electrically connected to the first terminal of the first capacitive element. They are connected in a specific manner, and the first terminal of the third transistor is connected to the gate of the first transistor and the first capacitor. The second terminal of the element and the first terminal of the second capacitance element are electrically connected, and the first transistor The first terminal of the first terminal connects to the second terminal of the second capacitance element, the first terminal of the third capacitance element, and the input of the display element. The terminals are electrically connected to the back gate of the first transistor, and the back gate of the fourth transistor The first terminal and the second terminal of the third capacitance element are electrically connected, and the initialization period is the third transistor When the transistor is turned on, the gate of the first transistor and the second terminal of the first capacitor element are connected. , the first terminal of the second capacitance element, the period during which the first initialization potential is applied, and the fourth transistor When it turns ON, the back gate of the first transistor and the second terminal of the third capacitance element, The period during which the second initialization potential is applied, and the first terminal of the first transistor and the second capacitance element The device has a second terminal and a first terminal of the third capacitance element, and a period during which a third initialization potential is applied to the second terminal and the first terminal of the third capacitance element. The threshold voltage correction period interrupts the current from the first terminal of the first transistor to the display element. During this period, the third transistor is in the off state, and the second capacitance element is at the first initial potential and the third A period during which the potential difference with the initialization potential is maintained, and a high potential is applied to the second terminal of the first transistor. As a result, the potential of the first terminal of the first transistor changes, causing the first transistor to be in the off state. Until the second potential is reached, the second current flows between the first and second terminals of the first transistor. During this time, the fourth transistor is turned off, and the third capacitance element is at the second potential and the second initialization potential. The correction data writing period includes a period during which the potential difference with is maintained, and the third transistor When turned on, the gate of the first transistor, the second terminal of the first capacitance element, and the second capacitance The first terminal of the element, the period during which a third potential corresponding to the correction data is applied, and the third transistor When the switch is turned off, the gate of the first transistor, the second terminal of the first capacitance element, and the second The first terminal of the capacitive element and the period during which the third potential is maintained by it, and the image data writing During the interval, the second transistor is turned on, and the first image is transmitted to the first terminal of the first capacitance element. The period during which a fourth potential corresponding to the data is applied, and the period during which the fourth potential is written to the first terminal of the first capacitance element. As a result of being inserted, the gate of the first transistor, the second terminal of the first capacitance element, and the second The first terminal of the capacitive element and the third potential held there correspond to the first potential corresponding to the second image data. This is a method for operating a semiconductor device, having a period of variation.

[0025] (13) Alternatively, in one aspect of the present invention, in the operation method of (12) above, the first to fourth transistors Each of the elements has either a metal oxide or silicon in the channel-forming region, and is a display device. This describes the method of placement.

[0026] (14) Alternatively, in one aspect of the present invention, in the operation method of (12) or (13) above, the drive circuit section It has a fifth transistor, and the first terminal of the third transistor and the input terminal of the display element, It is electrically connected via the first and second terminals of the fifth transistor, and during the initialization period and During the correction data writing period and the image data writing period, the fifth transistor is off. The image display period includes a period during which the fifth transistor is in the ON state. This is a method of operating a semiconductor device.

[0027] (15) Alternatively, in one aspect of the present invention, in the operation method of (14) above, the fifth transistor is A method for operating a semiconductor device, wherein the channel formation region has either a metal oxide or silicon. ru.

[0028] (16) Alternatively, in one aspect of the present invention, in any one of the operating methods (12) to (15) above The semiconductor device has a sixth transistor, and the first terminal of the sixth transistor is connected to the first transistor. Electrically connected to the gate of the zista, the second terminal of the sixth transistor is connected to the first transistor. The first terminal is electrically connected, and the threshold voltage correction period is when the sixth transistor is ON. This is a method for operating a semiconductor device that has a period of time during which it becomes [a certain state].

[0029] (17) Alternatively, in one aspect of the present invention, in the operation method of (16) above, the sixth transistor is A method for operating a semiconductor device, wherein the channel formation region has either a metal oxide or silicon. ru.

[0030] (18) Alternatively, one aspect of the present invention is a semiconductor device described in any one of (11) to (17) above. A method for operating a display device, including a method for operating the display device, wherein the display device comprises multiple semiconductor devices. It has a display section arranged in a cubic shape, and a portion of the multiple semiconductor devices is a first pixel and a second pixel and It functions as follows, and the first pixel and the second pixel are located in different rows on the display unit, When one pixel is performing threshold voltage correction operation, the second pixel writes correction data. This is a method of operating a display device that performs operations during the specified period and during the image data writing period. . [Effects of the Invention]

[0031] According to one aspect of the present invention, variations in the characteristics of the drive transistor are suppressed, and image data is obtained. A semiconductor device capable of performing correction can be provided. Alternatively, in one aspect of the present invention Therefore, a display device having the semiconductor device can be provided. Or, an embodiment of the present invention. Depending on the circumstances, an electronic device having the display device can be provided. Or, one aspect of the present invention Depending on the embodiment, the invention provides a semiconductor device, a display device, and a method for operating the electronic device. It is possible.

[0032] Alternatively, according to one aspect of the present invention, a display device having a source driver circuit with a small circuit area A suitable location can be provided. Alternatively, according to one aspect of the present invention, a source with low power consumption can be provided. A display device having a driver circuit can be provided.

[0033] The effects of one embodiment of the present invention are not limited to those listed above. This does not preclude the existence of other effects. These other effects are described in the following section. This is an effect not mentioned in the specification. Effects not mentioned in this section can be described by those skilled in the art in the specification or This can be derived from drawings and other descriptions, and can be extracted as appropriate from these descriptions. Furthermore, one aspect of the present invention provides at least one of the effects listed above and other effects. It has the effect of, in some cases, the effects listed above. They may not always be present. [Brief explanation of the drawing]

[0034] [Figure 1] A block diagram showing an example of a display device. [Figure 2] A block diagram illustrating an example of pixel configuration. [Figure 3] A block diagram illustrating an example of pixel configuration. [Figure 4] A circuit diagram showing an example of pixel configuration. [Figure 5] A block diagram illustrating an example of pixel configuration. [Figure 6] A circuit diagram showing an example of pixel configuration. [Figure 7] A circuit diagram showing an example of pixel configuration. [Figure 8] A timing chart showing an example of pixel operation. [Figure 9] A diagram illustrating an example of the timing between pixel operation and voltage application to wiring. [Figure 10] A block diagram showing an example configuration of the display unit and its surrounding circuits. [Figure 11] A top view showing an example of a display device. [Figure 12] A perspective view showing an example of a touch panel. [Figure 13] A cross-sectional view showing an example of a display device. [Figure 14] A cross-sectional view showing an example of a transistor configuration. [Figure 15] A cross-sectional view showing an example of a transistor configuration. [Figure 16] A perspective view showing an example of an electronic device. [Figure 17] A perspective view showing an example of an electronic device. [Figure 18] A graph showing the rate of change in current due to threshold voltage correction. [Figure 19] A graph showing the relationship between image data (voltage) and the amount of current flowing through a transistor. [Figure 20] A graph showing the characteristics of the drain current and gate-source voltage of a transistor. [Figure 21] A photograph of the prototype display device. [Modes for carrying out the invention]

[0035] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as the following. For example, when a metal oxide is used in the active layer of a transistor, the metal Oxides are sometimes referred to as oxide semiconductors. In other words, metal oxides have amplification and rectification effects. and a channel formation region of a transistor having at least one switching action. If possible, the metal oxide is used as a metal oxide semiconductor (metal oxide semiconductor). It can be called an OS FET, or simply an OS FET. When referring to an S-transistor, it means a transistor having a metal oxide or oxide semiconductor. It can be rephrased as "njista".

[0036] Furthermore, in this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). They are sometimes collectively referred to as metal oxynitrides (metal oxides). Also, metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxides). It may also be called tal oxynitride.

[0037] (Embodiment 1) In this embodiment, a semiconductor device according to one aspect of the present invention, or a display device having said semiconductor device Let me explain the placement.

[0038] <Display device configuration> First, we will describe an example of a display device configuration. Figure 1 shows an inorganic EL element and an organic EL element. This is a block diagram showing an example of a display device having light-emitting elements such as the table. The display device DD is table The display unit PA and its peripheral circuits include the source driver circuit SD and the gate driver. It has a circuit GD.

[0039] The display unit PA has multiple pixels PIX. In Figure 1, the multiple pixels PIX within the display unit PA are shown. Only one of the pixels (PIX) is shown in the illustration; the other pixels (PIX) are omitted. Furthermore, the multiple pixels PIX of the display unit PA are arranged in a matrix. preferable.

[0040] In Figure 1, the pixel PIX is electrically connected to the source driver circuit SD via wiring DL. In addition, the pixel PIX is connected to the gate driver circuit GD via wiring GL and electrical They are connected precisely. Note that the display unit PA has multiple pixels PIX, so the wiring DL Multiple pixels (PIX) may be electrically connected to the wiring GL. There may be multiple pixels (PIX) to be displayed. Also, wiring DL and wiring GL are displayed Multiple units may be provided depending on the number of pixels (PIX) included in the PA. Furthermore, the rotation of the pixels (PIX) Depending on the circuit configuration, multiple wiring DLs or multiple wiring GLs may be used for a single pixel PIX. An electrically connected configuration is also acceptable.

[0041] A pixel PIX can have a configuration that includes one or more subpixels. For example, a pixel PI X has a configuration with one subpixel (red (R), green (G), blue (B), white (W) A configuration having three subpixels (one of the following colors): red (R), green (G), and blue. (B) 3 colors, etc.), or a configuration with 4 subpixels (red (R), green (G), blue Four colors: color (B), white (W), or red (R), green (G), blue (B), yellow (Y) ) such as the four colors can be applied. Note that the color elements applied to subpixels are not limited to the above, If necessary, you may combine cyan (C) and magenta (M), etc.

[0042] The source driver circuit SD is an image data input for the pixels PIX included in the display unit PA. It has a function to generate data and a function to transmit the image data to pixels (PIX).

[0043] The source driver circuit SD is, for example, a shift register SR and a latch circuit LAT. The bell shift circuit LVS, the digital-to-analog conversion circuit DAC, the amplifier circuit AMP, and It can have a bus wiring DB. In Figure 1, the output terminal of the shift register SR. It is electrically connected to the clock input terminal of the latch circuit LAT, and the input terminal of the latch circuit LAT The child is electrically connected to the data bus wiring DB, and the output terminal of the latch circuit LAT is level shift The input terminal of the LVS circuit is electrically connected, and the output terminal of the LVS level shift circuit is digital. The digital-to-analog conversion circuit is electrically connected to the input terminal of the DAC, and the digital-to-analog conversion circuit The output terminal of the DAC is electrically connected to the input terminal of the amplifier circuit AMP, and the amplifier circuit AMP The output terminal is electrically connected to the display unit PA.

[0044] Furthermore, Figure 1 shows the latch circuit LAT, the level shift circuit LVS, and the digital The analog conversion circuit DAC and the amplifier circuit AMP are provided for a single wiring DL. Yes, that is, depending on the number of wires DL, there is a latch circuit LAT and a level shift circuit LVS. This involves providing multiple digital-to-analog converters (DACs) and amplifier circuits (AMPs). It is necessary. In this case, the shift register SR is the crossover of multiple latch circuits LAT. The configuration should involve sequentially sending pulse signals to each of the input terminals.

[0045] The data bus wiring DB outputs digital signals containing image data to be input to the display unit PA. This is the wiring for transmission. The image data has grayscale, and the greater the grayscale, the better. Furthermore, it can express changes in color or brightness with smooth gradients, displaying images that are close to natural. It can be displayed in the PA section. However, the higher the grayscale level, the larger the data size of the image data. The size will increase, and a digital-to-analog conversion circuit with high resolution will need to be used.

[0046] The input terminal of the latch circuit LAT receives digital data including image data from the data bus wiring DB. A signal is input. Then, the latch circuit LAT receives the signal transmitted from the shift register SR. Depending on the number, the image data is retained, or the retained image data is output from the output terminal. Perform one of the following actions.

[0047] The Level Shift Circuit (LVS) adjusts the input signal to either a higher amplitude voltage or a lower amplitude voltage. It has the function of converting to an output signal. In Figure 1, the image data sent from the latch circuit LAT The amplitude voltage of the digital signal, including the 't', is properly handled by the digital-to-analog converter (DAC). It has the role of converting the amplitude into voltage.

[0048] A digital-to-analog converter (DAC) converts digital signals, including input image data, into analog signals. It has a function to convert the signal into a log signal and a function to output the analog signal from the output terminal. In particular, when displaying multi-gradation image data on the display unit PA, the digital-to-analog conversion circuit D AC needs to be a high-resolution digital-to-analog conversion circuit.

[0049] The amplifier circuit (AMP) amplifies the analog signal input to the input terminal and then amplifies the analog signal It has the function of outputting from the output terminal. Digital-to-analog conversion circuit DAC and display unit PA By incorporating an amplifier circuit (AMP) in between, image data can be stably transmitted to the display unit (PA). This is possible. The amplifier circuit (AMP) is a voltage follower circuit containing an operational amplifier, etc. These can be applied. Furthermore, a circuit with a differential input circuit can be used as the amplifier circuit. In such cases, it is preferable that the offset voltage of the differential input circuit be as close to 0V as possible.

[0050] The source driver circuit SD performs the above operation, thereby obtaining data from the data bus wiring DB. The digital signal, including image data, is converted into an analog signal and transmitted to the display unit PA. It is possible.

[0051] The gate driver circuit GD selects from among the multiple pixels PIX included in the display unit PA, image data It has a function to select the pixel (PIX) that will be the input destination.

[0052] One method for inputting image data to the display unit PA is, for example, the gate driver circuit GD. , by sending a selection signal to multiple pixels PIX that are electrically connected to a single wiring GL. The writing switching element for image data contained in multiple pixels (PIX) is turned ON. Subsequently, image data is transmitted from the source driver circuit SD to multiple pixels PIX via wiring DL. Simply send the message and write it down.

[0053] One aspect of the present invention is not limited to the configuration of the display device DD shown in Figure 1. One embodiment involves appropriately configuring the components of the display device DD according to the design specifications, purpose, and other circumstances. It can be considered as having been changed.

[0054] <Example of pixel configuration 1> Next, we will explain an example of a pixel PIX configuration. For example, as a pixel PIX, Figure 2(A The pixel PIX shown in the block diagram of ) can be applied. Note that Figure 2(A) shows pixel P To also show the electrical connection relationship with IX, the gate driver circuit GD and the source driver circuit are shown. The diagram also shows the circuit SD, the display unit PA, the wiring DL, and the wiring GL.

[0055] The pixel PIX shown in Figure 2(A) consists of an image data holding unit 101, a drive circuit unit 102, and a table It has an indicator element 103.

[0056] The image data holding unit 101 is electrically connected to the drive circuit unit 102, and the drive circuit unit 102 It is electrically connected to the display element 103.

[0057] The image data storage unit 101 receives from the source driver circuit SD via the wiring DL. It has a function to hold image data. In addition, the image data holding unit 101 has a function to hold image data. It may have a write switching element, a capacitive element, etc., for holding data.

[0058] The display element 103 has the function of controlling the light emitted from the pixel PIX. The brightness (which can be rephrased as luminance, gradation height, etc.) is stored in the image data holding unit 101. It is determined by the retained image data.

[0059] The display element 103 may be, for example, an inorganic EL element, an organic EL element, or a light-emitting element, or a transmission element. Liquid crystal elements, reflective liquid crystal elements, and the like can be applied.

[0060] The drive circuit unit 102 displays according to the image data held in the image data holding unit 101. It has a function to drive element 103. For example, the display element 103 may be an organic EL element. When using an element whose luminescence is determined by the current, the drive circuit 102 controls the current It can have a drive transistor that controls the display element. It has the function of supplying drive current to 103.

[0061] Wiring VA is electrically connected to the pixel PIX. Wiring VA is, for example, connected to image data. The holding unit 101 has a capacity line for holding image data, and the drive circuit unit 102 has a drive line for driving the drive circuit unit 102. It can be used as a voltage supply line, etc. Therefore, wiring VA can consist of one or more wires. This is possible. Note that the wiring VA configuration is not limited to the above, and can be appropriately configured depending on the pixel PIX configuration. It can be changed. For example, if the display element 103 is a light-emitting element such as an organic EL element. In addition, the wiring VA can be a current supply line for driving the light-emitting element. Furthermore, for example, if the display element 103 is a liquid crystal element, unlike the light-emitting element, the wiring VA is powered It does not need to be a flow supply line.

[0062] In the explanation of the display device DD in Figure 1, the wiring GL is used when writing image data to the pixel PIX. It was explained that it has the function of transmitting a selection signal in advance, but the pixel PIX shown in Figure 2(A) In a display device DD having the following, the wiring GL is between the pixel PIX and the wiring VA in Figure 2(A). It may also have a function to transmit a signal to switch between a conductive state and a non-conductive state. Therefore, the wiring GL can consist of multiple wires to transmit multiple signals. This allows for the temporary suspension of the voltage and / or current supplied from the wiring VA.

[0063] <Example of pixel configuration 2> Furthermore, the pixel PIX may have a function to perform corrections on the image data. The configuration of a pixel PIX is shown in the block diagram in Figure 2(B). The pixel PIX shown in Figure 2(B) is... The configuration includes a correction data holding unit 104 in the pixel PIX of 2(A).

[0064] The correction data holding unit 104 consists of the image data holding unit 101 and the drive circuit unit 102, and is electrically powered. They are directly connected.

[0065] The correction data holding unit 104 receives correction data from the circuit WSD via the wiring WDL. The function of holding the data, and the image data held in the image data holding unit 101 based on the correction data. It has a function to correct image data.

[0066] In this case, the drive circuit unit 102 receives the corrected image data in the correction data holding unit 104. It has the function of driving the display element 103 according to the input.

[0067] Furthermore, the correction data holding unit 104 has a write switch for holding the correction data. It may have elements such as gyroscopes and capacitive elements.

[0068] One method for correcting image data is, for example, a method using capacitive elements. In the correction data holding unit 104, the correction data is connected to one terminal of a pair of capacitive elements. The corresponding first potential is maintained, and then one of the pair of terminals of the capacitive element is electrically suspended. In this state, the image data holding unit 101 receives the other terminal of the pair of capacitive elements. This maintains the second potential corresponding to the first potential of one of the pair of terminals of the capacitive element. Let's assume that the potential is raised or lowered according to the second potential due to capacitive coupling, resulting in the third potential. The third potential corresponds to the corrected image data. Subsequently, the third potential is driven by the drive circuit 10 By applying 2, the drive circuit 102 drives the display element 103 according to the third potential. It is possible to do so.

[0069] The WSD circuit is a correction circuit for correcting the image displayed by the pixels (PIX) included in the display unit (PA). It has a function to generate data and a function to transmit the correction data to the pixel PIX. Oh, Figure 2(B) shows both the circuit WSD and the source driver circuit SD. However, for example, if the source driver circuit SD is configured to include the functions of the circuit WSD described above This is also good. Specifically, a demultiplexer inside the source driver circuit SD, or at the output destination. By providing a system that outputs image data and correction data to both the DL wiring and WDL wiring from a single circuit. It is also possible to configure it to send "Ta" and "Ta".

[0070] By applying the pixel PIX shown in Figure 2(B) to the display device DD, image data retention is achieved. For the image data held in unit 101, the correction data held in correction data holding unit 104 Image correction can be applied depending on the data. Image correction here refers to, for example, increasing brightness. Examples include width adjustment and conversion to multi-tone images.

[0071] Note that in Figure 2(B), the correction data transmitted from the circuit WSD to the pixel PIX is If it can be generated by the driver circuit SD, the circuit WSD can be omitted and the wiring WDL can be used. - The driver circuit SD can be electrically connected to such a configuration. This is shown in Figure 3. The pixel PIX and its surrounding circuitry shown in Figure 3 are controlled by the source driver circuit SD. The system generates image data and sends the image data to the image data holding unit 101 via wiring DL. The source driver circuit SD generates correction data, and the correction data is transmitted to the wiring W The system is configured to transmit correction data to the data retention unit 104 via DL. (Circuit configuration shown in Figure 3) By applying this to the display device DD, the circuit area of ​​the display device DD can be reduced. ru.

[0072] <<Example of Pixel Circuit Configuration 1>> Next, we will explain the specific circuit configuration of the pixel PIX shown in Figure 2(B). Figure 4 shows Figure 2(B) illustrates an example of the circuit configuration of the pixel PIX.

[0073] The pixel PIX shown in Figure 4 consists of transistors Tr1 to Tr5 and It has a capacitance element C1, a capacitance element C2, and a light-emitting element LD. Also, wiring DL, wiring WD L, wiring GL1 to GL3, wiring VL, wiring AL, wiring CAT are for pixels and electrical They are directly connected.

[0074] Transistors Tr1, Tr2, Tr4, and T Each of r5 functions as a switching element. Transistor Tr3 is a light-emitting element. It functions as a drive transistor that controls the current flowing through the LD. Also, the transistor Tr Transistors 1 through Tr5 apply the transistor configuration described in Embodiment 3, which will be described later. It is possible.

[0075] Wiring DL is a wiring for transmitting image data to pixel PIX, as shown in Figure 2(B). The wiring can be equivalent to the wiring DL. Also, the wiring WDL is for the image data. This is wiring for transmitting correction data, and corresponds to the wiring WDL shown in Figure 2(B). It can be made into a line. In addition, each of the wirings GL1 to GL3 is connected to the pixel PIX. This is a corresponding selection signal line, and can be the same wiring as wiring GL shown in Figure 2(B). .

[0076] Wiring VL is wiring used to apply a predetermined potential to a specific node within a pixel PIX. Furthermore, wiring AL is wiring that supplies current to the light-emitting element LD. Wiring V L and wiring AL can be the same wiring as wiring VA shown in Figure 2(B).

[0077] The CAT wiring is used to apply a predetermined potential to the output terminal of the light-emitting element (LD). The potentials can be, for example, a reference potential, a low-level potential, and potentials lower than those. This can be done. Also, the wiring CAT should be the same as the wiring VA shown in Figure 2(B). This is possible. The CAT wiring provides a common potential to multiple pixels (PIX) included in the display unit PA. It is preferable that it functions as a supply wiring.

[0078] The first terminal of transistor Tr1 is electrically connected to the first terminal of capacitive element C1, The second terminal of transistor Tr1 is electrically connected to wiring DL, and the gate of transistor Tr1 The terminal is electrically connected to wiring GL1. The first terminal of transistor Tr2 is connected to the The gate of transistor Tr3, the second terminal of capacitive element C1, and the first terminal of capacitive element C2 are connected to the power supply. Electrically connected, the second terminal of transistor Tr2 is electrically connected to the wiring WDL, The gate of transistor Tr2 is electrically connected to wiring GL2.

[0079] In this embodiment, the first terminal of transistor Tr1 and the first terminal of capacitive element C1 The electrical connection point between and is referred to as node ND1, and the first terminal of transistor Tr2 and The gate of zista Tr3, the second terminal of capacitive element C1, and the first terminal of capacitive element C2, The aerodynamic connection point is referred to as node ND2.

[0080] The first terminal of transistor Tr3 is electrically connected to wiring AL, and transistor Tr3 The second terminal is connected to the first terminal of transistor Tr4 and the first terminal of transistor Tr5. The second terminal of the element C2 is electrically connected to the second terminal of the transistor Tr4. The gate of transistor Tr4 is electrically connected to wiring VL, and the gate of transistor Tr4 is electrically connected to wiring GL1. They are connected. The second terminal of transistor Tr5 is electrically connected to the input terminal of the light-emitting element LD. Connected, the gate of transistor Tr5 is electrically connected to wiring GL3. The output terminal of the LD element is electrically connected to the CAT wiring.

[0081] The second terminal of transistor Tr3 and the light-emitting element LD are connected to the first terminal of transistor Tr5. Since it is electrically connected via the child-second terminal, transistor Tr5 is Whether the second terminal of Tr3 and the input terminal of the light-emitting element LD are in a conductive or non-conductive state It functions as a switching element that can be switched to either one of two states.

[0082] Capacitive element C1 has the function of maintaining the potential difference between node ND1 and node ND2. The capacitive element C2 has the function of maintaining the potential difference between the second terminal and the gate of transistor Tr3. It has.

[0083] In the pixel PIX of Figure 4, at least of transistors Tr1 to Tr5 1. Preferably, the OS transistor is an OS transistor. In particular, the OS transistor is channel type The constituent region contains indium, element M (where element M is aluminum, gallium, yttrium, or It is preferable that the oxide contains at least one of tin and zinc. This will be described in detail in Embodiment 4. Such OS transistors are connected to transistors Tr1 to Tr By applying this to at least one of the transistors Tr5, the off-current of the applied transistor is reduced. It can always be kept low. Data is stored at the first terminal (node ​​ND1) of the capacitive element C1. In this case, by making transistor Tr1 an OS transistor, the off-current causes the node This prevents the corruption of data held in ND1. Similarly, the data of transistor Tr3 The terminal of the capacitor element C1, the second terminal of the capacitor element C2 (node ​​ND2), and the terminal of the capacitor element C2. When holding the data, by making transistor Tr2 an OS transistor, the off-current This prevents the corruption of data held in node ND2. Also, the light-emitting element LD To temporarily stop the light emission, by replacing transistor Tr5 with an OS transistor, This prevents the light-emitting element LD from emitting light due to current. Also, transistors Tr1 to Tr By applying OS transistors to all of the transistors Tr5, each transistor Because the indicator can be formed simultaneously, the manufacturing process for the display unit PA can be shortened. In some cases, this is possible. In other words, the production time of the display unit PA can be shortened, so for a certain period of time This allows for an increase in the number of units produced per unit.

[0084] Furthermore, at least one of transistors Tr1 to Tr5 is, for example, channel A transistor having silicon in the silicon formation region can be applied (hereinafter referred to as Si transistor). (To be written as ZISTA.) Examples of silicon include hydrogenated amorphous silicon, microcrystalline silicon. Crystalline silicon, polycrystalline silicon, single-crystal silicon, etc. can be used. Among transistors Tr1 through Tr5, some transistors are made into Si transistors. The remaining transistors may be used as OS transistors.

[0085] The image data holding unit 101 shown in Figure 2(B) is, for example, the transistor Tr1 shown in Figure 4. It can have the following. Also, the drive circuit section 102 may have, for example, the transistor T shown in Figure 4. It may have r3 to transistor Tr5. Also, the display element 103 may, for example, It can have the light-emitting element LD shown in Figure 4. The correction data holding unit 104 is, for example, shown in Figure The transistor Tr2 shown in 4 can be included. The dynamic circuit section 102 and the correction data holding section 104 each have a capacitive element C1 as shown in Figure 4, and a capacitor Because they share the function of maintaining the potential of each element C2, the capacitive element C1, the capacitive element It is not possible to uniquely determine which circuit each of C2 is included in. In other words... Then, each of the capacitive element C1 and capacitive element C2 is connected to the image data holding unit 101 and the drive circuit unit It can be said that it is contained in either 102 or the correction data holding unit 104.

[0086] By the way, in Figure 2, the display quality of the display device DD is determined by the drive circuit included in the drive circuit unit 102. The characteristics of the dynamic transistors may vary. In particular, the display element 103 may be affected. When using light-emitting diodes (LDs), the effect becomes significant, so the display components of the display device DD. To increase the position, the threshold voltage of transistor Tr3, which functions as a driving transistor, Voltage correction is required. When threshold voltage correction is performed by an external circuit of the display unit PA, The external circuit obtains the current flowing between the first and second terminals of the drive transistor. Therefore, since it is necessary to sequentially perform image data calculations using the current, the threshold voltage is supplemented. This can indeed take a long time and consume a lot of power.

[0087] <Example of pixel configuration 3> One aspect of the present invention, viewed in view of the above, includes an image data holding unit 101 and a correction data The pixel PIX, including the holding part 104, is connected to the drive transistors included in the drive circuit part 102. The configuration includes a threshold voltage correction circuit that corrects the high-value voltage. The external circuit of the display unit PA controls the image data according to the threshold voltage of the drive transistor. Since no calculations are required, the external circuit can be omitted in the display device DD. Furthermore, the threshold voltage correction circuit applies a predetermined potential to the back gate of the drive transistor. Furthermore, by adopting a method that corrects the threshold voltage, the threshold voltage correction of the drive transistor is achieved. This eliminates the need to perform calculations on image data.

[0088] Figure 5(A) shows an example of the circuit configuration of a pixel PIX, which is a semiconductor device according to one aspect of the present invention. This is shown in Figure K.

[0089] The pixel PIX shown in Figure 5(A) consists of an image data holding unit 101 and a drive circuit unit 10 2, display element 103, correction data holding unit 104, threshold voltage correction circuit unit 105 , has. The pixel PIX shown in Figure 5(A) has a threshold voltage added to the pixel PIX in Figure 2(B). The configuration includes a positive circuit section 105.

[0090] The threshold voltage correction circuit unit 105 is electrically connected to the drive circuit unit 102.

[0091] The threshold voltage correction circuit section 105 controls the drive transistor included in the drive circuit section 102. It has a function to correct the threshold voltage. In addition, the threshold voltage correction circuit section 105 has a threshold It has switching elements, capacitive elements, etc., to hold the information for correcting the voltage. can.

[0092] The threshold voltage correction circuit section 105 is electrically connected to wiring GL, wiring VA, etc. Then, the selection signal transmitted from wiring GL, and the voltage and / or current transmitted from wiring VA can operate.

[0093] By applying the pixel PIX shown in Figure 5(A) to the display device DD, image data retention in addition to the correction of image data by the unit 101 and the correction data holding unit 104, threshold voltage correction correction of the threshold voltage of the driving transistor included in the driving circuit unit 102 by the circuit unit 105 can be performed.

[0094] Furthermore, the display device DD to which the pixel PIX shown in Figure 5(A) is applied is suitable for, for example, a display device using a light-emitting element such as an organic EL element as a display element. A light-emitting element such as an organic EL element is suitable for a display device using a light-emitting element as a display element. Since the luminance of a light-emitting element such as an organic EL element is determined by the magnitude of the current flowing through the light-emitting element, variations in the characteristics of the driving transistor that passes the current lead to deterioration in the display quality of the display device. , the luminance is determined by the magnitude of the current flowing through the light-emitting element, so if there are variations in the characteristics of the driving transistor that passes the current, this leads to deterioration in the display quality of the display device. when variations in the characteristics of the transistors occur, this leads to a reduction in the display quality of the display device. By applying the pixel PIX shown in Figure 5(A) to the device, the threshold voltage of the driving transistor can be corrected, so the current flowing through the driving transistor does not increase or decrease due to variations in transistor characteristics, and deterioration in the display quality of the display device can be prevented. Since the voltage can be corrected, the current flowing through the driving transistor will not increase or decrease due to variations in transistor characteristics, and deterioration in the display quality of the display device can be prevented. no longer increases or decreases due to variations in characteristics, and deterioration in the display quality of the display device can be prevented. . Furthermore, the correction data holding unit 104 included in the pixel PIX shown in Figure 5(A) can correct image data, thereby improving the display quality of the display device. By applying correction to the data, the display quality of the display device can be enhanced. In particular, in the case of a large-sized display device, variations in the characteristics of driving transistors tend to be large, so by applying the pixel PIX shown in Figure 5(A) to the display device, the influence of the characteristic variations can be reduced. in the case of a large-sized display device, variations in the characteristics of driving transistors tend to be large, so by applying the pixel PIX shown in Figure 5(A) to the display device, the influence of the characteristic variations can be reduced. By applying the pixel PIX shown in Figure 5(A) to the display device, the influence of the variation in characteristics can be reduced. The influence of the deviation can be reduced. Furthermore, since the threshold voltage correction is performed inside the pixel PIX, an external circuit for performing threshold voltage correction is not required, and costs can be reduced. an external circuit for performing threshold voltage correction is not required, and costs can be reduced. .

[0095] Furthermore, the configuration of the pixel PIX and its surrounding circuitry shown in Figure 5(A) is the same as in Figure 3, By omitting WSD, the correction data is generated by the source driver circuit SD, and the said correction data Alternatively, the data may be transmitted to the correction data holding unit 104 via the wiring WDL. The configuration is shown in Figure 5(B). By applying the circuit configuration shown in Figure 5(B) to the display device DD, This allows the circuit WSD to be omitted, thereby reducing the circuit area of ​​the display device DD. It is possible.

[0096] <<Example of Pixel Circuit Configuration 2>> Next, we will explain the specific circuit configuration of the pixel PIX shown in Figures 5(A) and 5(B). Figure 6(A) illustrates an example of the circuit configuration of the pixel PIX shown in Figures 5(A) and 5(B).

[0097] The pixel PIX shown in Figure 6(A) is different from the pixel PIX shown in Figure 4, with the transistor Tr The configuration includes 7 and a capacitive element C3. Also, the pixel P shown in Figure 6(A) IX is a pixel PIX shown in Figure 4, in that transistor Tr3 has a back gate. This differs from the previous statement.

[0098] The back gate of transistor Tr3 is connected to the first terminal of transistor Tr7 and the capacitive element C. The first terminal of 3 is electrically connected to the second terminal of transistor Tr7. The gate of transistor Tr7 is electrically connected to GL, and the wiring GL4 is electrically connected to GL4. The second terminal of the capacitive element C3 is connected to the second terminal of the transistor Tr3, and the transistor The first terminal of Tr4, the first terminal of transistor Tr5, and the second terminal of capacitive element C2, They are electrically connected.

[0099] Note that in this example, the second terminal of transistor Tr3, and the first terminal of transistor Tr4 , the first terminal of transistor Tr5, the second terminal of capacitive element C2, and the second terminal of capacitive element C3 2端子と、の電気的接続点をノードND3と呼称し、トランジスタTr3のバックゲート2 terminal are collectively referred to as node ND3, and the electrical connection point of the back gate of transistor Tr3 , the first terminal of transistor Tr7, and the first terminal of capacitive element C3 is referred to as node ND4.

[0100] Wiring GL4 is a selection signal line for the pixel PIX, similarly to each of the wirings GL1 to GL3, and is a wiring corresponding to the wiring GL shown in FIGS. 5(A) and 5(B).

[0101] Wiring BGL is a wiring for applying a predetermined potential to a specific node in the pixel PIX. Further, the wiring BGL can be a wiring corresponding to the wiring VA shown in FIGS. 5(A) and 5(B).

[0102] Transistor Tr7 functions as a switching element. Further, the configuration of the transistor described in Embodiment 3 can be applied to transistor Tr7. Furthermore, it is preferable that transistor Tr7 is an OS transistor, similarly to transistor Tr1, transistor Tr2, and transistor Tr5. For other matters regarding transistor Tr7, the descriptions of transistors Tr1 to Tr5 shall be referred to.

[0103] The threshold voltage correction circuit unit 105 shown in FIGS. 5(A) and 5(B) can include, for example, transistor Tr7. Note that since the drive circuit unit 102 and the threshold voltage correction circuit unit 105 share the function of holding the potential of the capacitive element C3 shown in FIG. 6(A), the capacitive element C3 ​​​​It is not possible to uniquely determine which circuit a capacitive element is included in. In other words, capacitive elements C3 is located in either the drive circuit section 102 or the threshold voltage correction circuit section 105. It can be said that...

[0104] Note that transistors Tr1, Tr2, and Tr2 are shown in Figure 6(A). 4. Transistors Tr5 and Tr7 are transistors with back gates. It may exist. The pixel PIX shown in Figure 6(B) has the same properties as the pixel PIX shown in Figure 6(A). Transistor Tr1, Transistor Tr2, Transistor Tr4, Transistor Tr5, Each of the Tr7 transistors is equipped with a back gate. In Figure 6(B) , transistor Tr1, transistor Tr2, transistor Tr4, transistor Tr5 Each of the transistors Tr7 has its gate and back gate electrically connected. A transistor in which the gate and back gate are electrically connected is an O Because the current can be increased, by using the configuration shown in Figure 6(B), the pixel P IX can be operated quickly. Note that the pixel PIX shown in Figure 6(B) is a transistor Tr1, transistor Tr2, transistor Tr4, transistor Tr5, transistor All Tr7 units are configured to have gates and back gates connected, but the back gates are separate The configuration may also involve applying potential through wiring. Furthermore, the pixel PIX shown in Figure 6(B) is Transistor Tr1, Transistor Tr2, Transistor Tr4, Transistor Tr5, All transistors Tr7 have back gates, but some transistors A configuration with only a back gate is also acceptable.

[0105] <<Example of Pixel Circuit Configuration 3>> Figure 7(A) shows a different image from the one shown in Figure 6(A), as shown in Figures 5(A) and 5(B). An example of the basic PIX circuit configuration is shown in the diagram.

[0106] The pixel PIX shown in Figure 7(A) has a transient compared to the pixel PIX shown in Figure 6(A). The configuration includes a Tr6.

[0107] The first terminal of transistor Tr6 connects to the second terminal of transistor Tr2, and to transistor T The gate of r3, the second terminal of capacitive element C1, and the first terminal of capacitive element C2 are electrically connected. The second terminal of transistor Tr6 is connected to the second terminal of transistor Tr3, and the transistor The first terminal of transistor Tr4, the first terminal of transistor Tr5, and the second terminal of capacitive element C2 The second terminal of the capacitive element C3 is electrically connected to the gate of transistor Tr6, It is electrically connected to line GL4.

[0108] Transistor Tr6 functions as a switching element. The configuration described in Embodiment 3 can be applied. Furthermore, transistor Tr6 is Similar to transistors Tr1, Tr2, and Tr5, OS transistor It is preferable that it be a sta. Regarding the other aspects of transistor Tr6, Refer to the descriptions of transistors Tr1 through Tr5.

[0109] Figure 6(A) shows the correction of the threshold voltage of the drive transistor, transistor Tr3. If you want to perform the operation with higher precision than pixel PIX, as shown in Figure 7(A), you can perform the operation with pixel PIX. It is preferable to provide an inverter Tr6. When correcting the threshold voltage, due to its operating principle The potentials between the second terminal (node ​​ND3) and node ND2 of transistor Tr3 are Since it is best to make them as equal as possible, by applying the pixel PIX shown in Figure 7(A), the threshold The potential difference between node ND3 and node ND2 during value voltage correction is shown in Figure 6(A). It can get closer to 0V than a standard PIX.

[0110] By the way, the switching function of transistor Tr6 is controlled by the drive circuit section 102 and the correction data Since the holder part 104 and the transistor Tr6 are shared, the transistor Tr6 is included in which circuit It cannot be uniquely determined whether or not it is being driven. In other words, transistor Tr6 is driving It can be said that it is contained in either the dynamic circuit unit 102 or the correction data holding unit 104. ru.

[0111] <<Example of Pixel Circuit Configuration 4>> In Figure 7(B), the PIX shown in Figures 6(A)(B) and 7(A) respectively is different. Figures 5(A) and 5(B) illustrate an example of the circuit configuration of the pixel PIX.

[0112] The pixel PIX shown in Figure 7(B) has a transient relationship with the pixel PIX shown in Figure 6(A). The configuration excludes Tr5. The pixel PIX shown in Figure 7(B) is the same as in Figures 6(A)(B). Because it has fewer transistors than the pixel PIX shown in Figure 7(A), the area of ​​the pixel circuit is smaller. This allows for a higher aperture ratio. Note that in the pixel PIX shown in Figure 7(B) If you do not want the light-emitting diode (LD) to emit light, simply do not supply current to the input terminal of the LD. Therefore, the potential applied to wiring AL is lowered in accordance with that timing, or the transistor To turn off transistor Tr3, apply a potential to the gate of transistor Tr3. To lower the potential applied to wiring AL, the potential of wiring AL is lowered compared to the potential of wiring CAT. It is preferable to make it even lower.

[0113] <Example of pixel operation> Next, we will explain the operation of the pixel circuit described above, in particular the pixel PIX shown in Figure 6(A). ru.

[0114] Figure 8 is a timing chart showing an example of the operation of the pixel PIX illustrated in Figure 6(A). The timing chart shown in Figure 8 shows the time periods before time T1, from time T1 to time T7, and time T From 7 onwards, wiring DL, wiring WDL, wiring VL, wiring BGL, wiring GL1 to wiring G This shows the change in potential at L4, nodes ND1 to ND4. Note that Figure 8 is also included. In this context, "high" refers to a high-level potential, and "low" refers to a low-level potential. Also, as shown in Figure 8... V GND This refers to the reference potential.

[0115] Furthermore, before time T1, between time T1 and time T7, and after time T7, the wiring VL Assume that V1 is always applied to the circuit and V0 is always applied to the wiring BGL. Potential V1 is set to a potential lower than the voltage supplied by wiring AL, and potential V0 is set to a potential higher than V1. Let's assume that.

[0116] In this example of operation, transistor Tr1, transistor Tr2, and transistor Transistors Tr4, Tr5, and Tr7 are, unless otherwise specified. In the ON state, it is assumed to operate in the linear region. That is, transistor Tr1 and Transistor Tr2, transistor Tr4, transistor Tr5, transistor Tr 7 and the gate voltage, source voltage, and drain voltage are within the range in which the device operates in the linear region. Assume that the pressure is appropriately biased.

[0117] Furthermore, in this example of operation, unless otherwise specified, transistor Tr3 operates in the saturation region. It is assumed to be working. That is, the gate voltage, source voltage, and drive voltage of transistor Tr3 are set. The rain voltage is assumed to be appropriately biased to a voltage within the operating range in the saturation region. Furthermore, even if the operation of transistor Tr3 deviates from the ideal saturation region, If the accuracy of the current being driven can be obtained within the desired range, then the gate of transistor Tr3 The source voltage, drain voltage, and drain voltage are assumed to be properly biased.

[0118] [Immediately before time T1] Immediately before time T1, wiring GL1 and wiring GL3 have a high-level potential, wiring GL2 and A low-level potential is applied to wiring GL4. The potential of wiring GL1 is a high-level potential. At that time, a high-level potential is present at the gates of transistors Tr1 and Tr4. Because this is applied, transistors Tr1 and Tr4 turn on. Then, the connection between wiring DL and node ND1 becomes conductive, and the connection between wiring VL and node ND3 This results in a conductive state. Also, when the potential of wiring GL2 is at a low potential, the transistor Because a low-level potential is applied to the gate of Tr2, transistor Tr2 is turned off. Therefore, the connection between wiring WDL and node ND2 becomes non-conductive. In addition, wiring When the potential of GL3 is at a high level potential, the gate of transistor Tr5 is at a high level potential. Because this is applied, transistor Tr5 turns on. In other words, the input of the light-emitting element LD There is electrical conductivity between the terminal and the first terminal of transistor Tr5. Furthermore, wiring GL4 When the potential is at a low level, the low level is applied to the gate of transistor Tr7. Therefore, transistor Tr7 is turned off. In other words, wiring BGL and node ND4 The connection between them becomes non-conductive.

[0119] Immediately before time T1, the wiring DL has a potential of V GND When the voltage is applied, the wiring WDL is A potential V1 is applied. Transistor Tr1 is in the ON state, so node N The potential of D1 is V GND This is the result. Also, since transistor Tr4 is in the ON state, Node ND3 and the wiring VL that provides potential V1 become conductive, and at this time the transistor Since Tr5 is also turned on, the potential of node ND3 will be lower than that of V1. Furthermore, a potential of V1 is applied to the wiring WDL.

[0120] By the way, the difference between the potential of node ND2 and the potential of the source of transistor Tr3 (ga If the to-source voltage is higher than the threshold voltage of transistor Tr3, Tr3 is turned ON, and depending on the gate-source voltage of transistor Tr3, the transistor The current flowing between the source and drain of transistor Tr3 is determined. When the second terminal is the source, the wiring from AL connects to transistor Tr3 and transistor T Current flows through r5 to the input terminal of the light-emitting element LD. As a result, the light-emitting element LD It emits light. In this example, the potential of node ND2 is when transistor Tr3 is off. The potential is set to such a state, and in the timing chart shown in Figure 8, the potential of node ND2 is VGND It states that.

[0121] [From time T1 to time T2 (first initialization period)] Between time T1 and time T2, wiring GL2 and wiring GL4 are at a high level potential. This is applied. This affects the respective gates of transistors Tr2 and Tr7. Because a high-level potential is applied to the transistors, transistors Tr2 and Tr7 each This turns it ON. As a result, the potential of node ND2 becomes V1, and the potential of node ND4 becomes V1. The position is V0. By the way, at node ND3, transistor Tr5 is in the ON state. Therefore, the potential remains lower than potential V1, continuing from before time T1.

[0122] [From time T2 to time T3 (second initialization period)] Between time T2 and time T3, a low-level potential is applied to wiring GL3. As a result, a low-level potential is applied to the gate of transistor Tr5, so the transistor Transistor Tr5 is turned off. Therefore, from node ND3, through transistor Tr5 No current flows through the input terminal of the light-emitting diode (LD).

[0123] Transistor Tr5 is in the OFF state, and transistor Tr4 is in the ON state. Therefore, the potential of node ND3 rises to V1. More precisely, the wiring VL and node N Since transistor Tr4 is connected to D3, the potential of node ND3 is greater than V1. It is also low but close to V1. At this time, node ND2 (gate of transistor Tr3) The potential of the terminal and the potential of node ND3 (the second terminal of transistor Tr3) are both approximately V. Since the voltage is 1, the potential between the first and second terminals of the capacitive element C2 is approximately 0V.

[0124] By the way, when applying the pixel PIX shown in Figure 7(A), from time T2 to time T3 During this time, a high-level potential is applied to the wiring GL4, so transistor Tr6 This turns on. As a result, conductivity is established between the gate and the second terminal of transistor Tr3. As a result, the potential between the first and second terminals of the capacitive element C2 becomes approximately 0V.

[0125] [From time T3 to time T4 (threshold voltage correction period)] Between time T3 and time T4, wiring GL1 and wiring GL2 are at a low level potential. This is applied to transistor Tr1, transistor Tr2, and transistor Because a low-level potential is applied to the gates of transistor Tr4 and each of the other transistors, transistor Tr1 Then, transistors Tr2 and Tr4 turn off. When r1 is turned off, a potential V is generated at the first terminal (node ​​ND1) of the capacitive element C1. GND As this is maintained and transistor Tr2 turns off, the capacitive element C1 The second terminal, the first terminal of the capacitive element C2, and the gate (node ​​ND2) of the transistor Tr3 are connected to the power supply. Position V1 is retained.

[0126] Here, the potential V1 of node ND3 and the potential of wiring AL determine the potential of transistor Tr3. Assume that a high bias is applied between the first and second terminals. In this case, the transistor Tr3 is turned ON, and current flows from the first terminal to the second terminal of transistor Tr3. It can be done.

[0127] By the way, since transistors Tr4 and Tr5 are in the off state, The potential of node ND3 is boosted by the current. Note that the first terminal of capacitive element C2 - The voltage across the second terminal is almost 0V, and transistor Tr2 is in the off state (node (Since ND2 is electrically floating), the gate-source voltage of transistor Tr3 is no The voltage of ND3 remains almost unchanged at 0V due to the voltage boost.

[0128] The potential of node ND3 is increased until transistor Tr3 is in the off state. Since the gate-source voltage of transistor Tr3 is approximately 0V, the threshold voltage of transistor Tr3 When the voltage becomes 0 or greater, or exceeds 0, transistor Tr3 is in the off state. Yes. In other words, the back gate-source voltage of transistor Tr3 is, When the voltage becomes such that the threshold voltage of 3 becomes 0, transistor Tr3 turns off. Back gate saw of transistor Tr3 to set the threshold voltage of transistor Tr3 to 0 The voltage between the screws is V C In this case, the potential at node ND3 is V0-V C This is the result.

[0129] Furthermore, since node ND2 is electrically floating, the potential of node ND3 changes from V1 to V0- V C As the voltage is boosted, the potential of node ND2 is also boosted at the same time. The boosted voltage is determined by the capacitive coupling coefficient between node ND2 and node ND3. .

[0130] Also, since transistor Tr1 is in the off state, node ND1 is also electrically floating. This is the current state. As a result, the potential of node ND2 is increased, and node ND1 The potential is also boosted. The boosted voltage at node ND1 is used between node ND1 and node ND It is determined by the capacitive coupling coefficient between 2 and 2.

[0131] Note that when applying the pixel PIX shown in Figure 7(A), the time from time T3 to time T4 In between, there is conductivity between the gate and the second terminal of transistor Tr3. The pixel PIX shown in Figure 7(A) operates in the same way as the pixel PIX shown in Figure 6(A) above. Furthermore, the operation of pixel PIX shown in Figure 7(A) from time T4 onwards is described in Figure 6 below. Refer to the explanation of the operation of the pixel PIX shown in A).

[0132] [From time T4 to T5 (correction data writing period)] Between time T4 and time T5, high-level potentials occurred in wiring GL1 and wiring GL2. A low-level potential is applied to the wiring GL4. This causes transistor Tr1 and The gates of transistors Tr2 and Tr4 are at a high level potential. Because it is applied, transistors Tr1, Tr2, and Tr4 , turns ON, and a low-level potential is applied to the gate of transistor Tr7, The transistor Tr7 is turned off. As a result, node ND4 becomes electrically floating. The potential of node ND4 is maintained by the first terminal of the capacitive element C3.

[0133] In this example, at time T4, wiring GL1, wiring GL2, and wiring GL4 Although signals are input simultaneously, in actual circuits, there is a delay between the signals sent from each wire. Because delays can occur, each signal may not be input to the pixel PIX simultaneously. When considering signal delays, the high level to wiring GL1 and wiring GL2 at time T4 The application of the potential is preferably performed after reliably placing the node ND4 in an electrically floating state . That is, the application of the low-level potential to the wiring GL4 is preferably performed before the time T4 .

[0134] Further, between time T4 and time T5, the potential V corresponding to the correction data W is applied to the wiring WDL.

[0135] Since the transistor Tr1 is in an on state, the path between the wiring DL and the node ND1 is conductive . For this reason, the potential V is applied from the wiring DL to the node ND1 GND . Also , since the transistor Tr2 is in an on state, the path between the wiring WDL and the node ND2 is conductive. For this reason, the potential V is applied from the wiring WDL to the node ND2 W .

[0136] Since the transistor Tr4 is in an on state, the path between the wiring VL and the node ND3 is conductive . For this reason, the potential V1 is applied from the wiring VL to the node ND3. Incidentally , since the transistor Tr7 is in an off state (since the node ND4 is in an electrically floating state), the no The change in the potential of the node ND3 causes the potential of the node ND4 to also change. Here, if the capacitive coupling coefficient between the node ND 3 and the node ND4 is set to 1, the potential of the node ND4 changes from V0 to V1 +V C . At this time, the back gate-source voltage of the transistor Tr3 is calculated from the voltage during the period from time T3 to time T4 Since V C remains unchanged, the threshold voltage of the transistor Tr3 from time T4 to time T5 becomes 0.

[0137] [From time T5 to time T6 (image data writing period)] Between time T5 and time T6, a low-level potential is applied to wiring GL2. As a result, a low-level potential is applied to the gate of transistor Tr2, Tr2 turns off. When transistor Tr2 turns off, the capacitive element The second terminal of C1, the first terminal of the capacitive element C2, and the gate (node ​​ND2) of the transistor Tr3. ) with potential V W It is retained.

[0138] Furthermore, between time T5 and time T6, the potential V corresponding to the image data DATA This is applied to the DL wiring.

[0139] Since transistor Tr1 is ON, the connection between wiring DL and node ND1 is The circuit becomes open. Therefore, a potential V is transmitted from wiring DL to node ND1. DATA It is applied. By the way, since transistor Tr2 is in the off state (node ​​ND2 is electrically floating), ), and the potential of node ND2 also changes as the potential of node ND1 changes. In particular, the capacitance element When the capacitance value of child C1 is sufficiently larger than the capacitance value of capacitive element C2, the node Since the capacitive coupling coefficient between ND1 and node ND2 approaches 1, node ND1 The change in potential is approximately equal to the change in potential at node ND2. In this case, node ND 2 is V DATA +V W This is the result.

[0140] [From time T6 to time T7 (image display period)] Between time T6 and time T7, a low-level potential is applied to wiring GL1. As a result, a low-level potential is applied to the gate of transistor Tr1, Tr1 turns off. When transistor Tr1 turns off, the capacitive element Potential V at the first terminal (node ​​ND1) of C1 DATA It is retained.

[0141] A low-level potential is applied to wiring GL1, and then a high-level potential is applied to wiring GL3. This applies a high-level potential to the gate of transistor Tr5, so the transistor Transistor Tr5 turns ON. When transistor Tr5 turns ON, wiring A The current flowing from L is transmitted through transistors Tr3 and Tr5 to the light-emitting element L. Since it is input to the input terminal of D, the light-emitting element LD will emit light.

[0142] In this case, the brightness of the light-emitting element LD is determined by the current flowing through the light-emitting element LD. According to Hoff's law, the current flowing through the light-emitting diode (LD) is equal to the source-drain current of transistor Tr3. Since it is approximately equal to the current flowing between the inputs, the brightness of the light-emitting element LD is equal to the current flowing through transistor Tr3. It is determined by the gate-source voltage. The gate and source of transistor Tr3 are each capacitive. Since it is electrically connected to the first and second terminals of element C2, the brightness of the light-emitting element LD is The gate potential V of transistor Tr3 DATA +V W It is determined by. Therefore, The LD (LaserDisc) emits light with a brightness corresponding to the correction data and image data.

[0143] Furthermore, at this time, a voltage is applied between the input terminal and output terminal of the light-emitting element LD. Furthermore, since a predetermined potential is applied to the wiring CAT, the second terminal of transistor Tr3 The child, the first terminal of transistor Tr4, the first terminal of transistor Tr5, and the capacitive element C The potential at the electrical connection point between the second terminal of 2 and the second terminal of the capacitive element C3 becomes higher. Since nodes ND1, ND2, and ND4 are each in an electrically floating state As the potential of the electrical connection point increases, node ND1, node ND2, and node ND1 The potentials of each ND4 may also increase due to capacitive coupling. Figure 8 shows the timing In the chart, the potentials of node ND1 and node ND2 after time T7 are as follows: Higher than the potentials of nodes ND1 and ND2 between time T7. It is showing.

[0144] As described above, for the pixel PIX shown in Figure 6(A), the timing chart in Figure 8 Correction to image data is performed by performing operations at times T1 through T7 and nearby times. This allows for correction of the threshold voltage of the drive transistor.

[0145] <Example of display device operation> By the way, if the display device DD including the pixel PIX shown in Figure 6(A) is large, then the pixel P The resistance of the wiring electrically connected to IX increases, and the threshold voltage of the drive transistor increases. Pressure correction and other processing may take time. Therefore, it may take some time for the image to be displayed correctly on the display device. When displaying information, the operating frequency of the display device may decrease.

[0146] Therefore, an example of operation considering the above will be explained. In this example of operation, as shown in Figure 6(A) A display unit PA, in which multiple pixels PIX are arranged in a matrix, is applied to the display device. I will explain it as an object.

[0147] Figure 9 shows the i-th, i+1-th, and i+2-th rows included in the display unit PA (where i is an integer greater than or equal to 3). The sequence of operations of the pixels (PIX) included in each of the following, and the transmission of data from the wiring DL. This shows the timing of the signal and the timing of data transmission from the wiring WDL. .

[0148] The times T1 to T6 shown in Figure 9 are the same as the time T1 shown in the timing chart in Figure 8. This corresponds to time T6. In other words, the periods PD1 to PD5 listed in row i are, The above-mentioned example of the operation of the pixel circuit: "First initialization period," "Second initialization period," and "Threshold voltage correction period." This corresponds to "interval," "correction data writing period," and "image data writing period." In Figure 9, For example, the time intervals for each period PD1 to PD5 are 0.5 μs, 1.5 μs, and 1 The time intervals are set to 9 μs, 2.0 μs, and 2.0 μs.

[0149] In particular, as mentioned above, when the display device including pixels (PIX) is large, the drive transistor Processing such as correcting the threshold voltage may take time. Therefore, during the period PD3 The time is set longer compared to other periods (PD1, PD2, PD4, PD5).

[0150] Furthermore, Figure 9 illustrates the operation of the pixel PIX, particularly during periods PD4 and PD5. In this operation, each pixel PIX in row i, row i+1, and row i+2 has Appropriate correction data and image data will be written to each. Therefore, In the explanation below, among the multiple pixels (PIX) in row i, row i+1, and row i+2, This section describes the pixels (PIX) in the same column.

[0151] As shown in Figure 9, in addition to the i-th row pixel PIX, there are also those in the i+1th row and i+2nd row. For each pixel PIX, the operation from period PD1 to period PD5 is performed. However, i row In row i+1 and row i+2, respectively, period PD1, period PD2, and period PD4 and period PD5 are made to not overlap. In other words, the pixels (PIX) of a certain row are in a period If any of the following conditions apply: interval PD1, period PD2, period PD4, or period PD5, then the row other than that row. The pixel PIX is set to period PD3.

[0152] In the example of the display device shown in Figure 9, the operation of data transmission from the wiring DL is as follows: Period PD GND And, period PD DATA [i-2]~Period PD DATA [i+2] and, Possesses. Period PD GND The wiring DL has a potential of V GND This is the period during which the effect is applied. PD DATA [k] (where k is an integer between i-2 and i+2) is connected to the DL wiring, k A potential corresponding to the image data to be written is applied to node ND1 of the pixel PIX in the row. This is the period of time they are there.

[0153] Furthermore, in the example of the operation of the display device shown in Figure 9, data transmission from the wiring WDL The operation is, period PD V1 And, period PD W [i-2]~Period PD W [i+2] and has Period PD V1 This is the period during which potential V1 is applied to the wiring WDL. Period PD W [k ] is the correction data to be written to the node ND2 of the pixel PIX in the kth row of the wiring WDL. The corresponding potential (V as explained in the example of the operation of the pixel circuit above) WThis corresponds to the period during which ) is applied. It is in between.

[0154] In the operation of a pixel PIX in one of multiple rows, during the period PD1 (first initialization) During this period, the potential V of node ND1 GND To achieve this, the wiring DL has a potential of V GND is applied This is what happens when the operation of period PD1 is performed in the pixel PIX of the row in question. In wiring DL, period PD GND The following operation is being performed. Also, during period PD1, To set the potential of ND2 to V1, the potential V1 is applied to the wiring WDL. When the operation of period PD1 is performed in the pixel PIX of the row, in the wiring WDL And, period PD V1 The following action is being performed.

[0155] In the operation of pixels PIX in one of multiple rows, the period PD4 (correction data During the writing period, correction data is written to node ND2, so the wiring WDL is for the correction data. A potential is applied according to the positive data. That is, the first row (where I is an integer greater than or equal to 1) In the pixel PIX, when the operation of period PD4 is being performed, in the wiring WDL, period PD W Action [I] is being performed.

[0156] In the operation of pixels (PIX) in one of multiple rows, during the period PD5 (image data) During the writing period, image data is written to node ND1, so the wiring DL contains the corresponding image. A potential is applied according to the data. In other words, in the first row of pixels PIX, during period PD5 When the operation is being performed, in the wiring DL, the period PD DATA [I] is performed Yes, they are.

[0157] As shown in Figure 9, the threshold voltage of the drive transistor at the i+1 row pixel PIX When performing the correction, the pixels (PIX) of the row in question perform the operation for period PD3. At this time, row i+1 In the eye's pixel PIX, the potential is written to node ND1 via wiring DL, wiring W Since there is no need to write the potential to node ND2 via DL, wiring DL and distribution The potential of the line WDL can be varied. Therefore, the pixel PIX of row i+1 is PD during the period. When performing operation 3, in the i-th row pixel PIX, periods PD4 and PD5 Each of these operations can change the potential of wiring DL and wiring WDL. While correcting the threshold voltage of the drive transistor for the i+1 row pixel PIX... Image data and correction data can be written to the i-th row pixel (PIX). Furthermore, as shown in Figure 9, the threshold voltage of the drive transistor for the i+2 pixel PIX is Similarly, when performing corrections, the potential of wiring DL and wiring WDL should be varied. Therefore, image data and correction data are written to the pixel PIX of row i+1. It is possible.

[0158] In Figure 9, correction data is applied to the pixels (PIX) of each row, in the order of row i to row i+2. Data and image data are being written, but correction data and image data are being written to the pixel PIX. The order of writing is not limited to Figure 9. For example, the process starts by sequentially writing to the odd-numbered rows of pixels (PIX), and then proceeds to the even-numbered rows of pixels (PIX). Alternatively, you could write to them sequentially.

[0159] Furthermore, the operation method of one aspect of the present invention is not limited to the above-described periods PD1 to PD5. In this specification, the operating periods shown in Figure 9 are classified by function and are independent of each other. This is shown as the operating period. However, in actual operation, the movement of the pixel PIX may vary. It is difficult to separate operations by function, and one operation may involve multiple other operations, or multiple operations may be involved. It is possible for one action to be involved in multiple actions. Therefore, the action duration shown in Figure 9. This is not limited to the operating periods described in the specification, but can be appropriately rephrased depending on the circumstances. Yes. Specifically, depending on the situation, the order of each operation period can be rearranged, operations can be added, And deletion can be performed. For example, in this specification, the movement of the pixel PIX shown in Figure 9 In this work, periods PD1 and PD2 are respectively called the first initialization period and the second initialization period. Although explained separately, the first and second initialization periods are performed simultaneously. Therefore, the first and second initialization periods are combined into a single initialization period. It can be written as follows.

[0160] As described above, the threshold voltage of the drive transistor for a pixel PIX in a certain row is corrected. While this is happening, the process of writing image data and correction data to the pixels (PIX) of another row will be performed. Therefore, the operating frequency of the display device decreases due to the correction of the threshold voltage of the drive transistor. This allows for suppression and enables higher operating frequencies than conventional operating methods.

[0161] <Examples of circuit configurations for source driver circuit SD and circuit WSD> Here, the pixel PIX and its surrounding circuitry are configured as shown in Figure 5(A), and the pixel PI When X performs the operation shown in the timing chart in Figure 8, the source driver circuit SD and the circuit An example of a circuit configuration with WSD will be explained.

[0162] Figure 10(A) shows the relationship between the source driver circuit SD and the circuit WSD in Figure 5(A). Examples of each circuit configuration are shown. Figure 10(A) shows the connection configuration with the pixel PIX. Therefore, the display unit PA is also shown in the diagram.

[0163] The source driver circuit SD consists of transistor Tr11, transistor Tr12, and the circuit SDa and , are included. In addition, the circuit WSD has transistor Tr13 and transistor Tr It has 14 and circuit WSDa.

[0164] In Figure 10, transistors Tr11 to Tr14 are each n-channel Although it is described as a Nell-type transistor, all of transistors Tr11 through Tr14 Alternatively, some of them may be p-channel type transistors. Also, transistor Tr11 Transistor Tr14 is preferably an OS transistor with a low off-current.

[0165] Furthermore, Figure 10 shows transistors Tr11 to Tr14 with back gates Although shown as having transistors, transistors Tr11 to Tr All or some of the 14 transistors may be transistors without back gates. Each of transistors Tr11 through Tr14 increases the on-current. The configuration is such that the back gate and the back gate are electrically connected, but transistor Tr11 All or part of the back gates of each transistor Tr14 are subjected to any potential. The configuration may also be one in which the wiring is electrically connected.

[0166] In the source driver circuit SD, the first terminal of transistor Tr11 is connected to circuit SDa. Electrically connected, the second terminal of transistor Tr11 is connected to the first terminal of transistor Tr12. The child is electrically connected to wiring DL. The gate of transistor Tr11 is connected to wiring Electrically connected to SELD, the second terminal of transistor Tr12 is electrically connected to the wiring GNDL. They are connected, and the gate of transistor Tr12 is electrically connected to the wiring SELG. ru.

[0167] Circuit SDa controls the potential V corresponding to the image in order to display the image on the display unit PA. DATA Generates the potential V DATA It has the function of outputting to the first terminal of transistor Tr11. Circuit SDa can, for example, be configured as the source driver circuit SD shown in Figure 1. In other words, circuit SDa uses a shift register SR and a latch to generate image data. The circuit LAT, the level shift circuit LVS, the digital-to-analog conversion circuit DAC, and the amplifier. It may have a circuit AMP and a data bus wiring DB. In this case, the amplifier circuit A If the output terminal of MP is electrically connected to the first terminal of transistor Tr11, good.

[0168] In circuit WSD, the first terminal of transistor Tr13 is electrically connected to circuit WSDa. The second terminal of transistor Tr13 is connected to the first terminal of transistor Tr14, and the wiring It is electrically connected to WDL. The gate of transistor Tr13 is wired SEWL. The second terminal of transistor Tr14 is electrically connected to the wiring V1L. Therefore, the gate of transistor Tr14 is electrically connected to the wiring SELV.

[0169] Circuit WSDa corrects the image displayed on the display unit PA using correction data. Potential V corresponding to the correction data W Generates the potential V W to the first terminal of transistor Tr13 It has the function to output to. Circuit WSDa, for example, is similar to circuit SDa, shift register SR, latch circuit LAT, level shift circuit LVS, and digital-to-analog conversion circuit The configuration can include a DAC, an amplifier circuit (AMP), and a data bus wiring (DB). In this case, the output terminal of the amplifier circuit AMP is the first terminal of transistor Tr13. The configuration should be one that is electrically connected to it.

[0170] Wiring SELD, SELG, SELW, and SELV are each transistors This is wiring for applying potential to the gates of transistors Tr11 through Tr14, and the Depending on the position, transistors Tr11 through Tr14 are either on or off. It is possible to switch between states.

[0171] The wiring GNDL has a reference potential V relative to the wiring DL. GND This is the wiring that provides the wiring V1L This is a wire that provides a potential V1 to the wire WDL.

[0172] Here, if the operation of the pixel PIX is the example operation shown in the timing chart in Figure 8, The operation of the source driver circuit SD and circuit WSD in 10(A) will be explained in detail.

[0173] Before time T4 and after time T5, the potential of wiring WDL is V1. Before time T4 and after time T5, the circuit WSD has a low level of wiring SELT. When a potential is applied, transistor Tr13 is turned off, and a high-level current is applied to the SELV wiring. A voltage is applied, turning on transistor Tr14. This results in, Since there is conductivity between wiring V1L and wiring WDL, the potential of wiring WDL becomes V1.

[0174] Furthermore, between time T4 and time T5, the potential of wiring WDL is V W fu Between time T4 and time T5, in circuit WSD, the wiring SELW has a high-level potential. When applied, it turns on transistor Tr13, and a low-level potential is marked on the SELV wiring. This is performed to turn off transistor Tr14. Then, circuit WSDa From there, the potential V according to the correction data W Since this is output, the potential of the wiring WDL is V W This is the result.

[0175] Before time T5 and after time T6, the potential of wiring DL is V GND It is Before time T5 and after time T6, the source driver circuit SD has wiring SEL. A low-level potential is applied to D, turning off transistor Tr11, and wiring SELG A high-level potential is applied to this point, causing transistor Tr12 to be turned on. As a result, a conductive state is created between wiring GNDL and wiring DL, and therefore the potential of wiring DL is V GND This is the result.

[0176] Furthermore, between time T5 and time T6, the potential of wiring DL is V DATA And so It is. Between time T5 and time T6, in the source driver circuit SD, the wiring SELD A high-level potential is applied, turning on transistor Tr11, and the wiring SELG is A low-level potential is applied to turn off transistor Tr12. From circuit SDa, the potential V corresponding to the image data DATA This is output, so the potential of the DL wiring is V DATA This is the result.

[0177] When the pixel PIX shown in Figure 5(A) performs the operation shown in the timing chart in Figure 8, By configuring the driver circuit SD and circuit WSD as shown in Figure 10(A), Appropriate potentials can be applied to both the linear DL and the wiring WDL in a timely manner.

[0178] Furthermore, the pixel PIX and its surrounding circuitry are configured as shown in Figure 5(B), and the pixel PIX is shown in Figure 8. When performing the operation shown in the timing chart, the source driver circuit SD is, for example, as shown in Figure 10. The circuit configuration in (B) is acceptable.

[0179] The source driver circuit SD shown in Figure 10(B) consists of transistors Tr11 to It has transistor Tr14 and circuit SDa. Regarding Tr14 and circuit SDa, the transistors Tr11 to Tr14 in Figure 10(A) Refer to the descriptions of Tr14 and circuit SDa.

[0180] Circuit SDa is connected to the first terminal of transistor Tr11 and the first terminal of transistor Tr13. And, it is electrically connected to. The second terminal of transistor Tr11 is connected to transistor Tr The first terminal of 12 is electrically connected to the wiring DL, and the second terminal of transistor Tr13 is connected to the wiring DL. It is electrically connected to the first terminal of transistor Tr14 and the wiring WDL. The second terminal of transistor Tr12 is electrically connected to the wiring GNDL, and transistor Tr The second terminal of 14 is electrically connected to wiring V1L. The gateway of transistor Tr11 The terminal is electrically connected to the wiring SELD, and the gate of transistor Tr12 is connected to the wiring SELD. Electrically connected to G, the gate of transistor Tr13 is electrically connected to wiring SEWL. The gate of transistor Tr14 is electrically connected to the wiring SELV.

[0181] Wiring SELD, SELG, SELW, SELV, V1L, and G For each of the NDLs, see wiring SELD, wiring SELG, and wiring SEL in Figure 10(A). Refer to the descriptions of W, wiring SELV, wiring V1L, and wiring GNDL.

[0182] The connection configuration of transistor Tr11, transistor Tr13, and circuit SDa is shown in Figure 5. (B) The source driver circuit SD shown is selected by choosing either wiring DL or wiring WDL. The configuration applies a potential to the selected wiring. Furthermore, circuit SDa is marked on wiring DL. The potential V corresponding to the image data for adding DATA And, supplement for applying to the wiring WDL Potential V corresponding to positive data W It has the function of generating and . Therefore, the potential V in circuit SDa DATA When generating and outputting, turn on transistor Tr11, and turn on transistor Tr By turning 13 to the OFF state, the potential V is applied to the DL wiring. DATA It can be applied to circuit S At Da, the potential V W When generating and outputting, set transistor Tr11 to the OFF state, By turning on Tr13, a potential V is generated across the wiring WDL. W It can be applied.

[0183] Also, the reference potential V is connected to the DL wiring. GND When applying the signal, turn off transistor Tr11. Then, transistor Tr12 should be turned ON. Also, the reference potential V1 When applying the signal, transistor Tr13 is turned off and transistor Tr14 is turned on. Just make it a state.

[0184] Here, assuming the operation of the pixel PIX is the example shown in the timing chart in Figure 8, The operation of the source driver circuit SD in Figure 10(B) will be explained in detail.

[0185] Before time T4 and after time T5, the potential of wiring WDL is V1. Before time T4 and after time T5, the source driver circuit SD uses SELT wiring. A low-level potential is applied to turn off transistor Tr13, and the wiring SELV This is an operation in which a high-level potential is applied to turn on transistor Tr14. As a result, a conductive state is created between wiring V1L and wiring WDL, and therefore the potential of wiring WDL is This becomes V1.

[0186] Furthermore, between time T4 and time T5, the potential of wiring WDL is V W fu Between time T4 and time T5, in the source driver circuit SD, the wiring SELT is high A level potential is applied, turning on transistor Tr13, and a low level is applied to the SELV wiring. A bell potential is applied, which turns off transistor Tr14. Then, From circuit SDa, the potential V corresponding to the correction data W As a result of the output, the potential of the wiring WDL is V W This is the result.

[0187] Before time T5 and after time T6, the potential of wiring DL is V GND It is Before time T5 and after time T6, the source driver circuit SD has wiring SEL. A low-level potential is applied to D, turning off transistor Tr11, and the wiring SELG is A high-level potential is applied, which turns on transistor Tr12. As a result, a conductive state is created between wiring GNDL and wiring DL, and the potential of wiring DL is V G ND This is the result.

[0188] Furthermore, between time T5 and time T6, the potential of wiring DL is V DATA And so It is. Between time T5 and time T6, in the source driver circuit SD, the wiring SELD A high-level potential is applied to turn on transistor Tr11, and a low-level potential is applied to the wiring SELG. A bell potential is applied, which turns off transistor Tr12. From SDa, the potential V corresponding to the image data DATA When this is output, the potential of the wiring WDL is is V DATA This is the result.

[0189] When the pixel PIX shown in Figure 5(B) performs the operation of the timing chart shown in Figure 8, - By configuring the driver circuit SD as shown in Figure 10(B), the wiring DL and wiring The appropriate potential can be applied to each WDL in a timely manner.

[0190] In this specification, the block diagrams classify the components according to their function and treat them as independent of each other. This shows the block. However, in actual circuits, the components are divided by function. It is difficult to separate the functions, and when multiple functions are involved in a single circuit, or when the functions span multiple circuits... It is possible that one function may be involved. Therefore, the blocks shown in the block diagram are specified in the specification. The constituent elements are not limited to those described above, and can be appropriately rephrased depending on the situation.

[0191] One aspect of the present invention is shown in Figures 2(A)(B), 3, and 5(A)(B) above. The present invention is not limited to pixels. One aspect of the present invention is shown in Figures 2(A)(B), 3, and 5(A). The pixel PIX configuration shown in (B) may be modified as appropriate. For example, Figure 5( In the pixel PIX shown in A)(B), there is an image data holding unit 101, a drive circuit unit 102, and The positive data holding unit 104 and the image data holding unit 101 are electrically connected to each other, but the image data holding unit 101 The electrical connection between the image data holding unit 1 and the drive circuit unit 102 may be omitted. The transmission of image data from 01 to the drive circuit unit 102 is performed via the correction data holding unit 104. This configuration may also be used. For example, between the drive circuit unit 102 and the correction data holding unit 104 The electrical connection may be omitted. In other words, from the correction data holding unit 104 to the image data holding unit Correction data is sent to 101, and the image data holding unit 101 generates corrected image data. The system may be configured to transmit the data to the drive circuit unit 102.

[0192] This embodiment may be appropriately combined with other embodiments and / or examples shown herein. It can be done.

[0193] (Embodiment 2) This embodiment describes an example of a display device configuration using an EL element as a display element. In this embodiment, the drive circuit and threshold voltage described in Embodiment 1 are used. The explanation of the pressure compensation circuit section will be omitted.

[0194] In Figure 11(A), the display unit 215 provided on the first substrate 4001 is surrounded by A sealing material 4005 is provided, and the display unit 215 is connected to the sealing material 4005 and the second substrate. It is sealed by 4006.

[0195] The display unit 215 is provided with a pixel array having the pixels PIX shown in Embodiment 1. .

[0196] Figure 11(A) shows the scan line drive circuit 221a, the signal line drive circuit 231a, and the signal line drive circuit The path 232a and the common line drive circuit 241a are each located on the printed circuit board 4041. The system has multiple integrated circuits 4042. The integrated circuits 4042 are made of single-crystal semiconductor or multi-crystalline semiconductor. It is formed of a crystalline semiconductor. Signal line driving circuits 231a and 232a are The scan line drive circuit 221a has the functionality of the source driver circuit SD shown in Embodiment 1. This has the function of the gate driver circuit GD shown in Embodiment 1. Common line drive circuit 24 1a applies a predetermined potential to a predetermined circuit element of the pixel PIX shown in Embodiment 1. It has the function of driving or supplying current. In particular, the common line drive circuit 241a and the pixel PIX, It can be electrically connected via the wiring VA shown in Embodiment 1.

[0197] Scan line drive circuit 221a, common line drive circuit 241a, signal line drive circuit 231a, and The various signals and potentials applied to the signal line drive circuit 232a are FPC (Flexible Printed Circuit). Supplied via printed circuit (4018).

[0198] The integrated circuit 4042 in the scan line drive circuit 221a and the common line drive circuit 241a is It has the function of supplying a selection signal to the display unit 215. Signal line drive circuit 231a and signal line The integrated circuit 4042 in the drive circuit 232a has the function of supplying an image signal to the display unit 215. The integrated circuit 4042 is surrounded by a sealing material 4005 on the first substrate 4001. It is implemented in a different area than the one it is currently implemented in.

[0199] The connection method for the integrated circuit 4042 is not particularly limited, and wire bonding is also an option. The swirl method, COG (Chip On Glass) method, TCP (Tape Carrier) Methods such as the Package method and the COF (Chip On Film) method can be used. ru.

[0200] Figure 11(B) shows the components included in signal line drive circuits 231a and 232a. This shows an example of implementing the integrated circuit 4042 using the COG method. It also shows part of the drive circuit or The entire system can be integrally formed on the same substrate as the display unit 215 to form a system-on-panel. can.

[0201] In Figure 11(B), the scan line drive circuit 221a and the common line drive circuit 241a are shown in the display unit. This shows an example where the circuit is formed on the same substrate as 215. The drive circuit is connected to the pixel circuit in the display unit 215. By forming them simultaneously, the number of parts can be reduced. Therefore, productivity can be increased. It is possible.

[0202] Furthermore, in Figure 11(B), the display unit 215 provided on the first substrate 4001 and the scan lines The drive circuit 221a and the common line drive circuit 241a are surrounded by a sealing material 400. 5 is provided. Furthermore, the display portion 215, the scan line driver circuit 221a, and the common line driver cir cuit 241a are provided with the second substrate 4006 thereover. Therefore, the display portion 215, the scan line driver circuit 221a, and the common line driver circuit 241a are sealed together with the display element by the first substrate 4001, the sealant 4 005, and the second substrate 4006.

[0203] Further, in FIG. 11B, an example is shown in which the signal line driver circuit 231a and the signal line driver circuit 232a are separately f ormed and mounted on the first substrate 4001, but the present invention is not limited to this configuration. Alternatively, the scan line driver circuit may be separately formed and mounted, or part of the signal line driver circuit or part of the scan line driver circuit may be separately formed and mounted.

[0204] A display device may include a panel in which a display element is sealed, and a module in which an IC or the like including a control ler is mounted on the panel.

[0205] The display portion and the scan line driver circuit which are provided over the first substrate each include a plurality of transisto rs. As the transistors, an OS transistor or a transistor including silicon in a channel formation region can be applie d.

[0206] The structure of the transistor included in the peripheral driver circuit and the structure of the transistor included in the pixel circuit of the display portion may be the same or different. All the transistors included in the peripheral driver circuit may have the same structure, or two or more types of stru ctures may be used in combination. Similarly, all the transistors included in the pixel circuit may have the same structure, or two or more types of stru ctures may be used in combination.

[0207] ​ Furthermore, an input device 4200, which will be described later, can be provided on the second substrate 4006. The configuration in which the display device shown in Figures 11(A) and (B) is equipped with an input device 4200 is a touch panel. It can be made to function.

[0208] The detection element (also called a sensor element) of the touch panel according to one embodiment of the present invention is not limited. Various sensors capable of detecting the proximity or contact of an object to be detected, such as a finger or stylus. This can be applied as a detection element.

[0209] Sensor types include, for example, capacitive, resistive, surface acoustic wave, and infrared. Various methods can be used, such as optical and pressure-sensitive methods.

[0210] In this embodiment, a touch panel having a capacitive sensing element will be used as an example for explanation. ru.

[0211] Capacitive capacitance methods include surface capacitance and projected capacitance. Shadow capacitance methods include self-capacitance methods and mutual capacitance methods. This is preferable because it enables simultaneous multi-point detection.

[0212] A touch panel according to one aspect of the present invention is formed by bonding together a separately manufactured display device and a detection element. The configuration involves configuring the detection element on one or both of the substrate supporting the display element and the opposing substrate. Various configurations can be applied, such as a configuration that includes electrodes.

[0213] Figures 12(A) and (B) show examples of touch panels. Figure 12(A) is a touch panel. This is a perspective view of 4210. Figure 12(B) is a schematic perspective view of the input device 4200. For clarity, only representative components are shown.

[0214] The touch panel 4210 has a configuration in which a display device and a sensing element, which were manufactured separately, are bonded together. That is the case.

[0215] The touch panel 4210 has an input device 4200 and a display device, and these are stacked together. It's being kicked.

[0216] The input device 4200 includes a substrate 4263, electrodes 4227 and 4228, and multiple wirings 423. 7. It has multiple wirings 4238 and multiple wirings 4239. For example, electrode 4227 is It can be electrically connected to wire 4237 or wiring 4239. Also, electrode 4228 It can be electrically connected to wiring 4239. FPC4272b has multiple wirings 423 7 and each of the multiple wires 4238 are electrically connected. IC42 is connected to FPC4272b. 73b can be provided.

[0217] Alternatively, a touch sensor may be placed between the first substrate 4001 and the second substrate 4006 of the display device. A touch sensor may be provided between the first substrate 4001 and the second substrate 4006. In addition to capacitive touch sensors, optical touch sensors using photoelectric conversion elements are also used. You may apply the "S" rule.

[0218] Figure 13 is a cross-sectional view of the area indicated by the dashed line N1-N2 in Figure 11(B). The display device shown has an electrode 4015, and the electrode 4015 is a terminal of the FPC4018. It is electrically connected via an anisotropic conductive layer 4019. Also, in Figure 13, electrode 4 015 is formed in the openings in the insulating layer 4112, insulating layer 4111, and insulating layer 4110. It is electrically connected to wiring 4014.

[0219] Electrode 4015 is formed from the same conductive layer as the first electrode layer 4030, and wiring 4014 is Source and drain electrodes of transistors 4010 and 4011 It is formed from the same conductive layer.

[0220] Furthermore, the display unit 215 and the scan line drive circuit 221a provided on the first substrate 4001 are, It has multiple transistors, and in Figure 13, transistor 40 is included in the display unit 215. 10, and the transistor 4011 included in the scan line driving circuit 221a are shown as examples. Note that in Figure 13, transistors 4010 and 4011 are labeled as bottom gates. Although a T-type transistor is used as an example, a top-gate transistor may also be used. Furthermore, transistor 4010 is the same as transistor Tr5 described in Embodiment 1. This is possible. Also, transistor 4011 is the gate driver circuit described in Embodiment 1. It can be a transistor included in GD.

[0221] In Figure 13, an insulating layer 4112 is placed on transistors 4010 and 4011. It is provided. In addition, a partition wall 4510 is formed on the insulating layer 4112.

[0222] Furthermore, transistors 4010 and 4011 are provided on the insulating layer 4102. It is also provided with an insulating layer 411. It has an electrode 4017 formed on 1. Electrode 4017 functions as a back gate electrode. It is possible.

[0223] Furthermore, the display device shown in Figure 13 has a capacitive element 4020. The capacitive element 4020 is Electrode 4021, formed by the same process as the gate electrode of lampistor 4010, and source electrode It has electrodes formed in the same process as the drain electrode. Each electrode has an insulating layer They overlap via 4103. Furthermore, the capacitive element 4020 is the same as the capacitive element described in Embodiment 1. It can be either a capacitance element C2 or a capacitive element C3.

[0224] Generally, the capacitance of a capacitive element provided in the pixel portion of a display device is determined by the transistors arranged in the pixel portion. The device is set to retain charge for a predetermined period, taking into account the leakage current of the zista, etc. The capacitance of the capacitive element should be set considering the transistor's off-current, etc.

[0225] The transistor 4010 provided in the display unit 215 is electrically connected to the display element.

[0226] Furthermore, the display device shown in Figure 13 has insulating layer 4111 and insulating layer 4102. Insulating layer 4 111 and an insulating layer 4102 are used, which is an insulating layer that is less permeable to impurity elements. Insulating layer 41 By sandwiching the transistor between layer 11 and the insulating layer 4102, impurities from the outside can penetrate into the semiconductor layer. This can prevent it.

[0227] A light-emitting element that utilizes electroluminescence is included as a display element in the display device. EL elements can be applied. EL elements contain a light-emitting compound between a pair of electrodes. It has a layer (also called the "EL layer"). Between the pair of electrodes, a voltage greater than the threshold voltage of the EL element is present. When a large potential difference is created, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting material contained in the EL layer It emits light.

[0228] Furthermore, EL elements are distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former are called organic EL elements, and the latter are called inorganic EL elements.

[0229] Organic EL elements, when a voltage is applied, emit electrons from one electrode and positive electrons from the other electrode. Each pore is injected into the EL layer. Then, these carriers (electrons and holes) recombine. This causes the luminescent organic compound to form an excited state, and then that excited state returns to the ground state. It emits light when it is activated. Because of this mechanism, such a light-emitting element is a current-excited type light-emitting element. It is called an element.

[0230] In addition to luminescent compounds, the EL layer also contains materials with high hole injection potential and high hole transport potential. Materials, hole-blocking materials, materials with high electron transport properties, materials with high electron injection properties, or bipor It may contain materials with high electron-transport and hole-transport properties.

[0231] The EL layer is produced by vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating methods. It can be formed by methods such as those listed above.

[0232] Inorganic EL elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements depending on their element configuration. It is classified as follows: Dispersed inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. It possesses a donor-acceptor level, and the luminescence mechanism utilizes donor-acceptor levels. This is acceptor-recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism involves the inner-shell electron transition of metal ions. The localized light emission method used is localized light emission. For this explanation, an organic EL element is used as the light-emitting element. do.

[0233] A light-emitting element only needs to have at least one of its pair of electrodes transparent in order to extract light. Then, a transistor and a light-emitting element are formed on the substrate, and light is emitted from the side opposite to the substrate. Top emission structures for extraction, and bottom emission structures for extraction of light from the substrate side. Bottom emission structures and dual emission structures that extract light from both sides. There are light-emitting elements with a (yon) structure, and any light-emitting element with an injection structure can be applied.

[0234] Figure 13 shows a light-emitting display device (also called an "EL display device") that uses a light-emitting element as a display element. This is an example. The light-emitting element 4513, which is a display element, is located in the display unit 215. It is electrically connected to the radiator 4010. The configuration of the light-emitting element 4513 is as follows: The structure is a laminated structure consisting of a polar layer 4030, a light-emitting layer 4511, and a second electrode layer 4031. Not limited. Depending on the direction of the light extracted from the light-emitting element 4513, the light-emitting element 451 The configuration of 3 can be changed as appropriate. Also, the light-emitting element 4513 is described in Embodiment 1. It can be used as a light-emitting LD.

[0235] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, photosensitive Using a resin material, an opening is formed on the first electrode layer 4030, and the side surface of the opening is continuous. It is preferable to form the inclined surface with a curvature.

[0236] Even if the light-emitting layer 4511 consists of a single layer, it is configured so that multiple layers are stacked. Either way is fine.

[0237] The light-emitting color of the light-emitting element 4513 depends on the material that makes up the light-emitting layer 4511, and can be white, red, green, It can be set to blue, cyan, magenta, or yellow, etc.

[0238] One way to achieve color display is to combine a light-emitting element 4513 with a white light-emitting color and a colored layer. There are two methods: one that combines the two methods, and another that provides a light-emitting element 4513 with a different emission color for each pixel. The first method is more productive than the second method. On the other hand, in the second method, each pixel has an emissive layer 451 Because it is necessary to produce different quantities of 1, it is less productive than the former method. However, the latter method This method can produce a more color-pure emission color than the former method. In addition to the latter method, By adding a microcavity structure to the optical element 4513, the color purity can be further enhanced. It is possible.

[0239] The light-emitting layer 4511 may also contain inorganic compounds such as quantum dots. For example, By using quantum dots as a light-emitting layer, they can also function as light-emitting materials.

[0240] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 4513, the second electrode A protective layer may be formed on layer 4031 and partition wall 4510. As the protective layer, silica nitride Cone, silicon nitride, aluminum oxide, aluminum nitride, aluminum oxide nitride Aluminum nitride, DLC (Diamond-Like Carbon), etc. This can be achieved. Also, the first substrate 4001, the second substrate 4006, and the sealing material The space sealed by 4005 is filled with a filler material 4514 and sealed in this way. Sea urchin, a highly airtight protective film with minimal degassing to prevent exposure to the outside air (lamination) Packaging (enclosing) can be done with film, UV-curing resin film, etc. or cover material. preferable.

[0241] In addition to inert gases such as nitrogen and argon, filler material 4514 can also be UV-curing resin. Alternatively, thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic resin, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate), etc., can be used. Also, dry filler 4514 A desiccant may be included.

[0242] The sealing material 4005 includes glass materials such as glass frit and two-component resins. Use resin materials such as room-temperature curing resins, photocurable resins, and thermosetting resins. This is possible. Furthermore, the sealant 4005 may contain a desiccant.

[0243] Additionally, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plates) may be placed on the emission surface of the light-emitting element. ), phase difference plates (λ / 4 plate, λ / 2 plate), color filters, and other optical films are appropriately provided. Alternatively, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, surface irregularities This allows for an anti-glare treatment that diffuses reflected light and reduces glare.

[0244] Furthermore, by using a microcavity structure for the light-emitting element, it is possible to extract light with high color purity. This can be done. Also, by combining a microcavity structure and a color filter, This reduces clutter and improves the visibility of the displayed image.

[0245] A first electrode layer and a second electrode layer (pixel electrode layer, common electrode layer) that apply voltage to the display element. In the counter electrode layer (also called the counter electrode layer), the direction of the light to be extracted, the location where the electrode layer is provided, Transmittance and reflectivity can be selected based on the pattern structure of the electrode layer.

[0246] The first electrode layer 4030 and the second electrode layer 4031 are made of indium containing tungsten oxide. Indium zinc oxide containing oxides, tungsten oxide, and indium acid containing titanium oxide Indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide The materials used are transparent conductive materials such as indium tin oxide with added silicon dioxide. It is possible.

[0247] Furthermore, the first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. N (Mo), Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium ( Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), chromium (Cr), cobalt (Co), nickel (Ni), chromium (Cr), cobalt (Co), cobalt (Co), cobalt (Ni), cobalt (Co Gold, such as tungsten (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag). It can be formed using one or more of the genus, its alloys, or its metal nitrides. ru.

[0248] Furthermore, the first electrode layer 4030 and the second electrode layer 4031 are made of conductive polymer (conductive polymer It can be formed using a conductive composition containing a conductive polymer (also called a rimer). Therefore, so-called π-electron conjugated conductive polymers can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives A conductor, or a copolymer consisting of two or more of aniline, pyrrole and thiophene. Examples include its derivatives.

[0249] Furthermore, transistors are susceptible to damage from static electricity, etc., so a protective circuit is needed to protect the drive circuit. It is preferable to provide a path. The protection circuit is preferably constructed using nonlinear elements.

[0250] This embodiment may be appropriately combined with other embodiments and / or examples shown herein. It can be done.

[0251] (Embodiment 3) In this embodiment, it can be used in a semiconductor device or display device according to one aspect of the present invention. Let's explain the configuration of a transistor.

[0252] A semiconductor device or display device according to one aspect of the present invention includes a bottom-gate type transistor and It can be fabricated using various types of transistors, such as top-gate transistors. Therefore, the semiconductor layer materials and transistor structure used will be adjusted to match the existing manufacturing line. It can be easily replaced.

[0253] [Bottom-gate transistor] Figure 14(A1) shows a channel-protected transistor, which is a type of bottom-gate transistor. This is a cross-sectional view of transistor 810. In Figure 14(A1), transistor 810 is located on substrate 7. It is formed on 71. Also, the transistor 810 has an insulating layer 772 on the substrate 771. It has an electrode 746 via an insulating layer 726. It has the following characteristics. Electrode 746 can function as a gate electrode. The insulating layer 726 is a gate insulating layer. It can function.

[0254] Furthermore, an insulating layer 741 is provided on the channel formation region of the semiconductor layer 742. In contact with a portion of 742, electrodes 744a and 744b are located on the insulating layer 726. Electrode 744a can function as either the source electrode or the drain electrode. Electrode 744b is , can function as either the source electrode or the other of the drain electrode. Part of electrode 744a, and A portion of the electrode 744b is formed on the insulating layer 741.

[0255] The insulating layer 741 can function as a channel protection layer. The insulating layer 741 is placed on the channel formation region. By providing 1, the semiconductor layer 742 that is formed when electrodes 744a and 744b are formed Exposure can be prevented. Therefore, when forming electrodes 744a and 744b, the semiconductor This prevents the channel formation region of layer 742 from being etched. One embodiment of the present invention According to the manufacturer, it is possible to realize transistors with good electrical characteristics.

[0256] Furthermore, transistor 810 has an insulating layer 741 on electrode 744a, electrode 744b and insulating layer 741. It has an edge layer 728 and an insulating layer 729 on top of the insulating layer 728.

[0257] When an oxide semiconductor is used for the semiconductor layer 742, the electrodes 744a and 744b are small Even if not present, the part in contact with semiconductor layer 742 will have oxygen removed from a portion of semiconductor layer 742, resulting in oxygen depletion. It is preferable to use a material capable of causing damage. Oxygen vacancies in semiconductor layer 742 In the region where this occurs, the carrier concentration increases, and the region becomes n-type, and the n-type region (n + (layer) Therefore, the region can function as either a source region or a drain region. When an oxide semiconductor is used for semiconductor layer 742, oxygen is removed from semiconductor layer 742, resulting in an oxygen vacancy. Examples of materials capable of producing this include tungsten and titanium. Cut.

[0258] By forming a source region and a drain region in the semiconductor layer 742, the electrode 744 The contact resistance between electrode 744b and semiconductor layer 742 can be reduced. To improve the electrical characteristics of the transistor, such as field effect mobility and threshold voltage. It is possible.

[0259] When a semiconductor such as silicon is used for the semiconductor layer 742, the semiconductor layer 742 and the electrode 744 Between a, and between semiconductor layer 742 and electrode 744b, an n-type semiconductor or a p-type semiconductor is used. It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. It can function as either the source or drain region of a transistor.

[0260] The insulating layer 729 prevents or reduces the diffusion of impurities from the outside into the transistor. It is preferable to form it using a material that has the necessary properties. Furthermore, the insulating layer 729 may be omitted if necessary. It can also be abbreviated.

[0261] The transistor 811 shown in Figure 14(A2) has a back gate electrode on the insulating layer 729. It differs from the transistor 810 in that it has an electrode 723 that can function. It can be formed using the same materials and methods as for the 746.

[0262] Generally, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode are semiconductors. It is positioned so as to sandwich the channel-forming region of the body layer. Therefore, the back gate electrode is the gate It can function similarly to an electrode. The potential of the buck gate electrode is the same potential as the gate electrode. It may be set to ground potential (GND potential) or any other potential. By changing the potential of the gate electrode independently of the gate electrode, the transistor's performance can be controlled. The key voltage can be changed.

[0263] Both electrodes 746 and 723 can function as gate electrodes. Insulating layers 726, 728, and 729 are each connected to the gate insulating layer. It can function in this way. The electrode 723 is provided between the insulating layer 728 and the insulating layer 729. You may leave it.

[0264] Note that when one of the electrodes 746 or 723 is referred to as the "gate electrode," the other is referred to as the "ba This is called a "gate electrode." For example, in transistor 811, electrode 723 is called a "gate electrode." When referring to "electrodes," electrode 746 is called the "back gate electrode." Also, electrode 723 is called the "gate electrode." When used as a "top-gate electrode", transistor 811 is a top-gate type transistor. It can be considered as one type. Also, either electrode 746 or electrode 723 is considered as "the It is sometimes called the "first gate electrode" and the other the "second gate electrode."

[0265] By providing electrodes 746 and 723 with the semiconductor layer 742 in between, further, electrode 7 By setting 46 and electrode 723 to the same potential, carriers flow in semiconductor layer 742. As the region becomes larger in the film thickness direction, the amount of carrier movement increases. As a result, As the on-current of transistor 811 increases, the field-effect mobility also increases.

[0266] Therefore, transistor 811 has a large on-current relative to its occupied area. It is a transistor. That is, the area occupied by transistor 811 relative to the required on-current. This can be made smaller. According to one aspect of the present invention, the occupied area of ​​the transistor can be reduced. Therefore, according to one aspect of the present invention, a semiconductor device with a high degree of integration can be realized. It is possible.

[0267] Furthermore, since the gate electrode and back gate electrode are formed of a conductive layer, the outside of the transistor A function to prevent the electric field generated from acting on the semiconductor layer in which the channel is formed (especially electrostatic) It has an electric field shielding function against gas, etc. Furthermore, the back gate electrode is larger than the semiconductor layer. By forming it in a specific way and covering the semiconductor layer with a back gate electrode, the electric field shielding function can be enhanced. ru.

[0268] Furthermore, by forming the back gate electrode with a light-shielding conductive film, the back gate electrode This prevents light from entering the semiconductor layer from the polar side. Therefore, photodegradation of the semiconductor layer is prevented. This prevents degradation of electrical characteristics, such as a shift in the transistor's threshold voltage. ru.

[0269] According to one aspect of the present invention, a transistor with good reliability can be realized. This enables the realization of highly reliable semiconductor devices.

[0270] Figure 14(B1) shows a channel-protected transistor, which is a type of bottom-gate transistor. A cross-sectional view of transistor 820 is shown. Transistor 820 is almost identical to transistor 810. It has the same structure, but differs in that the insulating layer 741 covers the edge of the semiconductor layer 742. Furthermore, in the opening formed by selectively removing a portion of the insulating layer 741 that overlaps with the semiconductor layer 742, In this configuration, the semiconductor layer 742 and the electrode 744a are electrically connected. In another opening formed by selectively removing a portion of the insulating layer 741 that overlaps with the semiconductor layer, 742 and electrode 744b are electrically connected. The channel-forming region of the insulating layer 741 overlaps with the surrounding area. This region can function as a channel protection layer.

[0271] The transistor 821 shown in Figure 14(B2) has a back gate electrode on the insulating layer 729. It differs from transistor 820 in that it has an electrode 723 that can function.

[0272] By providing the insulating layer 741, the semiconductor generated during the formation of electrodes 744a and 744b is prevented. Exposure of body layer 742 can be prevented. Thus, the formation of electrodes 744a and 744b This can sometimes prevent the semiconductor layer 742 from becoming thinner.

[0273] Furthermore, transistors 820 and 821 are transistors 810 and The distance between electrode 744a and electrode 746, and between electrode 744b and electrode 811 are different from those of the lampistor 811. The distance between electrodes 746 increases. Therefore, parasitic capacitance is generated between electrodes 744a and 746. This can reduce the parasitic capacitance between electrode 744b and electrode 746. It can be cut. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized. can.

[0274] The transistor 825 shown in Figure 14(C1) is a bottom-gate type transistor. This is a channel-etched transistor. Transistor 825 has an insulating layer 741 Electrodes 744a and 744b are formed without using . Therefore, electrodes 744a and When electrode 744b is formed, a portion of the exposed semiconductor layer 742 may be etched. On the other hand, since the insulating layer 741 is not provided, the productivity of transistors can be increased.

[0275] The transistor 826 shown in Figure 14(C2) has a back gate electrode on the insulating layer 729. It differs from transistor 825 in that it has an electrode 723 that can function.

[0276] [Top-gate transistor] The transistor 842 shown in Figure 15(A1) is a top-gate type transistor. There are two. Transistor 842 has an insulating layer 729 formed, and then electrodes 744a and electrodes The points forming 744b are transistors 810, 811, 820, 821, 825, and 826. This is different. Electrodes 744a and 744b are formed in insulating layers 728 and 729. The opening is electrically connected to the semiconductor layer 742.

[0277] Furthermore, a portion of the insulating layer 726 that does not overlap with electrode 746 is removed, and electrode 746 and the remaining insulating layer are removed. By using layer 726 as a mask to introduce impurity 755 into semiconductor layer 742, Impurity regions can be formed in layer 742 through self-alignment. See Figure 15(A3). In transistor 842, the insulating layer 726 extends beyond the edge of electrode 746. It has a region that extends. Impurities 755 are introduced through the insulating layer 726 of the semiconductor layer 742. The impurity concentration in the affected region is higher than that in the region where impurity 755 was introduced without going through the insulating layer 726. It becomes smaller. Therefore, the semiconductor layer 742 has an LDD (Lig A (hyptly Doped Drain) region is formed.

[0278] The transistor 843 shown in Figure 15(A2) has an electrode 723 at the point where it is the transistor 8 It is different from 42. Transistor 843 has electrodes 723 formed on substrate 771. Electrode 723 has a region that overlaps with semiconductor layer 742 via insulating layer 772. 3 can function as a back gate electrode.

[0279] Also, transistor 844 shown in Figure 15(B1) and transistor shown in Figure 15(B2) As in the case of sta845, the entire insulating layer 726 in the region that does not overlap with electrode 746 may be removed. Also, transistor 846 shown in Figure 15(C1) and transistor shown in Figure 15(C2) As with ST847, the insulating layer 726 may be left intact.

[0280] Transistors 842 through 847 also form electrodes 746 after the electrode 74 By using 6 as a mask to introduce impurity 755 into semiconductor layer 742, semiconductor layer 74 2. An impurity region can be formed in a self-aligned manner. According to one aspect of the present invention, A transistor with good characteristics can be realized. Furthermore, according to one aspect of the present invention, This makes it possible to realize semiconductor devices with high product density.

[0281] This embodiment may be appropriately combined with other embodiments and / or examples shown herein. It can be done.

[0282] (Embodiment 4) In this embodiment, it can be used in the OS transistor described in the above embodiment. CAC-OS (Cloud-Aligned Composite) is a metal oxide. Oxide Semiconductor), and CAAC-OS (c-axis Al Structure of igned Crystalline Oxide Semiconductor The composition will be explained. Note that in the specification, CAC is an example of a function or material composition. CAAC represents an example of a crystal structure.

[0283] <Composition of metal oxides> CAC-OS or CAC-metal oxide is a material in which some parts are conductive. It has both electrical and insulating properties in some parts of the material, and the material as a whole has semiconductor properties. Furthermore, CAC-OS or CAC-metal oxide is used to activate the transistor. When used in layers, the conductive function is the function of allowing electrons (or holes) that act as carriers to flow. In other words, the insulating function is the function of preventing the flow of electrons, which act as carriers. Conductive function and insulating function By making the functions of sex and other functions work complementaryly, a switching function (On / O) is created. To impart a function (to cause ff) to CAC-OS or CAC-metal oxide. This can be done. In CAC-OS or CAC-metal oxide, each instrument By separating the functions of both, it becomes possible to maximize the capabilities of both.

[0284] Furthermore, CAC-OS or CAC-metal oxide provides conductive and insulating properties. It has conductive regions. The conductive regions have the conductive function described above, and the insulating regions have the insulating function described above. It has the function of being conductive. Furthermore, within the material, the conductive region and the insulating region are separated by nanoparticles. In some cases, they are separated by a bell. Also, conductive regions and insulating regions are located within the material. It may be unevenly distributed. Also, the conductive region appears blurred around the edges and connected in a cloud-like manner when observed. There are cases where this can happen.

[0285] Furthermore, in CAC-OS or CAC-metal oxide, the conductive region and The insulating region is defined as 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. They may be dispersed in the material in sizes smaller than m.

[0286] Furthermore, CAC-OS or CAC-metal oxide have different band gaps. It is composed of components having [a certain characteristic]. For example, CAC-OS or CAC-metal ox The ide consists of a component with a wide gap due to the insulating region and a component with a wide gap due to the conductive region. It consists of a component having a narrow gap. In this configuration, when the carrier is flowing... In components with a narrow gap, the carrier mainly flows. The component with a gap acts complementaryly with the component with a wide gap, and the component with a narrow gap In conjunction with the components that perform this action, carriers also flow to components with a wide gap. Therefore, the above CAC-OS or CAC-metal oxide in the channel formation region of the transistor When used in this way, a high current driving force, i.e., a large on-current, is required in the transistor's on state. Furthermore, high field-effect mobility can be obtained.

[0287] In other words, CAC-OS or CAC-metal oxide is a matrix composite Material (matrix composite), or metal matrix composite material (metal It can also be called a matrix composite.

[0288] <Structure of metal oxides> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include CAAC-OS and polycrystalline oxide semiconductors. , nc-OS(nanocrystalline oxide semiconductor or), pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like) Examples include oxide semiconductors and amorphous oxide semiconductors.

[0289] CAAC-OS has c-axis orientation and multiple nanocrystals are linked in the ab-plane direction. It has a crystalline structure that is linked and distorted. Note that distortion refers to the linkage between multiple nanocrystals. Within a region, between a region with a aligned grid arrangement and another region with a aligned grid arrangement, the grid arrangement This refers to the point where the orientation has changed.

[0290] Nanocrystals are based on a hexagonal shape, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also cases where the distortion has a grid arrangement such as pentagons and heptagons. Furthermore, in CAAC-OS, even near strain, clear grain boundaries (grain bows) are present. It is not possible to confirm (also called 'ndary') crystal grains. In other words, due to the distortion of the lattice arrangement, It can be seen that the formation of the boundary is suppressed. This is because CAAC-OS is in the ab-plane direction. The oxygen atoms are not densely arranged, and the substitution of metal elements reduces the bond distance between atoms. This is thought to be because the distortion can be tolerated through changes and other processes.

[0291] Furthermore, CAAC-OS consists of a layer containing indium and oxygen (hereinafter referred to as the In layer), and A layered crystal in which layers containing element M, zinc, and oxygen (hereinafter referred to as (M,Zn) layers) are stacked. It tends to have a structure (also called a layered structure). Note that indium and element M are relative to each other. It is interchangeable, and if element M in the (M,Zn) layer is replaced with indium, then (In,M,Zn It can also be represented as a layer. Furthermore, if the indium in the In layer is replaced by element M, (In, It can also be represented as layer M.

[0292] CAAC-OS is a highly crystalline oxide semiconductor. On the other hand, CAAC-OS has a clear Since grain boundaries cannot be identified, a decrease in electron mobility caused by grain boundaries occurs. It can be said that it is difficult. Also, the crystallinity of oxide semiconductors is affected by the inclusion of impurities and the formation of defects. Because it may decrease, CAAC-OS is an oxidation product with fewer impurities and defects (such as oxygen deficiencies). It can also be called a material semiconductor. Therefore, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. Furthermore, CAAC-OS is designed to withstand high temperatures (so-called thermal budgets) in the manufacturing process. It is also stable. Therefore, when using CAAC-OS in OS transistors, the manufacturing process This will allow for greater flexibility.

[0293] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. Also, nc-OS has different na No regularity is observed in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the entire film. Therefore, depending on the analytical method, nc-OS may be a-like OS or amorphous oxide semiconductor. It can sometimes be indistinguishable from the body.

[0294] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-lik e OS has lower crystallinity compared to nc-OS and CAAC-OS.

[0295] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and n It may have two or more types of c-OS and CAAC-OS.

[0296] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0297] Furthermore, by using the above oxide semiconductor in transistors, transistors with high field-effect mobility can be produced. It is possible to realize a zista. Furthermore, it is possible to realize a highly reliable transistor. ru.

[0298] Furthermore, it is preferable to use an oxide semiconductor with a low carrier density for the transistor. When lowering the carrier density of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film is The degree should be lowered, and the defect level density should be lowered. In this specification, the impurity concentration is low, A low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic. For example, oxides. Semiconductors have a carrier density of 8 × 10⁻¹⁰ 11 / cm 3 Less than 1 × 10 11 / cm 3 Less than 1 × 10 10 / cm 3 It is less than 1 × 10 -9 / cm 3 The above and That's all you need to do.

[0299] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a defect level density of Because the level is low, the trap level density may also be low.

[0300] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor to disappear is... It can behave for a long time, almost like a fixed charge. Therefore, the trap level density is high. Transistors in which a channel formation region is formed in an oxide semiconductor have unstable electrical properties. There are cases where this occurs.

[0301] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is Reducing it is effective. Furthermore, in order to reduce the impurity concentration in oxide semiconductors, It is also preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, and Examples include potassium metals, alkaline earth metals, iron, nickel, and silicon.

[0302] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0303] In oxide semiconductors, if silicon or carbon, which are among the Group 14 elements, are present, oxidation occurs. Defect levels are formed in silicon semiconductors. Therefore, in oxide semiconductors, silicon and carbon The concentration of the element and the concentrations of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) The concentration obtained by (SIMS) is 2 × 10 18 atoms / cm 3 The following is preferable is 2 x 10 17 atoms / cm 3 The following applies:

[0304] Furthermore, if an alkali metal or alkaline earth metal is present in the oxide semiconductor, the defect levels will be may form and generate carriers. Therefore, alkali metal or alkaline earth metal A transistor using an oxide semiconductor containing the above tends to have normally-on characteristics. For this reason, reducing the concentration of alkali metal or alkaline earth metal in the oxide semiconductor is preferable. Specifically, the concentration of alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0305] Further, when nitrogen is contained in an oxide semiconductor, electrons as carriers are generated, and carrier density increases, which facilitates n-type conversion. As a result, a transistor using an oxide semiconductor containing nitrogen for a semiconductor tends to have normally-on characteristics. Therefore, in the oxide semiconductor , it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration in the oxide semiconductor in SIMS is less than 5×10 19 atoms / cm 3 , preferably 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, further preferably 5×10 17 atoms / cm 3 or less.

[0306] Further, hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to form water, so that oxygen vacancies may be formed. When hydrogen enters the oxygen vacancies, electrons as carriers may be generated. In addition, part of hydrogen is bonded to oxygen bonded to a metal atom, and car- may generate electrons that serve as carriers. Therefore, when an oxide semiconductor containing hydrogen is used the resulting transistor tends to have normally-on characteristics. For this reason, hydrogen in the oxide semiconductor is preferably reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SI MS is set to 1×10 20 atoms / cm 3 or less, preferably 1× 10 19 atoms / cm 3 or less, more preferably 5×10 18 atoms / cm 3 or less still more preferably 1×10 18 atoms / cm 3 or less.

[0307] By using an oxide semiconductor with sufficiently reduced impurities for a channel formation region of a transistor stable electrical characteristics can be imparted.

[0308] Note that this embodiment can be appropriately combined with any other embodiment and / or example described in this specification that is presented in this specification.

[0309] (Embodiment 5) In this embodiment, product examples in which the semiconductor device or display device described in the above embodiments is applied to an electronic device will be described.

[0310] <Notebook personal computer> The semiconductor device or display device of one embodiment of the present invention can be applied to a display included in an information terminal device . FIG. 16(A) illustrates a notebook personal computer which is a type of information terminal device and includes a housing 5401, a display portion 5402, a keyboard 5403, a pointing device 5404, and the like. ​

[0311] <Smartwatch> A semiconductor device or display device according to one aspect of the present invention can be applied to a wearable terminal. Figure 16(B) shows a smartwatch, a type of wearable device, with a housing 59 01, display unit 5902, operation buttons 5903, control element 5904, band 5905, etc. In addition, a display device with a function as a position input device is used in the display unit 5902. It may also be done in this way. Furthermore, the function as a position input device may be achieved by providing a touch panel on the display device. It can be added by doing so. Alternatively, the function as a position input device is photocenter It can also be added by installing a photoelectric conversion element, also known as a photo-scan element, in the pixel section of the display device. Also, the operation button 5903 is a power switch to activate the smartwatch, and the smartwatch Buttons for operating the watch's application, volume control buttons, or display unit 5902 It can be equipped with either a switch to turn it on or off. Also, Figure 16( In the smartwatch shown in B), the number of operation buttons 5903 is shown as 2, but The number of operation buttons on the watch is not limited to this. Also, the operator 5904 is It functions as a crown for setting the time on a smartwatch. Also, the control part 5904 In addition to setting the time, it also has an input interface for operating smartwatch applications. It may also be used as a face. Note that the smartwatch shown in Figure 16(B) The configuration includes an operator 5904, but is not limited to this; the operator 5904 can be used It is also acceptable to have a configuration that does not include this feature.

[0312] <Video camera> A semiconductor device or display device according to one aspect of the present invention can be applied to a video camera. The video camera shown in Figure 16(C) consists of a first housing 5801, a second housing 5802, and a display unit 5 It has 803, operation key 5804, lens 5805, connection part 5806, etc. Operation key 58 04 and lens 5805 are provided in the first housing 5801, and the display unit 5803 is in the second housing It is located in body 5802. And the first housing 5801 and the second housing 5802 are connected. They are connected by part 5806, and the angle between the first housing 5801 and the second housing 5802 is, The connection part 5806 can be used to change the video displayed in the display unit 5803. A configuration that switches according to the angle between the first housing 5801 and the second housing 5802 in 6. You may do so.

[0313] <Mobile phone> A semiconductor device or display device according to one aspect of the present invention can be applied to a mobile phone. 16(D) is a mobile phone with information terminal functionality, comprising a housing 5501 and a display unit 5502 It has a microphone 5503, a speaker 5504, and operation buttons 5505. It also has a display unit 55 Alternatively, a display device with added functionality as a position input device may be used for 02. Furthermore, the function as a position input device can be added by providing a touch panel on the display device. This is possible. Alternatively, its function as a position input device is a photoelectric conversion, also known as a photosensor. The element can also be added by providing it in the pixel section of the display device. Also, the operation button 5 505 has a power switch to turn on the mobile phone and buttons to operate mobile phone applications. The volume control buttons, or switches to turn the display unit 5502 on or off, etc. It can be equipped with either.

[0314] Furthermore, the mobile phone shown in Figure 16(D) has two operation buttons 5505. However, the number of control buttons on a mobile phone is not limited to this. Also, although not shown in the diagram... The mobile phone shown in Figure 16(D) is equipped with a light-emitting device for use as a flashlight or illumination. It may also be a configuration that includes a placement.

[0315] <Television equipment> A semiconductor device or display device according to one aspect of the present invention can be applied to a television apparatus. The television setup shown in Figure 16(E) consists of a housing 9000, a display unit 9001, and a speaker. CA9003, Operation Key 9005 (including power switch or operation switch), Connection Terminals It has 9006, etc. Television equipment has a large screen, for example, 50 inches or more, It is possible to incorporate a display unit 9001 with a screen size of 100 inches or larger.

[0316] <Mobile> A semiconductor device or display device according to one aspect of the present invention is suitable for use around the driver's seat of a mobile vehicle. It can be used.

[0317] For example, Figure 16(F) is a diagram showing the area around the windshield inside a car. Figure 16(F) shows the display panel 5701 and display panel 5 mounted on the dashboard. In addition to display panel 5703 (702), a display panel 5704 mounted on the pillar is also shown. It is.

[0318] Display panels 5701 to 5703 display navigation information, speedometer - Displays the tachometer, mileage, fuel gauge, gear status, air conditioning settings, etc. It can provide various information. Also, the display items and layouts displayed on the display panel The OUTS and other elements can be changed as needed to suit the user's preferences, enhancing the design. This is possible. Display panels 5701 to 5703 can be used as lighting devices. It is also possible.

[0319] The display panel 5704 displays images from an imaging device installed on the vehicle body. This allows for the correction of the blind spot (view obstructed by the pillars). In other words, on the outside of the car... By displaying images from the provided imaging means, blind spots are compensated for, and safety is enhanced. This is possible. Furthermore, by displaying images that fill in the gaps in the unseen areas, it becomes more natural and less jarring. Safety checks can be performed without any problems. The display panel 5704 can also be used as a lighting device. can.

[0320] <Electronic devices for electronic advertising> A semiconductor device or display device according to one aspect of the present invention is a display for use in electronic advertising. It can be applied. Figure 17(A) shows an electronic sign (digital sign) that can be mounted on a wall. This shows an example of signage. Figure 17(A) shows an electronic sign 6200 mounted on a wall 6201. This shows the situation.

[0321] <Foldable tablet-type information terminal> A semiconductor device or display device according to one aspect of the present invention is applied to a tablet-type information terminal. This is possible. Figure 17(B) shows a tablet-type information display with a foldable structure. This shows the terminal. The information terminal shown in Figure 17(B) consists of housing 5321a and housing 5321b It also has a display unit 5322 and an operation button 5323. In particular, the display unit 5322 is It has a flexible base material, and the base material enables a foldable structure. Cut.

[0322] Furthermore, housing 5321a and housing 5321b are connected by hinge portion 5321c. The hinge portion 5321c allows it to be folded in half. Also, the display portion 532 2 is provided in the housing 5321a, housing 5321b, and hinge portion 5321c.

[0323] Also, although not shown in the illustrations, see Figures 16(A) to (C), (E), and Figures 17(A), (B). The electronic device shown may have a configuration that includes a microphone and a speaker. With this configuration, For example, the aforementioned electronic device can be equipped with a voice input function.

[0324] Also, although not shown in the diagrams, see Figures 16(A), (B), (D), and 17(A), (B). The electronic device may be configured to include a camera.

[0325] Furthermore, although not shown in the diagrams, the electric current shown in Figures 16(A) to (F) and Figures 17(A) and (B) The sub-device has sensors inside the housing that measure force, displacement, position, velocity, acceleration, angular velocity, rotational speed, and distance. Light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power, radiation (including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared radiation) It may also be a configuration. In particular, the mobile phone shown in Figure 16(D) may have a gyroscope, accelerometer, etc. By providing a detection device that has a sensor to detect the tilt, the orientation of the mobile phone (vertical direction) can be determined. The system determines the orientation of the mobile phone relative to the direction, and displays the screen of the display unit 5502. The display can be automatically switched according to the orientation of the mobile phone.

[0326] Furthermore, although not shown in the diagrams, the electric current shown in Figures 16(A) to (F) and Figures 17(A) and (B) The sub-device was configured to have a device that acquires biometric information such as fingerprints, veins, irises, or voiceprints. This configuration may be applied to realize an electronic device with biometric authentication functionality. It is possible.

[0327] Furthermore, as the display unit of the electronic device shown in Figures 16(A) to (E) and Figure 17(A), a flexible A substrate having flexibility may be used. Specifically, the display part is made on a flexible substrate. The system may also be configured to include an inverter, a capacitive element, and a display element. As a result, the electronic devices shown in Figures 16(A) to (E) and Figure 17(A) are flat. This includes not only enclosures with flat surfaces, but also curved parts such as the dashboard and pillars shown in Figure 16(F). This makes it possible to realize electronic devices with enclosures that have surfaces.

[0328] Flexible material applicable to the display section in Figures 16(A) to (F) and Figures 17(A) and (B). As an example of a substrate, a material that is transparent to visible light is polyethylene telescopic. Phthalate resin (PET), polyethylene naphthalate resin (PEN), polyethers Polyfone resin (PES), polyacrylonitrile resin, acrylic resin, polyimide resin, Polymethyl methacrylate resin, polycarbonate resin, polyamide resin, polycyclo Refin resin, polystyrene resin, polyamide-imide resin, polypropylene resin, polyethylene Sterling resins, polyhalogenated vinyl resins, aramid resins, epoxy resins, etc. are used. This can be done. Furthermore, these materials may be mixed or layered.

[0329] This embodiment may be appropriately combined with other embodiments and / or examples shown herein. It can be done. [Examples]

[0330] <Calculation and Results 1> In the PIX pixel circuit configuration shown in Figure 6(A), the threshold voltage of the drive transistor is To verify whether the correction operation is being performed correctly, a circuit simulator is used. The calculation was performed. Here, transistor Tr3 corresponds to the drive transistor for the pixel PIX. The threshold voltage is set to 0V, and the threshold voltage is intentionally changed from 0V to create a light-emitting element. I will now explain the results of calculating the change in the current flowing through the LD.

[0331] The software used in this calculation is Gateway(versi) from SILVACO. This is a circuit simulator called on 3.4.1.R). Using this simulator, The rate of change of current in the light-emitting element LD in response to the change in the threshold voltage Vth of the transistor Tr3 is measured. The calculation was performed. The threshold voltage Vth after the change was calculated as -1V, -0.5V, 0V, 0.5V, We calculated the rate of change of current for each of the five conditions under 1V.

[0332] Under the conditions of the calculation, V corresponds to the image data. data Set it to 5V and add it to the correction data. Corresponding V W The voltage was set to 5V. Also, in the wiring electrically connected to the pixel PIX, The high-level potential applied to wiring GL1 to GL4 is set to 15V, and the low-level potential is set to -5V. The potential of wiring VL is set to 0.5V, the potential of wiring BGL is set to -10V, and the potential of wiring AL is set to 1 The reference potential V is set to 3V and applied to the CAT wiring. GND We set it to -4V.

[0333] Furthermore, when the threshold voltage Vth of transistor Tr3 is changed from 0V, the light-emitting element... The current flowing through LD is I EL Assuming that the change in the threshold voltage is 0, i.e., the drive transistor The current flowing through the light-emitting element LD when the threshold voltage of the terminal is 0 is I EL0 To, I EL -I E L0 =ΔI EL Let's assume that the current change rate of the light-emitting element LD obtained in the calculation is ΔI E L / I EL The calculation was performed using a multiplier of 100%.

[0334] The results of the calculation are shown in Figure 18. Figure 18 shows the change in threshold voltage Vth from -1V. This shows the rate of change of current in the light-emitting diode (LD) when the voltage is up to 1V. Therefore, if the threshold voltage Vth is between -1V and 1V, the rate of current change is approximately -10%. It can be seen that it is kept within the range of 10%.

[0335] Generally, when a transistor operates in the saturation region, the amount of current flowing through that transistor is Because it is proportional to the square of the difference between the gate-source voltage and the threshold voltage, the threshold voltage changes slightly. Simply by changing this, the change in the current flowing through the transistor becomes very large. On the other hand, Figure 6(A) In the calculation results for the pixel PIX circuit configuration shown, the rate of change of current is approximately -10% to 10%. Because it is kept within a certain range, the threshold voltage of transistor Tr3 is appropriately corrected. It can be seen that this is happening.

[0336] As mentioned above, when correcting the threshold voltage of the drive transistor for a pixel PIX in a certain row (Between time T3 and time T4 in Figure 8, or period PD3 in Figure 9) By writing correction data and image data to the pixels (PIX) in the row, the display device The operating frequency can be increased.

[0337] This embodiment can be appropriately combined with the embodiments described in this specification or with other embodiments. It is possible. [Examples]

[0338] <Calculation and Results 2> Next, in the circuit configuration of the pixel PIX shown in Figure 6(B), the threshold value of the drive transistor To verify whether the voltage correction operation is working correctly, use a circuit simulator. The calculation was performed using the following transistors: Here, the transistors corresponding to the drive transistors of the pixels (PIX) are used. The amount of current flowing through the light-emitting diode (LD) was calculated when the threshold voltage of Tr3 was corrected. I will explain the results.

[0339] The software used in this calculation is the same as the SILVACO Smar software used in the calculation described above. This is a circuit simulator called tspice (4.26.7.R). Using this, in the circuit configuration of pixel PIX shown in Figure 6(B), the threshold of transistor Tr3 When the value voltage is set to various values ​​and the threshold voltage is corrected, the current flowing through the light-emitting diode (LD) is as follows: I performed calculations regarding the amount of current.

[0340] Figure 19 shows the results calculated using the circuit simulator, with the horizontal axis representing wiring DL and distribution. Correction data storage unit (node ​​ND1), image data storage unit (node The same voltage (V) input to ND2) (hereinafter referred to as the data voltage) is used, and the vertical axis is used for output. This graph shows the drive current (A) flowing through the optical element LD.

[0341] Furthermore, Figure 19 shows the threshold voltage of transistor Tr3, which corresponds to the driving transistor. -0.9V, -0.4V, 0.1V, 0.6V, 1.1V, 1.6V, 2.1V, 2.6 The nine conditions for V and 3.1V are shown separately.

[0342] As shown in Figure 19, when the data voltage is high, for example, when the data voltage is 7.0V, The amount of current flowing through the drive transistor is approximately 1.85 × 10⁻⁶ under the nine conditions described above. -6 A to 2 .80×10 -6 The range is up to A. The threshold voltage of the drive transistor is 1.1V. Based on the specified conditions, the change in current due to the correction is generally between -20% and 20%. It can be seen that it falls within the range.

[0343] This embodiment can be appropriately combined with the embodiments described in this specification or with other embodiments. It is possible. [Examples]

[0344] <Prototype> The display device described in the above embodiment was actually prototyped. In this embodiment, the display device The characteristics of the transistors provided, the details of the display device, and the brightness of the display device. I will explain the results of the temperature measurement.

[0345] Figures 20(A) and (B) show channel formation in the CAAC-OS in In-Ga-Zn oxide. Drain current I of the OS transistor included in the region D and gate-source voltage V G of This is a graph illustrating the characteristics. In particular, Figure 20(A) shows the LSI scale, channel The characteristics of an OS transistor with a channel length of 60 nm and a channel width of 60 nm are shown in Figure 20. B) The display device is equipped with a channel length of 6 μm and a channel width of 4 μm. The drain current I of the OS transistor D and gate-source voltage V G and field effect mobility μ FE [cm 2 This graph shows the characteristics of [Vs].

[0346] The characteristics CHR1 and CHR2 shown in Figure 20(A) are such that the source-drain voltage is The characteristics at 0.1V and 1.2V are shown. As shown in Figure 20(A), OS transistor The ZISTA exhibits good characteristics as an LSI scale, with the off-current being below the measurement limit. It's getting smaller.

[0347] The characteristics of CHR3 and CHR4 shown in Figure 20(B) are as follows: Source-drain voltage The characteristics for 0.1V and 10V are shown. Note that characteristics CHR3 and CHR4 are indicated by arrow A. This corresponds to the vertical axis of direction. Also, in Figure 20(B), characteristic CHR5 is the OS transistor. This shows the gate-source voltage and field-effect mobility characteristics. Note that characteristic CHR5 is indicated by the arrow. This corresponds to the vertical axis in the direction of B. As shown in Figure 20(B), the OS transistor is an LSI Similar to scales, it also exhibits good characteristics as a scale for display devices, and is off-voltage. The flow rate is below the detection limit.

[0348] Furthermore, the OS transistor having the characteristics shown in Figure 20(B) has a small off-current, so Figure 4 Transistors Tr1 and Tr2 shown in Figure 6(A) and (B), and transistors Tr1 and Tr 2. It can be applied to Tr7. Also, transistors Tr1 to Tr4 shown in Figure 4, This may be applied to all of the transistors Tr1 through Tr6 in Figures 6(A) and 6(B).

[0349] Figure 21 shows the actual prototype display device, with the pixels being the pixels PIX shown in Figure 6(B). This indicates that the aforementioned OS transistor is used for the pixel PIX. Since the device is made using a flexible substrate, the display unit of the device has two It can be folded.

[0350] The specific specifications of the display device are shown in the table below.

[0351] [Table 1]

[0352] Also, when image data that is entirely white is stored in the image data storage unit (node ​​ND2) (image Image data only), and in addition to that case, correction data indicating all white is held in the correction data storage unit (no When retained in ND1 (image data + correction data), and in each case, the table The brightness of the display devices was as shown in the table below.

[0353] [Table 2]

[0354] From the table above, image data is stored in the image data storage unit (node ​​ND2), and correction data By storing the correction data in the correction data storage unit (node ​​ND3), the image data is stored as image data. It can be seen that the brightness of the display device has improved compared to when it is held in the holding unit (node ​​ND2). .

[0355] Furthermore, when 4% of the entire screen of the display device is illuminated, the peak brightness of that 4% area is Approximately 2000 cd / m² 2 That was the case.

[0356] As described above, by creating a display device in which the pixels are set to the pixels PIX shown in Figure 6(B), Image data can be displayed with higher brightness. This is due to the correction data holding unit of the pixel PIX. (Node ND3) is configured to store correction data, and the source driver of the display device Apply a voltage greater than the output voltage to the gate of the drive transistor (transistor Tr3). This is because it is possible to do so. Therefore, the source driver of the display device does not need to increase the output voltage. Because it is not required, the power consumption of the source driver can be reduced.

[0357] This embodiment can be appropriately combined with the embodiments described in this specification or with other embodiments. It is possible.

[0358] (Notes regarding the descriptions in this specification, etc.) The embodiments and examples described herein are described below. do.

[0359] <Notes relating to one aspect of the present invention described in the embodiments and examples> The configurations shown in each embodiment and example can be appropriately combined with the configurations shown in other embodiments. This can be one embodiment of the present invention. Furthermore, within one embodiment, there may be multiple configuration examples. If this is shown, it is possible to combine the configuration examples as appropriate.

[0360] Furthermore, the content described in one embodiment or example (even a part of it) , and other details (even partial details) described in the embodiment or example, and one or more This is at least one of the contents (or some of the contents) described in several other embodiments. It can be applied, combined, or replaced with.

[0361] The contents described within each embodiment or example refer to each respective embodiment or example. In this context, the content described using various diagrams, or the content described using the text contained in the specification, It refers to appearance.

[0362] Furthermore, the figures (even partial ones) described in a particular embodiment or example are subject to change. Another part of the figure, its embodiment, or another figure (even if only a part of it) described in the example, One or more other embodiments, or the figures (even partially) described in the embodiments By combining at least one figure, it is possible to construct even more figures. It is possible.

[0363] <Notes regarding ordinal numbers> In this specification, the ordinal numbers "1st," "2nd," and "3rd" are used to avoid confusion of constituent elements. This was added to avoid that. Therefore, it does not limit the number of components. This does not limit the order of the components. Also, for example, the embodiments described herein (or In one of the embodiments, the component referred to as "First" is in another embodiment (or example). Alternatively, it may be a component referred to as "second" in the claims. Furthermore, for example, in one of the embodiments (or examples) of this specification, the term "First" is used. The components may be omitted in other embodiments or claims. ru.

[0364] <Notes regarding descriptions of drawings> Embodiments (or examples) are described with reference to the drawings. However, the actual form of implementation is described. The form (or example) can be implemented in many different ways, and the purpose and scope may vary. Anyone skilled in the art can easily see that its form and details can be changed in various ways without departing from the original. It is understood that the present invention is to be interpreted as being limited to the contents described in the embodiments (or examples). It is not the case that the same The same reference numeral is used in common across different drawings for parts or parts having similar functions, and the same reference numeral is used for parts of a part or parts having a similar function. I will omit the explanation of the counter-argument.

[0365] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the diagram. The positional relationships between the components are The arrangement changes appropriately depending on the direction in which each component is described. Therefore, the terminology used to indicate the arrangement is specified in the specification, etc. The descriptions provided are not limited to those explained above, and can be appropriately rephrased depending on the situation. For example, In the expression "insulator located on the upper surface of the conductor," rotate the orientation of the diagram shown by 180 degrees. Therefore, it can be rephrased as "an insulator located on the underside of a conductor."

[0366] Furthermore, the terms "up" and "down" refer to situations where the relative positions of the constituent elements are directly above or directly below, and directly connected. It does not limit what is being done. For example, if the expression is "electrode B on insulating layer A", It is not necessary for electrode B to be directly in contact with insulating layer A, and the insulating layer A and electrode B are not in direct contact. This does not exclude those that include other components in between.

[0367] Furthermore, in the drawings, the size, layer thickness, or area are shown at arbitrary sizes for the sake of explanation. Therefore, it is not necessarily limited to that scale. Furthermore, the drawings are made with clarity in mind. This is a schematic representation and is not limited to the shapes or values ​​shown in the drawings. For example... , variations in signals, voltages, or currents due to noise, or signals due to timing discrepancies This can include variations in voltage, current, and other parameters.

[0368] Furthermore, in drawings, in perspective views and other similar views, some structural elements are used to ensure clarity of the drawings. In some cases, the original description may be omitted.

[0369] Furthermore, in the drawings, identical elements or elements with similar functions, elements of the same material, and In some cases, elements formed simultaneously may be given the same symbol, and the explanation for this repetition is as follows: It may be omitted in some cases.

[0370] <Notes regarding paraphrasable descriptions> In this specification, when describing the connection relationships of transistors, the term "source or drain" is used. "One side" (or the first electrode, or the first terminal), "the other side of the source or drain" (or the second electrode) The notation , or (second terminal) is used. This is because the source and drain of a transistor are This is because it varies depending on the transistor's structure or operating conditions. Regarding the terminology for drain, it can also be referred to as source (drain) terminal or source (drain) electrode, etc. It can be appropriately rephrased depending on the situation. Also, in this specification, the two other than the gate These terminals may be referred to as the first terminal, the second terminal, or the third terminal, the fourth terminal, etc. In this specification, the channel formation region refers to the region where a channel is formed, and the gate By applying an electric potential, this region is formed, allowing current to flow between the source and drain. Cut.

[0371] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0372] Furthermore, in this specification, the terms "electrode" and "wiring" refer to these components functionally. It is not limited to this. For example, "electrode" can be used as part of "wiring". And the reverse is also true. Furthermore, the terms "electrode" and "wiring" can refer to multiple "electrodes" and This includes cases where the wiring is formed as an integrated unit.

[0373] Furthermore, in this specification, voltage and potential may be used interchangeably as appropriate. Voltage is a base This refers to the potential difference from the reference potential; for example, the reference potential is the ground potential (earth potential). If we consider it as electric potential, then voltage can be rephrased as electric potential. Ground potential is not necessarily 0V. This does not necessarily mean that. Furthermore, electric potential is relative, and depending on the reference potential, This may change the potential supplied to wiring, etc.

[0374] In this specification, the terms "membrane," "layer," etc. may be used in some cases or in some situations. Depending on the context, they can be interchanged. For example, the term "conductive layer" can be replaced with "conductive layer". In some cases, the term can be changed to "electromagnetic film." Alternatively, for example, "insulating film" could be used. In some cases, the term may be changed to "insulating layer." Or, depending on the circumstances... Alternatively, depending on the situation, you can replace terms such as "membrane" or "layer" with other terms. It is possible to use the term "conductor" instead of "conductive layer" or "conductive film". In some cases, the terminology can be changed. For example, terms such as "insulating layer" or "insulating film" can be used. In some cases, it may be possible to change the term to "insulator."

[0375] In this specification, terms such as "wiring," "signal line," and "power line" may be used as appropriate. Depending on the situation, they can be interchanged. For example, "wiring" and In some cases, it may be possible to change the term "signal line" to "signal line". Also, for example, In some cases, the term "wiring" can be changed to terms such as "power lines." Conversely, terms such as "signal line" and "power line" should be changed to the term "wiring." In some cases, this may be possible. Terms such as "power lines" may be changed to terms such as "signal lines." This is sometimes possible. Conversely, terms like "signal line" can also be used for "power line," etc. In some cases, it may be possible to change the terminology. Also, the "potential" applied to the wiring Change the terminology to a term like "signal," depending on the circumstances or situation. This is sometimes possible. Conversely, terms like "signal" can also be used in the context of "electric potential." It may be possible to change it to a different word.

[0376] <Notes regarding the definition of terms> The following sections will explain the definitions of terms used in the above embodiments and examples.

[0377] <<Regarding impurities in semiconductors>> Impurities in semiconductors refer to components other than the main components that make up the semiconductor layer, for example. Elements present in less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, affect semiconductors. The formation of Density of States (DOS) and carrier mobility In some cases, the quality may decrease, or the crystallinity may decrease. In the case of semiconductors, impurities that alter the properties of semiconductors include, for example, Group 1 elements and Group 2 elements. These include elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components. In particular, for example, hydrogen (also found in water), lithium, sodium, silicon, boron, ri These include hydrogen, carbon, and nitrogen. In the case of oxide semiconductors, for example, the inclusion of impurities such as hydrogen can cause problems. This can lead to the formation of oxygen vacancies. Furthermore, if the semiconductor is a silicon layer, the semiconductor properties... Impurities that alter the composition include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, and Group 1 elements. These include Group 3 elements and Group 15 elements.

[0378] <<About the switch>> In this specification, a switch refers to a conductive state (on state) or a non-conductive state (off state). This refers to a device that has the function of controlling whether or not to allow current to flow when it enters a certain state. Alternatively, it can refer to a switch. A switch is a device that has the function of selecting and switching the path through which electric current flows.

[0379] For example, an electrical switch or a mechanical switch can be used. Furthermore, any switch that can control the current will suffice, and is not limited to any particular type.

[0380] An example of an electrical switch is a transistor (for example, a bipolar transistor). MOS transistors, diodes (for example, PN diodes, PIN diodes, Schottky diode, MIM (Metal Insulator Metal) die Od, MIS (Metal Insulator Semiconductor) die Odes, diode-connected transistors, etc., or logic circuits combining these. There is.

[0381] Furthermore, when using a transistor as a switch, the "conductive state" of the transistor refers to: A state in which the source and drain electrodes of a transistor can be considered to be electrically short-circuited. Also, the "non-conductive state" of a transistor refers to the state where the source electrode and drain electrode of the transistor are connected. This refers to a state in which the poles can be considered electrically blocked. Note that a transistor is not simply a switch. When operating in this manner, the polarity (conductivity type) of the transistor is not particularly limited.

[0382] One example of a mechanical switch is a digital micromirror device (DMD). Switches using MEMS (Micro-Electro-Mechanical Systems) technology are Yes, it exists. The switch has electrodes that can be moved mechanically, and when those electrodes move... Therefore, it operates by controlling the states of conduction and non-conductivity.

[0383] <<About Connection>> In this specification, when it is stated that X and Y are connected, it means that X and Y are electrically connected. When they are directly connected, when X and Y are functionally connected, and when X and Y are directly connected This includes cases where a connection is made. Therefore, a predetermined connection relationship, for example, in the diagram or This includes not only connections shown in text, but also connections other than those shown in diagrams or text. It shall be considered as such.

[0384] Here, X, Y, etc., refer to the object (e.g., device, element, circuit, wiring, electrode, terminal). (Conductive film, layer, etc.)

[0385] One example of a case where X and Y are electrically connected is when the electrical connection between X and Y is possible. Elements that perform this function (for example, switches, transistors, capacitive elements, inductors, resistive elements, etc.) One or more elements (such as ions, display elements, light-emitting elements, and loads) are connected between X and Y. This is possible. Furthermore, the switch has a function that allows it to be controlled to be on or off. In other words, A switch can be either conductive (on) or non-conductive (off), allowing current to flow. It has a function to control whether or not it is released.

[0386] One example of a functional connection between X and Y is a functional connection between X and Y. Circuits that can perform this function (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signals) Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( Power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc. ), voltage source, current source, switching circuit, amplification circuit (which can increase signal amplitude or current amount, etc.) Circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc., signal generation One or more circuits (such as memory circuits and control circuits) can be connected between X and Y. For example, even if another circuit is placed between X and Y, the signal output from X If the signal is transmitted to Y, then X and Y are assumed to be functionally connected.

[0387] Furthermore, if it is explicitly stated that X and Y are electrically connected, then X and Y are electrically connected. When connected electrically (i.e., connected with another element or circuit in between X and Y) (if such a connection exists) and (if X and Y are functionally connected) (When functionally connected with another circuit in between) and when X and Y are directly connected (That is, the case where X and Y are connected without another element or circuit in between) It shall be assumed that they are electrically connected. In other words, when explicitly stating that they are electrically connected, simply, This is equivalent to the case where it is explicitly stated that it is "continued."

[0388] For example, the source (or first terminal, etc.) of the transistor is connected via Z1 (or Without an intermediary, X is electrically connected, and the drain of the transistor (or the second terminal, etc.) is connected. If Y is electrically connected via (or without) Z2, or if the transistor's saw A part of Z1 (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. They are indirectly connected, and the drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. When they are connected and another part of Z2 is directly connected to Y, the following table It can be expressed.

[0389] For example, "X and Y and the source (or first terminal, etc.) and drain (or the first terminal) of the transistor" Terminals 2, etc., are electrically connected to each other, and X is the source of the transistor (or The electrical components are connected in the following order: the first terminal (or the second terminal), the transistor's drain (or the second terminal), and Y. It can be expressed as "connected to the source (or the source) of the transistor." Terminal 1 (or terminal 2) is electrically connected to X, and the drain (or terminal 2) of the transistor is connected to X. (d) is electrically connected to Y, X is the source of the transistor (or the first terminal, etc.), and the transistor The drain (or second terminal, etc.) of the converter, Y, is electrically connected in this order. It can be expressed as, "X is the source (or first terminal, etc.) of the transistor." Alternatively, "X is the source (or first terminal, etc.) of the transistor." Y is electrically connected to X, and the transient is connected via the drain (or second terminal, etc.) and the drain. The source of the transistor (or the first terminal, etc.), the drain of the transistor (or the second terminal, etc.) It can be expressed as, "Y is provided in this connection order." Similar to these examples... By using a method of representation to specify the order of connections in a circuit configuration, the transition Distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of the starter. This allows us to determine the technical scope. Note that these expressions are just examples, and this... The method of expression is not limited to these. Here, X, Y, Z1, Z2 are objects (e.g., devices, (Examples include elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.)

[0390] Note that, in circuit diagrams, independent components are shown as being electrically connected to each other. Even if such a combination exists, one component may possess the functions of multiple components. Yes. For example, if part of the wiring also functions as an electrode, one conductive film will function as the wiring, and It possesses the functions of both components of the electrode. Therefore, in this specification Electrically connected means that a single conductive film combines the functions of multiple components. This also falls under that category. [Explanation of Symbols]

[0391] DD display device, PA display unit, GD gate driver circuit, SD source driver circuit WSD circuit, PIX pixel, SR shift register, LAT latch circuit, LVS Level shift circuit, DAC (digital-to-analog conversion circuit), AMP (amplifier circuit), GL (gangline) Wire, VA wiring, DB data bus wiring, Tr1 transistor, Tr2 transistor , Tr3 transistor, Tr4 transistor, Tr5 transistor, Tr6 transistor Transistor, Tr7 Transistor, C1 Capacitor, C2 Capacitor, C3 Capacitor, LD (Light-Diving Device), GL1 wiring, GL2 wiring, GL3 wiring, GL4 wiring, DL (Light-Down Distribution) Wire, WDL wiring, VL wiring, AL wiring, BGL wiring, CAT wiring, ND1 ND2 node, ND3 node, ND4 node, SDa circuit, WSDa circuit Path, Tr11 transistor, Tr12 transistor, Tr13 transistor, Tr 14 transistors, SELD wiring, SELG wiring, SELV wiring, SERW wiring Wire, GNDL wiring, V1L wiring, 101 Image data storage unit, 102 Drive circuit unit, 103 Display element, 104 Correction data holding unit, 105 Threshold voltage correction circuit unit, 21 5 Display unit, 221a Scan line drive circuit, 231a Signal line drive circuit, 232a Signal line Drive circuit, 241a Common line drive circuit, 723 Electrode, 726 Insulating layer, 728 Insulating layer 729 insulating layer, 741 insulating layer, 742 semiconductor layer, 744a electrode, 744b electric Electrode, 746 Electrode, 755 Impurity, 771 Substrate, 772 Insulating layer, 810 Transistor 811 transistor, 820 transistor, 821 transistor, 825 Transistor, 826 transistor, 842 transistor, 843 transistor, 844 transistor, 845 transistor, 846 transistor, 847 transistor Zista, 4001 First substrate, 4005 Sealing material, 4006 Second substrate, 4010 Transistor, 4011; Transistor, 4014; Wiring, 4015; Electrode, 4017 Electrode, 4018 FPC, 4019 Anisotropic conductive layer, 4020 Capacitive element, 4021 Electrode, 4030 First electrode layer, 4031 Second electrode layer, 4041 Printed circuit board, 4 042 Integrated circuit, 4102 Insulating layer, 4103 Insulating layer, 4110 Insulating layer, 4111 Insulating layer, 4112; Insulating layer, 4200; Input device, 4210; Touch panel, 4227 Electrode, 4228 Electrode, 4237 Wiring, 4238 Wiring, 4239 Wiring, 4263 Substrate, 4272b FPC, 4273b IC, 4510 partition, 4511 light-emitting layer, 4513 Light-emitting element, 4514 Filler, 5321a Housing, 5321b Housing, 532 1c Hinge section, 5322 Display section, 5323 Operation buttons, 5401 Housing, 5402 Display unit, 5403 Keyboard, 5404 Pointing device, 5501 Enclosure 5502 Display unit, 5503 Microphone, 5504 Speaker, 5505 Operation buttons, 5701 Display Panel, 5702 Display Panel, 5703 Display Panel, 5704 Display Panel, 5801 First enclosure, 5802 Second enclosure, 5803 Display unit, 5804 Operation Key, 5805 Lens, 5806 Connector, 5901 Housing, 5902 Display Unit, 59 03 Operation button, 5904 Control unit, 5905 Band, 6200 Electronic signboard, 620 1 Wall, 9000 Enclosure, 9001 Display Unit, 9003 Speaker, 9005 Operation Keys , 9006 connection terminal

Claims

1. It comprises first to eighth transistors, first to third capacitive elements, a display element, and a first circuit. Either the source or the drain of the first transistor is electrically connected to a first wiring to which image data is input. The source or drain of the first transistor is electrically connected to the first terminal of the first capacitive element. The first gate of the first transistor is electrically connected to the first selection signal line. The first gate of the first transistor is electrically connected to the second gate of the first transistor. Either the source or drain of the second transistor is electrically connected to a second wiring to which correction data for the image data is input. The source or drain of the second transistor is electrically connected to the second terminal of the first capacitive element. The source or drain of the second transistor is electrically connected to the first terminal of the second capacitive element. The source or drain of the second transistor, the other of which is electrically connected to the first gate of the third transistor, The first gate of the second transistor is electrically connected to the second selection signal line. The first gate of the second transistor is electrically connected to the second gate of the second transistor. Either the source or the drain of the third transistor is electrically connected to a power supply line. The source or drain of the third transistor is electrically connected to the second terminal of the second capacitive element. The source or drain of the third transistor is electrically connected to the first terminal of the third capacitive element. The source or drain of the third transistor is electrically connected to the source or drain of the fourth transistor. The source or drain of the third transistor is electrically connected to the source or drain of the fifth transistor. The second gate of the third transistor is electrically connected to the second terminal of the third capacitive element. The second gate of the third transistor is electrically connected to either the source or the drain of the sixth transistor. The source or drain of the fourth transistor is electrically connected to the third wiring to which the first potential is input. The first gate of the fourth transistor is electrically connected to the first selection signal line. The first gate of the fourth transistor is electrically connected to the second gate of the fourth transistor. The source or drain of the fifth transistor is electrically connected to the display element. The first gate of the fifth transistor is electrically connected to the third selection signal line. The first gate of the fifth transistor is electrically connected to the second gate of the fifth transistor. The source or drain of the sixth transistor is electrically connected to the fourth wiring to which the second potential is input. The first gate of the sixth transistor is electrically connected to the fourth selection signal line. The first gate of the sixth transistor is electrically connected to the second gate of the sixth transistor. The first wiring is electrically connected to the first circuit via the seventh transistor. The second wiring is electrically connected to the first circuit via the eighth transistor. The first circuit is a display device having the function of generating a potential corresponding to image data to be applied to the first wiring and a potential corresponding to correction data to be applied to the second wiring.

2. It comprises first to eighth transistors, first to third capacitive elements, a display element, and a first circuit. Either the source or the drain of the first transistor is electrically connected to a first wiring to which image data is input. The source or drain of the first transistor is electrically connected to the first terminal of the first capacitive element. The first gate of the first transistor is electrically connected to the first selection signal line. The first gate of the first transistor is electrically connected to the second gate of the first transistor. Either the source or drain of the second transistor is electrically connected to a second wiring to which correction data for the image data is input. The source or drain of the second transistor is electrically connected to the second terminal of the first capacitive element. The source or drain of the second transistor is electrically connected to the first terminal of the second capacitive element. The source or drain of the second transistor, the other of which is electrically connected to the first gate of the third transistor, The first gate of the second transistor is electrically connected to the second selection signal line. The first gate of the second transistor is electrically connected to the second gate of the second transistor. Either the source or the drain of the third transistor is electrically connected to a power supply line. The source or drain of the third transistor is electrically connected to the second terminal of the second capacitive element. The source or drain of the third transistor is electrically connected to the first terminal of the third capacitive element. The source or drain of the third transistor is electrically connected to the source or drain of the fourth transistor. The source or drain of the third transistor is electrically connected to the source or drain of the fifth transistor. The second gate of the third transistor is electrically connected to the second terminal of the third capacitive element. The second gate of the third transistor is electrically connected to either the source or the drain of the sixth transistor. The source or drain of the fourth transistor is electrically connected to the third wiring to which the first potential is input. The first gate of the fourth transistor is electrically connected to the first selection signal line. The first gate of the fourth transistor is electrically connected to the second gate of the fourth transistor. The source or drain of the fifth transistor is electrically connected to the display element. The first gate of the fifth transistor is electrically connected to the third selection signal line. The first gate of the fifth transistor is electrically connected to the second gate of the fifth transistor. The source or drain of the sixth transistor is electrically connected to the fourth wiring to which the second potential is input. The first gate of the sixth transistor is electrically connected to the fourth selection signal line. The first gate of the sixth transistor is electrically connected to the second gate of the sixth transistor. The first wiring is electrically connected to the first circuit via the seventh transistor. The second wiring is electrically connected to the first circuit via the eighth transistor. The first circuit has the function of generating a potential corresponding to image data to be applied to the first wiring and a potential corresponding to correction data to be applied to the second wiring. A display device in which at least one of the first to eighth transistors has an oxide semiconductor in its channel-forming region.

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