Resonant power converter

JP7939793B2Active Publication Date: 2026-10-22AMPERE SAS
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
JP2022110569
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-07-08
Publication Date
2026-10-22
Estimated Expiration
2042-07-08

AI Technical Summary

Benefits of technology

【0008】 本発明によれば、スイッチング素子の両端電圧を抑制することができるとともに、負荷が変動した時でもゼロ電圧スイッチングを達成でき、変換効率が低下しない共振型電力変換装置を提供することができる。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007939793000006
    Figure 0007939793000006
  • Figure 0007939793000007
    Figure 0007939793000007
  • Figure 0007939793000008
    Figure 0007939793000008
Patent Text Reader

Abstract

To provide a resonant power conversion device that can suppress a voltage applied to a switching element and achieve ZVS even when load varies.SOLUTION: A resonant power conversion device comprises: a switching element Q0; an input capacitor C0 connected to the switching element Q0 in parallel; and a class-E inverter circuit 13 with an input side being connected to the switching element Q0 in parallel. The class-E inverter circuit 13 comprises: a first resonance circuit 11 with one end thereof connected to one end of the switching element Q0; and a second resonance circuit 12 connected to the switching element Q0 in parallel. A resonance frequency of the second resonance circuit 12 is set to a frequency that is double a switching frequency fs. An absolute value of a specific impedance Z2 of the second resonance circuit 12 is set to a value larger than the absolute value of the maximum value of the impedance of a load portion 30 connected to an output terminal To.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a resonant power converter.

Background Art

[0002] In a resonant power converter such as a DC / DC converter circuit using a Class E inverter circuit, in general, the peak value of the voltage applied across the switching element rises to approximately 3.7 times the DC input voltage due to voltage resonance. For this reason, such a resonant power converter requires the use of a switching element with a higher withstand voltage and thus a higher on-resistance than the value of the DC input voltage, which has been a factor leading to higher costs, reduced conversion efficiency, and the like.

[0003] Patent Document 1 defines that the above-mentioned problem exists, and provides a second resonant circuit connected in series with the switching element between DC input terminals, wherein the frequency characteristic of the impedance of the second resonant circuit has two resonant frequencies, the lower first resonant frequency among the two resonant frequencies is higher than the switching frequency of the switching element, the higher second resonant frequency among the two resonant frequencies is approximately twice the switching frequency, and the impedance of the second resonant circuit is maximized at the first resonant frequency and minimized at the second resonant frequency. With this configuration, a power converter capable of suppressing the voltage across the switching element to approximately twice the DC input voltage is disclosed.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of Invention

Problems to be Solved by the Invention

[0005] In a power converter configured as described in Patent Document 1, when the load connected to the output side is at its rated value, the voltage across the switching element can be reduced to approximately twice the DC input voltage, and zero-voltage switching (ZVS) of the switching element can be achieved. However, according to the inventor's analysis, in such a power converter, when the load fluctuates, zero-voltage switching of the switching element cannot be achieved, resulting in worsening switching losses and a decrease in conversion efficiency.

[0006] The present invention has been made in view of the above problems, and its objective is to provide a power conversion device that can suppress the rise in voltage across the switching element, achieve zero-voltage switching even when the load fluctuates, and maintain conversion efficiency. [Means for solving the problem]

[0007] A resonant power converter according to one aspect of the present invention comprises a positive and negative pair of input terminals to which a DC input power supply can be connected, an input inductor with one end connected to at least one of the input terminals, a switching element connected in parallel to the positive and negative pair of input terminals via the input inductor and switchable at a predetermined switching frequency, an input capacitor connected in parallel to the switching element, and a Class E inverter circuit with its input side connected in parallel to the switching element. The Class E inverter circuit comprises a first resonant circuit with one end connected to one end of the switching element, and a second resonant circuit connected in parallel to the switching element. The other end of the first resonant circuit and the other end of the switching element are each connected to a pair of output terminals. The resonant frequency of the first resonant circuit is set to a frequency corresponding to the switching frequency. The resonant frequency of the second resonant circuit is set to a frequency twice the switching frequency. The absolute value of the characteristic impedance of the second resonant circuit is set to a value greater than the absolute value of the maximum impedance of the load connected to the output terminal. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a resonant power converter that can suppress the voltage across the switching element, achieve zero-voltage switching even when the load fluctuates, and maintain conversion efficiency. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a circuit diagram showing the configuration of a resonant power converter according to the first embodiment. [Figure 2] Figure 2 is a circuit diagram showing an example of the configuration of the second resonant circuit of the resonant power converter according to the first embodiment. [Figure 3] Figure 3 shows the frequency characteristics of the absolute value of the impedance when viewed from the load section to the DC input power supply side in a resonant power converter according to the first embodiment, when the switching element is off. [Figure 4] Figure 4 shows the waveform of the device voltage applied across the switching element when the gate signal of the switching element of the resonant power converter is switched on and off at a predetermined switching frequency in the resonant power converter according to the first embodiment. [Figure 5] Figure 5 shows the frequency characteristics of the absolute impedance when viewed from the load section to the DC input power supply side in the comparative example power converter, when the switching element is off. [Figure 6] Figure 6 shows the waveform of the device voltage applied across the switching element when the switching element is switched on and off with a gate signal of a predetermined switching frequency in the comparative example power converter. [Figure 7] Figure 7 shows the relationship between the device current flowing through the switching element and the device voltage applied across the switching element when the switching element is switched on and off with a gate signal of a predetermined switching frequency, in the first embodiment, when the maximum impedance of the load set in the second resonant circuit is greater than the actual impedance of the load. [Figure 8]Figure 8 shows the relationship between the device current flowing through the switching element and the device voltage applied across the switching element when the switching element is switched on and off with a gate signal of a predetermined switching frequency, in the first embodiment, when the maximum impedance of the load set in the second resonant circuit is smaller than the actual impedance of the load. [Figure 9] Figure 9 is a circuit diagram showing the configuration of a resonant power converter according to the second embodiment. [Figure 10] Figure 10 is a circuit diagram showing the configuration of a resonant power converter according to the third embodiment. [Modes for carrying out the invention]

[0010] Hereinafter, several embodiments of the resonant power converter of the present invention will be described in detail with reference to the drawings. In the drawings of each embodiment of the resonant power converter, the same or corresponding parts are denoted by the same reference numerals and their descriptions are omitted.

[0011] (First Embodiment) Referring to Figure 1, the configuration of the resonant power converter 10 according to the first embodiment will be described. The resonant power converter 10 includes a positive and negative pair of input terminals Ti, an input inductor L0, a switching element Q0, an input capacitor C0, a Class E inverter circuit 13, and a pair of output terminals To. A DC voltage Vi is supplied to the positive and negative pair of input terminals Ti from a DC input power supply 20. One end of the input inductor L0 is connected to the positive input terminal Ti. The switching element Q0 is connected between the other end of the input inductor L0 and the negative input terminal Ti. The input capacitor C0 is connected in parallel to the switching element Q0. The input side of the Class E inverter circuit 13 is connected in parallel to the switching element Q0 and the input capacitor C0. The Class E inverter circuit 13 includes a first resonant circuit 11 and a second resonant circuit 12. One end of the first resonant circuit 11 is connected to the positive side of the switching element Q0. The second resonant circuit 12 is connected in parallel to the switching element Q0 and the input capacitor C0. A pair of output terminals To are connected to the other end of the first resonant circuit 11 and to the negative side of the switching element Q0, respectively. A load unit 30 is connected to the pair of output terminals To. The resonant power converter 10 outputs an AC voltage to the output terminals To.

[0012] Furthermore, one end of the input inductor L0 may be connected to the negative input terminal Ti, and the switching element Q0 may be connected between the positive input terminal and the other end of the input inductor L0. Alternatively, two input inductors L0 may be provided, with one end of each input inductor L0 connected to the positive and negative input terminals Ti, respectively, and the switching element Q0 connected between the other ends of the two input inductors L0. In addition, one end of the first resonant circuit 11 may be connected to the negative side of the switching element Q0. In this case, the pair of output terminals To are connected to the positive side of the switching element Q0 and the other end of the first resonant circuit 11, respectively.

[0013] In this embodiment, the switching element Q0 is described as an example using an N-channel MOSFET, but it may be composed of other semiconductor switching elements.

[0014] The switching element Q0 operates at a predetermined switching frequency f s is controlled to be switched on and off by applying a gate signal V in the form of a rectangular wave pulse to its gate gs .

[0015] The resonant frequency f1 of the first resonant circuit 11 is set to a frequency corresponding to the switching frequency f s . In other words, the resonant frequency f1 of the first resonant circuit 11 is set to the switching frequency f s or a frequency in the vicinity thereof.

[0016] The first resonant circuit 11 is configured, for example, as a series resonant circuit in which a first resonant inductor L1 and a first resonant capacitor C1 are connected in series, as shown in Figure 1. In this case, the resonant frequency f1 determined by the inductance L1 of the first resonant inductor L1 and the capacitance C1 of the first resonant capacitor C1 is set to a value approximately equal to the switching frequency f as shown in Equation 1 s . [Equation] ...(Equation 1)

[0017] Note that the first resonant circuit 11 is not limited to the configuration as shown in Figure 1, and any configuration is acceptable as long as the resonant frequency f1 is in the vicinity of the switching frequency f s .

[0018] The resonant frequency of the second resonant circuit 12 is set to a frequency 2f that is twice the switching frequency f s s . Further, the characteristic impedance Z2 of the second resonant circuit 12 is set to a value larger than the absolute value |Z of the impedance Z of the load unit 30 connected to the output terminal To L L |.

[0019] ​​The second resonant circuit 12 is composed of a series resonant circuit in which a second resonant inductor L2 and a second resonant capacitor C2 are connected in series, as shown in Figure 2. In this case, the resonant frequency f2 due to the inductance L2 of the second resonant inductor L2 and the capacitance C2 of the second resonant capacitor C2 is given by the switching frequency f, as shown in Equation 2. s For this, twice the frequency 2f s It is set to this.

number

[0020] Note that the second resonant circuit 12 is not limited to the configuration shown in Figure 2, and the resonant frequency can be any switching frequency f s Twice the frequency of 2f s It is sufficient if it is constructed to be approximately equal to the given value. When the second resonant circuit 12 is configured as shown in Figure 2, the characteristic impedance Z2 of the second resonant circuit 12 is equal to the impedance Z of the load section 30, as shown in Equation 3. L The absolute value of |Z L It is set to a value greater than |.

number

[0021] In the resonant power converter 10 configured as shown in Figure 1 or Figure 2, Figure 3 shows the frequency characteristics of the absolute value |Z| of the impedance Z when viewed from the load section 30 to the DC input power supply 20 side, when the switching element Q0 is off (open).

[0022] By satisfying the conditions of Equations 2 and 3, as shown in Figure 3, the frequency characteristics of the absolute value |Z| of the impedance Z of the resonant power converter 10 are such that the switching frequency f s The absolute value of the impedance at that time |Z(f s )|, switching frequency f s The third harmonic of 3f s The absolute value of the impedance at that time |Z(3f s)|, switching frequency f s The second harmonic of 2f s The absolute value of the impedance at that time |Z(2f) s The magnitudes decrease in the order of )|, that is, the relationship is as shown in Equation 4.

number

[0023] Figure 4 shows the switching element Q0 of the resonant power converter 10 at a predetermined switching frequency f s The gate signal V gs When switched on and off, the device voltage V applied across the switching element Q0 is... ds This figure shows the waveform, with time t on the horizontal axis. Here, the device voltage V ds This refers to the drain-source voltage of the switching element Q0. Device voltage V ds In the waveform, the solid line represents the waveform when the load magnitude of the load unit 30 is at its rated value, and the dashed line represents the waveform when the load magnitude of the load unit 30 is greater than the rated value but the conditions of Equation 3 are met. Thus, the gate signal V of the switching element Q0 gs When it is turned off at time t11, the device voltage V is applied across the switching element Q0. ds This occurs. Then, the gate signal V gs During the OFF period, the device voltage V is measured both when the load on the load unit 30 is at its rated value (solid line) and when it is greater than the rated value (dashed line). ds With the value at zero, the gate signal V of the switching element Q0 at time t12 gs Zero-voltage switching is achieved, where the device voltage V is turned on. In other words, by satisfying the relationship shown in Equation 4, the device voltage V ds The second harmonic of 2f s The component is attenuated and the device voltage V ds The magnitude of is suppressed, and even when the load fluctuates within the range of Equation 3, the device voltage V ds The third harmonic 3f sSince the generation of components can be suppressed, zero-voltage switching can be achieved.

[0024] For comparison, Figure 5 shows the frequency characteristics of the absolute value of impedance Z|Z| when viewed from the load to the DC input power supply side, in a comparative example power converter with a circuit configuration like that of Patent Document 1, when the switching element is off. Also, Figure 6 shows the frequency characteristics of the switching element in the comparative example power converter at a switching frequency f s The gate signal V gs When the device is switched on and off, the device voltage V applied across the switching element is... ds The waveform is shown. Figure 6 shows the device voltage V ds In the waveform, the solid line represents the load at rated load, the dashed line represents the load higher than rated load, and the dotted-dash line represents the load even higher than the dashed line. Note that both Figures 5 and 6 are based on the inventor's analysis results.

[0025] From Figure 5, it can be seen that in the comparative power converter, the frequency characteristics of the absolute value |Z| of the impedance Z are related as shown in Equation 5.

number

[0026] In the case of the frequency characteristics of the absolute value |Z| of the impedance Z as shown in Equation 5, when the load is at its rated value, the gate signal V of the switching element is as shown by the solid line in Figure 6. gs When it is turned off at time t21, the device voltage V is applied across the switching element. ds This occurs. Then, the gate signal V gs During the OFF period, the device voltage V ds The second harmonic 2f s The component is attenuated, and the device voltage V ds The magnitude of the device voltage V is suppressed, ds With the voltage at zero, zero-voltage switching is achieved, where the switching element Q0 is turned on at time t22.

[0027] When the load exceeds the rated load, the gate signal V of the switching element changes, as shown by the dashed and dotted lines in Figure 6. gs When it is turned off at time t21, the device voltage V is applied across the switching element. ds This occurs. At this time, the device voltage V ds The second harmonic of 2f s The component is attenuated, and the device voltage V ds The magnitude is suppressed, but the device voltage V ds The third harmonic 3f s The generation of this component causes the device voltage V ds Before it becomes 0V, the gate signal V at time t22 gs This causes the switch to turn on. As a result, zero-voltage switching cannot be achieved, which worsens switching losses and contributes to a decrease in conversion efficiency.

[0028] In contrast, in the first embodiment, in a resonant power converter 10 with a circuit configuration as shown in Figures 1 and 2, the second resonant circuit 12 is designed to satisfy the conditions of Equations 2 and 3, thereby realizing the frequency characteristics of the absolute value of impedance Z|| as shown in Equation 4. As a result, the absolute value of impedance|Z| of the load section 30 is L | is the maximum value set in Equation 3 |Z L_Max Within a range smaller than |, the device voltage V of the switching element Q0 ds This can be suppressed, and the impedance Z of the load section 30 L Zero-voltage switching can be achieved even when the voltage fluctuates.

[0029] Figure 7 shows the maximum impedance |Z of the load section 30 set by Equation 3. L_Max | is the actual impedance of the load section 30 | Z L When the device current I flowing through the switching element Q0 is greater than |, d and the device voltage V applied across the switching element Q0 dsThis diagram shows the relationship, with time t on the horizontal axis. Here, the solid line represents the load at its rated load, the dashed line represents the load higher than the rated load, and the dotted-dash line represents the load even higher than the dashed line. In Figure 7, the gate signal V at time t31 gs When it is turned off, the device current (drain current) I d As it becomes 0, the device voltage V ds This occurs. Then, at time t32, the device voltage V ds With the gate signal V set to 0, gs Zero voltage switching is achieved when the device current I d There is no overcurrent. Thus, |Z L_Max |>|Z L Within the range of |, the impedance Z of the load section 30 L Even if the voltage fluctuates, zero-voltage switching can always be achieved.

[0030] Figure 8 shows the maximum impedance |Z of the load section 30 set by Equation 3. L_Max | is the actual impedance of the load section 30 | Z L When the device current I flowing through the switching element Q0 is smaller than |, d and the device voltage V applied across the switching element Q0 ds This diagram shows the relationship, with time t on the horizontal axis. In Figure 8, the gate signal V is at time t41. gs When it is turned off, the device current (drain current) I d As it becomes 0, the device voltage V ds This occurs. Then, at time t42, the device voltage V ds The gate signal V is not set to 0. gs The device is turned on, preventing zero-voltage switching from being achieved, and the device current I d This also generates pulsed overcurrent. In this way, |Z L_Max |<|Z LIn this range, zero-voltage switching cannot be achieved, and when the switching element Q0 is turned on, a large amount of pulse current flows through the switching element Q0, resulting in increased switching loss and reduced efficiency.

[0031] Next, a method for selecting the inductance L2 of the second resonant inductor L2 and the capacitance C2 of the second resonant capacitor C2 of the second resonant circuit 12 will be described.

[0032] The resonant frequency f2 of the second resonant circuit 12 is set to twice the switching frequency f as shown in Equation 2 s , and there are an infinite number of combinations of inductance L2 and capacitance C2 that satisfy this condition. However, at the same time, as shown in Equation 3, combinations of inductance L2 and capacitance C2 that make the characteristic impedance Z2 of the second resonant circuit 12 larger than the maximum impedance value |Z of the load unit 30 L_Max | are limited. Among these, the combination of inductance L2 and capacitance C2 that minimizes the inductance L2 results in the minimum coil loss caused by the second resonant inductor L2 in the second resonant circuit 12, so a combination of inductance L2 and capacitance C2 that satisfies such conditions may be selected.

[0033] According to the resonant power converter 10 of the first embodiment, it is possible to suppress the rise of the device voltage V applied across the switching element Q0 ds , achieve zero-voltage switching even when the load unit 30 fluctuates, and provide the resonant power converter 10 whose conversion efficiency does not decrease.

[0034] (Second Embodiment) The configuration of the second embodiment will be described with reference to Figure 9. In the second embodiment, the configuration of the resonant power converter 10 is the same as that of the first embodiment, except that the load unit 30 is a charging circuit including a rectifier circuit whose input side is connected to the pair of output terminals To of the resonant power converter 10, and a battery B connected to the output side of the rectifier circuit and supplied with a DC voltage.

[0035] In the example shown in Figure 9, the rectifier circuit is a full-wave rectifier circuit comprising a first series circuit in which diodes D1 and D2 are connected in series, a second series circuit in which diodes D3 and D4 are connected in series and connected in parallel to the first series circuit, an output inductor L3 with one end connected to one connection point of the first and second series circuits, and an output capacitor C3 connected between the other end of the output inductor L3 and the other connection point of the first and second series circuits. The connection point of diodes D1 and D2 is connected to the positive output terminal To, and the connection point of diodes D3 and D4 is connected to the negative output terminal To. Battery B is connected in parallel to the output capacitor C3.

[0036] Note that the rectifier circuit is not limited to the example in Figure 9; any circuit capable of converting the AC voltage output from the output terminal To of the resonant power converter 10 into a DC voltage is acceptable.

[0037] A DC / DC converter can be configured by connecting a rectifier circuit to the output terminal To of the resonant power converter 10.

[0038] In the resonant power converter 10 according to the second embodiment, the device voltage V across the switching element Q0 is also present. ds This provides a resonant power converter 10 that can suppress this phenomenon, achieve zero voltage switching even when the load section 30 fluctuates, and maintain conversion efficiency.

[0039] (Third embodiment) The configuration of the third embodiment will be described with reference to Figure 10. The third embodiment differs from the second embodiment in that the Class E inverter circuit 13A of the resonant power converter 10A is provided with an insulating section 14 that insulates the input side and output side of the Class E inverter circuit 13A. Figure 10 shows an example in which a high-frequency transformer as the insulating section 14 is provided between the second resonant circuit 12 and the first resonant circuit 11, but the configuration is not limited to this, and any configuration is acceptable as long as insulation can be achieved between the input terminal Ti and the output terminal To of the resonant power converter 10A.

[0040] By connecting a rectifier circuit to the output terminal To of the resonant power converter 10A of the third embodiment, an isolated DC / DC converter can be configured.

[0041] In the resonant power converter 10A according to the third embodiment, the device voltage V across the switching element Q0 is also present. ds This provides a resonant power converter 10A that can suppress the above and achieve zero voltage switching even when the load section 30 fluctuates, without reducing the conversion efficiency.

[0042] As described above, several embodiments of the present invention have been presented, but the statements and drawings that constitute part of this disclosure should not be understood as limiting the invention. Various alternative embodiments, examples, and operational techniques will become apparent to those skilled in the art from this disclosure. [Explanation of Symbols]

[0043] 10,10A Resonant Power Converter 11 1st resonant circuit 12 Second resonant circuit 13,13A Class E Inverter Circuit 14 Insulation 20 DC input power supply 30 Load section C0 Input Capacitor C1 First resonant capacitor C2 Second resonant capacitor f s Switching frequency L0 Input Inductor L1 First resonant inductor L2 Second resonant inductor Q0 Switching element Ti Input Terminal To output terminal

Claims

1. A pair of positive and negative input terminals to which a DC input power supply can be connected, An input inductor, one end of which is connected to at least one of the positive and negative input terminals, A switching element connected in parallel to the positive and negative input terminals via the input inductor, and capable of switching at a predetermined switching frequency, The input capacitor connected in parallel with the switching element, A Class E inverter circuit comprising a first resonant circuit having one end connected to one end of the switching element, and a second resonant circuit connected in parallel to the switching element, A pair of output terminals connected to the other end of the first resonant circuit and the other end of the switching element, respectively. Equipped with, The resonant frequency of the first resonant circuit is set to a frequency corresponding to the switching frequency. The resonant frequency of the second resonant circuit is set to twice the switching frequency. The absolute value of the characteristic impedance of the second resonant circuit is set to be greater than the absolute value of the maximum impedance of the load connected to the output terminal. Resonant power converter.

2. The first resonant circuit is a series resonant circuit in which a first resonant inductor and a first resonant capacitor are connected in series. The resonant power converter according to claim 1.

3. The second resonant circuit is a series resonant circuit in which a second resonant inductor and a second resonant capacitor are connected in series. The resonant power converter according to claim 1.

4. The load includes a rectifier circuit connected to the output terminal, The DC / DC converter is configured with the input inductor, the switching element, the Class E inverter circuit, and the rectifier circuit. The resonant power converter according to claim 1.

5. The Class E inverter circuit further includes an insulating section that insulates the first resonant circuit and the second resonant circuit. The resonant power converter according to claim 1.

Citation Information

Patent Citations

  • Ultra-high frequency switching cell-based power converter

    JP2013534403A

  • Power factor enhancement circuit

    JP2021145433A

  • Power Conversion Device

    JP6787071B2

  • JPP6787071B

  • Methods and apparatus for a resonant converter

    US20070171680A1