A command to move data from right to left.

Abstract

Executes a single architected instruction that moves data. Execution of this instruction involves moving a specified length of data from a source location to a destination location in a right-to-left direction to provide predictable results, even if a portion of the destination location is contained within the source location from which the data was moved.

Description

Technical Field

[0001] The present invention relates generally to facilitating processing within a computing environment, and more specifically to facilitating processing associated with moving data.

Background Art

[0002] One common task in computer programming is inserting an element at a specific position in an array. To perform this task, all elements from the insertion position to the end of the array are moved upward in the array by one element position. A new element is then stored at the insertion position of the array. This movement of existing elements starts with the highest-numbered element and proceeds down the addresses to end at the existing element at the insertion position.

[0003] Many computer instruction set architectures provide a mechanism for copying data from one location to another. For example, the Intel x86 architecture has the REP MOVS instruction. Furthermore, the z / Architecture(R) hardware architecture, provided by International Business Machines Corporation in Armonk, New York, has the Move Character (MVC) instruction. These move instructions process data from left to right (for example, starting from a lower location in memory and moving to a higher location). Therefore, using one of these move instructions to move existing N elements one element higher, starting from element P, will result in duplicating array element P to array element P+1 through N+1. Using these instructions will not provide the desired result for the above programming paradigm of moving array elements to a higher index to insert new elements. Instead, the compiler will use a set of instructions that are usually slower than the native move instructions for a given instruction set architecture. [Overview of the project]

[0004] The shortcomings of prior art are resolved and additional advantages are provided by the provision of a computer program product that facilitates processing within a computing environment. This computer program product comprises a computer-readable storage medium readable by a processing circuit and containing instructions for executing a method. This method includes obtaining an instruction to move data, which is a single architected instruction. This instruction is executed by the computer, and the execution of this instruction includes moving data of a specified length in a right-to-left direction from a source location to a destination location to provide a predictable result. A portion of the destination location is contained within the source location from which the data is moved.

[0005] By moving data from right to left using a single, architectural instruction, certain tasks, such as inserting elements into an array, can be performed far more efficiently than using a software paradigm. This data movement is much faster, reducing execution time and improving processor performance, overall system performance, or both.

[0006] For example, the source location is one size in bytes, and the destination location is another size in bytes. In one example, this one size in bytes and this other size in bytes are the same size. Furthermore, in one example, the aforementioned portion of the destination location includes one or more bytes of the destination location that overlap with one or more bytes of the source location. For example, this one or more bytes of the destination location includes the leftmost byte of the destination location. However, in one example, the leftmost byte of the source location is outside the destination location.

[0007] Even if there is overlap between the source and destination locations, the result remains predictable, which makes it possible to use this instruction for the purpose of moving data from right to left for use in one or more tasks.

[0008] In one embodiment, the specified length of the data to be moved is determined by a location associated with this instruction. This location is, for example, an implicit register associated with this instruction.

[0009] For example, the source location is specified using one or more fields of this instruction, and the destination location is specified using one or more other fields of this instruction.

[0010] In one embodiment, when the execution of this instruction is performed by a processor in a computing environment and observed by this processor, the order of access to the source and destination locations for moving the data is from right to left; however, when observed by one or more other processors, the order of access is undefined and undetermined.

[0011] Furthermore, in one embodiment, the execution of this instruction is performed by a processor in the computing environment, and the data movement includes copying the data from the source location to an internal buffer. Then, the data is moved from the internal buffer to the destination location. When observed by this processor, the data appears to move from right to left, and when observed by one or more other processors, the data appears to move in an undetermined direction. Thus, the data movement can be carried out in several ways, including moving the data sequentially from right to left, or moving the data to an internal buffer and then moving that data from the internal buffer to the destination location. In the latter case, when observed by a processor, the data appears to move from right to left. This is because overlapping byte locations are not copied (duplicated), but instead appear to move.

[0012] This specification also describes and claims computer-implemented methods and systems relating to one or more embodiments. Furthermore, this specification also describes and may claim services relating to one or more embodiments.

[0013] The techniques described herein realize additional features and benefits. Other embodiments and aspects are described in detail herein and are considered to be part of the claimed embodiments.

[0014] One or more embodiments are specifically illustrated and explicitly claimed in the claims at the end of this specification. The above-mentioned purposes, features and advantages of one or more embodiments, as well as other purposes, features and advantages, are evident from the following detailed description, which shall be interpreted together with the accompanying drawings. [Brief explanation of the drawing]

[0015] [Figure 1A] This figure shows an example of a computing environment for incorporating and using one or more aspects of the present invention. [Figure 1B] This figure shows further details of the processor shown in Figure 1A according to one or more embodiments of the present invention. [Figure 2] This figure shows another example of a computing environment for incorporating and using one or more aspects of the present invention. [Figure 3A] This figure shows one format of the Move Right to Left command according to one aspect of the present invention. [Figure 3B] This figure shows an example of a field in general-purpose register 0, which is an implicit register used by this instruction, according to one aspect of the present invention. [Figure 4] This figure shows an example of processing related to the execution of a Move Right to Left command according to one aspect of the present invention. [Figure 5A] This figure shows an example of facilitating processing within a computing environment according to one aspect of the present invention. [Figure 5B] This figure shows an example of facilitating processing within a computing environment according to one aspect of the present invention. [Figure 6A] This figure shows another example of a computing environment for incorporating and using one or more aspects of the present invention. [Figure 6B] This figure shows further details of the memory shown in Figure 6A. [Figure 7] This figure shows one embodiment of a cloud computing environment. [Figure 8] This figure shows an example of an abstraction model layer. [Modes for carrying out the invention]

[0016] According to one aspect of the present invention, the ability to facilitate processing within a computing environment is provided. As an example, a single instruction that moves data in a right-to-left direction (e.g., a single architected hardware machine instruction at the hardware / software interface) is provided. This instruction, referred to herein as the Move Right to Left instruction, is part of a general-purpose processor instruction set architecture (ISA) that is dispatched by a program onto a processor such as a general-purpose processor.

[0017] One embodiment of a computing environment for incorporating and using one or more aspects of the present invention is described with reference to Figure 1A. The computing environment 100 includes, for example, a processor 102 (e.g., a central processing unit), a memory 104 (e.g., main memory, also known as system memory, main storage, central storage, or storage), and one or more input / output (I / O) devices or interfaces or both 106, which are coupled to one another via, for example, one or more buses 108 or other connections, or a combination thereof.

[0018] For example, processor 102 is based on the z / Architecture(R) hardware architecture and is part of a server such as an IBM Z(R) server. The IBM Z(R) server is also provided by International Business Machines Corporation and implements the z / Architecture(R) hardware architecture. One embodiment of the z / Architecture(R) hardware architecture is described in the publication entitled "z / Architecture Principles of Operation," IBM Publication No. SA22-7832-11, 12th edition, September 2017, which is incorporated herein by reference in its entirety. However, the z / Architecture(R) hardware architecture is only one example of an architecture, and other architectures or other types of computing environments or both may include one or more aspects of the present invention, or may use one or more aspects of the present invention, or may implement both. For example, this processor runs an operating system such as the z / OS(R) operating system, which is provided by International Business Machines Corporation in Armonk, New York.

[0019] The processor 102 includes a plurality of functional components used to execute instructions. As shown in FIG. 1B, these functional components include, for example, an instruction fetch component 120 that fetches instructions to be executed, an instruction decode unit 122 that decodes the fetched instructions and obtains operands of the decoded instructions, an instruction execution component 124 that executes the decoded instructions, a memory access component 126 that accesses memory when necessary to execute the instructions, and a write back component 130 that provides the results of the executed instructions. According to one or more aspects of the present invention, one or more of these components may include at least a portion of one or more other components used in the right-to-left data movement (or other processing that may employ one or more aspects of the present invention) described herein, or may be capable of accessing such one or more other components. Such one or more other components include, for example, a data movement component (or other component) 136.

[0020] Another example of a computing environment for incorporating and using one or more aspects of the present invention is described with reference to FIG. 2. In one example, this computing environment is based on the z / Architecture® hardware architecture. However, this computing environment may also be based on other architectures provided by International Business Machines Corporation or other entities.

[0021] Referring to Figure 2, in one example, this computing environment includes a central electronics complex (CEC) 200. The CEC 200 includes several components, such as one or more processors (also known as central processing units (CPUs)) 204 and memory 202 (also known as system memory, main memory, main storage, central storage, or storage) coupled to input / output subsystems 206.

[0022] Memory 202 includes, for example, one or more logical partitions 208, a hypervisor 210 that manages those logical partitions, and processor firmware 212. An example of a hypervisor 210 is the Processor Resource / System Manager (PR / SM®) hypervisor provided by International Business Machines Corporation in Armonk, New York, USA. When used herein, firmware includes, for example, the microcode of the processor. Firmware includes, for example, hardware-level instructions or data structures, or both, used in higher-level machine code implementations. In one embodiment, this firmware includes, for example, microcode containing trusted software or proprietary code, which is typically delivered as specific microcode for underlying hardware, and controls operating system access to the system hardware.

[0023] Each logical partition 208 can function as a separate system. That is, each logical partition can be reset independently, and each logical partition can independently run a guest operating system 220, such as the z / OS(R) operating system or another operating system, and can run with different programs 222. An operating system or application program running within a logical partition may appear to have access to the entire system, but in reality, only a portion of the system is available to it.

[0024] Memory 202 is coupled to a processor (e.g., CPU) 204, which is a physical processor resource that can be allocated to a logical partition. For example, a logical partition 208 contains one or more logical processors, each of which represents all or part of the physical processor resource 204 that can be dynamically allocated to the logical partition.

[0025] Furthermore, memory 202 is coupled to I / O subsystem 206. I / O subsystem 206 can be part of the central electronics complex or it can be separate from the central electronics complex. I / O subsystem 206 directs the flow of information between the main storage 202 and the input / output control unit 230 and input / output (I / O) devices 240 coupled to the central electronics complex.

[0026] Many types of I / O devices can be used. One particular type of I / O device is a data storage device 250. The data storage device 250 can store one or more programs 252, one or more computer-readable program instructions 254, or data, or a combination thereof. These computer-readable program instructions can be configured to perform functions of embodiments of the present invention.

[0027] As an example, each processor 204 includes and / or accesses a data transfer component (or other component) 260 used for data transfer from right to left (and / or other operations in one or more aspects of the present invention). In various examples, there may be one or more components that perform these functions. Many variations are possible.

[0028] The Central Electronics Complex 200 may include, or be combined with, removable / non-removable volatile / non-volatile computer system storage media, or both. For example, the Central Electronics Complex 200 may include, or be combined with, non-removable non-volatile magnetic media (commonly called “hard drives”), magnetic disk drives for reading from and writing to removable non-volatile magnetic disks (e.g., “floppy disks”), and / or optical disk drives for reading from and writing to removable non-volatile optical disks such as CD-ROMs, DVD-ROMs, or other optical media. It should be understood that other hardware components or software components, or both, may be used with the Central Electronics Complex 200. Examples of such components include, but are not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems.

[0029] Furthermore, Central Electronics Complex 200 may operate with a number of other general-purpose or dedicated computing system environments or configurations. Examples of well-known computing systems, environments, or configurations, or combinations thereof, that may be suitable for use with Central Electronics Complex 200 include, but are not limited to, personal computer (PC) systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of the systems or devices mentioned above.

[0030] While various examples of computing environments are described herein, one or more embodiments of the present invention can be used with many types of environments. The computing environments provided herein are merely examples.

[0031] As shown above, one common task in computer programming is to insert one or more elements at a specific position in an array. To perform this task, all elements from the insertion point to the end of the array are moved up by the amount of one or more elements. Then, the new element is stored at the insertion point in the array. This movement of existing elements begins, for example, with the most highly numbered element and ends with the existing element at the insertion point, moving down the address.

[0032] As an example, in the C language, element movement can be coded as shown below. Suppose we currently have N elements in an array and want to insert a new element at position P. for(int i=N;i>=P;i--) array[i+1]=array[i];

[0033] Traditionally, array elements and memory addresses with lower numbers are considered to be on the left, and array elements and addresses with higher numbers are considered to be on the right. Therefore, in one example, data is moved from right to left.

[0034] According to one aspect of the present invention, a single architectural hardware instruction called the Move Right to Left instruction is provided for moving data from right to left. In one example, a single architectural instruction that moves data from right to left (instead of the conventional left to right) is used directly by the compiler to perform the following loop. for(int i=N;i>=P;i--) array[i+1]=array[i] Inserting elements into an array using this instruction is considerably faster than using discrete instructions or immediate software buffers within this loop. This simplifies processing and task handling within the computer, improving system performance.

[0035] Furthermore, while one example of using the Move Right to Left command is inserting elements into an array, it can also be used to perform other tasks that involve moving data from right to left.

[0036] An embodiment of the Move Right to Left instruction, used for the purpose of moving data from right to left, is described with reference to Figures 3A-3B. In one example, this instruction is executed using a general-purpose processor (e.g., processor 102 or 204). In this description, a specific location, a specific field, or a specific size of those fields, or a combination thereof (e.g., a specific byte or bit or both) is indicated. However, other locations, fields, sizes, or combinations thereof may also be provided. Furthermore, it may be specified that a bit be set to a specific value, for example, 1 or 0, but this is merely an example. In other examples, the bit may be set to a different value, such as the opposite value, or another value. Many variations are possible.

[0037] Referring to Figure 3A, in one example, the format of the Move Right to Left (MVCRL) instruction 300 is an SSE format indicating storage and storage operations, including an extended operation code (opcode) field. For one example, this instruction includes an operation code field 302 (e.g., bits 0-15) having an operation code indicating a Move Right to Left operation, a first base field (B1) 304 (e.g., bits 16-19) indicating a general-purpose register used by this instruction, a first displacement field (D1) 306 (e.g., bits 20-31) providing a first displacement, a second base field (B2) 308 (e.g., bits 32-35) indicating another general-purpose register used by this instruction, and a second displacement field (D2) 310 (e.g., bits 36-47) providing a second displacement. In one example, displacements D1 and D2 are treated as 12-bit unsigned binary integers. For example, the contents of the general-purpose register indicated by field B1 304 are added to the contents of field D1 306 to form the address of the first operand (in storage). The contents of the general-purpose register indicated by field B2 308 are added to the contents of field D2 310 to form the address of the second operand (in storage). Both operand addresses indicate, for example, the leftmost byte of each corresponding operand. In one example, fields 304-310 are separate from and independent of the opcode field. Furthermore, in one embodiment, these fields are separate from and independent of each other. However, in other embodiments, two or more fields may be combined.

[0038] In one embodiment, the execution of this instruction involves the use of implicit general-purpose registers (i.e., registers not explicitly specified by this instruction), such as general-purpose register 0 GR0. As shown in Figure 3B, the contents of general-purpose register 0 (320) include length (L) 322. For example, bits 56-63 of general-purpose register 0 include the lengths of the first and second operands. Furthermore, in one example, bits 32-55 of general-purpose register 0 include 0; otherwise, this program may not operate compatiblely in the future. In this embodiment, bits 0-31 of general-purpose register 0 are ignored. For example, L specifies the number of bytes to the right of the first byte of each operand. Thus, the length of each operand in bytes is 1-256, which corresponds to the length code L from 0-255. In one example, this length is provided in an implicit register, but in other examples, this length is provided in one field of this instruction, or in a register or other location specified by this instruction. Many possibilities exist.

[0039] The execution of the Move Right to Left instruction places the second operand (whose position is indicated, for example, using the second operand address) at the position of the first operand (specified by the first operand address), which is done, for example, by moving bytes from right to left, starting from the rightmost byte of each operand. The result is obtained as if both operands had been processed from right to left. However, when observed by other CPUs and channel programs, the order of access to these operands is not determined. If either operand is at position 2 in 24-bit addressing mode... 24 From -1 to 0, or position 2 in 31-bit addressing mode. 31 From -1 to 0, or position 2 in 64-bit addressing mode. 64 It can sometimes wrap around from -1 to 0.

[0040] The result is unpredictable when the byte position indicated by the second operand address (the leftmost byte of the source) overlaps with any byte position of the first operand (destination) other than the byte position indicated by the first operand address (the leftmost byte of the destination).

[0041] In one example, this condition code will not be changed.

[0042] Examples of program exceptions include the following: • Access (fetch, operand 2; store, operand 1) • Operation (If miscellaneous instruction extensions facility 3 is not installed (for example, if function instruction bit 61 is not set to 1)) Transaction constraints

[0043] Examples of programming notes include the following: 1. To insert an element, you can use the Move Right to Left command to create a gap in the array, for example, by moving the original element and all elements above it to the right. In this case, you cannot use commands that move from left to right, such as the Move Character command, because those commands destructively overwrite the array elements. 2. For most other instructions with two or more storage operands, destructive overlap occurs when the leftmost byte of the destination operand lies within the source operand and the two operands do not completely overlap. However, for the Move Right to Left instruction, destructive overlap occurs when the rightmost byte of the destination operand lies within the source operand and does not completely overlap the source operand. Therefore, the scenario described in Programming Considerations 1 is not a destructive overlap with respect to MVCRL, but it would be a destructive overlap when the Move Character (MVC) instruction of the z / Architecture(R) hardware architecture is used.

[0044] In one embodiment, a hardware embodiment that uses an internal buffer renders destructive overlap checking ineffective. For example, hardware (e.g., a processor or other hardware coupled to a processor) fetches the entire source operand into an internal hardware buffer before storing it in the destination operand. The hardware performing this has a large internal buffer that is not visible to other CPUs fetching the destination operand stored by this CPU.

[0045] Therefore, according to one aspect of the present invention, the Move Right to Left instruction can be implemented in at least two ways: (1) one processor moves the data from right to left, and then another processor observes only the right-to-left ordering; or (2) one processor moves the entire source data into an internal hardware buffer, and then moves the entire data to its destination. In case (2), the storage of this target data can be performed in any order (e.g., in an unspecified direction, from left to right, from right to left, etc.). In case (2), because the data is first copied into the internal hardware buffer, when observed by this processor, the data appears to be moving from right to left. This is because overlapping byte positions are not copied (duplicated), but instead appear to move. When observed by another processor, the data moves, for example, in an unspecified direction.

[0046] Further details of one embodiment of the processing based on the execution of a Move Right to Left instruction according to one aspect of the present invention will be described with reference to Figure 4. In one example, this instruction is executed using a processor such as a general-purpose processor 102 or 204. In another example, this instruction is executed using the processor's hardware. This hardware may be located within the processor or may be coupled to the processor to receive this instruction from the processor. This processor, for example, acquires, decodes, and prepares this instruction for execution on the hardware. Other variations are possible.

[0047] Referring to Figure 4, first, an instruction called Move Right to Left (e.g., MVCRL instruction 300) is obtained (e.g., fetched, received, and provided) in step 400 and executed in step 402. Execution of this instruction includes, for example, obtaining an instruction for the length of the data to be moved in step 404. This length (e.g., L322) is specified by a location used by this instruction (e.g., an implicit register such as general-purpose register 0 (320)).

[0048] In step 406, one or more bytes of data are moved from the source operand (the location of the source operand is specified using the fields of this instruction, e.g., B1, D1) to the destination location (specified using the fields of this instruction, e.g., B2, D2), starting from the rightmost byte, e.g., the rightmost byte first. The amount of data to move (e.g., the number of bytes to move) depends on the length obtained, e.g., the length obtained from general-purpose register 0.

[0049] In step 408, even if there is overlap between the source operand position and the destination position (except when the leftmost byte of the source operand position overlaps with a byte of the destination position other than the leftmost byte of the destination position), the result of moving the data from right to left (i.e., the moved data) is predictable.

[0050] For example, in step 410, when observed by the processor executing this instruction, the order of access used to perform this right-to-left data movement is right-to-left, but when observed by another processor / channel program, the order of access is undefined.

[0051] As described herein, in one embodiment, a single instruction (e.g., a single architectural machine instruction of the hardware / software interface, e.g., the Move Right to Left instruction) is provided to move data from right to left. This instruction is, for example, a hardware instruction defined in an instruction set architecture (ISA). As a result, the complexity of the program involved in moving data from right to left is reduced. Furthermore, the performance of the operation, and therefore the performance of the processor, is improved. Processing becomes faster, execution time is reduced, and performance is improved.

[0052] While various fields and registers for the Move Right to Left instruction have been described, one or more embodiments of the present invention may use other fields or registers, additional fields or registers, fewer fields or registers, or fields and registers of different sizes, etc. Many variations are possible. For example, an implicit register may be used instead of an explicitly specified register or field in this instruction, or an explicitly specified register or field may be used instead of an implicit register or field, or both may be used. Other variations are also possible.

[0053] One or more aspects of the present invention are inextricably linked to computer technology, facilitating processing within computers and improving the performance of processing within computers. Moving data from right to left using a single architected machine instruction improves performance within the computing environment by reducing complexity and increasing processing speed. This data, instruction, or both can be used in many technical fields such as computer processing, medical processing, and security. By providing data movement optimization, these technical fields are improved by reducing execution time.

[0054] Further details of an embodiment that facilitates processing within a computing environment, relating to one or more aspects of the present invention, will be described with reference to Figures 5A-5B.

[0055] Referring to Figure 5A, in one embodiment, an instruction to move data is obtained (500). This instruction is a single architectural instruction (502). This instruction is executed (504). The execution of this instruction involves moving a specified length of data from a source location to a destination location in a right-to-left direction to provide a predictable result (506). A portion of the destination location is contained within the source location from which the data was moved (508).

[0056] For example, the source location is one size in bytes, and the destination location is another size in bytes (510). The portion of the destination location includes, for example, one or more bytes of the destination location that overlap with one or more bytes of the source location (512). This one or more bytes of the destination location includes the leftmost byte of the destination location (514). Furthermore, in one example, the leftmost byte of the source location is outside the destination location (516). Furthermore, in one example, the one size in bytes and the other size in bytes are the same size (518).

[0057] As an example, referring to Figure 5B, the specified length of the data to be moved is determined by a location associated with the instruction (520). This location is, for example, an implicit register associated with the instruction (522).

[0058] Furthermore, in one example, the source location is specified using one or more fields of the instruction (524), and the destination location is specified using one or more other fields of the instruction (526).

[0059] In one embodiment, when the execution of this instruction is performed by a processor in a computing environment and observed by the processor, the order of access to the source and destination locations for moving the data is from right to left, but when observed by one or more other processors, the order of access is undetermined (528).

[0060] In one embodiment, the execution of this instruction is performed by a processor in the computing environment, and the data movement includes copying the data from a source location to an internal buffer (530) and moving the data from the internal buffer to a destination location (532). When observed by the processor, the data appears to move from right to left, and when observed by one or more other processors, the data appears to move in an unspecified direction (534).

[0061] The examples described herein illustrate the movement of bytes of data, but other data units of different sizes can also be moved. Bytes are merely an example; other variations and embodiments are possible.

[0062] Many types of computing environments can utilize aspects of the present invention. Another embodiment of a computing environment for incorporating and using one or more aspects of the present invention is described with reference to Figure 6A. In this example, the computing environment 10 includes, for example, a native central processing unit (CPU) 12, memory 14, and one or more input / output devices or interfaces 16, all coupled to each other via, for example, one or more buses 18 or other connections or both. For example, the computing environment 10 may include a PowerPC(R) processor provided by International Business Machines Corporation in Armonk, New York, an HP Superdome with Intel Itanium II processors provided by Hewlett Packard Co. in Palo Alto, California, or other machines based on architectures provided by International Business Machines Corporation, Hewlett Packard, Intel Corporation, Oracle, etc., or a combination thereof. IBM, z / Architecture, IBM Z, z / OS, PR / SM, and PowerPC are trademarks or registered trademarks of International Business Machines Corporation in at least one jurisdiction. Intel and Itanium are trademarks or registered trademarks of Intel Corporation or its affiliates in the United States and other countries.

[0063] The native central processing unit 12 includes one or more native registers 20, such as one or more general-purpose registers, one or more dedicated registers, or both, used during processing within this computing environment. These registers contain information representing the state of the environment at a particular point in time.

[0064] Furthermore, the native central processing unit 12 executes instructions and code stored in memory 14. In one particular example, this central processing unit executes emulator code 22 stored in memory 14. This code enables a computing environment configured on one architecture to emulate another architecture. For example, the emulator code 22 enables machines based on architectures other than the z / Architecture(R) hardware architecture, such as PowerPC(R) processors and HP Superdome servers, to emulate the z / Architecture(R) hardware architecture and execute software and instructions developed on the z / Architecture(R) hardware architecture.

[0065] Further details regarding the emulator code 22 will be described with reference to Figure 6B. The guest instructions 30 stored in memory 14 include software instructions developed to run on architectures other than the native CPU 12 architecture (e.g., those correlated with machine instructions). For example, the guest instructions 30 may be designed to run on a processor based on the z / Architecture(R) hardware architecture, but are instead emulated on the native CPU 12. The native CPU 12 may be, for example, an Intel Itanium II processor. In one example, the emulator code 22 includes an instruction fetch routine 32 that retrieves one or more guest instructions 30 from memory 14 and optionally provides local buffering for the retrieved instructions. The emulator code 22 further includes an instruction translation routine 34 that determines the type of the retrieved guest instruction and translates that guest instruction into one or more corresponding native instructions 36. This translation includes, for example, identifying the function that the guest instruction is supposed to perform and selecting a native instruction that performs that function.

[0066] Furthermore, the emulator code 22 includes an emulation control routine 40 that executes those native instructions. The emulation control routine 40 can cause the native CPU 12 to execute a native instruction routine that emulates one or more previously obtained guest instructions, and at the end of such execution, it can return control to an instruction fetch routine that emulates obtaining the next guest instruction or a set of guest instructions. The execution of the native instruction 36 may include loading data from memory 14 into registers, storing data back into memory from registers, or performing a certain type of arithmetic or logical operation determined by the translation routine.

[0067] Each routine is implemented, for example, as software, which is stored in memory and executed by the native central processing unit 12. In other examples, one or more of these routines or operations are implemented as firmware, hardware, software, or a combination thereof. The registers of the emulated processor can be emulated by using the registers 20 of the native CPU or by using their locations in memory 14. In embodiments, the guest instruction 30, the native instruction 36, and the emulator code 22 may reside in the same memory or may be distributed across different memory devices.

[0068] The computing environments described above are merely examples of computing environments that can be used. Other environments may also be used, but are not limited to non-partitioned environments, partitioned environments, emulated environments, or combinations thereof. Embodiments are not limited to a single environment.

[0069] Each computing environment can be configured to include one or more embodiments of the present invention. According to one or more embodiments of the present invention, each computing environment can be configured, for example, to provide data transfer processing.

[0070] One or more of these aspects may relate to cloud computing.

[0071] While this disclosure includes a detailed description of cloud computing, it should be understood that embodiments of the teachings described herein are not limited to cloud computing environments. Embodiments of the present invention can be implemented in any other type of computing environment that is currently known or to be developed in the future.

[0072] Cloud computing is a service delivery model that enables convenient on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and services) that can be rapidly supplied and released with minimal administrative effort or minimal interaction with service providers. This cloud model may include at least five features, at least three service models, and at least four deployment models.

[0073] The features are as follows: On-demand self-service: Cloud consumers can automatically and unilaterally receive the supply of computing functions such as server time and network storage as needed, without requiring human interaction with the service provider. Broad Network Access: The functionality is available over the network and accessed through standard mechanisms that facilitate use by heterogeneous thin or thick client platforms (e.g., mobile phones, laptops, and PDAs). Resource pooling: To serve a large number of consumers using a multi-tenant model, a provider's computing resources are pooled, and different physical and virtual resources are dynamically allocated and reallocated as needed. Consumers generally have a sense of location independence, meaning they cannot control or know the exact location of the resources provided, but can specify the location at a higher level of abstraction (e.g., country, state, or data center). Rapid elasticity: The functionality allows for rapid and elastic supply, sometimes automatically, to quickly scale out, and rapid release to quickly scale in. To consumers, the functionality available for supply often seems limitless, allowing them to purchase any amount they want, whenever they want. Measured services: Cloud systems automatically control and optimize resource usage by utilizing metric functions at an appropriate level of abstraction for the type of service (e.g., storage, processing, bandwidth, and user accounts in use). They can monitor, control, and report on resource usage, providing transparency to both service providers and consumers.

[0074] The service model is as follows: Software as a Service (SaaS): This functionality, offered to consumers, allows them to use a provider's applications running on a cloud infrastructure. The applications are accessible from various client devices through thin client interfaces such as web browsers (e.g., web-based email). Except for potentially limited user-specific application configurations, consumers do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, storage, or individual application functionalities. Platform as a Service (PaaS): This feature, offered to consumers, allows them to deploy consumer-created or acquired applications on cloud infrastructure, using programming languages ​​and tools supported by the provider. Consumers do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, or storage, but they can control the deployed applications and, in some cases, the application hosting environment configuration. Infrastructure as a Service (IaaS): This feature, offered to consumers, provides processing, storage, networking, and other fundamental computing resources, allowing consumers to deploy and run any software they choose, including operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but they can control the operating system, storage, and deployed applications, and in some cases, have limited control over selected network components (e.g., host firewalls).

[0075] The deployment model is as follows: Private Cloud: This cloud infrastructure is operated solely for an organization. The infrastructure can be managed by that organization or a third party and can reside on-premises or off-premises. Community Cloud: This cloud infrastructure is shared by several organizations to support specific communities that share common interests (e.g., mission, security requirements, policies, and compliance issues). The infrastructure can be managed by the organization or a third party and can reside on-premises or off-premises. Public Cloud: This cloud infrastructure is available to the general public or large industry groups and is owned by an organization that sells cloud services. Hybrid Cloud: This cloud infrastructure is a composite of two or more clouds (private, community, or public) that maintain their own distinct entities but are united by standardized or proprietary technologies (e.g., cloud bursting for load balancing between clouds) that enable data and application portability.

[0076] Cloud computing environments are service-oriented environments that emphasize statelessness, low coupling, modularity, and semantic interoperability. At the heart of cloud computing is an infrastructure that includes a network of interconnected nodes.

[0077] Referring now to Figure 7, an exemplary cloud computing environment 50 is shown. As shown, the cloud computing environment 50 includes one or more cloud computing nodes 52, and local computing devices used by cloud consumers, such as personal digital assistants (PDAs) or mobile phones 54A, desktop computers 54B, laptop computers 54C, or automotive computer systems 54N, or a combination thereof, can communicate with these nodes. The nodes 52 can communicate with each other. These nodes may be physically or virtually grouped into one or more networks, such as private, community, public, or hybrid clouds, or a combination thereof, as described above (not shown). This allows the cloud computing environment 50 to provide infrastructure as a service, platform as a service, or software as a service, or a combination thereof, so that cloud consumers do not need to maintain resources on their local computing devices. It is understood that the types of computing devices 54A-N shown in Figure 7 are intended to be merely examples, and that the computing node 52 and the cloud computing environment 50 can communicate with any type of computerized device over any type of network, an addressable network connection, or both (for example, using a web browser).

[0078] Referring now to Figure 8, a set of functional abstraction layers provided by the cloud computing environment 50 (Figure 7) is shown. It should be understood in advance that the components, layers, and functions shown in Figure 8 are intended to be merely examples, and embodiments of the present invention are not limited thereto. As shown in the figure, the following layers and corresponding functions are provided:

[0079] The hardware and software layer 60 includes hardware components and software components. Examples of hardware components include a mainframe 61, a RISC (Reduced Instruction Set Computer) architecture-based server 62, a server 63, a blade server 64, a storage device 65, and network and networking components 66. In some embodiments, the software components include network application server software 67 and database software 68.

[0080] The virtualization layer 70 provides an abstraction layer from which the following examples of virtual entities can be provided: a virtual server 71, virtual storage 72, a virtual network 73 including a virtual private network, a virtual application and operating system 74, and a virtual client 75.

[0081] For example, the management layer 80 can provide the following functions: Resource supply 81 provides dynamic procurement of computing resources and other resources used to perform tasks within the cloud computing environment. Metering and Pricing 82 provides cost tracking when resources are used within the cloud computing environment and billing or invoices for the consumption of these resources. For example, these resources may include application software licenses. Security provides identification of cloud consumers and tasks and protection of data and other resources. User portal 83 provides consumers and system administrators with access to the cloud computing environment. Service level management 84 provides allocation and management of cloud computing resources so that the required service levels are achieved. Service Level Agreement (SLA) planning and execution 85 provides proactive coordination and procurement of cloud computing resources that are expected to be needed in the future by the SLA.

[0082] The workload layer 90 provides examples of functions that can leverage a cloud computing environment. Examples of workloads and functions that can be provided from this layer include mapping and navigation 91, software development and lifecycle management 92, virtual classroom education delivery 93, data analysis processing 94, transaction processing 95, and data movement processing 96.

[0083] Aspects of the present invention may be systems, methods, or computer program products, or combinations thereof, at any possible level of technical detail of integration. A computer program product may include a computer-readable storage medium having computer-readable program instructions thereon for causing a processor to execute aspects of the present invention.

[0084] This computer-readable storage medium can be a tangible device capable of holding and storing instructions for use by an instruction execution device. This computer-readable storage medium can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or a suitable combination thereof. A non-exhaustive list of more specific examples of computer-readable storage media includes portable computer diskettes, hard disks, random-access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random-access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disks (DVDs), memory sticks, floppy disks, mechanically encoded devices such as punch cards or raised structures in grooves on which instructions are recorded, and suitable combinations thereof. When used herein, computer-readable storage media should not be construed as transient signals, such as radio waves or other freely propagating electromagnetic waves, or electromagnetic waves propagating within a waveguide or other transmission medium (e.g., light pulses passing through optical fiber cables), or electrical signals transmitted through wires.

[0085] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to the corresponding computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. This network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers or edge servers, or a combination thereof. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and transfers those computer-readable program instructions for storage on a computer-readable storage medium within the respective computing / processing device.

[0086] The computer-readable program instructions for performing the operation of the present invention may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or configuration data for an integrated circuit, or they may be source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk(R) and C++, and procedural programming languages ​​such as the C programming language or similar programming languages. These computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or remote server. In the last scenario above, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or this connection may be made to an external computer (for example, via the Internet using an Internet service provider). In some embodiments, to carry out aspects of the present invention, an electronic circuit including, for example, a programmable logic circuit, a field-programmable gate array (FPGA), or a programmable logic array (PLA) may execute the computer-readable program instruction by personalizing the electronic circuit using the state information of the computer-readable program instruction.

[0087] In this specification, aspects of the present invention will be described with reference to flowcharts, block diagrams, or both, of methods, apparatus (systems), and computer program products according to embodiments of the present invention. It will be understood that each block in those flowcharts, block diagrams, or both, and combinations of blocks in those flowcharts, block diagrams, or both, can be implemented by computer-readable program instructions.

[0088] These computer-readable program instructions can be provided to the processor of a general-purpose computer, a dedicated computer, or other programmable data processing device forming a machine, such that the instructions executed by the processor of that computer or other programmable data processing device generate means to perform the functions / operations specified in the blocks of these flowcharts or block diagrams or both. These computer-readable program instructions can further be stored in a computer-readable storage medium that can instruct a computer, a programmable data processing device, or other device or a combination thereof to function in a particular manner, such that the computer-readable storage medium in which the instructions are stored contains a product containing instructions that perform the functions / operations specified in the blocks of these flowcharts or block diagrams or both.

[0089] These computer-readable program instructions can further be loaded onto a computer, other programmable device, or other device in such a manner that these instructions, executed on the computer, other programmable device, or other device, perform the functions / operations specified in the blocks of these flowcharts or block diagrams or both, in order to cause a series of operational steps on the computer, other programmable device, or other device to produce a process performed by the computer.

[0090] The flowcharts and block diagrams in the attached figures illustrate the architecture, functions, and operation of possible embodiments of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in those flowcharts or block diagrams may represent a module, segment, or portion of instructions containing one or more executable instructions that perform a specified logical function. In some alternative embodiments, the functions shown in the blocks may be executed in an order different from the order shown in the figures. For example, two blocks shown consecutively may actually be executed substantially simultaneously, or depending on the functions they contain, those blocks may be executed in reverse order. It should also be noted that each block in those block diagrams or flowcharts or both, and combinations of blocks in those block diagrams or flowcharts or both, may be implemented by a hardware-based dedicated system that performs a specified function or operation or implements a combination of dedicated hardware and computer instructions.

[0091] In addition to the above, a service provider that provides management of customer environments may, for example, provide, propose, deploy, manage, and supply one or more aspects. For example, a service provider may, for one or more customers, generate, maintain, and support computer code or computer infrastructure or both that execute one or more aspects. In return, the service provider may receive payments from customers, for example, under a subscription agreement or a fee agreement or both. In addition, or instead, the service provider may receive payments by selling advertising content to one or more third parties.

[0092] In one embodiment, an application can be deployed to perform one or more embodiments. For example, the deployment of this application includes providing a computer infrastructure capable of performing one or more embodiments.

[0093] In a further embodiment, a computing infrastructure can be deployed, which includes integrating computer-readable code into a computing system, and this computer-readable code, together with the computing system, can perform one or more embodiments.

[0094] In a further embodiment, a process for integrating a computing infrastructure can be provided, which includes integrating computer-readable code into a computing system. This computer system includes a computer-readable medium, which includes one or more embodiments. This computer-readable code can perform one or more embodiments together with the computer system.

[0095] Although various embodiments have been described above, these embodiments are merely examples. For example, one or more embodiments can be incorporated and used with computing environments of other architectures. Furthermore, different instructions or operations can be used. In addition, different sizes of data to be moved can be specified, or other fields, field sizes, etc., or combinations thereof can be specified. Many variations are possible.

[0096] Furthermore, other types of computing environments can benefit, and other types of computing environments can be used. For example, a data processing system suitable for storing or executing program code, or both, can be used, which includes at least two processors directly coupled to a memory element or indirectly coupled to a memory element via a system bus. This memory element includes, for example, local memory used during the actual execution of the program code, mass storage, and cache memory, the cache memory providing temporary storage for at least some of the program code to reduce the number of times the code must be retrieved from mass storage during execution.

[0097] Input / output devices or I / O devices (including, but not limited to, keyboards, displays, pointing devices, DASDs, tapes, CDs, DVDs, thumb drives, and other memory media) can be connected to the system directly or via an I / O controller. Network adapters can also be connected to the system to enable the data processing system to connect to other data processing systems or remote printers or storage devices through an intervening dedicated or public network. Modems, cable modems, and Ethernet cards are examples of usable types of network adapters.

[0098] The terms used herein are intended solely to describe specific embodiments and are not intended to be limiting. Unless otherwise evident from the context, the singular forms "a," "an," and "the" are intended to include the plural forms as used herein. As used herein, the terms "comprises" or "comprising" or both specify the presence of an expressly stated feature, integer, step, action, element, or component, or combination thereof, but are understood not to exclude the presence or addition of one or more other features, integers, steps, actions, elements, components, or groups thereof, or combination thereof.

[0099] Corresponding structures, materials, and operations, and, where present, equivalents of all means or steps and functional elements described in the claims, are intended to include any structures, materials, or operations for performing a function together with other elements of the claims described in the claims. Although descriptions of one or more embodiments have been presented for illustrative and descriptive purposes, the descriptions are not intended to be exhaustive or to limit oneself to the disclosed forms. Many variations and modifications will be obvious to those skilled in the art. The embodiments have been selected and described to best illustrate various aspects and practical uses, and to enable those skilled in the art to understand various embodiments with various modifications suitable for the particular use intended.

Claims

1. A method implemented in a computer to facilitate processing within a computing environment, The computer obtains a data move instruction, which is a single architectural instruction that moves data from right to left, starting with the rightmost byte. The processor of the computing environment executes the instructions. Includes, The above action involves moving data within a dataset to create an insertion point for inserting additional data into the dataset. The aforementioned data movement includes moving the data of a specified length from the source position to the destination position, starting with the rightmost byte and moving from right to left. In cases where a portion of the destination location is included in the source location from which the data is moved, and in order to provide predictable results even in that case, The source position is of one size in units of bytes, the destination position is of another size in units of bytes, and the portion of the destination position includes one or more bytes of the destination position that overlaps with one or more bytes of the source position. The one or more bytes of the destination position include the leftmost byte of the destination position. method.

2. A method implemented in a computer to facilitate processing within a computing environment, The computer obtains a data move instruction, which is a single architectural instruction that moves data from right to left, starting with the rightmost byte. The processor of the computing environment executes the instructions. Includes, The above action involves moving data within a dataset to create an insertion point for inserting additional data into the dataset. The aforementioned data movement includes moving the data of a specified length from the source position to the destination position, starting with the rightmost byte and moving from right to left. In cases where a portion of the destination location is included in the source location from which the data is moved, and in order to provide predictable results even in that case, The source position is of one size in units of bytes, the destination position is of another size in units of bytes, and the portion of the destination position includes one or more bytes of the destination position that overlaps with one or more bytes of the source position. The leftmost byte of the source position is outside the destination position. method.

3. The method according to claim 1 or 2, wherein the one size in bytes and the other size in bytes are the same size.

4. The method according to claim 1 or 2, wherein the specified length of the data to be moved is specified by an implicit register associated with the instruction.

5. The method according to claim 1 or 2, wherein the source location is specified using one or more fields of the instruction, and the destination location is specified using one or more other fields of the instruction.

6. Memory and A processor that communicates with the aforementioned memory and A computer system equipped with, The computer system is configured to perform the method described in any one of claims 1 to 5. Computer system.

7. A computer program for causing a computer to perform the method described in any one of claims 1 to 5.

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