Temporary fixed substrate, method of manufacturing temporary fixed substrate, and temporary fixing method

Abstract

Provided is a temporary fixed substrate that suppresses peeling defects and enables semiconductor packages to be obtained at a higher yield than in the related art. A temporarily fixed substrate, in which a plurality of electronic components are adhered on one main surface, and which is temporarily fixed by a resin mold, has a chamfered region at the end of each of the one main surface and the other main surface over the entire outer circumference, and the arithmetic mean roughness of the chamfered region on at least one main surface side is 0.1 μm to 10 μm and larger than the arithmetic mean roughness of the one main surface.

Description

Temporary fixing substrate, manufacturing method of temporary fixing substrate, and temporary fixing method

[0001] The present invention relates to a temporary fixing substrate used in a manufacturing process of a semiconductor package.

[0002] FOWLP (Fan-out Wafer Level Package) technology is known as a semiconductor package manufacturing technology. The FOWLP technology roughly involves the steps of: molding a resin onto a temporary fixing substrate on which a semiconductor chip is temporarily fixed with an adhesive; grinding the resin mold to expose the electrode ends of the semiconductor chip; forming a thin-film rewiring layer (multilayer wiring) and solder balls on the surface where the electrode ends are exposed; and singulating the individual packages and peeling them off from the temporary fixing substrate, thereby obtaining semiconductor packages with a lower height than conventional ones.

[0003] A mode in which a light-transmitting ceramic substrate is used as a temporary fixing substrate for chips in such FOWLP technology is already known (see, for example, Patent Documents 1 and 2). The light-transmitting ceramic substrate satisfies all of the requirements required for a temporary fixing substrate, namely, high flatness required for exposing electrode ends, high rigidity and a reverse warpage shape required for suppressing warpage during multilayer wiring formation, light transmittance that allows transmission of laser light for curing the adhesive, and chemical resistance that allows cleaning and reuse after use.

[0004] However, conventional temporary fixing substrates have a problem in that peeling defects occur in which the resin portion peels off from the outer periphery, resulting in a decrease in yield.

[0005] Furthermore, conventional temporary fixing substrates have also had the problem of chipping (defects) occurring in the outer periphery, resulting in a decrease in yield.

[0006] Patent No. 6430081 Patent No. 6420023

[0007] The present invention has been made in view of the above-mentioned problems, and has an object to provide a temporary fixing substrate that can suppress peeling defects and obtain semiconductor packages with a higher yield than conventional methods.

[0008] A second object of the present invention is to suppress the occurrence of chipping at the outer periphery of the temporary fixing substrate.

[0009] In order to solve the above problems, a first aspect of the present invention is a temporary fixing substrate having one main surface on which a predetermined fixing object is temporarily fixed, characterized in that the substrate has chamfered regions at the end portions along the entire periphery of each of the one main surface and the other main surface, and the arithmetic mean roughness of the chamfered region on at least the one main surface side is 0.1 μm to 10 μm and is larger than the arithmetic mean roughness of the one main surface.

[0010] A second aspect of the present invention is a temporary fixing substrate according to the first aspect, characterized in that the chamfered region has a first chamfered portion and a second chamfered portion having different inclination angles relative to the one main surface.

[0011] A third aspect of the present invention is the temporary fixing substrate according to the first or second aspect, characterized in that the arithmetic mean roughness of the one main surface and the other main surface is 100 nm or less.

[0012] A fourth aspect of the present invention is the temporary fixing substrate according to any one of the first to third aspects, characterized in that the arithmetic mean roughness of the side edge is smaller than the arithmetic mean roughness of the chamfered region.

[0013] A fifth aspect of the present invention is the temporary fixing substrate according to the fourth aspect, characterized in that the arithmetic mean roughness of the side edge is greater than the arithmetic mean roughness of the one main surface and is 5 μm or less.

[0014] A sixth aspect of the present invention is the temporary fixing substrate according to the fifth aspect, characterized in that the arithmetic mean roughness of the side edge is 2 μm or less.

[0015] A seventh aspect of the present invention is the temporary fixing substrate according to any one of the first to sixth aspects, characterized in that the predetermined fixing object is a plurality of electronic components or a semiconductor substrate.

[0016] An eighth aspect of the present invention is a method for manufacturing a temporary fixing substrate, one of whose main surfaces has a predetermined fixing object temporarily fixed, the method comprising: a molding step of producing a disk-shaped molded body made primarily of a translucent ceramic; a firing step of firing the molded body to obtain a sintered body; a chamfering step of forming chamfered regions on the edge parts of the one main surface and the other peripheral surface of the sintered body over the entire periphery; and a polishing step of polishing the sintered body with the chamfered regions formed thereon to obtain a temporary fixing substrate, wherein the arithmetic mean roughness of the chamfered region on at least one main surface side of the temporary fixing substrate obtained by the polishing step is 0.1 μm to 10 μm, and is greater than the arithmetic mean roughness of one main surface of the temporary fixing substrate.

[0017] A ninth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eighth aspect, characterized in that in the chamfering process, the chamfered area is formed into two stages, a first chamfered portion and a second chamfered portion, which have different inclination angles relative to the one main surface of the temporary fixing substrate.

[0018] A tenth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eighth or ninth aspect, characterized in that the arithmetic mean roughness of the one main surface and the other main surface of the temporary fixing substrate obtained by the polishing step is 100 nm or less.

[0019] An eleventh aspect of the present invention is a method for manufacturing a temporary fixing substrate according to any one of the eighth to tenth aspects, characterized in that the arithmetic mean roughness of the side edge of the temporary fixing substrate obtained by the polishing process is made smaller than the arithmetic mean roughness of the chamfered region.

[0020] A twelfth aspect of the present invention is a manufacturing method for a temporary fixing substrate according to the eleventh aspect, characterized in that the arithmetic mean roughness of the side end portion is greater than the arithmetic mean roughness of the one main surface of the temporary fixing substrate and is 5 μm or less.

[0021] A thirteenth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to any one of the eighth to twelfth aspects, characterized in that the predetermined fixing objects are a plurality of electronic components or semiconductor substrates.

[0022] A fourteenth aspect of the present invention is a method for temporarily fixing a predetermined object to a temporary fixing substrate, comprising the steps of: preparing a temporary fixing substrate having a chamfered region at an end portion along the entire periphery of one of its main surfaces; forming an adhesive layer on the temporary fixing substrate; placing the predetermined object to be fixed on the adhesive layer; and curing the adhesive layer to form an adhesive layer, thereby adhering the predetermined object to the temporary fixing substrate; wherein the arithmetic mean roughness of the chamfered region is 0.1 μm to 10 μm and is larger than the arithmetic mean roughness of the one of its main surfaces.

[0023] A fifteenth aspect of the present invention is a temporary fixing method according to the fourteenth aspect, characterized in that the chamfered region comprises a first chamfered portion and a second chamfered portion having different inclination angles relative to the one main surface.

[0024] A sixteenth aspect of the present invention is a temporary fixing method according to the fourteenth or fifteenth aspect, characterized in that the predetermined fixing object is a plurality of electronic components, and further includes a step of forming a resin mold on the adhesive layer and the plurality of electronic components adhered to the temporary fixing substrate by the adhesive layer.

[0025] A seventeenth aspect of the present invention is the temporary fixing method according to the fourteenth or fifteenth aspect, characterized in that the predetermined object to be fixed is a semiconductor substrate.

[0026] According to the first to seventeenth aspects of the present invention, during the process of temporarily fixing an object to be fixed, such as an electronic component, to a temporary fixing substrate, it is possible to suitably suppress the occurrence of peeling between the temporary fixing substrate and the object to be fixed, the adhesive layer, the adhesive layer, other resins, etc.

[0027] In particular, according to the fifth, sixth, and twelfth aspects, it is possible to suitably suppress the occurrence of chipping at the side edges of the temporary fixing substrate.

[0028] 5 is an enlarged schematic view of a main surface (surface) 1 a of a temporary fixing substrate 1 according to a first embodiment; FIG. 6 is an enlarged cross-sectional view of the vicinity of a side end 1 e of the temporary fixing substrate 1, showing the state of a chamfered region 2; FIG. 7 is a schematic cross-sectional view showing, in stages, an intermediate state of a process for fabricating a semiconductor package by FOWLP technology using the temporary fixing substrate 1; FIG. 8 is a flow chart outlining a manufacturing process for the temporary fixing substrate 1; FIG. 9 is a schematic view showing a process for chamfering the temporary fixing substrate 1 using a chamfering device 100; FIG. 10 is an enlarged schematic view of a portion A in FIG. 5, showing a process for performing chamfering; FIG. 11 is a schematic cross-sectional view showing a main part of a lapping polishing device 200 that performs lapping polishing of the temporary fixing substrate 1; FIG. 12 is a perspective view of a main part of the lapping polishing device 200, with an upper surface plate 202 omitted; FIG. 13 is a schematic view showing a process for polishing the side end 1 e of the temporary fixing substrate 1, where the chamfered region 2 is not formed, in the lapping polishing device 200;

[0029] 1 is a plan view of one main surface (front surface) 1a of a temporary fixing substrate 1 according to a first embodiment of the present invention. The temporary fixing substrate 1 is a substrate to which a semiconductor chip is temporarily fixed when a semiconductor package is fabricated by FOWLP (Fan-out Wafer Level Package) technology.

[0030] The temporary fixing substrate 1 is a translucent ceramic substrate having a diameter of several hundred mm (e.g., 300 mm), a thickness of several hundred μm to several mm (e.g., 1 mm), an in-plane thickness difference of several μm or less (e.g., 3 μm or less), and a warpage of several hundred μm or less (e.g., 200 μm). In the present embodiment, the translucent ceramic is a ceramic having a forward total light transmittance of 20% or more over the entire wavelength range of 200 nm to 1500 nm. Examples of such translucent ceramic include alumina, silicon nitride, aluminum nitride, and silicon oxide. For example, a suitable example of the temporary fixing substrate 1 is one having alumina as the main component and a forward total light transmittance of 70% or more at a wavelength of 1500 nm. When alumina is used as the main component, a high-purity alumina powder of 99.9% or more (preferably 99.95% or more) is preferably used as the raw material. The alumina powder may be mixed with magnesium oxide or zirconia (ZrO ) as a sintering aid. ２) and yttria (Y ２ O ３ ) is preferably added.

[0031] The front surface 1a, on which the semiconductor chip is mounted, and the other main surface (back surface) 1b are both polished in advance to form flat polished surfaces with low surface roughness. More specifically, the front surface 1a and back surface 1b have an in-plane thickness difference of within a few μm and an arithmetic mean roughness Ra of 100 nm or less (preferably 20 nm or less). More specifically, both the front surface 1a and back surface 1b have been subjected to lapping. There is no particular limit on the lower limit of the arithmetic mean roughness Ra of the front surface 1a and back surface 1b, but 1 nm is sufficient for practical use.

[0032] However, the temporary fixing substrate 1 according to this embodiment has a chamfered region 2 at the edge over the entire periphery of the front surface 1a. Although not shown, the chamfered region 2 is also provided on the back surface 1b in a similar manner. Therefore, strictly speaking, the arithmetic mean roughness Ra of the front surface 1a and the back surface 1b, which is 100 nm or less as described above, is achieved in the region excluding the chamfered region 2. Hereinafter, the front surface 1a and the back surface 1b excluding the chamfered region 2 will also be referred to as the flat front surface 1a and the flat back surface 1b, respectively.

[0033] FIG. 2 is an enlarged cross-sectional view of the vicinity of the side end 1 e of the temporary fixing substrate 1 , showing the state of the chamfered region 2 .

[0034] 2 illustrates an example in which the chamfered region 2 has a two-stage structure consisting of a first chamfered portion 2a inclined at an inclination angle θ1 with respect to the flat surface 1a and a second chamfered portion 2b inclined at an inclination angle θ2 (>θ1) with respect to the flat surface 1a. The second chamfered portion 2b is provided within a range of a predetermined width b (<a) from the side end portion 1e. Similarly, the flat back surface 1b also has a two-stage chamfered region 2 consisting of the first chamfered portion 2a and the second chamfered portion 2b. Note that the second chamfered portion 2b may be omitted, and the chamfered region 2 may have a single stage structure consisting only of the first chamfered portion 2a.

[0035] The inclination angle θ1 is preferably 5° to 55° (e.g., 30°). When the chamfered region 2 has a two-stage configuration, the inclination angle θ2 is preferably 35° to 85° (e.g., 60°), provided that θ1<θ2.

[0036] By providing the chamfered region 2 that satisfies the above-described range of inclination angles, chipping is suitably suppressed in the temporary fixing substrate 1. That is, in the case of a temporary fixing substrate 1 that does not have the chamfered region 2, chipping is likely to occur in the corners where the front surface 1 a and the back surface 1 b are perpendicular to the side edge 1 e, but in the case of the temporary fixing substrate 1 according to the present embodiment, by providing the chamfered region 2, there are no such perpendicular corners, and the angles between the chamfered region 2 and the front surface 1 a and the back surface 1 b, and the angles between the chamfered region 2 and the side edge 1 e are all obtuse angles, so chipping is extremely unlikely to occur.

[0037] That is, the provision of the chamfered region 2 has the effect of suppressing defects due to chipping and increasing the manufacturing yield of the temporary fixing substrate 1. In particular, the provision of the chamfered region 2 in a two-stage configuration consisting of the first chamfered portion 2 a and the second chamfered portion 2 b is more effective in suppressing chipping because such an obtuse angle is provided in two stages.

[0038] <Semiconductor Package Manufacturing Process and Effect of Roughening Chamfered Portion> Of the chamfered regions 2 provided on the temporary fixing substrate 1 in the above-described manner, at least the chamfered region 2 provided on the front surface (one main surface) 1a side is roughened to have a surface roughness greater than that of the flat surface 1a. Specifically, the arithmetic mean roughness Ra of the chamfered region 2 is 0.1 μm to 10 μm. This is intended to ensure the manufacturing yield of semiconductor packages. This point will be explained below.

[0039] 3A to 3C are schematic cross-sectional views showing, in stages, the intermediate state of a process for fabricating a semiconductor package by the FOWLP technique using a temporary fixing substrate 1. However, for simplicity of illustration, in Fig. 3, the chamfered region 2 is shown by diagonal lines only on the front surface 1a side.

[0040] 3(a), in the process of manufacturing a semiconductor package, first, a layer made of an adhesive (adhesive layer) 3α is formed on a temporary fixing substrate 1. Examples of the adhesive include double-sided tape and hot melt adhesives, and various known methods can be used to form the adhesive, such as roll coating, spray coating, screen printing, and spin coating.

[0041] 3(b), a plurality (a large number) of semiconductor chips 4 are placed on the adhesive layer 3α. The semiconductor chips 4 are placed in an area inside the chamfered area 2. The adhesive layer 3α is then cured to form the adhesive layer 3. The curing method is selected from heating, ultraviolet irradiation, and the like, depending on the material of the adhesive used in the adhesive layer 3α. As a result, the semiconductor chips 4 are adhesively fixed to the temporary fixing substrate 1.

[0042] When the semiconductor chips 4 are fixed to the temporary fixing substrate 1 in this manner, a molding resin is poured onto the entire upper surface of the temporary fixing substrate 1, that is, over the gaps 5 between the semiconductor chips 4 and the entire upper surfaces of the semiconductor chips 4. By hardening the molding resin, a resin mold 6 is formed, as shown in Fig. 3(c) . Examples of molding resins include epoxy resins, polyimide resins, polyurethane resins, and urethane resins.

[0043] Thereafter, the resin mold 6 is ground until the electrode ends of the semiconductor chip 4 are exposed, and then a rewiring layer and solder balls are formed on the ground surface. Finally, the substrate is divided into individual packages, and the temporary fixing substrate 1 is separated by laser lift-off.

[0044] The chamfered region 2 provided on the outer periphery of the temporary fixing substrate 1 has the effect of suppressing the occurrence of defects (peeling defects) in which the resin (adhesive layer 3 and resin mold 6) peels off from the temporary fixing substrate 1 (peeling suppression effect) during the semiconductor package manufacturing process described above, until the time when individualization and laser lift-off are performed.

[0045] In the case of conventional temporary fixing substrates, during the manufacturing process of the semiconductor package described above, air can get in between the temporary fixing substrate and the resin from the outside near the outer periphery of the temporary fixing substrate, forming air bubbles, which can cause peeling between the temporary fixing substrate and the resin.

[0046] However, when the temporary fixing substrate 1 according to this embodiment is used, the adhesive and / or molding resin penetrate into the chamfered region 2, which is provided on the periphery of the front surface 1a and has a surface roughness that is significantly greater than that of the front surface 1a, creating an anchoring effect between the adhesive and the resin in the chamfered region 2. This anchoring effect suppresses the formation of air bubbles on the periphery of the temporary fixing substrate 1 and the peeling of the resin. The presence or absence of air bubbles can be confirmed by visually inspecting the temporary fixing substrate 1 from the rear surface 1b side or by observing the temporary fixing substrate 1 with the naked eye or a stereomicroscope. In this embodiment, the resin is deemed to have peeled not only when a location where the resin and the temporary fixing substrate 1 are separated is confirmed as a result of visually inspecting the temporary fixing substrate 1 from the side end 1e side, but also when air bubbles measuring 3 mm or more in the longitudinal or lateral direction are confirmed as a result of visually inspecting the temporary fixing substrate 1 from the rear surface 1b side or by a stereomicroscope.

[0047] When the temporary fixing substrate 1 is provided with a chamfered region 2 having an arithmetic mean roughness Ra of 0.1 μm to 10 μm, the rate of occurrence of peeling defects (peeling defect rate) counted per substrate is suppressed to 3% or less. Preferably, the arithmetic mean roughness Ra of the chamfered region 2 is 0.5 μm to 2 μm.

[0048] From the viewpoint of preventing peeling, the width a of the chamfered region 2 may be up to 1% of the radius r of the temporary fixing substrate 1 at most, and the chamfered region 2 does not need to extend further inward beyond this. For example, in the case of a temporary fixing substrate 1 with a diameter of 300 mm (r = 150 mm), a width a of approximately 0.2 mm to 0.5 mm is preferable. The width b of the second chamfered portion 2b is preferably approximately 0.01 mm to 0.11 mm. The presence of the chamfered region 2 does not interfere with laser lift-off.

[0049] <Manufacturing Process of Temporary Fixing Substrate> Next, a manufacturing process of the temporary fixing substrate 1 having the chamfered region 2 will be described. Fig. 4 is a flow diagram that schematically shows the manufacturing process of the temporary fixing substrate 1. The temporary fixing substrate 1 is manufactured generally through a molded body preparation step (step S1), a firing step (step S2), a chamfering step (step S3), and a polishing step (step S4).

[0050] In manufacturing the temporary fixing substrate 1, a molded body containing a translucent ceramic powder as a main component is first prepared (step S1). For example, the above-mentioned alumina or other translucent ceramic raw material powder, ceramic powder such as magnesium or a sintering aid, and organic materials such as a binder and a solvent are kneaded in a ball mill or the like to produce a slurry, and this slurry is then formed into a tape. The obtained tape is sheared (cut) to obtain rectangular sheets of a predetermined size, which are then stacked and pressed, and the pressed laminate is die-cut into a circle. This results in a disk-shaped molded body. Alternatively, the molded body may be obtained by a doctor blade method, an extrusion method, a gel casting method, or the like.

[0051] Next, the formed compact is fired (step S2), which causes the organic components to be desorbed and gives a ceramic sintered body (temporarily fixed substrate 1 before chamfering and polishing).

[0052] The firing is preferably performed by calcining in an atmospheric furnace followed by firing in a hydrogen furnace. The sintering temperature in the firing is preferably 1700°C to 1900°C, more preferably 1750°C to 1850°C, from the viewpoint of densifying the sintered body.

[0053] After the sintering, the sintered body may be further annealed in a hydrogen furnace to adjust (correct) warpage. From the viewpoint of preventing deformation and abnormal grain growth while facilitating the discharge of the sintering aid, the annealing is preferably carried out at a temperature within ±100°C of the maximum temperature during the sintering, and more preferably at 1900°C or less. The annealing time is preferably 1 to 6 hours.

[0054] Once the sintered body (the temporary fixing substrate 1 before chamfering and polishing) is obtained, the entire outer periphery of the front and back surfaces (both main surfaces) of the sintered body is chamfered (step S3). In the following description, for convenience, the temporary fixing substrate 1 before chamfering and the temporary fixing substrate 1 before polishing will also be simply referred to as the temporary fixing substrate 1.

[0055] Fig. 5 is a diagram showing a schematic diagram of chamfering of the temporary fixing substrate 1 using a chamfering device (beveling machine) 100. The chamfering device 100 includes a table 101, a table rotation mechanism 102, a grindstone holding and moving mechanism 103, and a grindstone 104. Fig. 6 is an enlarged schematic diagram of a portion A in Fig. 5 showing a state in which chamfering is performed.

[0056] The table 101 is configured so that the temporary fixing substrate 1 to be chamfered can be placed horizontally on its upper surface, and by operating the table rotation mechanism 102, the table 101 and the temporary fixing substrate 1 placed thereon can be rotated in a horizontal plane.

[0057] The grinding wheel holding and moving mechanism 103 is capable of holding a disc-shaped grinding wheel 104 in a horizontal position at its lower end, and is capable of rotating and moving back and forth within a horizontal plane while holding the grinding wheel 104.

[0058] The grinding wheel 104 is disk-shaped, and its outer peripheral edge is a blade portion 104a that is an isosceles triangle in cross section, as shown in Fig. 6. The grit size of the grinding wheel 104 (blade portion 104a) is selected so that the arithmetic mean roughness Ra of the chamfered region 2 that is finally formed falls within the above-mentioned range of 0.1 µm to 10 µm.

[0059] When chamfering, first, the temporary fixing substrate 1 is placed on the upper surface of the table 101. Meanwhile, a grindstone 104 is attached to the grindstone holding and moving mechanism 103. At this time, the temporary fixing substrate 1 and the grindstone 104 are aligned so that their respective central heights in the thickness direction (positions in the vertical direction) coincide with each other.

[0060] Then, while the table 101 on which the temporary fixing substrate 1 is placed is rotated horizontally by the table rotation mechanism 102 as shown by the arrow AR1 (AR1a, AR1b), the grinding wheel holding and moving mechanism 103 rotates the grinding wheel 104 horizontally in the opposite direction to the table 101 as shown by the arrow AR2 (AR2a, AR2b), while moving it in a translational manner toward the side end 1e of the temporary fixing substrate 1 as shown by the arrow AR3 (AR3a, AR3b).

[0061] As a result of this rotation and translation, the blade 104a of the grindstone 104 approaches the side end 1e of the temporary fixing substrate 1 and eventually comes into contact with the two upper and lower edge portions 1ea and 1eb of the side end 1e of the temporary fixing substrate 1. As the rotation and translation of the grindstone 104 continues even after this contact, the side end 1e of the temporary fixing substrate 1 is gradually cut away from the edge portions 1ea and 1eb, and ultimately a chamfered region 2 is formed.

[0062] When the chamfering region 2 has a two-stage configuration, two types of grinding stones 104 having cutting edges 104a with different angles are used in sequence. Alternatively, one grinding stone 104 may be provided with a plurality of cutting edges 104a with different angles, and these may be used in sequence to form the two-stage chamfering region 2.

[0063] Since the semiconductor chip 4 is not normally mounted on the back surface 1b of the temporary fixing substrate 1 by the above process, roughening of the chamfered area 2 formed on the back surface 1b side is not essential from the viewpoint of suppressing peeling of the resin, but there is no particular disadvantage in roughening the chamfered area 2 on the back surface 1b side together with the front surface 1a side during chamfering in the chamfering device 100. Rather, it can be said that it is preferable from the viewpoint of symmetry of the shape of the side end 1e to chamfer the front surface 1a side and the back surface 1b side in the same way with the blade portion 104a of the same grit size.

[0064] Finally, the front and back surfaces (both main surfaces) of the chamfered temporary fixing substrate 1 are polished (step S4).

[0065] Fig. 7 is a schematic cross-sectional view showing the main parts of a lapping apparatus 200 that performs lapping of the temporarily fixed substrate 1. The lapping apparatus 200 includes a lower surface plate 201, an upper surface plate 202, and a plurality of carriers 203. Fig. 8 is a perspective view of the main parts of the lapping apparatus 200, with the upper surface plate 202 omitted.

[0066] The lower surface plate 201 and the upper surface plate 202 are rotatable coaxially and in opposite directions within a horizontal plane, as indicated by arrows AR4 and AR5. Examples of materials for the lower surface plate 201 and the upper surface plate 202 include copper, resin copper, and tin. Alternatively, a polishing pad may be attached to a metal surface plate. In such a case, examples of the polishing pad include a hard urethane pad, a nonwoven fabric pad, and a suede pad.

[0067] Each carrier 203 has a circular through hole 203h into which the temporary fixed substrate 1 to be polished is fitted, and is capable of rotating and revolving between an annular guide 204 and a central axis 205 as the lower surface plate 201 and the upper surface plate 202 rotate.

[0068] In the lapping apparatus 200, a plurality of carriers 203, each fitted with a temporary fixing substrate 1 to be polished, are sandwiched between a lower surface plate 201 and an upper surface plate 202. A slurry SL is dropped between the lower surface plate 201 and the upper surface plate 202 while the lower surface plate 201 and the upper surface plate 202 are rotated in opposite directions as indicated by arrows AR4 and AR5. This simultaneously polishes both main surfaces of the temporary fixing substrate 1, resulting in a flat front surface 1a and a flat back surface 1b with an arithmetic mean roughness Ra of 100 nm or less (preferably 20 nm or less). Examples of the slurry SL include water-based or oil-based diamond slurries.

[0069] Although the chamfered area 2 is also polished to some extent by the lapping, the surface roughness of the chamfered area 2, which has been roughened in advance, remains almost the same as before polishing.

[0070] Through the above steps, the temporary fixing substrate 1 according to this embodiment, which has the chamfered region 2, is obtained.

[0071] As described above, according to this embodiment, by providing chamfered regions around the entire periphery of both main surfaces of the temporary fixing substrate used to temporarily fix a semiconductor chip in the process of manufacturing a semiconductor package using the FOWLP technology, it is possible to suitably suppress chipping at the corners of the temporary fixing substrate. In addition, by making the chamfered regions around the periphery of the main surface to which the semiconductor chip is temporarily fixed rougher than the main surface, it is possible to suitably suppress peeling between the temporary fixing substrate and the resin during the process.

[0072] <Second embodiment> In the first embodiment described above, the chamfering area 2 is formed into a rough surface in the chamfering device 100, and then both main surfaces of the temporary fixing substrate 1 are lapped and polished by the lapping device 200, thereby forming a flat surface 1a on which the semiconductor chip 4 is temporarily fixed.

[0073] In the process of performing lapping using the lapping apparatus 200, the side end 1e is also polished to some extent due to the nature of the technique. That is, the surface roughness of the side end 1e is reduced as a result of the lapping. Therefore, in addition to the flat front surface 1a and the flat back surface 1b, the surface roughness (arithmetic mean roughness Ra) of the side end 1e is also smaller than the surface roughness (arithmetic mean roughness Ra) of the chamfered region 2. Reducing the surface roughness of the side end 1e by performing lapping in this manner has the effect of suppressing chipping within the surface of the side end 1e. Moreover, this effect can be obtained not only with a temporary fixing substrate 1 having a chamfered region 2 formed thereon, but also with a temporary fixing substrate 1 in which the chamfering step has been omitted.

[0074] FIG. 9 is a diagram showing a schematic view of polishing of the side edge 1 e of the temporary fixing substrate 1 where the chamfered region 2 is not formed, in the lapping and polishing apparatus 200 .

[0075] As described above, in the lapping and polishing apparatus, the slurry SL is dropped between the lower surface plate 201 and the upper surface plate 202, which sandwich the carrier 203 and the temporary fixing substrate 1, and this slurry SL also enters between the side edge 1e of the temporary fixing substrate 1 and the carrier 203, as shown in Fig. 9. The side edge 1e of the temporary fixing substrate 1 is polished by this entered slurry SL. This also applies when the temporary fixing substrate 1 has a chamfered region 2.

[0076] When the arithmetic mean roughness Ra of the side edge 1e is 5 μm or less, the chipping occurrence rate (chipping defect rate) counted per substrate is suppressed to less than 3.0%.When the arithmetic mean roughness Ra of the side edge 1e is 2 μm or less, the chipping defect rate is suppressed to 1.0% or less.

[0077] Furthermore, in the case of a temporary fixing substrate 1 having a chamfered region 2 as in the first embodiment, if the arithmetic mean roughness Ra of the side end portion 1e is 2 μm or less, the chipping defect rate is suppressed to 0.5% or less.

[0078] Although there is no particular limit to the lower limit of the arithmetic mean roughness Ra of the side edge 1e, a value of 0.01 μm or more is sufficient for practical purposes. However, because lapping primarily targets the main surface of the temporary fixing substrate 1, polishing of the side edge 1e proceeds more slowly than that of the main surface. Therefore, the arithmetic mean roughness Ra of the side edge 1e is usually greater than the arithmetic mean roughness Ra of the flat front surface 1a and the flat back surface 1b.

[0079] As described above, according to this embodiment, by setting the arithmetic mean roughness Ra of the side edge of the temporary fixing substrate used for temporarily fixing a semiconductor chip in the semiconductor package manufacturing process using the FOWLP technology to 5 μm or less, it is possible to suitably suppress the occurrence of chipping at the side edge.

[0080] (Modifications) In the above-described embodiment, the temporary fixing substrate having a chamfered region is used as a substrate to which multiple semiconductor chips are temporarily fixed when a semiconductor package is fabricated by the FOWLP technique, but the use of the temporary fixing substrate is not limited to this, and the temporary fixing substrate may also be used to temporarily fix electronic components other than semiconductor chips. That is, the temporary fixing substrate according to the above-described embodiment may be used to prevent peeling between the resin and the temporary fixing substrate when a resin mold is formed after multiple electronic components are bonded to the temporary fixing substrate with an adhesive.

[0081] Alternatively, various semiconductor substrates may be temporarily fixed to a temporary fixing substrate having a chamfered region with an adhesive, and the temporarily fixed semiconductor substrates may be subjected to desired processing, and then the temporary fixing substrate may be peeled off in the same manner as in the above-described embodiment. Examples of semiconductor substrates include silicon substrates, compound semiconductor substrates, and epitaxial substrates using these as base substrates, as well as other composite substrates, multilayer substrates, and multi-layer substrates. In such cases, the same effects as in the above-described embodiment can be obtained.

[0082] (Confirmation of the effect of roughening the chamfered region) Five types of temporary fixing substrates 1 (conditions 1 to 5) were produced, 200 of each type, with different combinations of the arithmetic mean roughness Ra of the flat surface 1a and the chamfered region 2. The chamfered region 2 had a two-stage structure, with inclination angles θ1 and θ2 of 30° and 60°, respectively. For each temporary fixing substrate 1, the process up to temporary fixing of the semiconductor chip 4 with a resin mold 6 was carried out according to the process illustrated in FIG.

[0083] Further, a temporary fixing substrate was prepared in the same manner as in Conditions 1, 4, and 5 except that the chamfered region 2 was not formed (Condition 6).

[0084] For all the obtained samples (laminates of the temporary fixing substrate 1, the semiconductor chip 4, and the resin), the presence or absence of peeling between the temporary fixing substrate 1 and the resin was visually confirmed, and the peeling failure rate for each example was determined. Specifically, the temporary fixing substrate 1 was visually inspected from the side end 1e side and the back surface 1b side, and it was determined that peeling had occurred if separation between the resin mold 6 and the temporary fixing substrate 1 was confirmed at the side end 1e, or if bubbles with a minimum size of 3 mm or more were present in at least one of the radial and circumferential directions of the temporary fixing substrate 1 when observed from the back surface 1b side.

[0085] Table 1 shows a list of the arithmetic mean roughness Ra of the flat surface 1a and the chamfered region 2 and the evaluation results of the peeling failure rate for each of the examples and comparative examples.

[0086]

[0087] Regarding the evaluation of the peeling failure rate, it was determined that resin peeling was well suppressed for the temporary fixing substrate 1 produced under conditions where the peeling failure rate was 3% or less. Specifically, this was the case for conditions 1 to 5. In Table 1, these conditions 1 to 5 are marked with a circle (◯) in the "Peeling Failure Rate" column.

[0088] On the other hand, it was determined that the suppression of resin peeling was insufficient for the temporary fixing substrate 1 produced under conditions where the peeling failure rate exceeded 3%. Specifically, this was the case only under condition 6. Specifically, the peeling failure rate under condition 6 was 4.5%. In Table 1, the "Peeling Failure Rate" column for condition 6 is marked with an "x" (circle).

[0089] The above results show that providing a chamfered region 2 that is a sufficiently rough surface compared to the surface 1a, with an arithmetic mean roughness Ra in the range of 0.1 μm to 10 μm, is effective in suppressing peeling between the temporary fixing substrate 1 and the resin.

[0090] (Confirmation of the Effect of Polishing Side Edges) Five types of temporary fixing substrates 1 (conditions 3-1 to 3-5) were produced in 200 sheets each, with the chamfered region 2 formed in the same manner as in condition 3 and the arithmetic mean roughness Ra of the side edge 1e being different. The arithmetic mean roughness Ra was measured using a laser microscope. Furthermore, three types of temporary fixing substrates 1 (conditions 4-1 to 4-3) were produced in 200 sheets each, with the chamfered region 2 formed in the same manner as in condition 4 and the arithmetic mean roughness Ra of the side edge 1e being different. Furthermore, two types of temporary fixing substrates 1 (conditions 6-1 to 6-2) were produced in 200 sheets each, with the chamfered region 2 not formed, as in condition 6, but with different arithmetic mean roughness Ra of the side edge 1e.

[0091] The presence or absence of chipping was confirmed by observing the side end 1e of each temporary fixing substrate 1 with a stereomicroscope. When a chip having a size of 5 mm or more in the circumferential direction of the temporary fixing substrate 1 and a size of 1 mm or more in the radial direction was confirmed, it was determined that chipping had occurred.

[0092] Table 2 shows the arithmetic mean roughness Ra of the chamfered region 2 and the side edge 1e, and the evaluation results of the chipping defect rate for each example.

[0093]

[0094] Regarding the evaluation of the chipping defect rate, if the chipping defect rate was 0.5% or less, it was determined that chipping occurrence was extremely well suppressed. Specifically, this was the case for conditions 3-1, 3-3, 4-2, and 4-3. In Table 2, these conditions are marked with a double circle in the "chipping defect rate" column.

[0095] Furthermore, when the chipping defect rate was greater than 0.5% and less than or equal to 1.0%, it was determined that chipping was generally well suppressed. Specifically, condition 6-2 fell under this category. In Table 2, the corresponding condition is marked with a circle in the "chipping defect rate" column.

[0096] Furthermore, if the chipping defect rate was greater than 1.0% and less than 3.0%, it was determined that chipping occurrence was suppressed to a certain degree. Specifically, this was the case for conditions 3-2, 3-4, and 4-1. In Table 2, these conditions are marked with a "△" (triangle mark) in the "chipping defect rate" column.

[0097] On the other hand, if the obtained chipping defect rate value was more than 3%, it was determined that chipping suppression was insufficient. Specifically, this was the case for conditions 3-5 and 6-1. In Table 1, these conditions are marked with an "x" (circle) in the "chipping defect rate" column. For example, the chipping defect rate for condition 6-1 was 4.0%.

[0098] The above results show that providing the side edge 1e with an arithmetic mean roughness Ra of 5 μm or less has a certain degree of effect in suppressing chipping at the side edge 1e, specifically, that the chipping incidence rate is suppressed to less than 3%. Furthermore, when the arithmetic mean roughness Ra of the side edge 1e is 2 μm or less, the chipping incidence rate is suppressed to 1% or less, and in addition, when the temporary fixing substrate 1 further includes a chamfered region 2, the chipping incidence rate is suppressed to 0.5 or less.

Claims

1. A temporary fixing substrate on one main surface of which a predetermined fixing object is temporarily fixed, chamfered areas are provided at the ends of the one main surface and the other main surface over the entire periphery thereof; The arithmetic mean roughness of at least the chamfered region on the one main surface side is 0.1 μm to 10 μm and is larger than the arithmetic mean roughness of the one main surface; A temporary fixing substrate,

2. The temporary fixing substrate according to claim 1 , The chamfered region includes a first chamfered portion and a second chamfered portion having different inclination angles with respect to the one main surface. A temporary fixing substrate,

3. The temporary fixing substrate according to claim 1 or 2, the arithmetic average roughness of the one principal surface and the other principal surface is 100 nm or less; A temporary fixing substrate,

4. The temporary fixing substrate according to claim 1 or 2, The arithmetic mean roughness of the side edge is smaller than the arithmetic mean roughness of the chamfered region. A temporary fixing substrate,

5. The temporary fixing substrate according to claim 4, The arithmetic mean roughness of the side edge is larger than the arithmetic mean roughness of the one main surface and is 5 μm or less. A temporary fixing substrate,

6. The temporary fixing substrate according to claim 5 , The arithmetic mean roughness of the side edge is 2 μm or less. A temporary fixing substrate,

7. The temporary fixing substrate according to claim 1 or 2, The predetermined object to be fixed is a plurality of electronic components or a semiconductor substrate. A temporary fixing substrate,

8. A method for manufacturing a temporary fixing substrate having a main surface on which a predetermined fixing object is temporarily fixed, comprising the steps of: a molding step of producing a disk-shaped molded body mainly composed of a translucent ceramic; a sintering step of sintering the molded body to obtain a sintered body; a chamfering step of forming chamfered regions at the ends of the one main surface and the other main surface of the sintered body over the entire outer periphery thereof; a polishing step of polishing the sintered body having the chamfered region to obtain a temporary fixed substrate; Equipped with the arithmetic mean roughness of the chamfered region on at least one main surface side of the temporary fixing substrate obtained by the polishing step is set to 0.1 μm to 10 μm, which is a value larger than the arithmetic mean roughness of one main surface of the temporary fixing substrate; A method for manufacturing a temporary fixing substrate, comprising:

9. A method for producing a temporary fixing substrate according to claim 8, In the chamfering step, the chamfered region is formed into two stages, a first chamfered portion and a second chamfered portion, which have different inclination angles with respect to the one main surface of the temporary fixing substrate. A method for manufacturing a temporary fixing substrate, comprising:

10. A method for producing a temporary fixing substrate according to claim 8 or 9, the arithmetic mean roughness of the one main surface and the other main surface of the temporary fixing substrate obtained by the polishing step is set to 100 nm or less; A method for manufacturing a temporary fixing substrate, comprising:

11. A method for producing a temporary fixing substrate according to claim 8 or 9, the arithmetic mean roughness of the side edge of the temporary fixing substrate obtained by the polishing step is made smaller than the arithmetic mean roughness of the chamfered region; A method for manufacturing a temporary fixing substrate, comprising:

12. A method for producing the temporary fixing substrate according to claim 11, the arithmetic mean roughness of the side edge is set to be larger than the arithmetic mean roughness of the one main surface of the temporary fixing substrate and is set to be 5 μm or less. A method for manufacturing a temporary fixing substrate, comprising:

13. A method for producing a temporary fixing substrate according to claim 8 or 9, The predetermined object to be fixed is a plurality of electronic components or a semiconductor substrate. A method for manufacturing a temporary fixing substrate, comprising:

14. A method for temporarily fixing a predetermined object to a temporary fixing substrate, comprising the steps of: preparing a temporary fixing substrate having a chamfered region at an end portion along the entire periphery of one main surface; forming an adhesive layer on the temporary fixing substrate; placing a predetermined object to be fixed on the adhesive layer; a step of bonding the predetermined fixing object to the temporary fixing substrate by curing the adhesive layer to form an adhesive layer; Equipped with The arithmetic mean roughness of the chamfered region is 0.1 μm to 10 μm and is larger than the arithmetic mean roughness of the one main surface. A temporary fixing method comprising the steps of:

15. The temporary fixing method according to claim 14, The chamfered region includes a first chamfered portion and a second chamfered portion having different inclination angles with respect to the one main surface. A temporary fixing method comprising the steps of:

16. The temporary fixing method according to claim 14 or 15, the predetermined fixing object is a plurality of electronic components, The method further includes forming a resin mold on the adhesive layer and the electronic components bonded to the temporary fixing substrate by the adhesive layer. A temporary fixing method comprising the steps of:

17. The temporary fixing method according to claim 14 or 15, The predetermined object to be fixed is a semiconductor substrate. A temporary fixing method comprising the steps of: