Semiconductor device

JPWO2024010003A5Pending Publication Date: 2025-03-18
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Patent Information

Application Number
JP2024532592
Authority / Receiving Office
JP · JP
Patent Type
Applications
Filing Date
2024-11-14
Publication Date
2025-03-18

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in reducing inductance, particularly in thin designs where the degree of freedom in design is limited, making it difficult to implement techniques that reduce circuit inductance effectively.

Method used

The semiconductor device incorporates a wiring structure with plate-shaped conductive parts arranged in parallel, where the direction of current change in one part opposes that of the other, canceling out magnetic flux and reducing inductance, even in thin devices. This is achieved by spacing these conductive parts apart and ensuring they are parallel to the wiring board, with insulation between them to maintain their parallel state.

Benefits of technology

This configuration effectively reduces inductance in thin semiconductor devices, allowing for increased switching speeds while suppressing surge voltage and enabling easier design and manufacturing.

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Abstract

A semiconductor device according to one embodiment comprises: a wiring board having first and second conductive layers electrically connected to a P terminal portion and an O terminal portion; a first transistor having a first electrode and a second electrode disposed on a first conductive layer and electrically connected to the first conductive layer; a second transistor having a third electrode and a fourth electrode disposed on a second conductive layer and electrically connected to the second conductive layer; and a wiring section including a first plate-shaped conductive portion electrically connected to an N terminal portion and a second plate-shaped conductive portion electrically connected to the O terminal portion, wherein the first electrode and the fourth electrode are electrically connected to the second plate-shaped conductive portion and the first plate-shaped conductive portion, the thickness direction of the first and second plate-shaped conductive portions is along the thickness direction of the wiring board, and the first and second plate-shaped conductive portions are spaced apart in the thickness direction and arranged in parallel.
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Description

Semiconductor Devices

[0001] This application claims priority to Japanese Patent Application No. 2022-109874, filed on July 7, 2022, and incorporates by reference all of the contents of said Japanese application.

[0002] A semiconductor device disclosed in Patent Document 1 is known as prior art in this technical field. The semiconductor device described in Patent Document 1 includes six MOS transistors. In this semiconductor device, three element pairs, each consisting of two MOS transistors connected in series, are connected in parallel. In the technology described in Patent Document 1, some of the wiring bus bars for the P electrode and N electrode are made parallel plate in order to reduce the circuit inductance of the semiconductor device.

[0003] Japanese Patent Application Laid-Open No. 2003-224243

[0004] a first transistor disposed on the first conductive layer, the first transistor having a first electrode and a second electrode electrically connected to the first conductive layer; a second transistor disposed on the second conductive layer, the second transistor having a third electrode and a fourth electrode electrically connected to the second conductive layer; and a wiring portion including a first plate-shaped conductive portion electrically connected to an N-terminal portion and a second plate-shaped conductive portion electrically connected to the O-terminal portion, wherein the second electrode is electrically connected to the second plate-shaped conductive portion and the fourth electrode is electrically connected to the first plate-shaped conductive portion, a thickness direction of the first plate-shaped conductive portion and the second plate-shaped conductive portion is aligned with a thickness direction of the wiring substrate, and the first plate-shaped conductive portion and the second plate-shaped conductive portion are arranged parallel to and spaced apart in the thickness direction.

[0005] FIG. 1 is a plan view of a semiconductor device according to a first embodiment. FIG. 2 is an exploded perspective view of the semiconductor device shown in FIG. 1. FIG. 3 is a diagram schematically illustrating a portion of the cross-sectional structure taken along line III-III in FIG. 1. FIG. 4 is a diagram for explaining an electric circuit realized by the semiconductor device. FIG. 5 is a plan view of a semiconductor device according to a second embodiment. FIG. 6 is a diagram schematically illustrating a portion of the cross-sectional structure taken along line VI-VI in FIG. 5. FIG. 7 is a plan view of a semiconductor device according to a third embodiment. FIG. 8 is a diagram for explaining a wiring substrate provided in the semiconductor device shown in FIG. 7. FIG. 9 is a diagram schematically illustrating a portion of the cross-sectional structure taken along line IX-IX in FIG. 7. FIG. 10 is a plan view of a semiconductor device according to a fourth embodiment. FIG. 11 is a diagram schematically illustrating a portion of the cross-sectional structure taken along line XI-XI in FIG. 10. FIG. 12 is a schematic diagram illustrating a modified wiring portion. FIG. 13 is a schematic diagram illustrating another modified wiring portion. FIG. 14 is a schematic diagram illustrating yet another modified wiring portion. FIG. 15 is a schematic diagram showing yet another modified example of the wiring portion.

[0006] [Problem to be Solved by the Present Disclosure] In the semiconductor device described in Patent Document 1, the parallel plate portions of the wiring bus bars for the P electrode and the N electrode extend in the thickness direction of the semiconductor device (thickness direction of the substrate). When the technology described in Patent Document 1 is applied to a thin (small thickness) semiconductor device, the degree of freedom in designing the semiconductor device is reduced, making it difficult to implement the technology described in Patent Document 1 in a thin semiconductor device. As a result, it has been difficult to achieve a reduction in inductance in a thin semiconductor device.

[0007] An object of the present disclosure is to provide a semiconductor device that can achieve reduced inductance even when it is thin.

[0008] Effect of the Present Disclosure According to the present disclosure, it is possible to provide a semiconductor device that can achieve reduced inductance even when it is thin.

[0009] [Description of Embodiments of the Present Disclosure] First, the contents of the embodiments of the present disclosure will be listed and described. A semiconductor device according to the present disclosure includes: [1] a wiring substrate having a first conductive layer electrically connected to a P-terminal portion and a second conductive layer electrically connected to an O-terminal portion; a first transistor disposed on the first conductive layer, the first transistor having a first electrode and a second electrode electrically connected to the first conductive layer; a second transistor disposed on the second conductive layer, the second transistor having a third electrode and a fourth electrode electrically connected to the second conductive layer; and a wiring portion including a first plate-shaped conductive portion electrically connected to an N-terminal portion and a second plate-shaped conductive portion electrically connected to the O-terminal portion, the second electrode being electrically connected to the second plate-shaped conductive portion and the fourth electrode being electrically connected to the first plate-shaped conductive portion, a thickness direction of the first plate-shaped conductive portion and the second plate-shaped conductive portion extending along a thickness direction of the wiring substrate, and the first plate-shaped conductive portion and the second plate-shaped conductive portion being arranged parallel to and spaced apart in the thickness direction.

[0010] The first transistor, the second transistor, the first conductive layer, the second conductive layer, the first plate-shaped conductive portion, and the second plate-shaped conductive portion included in the semiconductor device have the electrical connection relationship described above. Therefore, the semiconductor device can operate as a power conversion circuit. In the semiconductor device, the first conductive layer electrically connected to the P terminal is electrically connected to the first electrode of the first transistor, and the second electrode of the first transistor is electrically connected to the second plate-shaped conductive portion. The second plate-shaped conductive portion is electrically connected to the O terminal, and the O terminal is electrically connected to the second conductive layer. The second conductive layer is electrically connected to the third electrode of the second transistor, and the fourth electrode of the second transistor is electrically connected to the first plate-shaped conductive portion, which is electrically connected to the N terminal. With this connection relationship, when the semiconductor device operates as a power conversion circuit, the direction of change (increase or decrease) of the current flowing through the first plate-shaped conductive portion is opposite to the direction of change of the current flowing through the second plate-shaped conductive portion. The first plate-shaped conductive portion and the second plate-shaped conductive portion are arranged in parallel. Therefore, magnetic fluxes generated by changes in the currents flowing through the first and second plate-shaped conductive portions cancel each other out, resulting in reduced inductance. The thickness directions of the first and second plate-shaped conductive portions are aligned with the thickness direction of the wiring substrate, so the first and second plate-shaped conductive portions are aligned in the thickness direction of the wiring substrate. Therefore, even in a semiconductor device with a short length in the thickness direction of the wiring substrate (a thin semiconductor device), a wiring portion for reducing the inductance can be mounted on the semiconductor device.

[0011] [2] In the above [1], the first plate-shaped conductive portion and the second plate-shaped conductive portion may be spaced apart from the wiring substrate and parallel to the wiring substrate, which makes it easy to realize a semiconductor device that is short in the thickness direction of the wiring substrate (a thin semiconductor device).

[0012] [3] The semiconductor device according to the aspect [2] may further include a case that houses the first transistor and the second transistor arranged on the wiring substrate, and the first plate-shaped conductive part and the second plate-shaped conductive part may be fixed to the case. In this case, the wiring part can be arranged at a distance from the wiring substrate.

[0013] [4] The semiconductor device according to the aspect described in [3] above may further include the P terminal portion, the N terminal portion, and the O terminal portion, wherein the P terminal portion, the N terminal portion, and the O terminal portion are fixed to the case, the first plate-shaped conductive portion is directly connected to the N terminal portion, the second plate-shaped conductive portion is directly connected to the O terminal portion, the first conductive layer is connected to the P terminal portion by a wiring member, and the second conductive layer is connected to the O terminal portion by a wiring member.

[0014] In this case, the first plate-shaped conductive part is directly connected to the N-terminal part fixed to the case. Therefore, the first plate-shaped conductive part is fixed to the case. The second plate-shaped conductive part is directly connected to the O-terminal part fixed to the case. Therefore, the second plate-shaped conductive part is also fixed to the case. The first conductive layer is connected to the P-terminal part by a wiring member, and therefore the first conductive layer is electrically connected to the P-terminal part. The second conductive layer is connected to the O-terminal part by a wiring member, and therefore the second conductive layer is electrically connected to the O-terminal part.

[0015] [5] In the above [3] or [4], the wiring portion may have an insulating resin portion that insulates the first plate-shaped conductive portion and the second plate-shaped conductive portion, and the first plate-shaped conductive portion and the second plate-shaped conductive portion may be inserted into the insulating resin portion. In this case, insulation between the first plate-shaped conductive portion and the second plate-shaped conductive portion can be reliably ensured.

[0016] [6] In the above [3] or [4], the wiring portion may include insulating paper that insulates the first plate-shaped conductive portion from the second plate-shaped conductive portion, and the insulating paper may be located between the first plate-shaped conductive portion and the second plate-shaped conductive portion. In this case, the insulating paper is disposed between the first plate-shaped conductive portion and the second plate-shaped conductive portion. This ensures uniformity in the distance between the first plate-shaped conductive portion and the second plate-shaped conductive portion in the direction in which the first plate-shaped conductive portion and the second plate-shaped conductive portion extend. That is, the parallel state of the first plate-shaped conductive portion and the second plate-shaped conductive portion can be reliably maintained in the direction in which the first plate-shaped conductive portion and the second plate-shaped conductive portion extend. Furthermore, the insulating paper also ensures insulation between the first plate-shaped conductive portion and the second plate-shaped conductive portion.

[0017] [7] The semiconductor device according to any one of the aspects [2] to [6] may further include a first heat dissipation member disposed between the first transistor and the first conductive layer, and a second heat dissipation member disposed between the second transistor and the second conductive layer. In this case, heat from the first transistor and the second transistor can be efficiently dissipated. Furthermore, the first transistor and the second transistor can be disposed close to a wiring portion.

[0018] [8] In the above [1], when one of the first plate-shaped conductive portion and the second plate-shaped conductive portion is referred to as the ith plate-shaped conductive portion (i is 1 or 2), the ith plate-shaped conductive portion may be disposed on the wiring substrate. In this case, one of the first plate-shaped conductive portion and the second plate-shaped conductive portion is disposed on the wiring substrate. Therefore, it is easier to mount the wiring portion on a semiconductor device than when both the first plate-shaped conductive portion and the second plate-shaped conductive portion are disposed at a distance from the wiring substrate.

[0019] [9] In the above [8], when a plate-shaped conductive portion of the first and second plate-shaped conductive portions other than the ith plate-shaped conductive portion is referred to as the kth plate-shaped conductive portion (k is 1 or 2 other than i), the kth plate-shaped conductive portion may be disposed on the ith plate-shaped conductive portion via insulating paper. In this case, the insulating paper can more reliably ensure insulation between the ith plate-shaped conductive portion and the kth plate-shaped conductive portion.

[0020]

[10] In the above [8], the wiring portion has an insulating resin portion, and when a plate-shaped conductive portion of the first and second plate-shaped conductive portions other than the ith plate-shaped conductive portion is referred to as the kth plate-shaped conductive portion (where k is 1 or 2 other than i), the kth plate-shaped conductive portion may be inserted into the insulating resin portion, a portion of the kth plate-shaped conductive portion may be exposed from the insulating resin portion, and the kth plate-shaped conductive portion may be disposed on the ith plate-shaped conductive portion with the insulating resin portion sandwiched between the kth plate-shaped conductive portion and the ith plate-shaped conductive portion. In this case, the insulating resin portion can more reliably ensure insulation between the ith plate-shaped conductive portion and the kth plate-shaped conductive portion.

[0021]

[11] In any one of [8] to

[10] above, the i-th plate-shaped conductive portion may be the second plate-shaped conductive portion, and the second plate-shaped conductive portion may be part of the second conductive layer. In this case, part of the second conductive layer is used as the second plate-shaped conductive portion. This simplifies the configuration of the semiconductor device and reduces manufacturing costs.

[0022]

[12] In the above [8], the i-th plate-shaped conductive part may be the second plate-shaped conductive part, the second plate-shaped conductive part may be part of the second conductive layer, the wiring part may have an insulating resin part, the first plate-shaped conductive part and the second plate-shaped conductive part may be inserted into the insulating resin part, a part of each of the first plate-shaped conductive part and the second plate-shaped conductive part may be exposed from the insulating resin part, and the second plate-shaped conductive part may be fixed to the second conductive layer in a state where the part of the second plate-shaped conductive part exposed from the insulating resin part is electrically connected to the second conductive layer.

[0023] In this case, a portion of the second conductive layer is used as the second plate-shaped conductive portion, which simplifies the configuration of the semiconductor device and reduces manufacturing costs. Furthermore, the insulating resin portion more reliably ensures insulation between the first plate-shaped conductive portion and the second plate-shaped conductive portion.

[0024]

[13] The semiconductor device according to the above embodiment

[11] or

[12] may further include the P terminal portion, the N terminal portion, and the O terminal portion, wherein the first conductive layer is connected to the P terminal portion by a wiring member, the second conductive layer is connected to the O terminal portion by a wiring member, and the first plate-shaped conductive portion is connected to the N terminal portion by a wiring member.

[0025] In this case, the first conductive layer is electrically connected to the P terminal, and the first plate-shaped conductive portion is electrically connected to the N terminal. Furthermore, since the second conductive layer is electrically connected to the O terminal, a part of the second conductive layer or the second plate-shaped conductive portion electrically connected to the second conductive layer is also electrically connected to the O terminal. With this wiring structure, the semiconductor device can operate as a power conversion circuit.

[0026]

[14] In the above item [1], the wiring board may have a third conductive layer disposed between the first conductive layer and the second conductive layer, and the first plate-shaped conductive portion may be the third conductive layer. In this case, since the third conductive layer of the wiring board is the first plate-shaped conductive portion, it is easier to mount the wiring portion on the semiconductor device than when both the first plate-shaped conductive portion and the second plate-shaped conductive portion are disposed at a distance from the wiring board.

[0027]

[15] The semiconductor device according to the aspect described in

[14] above may further include the P terminal portion, the N terminal portion, and the O terminal portion, wherein the first conductive layer is connected to the P terminal portion by a wiring member, the second conductive layer is connected to the O terminal portion by a wiring member, the third conductive layer is connected to the N terminal portion by a wiring member, and the second plate-shaped conductive portion may be connected to the O terminal portion directly or by a wiring member.

[0028] In this case, the first conductive layer and the second conductive layer are electrically connected to the P terminal and the O terminal. Since the third conductive layer is the first plate-shaped conductive portion, the first plate-shaped conductive portion is electrically connected to the N terminal. Furthermore, the second plate-shaped conductive portion is electrically connected to the O terminal. With this wiring structure, the semiconductor device can operate as a power conversion circuit.

[0029] [Details of the embodiments of the present disclosure] Specific examples of the embodiments of the present disclosure will be described below with reference to the drawings. The present invention is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims. In the description of the drawings, the same elements are given the same reference numerals, and duplicate explanations will be omitted.

[0030] First Embodiment Fig. 1 is a plan view of a semiconductor device according to a first embodiment. Fig. 2 is an exploded perspective view of the semiconductor device shown in Fig. 1. Fig. 3 is a diagram schematically showing a part of the cross-sectional structure taken along line III-III in Fig. 1.

[0031] 1 and 2 , the semiconductor device 1 includes a plurality of first transistors 11, a plurality of second transistors 12, a wiring substrate 20, and a wiring portion 50. An example of the semiconductor device 1 is a semiconductor module that functions as a power conversion device. An example of the power conversion device is an inverter.

[0032] The plurality of first transistors 11 and the plurality of second transistors 12 are mounted on a wiring substrate 20. In the first embodiment, the first transistors 11 and the second transistors 12 are MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). The semiconductor device 1 may include a case 30 that houses the plurality of first transistors 11, the plurality of second transistors 12, and the wiring portion 50. In the first embodiment, unless otherwise specified, a case will be described in which the semiconductor device 1 includes a frame-shaped case 30.

[0033] 1 and 2 , the thickness direction of the wiring board 20 will be referred to as the Z direction, and two directions perpendicular to the Z direction will be referred to as the X direction and the Y direction. For ease of explanation, the side of the case 30 on which the wiring board 20 is disposed will be referred to as the "lower" side, and the side opposite the wiring board 20 will be referred to as the "upper" side. In the first embodiment, the X direction is along the extension direction of the side wall portion 31 or the side wall portion 32 of the case 30, and is the direction from the terminal block 36 of the case 30 to the terminal block 35.

[0034] The wiring board 20 is attached to the case 30. The wiring board 20 covers the lower opening of the frame-shaped case 30. When viewed in the thickness direction of the wiring board 20, the shape of the wiring board 20 is rectangular. The wiring board 20 has an insulating substrate 21.

[0035] The insulating substrate 21 is, for example, a ceramic substrate. Examples of the material of the insulating substrate 21 include aluminum nitride (AlN), silicon nitride (SiN), and aluminum oxide (Al 2 O 3) on the surface of insulating substrate 21, conductive layer (first conductive layer) 22, conductive layer (second conductive layer) 23, conductive layer 24, conductive layer 25, conductive layer 26, and conductive layer 27 are provided. Conductive layers 22, 23, 24, 25, 26, and 27 each function as a wiring region. In one example, a heat dissipation layer or heat sink is provided on the back surface of insulating substrate 21.

[0036] The conductive layers 22, 23, 24, 25, 26, and 27 are spaced apart from each other. An example of the material of the conductive layers 22, 23, 24, 25, 26, and 27 is copper. The conductive layers 22 and 23 are adjacent to each other in the Y direction. The conductive layers 24 and 25 are disposed between the conductive layer 22 and an edge 21a of the insulating substrate 21. The conductive layers 26 and 27 are disposed between the conductive layer 23 and an edge 21b of the insulating substrate 21. The edge 21b is located opposite the edge 21a from the conductive layer 23 (or the conductive layer 22).

[0037] A plurality of first transistors 11 are mounted on the conductive layer 22. In one embodiment, the plurality of first transistors 11 are arranged along the X direction. The first transistors 11 are vertical transistors. The first transistors 11 have a drain electrode (first electrode) 111, a source electrode (second electrode) 112, and a gate electrode (control electrode) 113 (see FIG. 3 ). The first transistors 11 may also be horizontal transistors.

[0038] The drain electrode 111 is bonded to the conductive layer 22 by, for example, a conductive bonding material. As a result, the drain electrode 111 is electrically connected to the conductive layer 22. Examples of the bonding material include solder and a sintered material. The source electrode 112 and the gate electrode 113 are located opposite the drain electrode 111 in the Z direction. The source electrode 112 and the gate electrode 113 are insulated from each other. Examples of materials for the first transistor 11 include wide bandgap semiconductors and Si. Examples of wide bandgap semiconductors include silicon carbide (SiC) and gallium nitride (GaN).

[0039] A plurality of second transistors 12 are mounted on the conductive layer 23. In one embodiment, the plurality of second transistors 12 are arranged along the X direction. The second transistors 12 are vertical transistors. The second transistors 12 have a drain electrode (third electrode) 121, a source electrode (fourth electrode) 122, and a gate electrode (control electrode) 123 (see FIG. 3 ). The second transistors 12 may also be horizontal transistors.

[0040] The drain electrode 121 is bonded to the conductive layer 23 by, for example, a conductive bonding material (for example, solder, a sintered material, etc.). This electrically connects the drain electrode 121 to the conductive layer 23. The source electrode 122 and the gate electrode 123 are located opposite the drain electrode 121 in the Z direction. The source electrode 122 and the gate electrode 123 are insulated from each other. Examples of materials for the second transistor 12 are the same as those for the first transistor 11.

[0041] As shown in FIGS. 1 and 2, the semiconductor device 1 may have a plurality of first diodes 13 and a plurality of second diodes 14.

[0042] A plurality of first diodes 13 are mounted on the conductive layer 22. In one embodiment, the plurality of first diodes 13 are arranged along the X direction. The first diodes 13 function as freewheeling diodes. An example of the first diodes 13 is a Schottky barrier diode. An example of the material of the first diodes 13 is the same as the example of the material of the first transistor 11. A cathode electrode (not shown) of the first diode 13 is joined to the conductive layer 22 by, for example, a conductive joining material (e.g., solder, a sintered material, etc.). As a result, the cathode electrode of the first diode 13 is electrically connected to the conductive layer 22. Therefore, the cathode electrode of the first diode 13 is electrically connected to the drain electrode 111 by the conductive layer 22.

[0043] A plurality of second diodes 14 are mounted on the conductive layer 23. In one embodiment, the plurality of second diodes 14 are arranged along the X direction. The second diodes 14 function as freewheeling diodes. An example of the second diodes 14 is a Schottky barrier diode. An example of the material of the second diodes 14 is the same as the example of the material of the first transistor 11. A cathode electrode (not shown) of the second diode 14 is joined to the conductive layer 23 by, for example, a conductive joining material (e.g., solder, a sintered material, etc.). As a result, the cathode electrode of the second diode 14 is electrically connected to the conductive layer 23. Therefore, the cathode electrode of the second diode 14 is electrically connected to the drain electrode 121 of the second transistor 12 by the conductive layer 23.

[0044] In one embodiment, a thermistor S is mounted on the wiring board 20. In a configuration in which the thermistor S is mounted on the wiring board 20, the wiring board 20 has a conductive layer 29 a and a conductive layer 29 b. The thermistor S is electrically connected to the conductive layer 29 a and the conductive layer 29 b so as to connect the conductive layer 29 a and the conductive layer 29 b.

[0045] The case 30 is formed in a frame shape in a plan view (when viewed from the Z direction). The case 30 has insulating properties. An example of the material of the case 30 is resin. The case 30 has side wall portions 31, 32, 33, 34, terminal blocks 35, and 36.

[0046] The side wall portion 31 and the side wall portion 32 face each other in the Y direction. A step portion 31a (see FIG. 2) is formed on the inner surface of the side wall portion 31. A step portion 32a (see FIG. 1) is formed on the inner surface of the side wall portion 32. The inner surface of the side wall portion 31 is the surface of the side wall portion 31 that faces the side wall portion 32, and the inner surface of the side wall portion 32 is the surface of the side wall portion 32 that faces the side wall portion 31.

[0047] The side wall portion 33 and the side wall portion 34 face each other in the X direction. The side wall portion 33 and the side wall portion 34 connect both end portions of the side wall portion 31 and the side wall portion 32. A step portion 33a (see FIG. 2) is formed on the inner surface of the side wall portion 33. A step portion 34a (see FIG. 1) is formed on the inner surface of the side wall portion 34. The inner surface of the side wall portion 33 is the surface of the side wall portion 33 that faces the side wall portion 34, and the inner surface of the side wall portion 34 is the surface of the side wall portion 34 that faces the side wall portion 33.

[0048] The terminal block 35 protrudes from the side wall portion 33 in the opposite direction to the side wall portion 34. The terminal block 36 protrudes from the side wall portion 34 in the opposite direction to the side wall portion 33.

[0049] Case 30 is provided with P terminal 41, N terminal 42, O terminal 43, first gate terminal 46a, and second gate terminal 46b. Case 30 may also be provided with first sense source terminal 45a and second sense source terminal 45b. Case 30 may also be provided with sense drain terminal 47. Case 30 may also be provided with first thermistor terminal 48a and second thermistor terminal 48b. Unless otherwise specified, the following description will be directed to a configuration in which first sense source terminal 45a, second sense source terminal 45b, sense drain terminal 47, first thermistor terminal 48a, and second thermistor terminal 48b are provided.

[0050] The P terminal portion 41 functions as a positive power supply terminal or a high-voltage power supply terminal. An example of the P terminal portion 41 is a metal plate. An example of the P terminal portion 41 is a bus bar. The P terminal portion 41 is attached to the terminal block 35. In the first embodiment, a first end of the P terminal portion 41 is exposed on the upper surface of the terminal block 35. A second end of the P terminal portion 41 is exposed from the inner surface of the side wall portion 33. The second end of the P terminal portion 41 is the end opposite to the first end of the P terminal portion 41. The second end of the P terminal portion 41 is disposed on the step portion 33a. A portion of the P terminal portion 41 is embedded in the terminal block 35. Specifically, a portion of the P terminal portion 41 between the first terminal portion and the second terminal portion is embedded in the terminal block 35.

[0051] The N terminal portion 42 functions as a negative power supply terminal or a low-voltage power supply terminal. The N terminal portion 42 is a metal plate. An example of the N terminal portion 42 is a bus bar. The N terminal portion 42 is attached to the terminal block 35. In the first embodiment, a first end of the N terminal portion 42 is exposed on the upper surface of the terminal block 35. A second end of the N terminal portion 42 is exposed from the inner surface of the side wall portion 33. The second end of the N terminal portion 42 is the end opposite to the first end of the N terminal portion 42. A portion of the N terminal portion 42 is embedded in the terminal block 35. Specifically, the portion between the first terminal portion and the second terminal portion of the N terminal portion 42 is embedded in the terminal block 35.

[0052] The O terminal portion 43 functions as an output terminal. The O terminal portion 43 is a metal plate. An example of the O terminal portion 43 is a bus bar. The O terminal portion 43 is attached to the terminal block 36. In the first embodiment, a first end of the O terminal portion 43 is exposed on the upper surface of the terminal block 36. In the first embodiment, the first end of the O terminal portion 43 branches into two. A second end of the O terminal portion 43 (the end opposite the first end) is exposed from the inner surface of the side wall portion 34. The second end of the O terminal portion 43 is the end opposite the first end of the O terminal portion 43. The second end of the O terminal portion 43 is disposed in the step portion 34a. A portion of the O terminal portion 43 is embedded in the terminal block 36. Specifically, a portion of the O terminal portion 43 between the first end and the second end is embedded in the terminal block 36.

[0053] The first gate terminal 46a functions as a control terminal for the first transistor 11. The first sense source terminal 45a functions as a terminal for detecting the potential of the source electrode 112. The first gate terminal 46a and the first sense source terminal 45a are metal plates. An example of the first gate terminal 46a and the first sense source terminal 45a is a bus bar.

[0054] The first gate terminal portion 46a and the first sense source terminal portion 45a are attached to the side wall portion 31. In the first embodiment, a first end of the first gate terminal portion 46a is exposed from the upper surface of the side wall portion 31. A second end of the first gate terminal portion 46a is exposed from the inner surface of the side wall portion 31. The second end of the first gate terminal portion 46a is the end opposite to the first end of the first gate terminal portion 46a. The second end of the first gate terminal portion 46a is disposed in the step portion 31a. A portion of the first gate terminal portion 46a is embedded in the side wall portion 31. Specifically, a portion of the first gate terminal portion 46a between the first end and the second end is embedded in the side wall portion 31. A first end of the first sense source terminal portion 45a is exposed from the upper surface of the side wall portion 31. A second end of the first sense source terminal portion 45a is exposed from the inner surface of the side wall portion 31. The second end of the first sense source terminal portion 45a is the end opposite to the first end of the first sense source terminal portion 45a. The second end of the first sense source terminal portion 45a is disposed on the step portion 31a. A portion of the first sense source terminal portion 45a is embedded in the side wall portion 31. Specifically, the portion of the first sense source terminal portion 45a between the first end and the second end is embedded in the side wall portion 31.

[0055] The sense drain terminal 47 functions as a terminal used when detecting the potential of the drain electrode 111 (or the potential of the conductive layer 22). The sense drain terminal 47 is attached to the side wall 31 in the same manner as the first gate terminal 46 a or the first sense source terminal 45 a.

[0056] In a configuration in which the thermistor S is mounted on the wiring substrate 20, the first thermistor terminal portion 48a and the second thermistor terminal portion 48b function as terminals for externally connecting the thermistor S. The first thermistor terminal portion 48a and the second thermistor terminal portion 48b are attached to the side wall portion 31 in the same manner as the first gate terminal portion 46a or the first sense source terminal portion 45a.

[0057] The second gate terminal 46b functions as a control terminal for the second transistor 12. The second sense source terminal 45b is a terminal for detecting the potential of the source electrode 122. An example of the second gate terminal 46b and the second sense source terminal 45b is a metal plate. An example of the second gate terminal 46b and the second sense source terminal 45b is a bus bar.

[0058] The second gate terminal portion 46b and the second sense source terminal portion 45b are attached to the side wall portion 32. In the first embodiment, a portion of the second gate terminal portion 46b and the second sense source terminal portion 45b is embedded in the side wall portion 32. One end of each of the second gate terminal portion 46b and the second sense source terminal portion 45b is exposed from the upper surface of the side wall portion 32. The other end of each of the second gate terminal portion 46b and the second sense source terminal portion 45b is exposed from the inner surface of the side wall portion 32. The other end of each of the second gate terminal portion 46b and the second sense source terminal portion 45b is disposed on the step portion 32a.

[0059] The wiring portion 50 has a plate-shaped conductive portion (first plate-shaped conductive portion) 51 and a plate-shaped conductive portion (second plate-shaped conductive portion) 52. An example of the conductive portion 51 and the conductive portion 52 is a metal plate. The conductive portion 51 and the conductive portion 52 extend in the X direction. The conductive portion 51 and the conductive portion 52 are arranged so that their thicknesses face the Z direction. The conductive portion 51 and the conductive portion 52 are parallel to each other. The conductive portion 51 and the conductive portion 52 are spaced apart in the Z direction. When viewed from the Z direction, the conductive portion 51 and the conductive portion 52 at least partially overlap each other. In one embodiment, the conductive portion 51 and the conductive portion 52 are located on opposing edges of the conductive layer 22 and the conductive layer 23, or in the gap between the conductive layer 22 and the conductive layer 23.

[0060] The conductive portion 51 is electrically connected to the N-terminal portion 42. For example, an end of the conductive portion 51 closer to the side wall portion 33 is integrally connected to a portion of the second end of the N-terminal portion 42 that is exposed inside the case 30. In the first embodiment, unless otherwise specified, the N-terminal portion 42 and the conductive portion 51 are one metal plate 2, such as a bus bar. That is, of the metal plate 2, an area closer to the terminal block 35 functions as the N-terminal portion 42, and an area on the wiring board 20 functions as the conductive portion 51.

[0061] The conductive portion 52 is electrically connected to the O terminal portion 43. For example, an end portion of the conductive portion 52 closer to the side wall portion 34 is integrally connected to a portion of the O terminal portion 43 that is exposed inside the case 30 at the second end portion. In the first embodiment, the O terminal portion 43 and the conductive portion 52 are one metal plate 3, for example, a bus bar. That is, an area of ​​the metal plate 3 closer to the terminal block 36 functions as the O terminal portion 43, and an area on the wiring board 20 functions as the conductive portion 52.

[0062] For ease of explanation, the region of the metal plate 2 that functions as the N-terminal portion 42 and the region that functions as the conductive portion 51 may also be referred to as the N-terminal region and the first conductive region, respectively. Similarly, the region of the metal plate 3 that functions as the O-terminal portion 43 and the region that functions as the conductive portion 52 may also be referred to as the O-terminal region and the second conductive region, respectively.

[0063] As described above, the conductive portion 51 and the conductive portion 52 are spaced apart in the Z direction. Therefore, in the embodiment using the metal plate 2 and the metal plate 3 as described above, the position at which the metal plate 2 is exposed from the inner surface of the side wall portion 33 and the position at which the metal plate 3 is exposed from the inner surface of the side wall portion 34 may be adjusted. Alternatively, the metal plate 2 may be bent at the boundary region between the conductive portion 51 and the N-terminal portion 42 of the metal plate 2 so that the conductive portion 51 and the conductive portion 52 are spaced apart in the Z direction. Conversely, the metal plate 3 may be bent at the boundary region between the O-terminal portion 43 and the conductive portion 52 of the metal plate 2 so that the conductive portion 51 and the conductive portion 52 are spaced apart in the Z direction.

[0064] Next, the wiring structure of the semiconductor device will be described with reference to FIGS.

[0065] As described above, the drain electrode 111 of each first transistor 11 and the cathode electrode of each first diode 13 are electrically connected to the conductive layer 22. The conductive layer 22 is connected by a wire 77 to a portion of the P terminal portion 41 at the second end portion exposed inside the case 30. This electrically connects the drain electrode 111 of each first transistor 11 and the cathode electrode of each first diode 13 to the P terminal portion 41.

[0066] The source electrode 112 of each first transistor 11 is connected to the conductive portion 52 by a wire (wiring member) 71 a. The anode electrode 131 of each first diode 13 is connected to the conductive portion 52 by a wire 76 a. In the first embodiment, the conductive portion 52 is part of the metal plate 3. A part of the metal plate 3 also functions as the O terminal portion 43. Therefore, each source electrode 112 and each anode electrode are electrically connected to the O terminal portion 43.

[0067] The source electrode 112 is further connected to the conductive layer 24 by a wire 73a. The conductive layer 24 is connected to the first sense source terminal 45a by a wire 74a. This electrically connects the source electrode 112 and the first sense source terminal 45a.

[0068] The gate electrode 113 of each first transistor 11 is connected to the conductive layer 25 by a wire 72a. The conductive layer 25 is connected to the first gate terminal 46a by a wire 75a. As a result, each gate electrode 113 is electrically connected to the first gate terminal 46a.

[0069] As described above, the drain electrode 121 of each second transistor 12 and the cathode electrode of each second diode 14 are electrically connected to the conductive layer 23. The conductive layer 23 is connected by a wire 78 to a portion of the O terminal portion 43 at the second end portion that is exposed inside the case 30. This electrically connects the drain electrode 121 of each second transistor 12 and the cathode electrode of each second diode 14.

[0070] The source electrode 122 of each second transistor 12 is connected to the conductive portion 51 by a wire (wiring member) 71b. The anode electrode 131 of each second diode 14 is connected to the conductive portion 51 by a wire 76b. In the first embodiment, the conductive portion 51 is part of the metal plate 2. A part of the metal plate 2 functions as the N-terminal portion 42. Therefore, each source electrode 122 and each anode electrode 141 is electrically connected to the N-terminal portion 42.

[0071] Each source electrode 112 is further connected to the conductive layer 27 by a wire 73b. The conductive layer 27 is connected to the second sense source terminal portion 45b by a wire 74b. This electrically connects each source electrode 112 and the second sense source terminal portion 45b.

[0072] The gate electrode 123 of each second transistor 12 is connected to the conductive layer 26 by a wire 72b. The conductive layer 26 is connected to the second gate terminal 46b by a wire 75b. As a result, each gate electrode 123 is electrically connected to the second gate terminal 46b.

[0073] The sense drain terminal 47 is connected to the conductive layer 22 by a wire 91. This electrically connects the drain electrode 111 and the sense drain terminal 47.

[0074] The first thermistor terminal 48a is connected to the conductive layer 29a by a wire 92a, and the second thermistor terminal 48b is connected to the conductive layer 29b by a wire 92b, thereby electrically connecting the thermistor S to the first thermistor terminal 48a and the second thermistor terminal 48b.

[0075] FIG. 4 is a diagram for explaining an electric circuit corresponding to the semiconductor device 1. As shown in FIG.

[0076] 4 , the first transistor 11 and the first diode 13 are connected in anti-parallel between the P terminal 41 and the O terminal 43. The second transistor 12 and the second diode 14 are connected in anti-parallel between the O terminal 43 and the N terminal 42. Furthermore, the first transistor 11 and the second transistor 12 are connected in series between the P terminal 41 and the N terminal 42. In this configuration, the semiconductor device 1 functions as a power conversion circuit. In the power conversion circuit, the first transistor 11 is a transistor included in the upper arm, and the second transistor 12 is a transistor included in the lower arm.

[0077] 4 shows an electric circuit focusing on one pair of a first transistor 11 and a second transistor 12. In the wiring structure shown in FIG. 1, a plurality of first transistors 11 are connected in parallel, a plurality of second transistors 12 are connected in parallel, a plurality of first diodes 13 are connected in parallel, and a plurality of second diodes 14 are connected in parallel. Therefore, the electric circuit realized by the semiconductor device 1 corresponds to a circuit in which a plurality of pairs of first transistors 11 with first diodes 13 connected in anti-parallel and second transistors 12 with second diodes 14 connected in anti-parallel are connected in parallel, as shown in FIG.

[0078] In the semiconductor device 1, the plurality of first transistors 11, the plurality of second transistors 12, the plurality of first diodes 13, the plurality of second diodes 14, and their wiring structure, which are arranged inside the case 30, may be buried in insulating resin. In this case, insulating resin is also arranged between the conductive portion 51 and the conductive portion 52, thereby ensuring insulation between the conductive portion 51 and the conductive portion 52. An example of the insulating resin is silicone gel.

[0079] The semiconductor device 1 is manufactured, for example, as follows.

[0080] A plurality of first transistors 11, a plurality of second transistors 12, a plurality of first diodes 13, and a plurality of second diodes 14 are mounted on a wiring substrate 20. The first transistors 11, the second transistors 12, the first diodes 13, and the second diodes 14 can be mounted on the wiring substrate 20, for example, by die bonding. A case 30 is prepared to which a P terminal portion 41, a metal plate 2, a metal plate 3, a first gate terminal portion 46a, a second gate terminal portion 46b, etc. are assembled. Since the metal plate 2 has an N terminal portion 42 and a conductive portion 51, and the metal plate 3 has an O terminal portion 43 and a conductive portion 52, the N terminal portion 42, the conductive portion 51, the O terminal portion 43, and the conductive portion 52 are also assembled to the case 30 prepared as described above. If the case 30 is made of resin, the case 30 can be prepared, for example, by insert molding. The order of the process of mounting the first transistors 11, the second transistors 12, etc. on the wiring substrate 20 and the process of preparing the case 30 is not limited.

[0081] Next, the wiring board 20 on which the first transistor 11, the second transistor 12, etc. are mounted is attached to the case 30. Specifically, the wiring board 20 is attached to the bottom opening of the case 30 so that the first transistor 11, the second transistor 12, etc. are positioned inside the case 30. As a result, the bottom opening of the case 30 is closed by the wiring board 20. The wiring board 20 and the case 30 are joined together, for example, by an adhesive.

[0082] 1 and 3, necessary wiring is performed in the semiconductor device 1 to realize the wiring structure described with reference to FIGS. 1 and 3. The wiring can be performed by wire bonding using ultrasonic waves or the like. In this manner, the semiconductor device 1 is obtained. In a configuration in which the plurality of first transistors 11, the plurality of second transistors 12, etc. on the wiring substrate 20 arranged inside the case 30 are embedded in insulating resin, after the above wiring is performed, insulating resin can be injected into the spaces formed by the side wall portions 31, 32, 33, and 34 of the case 30 and the wiring substrate 20.

[0083] In the semiconductor device 1, the source electrode 112 of the first transistor 11 is electrically connected to the O-terminal 43 by the conductive portion 52. Therefore, a current flows between the source electrode 112 and the O-terminal 43 through the conductive portion 52. The source electrode 122 of the second transistor 12 is electrically connected to the N-terminal 42 by the conductive portion 51. Therefore, a current flows between the source electrode 122 and the N-terminal 42 through the conductive portion 51.

[0084] In this case, the direction of change (increase or decrease) of the current flowing through the conductive portion 51 and the conductive portion 52 is opposite to that of the conductive portion 51. The conductive portion 51 and the conductive portion 52 are plate-shaped and arranged in parallel. That is, the conductive portion 51 and the conductive portion 52 are arranged in a parallel plate state (hereinafter, this arrangement will be referred to as a "parallel plate arrangement"). Therefore, for example, when the first transistor 11 and the second transistor 12 are switched and controlled, respectively, causing current to flow through the conductive portion 51 and the conductive portion 52, the magnetic fluxes generated by the change in current cancel each other out. As a result, low inductance can be achieved in the semiconductor device 1.

[0085] The conductive portions 51 and 52 are arranged in a parallel plate configuration with their thickness direction facing the Z direction. Therefore, even in the case of a thin semiconductor device 1, for example, low inductance can be easily achieved. A thin semiconductor device 1 is a semiconductor device with a short length in the Z direction. An example of the length in the Z direction of a thin semiconductor device 1 is 15 mm to 25 mm. Because the conductive portions 51 and 52 are arranged in a parallel plate configuration as described above, even in the case of a thin semiconductor device 1, it is possible to ensure freedom in designing the semiconductor device 1 while achieving low inductance as described above.

[0086] In the semiconductor device 1, the drain electrode 111 of the first transistor 11 is joined to the conductive layer 22, and the drain electrode 121 of the second transistor 12 is joined to the conductive layer 23. Therefore, in the semiconductor device 1, the current on the drain side of each of the first transistor 11 and the second transistor 12 flows through the conductive layer 22 and the conductive layer 23. The conductive layer 22 and the conductive layer 23 are arranged adjacent to each other. Therefore, magnetic fluxes generated by changes in the current on the drain side of each of the first transistor 11 and the second transistor 12 also cancel each other out. As a result, the inductance on the drain side of each of the first transistor 11 and the second transistor 12 can also be reduced.

[0087] As described above, the semiconductor device 1 can achieve low inductance, and therefore can suppress surge voltage even if the switching speed of the first transistor 11 and the second transistor 12 is increased.

[0088] The conductive portions 51 and 52 are spaced apart from the wiring board 20 and are parallel to the wiring board 20. As described in the first embodiment, such an arrangement can be easily achieved by fixing the conductive portions 51 and 52 to the case 30. In a configuration in which the conductive portions 51 and 52 are arranged as described above, a thin semiconductor device 1 can be easily realized.

[0089] The first embodiment employs metal plate 2 in which conductive portion 51 and N-terminal portion 42 are integrated, and metal plate 3 in which conductive portion 52 and O-terminal portion 43 are integrated. In this configuration, by fixing metal plates 2 and 3 to case 30, conductive portion 51, N-terminal portion 42, and O-terminal portion 43 can be easily fixed to case 30.

[0090] Second Embodiment Fig. 5 is a plan view of a semiconductor device according to a second embodiment, and Fig. 6 is a diagram schematically showing a part of the cross-sectional structure taken along line VI-VI in Fig. 5.

[0091] 5 and 6, the semiconductor device 1A shown in Fig. 5 differs from the semiconductor device 1 mainly in that it further includes a plurality of first heat dissipation members 28a and a plurality of second heat dissipation members 28b. The semiconductor device 1A will be described focusing on this difference.

[0092] The plurality of first heat dissipation members 28a are mounted on the conductive layer 22. The plurality of second heat dissipation members 28b are mounted on the conductive layer 23. The first heat dissipation members 28a and the second heat dissipation members 28b are formed of a material with high thermal conductivity. In the second embodiment, the first heat dissipation members 28a and the second heat dissipation members 28b are electrically conductive. Examples of materials for the first heat dissipation members 28a and the second heat dissipation members 28b include copper and silver. The first heat dissipation members 28a and the second heat dissipation members 28b are, for example, electrically conductive heat spreaders.

[0093] The first heat dissipation member 28a is bonded to the conductive layer 22 with a conductive bonding material. Examples of the conductive bonding material include solder and a sintered material. The first transistor 11 and the first diode 13 are mounted on the first heat dissipation member 28a. The drain electrode 111 of the first transistor 11 and the cathode electrode of the first diode 13 are bonded to the first heat dissipation member 28a with a conductive bonding material. As a result, the drain electrode 111 of the first transistor 11 and the cathode electrode of the first diode 13 are electrically connected to the first heat dissipation member 28a and the conductive layer 22.

[0094] The second heat dissipation member 28b is bonded to the conductive layer 23 with a conductive bonding material. The second transistor 12 and the second diode 14 are mounted on the second heat dissipation member 28b. The drain electrode 121 of the second transistor 12 and the cathode electrode of the second diode 14 are bonded to the second heat dissipation member 28b with a conductive bonding material. As a result, the drain electrode 121 of the second transistor 12 and the cathode electrode of the second diode 14 are electrically connected to the second heat dissipation member 28b and the conductive layer 23.

[0095] As described above, the drain electrode 111 of the first transistor 11 and the cathode electrode of the first diode 13 mounted on the first heat dissipation member 28a are electrically connected to the conductive layer 22. The drain electrode 121 of the second transistor 12 and the cathode electrode of the second diode 14 mounted on the second heat dissipation member 28b are electrically connected to the conductive layer 23. Furthermore, the configuration of the semiconductor device 1A is substantially the same as that of the first embodiment, except that the semiconductor device 1 includes the first heat dissipation member 28a and the second heat dissipation member 28b. Therefore, the semiconductor device 1A has the same or similar functions and effects as the semiconductor device 1.

[0096] Since the first transistor 11 and the second transistor 12 are disposed on the first heat dissipation member 28a and the second heat dissipation member 28b, the heat generated in the first transistor 11 and the second transistor 12 can be dissipated efficiently.

[0097] Because the first transistor 11 and the second transistor 12 are disposed on the first heat dissipation member 28a and the second heat dissipation member 28b, the first transistor 11 and the second transistor 12 can be disposed close to the wiring portion 50. Specifically, the first transistor 11 and the second transistor 12 can be disposed close to the conductive portion 51 and the conductive portion 52. As a result, it is possible to reduce stress generated in the necks of the wires 71a and 71b. The same applies to the wires 76a and 76b that connect the first diode 13 and the second diode 14 to the conductive portion 51 and the conductive portion 52.

[0098] Third Embodiment Fig. 7 is a plan view of a semiconductor device according to a third embodiment. Fig. 8 is a diagram for explaining a wiring substrate included in the semiconductor device 1B shown in Fig. 7. In Fig. 8, a portion of the metal plate 3 is cut away to show the wiring substrate 20A, and the first transistor 11, the second transistor 12, the first diode 13, the second diode 14, and the wiring structure using wires 71a, 71b, etc. are not shown. Fig. 9 is a diagram schematically showing a portion of the cross-sectional structure taken along line IX-IX in Fig. 7.

[0099] The semiconductor device 1B differs from the semiconductor device 1 mainly in that it includes a wiring substrate 20A instead of the wiring substrate 20 and a wiring portion 50A instead of the wiring portion 50. The semiconductor device 1B will be described mainly focusing on these differences.

[0100] 8, wiring board 20A differs from wiring board 20 in that a conductive layer (third conductive layer) 51A is formed between conductive layer 22 and conductive layer 23. Conductive layer 51A has a plate or thin plate shape. Conductive layer 51A extends in the X direction.

[0101] In the semiconductor device 1B, a conductive portion 52, which is a partial region of the metal plate 3, is disposed on the conductive layer 51A. The conductive layer 51A and the conductive portion 52 are spaced apart in the Z direction. The thickness directions of the conductive layer 51A and the conductive portion 52 are oriented in the Z direction. The conductive layer 51A and the conductive portion 52 are disposed in parallel. Therefore, in the semiconductor device 1B, the conductive layer 51A and the conductive portion 52 form a wiring portion 50A.

[0102] The conductive layer 51A corresponds to the conductive portion 51 of the wiring portion 50. In the semiconductor device 1B, the conductive layer 51A and the N-terminal portion 42 are separate. The N-terminal portion 42 in the semiconductor device 1B is referred to as the N-terminal portion 42A. The N-terminal portion 42A is, for example, a metal plate. An example of the N-terminal portion 42A is a bus bar.

[0103] A first end of the N-terminal portion 42A is exposed on the upper surface of the terminal block 35. A second end of the N-terminal portion 42A is exposed from the inner surface of the side wall portion 33. The second end of the N-terminal portion 42A is the end opposite to the first end of the N-terminal portion 42A. The second end of the N-terminal portion 42A is disposed on the step portion 33a. A portion of the N-terminal portion 42A is embedded in the terminal block 35. Specifically, the portion of the N-terminal portion 42A between the first end and the second end is embedded in the terminal block 35.

[0104] 7, the portion of the N-terminal portion 42A at the second end thereof that is exposed on the step portion 33a is connected to the conductive layer 51A by a wire 79. This electrically connects the conductive layer 51A to the N-terminal portion 42A.

[0105] The source electrode 122 of the second transistor 12 is connected to the conductive layer 51A by a wire 71b. The anode electrode 141 of the second diode 14 is connected to the conductive layer 51A by a wire 76b. As described above, the conductive layer 51A and the N-terminal portion 42A are electrically connected, and therefore the source electrode 122 and the anode electrode 141 are electrically connected to the N-terminal portion 42A.

[0106] The wiring structure in the semiconductor device 1B is the same as that in the semiconductor device 1, except that the source electrode 122 and the anode electrode 141 are electrically connected to the N terminal portion 42A using the conductive layer 51A and the wire 79.

[0107] The semiconductor device 1B can be manufactured in the same manner as the semiconductor device 1, except that a wiring board 20A is prepared instead of the wiring board 20, and a case 30 incorporating the N terminal portion 42A is prepared instead of the metal plate 2.

[0108] Semiconductor device 1B also includes a wiring portion 50A. Wiring portion 50A has a conductive layer 51A and a conductive portion 52. The positional relationship between conductive layer 51A and conductive portion 52 is the same as the positional relationship between conductive portion 51 and conductive portion 52, except that conductive layer 51A corresponding to conductive portion 51 is disposed on insulating substrate 21. Therefore, semiconductor device 1B has the same effects as those achieved by semiconductor device 1 by including wiring portion 50.

[0109] In the semiconductor device 1B, one of the two conductive portions of the wiring portion 50A is formed as a conductive layer 51A on the insulating substrate 21. In this case, the conductive layer 51A can be formed in the same manner as the conductive layers 22, 23, etc., and therefore the conductive layer 51A is easy to form. As a result, the wiring portion 50A can be easily mounted on the semiconductor device 1B. Furthermore, insulation between the conductive layer 51A and the conductive portion 52 is easily ensured.

[0110] Fourth Embodiment Fig. 10 is a plan view of a semiconductor device according to a fourth embodiment, and Fig. 11 is a diagram schematically showing a part of the cross-sectional structure taken along line XI-XI in Fig. 10 .

[0111] The semiconductor device 1C differs from the semiconductor device 1 mainly in that it includes an N-terminal portion 42A instead of the N-terminal portion 42, a first O-terminal portion 43A and a second O-terminal portion 43B instead of the O-terminal portion 43, and a wiring portion 50B instead of the wiring portion 50. The semiconductor device 1C will be described focusing on these differences.

[0112] The configuration and arrangement of the N terminal portion 42A are the same as those of the semiconductor device 1B, and therefore, a description of the N terminal portion 42A will be omitted.

[0113] The first O terminal portion 43A and the second O terminal portion 43B are two separate terminal portions. The first O terminal portion 43A and the second O terminal portion 43B are attached to the terminal block 36. First ends of the first O terminal portion 43A and the second O terminal portion 43B are exposed on the upper surface of the terminal block 36. Second ends (ends opposite the first ends) of the first O terminal portion 43A and the second O terminal portion 43B are exposed from the inner surface of the side wall portion 34. In the fourth embodiment, the portions of the second ends of the first O terminal portion 43A and the second O terminal portion 43B that are exposed inside the case 30 are disposed on the step portion 34a. A portion of the first O terminal portion 43A and the second O terminal portion 43B (portions between the first and second ends) is embedded in the terminal block 36.

[0114] The wiring portion 50B has a conductive portion 51B and a conductive portion 52A.

[0115] The conductive portion 52A is a part of the conductive layer 23. Specifically, the conductive portion 52A is a region of the conductive layer 23 closer to the conductive layer 22. In FIG. 10 , the imaginary boundary between the region of the conductive layer 23 corresponding to the conductive portion 52A and other regions is indicated by a dashed dotted line. The width of the conductive layer 22 in the Y direction may be wider than that of the semiconductor device 1. The conductive portion 52A is a part of the conductive layer 23, and therefore has a plate or layer shape. The conductive portion 52A is a separate member from the first O terminal portion 43A and the second O terminal portion 43B.

[0116] The conductive portion 51B is a plate-like member having conductivity. The conductive portion 51B is a metal plate. An example of the conductive portion 51B is a bus bar. The conductive portion 51B is disposed on the conductive portion 52A. An insulating paper (insulating member) 81 is provided between the conductive portion 51B and the conductive portion 52A.

[0117] The wiring structure of the semiconductor device 1C will be described.

[0118] The source electrode 112 of each first transistor 11 and the anode electrode 131 of each first diode 13 are connected by wires 71a and 76a to a conductive portion 52A that is part of the conductive layer 23. As a result, each source electrode 112 and each anode electrode 131 are electrically connected to the conductive portion 52A.

[0119] The first O terminal 43A and the conductive layer 23 are connected by a wire 78a. The second O terminal 43B and the conductive layer 23 are connected by a wire 78b. The second transistor 12 and the second diode 14 are mounted on the conductive layer 23. The method of mounting the second transistor 12 and the second diode 14 on the conductive layer 23 is the same as in the first embodiment. Therefore, the conductive portion 52A, which is a part of the conductive layer 23, is electrically connected to the source electrode 122 of the second transistor 12 and the cathode electrode (not shown) of the second diode 14, and is also electrically connected to the first O terminal 43A and the second O terminal 43B.

[0120] The source electrode 122 of each second transistor 12 and the anode electrode 141 of each second diode 14 are connected to the conductive portion 51B by a wire 71b and a wire 76b. The conductive portion 51B is connected to the N terminal portion 42A by a wire 79.

[0121] The wiring structure other than the above is the same as that in the first embodiment. Therefore, the electric circuit realized in the semiconductor device 1C is the same as that in the semiconductor device 1.

[0122] The semiconductor device 1C can be manufactured in the same manner as the semiconductor device 1, except that when mounting the first transistor 11, the second transistor 12, etc. on the wiring substrate 20, the conductive portion 51B is mounted on the conductive layer 23, and a case 30 incorporating the N terminal portion 42A, the first O terminal portion 43A, and the second O terminal portion 43B is prepared instead of the metal plate 2 and the metal plate 3. When mounting the conductive portion 51B on the conductive layer 23, insulating paper 81 is sandwiched between the conductive layer 23 and the conductive portion 51B. The insulating paper 81 may be any insulating paper commonly used in this technical field. An example of the insulating paper 81 is Nomex (registered trademark) paper. The conductive layer 23 and the insulating paper 81 and the insulating paper 81 and the conductive portion 51B can be bonded together using, for example, an adhesive. The process of mounting the conductive portion 51B on the conductive layer 23 may be performed before wiring is performed.

[0123] The semiconductor device 1C also includes a wiring portion 50B. The wiring portion 50B includes a plate-shaped conductive portion 51B and a plate-shaped conductive portion 52A that are arranged parallel to each other along the Z direction. Therefore, the semiconductor device 1B has the same effects as those of the semiconductor device 1 due to the inclusion of the wiring portion 50.

[0124] The conductive portion 52A of the wiring portion 50B is part of the conductive layer 23. In the fourth embodiment, the conductive portion 51B is disposed on the conductive layer 23. The conductive portion 51B is a separate member from the N-terminal portion 42A. In this configuration, the wiring portion 50B can be realized by mounting the conductive portion 51B on the conductive layer 23 while insulating the conductive layer 23 from the conductive portion 51B. This makes it easy to mount the wiring portion 50B on the semiconductor device 1C. Because the conductive portion 52A is part of the conductive layer 23, the configuration of the semiconductor device 1C is simple. Because the conductive portion 52A uses part of the conductive layer 23 as the conductive portion 52, the manufacturing cost of the semiconductor device 1C can be reduced.

[0125] Insulating paper 81 is disposed between conductive portion 51B and conductive portion 52A. The insulating paper 81 ensures uniformity in the distance between conductive portion 51B and conductive portion 52A along the direction in which conductive portion 51B and conductive portion 52A extend, thereby maintaining the parallel state of conductive portion 51B and conductive portion 52A. The insulating paper 81 reliably prevents short-circuiting between conductive portion 51B and conductive portion 52A. This shortens the distance between conductive portion 51B and conductive portion 52A. In this way, insulating paper 81 ensures insulation between conductive portion 51B and conductive portion 52A while maintaining the parallel state of conductive portion 51B and conductive portion 52A along the direction in which conductive portion 51B and conductive portion 52A extend, thereby further reducing inductance.

[0126] In the semiconductor device 1C, the conductive layer 22 and the conductive layer 23 are adjacent to each other in the Y direction. Therefore, as in the first embodiment, magnetic fluxes generated by changes in the current on the drain side of the first transistor 11 and the second transistor 12 cancel each other out. As a result, the inductance on the drain side of each of the first transistor 11 and the second transistor 12 can also be reduced.

[0127] 12 is a diagram showing a modification of the wiring portion 50C, which includes a conductive portion 51B, a conductive portion 52A, and an insulating resin portion 53.

[0128] The conductive portion 51B and the conductive portion 52A are the same as those in the semiconductor device 1C described with reference to FIGS. 10 and 11, and therefore a description thereof will be omitted.

[0129] The insulating resin portion 53 is made of insulating resin, such as polyphenylene sulfide (PPS), polyether ether ketone (PEEK), and polycarbonate (PC).

[0130] In the wiring portion 50C, the conductive portion 51B is inserted into the insulating resin portion 53. Specifically, the conductive portion 51B is inserted into the insulating resin portion 53 so that the surface 51a of the conductive portion 51B is exposed. In the first modification, the insulating resin portion 53 is fixed to the conductive portion 52A using an insulating adhesive 82. This fixes the conductive portion 51B inserted into the insulating resin portion 53 to the conductive portion 52A, which is part of the conductive layer 23. In this case, the surface 51a of the conductive portion 51B is exposed from the insulating resin portion 53. This allows easy connection of the wires 71b, 76b, etc. The surface 51a is the surface of the conductive portion 51B opposite the conductive layer 23.

[0131] The arrangement of conductive portion 51B and conductive portion 52A in Modification 1 is the same as the arrangement of conductive portion 51B and conductive portion 52A shown in Fig. 11 , except that insulating resin portion 53 is arranged between conductive portion 51B and conductive portion 52A. Therefore, a semiconductor device that employs the arrangement of Modification 1 instead of the arrangement of conductive portion 51B and conductive portion 52A shown in Fig. 11 also has the same effects as semiconductor device 1C. By arranging insulating resin portion 53 between conductive portion 51B and conductive portion 52A, the insulation between conductive portion 51B and conductive portion 52A can be further ensured.

[0132] 13 is a diagram showing another modification of the wiring portion 50D, which includes a conductive portion 51B, a conductive portion 52B, and an insulating resin portion 53.

[0133] 10 and 11. The insulating resin portion 53 is the same as the insulating resin portion 53 described in Modification 1. Therefore, the description of the conductive portion 51B and the insulating resin portion 53 will be omitted.

[0134] The conductive portion 52B is a separate member from the first O terminal portion 43A, the second O terminal portion 43B, and the conductive layer 23. Similar to the conductive portion 51B, the conductive portion 52B is a plate-shaped member having conductivity. The conductive portion 52B extends in a direction perpendicular to the Y direction and the Z direction shown in FIG. 13 . The conductive portion 52B is, for example, a metal plate. An example of the conductive portion 52B is a bus bar.

[0135] In wiring portion 50D, conductive portion 51B and conductive portion 52B are inserted into insulating resin portion 53. Specifically, conductive portion 51B and conductive portion 52B are inserted into insulating resin portion 53 so that surface 51a of conductive portion 51B and surface 52a of conductive portion 52A are exposed from insulating resin portion 53. In this embodiment, surface 52a of conductive portion 52B is fixed to conductive layer 23 using conductive bonding material 83. This fixes wiring portion 50D to conductive layer 23. Surface 52a is the surface of conductive portion 52B that is closer to conductive layer 23.

[0136] Since bonding material 83 is conductive, conductive portion 52B and conductive layer 23 are electrically connected. Therefore, in Modification 2, conductive portion 51B is disposed on conductive portion 52B, which is electrically connected to conductive layer 23. Insulating resin portion 53 is sandwiched between conductive portion 51B and conductive portion 52B. Therefore, the arrangement of conductive portion 52B and conductive portion 51B in Modification 2 is substantially the same as in Modification 1. Therefore, similar to Modification 1, a semiconductor device employing the arrangement of Modification 2 also has the same effects as semiconductor device 1C.

[0137] Although various embodiments and modifications according to the present disclosure have been described above, the present disclosure is not limited to the exemplified embodiments and modifications.

[0138] In the first embodiment, too, the conductive portion 51 and the N-terminal portion 42 may be separate members, and the conductive portion 52 and the O-terminal portion 43 may be separate members. In this case, one end of the conductive portion 51 and one end of the conductive portion 52 may be connected to the N-terminal portion 42 and the O-terminal portion 43, for example, with a conductive bonding material. For convenience of explanation below, the conductive portion 51, which is a separate member from the N-terminal portion 42, and the conductive portion 52, which is a separate member from the O-terminal portion 43, will be referred to as the conductive portion 51B and the conductive portion 52B, as in the case of FIG. 13 .

[0139] In the first embodiment, a wiring portion 50E shown in FIG. 14 may be used instead of the wiring portion 50. The wiring portion 50E includes a conductive portion 51 that is a part of the metal plate 2, a conductive portion 52 that is a part of the metal plate 3, and an insulating resin portion 53. The conductive portions 51 and 52 are inserted into the insulating resin portion 53 so that portions of the conductive portions 51 and 52 are exposed from the insulating resin portion 53. In the wiring portion 50E, a portion of the insulating resin portion 53 is sandwiched between the conductive portions 51 and 52. This facilitates ensuring insulation between the conductive portions 51 and 52. Since portions of the conductive portions 51 and 52 are exposed from the insulating resin portion 53, it is easy to connect wires 71a, 71b, etc. to the conductive portions 51 and 52. FIG. 14 illustrates a case in which the vicinity of the edges of the conductive portions 51 and 52 are exposed from the insulating resin portion 53. However, it is sufficient that the conductive portions 51 and 52 have areas for connecting the wires 71a, 71b, etc.

[0140] In the first embodiment, a wiring unit 50F shown in FIG. 15 may be used instead of the wiring unit 50. The wiring unit 50F includes a conductive portion 51 that is part of the metal plate 2, a conductive portion 52 that is part of the metal plate 3, and insulating paper 81. The insulating paper 81 is sandwiched between the conductive portions 51 and 52. In the wiring unit 50F, the insulating paper 81 is disposed between the conductive portions 51 and 52, so the distance between the conductive portions 51 and 52 can be determined by the thickness of the insulating paper 81. This ensures uniformity in the distance between the conductive portions 51 and 52 along the extension direction of the conductive portions 51 and 52, thereby maintaining the parallel state of the conductive portions 51 and 52. Furthermore, the insulating paper 81 ensures insulation between the conductive portions 51 and 52.

[0141] The conductive portion 51 and the conductive portion 52 shown in FIGS. 14 and 15 are part of the metal plate 2 including the N-terminal portion 42 and the metal plate 3 including the O-terminal portion 43. However, in each of the wiring portion 50E and the wiring portion 50F, the conductive portion 51 may be a conductive portion 51B that is a separate member from the N-terminal portion 42, and the conductive portion 52 may be a conductive portion 52B that is a separate member from the O-terminal portion 43. In this case, the end of the conductive portion 51B closer to the N-terminal portion 42 may be connected to the N-terminal portion 42 with, for example, a conductive bonding material, and the end of the conductive portion 52B closer to the O-terminal portion 43 may be connected to the O-terminal portion 43 with, for example, a conductive bonding material. Alternatively, the wiring portion 50E may be fitted into the case 30 during the manufacturing process of the semiconductor device. In this case, the conductive portions 51B and 52B may be connected to the N-terminal portion 42 and the O-terminal portion 43 with, for example, a conductive bonding material.

[0142] The conductive portion 51 in the first and second embodiments may be fixed to, for example, the side wall portion 31 or the side wall portion 32 of the case 30. The conductive portion 51B in the fourth embodiment may be fixed to, for example, the side wall portion 31 or the side wall portion 32 of the case 30. The conductive portion 52 in the first to third embodiments may be fixed to, for example, the side wall portion 31 or the side wall portion 32 of the case 30. When the conductive portion 51, the conductive portion 51B, the conductive portion 52, etc. are fixed to the side wall portion 31 or the side wall portion 32, they can be fixed in a beam shape. In this case, for example, when wire bonding is performed using ultrasonic waves, the ultrasonic waves are easily transmitted to the conductive portion 51, the conductive portion 51B, the conductive portion 52, etc.

[0143] The end of the O terminal portion 43 that is exposed on the upper surface of the terminal block 36 does not need to be branched into two. The semiconductor device 1C according to the fourth embodiment may include one O terminal portion instead of the first O terminal portion 43A and the second O terminal portion 43B.

[0144] In the third embodiment, the conductive portion 52B described in Modification 2 may be disposed on the conductive layer 51A via the insulating paper 81. As described in Modification 2, the conductive portion 52B is a separate member from the O terminal portion. Modification 1 may also be applied to the third embodiment. That is, in the third embodiment, the conductive portion 52B inserted into the insulating resin portion 53 may be disposed on the conductive layer 51A.

[0145] That is, the present disclosure can also be applied to a configuration in which, when one of the first and second plate-shaped conductive portions is referred to as the ith plate-shaped conductive portion (i is 1 or 2), the ith plate-shaped conductive portion is disposed on a wiring board. Furthermore, when a plate-shaped conductive portion other than the ith plate-shaped conductive portion of the first and second plate-shaped conductive portions is referred to as the kth plate-shaped conductive portion (k is 1 or 2 other than i), the kth plate-shaped conductive portion may be disposed on the ith conductive portion via insulating paper. Alternatively, when the wiring portion has an insulating resin portion, and a plate-shaped conductive portion other than the ith plate-shaped conductive portion of the first and second plate-shaped conductive portions is referred to as the kth plate-shaped conductive portion as described above, the kth plate-shaped conductive portion may be inserted into the insulating resin portion, with a portion of the kth plate-shaped conductive portion exposed from the insulating resin portion, and the kth plate-shaped conductive portion may be disposed on the ith plate-shaped conductive portion with the insulating resin portion sandwiched between the kth plate-shaped conductive portion and the ith plate-shaped conductive portion.

[0146] In the fourth embodiment, the conductive portion (first plate-shaped conductive portion) 51B and the conductive portion (second plate-shaped conductive portion) 52A may be spaced apart without the insulating paper 81 therebetween.

[0147] The wiring members for realizing electrical connections between elements in a semiconductor device are not limited to wires, but another example of the wiring members is ribbons.

[0148] The number of first transistors included in the semiconductor device may be one, or may be two or more. The number of second transistors included in the semiconductor device may be one, or may be two or more.

[0149] The first and second transistors are not limited to MOSFETs, and may be, for example, insulated gate bipolar transistors (IGBTs).

[0150] The various embodiments and modifications described above may be combined as appropriate without departing from the spirit of the present disclosure.

[0151] DESCRIPTION OF SYMBOLS 1, 1A, 1B, 1C...Semiconductor device 2...Metal plate 3...Metal plate 11...First transistor 12...Second transistor 13...First diode 14...Second diode 20, 20A...Wiring board 21...Insulating substrate 21a...Edge portion 21b...Edge portion 22...Conductive layer (first conductive layer) 23...Conductive layer (second conductive layer) 24...Conductive layer 25...Conductive layer 26...Conductive layer 27...Conductive layer 28a...First heat dissipation member 28b...Second heat dissipation member 29a...Conductive layer 29b...Conductive layer 30...Case 31...Side wall portion 31a...Step portion 32...Side wall portion 32a...Step portion 33...Side wall portion 33a...Step portion 34...Side wall portion 34a...Step portion 35...Terminal block 36...Terminal block 41...P terminal portion 42, 42A...N terminal portion 43...O terminal portion 43A...first O terminal portion 43B...second O terminal portion 45a...first sense source terminal portion 45b...second sense source terminal portion 46a...first gate terminal portion 46b...second gate terminal portion 47...sense drain terminal portion 48a...first thermistor terminal portion 48b...second thermistor terminal portion 50, 50A, 50B, 50C, 50D, 50E, 50F...wiring portion 51, 51B...conductive portion (first plate-shaped conductive portion) 51A...conductive layer (first plate-shaped conductive portion) 51a...surface 52, 52A, 52B...conductive portion (second plate-shaped conductive portion) 52a...surface 53...insulating resin portion 71a...wire (wiring member) 71b...wire (wiring member) 72a...wire 72b...wire 73a...wire 73b...wire 74b...wire 75a...wire 75b...wire 76a...wire 76b...wire 77...wire (wiring member) 74a...wire 78...wire (wiring member) 78a...wire (wiring member) 78b...wire (wiring member) 79...wire (wiring member) 81...insulating paper 82...adhesive 83...bonding material 91...wire 92a...wire 92b...wire 111...drain electrode (first electrode) 112...source electrode (second electrode) 113...gate electrode 121...drain electrode (first electrode) 122...source electrode (second electrode) 123...gate electrode 131...anode electrode 141...anode electrode S...thermistor

Claims

1. a wiring board having a first conductive layer electrically connected to a P terminal portion and a second conductive layer electrically connected to an O terminal portion; a first transistor disposed on the first conductive layer, the first transistor having a first electrode and a second electrode electrically connected to the first conductive layer; a second transistor disposed on the second conductive layer, the second transistor having a third electrode and a fourth electrode electrically connected to the second conductive layer; a wiring portion including a first plate-shaped conductive portion electrically connected to an N-terminal portion and a second plate-shaped conductive portion electrically connected to the O-terminal portion; Equipped with the second electrode is electrically connected to the second plate-shaped conductive portion, the fourth electrode is electrically connected to the first plate-shaped conductive portion, a thickness direction of the first plate-shaped conductive portion and the second plate-shaped conductive portion is aligned with a thickness direction of the wiring substrate, the first plate-shaped conductive portion and the second plate-shaped conductive portion are arranged in parallel and spaced apart from each other in the thickness direction, Semiconductor device.

2. the first plate-shaped conductive portion and the second plate-shaped conductive portion are spaced apart from the wiring board and parallel to the wiring board; The semiconductor device according to claim 1 .

3. a case that houses the first transistor and the second transistor that are arranged on the wiring board; the first plate-shaped conductive portion and the second plate-shaped conductive portion are fixed to the case; The semiconductor device according to claim 2 .

4. The P terminal portion; The N terminal portion; The O terminal portion; Further comprising: the P terminal portion, the N terminal portion, and the O terminal portion are fixed to the case, the first plate-shaped conductive portion is directly connected to the N terminal portion, the second plate-shaped conductive portion is directly connected to the O terminal portion, the first conductive layer is connected to the P terminal portion by a wiring member, The second conductive layer is connected to the O terminal portion by a wiring member. The semiconductor device according to claim 3 .

5. the wiring portion has an insulating resin portion that insulates the first plate-shaped conductive portion and the second plate-shaped conductive portion, the first plate-shaped conductive portion and the second plate-shaped conductive portion are inserted into the insulating resin portion.

5. The semiconductor device according to claim 3.

6. the wiring portion has an insulating paper that insulates the first plate-shaped conductive portion and the second plate-shaped conductive portion, the insulating paper is positioned between the first plate-shaped conductive portion and the second plate-shaped conductive portion; 5. The semiconductor device according to claim 3.

7. a first heat dissipation member disposed between the first transistor and the first conductive layer; a second heat dissipation member disposed between the second transistor and the second conductive layer; Further comprising: The semiconductor device according to claim 2 .

8. When one of the first plate-shaped conductive portion and the second plate-shaped conductive portion is referred to as an i-th plate-shaped conductive portion (i is 1 or 2), the i-th plate-shaped conductive portion is disposed on the wiring board. The semiconductor device according to claim 1 .

9. When a plate-shaped conductive portion other than the i-th plate-shaped conductive portion among the first plate-shaped conductive portion and the second plate-shaped conductive portion is referred to as a k-th plate-shaped conductive portion (k is 1 or 2 other than i), the k-th plate-shaped conductive portion is disposed on the i-th plate-shaped conductive portion via an insulating paper. The semiconductor device according to claim 8.

10. The wiring portion has an insulating resin portion, When a plate-shaped conductive portion other than the i-th plate-shaped conductive portion among the first plate-shaped conductive portion and the second plate-shaped conductive portion is referred to as a k-th plate-shaped conductive portion (k is 1 or 2 other than i), the kth plate-shaped conductive portion is inserted into the insulating resin portion, a portion of the kth plate-shaped conductive portion is exposed from the insulating resin portion, the kth plate-shaped conductive portion is disposed on the ith plate-shaped conductive portion in a state in which the insulating resin portion is sandwiched between the kth plate-shaped conductive portion and the ith plate-shaped conductive portion. The semiconductor device according to claim 8.

11. the i-th plate-shaped conductive portion is the second plate-shaped conductive portion, The second plate-shaped conductive portion is a part of the second conductive layer. The semiconductor device according to claim 8.

12. the i-th plate-shaped conductive portion is the second plate-shaped conductive portion, the second plate-shaped conductive portion is a part of the second conductive layer, The wiring portion has an insulating resin portion, the first plate-shaped conductive portion and the second plate-shaped conductive portion are inserted into the insulating resin portion, a portion of each of the first plate-shaped conductive portion and the second plate-shaped conductive portion is exposed from the insulating resin portion, the second plate-shaped conductive portion is fixed to the second conductive layer in a state in which a portion of the second plate-shaped conductive portion exposed from the insulating resin portion is electrically connected to the second conductive layer. The semiconductor device according to claim 8.

13. The P terminal portion; The N terminal portion; The O terminal portion; Further comprising: the first conductive layer is connected to the P terminal portion by a wiring member, the second conductive layer is connected to the O terminal portion by a wiring member, The first plate-shaped conductive portion is connected to the N terminal portion by a wiring member. The semiconductor device according to claim 11 or 12.

14. the wiring board has a third conductive layer disposed between the first conductive layer and the second conductive layer; The first plate-shaped conductive portion is the third conductive layer. The semiconductor device according to claim 1 .

15. The P terminal portion; The N terminal portion; The O terminal portion; Further comprising: the first conductive layer is connected to the P terminal portion by a wiring member, the second conductive layer is connected to the O terminal portion by a wiring member, the third conductive layer is connected to the N terminal portion by a wiring member, The second plate-shaped conductive portion is connected to the O terminal portion directly or through a wiring member. The semiconductor device according to claim 14.

16. A case that houses the first transistor and the second transistor that are arranged on the wiring substrate; The P terminal portion; The N terminal portion; The O terminal portion; Further comprising: the case has a first side wall portion, a second side wall portion, a third side wall portion, and a fourth side wall portion, the first side wall portion and the second side wall portion face each other in a first direction perpendicular to a thickness direction of the wiring substrate, the third side wall portion and the fourth side wall portion face each other in a thickness direction of the wiring substrate and in a second direction perpendicular to the first direction, the P terminal portion and the N terminal portion are fixed to the third side wall portion, the O terminal portion is fixed to the fourth side wall portion, the first plate-shaped conductive portion and the second plate-shaped conductive portion each extend along the second direction, the first plate-shaped conductive portion and the second plate-shaped conductive portion at least partially overlap each other when viewed in a thickness direction of the wiring substrate; The semiconductor device according to claim 1 .