Semiconductor device

Abstract

The present invention provides a semiconductor device which achieves both low power consumption and high performance. This semiconductor device comprises a first conductive layer, a second conductive layer, a first semiconductor layer, a second insulating layer that is arranged on the first semiconductor layer, a third conductive layer that is arranged on the second insulating layer, and a first insulating layer that is sandwiched between the first conductive layer and the second conductive layer; the first insulating layer has a first opening which reaches the first conductive layer; the second conductive layer has a second opening; the first opening and the second opening overlap with each other when viewed in plan; the first semiconductor layer is in contact with the upper surface of the first conductive layer and the lateral surface of the first insulating layer in the first opening; the first semiconductor layer is in contact with the lateral surface of the second conductive layer in the second opening; the first semiconductor layer has a region which overlaps with the third conductive layer, with the second insulating layer being interposed therebetween; and the lateral surface of the first insulating layer in the first opening has a region where the angle between the lateral surface of the first insulating layer and the upper surface of the first conductive layer is not less than 10 degrees but less than 55 degrees.

Description

Semiconductor Devices

[0001] BACKGROUND OF THE INVENTION 1. Field of the Invention One embodiment of the present invention relates to a semiconductor device and a manufacturing method thereof. 2. Description of the Related Art One embodiment of the present invention relates to a transistor and a manufacturing method thereof.

[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device (for example, a touch sensor), an input / output device (for example, a touch panel), a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. Also, it refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. Furthermore, a memory device, a display device, a light-emitting device, a lighting device, and an electronic device may themselves be semiconductor devices and each may have a semiconductor device.

[0004] Semiconductor devices including transistors are widely used in electronic devices. For example, in display devices, pixel size can be reduced by reducing the area occupied by a transistor, and resolution can be increased. Therefore, miniaturized transistors are in demand.

[0005] As devices requiring high-definition display devices, devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR) are being actively developed.

[0006] 2. Description of the Related Art As display devices, for example, light-emitting devices having organic electroluminescence (EL) elements or light-emitting diodes (LEDs) have been developed.

[0007] Patent Document 1 discloses a high-definition display device using organic EL elements.

[0008] International Publication No. 2016 / 038508

[0009] An object of one embodiment of the present invention is to provide a semiconductor device including a micro-sized transistor. Another object is to provide a semiconductor device including a transistor with a short channel length. Another object is to provide a semiconductor device including a transistor with high on-state current. Another object is to provide a semiconductor device including a highly reliable transistor. Another object is to provide a semiconductor device including transistors with favorable electrical characteristics. Another object is to provide a semiconductor device including transistors with different channel lengths. Another object is to provide a semiconductor device with a small occupation area. Another object is to provide a high-performance semiconductor device. Another object is to provide a semiconductor device with low power consumption. Another object is to provide a highly reliable semiconductor device. Another object is to provide a highly productive semiconductor device. Another object is to provide a novel semiconductor device.

[0010] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description in the specification, drawings, and claims.

[0011] One embodiment of the present invention is a semiconductor device including a first conductive layer, a second conductive layer, a first semiconductor layer, a second insulating layer over the first semiconductor layer, a third conductive layer over the second insulating layer, and a first insulating layer sandwiched between the first conductive layer and the second conductive layer, wherein the first insulating layer has a first opening reaching the first conductive layer, the second conductive layer has a second opening, the first opening and the second opening overlap each other in a planar view, the first semiconductor layer is in contact with a top surface of the first conductive layer and a side surface of the first insulating layer in the first opening, the first semiconductor layer is in contact with a side surface of the second conductive layer in the second opening, the first semiconductor layer has a region overlapping with the third conductive layer with the second insulating layer interposed therebetween, and the side surface of the first insulating layer in the first opening has a region that forms an angle of 10 degrees or more and less than 55 degrees with a top surface of the first conductive layer.

[0012] In the above structure, the first insulating layer preferably has a thickness of 10 nm or more and less than 3 μm.

[0013] In the above structure, the first semiconductor layer preferably contains a metal oxide.

[0014] Alternatively, one embodiment of the present invention includes a first transistor, a second transistor, and a first insulating layer. The first transistor includes a first conductive layer, a second conductive layer, a first semiconductor layer, a second insulating layer over the first semiconductor layer, and a third conductive layer over the second insulating layer. The second transistor includes a fourth conductive layer, a fifth conductive layer, a second semiconductor layer, a second insulating layer over the second semiconductor layer, and a third conductive layer over the second insulating layer. and a sixth conductive layer, the first insulating layer having a region sandwiched between the first conductive layer and the second conductive layer and a region sandwiched between the fourth conductive layer and the fifth conductive layer, the first insulating layer having a first opening reaching the first conductive layer and a second opening reaching the fourth conductive layer, a side surface of the first insulating layer in the first opening having a region that forms an angle of 10 degrees or more and less than 55 degrees with an upper surface of the first conductive layer, the side surface of the first insulating layer has a region where the angle formed with the top surface of the fourth conductive layer is 55 degrees or more and 90 degrees or less; the second conductive layer has a third opening, the first opening and the third opening overlapping each other in a planar view; the fifth conductive layer has a fourth opening, the second opening and the fourth opening overlapping each other in a planar view; and the first semiconductor layer contacts the top surface of the first conductive layer and the side surface of the first insulating layer at the first opening. The first semiconductor layer contacts a side surface of the second conductive layer in the third opening, the first semiconductor layer overlaps the third conductive layer via the second insulating layer, the second semiconductor layer contacts a top surface of the fourth conductive layer and a side surface of the first insulating layer in the second opening, the second semiconductor layer contacts a side surface of the fifth conductive layer in the fourth opening, and the second semiconductor layer overlaps the sixth conductive layer via the second insulating layer.

[0015] In the above configuration, the second insulating layer has a first region covering the side surface of the first insulating layer at the first opening via the first semiconductor layer, a second region covering the top surface of the second conductive layer via the first semiconductor layer, a third region covering the side surface of the first insulating layer at the second opening via the second semiconductor layer, and a fourth region covering the top surface of the fifth conductive layer via the second semiconductor layer, and it is preferable that the film thickness of the first region is greater than 0.85 times but less than 1.2 times the film thickness of the second region, and that the film thickness of the third region is greater than or equal to 0.4 times but less than 0.85 times the film thickness of the fourth region.

[0016] In the above structure, it is preferable that the second region has a thickness of 10 nm or more and 200 nm or less, and the fourth region has a thickness of 10 nm or more and 200 nm or less.

[0017] In the above configuration, the second insulating layer has a first region covering the side surface of the first insulating layer in the first opening via the first semiconductor layer, a second region covering the top surface of the first conductive layer via the first semiconductor layer, a third region covering the side surface of the first insulating layer in the second opening via the second semiconductor layer, and a fourth region covering the top surface of the fourth conductive layer via the second semiconductor layer, and it is preferable that the film thickness in the first region is greater than 0.85 times but less than 1.2 times the film thickness in the second region, and that the film thickness in the third region is 0.4 times or more and 0.85 times or less the film thickness in the fourth region.

[0018] In the above structure, it is preferable that the second region has a thickness of 10 nm or more and 200 nm or less, and the fourth region has a thickness of 10 nm or more and 200 nm or less.

[0019] In the above structure, it is preferable that in the first semiconductor layer, the film thickness of the region in contact with the side surface of the first insulating layer in the first opening is more than 0.85 times but less than 1.2 times the film thickness of the region in contact with the top surface of the second conductive layer, and that in the second semiconductor layer, the film thickness of the region in contact with the side surface of the first insulating layer in the second opening is 0.4 times or more and 0.85 times or less the film thickness of the region in contact with the top surface of the fifth conductive layer.

[0020] In the above structure, it is preferable that the thickness of the region of the first semiconductor layer that contacts the upper surface of the second conductive layer is 1 nm or more and 200 nm or less, and the thickness of the region of the second semiconductor layer that contacts the upper surface of the fifth conductive layer is 1 nm or more and 200 nm or less.

[0021] In the above structure, it is preferable that in the first semiconductor layer, the film thickness of the region in contact with the side surface of the first insulating layer in the first opening is more than 0.85 times and less than 1.2 times the film thickness of the region in contact with the top surface of the first conductive layer, and that in the second semiconductor layer, the film thickness of the region in contact with the side surface of the first insulating layer in the second opening is 0.4 times or more and 0.85 times or less the film thickness of the region in contact with the top surface of the fourth conductive layer.

[0022] In the above structure, it is preferable that the thickness of the region of the first semiconductor layer that is in contact with the top surface of the first conductive layer is 1 nm or more and 200 nm or less, and the thickness of the region of the second semiconductor layer that is in contact with the top surface of the fourth conductive layer is 1 nm or more and 200 nm or less.

[0023] According to one embodiment of the present invention, a semiconductor device including a micro-sized transistor can be provided. Alternatively, a semiconductor device including a transistor with a short channel length can be provided. Alternatively, a semiconductor device including a transistor with large on-state current can be provided. Alternatively, a semiconductor device including a highly reliable transistor can be provided. Alternatively, a semiconductor device including a transistor with favorable electrical characteristics can be provided. Alternatively, a semiconductor device including transistors with different channel lengths can be provided. Alternatively, a semiconductor device with a small occupation area can be provided. Alternatively, a semiconductor device with high performance can be provided. Alternatively, a semiconductor device with low power consumption can be provided. Alternatively, a semiconductor device with high reliability can be provided. Alternatively, a semiconductor device with high productivity can be provided. Alternatively, a novel semiconductor device can be provided.

[0024] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims.

[0025] FIG. 1A is a top view showing an example of a semiconductor device. FIG. 1B is a cross-sectional view showing an example of a semiconductor device. FIGS. 2A and 2B are cross-sectional views showing an example of a semiconductor device. FIGS. 2C and 2D are perspective views showing an example of a semiconductor device. FIG. 3A is a top view showing an example of a semiconductor device. FIG. 3B is a cross-sectional view showing a configuration of a semiconductor device. FIG. 4A is a top view showing an example of a semiconductor device. FIG. 4B is a cross-sectional view showing a configuration of a semiconductor device. FIG. 5A is a top view showing an example of a semiconductor device. FIGS. 5B and 5C are cross-sectional views showing an example of a semiconductor device. FIG. 6A is a top view showing an example of a semiconductor device. FIG. 6B is a cross-sectional view showing an example of a semiconductor device. FIG. 7 is a cross-sectional view showing an example of a semiconductor device. FIGS. 8A and 8B are cross-sectional views showing an example of a semiconductor device. FIGS. 9A to 9D are cross-sectional views showing an example of a semiconductor device. FIGS. 10A to 10D are cross-sectional views showing an example of a semiconductor device. FIGS. 11A and 11B are cross-sectional views showing an example of a semiconductor device. FIGS. 12A and 12B are cross-sectional views showing an example of a semiconductor device. FIGS. 13A and 13B are cross-sectional views showing an example of a semiconductor device. FIGS. 14A and 14B are cross-sectional views showing an example of a semiconductor device. FIGS. 14C and 14D are diagrams showing an example of a circuit. FIGS. 15A to 15D are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIGS. 16A to 16D are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIGS. 17A to 17C are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIG. 18A is a perspective view showing an example of a display device. FIG. 18B is a block diagram of a display device. FIG. 19 is a perspective view showing an example of a display device. FIG. 20A is a circuit diagram of a latch circuit. FIG. 20B is a circuit diagram of an inverter circuit. FIG. 21 is a circuit diagram of a sequential circuit. FIGS. 22A and 22B are circuit diagrams of a pixel circuit. FIGS. 23A to 23C are cross-sectional views showing an example of a display device. FIGS. 24A and 24B are cross-sectional views showing an example of a display device. FIG. 25 is a cross-sectional view showing an example of a display device. FIGS. 26A to 26C are cross-sectional views showing an example of a display device. FIGS. 27A and 27B are cross-sectional views showing an example of a display device. 28A to 28F are cross-sectional views showing an example of a method for manufacturing a display device.29A to 29D are diagrams illustrating an example of an electronic device, 30A to 30F are diagrams illustrating an example of an electronic device, and 31A to 31G are diagrams illustrating an example of an electronic device.

[0026] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0027] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations thereof will be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned.

[0028] For ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0029] In this specification, the ordinal numbers "first" and "second" are used for convenience and do not limit the number of components or the order of the components (for example, the order of processes or the order of stacking). Furthermore, the ordinal numbers assigned to components in one part of this specification may not match the ordinal numbers assigned to the same components in other parts of this specification or in the claims.

[0030] The terms "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

[0031] A transistor is a type of semiconductor element that can perform functions such as amplifying current or voltage and performing switching operations to control conduction or non-conduction. The term "transistor" as used herein includes an insulated gate field effect transistor (IGFET) and a thin film transistor (TFT).

[0032] In this specification and the like, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. This is because the source and drain of a transistor vary depending on the structure or operating conditions of the transistor. Note that the source and drain of a transistor can be appropriately referred to as source (drain) terminal, source (drain) electrode, or the like depending on the situation.

[0033] In this specification and the like, the terms "electrode" and "wiring" do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" and "wiring" also include cases where multiple "electrodes" or "wirings" are integrally formed.

[0034] In this specification, "electrically connected" includes a connection via "something that has some kind of electrical action." Here, "something that has some kind of electrical action" is not particularly limited as long as it allows electrical signals to be transmitted and received between the connected objects. For example, "something that has some kind of electrical action" includes electrodes or wiring, as well as switching elements such as transistors, resistive elements, coils, capacitive elements, and other elements with various functions.

[0035] In this specification and the like, unless otherwise specified, the off-state current refers to the leakage current between the source and drain when the transistor is in an off state (also referred to as a non-conducting state or a cut-off state). Unless otherwise specified, the off-state current refers to the leakage current between the source and the gate when the voltage V ｇｓis the threshold voltage V ｔｈ (For p-channel transistors, V ｔｈ This refers to a state of being (higher than)

[0036] In this specification, the phrase "top surface shapes are approximately the same" refers to at least a portion of the contours of stacked layers overlapping. For example, this includes cases where the upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer. In these cases, the phrase "top surface shapes are approximately the same" may also be used. Furthermore, when the top surface shapes are the same or approximately the same, it can also be said that the edges are aligned or approximately aligned.

[0037] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined relative to the substrate surface or the surface to be formed. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface or the surface to be formed is less than 90 degrees. Note that the side surface of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature or approximately planar with a slight unevenness.

[0038] In this specification, etc., a device fabricated using a metal mask or an FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure.

[0039] In this specification and the like, a structure in which different light-emitting layers are formed for light-emitting elements (also referred to as light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. The SBS structure allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in selecting materials and configurations and making it easier to improve brightness and reliability.

[0040] In this specification and the like, holes or electrons may be referred to as "carriers." Specifically, a hole injection layer or an electron injection layer may be referred to as a "carrier injection layer," a hole transport layer or an electron transport layer may be referred to as a "carrier transport layer," and a hole block layer or an electron block layer may be referred to as a "carrier block layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable from each other depending on their cross-sectional shapes or characteristics. Furthermore, one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.

[0041] In this specification and the like, a light-emitting element has an EL layer between a pair of electrodes. The EL layer has at least a light-emitting layer. Here, examples of layers (also referred to as functional layers) included in the EL layer include a light-emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier block layer (a hole block layer and an electron block layer). In this specification and the like, a light-receiving element (also referred to as a light-receiving device) has at least an active layer that functions as a photoelectric conversion layer between a pair of electrodes. In this specification and the like, one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.

[0042] In this specification and the like, the sacrificial layer (which may also be referred to as a mask layer) is located above at least the light-emitting layer (more specifically, a layer that is processed into an island shape among the layers that make up the EL layer), and has the function of protecting the light-emitting layer during the manufacturing process.

[0043] In this specification and the like, the term "step discontinuity" refers to a phenomenon in which a layer, film, or electrode is separated due to the shape of the surface on which it is formed (for example, a step or the like).

[0044] Embodiment 1 In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[0045] <Configuration Example 1> A semiconductor device according to one embodiment of the present invention will be described. FIG. 1A shows a top view (also referred to as a plan view) of a semiconductor device 10. FIG. 1B shows a cross-sectional view of a cut surface taken along dashed dotted line A1-A2 in FIG. 1A, FIG. 2A shows a cross-sectional view of a cut surface taken along dashed dotted line B1-B2, and FIG. 2B shows a cross-sectional view of a cut surface taken along dashed dotted line B3-B4. Note that some components of the semiconductor device 10 (such as insulating layers) are omitted in FIG. 1A. As with FIG. 1A, some components are omitted in the top views of the semiconductor device in the following drawings.

[0046] The semiconductor device 10 includes a transistor 100 and a transistor 200. A perspective view of the transistor 100 included in the semiconductor device 10 is shown in FIG. 2C , and a perspective view of the transistor 200 included in the semiconductor device 10 is shown in FIG. 2C and FIG. 2D , some components such as a substrate and an insulating layer are not shown.

[0047] The transistors 100 and 200 differ in the shapes of the openings into which the semiconductor layers are embedded. By making the shapes of the openings different from each other, the channel lengths of the transistors 100 and 200 can be made different. Furthermore, the thicknesses of the gate insulating layers of the transistors 100 and 200 can be made different. Furthermore, the thicknesses of the semiconductor layers of the transistors 100 and 200 can be made different. The transistor 100 includes a conductive layer 112a, a semiconductor layer 108, a conductive layer 112b, an insulating layer 106, and a conductive layer 104. Each layer constituting the transistor 100 may have a single-layer structure or a stacked-layer structure.

[0048] The conductive layer 112a is provided over the substrate 102. The conductive layer 112a functions as one of a source electrode and a drain electrode of the transistor 100.

[0049] The insulating layer 110 is located on the conductive layer 112a. The insulating layer 110 is provided to cover the top and side surfaces of the conductive layer 112a.

[0050] 1B and other figures show an example in which the insulating layer 110 has a layered structure of an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, and an insulating layer 110c on the insulating layer 110b.

[0051] The insulating layer 110a is located on the conductive layer 112a and is provided to cover the top and side surfaces of the conductive layer 112a.

[0052] An insulating layer 110b is provided on the insulating layer 110a, and an insulating layer 110c is provided on the insulating layer 110b. An opening 141 is provided in the insulating layer 110, reaching the conductive layer 112a.

[0053] The conductive layer 112b is located over the insulating layer 110. An opening 143 overlapping with the opening 141 is provided in the conductive layer 112b. The conductive layer 112b functions as the other of the source electrode and drain electrode of the transistor 100. The conductive layer 112b has a region overlapping with the conductive layer 112a with the insulating layer 110 interposed therebetween. The insulating layer 110 has a region sandwiched between the conductive layer 112a and the conductive layer 112b. As described later, the insulating layer 110 has a region sandwiched between two conductive layers (conductive layer 212a and conductive layer 212b) included in the transistor 200.

[0054] The semiconductor layer 108 is in contact with the top surface of the conductive layer 112a, the side surface of the insulating layer 110, and the top surface and side surface of the conductive layer 112b. The semiconductor layer 108 is provided so as to cover the openings 141 and 143. The semiconductor layer 108 is provided in contact with the side surface of the insulating layer 110 on the opening 141 side and the end portion of the conductive layer 112b on the opening 143 side (which can also be said to be a part of the top surface and the side surface on the opening 143 side). The semiconductor layer 108 is in contact with the conductive layer 112a through the openings 141 and 143.

[0055] The insulating layer 106 is located over the semiconductor layer 108 and the conductive layer 112b. The insulating layer 106 is provided to cover the openings 141 and 143 with the semiconductor layer 108 interposed therebetween. A part of the insulating layer 106 functions as a gate insulating layer of the transistor 100. Another part of the insulating layer 106 functions as a gate insulating layer of the transistor 200.

[0056] The conductive layer 104 is located over the insulating layer 106. The conductive layer 104 overlaps with the semiconductor layer 108 with the insulating layer 106 interposed therebetween. The conductive layer 104 functions as a gate electrode of the transistor.

[0057] 5A is an enlarged view of the transistor 100 shown in FIG. 1A , and FIG. 5B is an enlarged view of the transistor 100 shown in FIG. 1B , which are cross-sectional views taken along dashed dotted line A1-A3 in FIG. 5A . FIG. 5C is an enlarged view of a region 41 shown in FIG. 5B . Note that in the cross-sectional views shown in FIG. 1B and the like, the film thickness of each component may be drawn thicker for clarity. Therefore, in the enlarged views shown in FIG. 5B , FIG. 5C , and the like, the film thickness of each component may be drawn thinner than in the unenlarged views.

[0058] The angle th1 is an angle between the side surface of the insulating layer 110 on the opening 141 side and the surface where the conductive layer 112a is to be formed (here, the top surface of the conductive layer 112a). The angle th1 is preferably larger than an angle th2 (an angle between the side surface of the insulating layer 110 on the opening 241 side and the surface where the conductive layer 112a is to be formed, which will be described later) in the transistor 200.

[0059] The transistor 200 includes a conductive layer 212a, a semiconductor layer 208, a conductive layer 212b, an insulating layer 106, and a conductive layer 204. Each layer included in the transistor 200 may have a single-layer structure or a stacked-layer structure. The conductive layer 212a, the semiconductor layer 208, the conductive layer 212b, and the conductive layer 204 can be formed using the same materials as those used for the conductive layer 112a, the semiconductor layer 108, the conductive layer 112b, and the conductive layer 104, respectively.

[0060] The conductive layer 212a is provided over the substrate 102. The conductive layer 212a functions as one of a source electrode and a drain electrode of the transistor 200.

[0061] The conductive layer 212a and the conductive layer 112a can be formed by processing the same conductive film.

[0062] The insulating layer 110 is located on the conductive layer 212a. The insulating layer 110 is provided to cover the top and side surfaces of the conductive layer 112a.

[0063] The insulating layer 110a is located on the conductive layer 212a and is provided to cover the top and side surfaces of the conductive layer 212a.

[0064] An insulating layer 110b is provided on the insulating layer 110a, and an insulating layer 110c is provided on the insulating layer 110b. An opening 241 is provided in the insulating layer 110, reaching the conductive layer 212a.

[0065] Fig. 6A is an enlarged view of transistor 200 shown in Fig. 1A. Fig. 6B is an enlarged view of transistor 200 shown in Fig. 1B, and is a cross-sectional view of the cut surface taken along dashed dotted line A4-A2 shown in Fig. 6A. Fig. 7 is an enlarged view of region 42 shown in Fig. 6B.

[0066] The angle th2 is the angle formed between the side surface of the insulating layer 110 on the opening 241 side and the surface on which the conductive layer 212a is to be formed (here, the upper surface of the conductive layer 212a).

[0067] Angle th2 is preferably smaller than angle th1. The channel length L1 of the transistor 100 corresponds to the length of the side surface of the opening 141 in the insulating layer 110 in a cross-sectional view. The channel length L2 of the transistor 200 corresponds to the length of the side surface of the opening 241 in the insulating layer 110 in a cross-sectional view. By making angle th2 smaller than angle th1, the length of the side surface of the opening 241 in the insulating layer 110 can be made longer than the length of the side surface of the opening 141. Therefore, the channel length L2 of the transistor 200 can be made longer than the channel length L1 of the transistor 100.

[0068] The conductive layer 212b is located over the insulating layer 110. An opening 243 overlapping with the opening 241 is provided in the conductive layer 212b. The conductive layer 212b functions as the other of the source and drain electrodes of the transistor 200. The conductive layer 212b has a region overlapping with the conductive layer 212a with the insulating layer 110 interposed therebetween.

[0069] The insulating layer 110 has a region sandwiched between the conductive layers 112a and 112b, and a region sandwiched between the conductive layers 212a and 212b.

[0070] The conductive layer 212b and the conductive layer 112b can be formed by processing the same conductive film.

[0071] The semiconductor layer 208 is in contact with the top surface of the conductive layer 212a, the side surface of the insulating layer 110, and the top surface and side surface of the conductive layer 212b. The semiconductor layer 208 is provided so as to cover the openings 241 and 243. The semiconductor layer 208 is provided in contact with the side surface of the insulating layer 110 on the opening 241 side and the end portion of the conductive layer 212b on the opening 143 side (which can also be said to be a part of the top surface and the side surface on the opening 243 side). The semiconductor layer 208 is in contact with the conductive layer 212a through the openings 241 and 243.

[0072] The semiconductor layer 208 and the semiconductor layer 108 can be formed by processing the same semiconductor film.

[0073] When a film is formed to cover the sidewalls of the opening, the film coverage can be improved by tapering the sidewalls and reducing the angle between the sidewalls and the surface on which the film is formed. On the other hand, if the sidewalls are steep, the coverage can be reduced and the film thickness can be thin. Therefore, if the angle th1 is larger than the angle th2 and the sidewalls of the opening 141 are steeper than those of the opening 241, the semiconductor layer 108 can be thinner than the semiconductor layer 208.

[0074] The insulating layer 106 is located over the semiconductor layer 208 and the conductive layer 212b. The insulating layer 106 is provided to cover the openings 241 and 243 with the semiconductor layer 208 interposed therebetween. As described above, part of the insulating layer 106 functions as a gate insulating layer for the transistor 100, and the other part functions as a gate insulating layer for the transistor 200.

[0075] The thickness of insulating layer 106 in the region covering the sidewall of opening 141 may differ from the thickness of insulating layer 106 in the region covering the sidewall of opening 241. Specifically, for example, opening 141 may have steeper sidewalls than opening 241, and insulating layer 106 covering the sidewall of the opening may be thinner.

[0076] The conductive layer 204 is located over the insulating layer 106. The conductive layer 204 overlaps with the semiconductor layer 208 with the insulating layer 106 interposed therebetween. The conductive layer 204 functions as a gate electrode of the transistor.

[0077] The conductive layer 204 and the conductive layer 104 can be formed by processing the same conductive film.

[0078] The conductive layers 112a, 112b, and 104 can each function as wirings, and the transistor 100 can be provided in a region where these wirings overlap. The conductive layers 212a, 212b, and 204 can each function as wirings, and the transistor 200 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100, the transistor 200, and wirings, the area occupied by the transistor 100, the transistor 200, and the wirings can be reduced. Therefore, the area occupied by the circuit can be reduced, and a small-sized semiconductor device can be provided.

[0079] For example, when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-resolution display device can be obtained.Furthermore, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (for example, one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.

[0080] The top surface shapes of openings 141, 143, 241, and 243 are not particularly limited. Openings 141, 143, 241, and 243 can each be, for example, a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a diamond, and a square), a pentagon, or any other polygonal shape with rounded corners. The polygon may be either a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles equal to or less than 180 degrees). As shown in FIG. 1A and other figures, the top surface shapes of openings 141, 143, 241, and 243 are preferably circular. By making the top surface shapes of the openings circular, the processing accuracy when forming the openings can be improved, allowing for the formation of fine-sized openings. Note that, in this specification and other figures, "circular" is not limited to a perfect circle.

[0081] In this specification and the like, the term "top surface shape" refers to a shape in a planar view. For example, in the configuration shown in FIG. 1B and the like, the shape of the top surface end portion on the opening 141 side of the insulating layer (here, insulating layer 110) sandwiched between conductive layers 112a and 112b can be the top surface shape of the opening 141. Alternatively, for example, the shape of the bottom surface end portion on the opening 141 side of the insulating layer sandwiched between conductive layers 112a and 112b can be the top surface shape of the opening 141.

[0082] 1A, the shape of the upper surface end portion of the insulating layer 110 on the opening 141 side is shown as shape 141t. The shape of the lower surface end portion of the conductive layer 112b on the opening 143 side is shown as shape 143b. The shape of the upper surface end portion of the insulating layer 110 on the opening 241 side is shown as shape 241t. The shape of the lower surface end portion of the conductive layer 212b on the opening 243 side is shown as shape 243b.

[0083] As shown in Fig. 1A, the shape 141t and the shape 143b can be made to coincide or approximately coincide with each other. In this case, as shown in Fig. 1B etc., it is preferable that the bottom surface edge of the conductive layer 112b on the opening 143 side coincides or approximately coincides with the top surface edge of the insulating layer 110 on the opening 141 side. The bottom surface of the conductive layer 112b refers to the surface on the insulating layer 110 side. The top surface of the insulating layer 110 refers to the surface on the conductive layer 112b side.

[0084] Note that the shape 141t and the shape 143b do not have to match each other. Furthermore, when the upper surface shapes of the openings 141 and 143 are circular, the openings 141 and 143 may or may not be concentric.

[0085] 1A, the shape 241t and the shape 243b can be made to coincide or approximately coincide with each other. In this case, as shown in FIG. 1B, etc., it is preferable that the bottom surface edge of the conductive layer 212b on the opening 243 side coincides or approximately coincides with the top surface edge of the insulating layer 110 on the opening 241 side. The bottom surface of the conductive layer 212b refers to the surface on the insulating layer 110 side. The top surface of the insulating layer 110 refers to the surface on the conductive layer 212b side.

[0086] The shape 241t and the shape 243b do not have to match each other. Furthermore, when the upper surface shapes of the openings 241 and 243 are circular, the openings 241 and 243 may or may not be concentric.

[0087] Furthermore, the shape of the upper surface end portion of the insulating layer 110 on the opening 241 side and the shape of the lower surface end portion of the insulating layer 110 on the opening 241 side are significantly different in size. In Fig. 1A, the shape of the lower surface end portion of the insulating layer 110 on the opening 241 side of the opening 241 is shown as shape 241b.

[0088] The transistors 100 and 200 are so-called top-gate transistors having a gate electrode above the semiconductor layer. Furthermore, because the bottom surface of the semiconductor layer is in contact with the source electrode and the drain electrode, they can be called TGBC (Top Gate Bottom Contact) transistors. Furthermore, the source electrode and the drain electrode of the transistors 100 and 200 are located at different heights relative to the surface of the substrate 102 on which they are formed, and drain current flows perpendicularly or approximately perpendicularly to the surface of the substrate 102. It can also be said that the drain current flows vertically or approximately vertically in the transistors 100 and 200. Therefore, the transistor 100 can be called a vertical channel transistor or a VFET (Vertical Field Effect Transistor).

[0089] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 and the angle between the sidewall of the opening 141 provided in the insulating layer 110 and the surface where the transistor 200 is to be formed. The channel length of the transistor 200 can be controlled by the thickness of the insulating layer 110 and the angle between the sidewall of the opening 241 provided in the insulating layer 110 and the surface where the transistor 200 is to be formed. Therefore, the transistors 100 and 200 can be manufactured with high precision, having a channel length shorter than the resolution limit of the exposure equipment used to manufacture the transistors. Specifically, transistors with extremely short channel lengths that could not be realized using conventional exposure equipment for mass production of flat panel displays (e.g., minimum line widths of approximately 2 μm or 1.5 μm) can be realized. Furthermore, transistors with channel lengths of less than 10 nm can be manufactured without using extremely expensive exposure equipment used in cutting-edge LSI technology. Furthermore, the characteristic variations between multiple transistors 100 and multiple transistors 200 are reduced. Therefore, the operation of semiconductor devices including the transistors 100 and 200 can be stabilized, resulting in improved reliability. Furthermore, reduced variations in characteristics increase the degree of freedom in circuit design, allowing the operating voltage of the semiconductor device to be lowered, thereby reducing the power consumption of the semiconductor device.

[0090] By shortening the channel length, the on-state current of the transistor can be increased. By using a transistor, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small-sized semiconductor device can be obtained. For example, when the semiconductor device of one embodiment of the present invention is applied to a large display device or a high-resolution display device, even if the number of wirings is increased, signal delay in each wiring can be reduced, and display unevenness can be suppressed. Furthermore, since the area occupied by the circuit can be reduced, the frame of the display device can be narrowed.

[0091] In the transistors 100 and 200, the source electrode, the semiconductor layer, and the drain electrode can be provided in a stacked manner, and therefore the occupied area can be significantly reduced compared to a so-called planar transistor in which the semiconductor layer is arranged in a planar shape.

[0092] 1B and other drawings show an example in which an end of the semiconductor layer 108 is located on the conductive layer 112b and the semiconductor layer 108 has a region in contact with the top surface of the conductive layer 112b, but the present invention is not limited to this. The semiconductor layer 108 may cover the end of the conductive layer 112b, be located outside the end of the conductive layer 112b, and have a region in contact with the top surface of the insulating layer 110. Similarly, FIG. 1B and other drawings show an example in which an end of the semiconductor layer 208 is located on the conductive layer 212b and has a region in contact with the top surface of the conductive layer 212b, but the semiconductor layer 208 may cover the end of the conductive layer 212b, be located outside the end of the conductive layer 212b, and be in contact with the top surface of the insulating layer 110.

[0093] 1B and the like show an example in which the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 cover the openings 141 and 143, but one embodiment of the present invention is not limited to this. A structure in which a step is formed between the insulating layer 110 and the conductive layer 112b and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are provided along the step may also be used. Similarly, a structure in which a step is formed between the insulating layer 110 and the conductive layer 212b and the conductive layer 212a, and the semiconductor layer 208, the insulating layer 106, and the conductive layer 204 are provided along the step may also be used.

[0094] In the semiconductor device of one embodiment of the present invention, the transistor 100 having a short channel length and the transistor 200 having a long channel length can be fabricated separately. For example, by using the transistor 100 as a transistor that requires a large on-state current and the transistor 200 as a transistor that requires high saturation characteristics, a high-performance semiconductor device can be obtained.

[0095] In the semiconductor device of one embodiment of the present invention, the thickness of the gate insulating layer of the transistor 100 can be thinner than the thickness of the gate insulating layer of the transistor 200. By reducing the thickness of the gate insulating layer, the on-state current of the transistor can be increased and the operation speed can be increased. Furthermore, in the transistor 100, the channel length can be further shortened in addition to the thinning of the gate insulating layer, which enables the on-state current to be further increased and the operation speed to be further increased. Furthermore, the thickness of the gate insulating layer of the transistor 200 can be thicker than the thickness of the gate insulating layer of the transistor 100, which enables the gate withstand voltage of the transistor to be increased. For example, by applying the transistor 200 to a transistor to which a high voltage is applied and the transistor 100 to a transistor that requires high-speed operation, a semiconductor device that achieves both high-speed operation and high reliability can be obtained.

[0096] Furthermore, in the semiconductor device of one embodiment of the present invention, the thickness of the semiconductor layer 108 can be thinner than the thickness of the semiconductor layer 208. By reducing the thickness of the semiconductor layer, for example, the diameter of the opening 141 can be reduced, and the area occupied by the transistor 100 can be reduced.

[0097] An insulating layer 195 is provided to cover the transistor 100 and the transistor 200. The insulating layer 195 functions as a protective layer for the transistor 100 and the transistor 200.

[0098] The detailed structures of the transistor 100 and the transistor 200 will be described.

[0099] First, a detailed configuration of the transistor 100 will be described with reference to FIGS. 5A and 5B.

[0100] In the semiconductor layer 108, a region in contact with the conductive layer 112a functions as one of a source region and a drain region, a region in contact with the conductive layer 112b functions as the other of the source region and the drain region, and a region between the source region and the drain region functions as a channel formation region.

[0101] The channel length of the transistor 100 is the distance between the source region and the drain region. In Figure 5B, the channel length L1 of the transistor 100 is indicated by a dashed double-headed arrow. In a cross-sectional view, the channel length L1 can be considered to be the shortest distance between the region of the semiconductor layer 108 that contacts the conductive layer 112a and the region that contacts the conductive layer 112b.

[0102] The channel length L1 of the transistor 100 corresponds to the length of the side surface of the insulating layer sandwiched between the conductive layers 112a and 112b on the opening 141 side in a cross-sectional view. That is, the channel length L1 is determined by the film thickness T1 of the insulating layer sandwiched between the conductive layers 112a and 112b (here, the film thickness of the insulating layer 110) and the angle th1 between the side surface of the insulating layer on the opening 141 side and the surface on which the insulating layer is to be formed (here, the top surface of the conductive layer 112a).

[0103] In Figures 5A and 5B, the width D143b of the shape 143b is indicated by a two-dot chain line with a double arrow. Figure 5A shows an example in which the top surfaces of the openings 141 and 143 are circular, and the width D143b corresponds to the diameter of the circle. The channel width W1 of the transistor 100 is the circumference of the circle. That is, the channel width W1 is π x D143b. Thus, when the top surfaces of the openings 141 and 143 are circular, a transistor with a shorter channel width can be realized compared to other shapes, such as polygonal shapes. Thus, by forming the openings into a desired shape, such as a circle or polygon, the channel width can be changed without significantly changing the diameter of the transistor.

[0104] The diameter of the opening 141 and the diameter of the opening 143 may differ from each other.

[0105] Next, a detailed configuration of the transistor 200 will be described with reference to FIGS. 6A, 6B, and 7. FIG.

[0106] In the semiconductor layer 208, a region in contact with the conductive layer 212a functions as one of a source region and a drain region, a region in contact with the conductive layer 212b functions as the other of the source region and the drain region, and a region between the source region and the drain region functions as a channel formation region.

[0107] The channel length of the transistor 200 is the distance between the source region and the drain region. In Figure 6B, the channel length L2 of the transistor 200 is indicated by a dashed double-headed arrow. In a cross-sectional view, the channel length L2 can be considered to be the shortest distance between the region of the semiconductor layer 208 that contacts the conductive layer 212a and the region that contacts the conductive layer 212b.

[0108] The channel length L2 of the transistor 200 corresponds to the length of the side surface of the insulating layer sandwiched between the conductive layers 212a and 212b on the opening 241 side in a cross-sectional view. That is, the channel length L2 is determined by the film thickness T1 (here, the film thickness of the insulating layer 110) of the insulating layer sandwiched between the conductive layers 212a and 212b and the angle th2 between the side surface of the insulating layer on the opening 241 side and the surface on which the insulating layer is to be formed (here, the top surface of the conductive layer 212a).

[0109] 6A and 6B, the width D243b of the shape 243b is indicated by a two-dot chain line with a double arrow as the width of the opening 243. Fig. 6A shows an example in which the upper surface shapes of the openings 241 and 243 are circular.

[0110] The diameter of the opening 241 and the diameter of the opening 243 may differ from each other.

[0111] Furthermore, the diameters of the openings 141, 143, 241, and 243 may each vary in the depth direction. In particular, in the transistor 200, because the angle th2 is small, the change in the diameters of the openings 241 and 243 in the depth direction may be more significant. The diameter of the openings may be, for example, the average value of the diameters at the highest and lowest points of the insulating layer 110 in a cross-sectional view, and the diameters at their midpoints. Alternatively, the diameter of the openings may be, for example, the diameter at the highest and lowest points of the insulating layer 110 in a cross-sectional view, or any of the diameters at their midpoints. FIG. 6A shows the width D241t of the highest point and the width D241b of the lowest point of the insulating layer 110 in a cross-sectional view as the width of the opening 241. The width D241t is larger than the width D241b.

[0112] 6A, the upper surface shape of the lower end of the opening 243 is circular, and the width D243b corresponds to the diameter of the circle. The length of the circumference of the circle can be set to, for example, the channel width of the transistor 200 (hereinafter referred to as the channel width W2). The channel width W2 is π×D243b.

[0113] Alternatively, the channel width of the transistor 200 may be calculated using the circumferential length of the lower end of the opening 241. The upper surface shape of the lower end of the opening 241 is circular, and the width D241b corresponds to the diameter of the circle. The circumferential length of the circle can be used as the channel width of the transistor 200 (hereinafter referred to as the channel width W2b). The channel width W2b is calculated as π×D241b.

[0114] Alternatively, the channel width of the transistor 200 may be the average value of the channel width W2 and the channel width W2b.

[0115] When the top surface shape of the openings 241 and 243 is circular, a transistor with a shorter channel width can be realized compared to other shapes.

[0116] In the structure shown in FIGS. 6A and 6B, the width D243b and the width D241t are the same.

[0117] 8A shows an example in which the end of the insulating layer 110 on the semiconductor layer 208 side is located more inward than the end of the conductive layer 212b on the semiconductor layer 208 side. In the configuration shown in Fig. 8A, the width D241t is narrower than the width D243b. In the configuration shown in Fig. 8A, the diameter of the upper surface end of the insulating layer 110 on the opening 241 side is narrower than the diameter of the lower surface end of the conductive layer 212b on the opening 243 side.

[0118] 8B shows an example in which the end of the conductive layer 212b on the semiconductor layer 208 side is located more inward than the end of the insulating layer 110 on the semiconductor layer 208 side. In the configuration shown in Fig. 8B, the width D241t is wider than the width D243b. In the configuration shown in Fig. 8B, the diameter of the upper surface end of the insulating layer 110 on the opening 241 side is wider than the diameter of the lower surface end of the conductive layer 212b on the opening 243 side.

[0119] Note that although Figure 5B and the like illustrate a configuration in which the shape of the side surface of the insulating layer 110 on the opening 141 side is linear in a cross-sectional view, one embodiment of the present invention is not limited thereto. In a cross-sectional view, the shape of the side surface of the insulating layer 110 on the opening 141 side may be curved, or the side surface may have both a linear region and a curved region. Similarly, Figure 6B and the like illustrate a configuration in which the shape of the side surface of the insulating layer 110 on the opening 241 side is linear in a cross-sectional view, but one embodiment of the present invention is not limited thereto. In a cross-sectional view, the shape of the side surface of the insulating layer 110 on the opening 241 side may be curved, or the side surface may have both a linear region and a curved region. Furthermore, the curved region can have various curves, such as a convex curve or a concave curve. Furthermore, the shape of the side surface may have two or more linear regions. Furthermore, the shape of the side surface may have two or more curved regions.

[0120] 9A and 10A each show an example in which the insulating layer 110 has a region where the side surface on the opening 241 side is curved in a cross-sectional view of the transistor 200. Fig. 9B is an enlarged view of a region 43 shown in Fig. 9A , and Fig. 10B is an enlarged view of a region 44 shown in Fig. 10A .

[0121] 9A shows an example in which, in a cross-sectional view of the transistor 200, the shape of the side surface of the insulating layer 110 on the opening 241 side has a region that is a curved convex outward from the insulating layer 110. For example, the angle th2 can be calculated by drawing a tangent to a line along the shape of the side surface and then calculating the angle between the tangent and the surface on which the transistor is to be formed (here, the top surface of the conductive layer 212a). FIG. 9C shows an example in which the angle th2 is calculated by drawing a tangent in the region where the side surface contacts the top surface of the conductive layer 212a. FIG. 9D shows an example in which the angle th2 is calculated by drawing a tangent in a region near the midpoint of the depth of the insulating layer 110, and the angle th2 is smaller than the angle th2 calculated in FIG. 9C.

[0122] 10A shows an example in which, in a cross-sectional view of the transistor 200, the shape of the side surface of the insulating layer 110 on the opening 241 side has a region that is a curve that is convex toward the inside of the insulating layer 110 (concave toward the outside of the insulating layer). Fig. 10C shows an example in which angle th2 is obtained by drawing a tangent line in the region where the side surface contacts the top surface of the conductive layer 212a. Fig. 10D shows an example in which angle th2 is obtained by drawing a tangent line in a region near the midpoint of the depth of the insulating layer 110, and the angle is larger than the angle th2 obtained in Fig. 10C.

[0123] In addition, in a cross-sectional view of the transistor 200, a line may be drawn between the top and bottom edges of the opening 241 of the insulating layer 110, and the angle between the line and the top surface of the conductive layer 212a may be set to angle th2.

[0124] The channel length L1 may be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and may be less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L1 may be 100 nm or more and 1 μm or less.

[0125] The channel length L1 can be controlled by adjusting the film thickness T1 and the angle th1. The ratio of the channel length L2 to the channel length L1 can be controlled by adjusting the relationship between the angle th1 and the angle th2. In Figures 5B and 6B, the film thickness T1 is indicated by a dashed line with a double-headed arrow.

[0126] The film thickness T1 can be, for example, 10 nm or more, 50 nm or more, 100 nm or more, 150 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 3.0 μm, 2.5 μm or less, 2.0 μm or less, 1.5 μm or less, 1.2 μm or less, or 1.0 μm or less.

[0127] Preferably, angle th1 is 90 degrees or a value close to 90 degrees. Alternatively, angle th1 is preferably 55 degrees or greater, more preferably 60 degrees or greater, even more preferably 65 degrees or greater, even more preferably 70 degrees or greater, and even more preferably 90 degrees or less. Alternatively, angle th1 may be less than 90 degrees, 85 degrees or less, 80 degrees or less, or 75 degrees or less.

[0128] Angle th2 is preferably greater than 0 degrees and smaller than angle th1. Angle th2 is more preferably less than 55 degrees, even more preferably 50 degrees or less, even more preferably 45 degrees or less, and even more preferably 40 degrees or less. Angle th2 may be, for example, 10 degrees or more, 15 degrees or more, or 20 degrees or more.

[0129] For example, the channel length L2 is greater than 1.2 times, greater than 1.3 times, greater than 1.4 times, or greater than 1.5 times the channel length L1.

[0130] Moreover, the channel length L2 is, for example, six times or less, four times or less, or three times or less than the channel length L1.

[0131] When the openings 143 and 243 are formed using photolithography, the width D143b of the openings 143 and the width D243b of the openings 243 are equal to or greater than the limit resolution of the exposure device. The width D143b can be, for example, 20 nm or greater, 30 nm or greater, 50 nm or greater, 100 nm or greater, 200 nm or greater, 300 nm or greater, 400 nm or greater, or 500 nm or greater, and less than 5.0 μm, 4.5 μm or less, 4.0 μm or less, 3.5 μm or less, 3.0 μm or less, 2.5 μm or less, 2.0 μm or less, 1.5 μm or less, or 1.0 μm or less. Furthermore, the width D243b can be, for example, 30 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 5.0 μm, 4.5 μm or less, 4.0 μm or less, 3.5 μm or less, 3.0 μm or less, 2.5 μm or less, 2.0 μm or less, 1.5 μm or less, or 1.0 μm or less.

[0132] 1A, 1B, etc. show an example in which the width D243b is wider than the width D143b, but the width D243b may be configured to be approximately the same as the width D143b as shown in Fig. 3. Also, the width D243b may be configured to be narrower than the width D143b.

[0133] Next, the thickness of the gate insulating layer of the transistor 100 will be described with reference to FIG. The insulating layer 106 sandwiched between the conductive layer 104 functioning as a gate electrode and the semiconductor layer 108 functions as a gate insulating layer. The thickness of the gate insulating layer corresponds to the shortest distance between the conductive layer 104 and the semiconductor layer 108 in a cross-sectional view.

[0134] The thickness of the gate insulating layer may vary depending on the angle th1, the angle th2, and the method for forming the insulating layer 106.

[0135] FIG. 11A is a diagram illustrating the thicknesses of the semiconductor layer and the gate insulating layer of the transistor 100. FIG.

[0136] The thicknesses of the semiconductor layer 108 on the top surface of the conductive layer 112b, the side surface of the opening 141 in the insulating layer 110, and the top surface of the conductive layer 112a are designated as thickness B1, thickness B2, and thickness B3. Thickness B2 may be thinner than thickness B1. For example, thickness B2 is 0.4 to 0.85 times the thickness B1. Furthermore, thickness B2 may be thinner than thickness B3. For example, thickness B2 is 0.4 to 0.85 times the thickness B3.

[0137] The thicknesses of the insulating layer 106 on the top surface of the conductive layer 112b, the side surface of the opening 141 in the insulating layer 110, and the top surface of the conductive layer 112a are designated as thickness A1, thickness A2, and thickness A3. Thickness A2 may be thinner than thickness A1. For example, thickness A2 is 0.4 to 0.85 times the thickness A1. Furthermore, thickness A2 may be thinner than thickness A3. For example, thickness A2 is 0.4 to 0.85 times the thickness A3.

[0138] FIG. 11B is a diagram illustrating the thickness of the semiconductor layer and the thickness of the gate insulating layer of the transistor 200.

[0139] The thicknesses of the semiconductor layer 208 on the top surface of the conductive layer 212b, the side surface of the opening 241 in the insulating layer 110, and the top surface of the conductive layer 212a are designated as thickness B11, thickness B12, and thickness B13. For example, thickness B12 is greater than 0.85 times but less than 1.2 times thickness B11. For example, thickness B12 is greater than 0.85 times but less than 1.2 times thickness B13.

[0140] The thicknesses of the insulating layer 106 on the top surface of the conductive layer 212b, the side surface of the opening 241 in the insulating layer 110, and the top surface of the conductive layer 212a are designated as thickness A11, thickness A12, and thickness A13. For example, thickness A12 is greater than 0.85 times but less than 1.2 times thickness A11. For example, thickness A12 is greater than 0.85 times but less than 1.2 times thickness A3.

[0141] The components included in the semiconductor device of this embodiment will be described below.

[0142] [Semiconductor Layer 108, Semiconductor Layer 208] The semiconductor material used for the semiconductor layer 108 and the semiconductor layer 208 is not particularly limited. For example, a semiconductor made of a single element or a compound semiconductor can be used. Examples of semiconductors made of a single element include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Other examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may contain impurities as dopants.

[0143] The crystallinity of the semiconductor material used for the semiconductor layer 108 and the semiconductor layer 208 is not particularly limited, and any of an amorphous semiconductor, a single crystalline semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single crystalline semiconductor or a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0144] The semiconductor layer 108 and the semiconductor layer 208 each preferably include a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.

[0145] The band gap of each of the metal oxides used for the semiconductor layer 108 and the semiconductor layer 208 is preferably 2.0 eV or more, more preferably 2.5 eV or more.

[0146] Examples of metal oxides that can be used for the semiconductor layer 108 and the semiconductor layer 208 include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium or zinc. The metal oxide preferably contains two or three elements selected from indium, element M, and zinc. The element M is a metal element or a metalloid element having a high bond energy with oxygen, for example, a metal element or a metalloid element having a bond energy with oxygen higher than that of indium. Specific examples of the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. In this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal elements" described in this specification and the like may include metalloid elements.

[0147] The semiconductor layer 108 and the semiconductor layer 208 may be made of, for example, indium zinc oxide (In—Zn oxide), indium tin oxide (In—Sn oxide), indium titanium oxide (In—Ti oxide), indium gallium oxide (In—Ga oxide), indium gallium aluminum oxide (In—Ga—Al oxide), indium gallium tin oxide (In—Ga—Sn oxide), gallium zinc oxide (Ga—Zn oxide, also referred to as GZO), aluminum zinc oxide (Al—Zn oxide, also referred to as AZO), indium aluminum zinc oxide ( Examples of usable materials include In-Al-Zn oxide (IAZO), indium tin zinc oxide (In-Sn-Zn oxide, ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, IGAZO, IGZAO, or IAGZO). Alternatively, examples of usable materials include silicon-containing indium tin oxide, gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide).

[0148] By increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the metal oxide, the field-effect mobility of the transistor can be increased, and a transistor with a large on-state current can be realized.

[0149] Note that the metal oxide may contain one or more metal elements with a larger periodic number instead of or in addition to indium. The greater the overlap of the orbitals of the metal elements, the greater the carrier conduction in the metal oxide. Therefore, including a metal element with a larger periodic number may improve the field-effect mobility of a transistor. Examples of metal elements with a larger periodic number include metal elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0150] The metal oxide may contain one or more nonmetallic elements. The nonmetallic elements in the metal oxide may increase the carrier concentration or narrow the band gap, thereby increasing the field-effect mobility of the transistor. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0151] By increasing the ratio of the number of zinc atoms to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the metal oxide can be made highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0152] By increasing the ratio of the number of atoms of element M to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation due to oxygen vacancies can be suppressed, and a transistor with a small off-state current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, thereby improving reliability.

[0153] The electrical characteristics and reliability of a transistor vary depending on the composition of the metal oxide used in the semiconductor layer 108 and the semiconductor layer 208. Therefore, by varying the composition of the metal oxide depending on the electrical characteristics and reliability required of the transistor, a semiconductor device that has both excellent electrical characteristics and high reliability can be obtained.

[0154] The composition of the metal oxide can be analyzed by, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES). Alternatively, a combination of these techniques may be used for the analysis. For elements with low content, the actual content may differ from the content obtained by analysis due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0155] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of atomic ratios of metal elements in such In-M-Zn oxides include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:1, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, In:M:Zn = 6:1:6, In:M:Zn = 5:2:5, and compositions in the vicinity thereof. Note that the term "nearby composition" includes a range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current, field-effect mobility, and the like of the transistor can be increased.

[0156] The atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of M. Examples of atomic ratios of metal elements in such In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, and compositions close to these. By increasing the proportion of M atoms in the metal oxide, the generation of oxygen vacancies can be suppressed.

[0157] When the element M contains a plurality of metal elements, the sum of the proportions of the number of atoms of the metal elements can be used as the proportion of the number of atoms of the element M.

[0158] In this specification and the like, the ratio of the number of indium atoms to the sum of the numbers of atoms of all contained metal elements may be referred to as the indium content. The same applies to other metal elements.

[0159] The metal oxide can be preferably formed by sputtering or atomic layer deposition (ALD). When the metal oxide is formed by sputtering, the composition of the metal oxide after film formation may differ from the composition of the target. In particular, the zinc content in the metal oxide after film formation may decrease to about 50% compared to the target.

[0160] The semiconductor layer 108 and the semiconductor layer 208 may have a stacked structure including two or more metal oxide layers. The two or more metal oxide layers included in the semiconductor layer 108 and the semiconductor layer 208 may have the same or approximately the same composition. By using a stacked structure of metal oxide layers having the same composition, for example, the same sputtering target can be used for formation, thereby reducing manufacturing costs.

[0161] The two or more metal oxide layers included in the semiconductor layer 108 and the semiconductor layer 208 may have different compositions. For example, a stacked structure of a first metal oxide layer having an atomic ratio of In:M:Zn=1:3:4 or a composition similar thereto and a second metal oxide layer having an atomic ratio of In:M:Zn=1:1:1 or a composition similar thereto, provided on the first metal oxide layer, can be preferably used. Furthermore, it is particularly preferable to use gallium, aluminum, or tin as the element M. For example, a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) can be used.

[0162] The semiconductor layer 108 and the semiconductor layer 208 may also have a stacked structure of two or more layers. Examples of such a stacked structure include a three-layer stacked structure in which a first layer is a semiconductor layer having an atomic ratio of metal elements of In:Ga:Zn = 1:1:1, a second layer is a semiconductor layer having an atomic ratio of metal elements of In:Zn = 4:1, and a third layer is a semiconductor layer having an atomic ratio of metal elements of In:Ga:Zn = 1:1:1. It is preferable that the band gaps of the first and third semiconductor layers be larger than the band gap of the second layer. This configuration allows the main current path to be the second layer, resulting in a so-called buried channel structure.

[0163] The semiconductor layer 108 and the semiconductor layer 208 preferably include a crystalline metal oxide layer. Examples of the structure of a crystalline metal oxide include a c-axis aligned crystal (CAAC) structure, a polycrystalline structure, and a nanocrystalline (nc) structure. By using a crystalline metal oxide layer for the semiconductor layer 108, the density of defect states in the semiconductor layer 108 can be reduced, and a highly reliable semiconductor device can be realized.

[0164] The higher the crystallinity of the metal oxide layers used for the semiconductor layer 108 and the semiconductor layer 208, the more the density of defect states in the semiconductor layer 108 can be reduced. On the other hand, by using a metal oxide layer with low crystallinity, a transistor capable of passing a large current can be realized.

[0165] When a metal oxide layer is formed by a sputtering method, the higher the substrate temperature (stage temperature) during formation, the higher the crystallinity of the formed metal oxide layer.Furthermore, the higher the ratio of the flow rate of oxygen gas to the total film formation gas used during formation (hereinafter also referred to as the oxygen flow rate ratio), the higher the crystallinity of the formed metal oxide layer.

[0166] The semiconductor layer 108 and the semiconductor layer 208 may each have a stacked structure of two or more metal oxide layers with different crystallinity. For example, a stacked structure of a first metal oxide layer and a second metal oxide layer provided on the first metal oxide layer may be used, and the second metal oxide layer may have a region with higher crystallinity than the first metal oxide layer. Alternatively, the second metal oxide layer may have a region with lower crystallinity than the first metal oxide layer. In this case, the first metal oxide layer and the second metal oxide layer may have different compositions or may have the same or approximately the same composition.

[0167] The thickness of each of the semiconductor layer 108 and the semiconductor layer 208 is preferably 1 nm to 200 nm, more preferably 3 nm to 100 nm, further preferably 5 nm to 100 nm, further preferably 10 nm to 100 nm, further preferably 10 nm to 70 nm, further preferably 15 nm to 70 nm, further preferably 15 nm to 50 nm, further preferably 20 nm to 50 nm. The thicknesses of the semiconductor layer 108 and the semiconductor layer 208 may be the same or different.

[0168] Note that the thickness of the semiconductor layer 108 and the semiconductor layer 208 may vary depending on the region. For example, the thickness may be 0.4 to less than 1.2 times the above-mentioned range depending on the region.

[0169] When an oxide semiconductor is used for the semiconductor layer 108 and the semiconductor layer 208, hydrogen contained in the oxide semiconductor reacts with oxygen that is bonded to a metal atom to form water, and oxygen vacancies (V Ｏ In addition, defects in which hydrogen enters oxygen vacancies (hereinafter referred to as V Ｏ Hydrogen atoms (H) may function as donors and generate electrons as carriers. Furthermore, some of the hydrogen atoms may bond with oxygen atoms that are bonded to metal atoms to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily mobile due to stresses such as heat and an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.

[0170] When an oxide semiconductor is used for the semiconductor layer 108 and the semiconductor layer 208, V in the semiconductor layer 108 and the semiconductor layer 208 Ｏ It is preferable to reduce H as much as possible to obtain high-purity intrinsic or substantially high-purity intrinsic. Ｏ To obtain an oxide semiconductor in which H is sufficiently reduced, it is important to remove impurities such as water and hydrogen from the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment) and to supply oxygen to the oxide semiconductor to repair oxygen vacancies. ＯStable electrical characteristics can be obtained by using an oxide semiconductor in which impurities such as H are sufficiently reduced for a channel formation region of a transistor. Note that supplying oxygen to an oxide semiconductor to repair oxygen vacancies is sometimes referred to as oxygen-adding treatment.

[0171] When an oxide semiconductor is used for the semiconductor layer 108 and the semiconductor layer 208, the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is 1×10 １８ cm −３ Preferably, it is 1×10 or less. １７ cm −３ More preferably, it is less than 1×10 １６ cm −３ More preferably, it is less than 1×10 １３ cm −３ More preferably, it is less than 1×10 １２ cm −３ The lower limit of the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is not particularly limited, but is preferably, for example, 1×10 −９ cm −３ It can be said that:

[0172] A transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) has extremely high field-effect mobility compared to a transistor using amorphous silicon. Furthermore, an OS transistor has an extremely low off-state current and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a semiconductor device.

[0173] OS transistors exhibit little change in electrical characteristics due to radiation exposure, i.e., have high radiation resistance, and therefore can be suitably used in environments where radiation may be incident. It can also be said that OS transistors have high reliability against radiation. For example, OS transistors can be suitably used in pixel circuits of X-ray flat panel detectors. Furthermore, OS transistors can be suitably used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton rays, and neutron rays).

[0174] Examples of silicon that can be used for the semiconductor layer 108 and the semiconductor layer 208 include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polysilicon (LTPS).

[0175] The transistors using amorphous silicon for the semiconductor layers 108 and 208 can be formed over a large glass substrate and can be manufactured at low cost. The transistors using polycrystalline silicon for the semiconductor layers 108 and 208 have high field-effect mobility and can operate at high speed. The transistors using microcrystalline silicon for the semiconductor layers 108 and 208 have higher field-effect mobility and can operate at high speed than the transistors using amorphous silicon.

[0176] The semiconductor layer 108 and the semiconductor layer 208 may include a layered material that functions as a semiconductor. A layered material is a general term for a group of materials that have a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds. A layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-state current can be provided.

[0177] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen (an element belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２ ), tungsten tellurium (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ) etc.

[0178] The semiconductor layer 108 and the semiconductor layer 208 are preferably formed in the same process. Therefore, the semiconductor layer 108 and the semiconductor layer 208 are preferably made of the same material.

[0179] Alternatively, the semiconductor layer 108 and the semiconductor layer 208 may be formed in different steps. In this case, the semiconductor layer 108 and the semiconductor layer 208 may be made of different materials.

[0180] [Insulating Layer 110] Each layer constituting the insulating layer 110 preferably uses an inorganic insulating film. Examples of inorganic insulating films include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Examples of oxide insulating films include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, a yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminate film. Examples of nitride insulating films include a silicon nitride film and an aluminum nitride film. Examples of oxynitride insulating films include a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, an yttrium oxynitride film, and a hafnium oxynitride film. Examples of nitride oxide insulating films include a silicon nitride oxide film and an aluminum nitride oxide film.

[0181] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen. A nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0182] The composition can be analyzed by, for example, secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), Auger electron spectroscopy (AES), or energy dispersive X-ray spectroscopy (EDX). For example, when the content of the target element is high (e.g., 0.5 atomic % or more, or 1 atomic % or more), XPS can be suitably used. On the other hand, when the content of the target element is low (for example, 0.5 atomic % or less, or 1 atomic % or less), SIMS can be suitably used. It is more preferable to use multiple analytical techniques for analyzing the composition. For example, it is more preferable to perform a combined analysis using both SIMS and XPS.

[0183] The insulating layer 110 has a portion in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, it is preferable to use an oxide for at least a part of the portion of the insulating layer 110 in contact with the semiconductor layer 108 in order to improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110. Specifically, it is preferable to use an oxide for a portion of the insulating layer 110 in contact with a channel formation region of the semiconductor layer 108. The channel formation region is a high-resistance region with a low carrier concentration. It can be said that the channel formation region is i-type (intrinsic) or substantially i-type.

[0184] The insulating layer 110b is preferably a layer containing oxygen. The insulating layer 110b preferably has a region with a higher oxygen content than at least one of the insulating layer 110a and the insulating layer 110c. In particular, the insulating layer 110b preferably has a region with a higher oxygen content than each of the insulating layer 110a and the insulating layer 110c.

[0185] The insulating layer 110b is preferably formed using one or more of the above-described oxide insulating film and oxynitride insulating film. Specifically, the insulating layer 110b is preferably formed using one or both of a silicon oxide film and a silicon oxynitride film. Increasing the oxygen content of the insulating layer 110b makes it easier to form an i-type region in the region of the semiconductor layer 108 that is in contact with the insulating layer 110b and in the vicinity thereof.

[0186] It is more preferable to use a film that releases oxygen by heating for the insulating layer 110b. When the insulating layer 110b releases oxygen due to heat applied during the manufacturing process of the transistor 100, oxygen can be supplied to the semiconductor layer 108. When oxygen is supplied from the insulating layer 110b to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies (V Ｏ ) and V Ｏ H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0187] For example, oxygen can be supplied to the insulating layer 110b by heat treatment in an oxygen-containing atmosphere or plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen may be supplied to the insulating layer 110b by forming an oxide film on the top surface of the insulating layer 110b by a sputtering method in an oxygen atmosphere. Then, the oxide film may be removed.

[0188] The insulating layer 110b is preferably formed by a deposition method such as a sputtering method or a plasma-enhanced chemical vapor deposition (PECVD) method. In particular, by using a sputtering method without using hydrogen gas as a deposition gas, a film with an extremely low hydrogen content can be obtained. Therefore, supply of hydrogen to the semiconductor layer 108 can be suppressed, and the electrical characteristics of the transistor 100 can be stabilized.

[0189] As described above, the channel length L1 of the transistor 100 can be made extremely short. When the channel length L1 is short, oxygen vacancies (V Ｏ ) and V ＯThe influence of H on the electrical characteristics and reliability is particularly large. By supplying oxygen from the insulating layer 110b to the semiconductor layer 108, oxygen vacancies (V Ｏ ) and V Ｏ It is possible to suppress an increase in H. Therefore, a transistor having a short channel length, good electrical characteristics, and high reliability can be realized.

[0190] It is preferable to use a film through which oxygen does not easily diffuse for each of the insulating layers 110a and 110c. This prevents oxygen contained in the insulating layer 110b from permeating to the substrate 102 side through the insulating layer 110a and from permeating to the insulating layer 106 side through the insulating layer 110c due to heating. In other words, by sandwiching the insulating layer 110b between the insulating layers 110a and 110c, through which oxygen does not easily diffuse, the oxygen contained in the insulating layer 110b can be trapped. This allows oxygen to be effectively supplied to the semiconductor layer 108.

[0191] The insulating layers 110a and 110c are preferably formed using a film through which hydrogen does not easily diffuse, which can prevent hydrogen from diffusing from the outside of the transistor to the semiconductor layer 108 through the insulating layers 110a and 110c.

[0192] For the insulating layer 110a and the insulating layer 110c, it is preferable to use one or more of the above-mentioned oxide insulating film, nitride insulating film, oxynitride insulating film, and nitride oxide insulating film, and it is preferable to use one or more of a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminate film. In particular, a silicon nitride film and a silicon nitride oxide film have the characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and being less permeable to oxygen and hydrogen, and therefore can be suitably used for the insulating layer 110a and the insulating layer 110c. Note that the insulating layer 110a and the insulating layer 110c may be made of the same material or different materials.

[0193] Here, the conductive layer 112a and the conductive layer 112b may be oxidized by oxygen contained in the insulating layer 110b, resulting in an increase in resistance. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112a, the conductive layer 112a can be prevented from being oxidized and the resistance from increasing. Furthermore, by providing the insulating layer 110c between the insulating layer 110b and the conductive layer 112b, the conductive layer 112b can be prevented from being oxidized and the resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 can be increased, thereby reducing oxygen vacancies in the semiconductor layer 108.

[0194] The thickness of each of the insulating layers 110a and 110c is preferably 5 nm to 150 nm, more preferably 5 nm to 100 nm, still more preferably 5 nm to 70 nm, further preferably 10 nm to 70 nm, further preferably 10 nm to 50 nm, and further preferably 20 nm to 50 nm. By setting the thicknesses of the insulating layers 110a and 110c within the above ranges, oxygen vacancies in the semiconductor layer 108, particularly in the channel formation region, can be reduced.

[0195] For example, it is preferable that the insulating layers 110a and 110c be formed using silicon nitride films, and the insulating layer 110a be formed using a silicon oxynitride film.

[0196] Note that although the insulating layer 110 has a three-layer structure in this embodiment, one embodiment of the present invention is not limited to this. The insulating layer 110 may have a single-layer structure or a two-layer or four or more-layer structure. The insulating layer 110 preferably includes at least the insulating layer 110b.

[0197] The insulating layer 110c may be a film that releases hydrogen when heated. The insulating layer 110c releases hydrogen due to heat applied during the manufacturing process of the transistor 100, so that hydrogen can be supplied to the semiconductor layer 108 and the semiconductor layer 208. As a result, a low-resistance region can be formed near a region of the semiconductor layer 108 in contact with the conductive layer 112b in the transistor 100, and a low-resistance region can be formed near a region of the semiconductor layer 208 in contact with the conductive layer 212b in the transistor 200.

[0198] Similarly, by using a film that releases hydrogen when heated as the insulating layer 110a, a low-resistance region can be formed near the region in contact with the conductive layer 112a of the semiconductor layer 108 in the transistor 100, and near the region in contact with the conductive layer 212a of the semiconductor layer 208 in the transistor 200.

[0199] The insulating layer 110b is preferably a film with a low hydrogen content, which can suppress diffusion of hydrogen into a region of the semiconductor layer 108 to which a gate electric field is sufficiently applied (a region desired to be i-type), thereby making the channel formation region i-type.

[0200] 12A is an enlarged view of region 41 shown in FIG. 5B, and FIG. 12B is an enlarged view of region 42 shown in FIG. 6B, showing an example in which films that release hydrogen when heated are used as insulating layers 110a and 110c.

[0201] 12A, in the semiconductor layer 108 of the transistor 100, the regions in contact with the insulating layers 110a and 110c have low resistance and do not become channel formation regions, and the channel formation regions are shorter than those in FIG. 5C. Also, as shown in FIG. 12B, in the semiconductor layer 208 of the transistor 200, the regions in contact with the insulating layers 110a and 110c have low resistance and do not become channel formation regions, and the channel formation regions are shorter than those in FIG. 7.

[0202] 12A , when the conductive layer 112a functions as a drain electrode, the semiconductor layer 108 can be considered to have a low-resistance region between the region in contact with the drain electrode and the channel formation region. This makes it difficult for a high electric field to be generated near the drain region, thereby suppressing the generation of hot carriers and transistor deterioration. When the conductive layer 112b functions as a drain electrode, the semiconductor layer 108 can be considered to have a low-resistance region between the region in contact with the drain electrode and the channel formation region. This makes it difficult for a high electric field to be generated near the drain region, thereby suppressing the generation of hot carriers and transistor deterioration. The transistor 100 can achieve high reliability regardless of whether the conductive layer 112a or the conductive layer 112b serves as the drain electrode. This increases the degree of freedom in designing a semiconductor device.

[0203] In the configuration example of the transistor 200 shown in FIG. 12B , when the conductive layer 212a functions as the drain electrode, the semiconductor layer 208 can be said to have a low-resistance region between the region in contact with the drain electrode and the channel formation region. This makes it difficult for a high electric field to be generated near the drain region, suppressing the generation of hot carriers and transistor degradation. When the conductive layer 212b functions as the drain electrode, the semiconductor layer 208 can be said to have a low-resistance region between the region in contact with the drain electrode and the channel formation region. This makes it difficult for a high electric field to be generated near the drain region, suppressing the generation of hot carriers and transistor degradation. The transistor 200 can achieve high reliability regardless of whether the conductive layer 212a or the conductive layer 212b serves as the drain electrode. This increases the degree of freedom in designing the semiconductor device.

[0204] The insulating layer 110c may also have a stacked structure of two or more layers. For example, the insulating layer 110c may have a stacked structure of two layers: an insulating layer 110c1 and an insulating layer 110c2 on the insulating layer 110c1.

[0205] Alternatively, the insulating layer 110a may have a laminated structure of two or more layers. For example, the insulating layer 110a may have a laminated structure of two layers, that is, an insulating layer 110a1 and an insulating layer 110a2 on the insulating layer 110a1.

[0206] Figure 13A is an enlarged view of region 41 shown in Figure 5B, and Figure 13B is an enlarged view of region 42 shown in Figure 6B, and shows an example in which insulating layer 110a has a two-layer laminated structure of insulating layer 110a1 and insulating layer 110a2 on insulating layer 110a1, and insulating layer 110c has a two-layer laminated structure of insulating layer 110c1 and insulating layer 110c2 on insulating layer 110c1.

[0207] It is preferable to use a film that releases hydrogen by heating as the insulating layer 110c2. As a result, a low-resistance region can be formed near the region in contact with the conductive layer 112b of the semiconductor layer 108 in the transistor 100, and near the region in contact with the conductive layer 212b of the semiconductor layer 208 in the transistor 200. When the conductive layer 112b and the conductive layer 212b are used as the drain electrodes of the transistor 100 and the transistor 200, respectively, generation of hot carriers can be suppressed.

[0208] The insulating layer 110c1 preferably has a region with a lower hydrogen content than the insulating layer 110c2, which can suppress diffusion of hydrogen from the insulating layer 110c2 to the insulating layer 110b and to a region (a region desired to be i-type) in the semiconductor layer of the transistor (the semiconductor layer 108 of the transistor 100 or the semiconductor layer 208 of the transistor 200) to which a gate electric field is sufficiently applied.

[0209] It is preferable to use a film that releases hydrogen by heating as the insulating layer 110a1. As a result, a low-resistance region can be formed near the region in contact with the conductive layer 112a of the semiconductor layer 108 in the transistor 100, and near the region in contact with the conductive layer 212a of the semiconductor layer 208 in the transistor 200. When the conductive layer 112a and the conductive layer 212a are used as the drain electrodes of the transistor 100 and the transistor 200, respectively, generation of hot carriers can be suppressed.

[0210] The insulating layer 110a2 preferably has a region with a lower hydrogen content than the insulating layer 110a1, which can suppress diffusion of hydrogen from the insulating layer 110a1 to the insulating layer 110b and to a region (a region desired to be i-type) in the semiconductor layer of the transistor (the semiconductor layer 108 of the transistor 100 or the semiconductor layer 208 of the transistor 200) where a gate electric field is sufficiently applied.

[0211] As the film that releases hydrogen when heated, any one or more of the above-mentioned oxide insulating film, nitride insulating film, oxynitride insulating film, and nitride oxide insulating film can be used, and any one or more of a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminate film can be used.

[0212] As the film that releases hydrogen by heating, it is preferable to use one or more of a nitride insulating film and a nitride oxide insulating film, specifically, it is preferable to use one or both of a silicon nitride film and a silicon nitride oxide film.

[0213] The silicon nitride film and the silicon nitride oxide film can be made to release a lot of hydrogen by changing the film formation conditions (for example, film formation gas or power during film formation), etc. Also, by changing the film formation conditions, etc., it is possible to make the film release less impurities (for example, water and hydrogen) from itself and to make it less permeable to oxygen and hydrogen.

[0214] Therefore, when a silicon nitride film and a silicon nitride oxide film are used for the insulating layer 110a1 and the insulating layer 110c2, the film should be one that releases a lot of hydrogen, and when used for the insulating layer 110a2 and the insulating layer 110c1, the film should be one that releases little impurities (e.g., water and hydrogen) from itself and is difficult for oxygen and hydrogen to permeate.

[0215] Since the hydrogen content is low compared to the main components that make up the insulating layer (for example, nitrogen and silicon in the case of a silicon nitride layer), it is preferable to compare the hydrogen content in each layer that makes up the insulating layer 110 using SIMS analysis.

[0216] Furthermore, even if the layers constituting the insulating layer 110 have the same main component (e.g., silicon nitride layers), the two layers may be distinguishable from each other by differences in brightness, etc., through cross-sectional observation using a scanning transmission electron microscope (STEM) or the like. For example, in a transmitted electron (TE) image, a silicon nitride film (or a silicon nitride oxide film) that releases a lot of hydrogen may be observed to have higher brightness than a silicon nitride film (or a silicon nitride oxide film) that releases less impurities (e.g., water and hydrogen) from itself and is less permeable to oxygen and hydrogen.

[0217] [Conductive Layer 112a, Conductive Layer 112b, Conductive Layer 104, Conductive Layer 204, Conductive Layer 212a, Conductive Layer 212b] The conductive layers 112a, 112b, 104, 204, 212a, and 212b may each have a single-layer structure or a stacked structure of two or more layers. Examples of materials that can be used for the conductive layers 112a, 112b, 104, 204, 212a, and 212b include one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, ruthenium, and niobium, and alloys containing one or more of the above metals. The conductive layers 112a, 112b, 104, 204, 212a, and 212b can be formed using a low-resistance conductive material containing one or more of copper, silver, gold, and aluminum. Copper and aluminum are particularly preferred because of their excellent mass productivity.

[0218] The conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can each be formed using a conductive metal oxide (also referred to as an oxide conductor). Examples of oxide conductors (OC) include indium oxide, zinc oxide, In—Sn oxide (ITO), In—Zn oxide, In—W oxide, In—W—Zn oxide, In—Ti oxide, In—Ti—Sn oxide, In—Sn—Si oxide (also referred to as ITO containing silicon, ITSO), zinc oxide to which gallium is added, and In—Ga—Zn oxide. In particular, conductive oxides containing indium are preferable because of their high conductivity.

[0219] When oxygen vacancies are formed in a metal oxide having semiconductor properties and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band. As a result, the metal oxide becomes electrically conductive, and the conductivity of the metal oxide increases. The metal oxide that has become electrically conductive can be called an oxide conductor.

[0220] The conductive layers 112a, 112b, 104, 204, 212a, and 212b may each have a stacked structure of a conductive film containing the oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.

[0221] The conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b may each be a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti). By using a Cu-X alloy film, it is possible to process the film using a wet etching method, thereby reducing manufacturing costs.

[0222] Note that the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b may all be formed using the same material, or at least one of them may be formed using a different material.

[0223] In this specification and the like, different materials refer to materials having different constituent elements, or materials having the same constituent elements but different compositions.

[0224] The conductive layer 112a and the conductive layer 112b each have a region in contact with the semiconductor layer 108. The conductive layer 212a and the conductive layer 212b each have a region in contact with the semiconductor layer 208. When an oxide semiconductor is used for the semiconductor layer 108, if a metal that is easily oxidized (e.g., aluminum) is used for the conductive layer 112a or the conductive layer 112b, an insulating oxide (e.g., aluminum oxide) may be formed between the conductive layer 112a or the conductive layer 112b and the semiconductor layer 108, which may hinder electrical conduction therebetween. Therefore, it is preferable to use a conductive material that is not easily oxidized or a conductive material that maintains low electrical resistance even when oxidized for the conductive layer 112a and the conductive layer 112b. The same applies to the conductive layer 212a and the conductive layer 212b when an oxide semiconductor is used for the semiconductor layer 208; it is preferable to use a conductive material that is not easily oxidized or a conductive material that maintains low electrical resistance even when oxidized for the conductive layer 212a and the conductive layer 212b.

[0225] The conductive layers 112a, 112b, 212a, and 212b are preferably made of one or more of, for example, titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel. These are preferred because they are conductive materials that are difficult to oxidize or that maintain low electrical resistance even when oxidized.

[0226] The conductive layer 112 a, the conductive layer 112 b, the conductive layer 212 a, and the conductive layer 212 b can each be formed using one of the above-described oxide conductors. Specifically, one or more of indium oxide, zinc oxide, ITO, In—Zn oxide, In—W oxide, In—W—Zn oxide, In—Ti oxide, In—Ti—Sn oxide, In—Sn oxide containing silicon, and zinc oxide doped with gallium can be used.

[0227] The conductive layer 112a, the conductive layer 112b, the conductive layer 212a, and the conductive layer 212b may each be formed using a nitride conductor, such as tantalum nitride or one or more of titanium nitride.

[0228] The conductive layer 112a and the conductive layer 112b may each have a stacked structure. In the case of a stacked structure, it is preferable that at least the side in contact with the semiconductor layer 108 be made of a conductive material that is resistant to oxidation or a conductive material that maintains low electrical resistance even when oxidized. For example, the conductive layer 112a can have a stacked structure of an aluminum film and a titanium film over the aluminum film. The titanium film has a region in contact with the semiconductor layer 108. The conductive layer 112a can also have a stacked structure of a first titanium film, an aluminum film over the first titanium film, and a second titanium film over the aluminum film. The second titanium film has a region in contact with the semiconductor layer 108.

[0229] The conductive layer 212a and the conductive layer 212b may each have a stacked structure. In the case of a stacked structure, it is preferable that at least the side in contact with the semiconductor layer 208 be made of a conductive material that is resistant to oxidation or a conductive material that maintains low electrical resistance even when oxidized. For example, the conductive layer 212a can have a stacked structure of an aluminum film and a titanium film over the aluminum film. The titanium film has a region in contact with the semiconductor layer 208. The conductive layer 212a can also have a stacked structure of a first titanium film, an aluminum film over the first titanium film, and a second titanium film over the aluminum film. The second titanium film has a region in contact with the semiconductor layer 208.

[0230] [Insulating Layer 106] The insulating layer 106 may have a single-layer structure or a stacked structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. Examples of inorganic insulating films include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. The insulating layer 106 can be formed using a material that can be used for the insulating layer 110.

[0231] The insulating layer 106 has a region in contact with the semiconductor layer 108 and the semiconductor layer 208. When an oxide semiconductor is used for the semiconductor layer 108 and the semiconductor layer 208, it is preferable to use any one of the above-described oxide insulating film and oxynitride insulating film for at least a film that is in contact with the semiconductor layer 108 or the semiconductor layer 208 among films that form the insulating layer 106. It is more preferable to use a film that releases oxygen by heating for the insulating layer 106.

[0232] Specifically, when the insulating layer 106 has a single-layer structure, it is preferable to use a silicon oxide film or a silicon oxynitride film for the insulating layer 106 .

[0233] The insulating layer 106 can have a stacked-layer structure of an oxide insulating film or an oxynitride insulating film on a side in contact with the semiconductor layer 108 and a nitride insulating film or a nitride oxide insulating film on a side in contact with the conductive layer 104 and the conductive layer 204. As the oxide insulating film or the oxynitride insulating film, for example, a silicon oxide film or a silicon oxynitride film is preferably used. As the nitride insulating film or the nitride oxide insulating film, a silicon nitride film or a silicon nitride oxide film is preferably used.

[0234] A silicon nitride film and a silicon nitride oxide film have characteristics of releasing little impurities (for example, water and hydrogen) from themselves and being difficult for oxygen and hydrogen to permeate, and therefore can be suitably used as the insulating layer 106. By suppressing the diffusion of impurities from the insulating layer 106 to the semiconductor layer 108 and the semiconductor layer 208, the electrical characteristics of the transistor can be improved and the reliability can be increased.

[0235] Note that in a miniaturized transistor, a thin gate insulating layer may result in a large leakage current. By using a material with a high relative dielectric constant (also referred to as a high-k material) for the gate insulating layer, a transistor can be operated at a low voltage while maintaining a physical film thickness. Examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium, an oxynitride containing aluminum and hafnium, an oxide containing silicon and hafnium, an oxynitride containing silicon and hafnium, and a nitride containing silicon and hafnium.

[0236] [Insulating Layer 195] The insulating layer 195, which functions as a protective layer for the transistors 100 and 200, is preferably made of a material through which impurities do not easily diffuse. By providing the insulating layer 195, diffusion of impurities from the outside into the transistors can be effectively suppressed, thereby improving the reliability of the display device. Examples of impurities include water and hydrogen.

[0237] The insulating layer 195 can be an insulating layer containing an inorganic material or an insulating layer containing an organic material. For example, an inorganic material such as oxide, oxynitride, nitride oxide, or nitride can be suitably used for the insulating layer 195. More specifically, one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate can be used. For example, one or more of acrylic resin and polyimide resin can be used as the organic material. A photosensitive material may be used as the organic material. Two or more of the above insulating films may be stacked. The insulating layer 195 may have a stacked structure of an insulating layer containing an inorganic material and an insulating layer containing an organic material.

[0238] [Substrate 102] There are no significant limitations on the material of the substrate 102, but it must have at least heat resistance sufficient to withstand subsequent heat treatment. For example, the substrate 102 may be a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate. A semiconductor element may be provided on the substrate 102. The semiconductor substrate and the insulating substrate may have either a circular or rectangular shape.

[0239] A flexible substrate may be used as the substrate 102, and the transistors 100, 200, and the like may be formed directly on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistors 100, 200, and the like. By providing the peeling layer, after a semiconductor device is partially or entirely completed thereon, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistors 100, 200, and the like can also be transferred to a substrate with poor heat resistance or a flexible substrate.

[0240] 4A is a top view of a semiconductor device 10 according to one embodiment of the present invention, and FIG. 4B is a cross-sectional view taken along dashed dotted line A1-A2 in FIG.

[0241] 4A and 4B includes a transistor 100 and a transistor 200. The semiconductor device 10 is different from the semiconductor device 10 shown in FIGS. 1A and 1B, etc., mainly in that the semiconductor device 10 includes a conductive layer 103, a conductive layer 203, and an insulating layer 107.

[0242] 4A and 4B includes a conductive layer 103 and an insulating layer 107 between the conductive layer 112a and the insulating layer 110. In addition, a transistor 200 shown in FIGS. 4A and 4B includes a conductive layer 203 and an insulating layer 107 between the conductive layer 212a and the insulating layer 110.

[0243] The insulating layer 107 has a region located over the conductive layer 112a and a region located over the conductive layer 212a. The insulating layer 107 has a region provided to cover the top surface and side surface of the conductive layer 112a and a region provided to cover the top surface and side surface of the conductive layer 212a.

[0244] The conductive layer 103 is located on the insulating layer 107. The conductive layer 112a and the conductive layer 103 are electrically insulated from each other by the insulating layer 107. An opening 148 is provided in the conductive layer 103, reaching the insulating layer 107, in a region overlapping with the conductive layer 112a.

[0245] The conductive layer 203 is located on the insulating layer 107. The conductive layer 212a and the conductive layer 203 are electrically insulated from each other by the insulating layer 107. An opening 248 reaching the insulating layer 107 is provided in the conductive layer 203 in a region overlapping with the conductive layer 212a.

[0246] The insulating layer 110 is provided over the insulating layer 107, the conductive layer 103, and the conductive layer 203. The insulating layer 110 is provided so as to cover the top and side surfaces of the conductive layer 103, the top and side surfaces of the conductive layer 203, and the top surface of the insulating layer 107. An opening 141 reaching the conductive layer 112a is provided in the insulating layer 110 and the insulating layer 107 in a region overlapping with the conductive layer 112a. Furthermore, an opening 241 reaching the conductive layer 212a is provided in the insulating layer 110 and the insulating layer 107 in a region overlapping with the conductive layer 212a.

[0247] The insulating layer 110a is located over the insulating layer 107, the conductive layer 103, and the conductive layer 203. The insulating layer 110a has a region provided to cover the top surface and side surfaces of the conductive layer 103 and a region provided to cover the top surface and side surfaces of the conductive layer 203. The insulating layer 110a is provided to cover a part of the opening 148. The insulating layer 110a is in contact with the insulating layer 107 through the opening 148. The insulating layer 110a is also provided to cover a part of the opening 248. The insulating layer 110a is in contact with the insulating layer 107 through the opening 248.

[0248] The top surface shapes of openings 148 and 248 are not particularly limited. The top surface shape of opening 148 can be a shape that can be applied to openings 141 and 143. As shown in FIG. 4A , the top surface shapes of openings 141, 143, and 148 are preferably circular. By making the top surface shapes of the openings circular, the top surface shape of opening 248 can be a shape that can be applied to openings 241 and 243. As shown in FIG. 4A , the top surface shapes of openings 241, 243, and 248 are preferably circular. By making the top surface shapes of the openings circular, processing accuracy can be improved when forming the openings, and openings of fine sizes can be formed.

[0249] In this specification and the like, the top surface shape of opening 148 refers to the shape of the top surface end or the shape of the bottom surface end on the opening 148 side of conductive layer 103. Figure 4A shows the shape 148t of the top surface end on the opening 148 side of conductive layer 103. Furthermore, in this specification and the like, the top surface shape of opening 248 refers to the shape of the top surface end or the shape of the bottom surface end on the opening 248 side of conductive layer 103. Figure 4A shows the shape 248t of the top surface end on the opening 248 side of conductive layer 203.

[0250] When the top surfaces of the openings 141 and 148 are circular, the openings 141 and 148 are preferably concentric. This allows the shortest distance between the semiconductor layer 108 and the conductive layer 103 to be equal on the left and right sides of the opening 141 in a cross-sectional view. The openings 141 and 148 may not be concentric. When the top surfaces of the openings 241 and 248 are circular, the openings 241 and 248 are preferably concentric. This allows the shortest distance between the semiconductor layer 208 and the conductive layer 203 to be equal on the left and right sides of the opening 241 in a cross-sectional view. The openings 241 and 248 may not be concentric.

[0251] In the transistor 100, the semiconductor layer 108 has a region that overlaps with the conductive layer 104 with the insulating layer 106 interposed therebetween and with the conductive layer 103 with part of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b) interposed therebetween. In other words, the semiconductor layer 108 has a region sandwiched between the conductive layer 104 and the conductive layer 103, with the insulating layer 106 sandwiched between the region and the conductive layer 104 and part of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b) sandwiched between the region and the conductive layer 103.

[0252] The conductive layer 103 functions as a back gate electrode of the transistor 100. Part of the insulating layer 110 functions as a back gate insulating layer of the transistor 100.

[0253] In the transistor 200, the semiconductor layer 208 has a region that overlaps with the conductive layer 204 with the insulating layer 106 interposed therebetween and with the conductive layer 203 with part of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b) interposed therebetween. In other words, the semiconductor layer 208 has a region sandwiched between the conductive layer 204 and the conductive layer 203, with the insulating layer 106 sandwiched between the region and the conductive layer 204 and part of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b) sandwiched between the region and the conductive layer 203.

[0254] The conductive layer 203 functions as a back gate electrode of the transistor 200. Part of the insulating layer 110 functions as a back gate insulating layer of the transistor 200.

[0255] For the conductive layer 103 and the conductive layer 203, the same materials as those for the conductive layer 112a, the conductive layer 112b, the conductive layer 212a, the conductive layer 212b, the conductive layer 104, and the conductive layer 204 can be used.

[0256] By providing a back gate electrode in the transistor 100, the potential on the back channel side of the semiconductor layer is fixed, thereby improving the saturation characteristics in the Id-Vd characteristics of the transistor 100. Fixing the potential on the back channel side of the semiconductor layer 108 can suppress a shift in the threshold voltage. Suppressing a shift in the threshold voltage of the transistor 100 allows the transistor to have a small cutoff current.

[0257] In this specification and the like, a small change in current in the saturation region in the Id-Vd characteristics of a transistor may be expressed as "high saturation characteristics" or "having high saturation characteristics."

[0258] The insulating layer 107 can be formed using a material that can be used for the insulating layer 110. The insulating layer 107 is preferably formed using an insulating layer containing nitrogen. The insulating layer 107 can be preferably formed using a material that can be used for the insulating layer 110a and the insulating layer 110c. The insulating layer 107 can be preferably formed using silicon nitride, for example. Note that although the insulating layer 107 has a single-layer structure in this embodiment, one embodiment of the present invention is not limited thereto. The insulating layer 107 may have a stacked structure of two or more layers.

[0259] In the transistor 100 and the transistor 200, the back gate electrode can be electrically connected to the source electrode or the drain electrode. By electrically connecting the back gate electrode to the source electrode, a shift in the threshold voltage of the transistor can be suppressed. Furthermore, the reliability of the transistor can be improved.

[0260] Further, in the transistor 100 and the transistor 200, the backgate electrode can be electrically connected to the gate electrode. By electrically connecting the backgate electrode to the gate electrode, the on-state current of the transistor can be increased.

[0261] An opening is provided in a region of the insulating layer 107 that overlaps with the conductive layer 112a, and the conductive layer 103 is provided to cover the opening, so that the conductive layer 103 and the conductive layer 112a can be in contact with each other.

[0262] An opening is provided in a region of the insulating layer 110 that overlaps with the conductive layer 103, and the conductive layer 112b is provided to cover the opening, so that the conductive layer 103 and the conductive layer 112b can be in contact with each other.

[0263] Openings are provided in the insulating layers 106 and 110 in regions overlapping with the conductive layer 103, and the conductive layer 104 is provided to cover the openings, whereby the conductive layer 103 and the conductive layer 104 can be in contact with each other.

[0264] An opening is provided in a region of the insulating layer 107 that overlaps with the conductive layer 212a, and the conductive layer 203 is provided to cover the opening, so that the conductive layer 203 and the conductive layer 212a can be in contact with each other.

[0265] An opening is provided in a region of the insulating layer 110 that overlaps with the conductive layer 203, and the conductive layer 212b is provided to cover the opening, whereby the conductive layer 203 and the conductive layer 212b can be in contact with each other.

[0266] Openings are provided in the regions of the insulating layer 106 and the insulating layer 110 that overlap with the conductive layer 203, and the conductive layer 204 is provided to cover the openings, whereby the conductive layer 203 and the conductive layer 204 can be in contact with each other.

[0267] The film thickness of the conductive layer 103 is preferably 0.5 times or more, more preferably 1.0 times or more, even more preferably more than 1.0 times, and preferably 2.0 times or less, even more preferably 1.5 times or less, and even more preferably 1.2 times or less, the region in the semiconductor layer 108 that overlaps with the conductive layer 104 via the insulating layer 106 and with the conductive layer 103 via the insulating layer 110 can be made sufficiently wide. Therefore, the potential on the back channel side of the semiconductor layer 108 can be more reliably controlled.

[0268] The thickness of the conductive layer 103 may be larger than the thickness of the insulating layer 110. This allows the potential on the back channel side of the semiconductor layer 108 to be fixed over a wide range between the source region and the drain region of the semiconductor layer 108.

[0269] 4A and 4B has a region in which the conductive layer 103, the insulating layer 110, the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 overlap in this order in one direction without any other layers therebetween. One example of this direction is a direction perpendicular to the channel length L1. By widening this region, the potential on the back channel side of the semiconductor layer 108 can be more reliably controlled.

[0270] The thickness of the conductive layer 103 can be made larger than the sum of the thickness of the portion of the semiconductor layer 108 that is in contact with the conductive layer 112a inside the opening 141 and the thickness of the insulating layer 106 that is in contact with this portion.

[0271] The film thickness of the conductive layer 203 is preferably 0.5 times or more, more preferably 1.0 times or more, even more preferably more than 1.0 times, and preferably 2.0 times or less, even more preferably 1.5 times or less, and even more preferably 1.2 times or less, the region in the semiconductor layer 208 that overlaps with the conductive layer 204 via the insulating layer 106 and with the conductive layer 203 via the insulating layer 110 can be made sufficiently wide. Therefore, the potential on the back channel side of the semiconductor layer 208 can be more reliably controlled.

[0272] The thickness of the conductive layer 203 may be larger than the thickness of the insulating layer 110. This makes it possible to fix the potential on the back channel side of the semiconductor layer 208 over a wide range between the source region and the drain region in the semiconductor layer 208.

[0273] 4A and 4B has a region in which the conductive layer 203, the insulating layer 110, the semiconductor layer 208, the insulating layer 106, and the conductive layer 204 overlap in this order in one direction without any other layers therebetween. One example of this direction is a direction perpendicular to the channel length L2. By widening this region, the potential on the back channel side of the semiconductor layer 208 can be more reliably controlled.

[0274] The thickness of the conductive layer 203 can be made larger than the sum of the thickness of the portion of the semiconductor layer 208 that is in contact with the conductive layer 212a inside the opening 241 and the thickness of the insulating layer 106 that is in contact with this portion.

[0275] Here, oxygen contained in the insulating layer 110b may oxidize the conductive layer 103, resulting in an increase in resistance. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 103, it is possible to prevent the conductive layer 103 from being oxidized and the resistance from increasing. Furthermore, by providing the insulating layer 110c between the insulating layer 110b and the conductive layer 112b, it is possible to prevent the conductive layer 112b from being oxidized and the resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 increases, thereby reducing oxygen vacancies in the semiconductor layer 108.

[0276] <Structure Example 3> FIG. 14A illustrates a cross-sectional view of a structure including a transistor 200(1) and a transistor 200(2).

[0277] The transistors 200(1) and 200(2) can each refer to the previously described transistor 200, and differ from the previously described transistor 200 in that each transistor does not have a conductive layer 212b but has a conductive layer 212b_A shared by the two transistors, and in that each transistor does not have a conductive layer 204 but has a conductive layer 204_A shared by the two transistors.

[0278] In FIG. 14A, part of the conductive layer 212b_A functions as one of a source electrode and a drain electrode of the transistor 200(1), and the other part functions as one of a source electrode and a drain electrode of the transistor 200(2).

[0279] In addition, in FIG. 14A, part of the conductive layer 204_A functions as a gate electrode of the transistor 200(1), and the other part functions as a gate electrode of the transistor 200(2).

[0280] The transistors 200(1) and 200(2) share a gate electrode and have one of their source and drain electrodes electrically connected, so they can also be said to be connected in series. Figure 14C shows an example of a circuit diagram corresponding to the series-connected transistors 200(1) and 200(2). P is a wiring corresponding to the conductive layer 212a of the transistor 200(1), Q is a wiring corresponding to the conductive layer 212a of the transistor 200(2), and G is a wiring corresponding to the conductive layer 204_A.

[0281] Two transistors connected in series as shown in Fig. 14C can be regarded as one transistor 200A as shown in Fig. 14D. If the channel length of each of the two transistors is L and the channel width is W, the transistor 200A can be regarded as a transistor with a channel length of 2 × L and a channel width of W.

[0282] 14B includes a transistor 200(1) and a transistor 200(2). The transistor 200(1) and the transistor 200(2) can refer to the previously described transistor 200, and differ from the previously described transistor 200 in that the transistor 200(1) and the transistor 200(2) do not each include the conductive layer 212a but instead include a conductive layer 212a_A shared by the two transistors, and in that the transistor 200(1) and the transistor 200(2) do not each include the conductive layer 204 but instead include a conductive layer 204_A shared by the two transistors.

[0283] In Figure 14C, by defining P as a wiring corresponding to the conductive layer 212b of the transistor 200(1), Q as a wiring corresponding to the conductive layer 212b of the transistor 200(2), and G as a wiring corresponding to the conductive layer 204_A, this can also be applied to the configuration shown in Figure 14B.

[0284] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.

[0285] 15 to 17. Note that with regard to materials and formation methods of elements, descriptions of parts similar to those described in Embodiment 1 may be omitted.

[0286] Thin films (insulating films, semiconductor films, conductive films, etc.) constituting semiconductor devices can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an ALD method, etc. CVD methods include a PECVD method and a thermal CVD method. One type of thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.

[0287] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute semiconductor devices can be formed by wet film formation methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, or knife coating.

[0288] When processing a thin film constituting a semiconductor device, a photolithography method or the like can be used. Alternatively, the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like. Furthermore, an island-shaped thin film may be directly formed by a film formation method using a shielding mask such as a metal mask.

[0289] There are two typical photolithography methods: one is to form a resist mask on the thin film to be processed, process the thin film by etching or the like, and then remove the resist mask; the other is to form a photosensitive thin film, and then process the thin film into the desired shape by exposure and development.

[0290] In photolithography, the light used for exposure may be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. Other light sources that can be used include ultraviolet light, KrF laser light, ArF laser light, etc. Exposure may also be performed by immersion exposure technology. Extreme ultraviolet (EUV) light or X-rays may also be used as the light used for exposure. An electron beam may also be used instead of the light used for exposure. Extreme ultraviolet light, X-rays, or an electron beam are preferred because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

[0291] For etching the thin film, dry etching, wet etching, sandblasting, or the like can be used.

[0292] <Manufacturing Method Example 1> A manufacturing method will be described below using the semiconductor device 10 shown in FIG. 1B and the like as an example.

[0293] 15A to 17C are diagrams illustrating a method for manufacturing the semiconductor device 10. Each diagram shows a cross-sectional view taken along the dashed dotted line A1-A2.

[0294] First, the conductive layer 112a and the conductive layer 212a are formed over the substrate 102, and then the insulating film 110af to be the insulating layer 110a and the insulating film 110bf to be the insulating layer 110b are formed over the conductive layer 112a and the conductive layer 212a.

[0295] The conductive film to be the conductive layer 112a and the conductive layer 212a can be preferably formed by, for example, a sputtering method. After a resist mask is formed over the conductive film by a photolithography process, the conductive film can be processed to form the conductive layer 112a and the conductive layer 212a.

[0296] The insulating films 110af and 110bf can be formed by, for example, sputtering or PECVD. After the insulating film 110af is formed, it is preferable to form the insulating film 110bf in succession in vacuum without exposing the surface of the insulating film 110af to the atmosphere. By successively forming the insulating films 110af and 110bf, it is possible to prevent impurities from the atmosphere from adhering to the surface of the insulating film 110af. Examples of such impurities include water and organic substances.

[0297] The substrate temperature during the formation of the insulating films 110af and 110bf is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, further preferably 350° C. or higher and 400° C. or lower. By setting the substrate temperature during the formation of the insulating films 110af and 110bf within the above-described range, it is possible to reduce the release of impurities (e.g., water and hydrogen) from the insulating films themselves and to suppress the diffusion of impurities into the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.

[0298] After the insulating film 110bf is formed, oxygen may be supplied to the insulating film 110bf. Examples of a method for supplying oxygen include ion implantation, ion doping, plasma immersion ion implantation, and plasma treatment. For the plasma treatment, an apparatus that converts oxygen gas into plasma using high-frequency power can be suitably used. Examples of apparatus that convert gas into plasma using high-frequency power include a PECVD apparatus, a plasma etching apparatus, and a plasma ashing apparatus. The plasma treatment is preferably performed in an atmosphere containing oxygen. For example, oxygen, nitrous oxide (N ２ O), nitrogen dioxide (NO ２ It is preferable to perform the plasma treatment in an atmosphere containing one or more of carbon monoxide, carbon dioxide, and / or arsenic.

[0299] Note that the plasma treatment may be performed continuously in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere. For example, when a PECVD apparatus is used to form the insulating film 110bf, it is preferable to perform the plasma treatment in the PECVD apparatus. This can improve productivity.

[0300] A metal oxide layer may be formed after the insulating film 110bf is formed. By forming the metal oxide layer, oxygen can be supplied to the insulating film 110bf.

[0301] The conductivity of the metal oxide layer is not important. At least one of an insulating film, a semiconductor film, and a conductive film can be used as the metal oxide layer. For example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or silicon-containing indium tin oxide (ITSO) can be used as the metal oxide layer.

[0302] The metal oxide layer is preferably formed using an oxide material containing one or more of the same elements as those of the semiconductor layer 108 and the semiconductor layer 208. In particular, it is preferable to use an oxide semiconductor material that can be used for the semiconductor layer 108 and the semiconductor layer 208.

[0303] When forming a metal oxide layer, the amount of oxygen supplied to the insulating film 110af can be increased by increasing the ratio of the oxygen flow rate to the total flow rate of the film formation gas introduced into the treatment chamber of the film formation apparatus (oxygen flow rate ratio) or the oxygen partial pressure in the treatment chamber. The oxygen flow rate ratio or oxygen partial pressure is, for example, 50% to 100%, preferably 65% ​​to 100%, more preferably 80% to 100%, and even more preferably 90% to 100%. In particular, it is preferable to set the oxygen flow rate ratio to 100% and the oxygen partial pressure as close to 100% as possible.

[0304] In this way, by forming the metal oxide layer by a sputtering method in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf during the formation of the metal oxide layer, and oxygen desorption from the insulating film 110bf can be prevented. As a result, a large amount of oxygen can be confined in the insulating film 110bf. Then, a large amount of oxygen can be supplied to the semiconductor layer 108 by a subsequent heat treatment. As a result, oxygen vacancies and V in the semiconductor layer 108 can be reduced. Ｏ H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0305] Heat treatment may be performed after the metal oxide layer is formed. By performing heat treatment after the metal oxide layer is formed, oxygen can be effectively supplied from the metal oxide layer to the insulating film 110bf.

[0306] The temperature of the heat treatment is preferably 150° C. or higher and lower than the strain point of the substrate, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, and further preferably 350° C. or higher and 400° C. or lower. The heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, or oxygen. As the nitrogen-containing atmosphere or the oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) may be used. Note that the content of hydrogen, water, and the like in the atmosphere is preferably as low as possible. As the atmosphere, it is preferable to use a high-purity gas with a dew point of −60° C. or lower, preferably −100° C. or lower. Using an atmosphere with as low a content of hydrogen, water, and the like as possible can prevent hydrogen, water, and the like from being taken into the insulating film 110bf as much as possible. The heat treatment can be performed using an oven, a rapid thermal annealing (RTA) device, etc. By using an RTA device, the heat treatment time can be shortened.

[0307] After the metal oxide layer is formed or after the heat treatment, oxygen may be supplied to the insulating film 110bf through the metal oxide layer. For example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment can be used as a method for supplying oxygen. The above description of the plasma treatment can be referred to, and therefore, detailed description thereof will be omitted.

[0308] The metal oxide layer is removed after its formation, after the heat treatment described above, or after the supply of oxygen described above. There is no particular limitation on the method for removing the metal oxide layer, but wet etching is preferably used. By using wet etching, etching of the insulating film 110bf can be suppressed during removal of the metal oxide layer. This can suppress the thickness of the insulating film 110bf from becoming thin, and can make the thickness of the insulating layer 110b uniform.

[0309] The process of supplying oxygen to the insulating film 110bf is not limited to the above-described method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, or the like may be supplied to the insulating film 110bf by ion doping, ion implantation, plasma treatment, or the like. Alternatively, a film that suppresses oxygen desorption may be formed on the insulating film 110bf, and then oxygen may be supplied to the insulating film 110bf through the film. The film is preferably removed after supplying oxygen. The film that suppresses oxygen desorption may be a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten.

[0310] Subsequently, an insulating film 110cf that will become the insulating layer 110c is formed on the insulating film 110bf.

[0311] The insulating film 110cf can be preferably formed by, for example, sputtering or PECVD.

[0312] Next, a conductive film to be the conductive layer 112b and the conductive layer 212b is formed over the insulating film 110cf. The conductive film can be formed by, for example, a sputtering method.

[0313] Next, the conductive film is processed to form a conductive layer 112b_e and a conductive layer 212b_e ( FIG. 15A ). The conductive layer 112b_e will later become the conductive layer 112b, and the conductive layer 212b_e will later become the conductive layer 212b. For example, wet etching can be suitably used to form the conductive layer 112b_e and the conductive layer 212b_e. Alternatively, dry etching can be used.

[0314] Subsequently, a resist mask 190A is formed over the conductive layer 112b_e, the conductive layer 212b_e, and the insulating film 110cf (FIG. 15A).

[0315] Next, part of the conductive layer 112b_e is removed using the resist mask 190A to form the conductive layer 112b having the opening 143. The conductive layer 112b can be preferably formed by a wet etching method. Alternatively, a dry etching method may be used.

[0316] Next, portions of the insulating films 110cf, 110bf, and 110af are removed to provide openings 141 ( FIG. 15B ). The insulating films 110cf, 110bf, and 110af after the openings 141 are provided are shown as insulating layers 110cg, 110bg, and 110ag, respectively. The openings 141 are provided in regions overlapping with the openings 143. The formation of the openings 141 exposes the conductive layer 112a. The insulating layers 110cg, 110bg, and 110ag can be preferably formed by dry etching.

[0317] The opening 141 can be formed using, for example, a resist mask 190A. Alternatively, the opening 141 may be formed using a resist mask different from the resist mask 190A.

[0318] The resist mask 190A can be removed, for example, after the opening 141 is formed. Alternatively, the resist mask 190A may be removed after the opening 143 is formed and before the insulating layer 110cg is formed, before the insulating layer 110bg is formed, or before the insulating layer 110ag is formed.

[0319] Note that when or after forming the opening 141, part of the conductive layer 112a may be removed from a region overlapping with the opening 141. When the thickness of the conductive layer 112a in a region in contact with the underside of the semiconductor layer 108 is thinner than the thickness of the conductive layer 112a in a region not in contact with the semiconductor layer 108, the electric field of the gate electrode applied to the channel formation region near the conductive layer 112a can be strengthened, and the on-state current of the transistor can be increased.

[0320] Subsequently, a resist mask 190B is formed over the conductive layer 112b, the conductive layer 212b_e, and the insulating layer 110cg (FIG. 15C).

[0321] Next, a portion of the conductive layer 212b_e is removed using the resist mask 190B to provide an opening in the conductive layer 212b_e. The opening can be preferably formed by wet etching. Alternatively, the opening can be formed by dry etching. Here, the opening provided in the conductive layer 212b_e is, for example, an opening smaller than the opening 243, and the edge of the opening can be recessed to form the opening 243 in the process of forming the insulating layer 110, which will be described later.

[0322] Next, the insulating layer 110 is formed by removing portions of the insulating layer 110cg, the insulating layer 110bg, and the insulating layer 110ag, and the insulating layer 110 has an opening 241 ( FIG. 15D ). The opening 241 is provided in a region overlapping the opening provided in the conductive layer 212b_e. The formation of the opening 241 exposes the conductive layer 212a. The insulating layer 110 can be formed preferably by dry etching.

[0323] The opening 241 can be formed using, for example, the resist mask 190B. Alternatively, the opening 241 may be formed using a resist mask different from the resist mask 190B.

[0324] The resist mask 190B can be removed, for example, after the opening 241 is formed. Alternatively, the resist mask 190B may be removed after the opening 243 is formed and before the insulating layer 110c is formed, before the insulating layer 110b is formed, or before the insulating layer 110a is formed.

[0325] When forming the insulating layer 110, it is preferable to process the insulating layer 110 so that the side surface of the opening 241 has a tapered shape. It is also preferable to process the insulating layer 110 so that the angle between the side surface of the opening 241 and the surface where the insulating layer 110 is to be formed is small. When a resist mask is used to form the opening 241, the angle between the side surface of the insulating layer 110 and the surface where the insulating layer 110 is to be formed can be small by processing the insulating layer 110 under conditions that make it easy for the resist mask to recede (shrink).

[0326] In forming the insulating layer 110, when the resist mask is recessed, etching can be performed so that the opening provided in the conductive layer 212b_e also recesses. Here, if the conductive layer 212b_e does not recess or recesses only a small amount, for example, as shown in FIG. 8B , the end of the conductive layer 212b in the opening 243 may be located outside the end of the insulating layer 110 in the opening 241. On the other hand, if the conductive layer 212b_e recesses a large amount, for example, as shown in FIG. 8A , the end of the conductive layer 212b in the opening 243 may be located inside the end of the insulating layer 110 in the opening 241.

[0327] Note that the method for forming the conductive layer 212b is not limited to the method of recessing the end of the opening provided in the conductive layer 212b_e when the insulating layer 110 is formed. For example, the conductive layer 212b having the opening 243 may be provided in advance before the insulating layer 110 is formed. Alternatively, the opening provided in the conductive layer 212b_e may be recessed after the insulating layer 110 is formed.

[0328] 15C to 15D, the conductive layer 212b and the insulating layer 110 may be formed using the steps shown in Figures 16A to 16D below. In the steps shown in Figures 15C to 15D, an example has been described in which an opening is made in the conductive layer 212b in accordance with the retraction of the resist mask 190B when the insulating layer 110 is formed. However, in the steps shown in Figures 16A to 16D, an example is shown in which an opening of a desired size is made in the conductive layer 212b in advance, and then the insulating layer 110 is formed.

[0329] First, a resist mask 190C is formed over the conductive layer 112b, the conductive layer 212b_e, and the insulating layer 110cg (FIG. 16A).

[0330] Next, a part of the conductive layer 212b_e is removed using a resist mask 190C to form a conductive layer 212b having an opening 243 (FIG. 16B).

[0331] Next, a resist mask 190D is formed over the conductive layer 112b, the conductive layer 212b, and the insulating layer 110cg (FIG. 16C). Here, an edge of the opening of the resist mask 190D is provided inside an edge of the opening 243 of the conductive layer 212b.

[0332] Next, using the resist mask 190D, portions of the insulating layer 110cg, the insulating layer 110bg, and the insulating layer 110ag are removed to form the insulating layer 110 having the opening 241 ( FIG. 16D ). In forming the insulating layer 110, it is preferable to process the resist mask 190D so that it is recessed. Note that the edge of the opening of the resist mask 190D is located inside the edge of the opening 243 of the conductive layer 212b. Therefore, if the amount of recession of the resist mask 190D is small enough so that the top surface and side surface of the conductive layer 212b are not exposed, the top surface and side surface of the conductive layer 212b can remain covered by the resist mask 190D.

[0333] Note that, during the formation of insulating layer 110, the side surfaces of conductive layer 212b may be exposed during the process of receding resist mask 190D. In such a case, the ends of opening 243 in conductive layer 212b may be receded, and the opening may become larger. That is, the size of the opening in conductive layer 212b in FIG. 16D may be larger than the size of the opening in conductive layer 212b in FIG. 16B.

[0334] When the etching conditions for forming the insulating layer 110 are such that the conductive layer 212b is unlikely to recede, the display device of one embodiment of the present invention can be suitably manufactured by using the manufacturing method illustrated in FIGS. 16A to 16D .

[0335] As an example, Figure 16D shows a configuration in which the edge of the lower surface of conductive layer 212b in opening 243 is located more inward than the edge of the upper surface of insulating layer 110 in opening 241. However, by adjusting the pattern of resist mask 190C, the pattern of resist mask 190D, the etching conditions for conductive layer 212b_e, and the etching conditions for insulating layers 110cg, 110bg, and 110ag, it is possible to preferably fabricate a configuration in which the edge of the lower surface of conductive layer 212b in opening 243 is located more outward than the edge of the upper surface of insulating layer 110 in opening 241, or a configuration in which the edge of the lower surface of conductive layer 212b in opening 243 and the edge of the upper surface of insulating layer 110 in opening 241 roughly coincide with each other.

[0336] As described above, the conductive layer 212b having the opening 243 and the insulating layer 110 having the opening 241 can be formed using the method shown in FIGS. 15C to 15D or FIGS. 16A to 16D.

[0337] Next, a metal oxide film 108f to be the semiconductor layer 108 and the semiconductor layer 208 is formed so as to cover the openings 141, 143, 241, and 243 ( FIG. 17A ). The metal oxide film 108f is provided in contact with the top and side surfaces of the conductive layer 112b, the top and side surfaces of the conductive layer 212b, the top and side surfaces of the insulating layer 110, the top surface of the conductive layer 112a, and the top surface of the conductive layer 212a.

[0338] Subsequently, a part of the metal oxide film 108f is removed using a resist mask or the like to form the semiconductor layer 108 and the semiconductor layer 208. The semiconductor layer 108 and the semiconductor layer 208 can be preferably formed by wet etching.

[0339] The metal oxide film 108f is preferably formed by a sputtering method using a metal oxide target, or by an ALD method.

[0340] The metal oxide film 108f is preferably a dense film with as few defects as possible. Furthermore, the metal oxide film 108f is preferably a high-purity film in which impurities including hydrogen are reduced as much as possible. In particular, it is preferable to use a crystalline metal oxide film as the metal oxide film 108f.

[0341] When the metal oxide film 108f is formed, oxygen gas is preferably used. By using oxygen gas when the metal oxide film 108f is formed, oxygen can be suitably supplied into the insulating layer 110. For example, when an oxide is used for the insulating layer 110b, oxygen can be suitably supplied into the insulating layer 110b.

[0342] By supplying oxygen to the insulating layer 110b, oxygen is supplied to the semiconductor layer 108 and the semiconductor layer 208 in a later process, and oxygen vacancies and V in the semiconductor layer 108 and the semiconductor layer 208 are eliminated. Ｏ H can be reduced.

[0343] When forming the metal oxide film 108f, oxygen gas may be mixed with an inert gas (e.g., helium gas, argon gas, xenon gas, etc.). Note that the higher the ratio of oxygen gas (oxygen flow ratio) to the total deposition gas when forming the metal oxide film, the higher the crystallinity of the metal oxide film, resulting in a highly reliable transistor. On the other hand, the lower the oxygen flow ratio, the lower the crystallinity of the metal oxide film, resulting in a transistor with a large on-state current. For example, by varying the oxygen flow ratio, a stacked structure of two or more metal oxide layers with different crystallinity can be formed.

[0344] The higher the substrate temperature during formation of the metal oxide film, the higher the crystallinity and density of the resulting metal oxide film, whereas the lower the substrate temperature, the lower the crystallinity and electrical conductivity of the resulting metal oxide film.

[0345] The substrate temperature during the formation of the metal oxide film 108f is preferably from room temperature to 250° C., more preferably from room temperature to 200° C., and even more preferably from room temperature to 140° C. For example, a substrate temperature of from room temperature to 140° C. is preferable because productivity is increased. Furthermore, by forming the metal oxide film at room temperature or without heating the substrate, the crystallinity can be reduced.

[0346] When the ALD method is used to form the metal oxide film 108f, it is preferable to use a film formation method such as a thermal ALD method or a PEALD (Plasma Enhanced ALD) method. The thermal ALD method is preferable because it exhibits extremely high step coverage. The PEALD method is preferable because it not only exhibits high step coverage but also allows low-temperature film formation.

[0347] The metal oxide film can be formed by, for example, the ALD method using a precursor containing the constituent metal element and an oxidizing agent.

[0348] For example, when forming an In—Ga—Zn oxide, three precursors, i.e., a precursor containing indium, a precursor containing gallium, and a precursor containing zinc, can be used, or two precursors, i.e., a precursor containing indium and a precursor containing gallium and zinc, can be used.

[0349] Examples of precursors containing indium include triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.

[0350] Gallium-containing precursors include, for example, trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamido)gallium, gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, diethylchlorogallium, and gallium(III) chloride.

[0351] Examples of zinc-containing precursors include dimethylzinc, diethylzinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), and zinc chloride.

[0352] Oxidizing agents include, for example, ozone, oxygen, and water.

[0353] Methods for controlling the composition of the resulting film include adjusting one or more of the type of source gas, the flow rate ratio of the source gas, the flow time of the source gas, and the order in which the source gas is flowed. By adjusting these, it is possible to form a film whose composition changes continuously. It is also possible to continuously form films with different compositions.

[0354] In addition, when the metal oxide film 108f has a stacked structure, it is preferable to deposit a next metal oxide film after depositing a previous metal oxide film without exposing the surface of the previous metal oxide film to the air.

[0355] Before forming the metal oxide film 108f, it is preferable to perform at least one of a treatment for removing water, hydrogen, organic substances, and the like adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen into the insulating layer 110. For example, heat treatment can be performed at a temperature of 70° C. or higher and 200° C. or lower in a reduced pressure atmosphere. Alternatively, plasma treatment in an atmosphere containing oxygen may be performed. Alternatively, dinitrogen monoxide (N ２ Oxygen may be supplied to the insulating layer 110 by plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (NO). When plasma treatment containing nitrous oxide gas is performed, oxygen can be supplied while organic substances on the surface of the insulating layer 110 are suitably removed. After such treatment, it is preferable to form the metal oxide film 108f continuously without exposing the surface of the insulating layer 110 to the air.

[0356] Heat treatment is preferably performed after the metal oxide film 108f is formed or after the metal oxide film 108f is processed into the semiconductor layer 108 and the semiconductor layer 208. The heat treatment can remove hydrogen or water contained in or adsorbed to the surfaces of the metal oxide film 108f, or the semiconductor layer 108 and the semiconductor layer 208. Furthermore, the heat treatment may improve the film quality of the metal oxide film 108f, or the semiconductor layer 108 and the semiconductor layer 208 (for example, reduce defects or improve crystallinity).

[0357] By the heat treatment, oxygen can also be supplied from the insulating layer 110b to the metal oxide film 108f or the semiconductor layer 108 and the semiconductor layer 208. In this case, it is more preferable to perform the heat treatment after the metal oxide film 108f is formed and before processing into the semiconductor layer 108 and the semiconductor layer 208. The above description can be referred to for the heat treatment.

[0358] Note that this heat treatment does not necessarily have to be performed. Alternatively, the heat treatment may not be performed here, and may be combined with a heat treatment performed in a later step. Furthermore, a high-temperature treatment in a later step (e.g., a film formation step) may also serve as the heat treatment.

[0359] Subsequently, the insulating layer 106 is formed to cover the semiconductor layer 108, the semiconductor layer 208, the conductive layer 112b, the conductive layer 212b, and the insulating layer 110 (FIG. 17B). The insulating layer 106 can be formed by, for example, a PECVD method or an ALD method.

[0360] When an oxide semiconductor is used for the semiconductor layer 108 and the semiconductor layer 208, the insulating layer 106 preferably functions as a barrier film that suppresses oxygen diffusion. The insulating layer 106 has a function of suppressing oxygen diffusion, which suppresses oxygen from diffusing from above the insulating layer 106 to the conductive layer 104 and the conductive layer 204, thereby suppressing oxidation of the conductive layer 104 and the conductive layer 204. As a result, a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0361] In this specification and the like, a barrier film refers to a film having barrier properties. For example, an insulating layer having barrier properties can be referred to as a barrier insulating layer. In this specification and the like, the barrier properties refer to one or both of a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability) and a function of capturing or fixing a corresponding substance (also referred to as gettering).

[0362] By increasing the temperature during the formation of the insulating layer 106 that functions as a gate insulating layer, an insulating layer with few defects can be obtained. However, if the temperature during the formation of the insulating layer 106 is high, oxygen is released from the semiconductor layer 108 and the semiconductor layer 208, causing oxygen vacancies and V in the semiconductor layer 108 and the semiconductor layer 208. Ｏ H may increase. The substrate temperature during the formation of the insulating layer 106 is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, and further preferably 300° C. or higher and 400° C. or lower. By setting the substrate temperature during the formation of the insulating layer 106 within the above range, defects in the insulating layer 106 can be reduced and oxygen can be prevented from being released from the semiconductor layer 108 and the semiconductor layer 208. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.

[0363] Before forming the insulating layer 106, plasma treatment may be performed on the side surfaces and surfaces of the semiconductor layer 108 and the semiconductor layer 208. The plasma treatment can reduce impurities such as water adsorbed to the side surfaces and surfaces of the semiconductor layer 108 and the semiconductor layer 208. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 and the interface between the semiconductor layer 208 and the insulating layer 106 can be reduced, thereby realizing a highly reliable transistor. The plasma treatment can be performed in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like, for example. The plasma treatment and the formation of the insulating layer 106 are preferably performed successively without exposure to air.

[0364] Subsequently, a conductive film to be the conductive layer 104 and the conductive layer 204 is formed over the insulating layer 106 and processed to form the conductive layer 104 and the conductive layer 204 .

[0365] Subsequently, an insulating layer 195 is formed to cover the conductive layer 104, the conductive layer 204, and the insulating layer 106 (FIG. 17C). The insulating layer 195 can be preferably formed by PECVD.

[0366] Through the above steps, the semiconductor device 10 can be manufactured.

[0367] This embodiment mode can be combined with other embodiment modes as appropriate.

[0368] Embodiment 3 In this embodiment, a display device in which a semiconductor device of one embodiment of the present invention can be used will be described with reference to FIGS.

[0369] The display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of this embodiment can be used in electronic devices having relatively large screens, such as television devices, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproducing devices.

[0370] The display device of the present embodiment can be a high-definition display device, and can therefore be used, for example, as a display unit for a wristwatch-type or bracelet-type information terminal (wearable device), as well as a display unit for a wearable device that can be worn on the head, such as a head-mounted display (HMD) for VR, or a glasses-type AR device.

[0371] The semiconductor device of one embodiment of the present invention can be used for a display device or a module including the display device. Examples of the module including the display device include a module in which a connector such as a flexible printed circuit (hereinafter referred to as FPC) or a tape carrier package (TCP) is attached to the display device, and a module in which an integrated circuit (IC) is mounted by a chip-on-glass (COG) method, a chip-on-film (COF) method, or the like.

[0372] FIG. 18A shows a perspective view of a display device 50A.

[0373] The display device 50A has a configuration in which a substrate 152 and a substrate 151 are bonded together. In Fig. 18A, the substrate 152 is indicated by a dashed line.

[0374] The display device 50A includes a display unit 162, a connection unit 140, a peripheral circuit unit 164, wiring 165, etc. Fig. 18A shows an example in which an FPC 172 is mounted on the display device 50A.

[0375] The connection portion 140 is provided on the outside of the display portion 162. The connection portion 140 can be provided along one side or multiple sides of the display portion 162. The number of connection portions 140 may be single or multiple. FIG. 18A shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion. The connection portion 140 electrically connects the common electrode of the display element and the conductive layer, and can supply a potential to the common electrode.

[0376] The peripheral circuit portion 164 includes, for example, a scanning line driver circuit (also referred to as a gate driver), and may include both a scanning line driver circuit and a signal line driver circuit (also referred to as a source driver).

[0377] The wiring 165 has a function of supplying signals and power to the display portion 162 and the peripheral circuit portion 164. The signals and power are input to the wiring 165 from the outside via the FPC 172.

[0378] As shown in FIG. 19, in addition to the FPC 172, an IC 173 may be mounted on the display device 50A.

[0379] 19, signals and power supplied to the display unit 162 and the peripheral circuit unit 164 are input to the wiring 165 via the IC 173. The configuration shown in Figures 18A and 18B can also be said to be a display module having a display device, an FPC, etc.

[0380] 18A shows an example in which an IC 173 is provided on a substrate 151 by a COG method, a COF method, or the like. For example, an IC having one or both of a scanning line driver circuit and a signal line driver circuit can be used as the IC 173. Note that the IC may also be mounted on an FPC by a COF method or the like.

[0381] The semiconductor device of one embodiment of the present invention can be applied to, for example, one or both of the display portion 162 and the peripheral circuit portion 164 of the display device 50A.

[0382] The display section 162 is an area in the display device 50A that displays an image, and has a plurality of periodically arranged pixels 210. Fig. 18A shows an enlarged view of one pixel 210.

[0383] The pixel arrangement in the display device of this embodiment is not particularly limited, and various methods can be applied, such as a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a pentile arrangement.

[0384] 18A includes a pixel 230R that emits red light, a pixel 230G that emits green light, and a pixel 230B that emits blue light. Each of the pixels 230R, 230G, and 230B functions as a sub-pixel.

[0385] Each of the pixel 230R, the pixel 230G, and the pixel 230B includes a display element and a circuit that controls the driving of the display element.

[0386] Various elements can be used as the display element, including, for example, a liquid crystal element and a light-emitting element. Other examples include shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) elements, display elements that employ a microcapsule method, an electrophoresis method, an electrowetting method, or an electronic liquid powder (registered trademark) method, etc. Furthermore, a QLED (Quantum-dot LED) that uses a light source and color conversion technology using quantum dot materials may also be used.

[0387] Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.

[0388] Examples of the light-emitting element include self-luminous light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), semiconductor lasers, etc. Examples of the LED that can be used include mini LEDs and micro LEDs.

[0389] Examples of light-emitting substances that the light-emitting element has include fluorescent substances (fluorescent materials), phosphorescent substances (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0390] The light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, white, etc. Furthermore, the color purity can be improved by providing the light-emitting element with a microcavity structure.

[0391] One of a pair of electrodes included in the light-emitting element functions as an anode, and the other electrode functions as a cathode.

[0392] In this embodiment, a case where a light-emitting element is used as a display element will be mainly described as an example.

[0393] The display device of one embodiment of the present invention can include various logic circuits, such as combinational circuits such as an OR circuit, an AND circuit, a NAND circuit, and a NOR circuit, sequential circuits such as a flip-flop circuit, a latch circuit, a counter circuit, a register circuit, and a shift register circuit, and a buffer circuit.

[0394] FIG. 18B is a block diagram illustrating a display device 50A. The display device 50A includes a display unit 162 and a peripheral circuit unit 164. The display unit 162 includes a plurality of periodically arranged pixels 230 (pixels 230[1,1] to 230[m,n], where m and n are each independently an integer of 2 or greater). In FIG. 18B, the pixel 230 in the first row and nth column is indicated as pixel 230[1,n], the pixel 230 in the mth row and first column is indicated as pixel 230[m,1], and the pixel 230 in the mth row and nth column is indicated as pixel 230[m,n]. The peripheral circuit unit includes a first driver circuit unit 231 and a second driver circuit unit 232.

[0395] The circuit included in the first drive circuit unit 231 functions as, for example, a scanning line drive circuit. The circuit included in the second drive circuit unit 232 functions as, for example, a signal line drive circuit. Note that some kind of circuit may be provided at a position facing the first drive circuit unit 231 across the display unit 162. Some kind of circuit may be provided at a position facing the second drive circuit unit 232 across the display unit 162.

[0396] The peripheral circuit portion 164 can include various circuits such as a shift register circuit, a level shifter circuit, an inverter circuit, a latch circuit, an analog switch circuit, and a demultiplexer circuit. A transistor, a capacitor, or the like can be used in the peripheral circuit portion 164. The transistor of one embodiment of the present invention can be used in the peripheral circuit portion 164 and the pixel 230.

[0397] The scanning line driver circuit may have at least a shift register, for example, and the signal line driver circuit may be configured using a shift register, a digital-to-analog converter circuit, a latch circuit, and the like.

[0398] The display device 50A has wirings 236 that are arranged substantially parallel to each other and whose potential is controlled by a circuit included in a first drive circuit unit 231, and wirings 238 that are arranged substantially parallel to each other and whose potential is controlled by a circuit included in a second drive circuit unit 232. Note that Fig. 18B shows an example in which wirings 236 and 238 are connected to pixel 230. However, wirings 236 and 238 are just an example, and wirings connected to pixel 230 are not limited to wirings 236 and 238.

[0399] <Configuration Example of Peripheral Driving Circuit> Hereinafter, a configuration example of a circuit that can be used for the peripheral driving circuit will be described.

[0400] 20A is a circuit diagram showing an example of the configuration of a latch circuit LAT. The latch circuit LAT shown in FIG. 20A includes transistors Tr31, Tr33, Tr35, Tr36, a capacitor C31, and an inverter circuit INV. In FIG. 20A, a node N is defined as a node electrically connecting one of the source or drain of transistor Tr33, the gate of transistor Tr35, and one electrode of capacitor C31.

[0401] In the latch circuit LAT shown in FIG. 20A , when a high-potential signal is input to the terminal SMP, the transistor Tr33 is turned on. As a result, the potential of the node N becomes a potential corresponding to the potential of the terminal ROUT, and data corresponding to the signal input from the terminal ROUT to the latch circuit LAT is written to the latch circuit LAT. After the data is written to the latch circuit LAT, if the potential of the terminal SMP is set to a low potential, the transistor Tr33 is turned off. As a result, the potential of the node N is maintained, and the data written to the latch circuit LAT is maintained. Specifically, for example, when the potential of the node N is low, it can be assumed that data with a value of "0" is maintained in the latch circuit LAT, and when the potential of the node N is high, it can be assumed that data with a value of "1" is maintained in the latch circuit LAT.

[0402] The transistor Tr33 is preferably a transistor with low off-state current. An OS transistor can be preferably used as the transistor Tr33. This allows the latch circuit LAT to retain data for a long period of time. Therefore, the frequency of rewriting data to the latch circuit LAT can be reduced.

[0403] In this specification and the like, writing data into the latch circuit LAT such that a signal input from the terminal SP2 is output to the terminal LLIN may be simply referred to as "writing data into the latch circuit LAT." In other words, writing data with a value of "1" into the latch circuit LAT may be simply referred to as "writing data into the latch circuit LAT."

[0404] The semiconductor device according to one embodiment of the present invention can be suitably used in the latch circuit LAT. For example, the transistor 100 or the transistor 200 illustrated in FIG. 1B and the like can be used as the transistors Tr31, Tr33, Tr35, and Tr36.

[0405] 20B shows an example of the configuration of the inverter circuit INV. The inverter circuit INV includes a transistor Tr41, a transistor Tr43, a transistor Tr45, a transistor Tr47, and a capacitor C41.

[0406] 20A and the inverter circuit INV is configured as shown in FIG. 20B, all the transistors included in the latch circuit LAT can be transistors of the same polarity, for example, n-channel transistors. As a result, for example, the transistors Tr31, Tr35, Tr36, Tr41, Tr43, Tr45, and Tr47, in addition to the transistor Tr33, can be OS transistors. Therefore, all the transistors included in the latch circuit LAT can be manufactured using the same process.

[0407] The semiconductor device according to one embodiment of the present invention can be suitably used for the inverter circuit INV. For example, the transistor 100 or the transistor 200 illustrated in FIG. 1B and the like can be used for one or more of the transistors Tr41, Tr43, Tr45, and Tr47.

[0408] 21 shows a configuration example of a sequential circuit 20. The sequential circuit 20 includes a circuit 11 and a circuit 12. The circuit 11 and the circuit 12 are electrically connected to each other through wirings 15a and 15b. By connecting multiple stages of the configuration shown in FIG. 21, a circuit such as a shift register can be configured in some cases.

[0409] The circuit 12 has a function of outputting a first signal to the wiring 15a and a second signal to the wiring 15b in accordance with the potentials of the signal LIN and the signal RIN. Here, the second signal is an inverted version of the first signal. That is, if the first signal and the second signal each have two types of potential, high and low, when the circuit 12 outputs a high potential to the wiring 15a, it outputs a low potential to the wiring 15b, and when the circuit 12 outputs a low potential to the wiring 15a, it outputs a high potential to the wiring 15b.

[0410] The circuit 11 includes a transistor 21, a transistor 22, and a capacitor C1. The transistor 21 and the transistor 22 are n-channel transistors. For the transistor 21 and the transistor 22, a metal oxide (hereinafter also referred to as an oxide semiconductor) exhibiting semiconductor characteristics can be suitably used as a semiconductor in which a channel is formed. Note that the transistor 21 and the transistor 22 are not limited to an oxide semiconductor, and a semiconductor such as silicon (single crystal silicon, polycrystalline silicon, or amorphous silicon), germanium, or a compound semiconductor may also be used.

[0411] The transistors of one embodiment of the present invention can be preferably used as the transistor 21 and the transistor 22. For example, the transistor 100 or the transistor 200 shown in FIG. 1B or the like can be preferably used as the transistor 21. The transistor 21 preferably has a back gate. Therefore, for example, the transistor 100 or the transistor 200 shown in FIG. 4B or the like can be preferably used as the transistor 21.

[0412] The transistor 21 has a pair of gates (hereinafter referred to as a first gate and a second gate). The first gate of the transistor 21 is electrically connected to the wiring 15b, the second gate is electrically connected to one of its source and drain and a wiring to which a potential VSS (also referred to as a first potential) is applied, and the other of the source and drain is electrically connected to one of the source and drain of the transistor 22. The gate of the transistor 22 is electrically connected to the wiring 15a, and the other of the source and drain is electrically connected to a wiring to which a signal CLK is applied. The capacitor C1 has a pair of electrodes, one of which is electrically connected to one of the source and drain of the transistor 22 and the other of the source and drain of the transistor 21, and the other of which is electrically connected to the gate of the transistor 22 and the wiring 15a. The other of the source and drain of the transistor 21, the one of the source and drain of the transistor 22, and one electrode of the capacitor C1 are electrically connected to the output terminal OUT. The output terminal OUT is a portion to which an output potential from the circuit 11 is applied, and may be a part of a wiring or a part of an electrode.

[0413] A second potential and a third potential are alternately applied as a signal CLK to the other of the source and drain of the transistor 22. The second potential can be higher than the potential VSS (for example, the potential VDD). The third potential can be lower than the second potential. The potential VSS can preferably be used as the third potential. Note that instead of the signal CLK, the potential VDD may be applied to the other of the source and drain of the transistor 22.

[0414] When a high potential is applied to the wiring 15a and a low potential is applied to the wiring 15b, the transistor 22 is turned on and the transistor 21 is turned off. At this time, the output terminal OUT and the wiring to which the signal CLK is applied are brought into electrical continuity.

[0415] In the circuit 11, the output terminal OUT and the gate of the transistor 22 are electrically connected through the capacitor C1. Therefore, due to the bootstrap effect, the potential of the output terminal OUT increases, and the potential of the gate of the transistor 22 increases accordingly. Here, without the capacitor C1, if the same potential (potential VDD) is used for the second potential of the signal CLK and the high potential applied to the wiring 15a, the potential of the output terminal OUT decreases from the potential VDD by the threshold voltage of the transistor 22. However, with the capacitor C1, the potential of the gate of the transistor 22 increases to nearly twice the potential VDD (specifically, a potential nearly twice the difference between the potential VDD and the potential VSS, or a potential nearly twice the difference between the potential VDD and the third potential). Therefore, the potential VDD can be output to the output terminal OUT without being affected by the threshold voltage of the transistor 22. This allows the sequential circuit 20 to have high output performance without increasing the number of power supply potentials.

[0416] On the other hand, when a low potential is applied to the wiring 15a and a high potential is applied to the wiring 15b, the transistor 22 is turned off and the transistor 21 is turned on. At this time, the output terminal OUT and the wiring to which the potential VSS is applied are turned on, and the potential VSS is output to the output terminal OUT.

[0417] Here, the sequential circuit 20 can be used as a driver circuit of a display device. In particular, it can be suitably used as a scan line driver circuit. In this case, when scan lines connected to a plurality of pixels of a display device are connected to the output terminal OUT, the duty ratio of the output signal output from the sequential circuit 20 to the output terminal OUT is significantly smaller than that of the signal CLK. In this case, the transistor 21 is in a conductive state for a significantly longer period than in a non-conductive state. That is, the period during which a high potential is applied to the first gate of the transistor 21 is significantly longer than the period during which a low potential is applied. By using a transistor of one embodiment of the present invention as the transistor 21, deterioration of the transistor characteristics in a state in which a high potential is applied to the first gate can be suppressed.

[0418] Furthermore, by using the transistor of one embodiment of the present invention as the transistor 21, the threshold voltage can be suitably prevented from becoming negative, and the transistor 21 can easily have normally-off characteristics. If the transistor 21 has normally-on characteristics, when the voltage between the other gate and the source of the transistor 21 is 0 V, leakage current occurs between the source and the drain, making it difficult to maintain the potential of the output terminal OUT. Therefore, in order to turn off the transistor 21, a potential lower than the potential VSS needs to be applied to the other gate of the transistor 21, and therefore, multiple power supplies are required. By using the transistor of one embodiment of the present invention as the transistor 21, the sequential circuit 20 with high output performance can be realized without increasing the number of power supply potentials.

[0419] Furthermore, by using the transistor of one embodiment of the present invention as the transistor 21, the saturation characteristics of the transistor 21 can be improved. This makes it easier to design the circuit 11, and the circuit 11 can operate stably.

[0420] By using the transistor 100, the occupied area can be reduced, and a display device with a narrow frame can be obtained. The transistor 100 can be suitably used as a transistor that requires a large on-state current. The transistor 200 can be suitably used as a transistor that requires high saturation characteristics. This allows a display device with high performance.

[0421] 22A shows an example of the configuration of a pixel 230. The pixel 230 includes a pixel circuit 51 and a light-emitting device 61.

[0422] The pixel circuit 51 shown in FIG. 22A is a 2Tr1C type pixel circuit having a transistor 52A, a transistor 52B, and a capacitor 53.

[0423] One of the source and drain electrodes of the transistor 52A is electrically connected to the gate of the transistor 52B and one terminal of the capacitor 53, and the other of the source and drain electrodes is electrically connected to the wiring SL. The gate of the transistor 52A is electrically connected to the wiring GL. One of the source and drain electrodes of the transistor 52B and the other terminal of the capacitor 53 are electrically connected to the anode of the light-emitting device 61. The other of the source and drain electrodes of the transistor 52B is electrically connected to the wiring ANO. The cathode of the light-emitting device 61 is electrically connected to the wiring VCOM.

[0424] The wiring GL corresponds to the wiring 236, and the wiring SL corresponds to the wiring 238. The wiring VCOM is a wiring that applies a potential for supplying a current to the light-emitting device 61. The transistor 52A has a function of controlling the conduction or non-conduction state between the wiring SL and the gate of the transistor 52B based on the potential of the wiring GL. For example, VDD is supplied to the wiring ANO, and VSS is supplied to the wiring VCOM.

[0425] The transistor 52B has a function of controlling the amount of current flowing through the light-emitting device 61. The capacitor 53 has a function of maintaining the gate potential of the transistor 52B. The intensity of the light emitted by the light-emitting device 61 is controlled in accordance with an image signal supplied to the gate of the transistor 52B.

[0426] A backgate electrode may be provided in some or all of the transistors included in the pixel circuit 51. In the pixel circuit 51 illustrated in Fig. 22A, the transistor 52B has a backgate electrode that is electrically connected to one of the source electrode and the drain electrode of the transistor 52B. Note that the backgate electrode of the transistor 52B may be electrically connected to the gate electrode of the transistor 52B.

[0427] The above-described semiconductor device can be suitably used in the pixel circuit 51. For example, the transistor 100 shown in FIG. 1B or the like can be used as the transistor 52A, and the transistor 200 can be used as the transistor 52B.

[0428] 22B shows an example of a configuration different from that of the pixel 230 shown in FIG. 22A. The pixel 230 includes a pixel circuit 51A and a light-emitting device 61.

[0429] 22B differs from the pixel circuit 51 shown in Fig. 22A mainly in that a transistor 52C is included. The pixel circuit 51A is a 3Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, and a capacitor 53.

[0430] One of the source electrode and the drain electrode of the transistor 52C is electrically connected to one of the source electrode and the drain electrode of the transistor 52B. The other of the source electrode and the drain electrode of the transistor 52C is electrically connected to a wiring V0. For example, a reference potential is supplied to the wiring V0.

[0431] The transistor 52C has a function of controlling conduction or non-conduction between the wiring V0 and one of the source electrode and the drain electrode of the transistor 52B based on the potential of the wiring GL. The reference potential of the wiring V0 applied via the transistor 52C can suppress variations in the gate-source potential of the transistor 52B.

[0432] The wiring V0 can be used to obtain a current value that can be used to set pixel parameters. Specifically, the wiring V0 can function as a monitor line for outputting the current flowing through the transistor 52B or the current flowing through the light-emitting device 61 to the outside. The current output to the wiring V0 can be converted into a voltage by a source follower circuit and output to the outside. Alternatively, it can be converted into a digital signal by an AD converter and output to the outside.

[0433] Compared with the transistor 52A functioning as a selection transistor for controlling the selection state of the pixel 230, the transistor 52B functioning as a drive transistor for controlling the current flowing through the light-emitting device 61 preferably has high saturation characteristics. By using the transistor 200 having a long channel length as the transistor 52B, a highly reliable display device can be obtained. Furthermore, by using the transistor 100 as the transistors 52A and 52C, the area occupied by the pixel circuit 51A can be reduced, resulting in a high-resolution display device.

[0434] Note that the transistor 100 may also be used for the transistor 52B. By using the transistor 100 with a short channel length as the transistor 52B, a display device with high luminance can be provided. Furthermore, the area occupied by the pixel circuit 51A can be reduced, and a high-resolution display device can be provided.

[0435] The above-described semiconductor device can be suitably used in the pixel circuit 51 A. For example, the transistor 100 shown in FIG. 1B and the like can be used as the transistors 52 A and 52 C, and the transistor 200 shown in FIG. 4B and the like can be used as the transistor 52 B.

[0436] Note that there is no particular limitation on the pixel circuit that can be applied to the display device of one embodiment of the present invention.

[0437] 23A shows a structural example of a display device according to one embodiment of the present invention.

[0438] In the display portion 162, a transistor 100 and a transistor 200 are provided over a substrate 102. The transistors 100 and 200 provided in the display portion can be used as transistors included in a pixel circuit. The display portion can include only the transistor 100 or only the transistor 200. When the display portion includes the transistor 200 with high saturation characteristics, a highly reliable display device with multiple gray levels and high display quality can be realized.

[0439] 23A shows one transistor 100 included in the peripheral circuit portion 164. Note that the peripheral circuit portion 164 preferably includes one or more transistors 100. Although not shown in FIG. 23A etc., the peripheral circuit portion 164 may also include a transistor 200.

[0440] 23A also shows one transistor 100 and one transistor 200 included in a pixel circuit of the display portion 162, and illustrates an example in which the transistor 100 is used as the transistor 52A in the pixel circuit 51, and the transistor 200 is used as the transistor 52B in the pixel circuit 51. Note that electrical connection between the transistor 100 and the transistor 200 is omitted in FIG. 23A . For example, a first opening reaching the conductive layer 112b and a second opening reaching the conductive layer 204 are provided in the insulating layer 195. By providing a first wiring over the insulating layer 195 so as to cover the first opening and the second opening, the conductive layer 112b and the conductive layer 204 can be electrically connected to each other through the first wiring.

[0441] In FIG. 23A, the capacitance of the pixel circuit is omitted.

[0442] An insulating layer 195 is provided to cover the transistor 100 and the transistor 200, and an insulating layer 235 is provided to cover the insulating layer 195. A light-emitting device 61 can be provided over the insulating layer 235. FIG. 23A shows a pixel electrode 111 that functions as one electrode of the light-emitting device 61. The pixel electrode 111 is electrically connected to the conductive layer 212a through an opening 135 provided in the insulating layer 110, the insulating layer 106, the insulating layer 195, and the insulating layer 235. The insulating layer 235 has a function of reducing unevenness caused by the transistor and making the surface on which the light-emitting device 61 is formed more flat. Note that in this specification and the like, the insulating layer 235 may be referred to as a planarizing layer.

[0443] The insulating layer 235 is preferably an organic insulating film. Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene-based resin, phenolic resin, and precursors of these resins. The insulating layer 235 may also have a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 preferably functions as an etching protection layer. This can prevent recesses from being formed in the insulating layer 235 when the pixel electrodes 111 are formed. Alternatively, recesses may be formed in the insulating layer 235 when the pixel electrodes 111 are formed.

[0444] The insulating layer 235 may have a laminated structure of an organic insulating layer and an inorganic insulating layer. For example, the insulating layer 235 may have a laminated structure of an organic insulating layer and an inorganic insulating layer on the organic insulating layer. By providing an inorganic insulating layer on the outermost surface of the insulating layer 235, it can function as an etching protection layer. This prevents a portion of the insulating layer 235 from being etched when the pixel electrode 111 is formed, thereby preventing the insulating layer 235 from becoming less flat.

[0445] As shown in FIG. 23B, the transistor 200 can be applied to each of the transistors 52A and 52B.

[0446] 23C , instead of the conductive layer 212a, the transistor 200 used as the transistor 52B may have a structure in which a conductive layer 212b is connected to the pixel electrode 111. The pixel electrode 111 shown in FIG. 23C is electrically connected to the conductive layer 212b through an opening 136 provided in the insulating layer 106, the insulating layer 195, and the insulating layer 235.

[0447] The display device of one embodiment of the present invention may be any of a top emission type that emits light in a direction opposite to a substrate on which a light-emitting device is formed, a bottom emission type that emits light toward a substrate on which a light-emitting device is formed, and a dual emission type that emits light from both sides.

[0448] <Configuration example 1 of display device> Figure 24A shows an example of a cross section of the display device 50A when a portion of the area including the FPC 172, a portion of the peripheral circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the area including the end section are cut away.

[0449] 24A includes transistors 205D, 205R, 205G, and 205B, a light-emitting element 130R, a light-emitting element 130G, and a light-emitting element 130B between a substrate 151 and a substrate 152. The light-emitting element 130R is a display element included in the pixel 230R that emits red light, the light-emitting element 130G is a display element included in the pixel 230G that emits green light, and the light-emitting element 130B is a display element included in the pixel 230B that emits blue light.

[0450] The display device 50A employs an SBS structure, which allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in the selection of materials and configurations and facilitating improvements in brightness and reliability.

[0451] The display device 50A is a top emission type, which allows transistors and the like to be arranged overlapping the light emitting region of the light emitting element, thereby enabling a higher pixel aperture ratio than a bottom emission type.

[0452] The transistor 205D, the transistor 205R, the transistor 205G, and the transistor 205B are all formed over a substrate 151. These transistors can be manufactured using the same material and through the same process.

[0453] One or more of the transistors 100 and 200 described above can be used as the transistors 205D, 205R, 205G, and 205B. For example, the transistor 200 with high saturation characteristics can be suitably used as the transistors 205R, 205G, and 205B that function as driver circuits for the light-emitting elements 130R, 130G, and 130B in the display portion 162. This enables a highly reliable display device. By using the transistors 100 and 100 described above in the peripheral circuit portion 164, a display device that operates at high speed can be obtained. Furthermore, the area occupied by the peripheral circuit portion 164 can be reduced, thereby narrowing the frame.

[0454] Compared with the transistors provided in the display portion 162, the transistors provided in the peripheral circuit portion 164 may require a larger on-state current. It is preferable to use a transistor with a short channel length in the peripheral circuit portion 164. For example, the above-described transistor 100 can be preferably used in the peripheral circuit portion 164. By using the transistor 100 in the peripheral circuit portion 164, the occupied area can be reduced, and a display device with a narrow frame can be obtained. Furthermore, the above-described transistor 200 can be preferably used as the transistor provided in the display portion 162. FIG. 24A illustrates a configuration in which the above-described transistor 100 is used as the transistor 205D, and the transistor 200 is used as the transistors 205R, 205G, and 205B. Note that the transistor 100 may be used in the display portion 162, and the transistor 200 may be used in the peripheral circuit portion 164.

[0455] Note that the transistor included in the display device of this embodiment is not limited to the transistor included in the semiconductor device of one embodiment of the present invention. For example, the display device of this embodiment may include a combination of a transistor included in the semiconductor device of one embodiment of the present invention and a transistor having another structure. For example, the display device of this embodiment may include one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor. The transistor included in the display device of this embodiment may be either a top-gate transistor or a bottom-gate transistor. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0456] The transistors 205D, 205R, 205G, and 205B can preferably be OS transistors.

[0457] The display device of this embodiment may include a transistor (Si transistor) using silicon for a channel formation region. Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor having LTPS in a semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used. The LTPS transistor has high field-effect mobility and favorable frequency characteristics.

[0458] To increase the emission luminance of a light-emitting element included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting element. To achieve this, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Since an OS transistor has a higher withstand voltage between its source and drain than a Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting element and increase the emission luminance of the light-emitting element.

[0459] When a transistor operates in a saturation region, an OS transistor can reduce the change in source-drain current with respect to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing to a light-emitting element. This allows a pixel circuit to have a larger number of gray levels.

[0460] In terms of the saturation characteristics of the current that flows when a transistor operates in a saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed to a light-emitting element, even when the current-voltage characteristics of the EL element vary. In other words, when an OS transistor operates in a saturation region, the source-drain current hardly changes even when the source-drain voltage is changed, thereby stabilizing the light-emitting luminance of the light-emitting element.

[0461] The transistors in the peripheral circuit portion 164 and the transistors in the display portion 162 may have the same structure or different structures. The transistors in the peripheral circuit portion 164 may all have the same structure or may have two or more types. Similarly, the transistors in the display portion 162 may all have the same structure or may have two or more types.

[0462] All the transistors included in the display portion 162 may be OS transistors, all the transistors included in the display portion 162 may be Si transistors, or some of the transistors included in the display portion 162 may be OS transistors and the rest may be Si transistors.

[0463] For example, by using both LTPS transistors and OS transistors in the display portion 162, a display device with low power consumption and high driving capability can be realized. A configuration in which LTPS transistors and OS transistors are combined is sometimes referred to as LTPO. Similarly, all the transistors in the peripheral circuit portion 164 may be OS transistors, or all the transistors in the peripheral circuit portion 164 may be Si transistors, or some of the transistors in the peripheral circuit portion 164 may be OS transistors and the rest may be Si transistors.

[0464] An insulating layer 195 is provided to cover the transistor 205D, the transistor 205R, the transistor 205G, and the transistor 205B, and an insulating layer 235 is provided over the insulating layer 195.

[0465] On the insulating layer 235, the light emitting elements 130R, 130G, and 130B are provided.

[0466] The light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. The light-emitting element 130R shown in Fig. 24A emits red light (R). The EL layer 113R has a light-emitting layer that emits red light.

[0467] The light-emitting element 130G has a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. The light-emitting element 130G shown in Fig. 24A emits green light (G). The EL layer 113G has a light-emitting layer that emits green light.

[0468] The light-emitting element 130B has a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. The light-emitting element 130B shown in Fig. 24A emits blue light (B). The EL layer 113B has a light-emitting layer that emits blue light.

[0469] 24A, the EL layers 113R, 113G, and 113B are all shown with the same film thickness, but this is not limited thereto. The film thicknesses of the EL layers 113R, 113G, and 113B may be different. For example, it is preferable to set the film thicknesses of the EL layers 113R, 113G, and 113B so as to provide an optical path length that intensifies the light emitted by each layer. This allows for a microcavity structure to be realized, and the color purity of the light emitted from each light-emitting element to be increased.

[0470] The pixel electrode 111R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 195 and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the conductive layer 112b of the transistor 205G, and the pixel electrode 111B is electrically connected to the conductive layer 112b of the transistor 205B.

[0471] Each end of the pixel electrodes 111R, 111G, and 111B is covered with an insulating layer 237. The insulating layer 237 functions as a partition wall (also referred to as a bank, spacer, or bank). The insulating layer 237 can be formed in a single layer structure or a stacked layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the material that can be used for the insulating layer 235 can be used for the insulating layer 237. The insulating layer 237 can electrically insulate the pixel electrode and the common electrode. Furthermore, the insulating layer 237 can electrically insulate adjacent light-emitting elements from each other.

[0472] The common electrode 115 is a continuous film provided in common to the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to a conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.

[0473] In a display device according to one embodiment of the present invention, a conductive film that transmits visible light is preferably used for the pixel electrode and the common electrode, which are electrodes from which light is extracted, and a conductive film that reflects visible light is preferably used for the electrode from which light is not extracted.

[0474] A conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.

[0475] Materials for forming the pair of electrodes of the light-emitting element can include metals, alloys, electrically conductive compounds, and mixtures thereof, as appropriate. Specific examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, as well as alloys containing these metals in combination. Other examples of such materials include indium tin oxide (In-Sn oxide, also referred to as ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Other examples of such materials include aluminum-containing alloys (aluminum alloys), such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and silver-containing alloys, such as an alloy of silver and magnesium and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also referred to as APC). Other examples of the material include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not exemplified above, rare earth metals such as europium and ytterbium, alloys containing appropriate combinations of these, and graphene.

[0476] The light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one of the pair of electrodes of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transmissive / semi-reflective electrode), and the other is preferably an electrode that is reflective to visible light (reflective electrode). By having the light-emitting element have a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.

[0477] The light transmittance of the transparent electrode is 40% or more. For example, it is preferable to use an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more for the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transmissive / semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. Furthermore, the resistivity of these electrodes is 1×10 −２ Preferably, it is Ωcm or less.

[0478] The EL layers 113R, 113G, and 113B are each provided in an island shape. In FIG. 24A , the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and 113B overlap, and the ends of adjacent EL layers 113R and 113B overlap. When forming island-shaped EL layers using a fine metal mask, the ends of adjacent EL layers may overlap as shown in FIG. 24A , but this is not limited to this. That is, adjacent EL layers may not overlap but may be spaced apart. Furthermore, the display device may have both portions where adjacent EL layers overlap and portions where adjacent EL layers do not overlap but are spaced apart.

[0479] Each of the EL layers 113R, 113G, and 113B includes at least a light-emitting layer. The light-emitting layer includes one or more light-emitting materials. As the light-emitting material, a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. Furthermore, a material that emits near-infrared light can also be used as the light-emitting material.

[0480] The light-emitting material may include a fluorescent material, a phosphorescent material, a TADF material, and a quantum dot material.

[0481] The light-emitting layer may contain one or more organic compounds (host materials, assist materials, etc.) in addition to a light-emitting substance (guest material). As the one or more organic compounds, one or both of a substance with high hole-transport properties (hole-transport material) and a substance with high electron-transport properties (electron-transport material) can be used. Furthermore, as the one or more organic compounds, a bipolar substance (a substance with high electron-transport properties and high hole-transport properties) or a TADF material may be used.

[0482] The light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex. This configuration allows efficient emission using Exciplex-Triple Energy Transfer (ExTET), which is energy transfer from the exciplex to the light-emitting material (phosphorescent material). By selecting a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest-energy absorption band of the light-emitting material, energy transfer becomes smooth, allowing efficient emission. This configuration simultaneously enables high efficiency, low-voltage operation, and long life of the light-emitting element.

[0483] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting properties (hole-injecting layer), a layer containing a hole-transporting material (hole-transporting layer), a layer containing a substance with high electron-blocking properties (electron-blocking layer), a layer containing a substance with high electron-injecting properties (electron-injecting layer), a layer containing an electron-transporting material (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer).In addition, the EL layer may include one or both of a bipolar material and a TADF material.

[0484] The light-emitting element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-emitting element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0485] The light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer. The tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer injects electrons into one of the two light-emitting units and holes into the other. The tandem structure allows the light-emitting element to emit light with high brightness. Furthermore, the tandem structure can reduce the current required to achieve the same brightness compared to a single structure, thereby improving reliability. The tandem structure may also be called a stack structure.

[0486] In Figure 24A, when light-emitting elements with a tandem structure are used, it is preferable that EL layer 113R has a structure having multiple light-emitting units that emit red light, EL layer 113G has a structure having multiple light-emitting units that emit green light, and EL layer 113B has a structure having multiple light-emitting units that emit blue light.

[0487] A protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded via an adhesive layer 142. A light-shielding layer 117 is provided on the substrate 152. For example, a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements. In FIG. 24A , the space between the substrates 152 and 151 is filled with the adhesive layer 142, and a solid sealing structure is applied. Alternatively, the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied. In this case, the adhesive layer 142 may be provided so as not to overlap with the light-emitting elements. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer 142.

[0488] The protective layer 131 is provided at least in the display portion 162, and is preferably provided so as to cover the entire display portion 162. The protective layer 131 is preferably provided so as to cover not only the display portion 162 but also the connection portion 140 and the peripheral circuit portion 164. The protective layer 131 is also preferably provided up to the edge of the display device 50A. Meanwhile, the connection portion 168 has a portion where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166.

[0489] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.

[0490] The protective layer 131 may have a single layer structure or a stacked structure of two or more layers. The conductivity of the protective layer 131 does not matter. The protective layer 131 can be formed using at least one of an insulating film, a semiconductor film, and a conductive film.

[0491] The protective layer 131 has an inorganic film, which can prevent oxidation of the common electrode 115, prevent impurities (moisture, oxygen, etc.) from entering the light-emitting element, and so on, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.

[0492] For the protective layer 131, for example, an inorganic insulating film such as an insulating oxide film, an insulating nitride film, an insulating oxynitride film, or an insulating nitride oxide film can be used. Specific examples of these inorganic insulating films are as described above. In particular, the protective layer 131 preferably includes an insulating nitride film or an insulating nitride oxide film, and more preferably includes an insulating nitride film.

[0493] The protective layer 131 may be an inorganic film containing ITO, In—Zn oxide, Ga—Zn oxide, Al—Zn oxide, IGZO, or the like. The inorganic film preferably has high resistance, specifically, preferably has higher resistance than the common electrode 115. The inorganic film may further contain nitrogen.

[0494] When light emitted from the light-emitting element is extracted through the protective layer 131, it is preferable that the protective layer 131 has high transparency to visible light. For example, ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.

[0495] For example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used as the protective layer 131. By using such a stacked structure, impurities (water, oxygen, etc.) can be prevented from entering the EL layer side.

[0496] Furthermore, the protective layer 131 may include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 131 include the organic insulating films that can be used for the insulating layer 235.

[0497] A connection portion 168 is provided in a region of the substrate 151 where the substrate 152 does not overlap. In the connection portion 168, the wiring 165 is electrically connected to the FPC 172 via a conductive layer 166 and a connection layer 242. In this example, the conductive layer 166 has a single-layer structure of a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B. The conductive layer 166 is exposed on the top surface of the connection portion 168. This allows the connection portion 168 and the FPC 172 to be electrically connected via the connection layer 242.

[0498] The wiring 165 is electrically connected to a transistor included in the peripheral circuit portion 164. Figure 24A shows a structure in which a conductive layer 112b included in a transistor 205D extends and functions as the wiring 165. Note that the structure of the wiring 165 is not limited to this.

[0499] The display device 50A is a top-emission type. Light emitted by the light-emitting elements is emitted toward the substrate 152. The substrate 152 is preferably made of a material that is highly transparent to visible light. The pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.

[0500] A light-shielding layer 117 is preferably provided on the surface of the substrate 152 facing the substrate 151. The light-shielding layer 117 can be provided at a position overlapping with the spaces between adjacent light-emitting elements, the connection section 140, the peripheral circuit section 164, and the like.

[0501] A colored layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When a color filter is provided over the light-emitting element, the color purity of light emitted from the pixel can be increased.

[0502] Various optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151). Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. In addition, a surface protection layer such as an anti-static film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches during use, or an impact absorbing layer may be arranged on the outside of the substrate 152. For example, a glass layer or a silica layer (SiO ｘ The surface protection layer can be preferably formed of a material such as DLC (diamond-like carbon), aluminum oxide (AlO ｘ ), polyester-based materials, or polycarbonate-based materials may also be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.

[0503] The substrate 151 and the substrate 152 can each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like. A material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted. When a flexible material is used for the substrate 151 and the substrate 152, the flexibility of the display device can be increased, and a flexible display can be realized. Furthermore, a polarizing plate may be used for at least one of the substrates 151 and 152.

[0504] Substrate 151 and substrate 152 can be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of substrate 151 and substrate 152 can be made of glass having a thickness sufficient to provide flexibility.

[0505] When a circularly polarizing plate is superimposed on a display device, it is preferable that the display device has a substrate with high optical isotropy. A substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). Examples of films with high optical isotropy include triacetyl cellulose (TAC, also called cellulose triacetate) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic films.

[0506] The adhesive layer 142 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet curable adhesive), a reactive curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as epoxy resin, is preferable. Alternatively, a two-component resin may be used. Alternatively, an adhesive sheet or the like may be used.

[0507] The connection layer 242 may be an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0508] 24B is different from the display device 50A mainly in that a light-emitting element having a common EL layer 113 and a colored layer (such as a color filter) are used for each sub-pixel of each color. Note that in the following description of the display device, descriptions of parts that are the same as those of the display devices described above may be omitted.

[0509] The display device 50B shown in Figure 24B differs from Figure 24A in that it includes transistors 205D, 205R, 205G, and 205B, light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light, between the substrate 151 and the substrate 152. Note that Figure 24B only illustrates the differences from Figure 24A. The configuration shown in Figure 24B can be combined with the region including the FPC 172, the peripheral circuit section 164, the stacked structure from the substrate 151 to the insulating layer 235 of the display section 162, the connection section 140, and the configuration of the end portion shown in Figure 24A.

[0510] The light emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. The light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.

[0511] The light emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.

[0512] The light emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.

[0513] The light-emitting elements 130R, 130G, and 130B each share the EL layer 113 and the common electrode 115. The configuration in which the subpixels of each color are provided with a common EL layer 113 can reduce the number of manufacturing steps compared to the configuration in which the subpixels of each color are provided with different EL layers.

[0514] 24B emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0515] A light-emitting element that emits white light preferably includes two or more light-emitting layers. When two light-emitting layers are used to obtain white light emission, light-emitting layers may be selected such that the emission colors of the two light-emitting layers have a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer have a complementary color relationship, a configuration in which the light-emitting element as a whole emits white light can be obtained. Furthermore, when three or more light-emitting layers are used to obtain white light emission, the emission colors of the three or more light-emitting layers may be combined to form a configuration in which the light-emitting element as a whole emits white light.

[0516] The EL layer 113 preferably includes, for example, a light-emitting layer having a light-emitting substance that emits blue light and a light-emitting layer having a light-emitting substance that emits visible light with a wavelength longer than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0517] A tandem structure is preferably used for the light-emitting element emitting white light. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light, in this order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and red light, and a light-emitting unit that emits blue light, in this order, or the like can be applied. For example, the number of stacked light-emitting units and the order of colors can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, and B, and the number of stacked light-emitting layers in light-emitting unit X and the order of colors can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, or a three-layer structure of R, G, and R. Furthermore, another layer can be provided between the two light-emitting layers.

[0518] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 24B emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. In the pixel 230B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the pixel 230R that emits red light and the pixel 230G that emits green light, a color conversion layer can be provided between the light-emitting element 130R or light-emitting element 130G and the substrate 152 to convert the blue light emitted by the light-emitting element 130R or light-emitting element 130G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. A portion of the light emitted by the light-emitting element may be transmitted directly without being converted by the color conversion layer. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0519] <Configuration Example 3 of Display Device> A display device 50C shown in FIG. 25 differs from the display device 50B mainly in that it is a bottom-emission type display device.

[0520] Light emitted from the light-emitting element is emitted toward the substrate 151. A material that is highly transparent to visible light is preferably used for the substrate 151. On the other hand, the light-transmitting property of a material used for the substrate 152 does not matter.

[0521] 25 shows an example in which the light-shielding layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. In addition, the coloring layers 132R, 132G, and 132B are provided over the insulating layer 195, and the insulating layer 235 is provided over the coloring layers 132R, 132G, and 132B.

[0522] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113, and a common electrode 115.

[0523] The light emitting element 130B overlapping the colored layer 132B has a pixel electrode 111B, an EL layer 113 and a common electrode 115.

[0524] The pixel electrodes 111G and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a metal or the like with low resistivity can be used for the common electrode 115, which can suppress voltage drops caused by the resistance of the common electrode 115 and achieve high display quality.

[0525] <Configuration Example 4 of Display Device> A display device 50D shown in FIG. 26A differs from the display device 50A mainly in that it includes a light receiving element 130S.

[0526] The display device 50D has a light-emitting element and a light-receiving element in each pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be built into a display device using an organic EL element.

[0527] In the display device 50D, in which pixels have a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so that it is possible to detect contact or proximity of an object while displaying an image. Therefore, the display unit 162 has one or both of an imaging function and a sensing function in addition to an image display function. For example, in addition to displaying an image using all of the sub-pixels of the display device 50D, it is also possible for some sub-pixels to emit light as a light source, other sub-pixels to perform light detection, and the remaining sub-pixels to display an image.

[0528] Therefore, there is no need to provide a light receiving unit and a light source separately from the display device 50D, and the number of components in the electronic device can be reduced. For example, there is no need to provide a separate biometric authentication device or a capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, it is possible to provide an electronic device with reduced manufacturing costs.

[0529] When a light receiving element is used as an image sensor, the display device 50D can capture an image using the light receiving element. For example, the image sensor can capture an image for personal authentication using a fingerprint, palm print, iris, pulse shape (including vein shape and artery shape), face, or the like.

[0530] The light receiving element can be used as a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a hover sensor, hover touch sensor, or touchless sensor). A touch sensor can detect an object (such as a finger, hand, or pen) when the object comes into direct contact with the display device. A non-contact sensor can detect an object without the object touching the display device.

[0531] The light receiving element 130S has a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Ln is incident on the functional layer 113S from outside the display device 50D.

[0532] The pixel electrode 111S is electrically connected to a conductive layer 112b included in the transistor 205S through an opening provided in the insulating layer 195 and the insulating layer 235.

[0533] The end of the pixel electrode 111S is covered with an insulating layer 237.

[0534] The common electrode 115 is a continuous film provided in common to the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 115 shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140.

[0535] The functional layer 113S has at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors including organic compounds. In this embodiment, an example in which an organic semiconductor is used as the semiconductor included in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (for example, vacuum deposition), which is preferable because a common manufacturing device can be used.

[0536] The functional layer 113S may further include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, or a bipolar substance (a substance with high electron transport properties and hole transport properties) as a layer other than the active layer. Furthermore, without being limited to the above, the functional layer 113S may further include a layer containing a substance with high hole injection properties, a hole blocking material, a substance with high electron injection properties, or an electron blocking material. For the layer other than the active layer of the light-receiving element, for example, the material that can be used for the light-emitting element described above can be used.

[0537] The light-receiving element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-receiving element can be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet printing, or coating.

[0538] By covering a portion of the peripheral region of the functional layer 113S of the light receiving element with the light-shielding layer 117, the range in which the light receiving element detects light can be controlled. The light-shielding layer 117 has openings in a region overlapping the EL layer of the light-emitting element and a region overlapping the functional layer 113S. Figure 26A shows an example in which the width Ws of the opening overlapping the functional layer 113S is narrower than the width We of the opening overlapping the EL layer. Narrowing the width Ws may, for example, improve the resolution of the light receiving element.

[0539] A display device 50D shown in FIGS. 26B and 26C has, between a substrate 151 and a substrate 152, a layer 353 having a light receiving element, a circuit layer 355, and a layer 357 having a light emitting element.

[0540] The layer 353 includes, for example, the light receiving element 130S. The layer 357 includes, for example, the light emitting elements 130R, 130G, and 130B.

[0541] The circuit layer 355 includes a circuit for driving the light receiving element and a circuit for driving the light emitting element. The circuit layer 355 includes, for example, transistors 205R, 205G, and 205B. In addition, the circuit layer 355 may include one or more of a switch, a capacitor, a resistor, a wiring, a terminal, and the like.

[0542] 26B shows an example in which the light receiving element 130S is used as a touch sensor. As shown in FIG. 26B, light emitted by the light emitting element in layer 357 is reflected by a finger 352 that touches the display device 50D, and the light receiving element in layer 353 detects the reflected light. This makes it possible to detect that the finger 352 has touched the display device 50D.

[0543] 26C shows an example in which the light receiving element 130S is used as a non-contact sensor. As shown in FIG. 26C, light emitted by a light emitting element in a layer 357 is reflected by a finger 352 that is close to (i.e., not in contact with) the display device 50D, and the light receiving element in a layer 353 detects the reflected light.

[0544] 27A is an example of a display device using a device with an MML (metal maskless) structure. That is, the display device 50E has light-emitting elements fabricated without using a fine metal mask. The stacked structure from the substrate 151 to the insulating layer 235 and the stacked structure from the protective layer 131 to the substrate 152 are similar to those of the display device 50A, and therefore will not be described here.

[0545] In FIG. 27A, light emitting elements 130 R, 130 G, and 130 B are provided on an insulating layer 235 .

[0546] The light-emitting element 130R includes a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. The light-emitting element 130R shown in FIG. 27A emits red light (R). The layer 133R includes a light-emitting layer that emits red light. In the light-emitting element 130R, the layer 133R and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R can be referred to as a pixel electrode.

[0547] The light-emitting element 130G includes a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114. The light-emitting element 130G shown in FIG. 27A emits green light (G). The layer 133G includes a light-emitting layer that emits green light. In the light-emitting element 130G, the layer 133G and the common layer 114 can be collectively referred to as an EL layer. Furthermore, one or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.

[0548] The light-emitting element 130B includes a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114. The light-emitting element 130B shown in FIG. 27A emits blue light (B). The layer 133B includes a light-emitting layer that emits blue light. In the light-emitting element 130B, the layer 133B and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124B and the conductive layer 126B can be referred to as a pixel electrode.

[0549] In this specification and the like, among the EL layers included in the light-emitting elements, layers provided in an island shape for each light-emitting element are referred to as layers 133B, 133G, or 133R, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 114. Note that in this specification and the like, the layers 133R, 133G, and 133B may be referred to as island-shaped EL layers, EL layers formed in an island shape, or the like, without including the common layer 114.

[0550] The layers 133R, 133G, and 133B are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0551] 27A, the layers 133R, 133G, and 133B are all shown to have the same thickness, but this is not limitative and the layers 133R, 133G, and 133B may have different thicknesses.

[0552] The conductive layer 124R is electrically connected to the conductive layer 112b included in the transistor 205R through openings provided in the insulating layer 195 and the insulating layer 235. Similarly, the conductive layer 124G is electrically connected to the conductive layer 112b included in the transistor 205G, and the conductive layer 124B is electrically connected to the conductive layer 112b included in the transistor 205B.

[0553] The conductive layers 124R, 124G, and 124B are formed so as to cover the openings provided in the insulating layer 235. A layer 128 is buried in the recesses of the conductive layers 124R, 124G, and 124B, respectively.

[0554] The layer 128 has a function of planarizing the recesses of the conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B electrically connected to the conductive layers 124R, 124G, and 124B are provided on the conductive layers 124R, 124G, and 124B and the layer 128. Therefore, the regions overlapping with the recesses of the conductive layers 124R, 124G, and 124B can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixel. It is preferable to use a conductive layer that functions as a reflective electrode for the conductive layers 124R and 126R.

[0555] The layer 128 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for the layer 128. In particular, the layer 128 is preferably formed using an insulating material, and more preferably using an organic insulating material. For example, the organic insulating material that can be used for the insulating layer 237 described above can be used for the layer 128.

[0556] 27A shows an example in which the top surface of layer 128 has a flat portion, but there are no particular limitations on the shape of layer 128. The top surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0557] The height of the upper surface of layer 128 and the height of the upper surface of conductive layer 124R may be the same or approximately the same, or may be different from each other. For example, the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 124R.

[0558] The end of the conductive layer 126R may be flush with the end of the conductive layer 124R, or may cover the side surface of the end of the conductive layer 124R. The end of each of the conductive layers 124R and 126R preferably has a tapered shape. Specifically, the end of each of the conductive layers 124R and 126R preferably has a tapered shape with a taper angle of less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side surface of the pixel electrode has an inclined portion. By tapering the side surface of the pixel electrode, the coverage of the EL layer provided along the side surface of the pixel electrode can be improved.

[0559] The conductive layers 124G, 126G and the conductive layers 124B, 126B are similar to the conductive layers 124R, 126R, and therefore detailed description thereof will be omitted.

[0560] The top surface and side surfaces of the conductive layer 126R are covered with the layer 133R. Similarly, the top surface and side surfaces of the conductive layer 126G are covered with the layer 133G, and the top surface and side surfaces of the conductive layer 126B are covered with the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0561] Part of the top surface and side surfaces of each of the layers 133R, 133G, and 133B are covered with insulating layers 125 and 127. A common layer 114 is provided on the layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are each a continuous film provided in common to a plurality of light-emitting elements.

[0562] In FIG. 27A , the insulating layer 237 shown in FIG. 24A and other figures is not provided between the conductive layer 126R and the layer 133R. That is, the display device 50E does not have an insulating layer (also called a partition, bank, spacer, or the like) that is in contact with the pixel electrode and covers the upper edge of the pixel electrode. This allows the distance between adjacent light-emitting elements to be extremely narrow. This allows a high-definition or high-resolution display device to be obtained. Furthermore, a mask for forming the insulating layer is not required, thereby reducing the manufacturing cost of the display device.

[0563] As described above, the layers 133R, 133G, and 133B each have a light-emitting layer. The layers 133R, 133G, and 133B each preferably have a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, the layers 133R, 133G, and 133B each preferably have a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. Alternatively, the layers 133R, 133G, and 133B each preferably have a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Because the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, providing one or both of a carrier transport layer and a carrier block layer on the light-emitting layer can prevent the light-emitting layer from being exposed to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.

[0564] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The common layer 114 is shared by the light-emitting elements 130R, 130G, and 130B.

[0565] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B with the insulating layer 125 interposed therebetween.

[0566] The side surfaces (and even part of the upper surfaces) of the layers 133R, 133G, and 133B are covered with at least one of the insulating layer 125 and the insulating layer 127, which prevents the common layer 114 (or the common electrode 115) from coming into contact with the pixel electrodes and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing short circuits in the light-emitting elements, thereby improving the reliability of the light-emitting elements.

[0567] The insulating layer 125 is preferably in contact with each side surface of the layer 133R, the layer 133G, and the layer 133B. By configuring the insulating layer 125 to be in contact with the layer 133R, the layer 133G, and the layer 133B, peeling of the layer 133R, the layer 133G, and the layer 133B can be prevented, and the reliability of the light-emitting element can be improved.

[0568] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses in the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0569] By providing the insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled, which reduces large unevenness in height on the surface on which layers (e.g., a carrier injection layer, a common electrode, etc.) are formed on the island-shaped layers, thereby making the surface flatter, thereby improving the coverage of the carrier injection layer, the common electrode, etc.

[0570] The common layer 114 and the common electrode 115 are provided over the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, a step is generated between a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (a region between light-emitting elements). In the display device of one embodiment of the present invention, the insulating layer 125 and the insulating layer 127 can flatten the step, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection due to disconnection can be suppressed. Furthermore, the step can suppress an increase in electrical resistance due to a local thinning of the common electrode 115.

[0571] The upper surface of the insulating layer 127 preferably has a highly flat shape. The upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface. For example, the upper surface of the insulating layer 127 preferably has a highly flat convex curved surface shape.

[0572] The insulating layer 125 can be an insulating layer containing an inorganic material. For example, an inorganic insulating film such as an insulating oxide film, a nitride insulating film, an oxynitride insulating film, or a nitride oxide insulating film can be used for the insulating layer 125. Specific examples of these inorganic insulating films are as described above. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Aluminum oxide is particularly preferable because it has a high etching selectivity with respect to the EL layer and protects the EL layer in the formation of the insulating layer 127 described later. By using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by an ALD method as the insulating layer 125, the insulating layer 125 can be formed with fewer pinholes and excellent protection of the EL layer. The insulating layer 125 may also have a stacked-layer structure of a film formed by an ALD method and a film formed by a sputtering method. For example, the insulating layer 125 may have a stacked-layer structure of an aluminum oxide film formed by an ALD method and a silicon nitride film formed by a sputtering method.

[0573] The insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 125 preferably has a function of suppressing diffusion of at least one of water and oxygen. The insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0574] The insulating layer 125 has a function as a barrier insulating layer or a gettering function, which can suppress the intrusion of impurities (typically, at least one of water and oxygen) that may diffuse into each light-emitting element from the outside. With this structure, a highly reliable light-emitting element and a highly reliable display device can be provided.

[0575] The insulating layer 125 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer. Furthermore, by reducing the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration or a sufficiently low carbon concentration, or preferably both of them.

[0576] The insulating layer 127 provided on the insulating layer 125 has a function of flattening large unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.

[0577] An insulating layer containing an organic material can be suitably used as the insulating layer 127. A photosensitive organic resin is preferably used as the organic material, and for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification and the like, the term "acrylic resin" does not refer only to polymethacrylic acid ester or methacrylic resin, but may refer to all acrylic polymers in a broad sense.

[0578] The insulating layer 127 may be made of an acrylic resin, a polyimide resin, an epoxy resin, an imide resin, a polyamide resin, a polyimideamide resin, a silicone resin, a siloxane resin, a benzocyclobutene-based resin, a phenolic resin, or a precursor of any of these resins. Alternatively, the insulating layer 127 may be made of an organic material such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or an alcohol-soluble polyamide resin. Alternatively, a photoresist may be used as the photosensitive resin. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.

[0579] The insulating layer 127 may be made of a material that absorbs visible light. The insulating layer 127 absorbs light emitted from the light-emitting element, thereby suppressing leakage of light from the light-emitting element to an adjacent light-emitting element through the insulating layer 127 (stray light). This can improve the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, a lightweight and thin display device can be realized.

[0580] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, using a resin material in which two or more color filter materials are laminated or mixed is preferable because it can enhance the visible light blocking effect. In particular, mixing three or more color filter materials makes it possible to form a black or nearly black resin layer.

[0581] <Configuration example 6 of display device> A display device 50F shown in Figure 27B differs from the display device 50E mainly in that a light-emitting element having a layer 133 and a colored layer (such as a color filter) are used in each sub-pixel of each color.

[0582] The configuration shown in Figure 27B can be combined with the region including the FPC 172, the peripheral circuit section 164, the laminated structure from the substrate 151 of the display section 162 to the insulating layer 235, the connection section 140, and the end section configuration shown in Figure 27A.

[0583] A display device 50F shown in FIG. 27B includes light emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0584] The light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50F via the colored layer 132R. Similarly, the light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50F via the colored layer 132G. The light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50F via the colored layer 132B.

[0585] Each of the light-emitting elements 130R, 130G, and 130B has a layer 133. These three layers 133 are formed using the same process and the same material. Furthermore, these three layers 133 are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0586] 27B emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0587] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 27B emit blue light. In this case, the layer 133 includes one or more light-emitting layers that emit blue light. In the subpixels that emit blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the subpixels that emit red light and the subpixels that emit green light, a color conversion layer can be provided between the light-emitting element 130R or 130G and the substrate 152 to convert the blue light emitted by the light-emitting element 130R or 130G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a colored layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a colored layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. By extracting light that has passed through the color conversion layer through the colored layer, light other than the desired color can be absorbed by the colored layer, thereby improving the color purity of the light emitted by the subpixels.

[0588] The configuration of the light-emitting element 130 shown in the display device 50E and the display device 50F can also be applied to the bottom-emission display device shown in the display device 50C. In that case, the pixel electrodes 111 of the light-emitting elements 130 may be made of a material that is highly transparent to visible light, and the common electrode 115 may be made of a material that reflects visible light.

[0589] <Example of a Method for Manufacturing a Display Device> A method for manufacturing a display device using a device with an MML (metal maskless) structure will be described below with reference to Fig. 28. Here, a process for manufacturing light-emitting elements without using a fine metal mask will be described in detail. Fig. 28 shows cross-sectional views of three light-emitting elements and the connection portion 140 of the display unit 162 in each process.

[0590] The light-emitting element can be fabricated using vacuum processes such as vapor deposition, and solution processes such as spin coating and inkjet printing. Vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, and chemical vapor deposition (CVD). In particular, functional layers included in the EL layer (hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) can be formed by vapor deposition (vacuum deposition, etc.), coating methods (dip coating, die coating, bar coating, spin coating, spray coating, etc.), printing methods (inkjet printing, screen (stencil printing), offset (lithographic printing), flexography (relief printing), gravure, microcontact printing, etc.), etc.

[0591] The island-shaped layer (layer including the light-emitting layer) manufactured by the manufacturing method of the display device described below is not formed using a fine metal mask, but is formed by forming the light-emitting layer on the entire surface and then processing it using photolithography. Therefore, it is possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now. Furthermore, since the light-emitting layer can be made separately for each color, it is possible to realize a display device that is extremely vivid, has high contrast, and has high display quality. Furthermore, by providing a sacrificial layer on the light-emitting layer, damage to the light-emitting layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting element.

[0592] For example, if a display device is composed of three types of light-emitting elements, namely, a light-emitting element that emits blue light, a light-emitting element that emits green light, and a light-emitting element that emits red light, three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and processing by photolithography three times.

[0593] First, the pixel electrodes 111R, 111G, and 111B and the conductive layer 123 are formed on the substrate 151 on which the transistors 205R, 205G, and 205B (not shown) are provided (FIG. 28A).

[0594] The conductive film to be the pixel electrodes can be formed by, for example, sputtering or vacuum evaporation. After a resist mask is formed on the conductive film by a photolithography process, the conductive film is processed to form the pixel electrodes 111R, 111G, and 111B and the conductive layer 123. The conductive film can be processed by either or both of a wet etching method and a dry etching method.

[0595] Next, a film 133Bf, which will later become the layer 133B, is formed on the pixel electrodes 111R, 111G, and 111B (FIG. 28A). The film 133Bf (later layer 133B) includes a light-emitting layer that emits blue light.

[0596] In this embodiment mode, an example is shown in which an island-shaped EL layer included in a light-emitting element that emits blue light is first formed, and then an island-shaped EL layer included in a light-emitting element that emits light of another color is formed.

[0597] In the process of forming the island-shaped EL layer, the pixel electrodes of the light-emitting elements of the colors formed second or later may be damaged in the previous process, which may result in a higher driving voltage for the light-emitting elements of the colors formed second or later.

[0598] Therefore, when manufacturing a display device according to one embodiment of the present invention, it is preferable to start with an island-shaped EL layer of a light-emitting element that emits light with the shortest wavelength (for example, a blue light-emitting element). For example, it is preferable to form the island-shaped EL layers in the order of blue, green, and red, or blue, red, and green.

[0599] This maintains a good state of the interface between the pixel electrode and the EL layer in the blue light-emitting element, and prevents the drive voltage of the blue light-emitting element from increasing. It also extends the life of the blue light-emitting element and improves its reliability. Since the red and green light-emitting elements are less susceptible to increases in drive voltage, etc., compared to the blue light-emitting element, the drive voltage of the entire display device can be reduced and reliability can be improved.

[0600] The order of forming the island-shaped EL layers is not limited to the above, and may be, for example, red, green, and blue.

[0601] 28A , the film 133Bf is not formed on the conductive layer 123. For example, by using an area mask, the film 133Bf can be formed only in a desired region. By employing a film formation process using an area mask and a processing process using a resist mask, the light-emitting element can be fabricated by a relatively simple process.

[0602] The heat resistance temperature of the compounds contained in the film 133Bf is preferably 100° C. or higher and 180° C. or lower, more preferably 120° C. or higher and 180° C. or lower, and more preferably 140° C. or higher and 180° C. or lower. This can improve the reliability of the light-emitting element. Also, the upper limit of the temperature that can be applied in the manufacturing process of the display device can be increased. Therefore, the range of choices for materials and manufacturing methods used in the display device can be expanded, and the yield and reliability can be improved.

[0603] The heat resistance temperature can be, for example, any one of the glass transition point, softening point, melting point, thermal decomposition temperature, and 5% weight loss temperature, preferably the lowest temperature among these.

[0604] The film 133Bf can be formed by, for example, a vapor deposition method, specifically a vacuum deposition method. Alternatively, the film 133Bf may be formed by a transfer method, a printing method, an inkjet method, a coating method, or the like.

[0605] Subsequently, a sacrificial layer 118B is formed on the film 133Bf and the conductive layer 123 ( FIG. 28A ). After a resist mask is formed by a photolithography process on the film that will become the sacrificial layer 118B, the film is processed to form the sacrificial layer 118B.

[0606] By providing the sacrificial layer 118B over the film 133Bf, damage to the film 133Bf during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.

[0607] The sacrificial layer 118B is preferably provided so as to cover the respective ends of the pixel electrodes 111R, 111G, and 111B. This means that the ends of the layer 133B, which will be formed in a later process, will be located outside the ends of the pixel electrode 111B. This allows the entire upper surface of the pixel electrode 111B to be used as a light-emitting region, thereby increasing the aperture ratio of the pixel. Furthermore, since the ends of the layer 133B may be damaged in a process after the formation of the layer 133B, it is preferable that they be located outside the ends of the pixel electrode 111B, i.e., not be used as a light-emitting region. This makes it possible to suppress variations in the characteristics of the light-emitting elements and improve reliability.

[0608] By covering the upper and side surfaces of the pixel electrode 111B with the layer 133B, each step after the formation of the layer 133B can be performed without exposing the pixel electrode 111B. If the edge of the pixel electrode 111B is exposed, corrosion may occur during an etching step or the like. By suppressing corrosion of the pixel electrode 111B, the yield and characteristics of the light-emitting element can be improved.

[0609] The sacrificial layer 118B is preferably provided also in a position overlapping with the conductive layer 123. This can prevent the conductive layer 123 from being damaged during the manufacturing process of the display device.

[0610] The sacrificial layer 118B is made of a film that is highly resistant to the processing conditions of the film 133Bf, specifically, a film that has a large etching selectivity with respect to the film 133Bf.

[0611] The sacrificial layer 118B is formed at a temperature lower than the heat resistance temperature of each compound contained in the film 133Bf. The substrate temperature when forming the sacrificial layer 118B is typically 200° C. or lower, preferably 150° C. or lower, more preferably 120° C. or lower, more preferably 100° C. or lower, and even more preferably 80° C. or lower.

[0612] A high heat resistance temperature of the compound contained in the film 133Bf is preferable because the film formation temperature of the sacrificial layer 118B can be increased. For example, the substrate temperature during the formation of the sacrificial layer 118B can be set to 100°C or higher, 120°C or higher, or 140°C or higher. The higher the film formation temperature, the denser the inorganic insulating film can be and the higher the barrier properties can be. Therefore, by forming the sacrificial layer at such a temperature, damage to the film 133Bf can be further reduced, and the reliability of the light-emitting element can be improved.

[0613] The same applies to the film formation temperatures of other layers (for example, the insulating film 125f) formed on the film 133Bf.

[0614] The sacrificial layer 118B can be formed by, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, or vacuum deposition. Alternatively, the sacrificial layer 118B may be formed by the wet film formation method described above.

[0615] The sacrificial layer 118B (a layer provided in contact with the film 133Bf when the sacrificial layer 118B has a laminated structure) is preferably formed using a formation method that causes less damage to the film 133Bf. For example, it is preferable to use the ALD method or the vacuum deposition method rather than the sputtering method.

[0616] The sacrificial layer 118B can be processed by wet etching or dry etching, and is preferably processed by anisotropic etching.

[0617] By using the wet etching method, damage to the film 133Bf during processing of the sacrificial layer 118B can be reduced compared to when using the dry etching method. When using the wet etching method, it is preferable to use, for example, a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of these. Furthermore, when using the wet etching method, a mixed acid chemical solution containing water, phosphoric acid, dilute hydrofluoric acid, and nitric acid may also be used. Note that the chemical solution used in the wet etching process may be alkaline or acidic.

[0618] The sacrificial layer 118B may be made of, for example, one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, and an organic insulating film.

[0619] The sacrificial layer 118B can be made of a metal material such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, and tantalum, or an alloy material containing such a metal material.

[0620] The sacrificial layer 118B can be made of a metal oxide such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), or indium tin oxide containing silicon.

[0621] In addition, instead of the above gallium, an element M (M is one or more elements selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) may be used.

[0622] For example, semiconductor materials such as silicon or germanium can be used as materials that are highly compatible with semiconductor manufacturing processes. Alternatively, oxides or nitrides of the above semiconductor materials can be used. Alternatively, non-metallic materials such as carbon or compounds thereof can be used. Alternatively, metals such as titanium, tantalum, tungsten, chromium, and aluminum, or alloys containing one or more of these, can be used. Alternatively, oxides containing the above metals, such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.

[0623] The sacrificial layer 118B can be made of any of various inorganic insulating films that can be used for the protective layer 131. In particular, an oxide insulating film is preferable because it has higher adhesion to the film 133Bf than a nitride insulating film. For example, the sacrificial layer 118B can be made of an inorganic insulating material such as aluminum oxide, hafnium oxide, or silicon oxide. For example, an aluminum oxide film can be formed as the sacrificial layer 118B by using the ALD method. Using the ALD method is preferable because it can reduce damage to the base (particularly the film 133Bf).

[0624] For example, the sacrificial layer 118B can be a stacked structure of an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method and an inorganic film (e.g., an In-Ga-Zn oxide film, a silicon film, or a tungsten film) formed using the sputtering method.

[0625] The same inorganic insulating film can be used for both the sacrificial layer 118B and the insulating layer 125 to be formed later. For example, an aluminum oxide film formed using an ALD method can be used for both the sacrificial layer 118B and the insulating layer 125. The same deposition conditions can be applied to the sacrificial layer 118B and the insulating layer 125, or different deposition conditions can be applied. For example, by depositing the sacrificial layer 118B under the same conditions as the insulating layer 125, the sacrificial layer 118B can be an insulating layer with high barrier properties against at least one of water and oxygen. On the other hand, since the sacrificial layer 118B is a layer that is removed mostly or entirely in a later process, it is preferable that it be easily processed. Therefore, the sacrificial layer 118B is preferably deposited under conditions where the substrate temperature during deposition is lower than that of the insulating layer 125.

[0626] An organic material may be used for the sacrificial layer 118B. For example, the organic material may be a material that is soluble in a solvent that is chemically stable with respect to at least the film located at the top of the film 133Bf. In particular, a material that dissolves in water or alcohol is preferably used. When forming a film of such a material, it is preferable to apply the material dissolved in a solvent such as water or alcohol using a wet film formation method, and then perform a heat treatment to evaporate the solvent. In this case, performing the heat treatment under a reduced pressure atmosphere is preferable because it allows the solvent to be removed at a low temperature and in a short time, thereby reducing thermal damage to the film 133Bf.

[0627] The sacrificial layer 118B may be made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or a fluororesin such as a perfluoropolymer.

[0628] For example, the sacrificial layer 118B can be a laminated structure of an organic film (e.g., a PVA film) formed using either a vapor deposition method or the above-mentioned wet film formation method, and an inorganic film (e.g., a silicon nitride film) formed using a sputtering method.

[0629] Note that in the display device of one embodiment of the present invention, part of the sacrificial film may remain as a sacrificial layer.

[0630] Subsequently, the film 133Bf is processed using the sacrificial layer 118B as a hard mask to form a layer 133B (FIG. 28B).

[0631] 28B , a stacked structure of the layer 133B and the sacrificial layer 118B remains on the pixel electrode 111B. The pixel electrodes 111R and 111G are exposed. In addition, the sacrificial layer 118B remains on the conductive layer 123 in the region corresponding to the connection portion 140.

[0632] The film 133Bf is preferably processed by anisotropic etching, particularly anisotropic dry etching, or wet etching.

[0633] Thereafter, the steps of forming the film 133Bf, the step of forming the sacrificial layer 118B, and the step of forming the layer 133B are repeated at least twice, changing the light-emitting material, to form a layered structure of the layer 133R and the sacrificial layer 118R on the pixel electrode 111R, and a layered structure of the layer 133G and the sacrificial layer 118G on the pixel electrode 111G ( FIG. 28C ). Specifically, the layer 133R is formed to include a light-emitting layer that emits red light, and the layer 133G is formed to include a light-emitting layer that emits green light. The sacrificial layers 118R and 118G can be made of the same material as that used for the sacrificial layer 118B, and may be made of the same material or different materials.

[0634] The side surfaces of the layers 133B, 133G, and 133R are preferably perpendicular or substantially perpendicular to the surface on which they are to be formed. For example, the angle between the surface on which they are to be formed and these side surfaces is preferably 60 degrees or more and 90 degrees or less.

[0635] As described above, the distance between any two adjacent layers of the layers 133B, 133G, and 133R formed using photolithography can be narrowed to 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. Here, the distance can be defined, for example, as the distance between the opposing ends of any two adjacent layers of the layers 133B, 133G, and 133R. By narrowing the distance between the island-shaped EL layers in this manner, a display device with high definition and a large aperture ratio can be provided.

[0636] Next, an insulating film 125f, which will later become the insulating layer 125, is formed to cover the pixel electrode, layer 133B, layer 133G, layer 133R, sacrificial layer 118B, sacrificial layer 118G, and sacrificial layer 118R, and an insulating layer 127 is formed on the insulating film 125f (Figure 28D).

[0637] The insulating film 125f is preferably formed to a thickness of 3 nm or more, 5 nm or more, or 10 nm or more, and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less.

[0638] The insulating film 125f is preferably formed by, for example, an ALD method. The ALD method is preferable because it can reduce film formation damage and form a film with high coverage. For example, an aluminum oxide film is preferably formed as the insulating film 125f by the ALD method.

[0639] Alternatively, the insulating film 125f may be formed by a sputtering method, a CVD method, or a PECVD method, which have a faster film formation rate than an ALD method. This enables a highly reliable display device to be manufactured with high productivity.

[0640] The insulating film that becomes the insulating layer 127 is preferably formed by the aforementioned wet film formation method (e.g., spin coating) using, for example, a photosensitive resin composition containing an acrylic resin. After film formation, it is preferable to remove the solvent contained in the insulating film by performing a heat treatment (also called pre-baking). Next, visible light or ultraviolet light is irradiated onto a portion of the insulating film to expose the portion. Next, development is performed to remove the exposed region of the insulating film. Next, a heat treatment (also called post-baking) is performed. This allows the insulating layer 127 shown in FIG. 28D to be formed. Note that the shape of the insulating layer 127 is not limited to the shape shown in FIG. 28D. For example, the top surface of the insulating layer 127 can have one or more of a convex curved surface, a concave curved surface, and a flat surface. Furthermore, the insulating layer 127 may cover the side surfaces of the end portions of at least one of the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R.

[0641] 28E , an etching process is performed using the insulating layer 127 as a mask to remove the insulating film 125f and portions of the sacrificial layers 118B, 118G, and 118R. As a result, openings are formed in the sacrificial layers 118B, 118G, and 118R, respectively, exposing the top surfaces of the layers 133B, 133G, and 133R, and the conductive layer 123. Note that portions of the sacrificial layers 118B, 118G, and 118R may remain in positions overlapping with the insulating layer 127 and the insulating layer 125 (see sacrificial layers 119B, 119G, and 119R).

[0642] The etching process can be performed by dry etching or wet etching. Note that, when the insulating film 125f is formed using the same material as the sacrificial layers 118B, 118G, and 118R, the etching process can be performed all at once, which is preferable.

[0643] As described above, by providing the insulating layer 127, the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, it is possible to prevent poor connection between the light-emitting elements in the common layer 114 and the common electrode 115 due to separation and to prevent an increase in electrical resistance due to a locally thin portion of the film thickness. As a result, the display device of one embodiment of the present invention can have improved display quality.

[0644] Subsequently, the common layer 114 and the common electrode 115 are formed in this order on the insulating layer 127, the layer 133B, the layer 133G, and the layer 133R (FIG. 28F).

[0645] The common layer 114 can be formed by a method such as a vapor deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0646] For example, sputtering or vacuum deposition can be used to form the common electrode 115. Alternatively, a film formed by deposition and a film formed by sputtering may be stacked.

[0647] As described above, in the manufacturing method of a display device according to one embodiment of the present invention, the island-shaped layers 133B, 133G, and 133R are formed by forming a film over the entire surface and then processing it, rather than by using a fine metal mask. This allows the island-shaped layers to be formed with uniform thicknesses. This makes it possible to realize a high-resolution display device or a display device with a high aperture ratio. Furthermore, even when the resolution or aperture ratio is high and the distance between subpixels is extremely short, the layers 133B, 133G, and 133R can be prevented from contacting each other in adjacent subpixels. Therefore, leakage current between subpixels can be suppressed. This prevents unintended light emission due to crosstalk, and a display device with extremely high contrast can be realized.

[0648] By providing the insulating layer 127 having a tapered edge between adjacent island-shaped EL layers, it is possible to suppress the occurrence of a step during the formation of the common electrode 115 and to prevent the formation of a locally thin portion in the common electrode 115. This can suppress the occurrence of a connection failure due to the disconnected portion in the common layer 114 and the common electrode 115 and an increase in electrical resistance due to the locally thin portion. Therefore, the display device of one embodiment of the present invention can achieve both high resolution and high display quality.

[0649] This embodiment mode can be combined with other embodiment modes as appropriate.

[0650] Embodiment 4 In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to FIGS.

[0651] The electronic devices of this embodiment include the display device of one embodiment of the present invention in their display portions. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, the display device of one embodiment of the present invention can be used in the display portions of various electronic devices.

[0652] Examples of electronic devices include electronic devices with relatively large screens such as television sets, desktop or notebook personal computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.

[0653] In particular, the display device of one embodiment of the present invention can be suitably used in electronic devices having a relatively small display area because it can increase the resolution. Examples of such electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), and head-mounted wearable devices such as VR devices such as head-mounted displays, AR glasses-type devices, and MR devices.

[0654] The display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 × 720 pixels), FHD (1920 × 1080 pixels), WQHD (2560 × 1440 pixels), WQXGA (2560 × 1600 pixels), 4K (3840 × 2160 pixels), or 8K (7680 × 4320 pixels). A resolution of 4K, 8K, or higher is particularly preferable. Furthermore, the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or higher, more preferably 300 ppi or higher, more preferably 500 ppi or higher, more preferably 1000 ppi or higher, more preferably 2000 ppi or higher, more preferably 3000 ppi or higher, more preferably 5000 ppi or higher, and even m...

Claims

1. A semiconductor device having a first transistor and a second transistor on a substrate, A first conductive layer located on the substrate and functioning as one of the source electrode and drain electrode of the first transistor, A second conductive layer located on the substrate and functioning as one of the source electrode and drain electrode of the second transistor, A first insulating layer having a region located above the first conductive layer and a region located above the second conductive layer, and having a first opening overlapping the first conductive layer and a second opening overlapping the second conductive layer, A third conductive layer having a region located above the first insulating layer and functioning as the other of the source electrode and drain electrode of the first transistor, A fourth conductive layer having a region located above the first insulating layer and functioning as the other of the source electrode and drain electrode of the second transistor, A first semiconductor layer having a region in contact with the upper surface of the third conductive layer and a region in contact with the upper surface of the first conductive layer in a portion that overlaps with the first opening, and having a channel formation region for the first transistor, A second semiconductor layer having a region in contact with the upper surface of the fourth conductive layer and a region in contact with the upper surface of the second conductive layer in a portion that overlaps with the second opening, and having a channel formation region for the second transistor, A second insulating layer having a region in contact with the upper surface of the first semiconductor layer and a region in contact with the upper surface of the second semiconductor layer, A fifth conductive layer having a region located above the second insulating layer and overlapping with the first semiconductor layer in the portion that overlaps with the first opening, A sixth conductive layer having a region located above the second insulating layer and overlapping with the second semiconductor layer in a portion that overlaps with the second opening, The fifth conductive layer functions as the gate electrode of the first transistor. The sixth conductive layer functions as the gate electrode of the second transistor. In a cross-sectional view, the angle between the upper surface of the first conductive layer and the side surface of the first insulating layer at the first opening is greater than the angle between the upper surface of the second conductive layer and the first insulating layer at the second opening. A semiconductor device wherein the second semiconductor layer has a region that overlaps with the sixth conductive layer and is in contact with the upper surface of the first insulating layer.

2. A semiconductor device having a first transistor and a second transistor on a substrate, A first conductive layer located on the substrate and functioning as one of the source electrode and drain electrode of the first transistor, A second conductive layer located on the substrate and functioning as one of the source electrode and drain electrode of the second transistor, A first insulating layer having a region located above the first conductive layer and a region located above the second conductive layer, and having a first opening overlapping the first conductive layer and a second opening overlapping the second conductive layer, A third conductive layer having a region located above the first insulating layer and functioning as the other of the source electrode and drain electrode of the first transistor, A fourth conductive layer having a region located above the first insulating layer and functioning as the other of the source electrode and drain electrode of the second transistor, A first semiconductor layer having a region in contact with the upper surface of the third conductive layer and a region in contact with the upper surface of the first conductive layer in a portion that overlaps with the first opening, and having a channel formation region for the first transistor, A second semiconductor layer having a region in contact with the upper surface of the fourth conductive layer and a region in contact with the upper surface of the second conductive layer in a portion that overlaps with the second opening, and having a channel formation region for the second transistor, A second insulating layer having a region in contact with the upper surface of the first semiconductor layer and a region in contact with the upper surface of the second semiconductor layer, A fifth conductive layer having a region located above the second insulating layer and overlapping with the first semiconductor layer in the portion that overlaps with the first opening, A sixth conductive layer having a region located above the second insulating layer and overlapping with the second semiconductor layer in a portion that overlaps with the second opening, The fifth conductive layer functions as the gate electrode of the first transistor. The sixth conductive layer functions as the gate electrode of the second transistor. In a cross-sectional view, the angle between the upper surface of the first conductive layer and the side surface of the first insulating layer at the first opening is greater than the angle between the upper surface of the second conductive layer and the first insulating layer at the second opening. The second semiconductor layer has a region that is in contact with the upper surface of the first insulating layer in the region that overlaps with the sixth conductive layer. The diameter at the lower surface of the first opening is greater than the diameter at the lower surface of the second opening. A semiconductor device wherein the diameter of the upper surface of the first opening is smaller than the diameter of the upper surface of the second opening.

3. In claim 1 or 2, It has a capacitive element and a display element, The gate electrode of the first transistor is electrically connected to the scan line, The gate electrode of the second transistor is electrically connected to the capacitive element. The first transistor described above functions as a pixel selection transistor. The second transistor is a semiconductor device having the function of controlling the amount of current flowing through the display element.

4. In claim 1 or 2, It has a pixel section and a drive circuit section. The first transistor is placed in the drive circuit section. The second transistor is a semiconductor device arranged in the pixel portion.